Josh:
In working through the PPC4XX "memory-controller","ibm,sdram-4xx-ddr2"
adapter driver for the EDAC MC driver, there are a substantial number of
indirect DCR accesses.
Ideally, I would use the address and data DCRs implied from the SDRAM0
dcr-reg device tree property; however, the mtdcri and mfdcri are
mnemonic-only at present. Consequently, I've done:
#define DCRN_SDRAM0_BASE 0x010
#define DCRN_SDRAM0_CONFIG_ADDR (DCRN_SDRAM0_BASE+0x0)
#define DCRN_SDRAM0_CONFIG_DATA (DCRN_SDRAM0_BASE+0x1)
#define mfsdram(reg) mfdcri(SDRAM0, SDRAM_ ## reg)
#define mtsdram(reg, value) mtdcri(SDRAM0, SDRAM_ ## reg, value)
for the short-term.
Is there a long-term strategy or set of options under discussion about
expanding the DCR accessors in dcr.h to include indirect access from a
device tree property as in the case above?
It appears that the processors that use this memory controller core all have
the same DCR address and data registers, so this isn't a huge portability
issue for the immediate future; however, I endeavor to get things as close
to "best practices" as possible up front.
Regards,
Grant
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