Re: [PATCH] powerpc/5200: tighten up ac97 reset timing

2010-09-03 Thread Wolfram Sang
On Fri, Sep 03, 2010 at 11:45:22AM -0400, Eric Millbrandt wrote:
 Tighten up time timing around the gpio reset functionality.  Add a 200ns
 delay before remuxing the pins back to ac97 to comply with the ac97 spec.
 This delay ensures that sync and sdata_out are held low while reset
 transitions to high.
 
 Signed-off-by: Eric Millbrandt emillbra...@dekaresearch.com
 ---
 
 Scope shots are availible upon request.
 
  arch/powerpc/platforms/52xx/mpc52xx_common.c |5 -
  1 files changed, 4 insertions(+), 1 deletions(-)
 
 diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c 
 b/arch/powerpc/platforms/52xx/mpc52xx_common.c
 index 6e90531..79adfe7 100644
 --- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
 +++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
 @@ -326,11 +326,14 @@ int mpc5200_psc_ac97_gpio_reset(int psc_number)
 clrbits8(wkup_gpio-wkup_dvo, reset);
 
 /* wait at lease 1 us */

Maybe you could fix this typo as well while you are here?

 -   udelay(2);
 +   udelay(1);
 
 /* Deassert reset */
 setbits8(wkup_gpio-wkup_dvo, reset);
 
 +   /* wait at least 200ns */
 +   __delay(7);

ndelay(200)?

 +
 /* Restore pin-muxing */
 out_be32(simple_gpio-port_config, mux);
 
 --
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RE: [PATCH] powerpc/5200: tighten up ac97 reset timing

2010-09-03 Thread Eric Millbrandt
On Fri, 3 Sep 2010 at 12:02:09 Wolfram Sang wrote:
 On Fri, Sep 03, 2010 at 11:45:22AM -0400, Eric Millbrandt wrote:
 Tighten up time timing around the gpio reset functionality. Add a 200ns
 delay before remuxing the pins back to ac97 to comply with the ac97
 spec. This delay ensures that sync and sdata_out are held low while
 reset transitions to high.

 Signed-off-by: Eric Millbrandt emillbra...@dekaresearch.com
 ---

 Scope shots are availible upon request.

  arch/powerpc/platforms/52xx/mpc52xx_common.c |5 -
  1 files changed, 4 insertions(+), 1 deletions(-)
  diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c
 b/arch/powerpc/platforms/52xx/mpc52xx_common.c index 6e90531..79adfe7
 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_common.c +++
 b/arch/powerpc/platforms/52xx/mpc52xx_common.c @@ -326,11 +326,14 @@
 int mpc5200_psc_ac97_gpio_reset(int
 psc_number)
 clrbits8(wkup_gpio-wkup_dvo, reset);

 /* wait at lease 1 us */

 Maybe you could fix this typo as well while you are here?

Can do.

 -   udelay(2);
 +   udelay(1);

 /* Deassert reset */
 setbits8(wkup_gpio-wkup_dvo, reset);

 +   /* wait at least 200ns */
 +   __delay(7);

 ndelay(200)?

Is ndelay defined for powerpc?  I was under the impression that it was
being redefined to udelay in linux/delay.h.

#ifndef ndelay
static inline void ndelay(unsigned long x)
{
udelay(DIV_ROUND_UP(x, 1000));
}
#define ndelay(x) ndelay(x)
#endif

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Re: [PATCH] powerpc/5200: tighten up ac97 reset timing

2010-09-03 Thread Wolfram Sang
  -   udelay(2);
  +   udelay(1);
 
  /* Deassert reset */
  setbits8(wkup_gpio-wkup_dvo, reset);
 
  +   /* wait at least 200ns */
  +   __delay(7);
 
  ndelay(200)?
 
 Is ndelay defined for powerpc?  I was under the impression that it was
 being redefined to udelay in linux/delay.h.
 
 #ifndef ndelay
 static inline void ndelay(unsigned long x)
 {
 udelay(DIV_ROUND_UP(x, 1000));
 }
 #define ndelay(x) ndelay(x)
 #endif

Yes, but it is way more readable. Does the extra delay hurt? The value
of 7 looks a bit magic to me. Are you sure it will do for various clock
frequencies?

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RE: [PATCH] powerpc/5200: tighten up ac97 reset timing

2010-09-03 Thread Eric Millbrandt
On Fri, 3 Sep 2010 at 12:22:24 Wolfram Sang wrote:
 -   udelay(2);
 +   udelay(1);

 /* Deassert reset */
 setbits8(wkup_gpio-wkup_dvo, reset);

 +   /* wait at least 200ns */
 +   __delay(7);

 ndelay(200)?
  Is ndelay defined for powerpc?  I was under the impression that it was
 being redefined to udelay in linux/delay.h.

 #ifndef ndelay
 static inline void ndelay(unsigned long x)
 {
 udelay(DIV_ROUND_UP(x, 1000));
 }
 #define ndelay(x) ndelay(x)
 #endif

 Yes, but it is way more readable. Does the extra delay hurt? The value
 of 7 looks a bit magic to me. Are you sure it will do for various
 clock frequencies?


The reset is happening in the gpio spinlock, so I am trying to keep busy
waiting to a minimum.  The magic value of 7 calculates to *roughly* 200ns
with a system timebase of 33mhz.  This timebase drives the mpc5200(b) at
its max clock speed of 400mhz, so slower frequencies should just extend the
delay, which is acceptable.  If you strongly object to the use of __delay
I can change it to ndelay.


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reader of this message is not the intended recipient, you are hereby notified 
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strictly prohibited. If you have received this communication in error, please 
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Re: [PATCH] powerpc/5200: tighten up ac97 reset timing

2010-09-03 Thread Wolfram Sang

  Yes, but it is way more readable. Does the extra delay hurt? The value
  of 7 looks a bit magic to me. Are you sure it will do for various
  clock frequencies?
 
 
 The reset is happening in the gpio spinlock, so I am trying to keep busy
 waiting to a minimum.  The magic value of 7 calculates to *roughly* 200ns
 with a system timebase of 33mhz.  This timebase drives the mpc5200(b) at
 its max clock speed of 400mhz, so slower frequencies should just extend the
 delay, which is acceptable.  If you strongly object to the use of __delay
 I can change it to ndelay.

That might be a valid reason, dunno the details here. I'll leave the
final decision for Grant. If the use of __delay is acceptable, the
calculation that led to 7 should be explained, I think.

-- 
Pengutronix e.K.   | Wolfram Sang|
Industrial Linux Solutions | http://www.pengutronix.de/  |


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