Re: [PATCH] powerpc/powernv: Tell OPAL about our MMU mode

[Benjamin Herrenschmidt]

On Thu, 2017-06-29 at 15:24 +1000, Michael Ellerman wrote:
> Benjamin Herrenschmidt  writes:
> 
> > On Wed, 2017-06-28 at 15:17 +1000, Michael Ellerman wrote:
> > > Which doesn't really make sense. FSP says it's running (runtime).
> > > 
> > > The end of the OPAL log is below.
> > > 
> > > I think your patch means we're now calling slw_reinit(), whereas
> > > previously we would skip it?
> > 
> > Ugh... and slw_reinit() is somewhat broken I suppose these days. Drat.
> > 
> > Mikey, we probably need to key that off arch 300 or check for a DT prop
> > skiboot would put in that tells Linux it can do this.
> 
> DT prop of accepted reinit flags seems like it would work.
> 
> No prop means HILE_LE/HILE_BE

Maybe... The bug is only with p8 (and I'm changing skiboot to fix
even that) so I think I may just key off ARCH300... we'll see when I
get back to it, got bogged down with other things.

Ben.

Re: [PATCH] powerpc/powernv: Tell OPAL about our MMU mode

[Michael Ellerman]

Benjamin Herrenschmidt  writes:

> On Wed, 2017-06-28 at 15:17 +1000, Michael Ellerman wrote:
>> Which doesn't really make sense. FSP says it's running (runtime).
>> 
>> The end of the OPAL log is below.
>> 
>> I think your patch means we're now calling slw_reinit(), whereas
>> previously we would skip it?
>
> Ugh... and slw_reinit() is somewhat broken I suppose these days. Drat.
>
> Mikey, we probably need to key that off arch 300 or check for a DT prop
> skiboot would put in that tells Linux it can do this.

DT prop of accepted reinit flags seems like it would work.

No prop means HILE_LE/HILE_BE.

cheers

Re: [PATCH] powerpc/powernv: Tell OPAL about our MMU mode

[Benjamin Herrenschmidt]

On Wed, 2017-06-28 at 15:17 +1000, Michael Ellerman wrote:
> Which doesn't really make sense. FSP says it's running (runtime).
> 
> The end of the OPAL log is below.
> 
> I think your patch means we're now calling slw_reinit(), whereas
> previously we would skip it?

Ugh... and slw_reinit() is somewhat broken I suppose these days. Drat.

Mikey, we probably need to key that off arch 300 or check for a DT prop
skiboot would put in that tells Linux it can do this.

Ben.

Re: [PATCH] powerpc/powernv: Tell OPAL about our MMU mode

[Michael Ellerman]

Benjamin Herrenschmidt  writes:

> That will allow OPAL to configure the CPU in an optimal way.
>
> Signed-off-by: Benjamin Herrenschmidt 
> ---
>
> The matching OPAL change has been sent to the skiboot list.
>
> Setting those bits in the reinit() call with an older OPAL
> will result in the call returning an error which Linux ignores
> but it will still work in the sense that it will still honor
> the other flags it understands (the endian switch ones).

My Tuleta disagrees (P8 DD2.1)

Booting with this applied, console output just stops at:

Early memory node ranges
  node   0: [mem 0x-0x0007]
  node   1: [mem 0x0008-0x000f]
  node  16: [mem 0x0010-0x0017]
  node  17: [mem 0x0018-0x001f]
Initmem setup node 0 [mem 0x-0x0007]
On node 0 totalpages: 524288
  DMA zone: 512 pages used for memmap
  DMA zone: 0 pages reserved
  DMA zone: 524288 pages, LIFO batch:1


Which doesn't really make sense. FSP says it's running (runtime).

The end of the OPAL log is below.

I think your patch means we're now calling slw_reinit(), whereas
previously we would skip it?

cheers


[   77.369430361,5] SkiBoot skiboot-5.4.5 starting...
...
[ 3657.439295457,7] OPAL: CPU re-init with flags: 0x1
[ 3657.439297714,5] OPAL: Switch to big-endian OS
[ 3657.439331559,6] CPU: Switching HILE on all CPUs to 0
[ 3657.439334329,7] CPU: [0020] HID0 set to 0x
[ 3657.439338421,7] CPU: [0021] HID0 set to 0x
[ 3657.59269,7] CPU: [0022] HID0 set to 0x
[ 3657.449579783,7] CPU: [0023] HID0 set to 0x
[ 3657.454700263,7] CPU: [0024] HID0 set to 0x
[ 3657.459820839,7] CPU: [0025] HID0 set to 0x
[ 3657.464941340,7] CPU: [0026] HID0 set to 0x
[ 3657.470061789,7] CPU: [0027] HID0 set to 0x
[ 3657.475182489,7] CPU: [0028] HID0 set to 0x
[ 3657.480303113,7] CPU: [0029] HID0 set to 0x
[ 3657.485423724,7] CPU: [002a] HID0 set to 0x
[ 3657.490544363,7] CPU: [002b] HID0 set to 0x
[ 3657.495665019,7] CPU: [002c] HID0 set to 0x
[ 3657.500785664,7] CPU: [002d] HID0 set to 0x
[ 3657.505906312,7] CPU: [002e] HID0 set to 0x
[ 3657.511026948,7] CPU: [002f] HID0 set to 0x
[ 3658.004148353,7] CPU: [0060] HID0 set to 0x
[ 3658.009268971,7] CPU: [0061] HID0 set to 0x
[ 3658.014389562,7] CPU: [0062] HID0 set to 0x
[ 3658.019510236,7] CPU: [0063] HID0 set to 0x
[ 3658.024630888,7] CPU: [0064] HID0 set to 0x
[ 3658.029751538,7] CPU: [0065] HID0 set to 0x
[ 3658.034872229,7] CPU: [0066] HID0 set to 0x
[ 3658.039992873,7] CPU: [0067] HID0 set to 0x
[ 3658.045113621,7] CPU: [0068] HID0 set to 0x
[ 3658.050234216,7] CPU: [0069] HID0 set to 0x
[ 3658.055354862,7] CPU: [006a] HID0 set to 0x
[ 3658.060475496,7] CPU: [006b] HID0 set to 0x
[ 3658.065596111,7] CPU: [006c] HID0 set to 0x
[ 3658.070716747,7] CPU: [006d] HID0 set to 0x
[ 3658.075837392,7] CPU: [006e] HID0 set to 0x
[ 3658.080958012,7] CPU: [006f] HID0 set to 0x
[ 3658.086078859,7] CPU: [0070] HID0 set to 0x
[ 3658.091199390,7] CPU: [0071] HID0 set to 0x
[ 3658.096320012,7] CPU: [0072] HID0 set to 0x
[ 3658.101440692,7] CPU: [0073] HID0 set to 0x
[ 3658.106561322,7] CPU: [0074] HID0 set to 0x
[ 3658.111681979,7] CPU: [0075] HID0 set to 0x
[ 3658.116802652,7] CPU: [0076] HID0 set to 0x
[ 3658.121923328,7] CPU: [0077] HID0 set to 0x
[ 3658.127044809,7] CPU: [00a0] HID0 set to 0x
[ 3658.132165386,7] CPU: [00a1] HID0 set to 0x
[ 3658.137286102,7] CPU: [00a2] HID0 set to 0x
[ 3658.142406857,7] CPU: [00a3] HID0 set to 0x
[ 3658.147527622,7] CPU: [00a4] HID0 set to 0x
[ 3658.152648378,7] CPU: [00a5] HID0 set to 0x
[ 3658.157769125,7] CPU: [00a6] HID0 set to 0x
[ 3658.162889853,7] CPU: [00a7] HID0 set to 0x
[ 3658.168010827,7] CPU: [00b0] HID0 set to 0x
[ 3658.173131569,7] CPU: [00b1] HID0 set to 0x
[ 3658.178252302,7] CPU: [00b2] HID0 set to 0x
[ 3658.183373016,7] CPU: [00b3] HID0 set to 0x
[ 3658.188493773,7] CPU: [00b4]