Re: [PATCH 0/8] Add support for PowerPC Hypervisor supplied performance counters
On 01/22/2014 04:11 PM, Cody P Schafer wrote: On 01/21/2014 05:32 PM, Michael Ellerman wrote: On Thu, 2014-01-16 at 15:53 -0800, Cody P Schafer wrote: These patches add basic pmus for 2 powerpc hypervisor interfaces to obtain performance counters: gpci (get performance counter info) and 24x7. Any comments on/things that need fixing for this patch set to be merged? ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 0/8] Add support for PowerPC Hypervisor supplied performance counters
On 01/22/2014 07:02 AM, Michael Ellerman wrote: On Thu, 2014-01-16 at 15:53 -0800, Cody P Schafer wrote: These patches add basic pmus for 2 powerpc hypervisor interfaces to obtain performance counters: gpci (get performance counter info) and 24x7. The counters supplied by these interfaces are continually counting and never need to be (and cannot be) disabled or enabled. They additionally do not generate any interrupts. This makes them in some regards similar to software counters, and as a result their implimentation shares some common code (which an initial patch exposes) with the sw counters. Hi Cody, Can you please add some more explanation of this series. In particular why do we need two new PMUs, and how do they relate to each other? And can you add an example of how I'd actually use them using perf. Yeah, agreed. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 0/8] Add support for PowerPC Hypervisor supplied performance counters
On 01/21/2014 05:32 PM, Michael Ellerman wrote: On Thu, 2014-01-16 at 15:53 -0800, Cody P Schafer wrote: These patches add basic pmus for 2 powerpc hypervisor interfaces to obtain performance counters: gpci (get performance counter info) and 24x7. The counters supplied by these interfaces are continually counting and never need to be (and cannot be) disabled or enabled. They additionally do not generate any interrupts. This makes them in some regards similar to software counters, and as a result their implimentation shares some common code (which an initial patch exposes) with the sw counters. Hi Cody, Can you please add some more explanation of this series. Sure In particular why do we need two new PMUs, and how do they relate to each other? These 2 PMUs end up providing access to some cpu, core, and chip level counters not exposed via other interfaces, and additionally allow monitoring the performance of other lpars (guests) on the same host system. Because it provides access to core and chip level counters, this pair of PMUs could be thought of as powerpc's counterpart to x86's uncore events. As an example, processor_bus_utilization_abc and processor_bus_utilization_wxyz (in hv_gpci.h) allow retreval of total cycles and idle cycles for various inter-chip buses. GPCI is an interface that already exists on some power7 machines (depending on the fw version), but is rather in-flexible and code intensive to add additional counters to. The 24x7 interfaces currently are designed to co-exist with the gpci interface while replacing most of gpci's functionality on newer systems. Right now, the 24x7 code I've submitted uses the gpci calls to check if it has permission to access certain classes of counters. And can you add an example of how I'd actually use them using perf. # For gpci (formed from reading hv_gpci.h), gets processor_time_in_timebase_cycles perf stat -e 'hv_gpci/counter_info_version=3,offset=0,length=8,secondary_index=0,starting_index=0x,request=0x10/' -r 0 -a -x ' ' sleep 0.1 # For 24x7, assuming access to hw+fw that supports it, gets a yet-to-be identified counter: perf stat -e 'hv_24x7/domain=2,offset=8,starting_index=0,lpar=0x/' -r 0 -C 0 -x ' ' sleep 0.1 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 0/8] Add support for PowerPC Hypervisor supplied performance counters
On Thu, 2014-01-16 at 15:53 -0800, Cody P Schafer wrote: These patches add basic pmus for 2 powerpc hypervisor interfaces to obtain performance counters: gpci (get performance counter info) and 24x7. The counters supplied by these interfaces are continually counting and never need to be (and cannot be) disabled or enabled. They additionally do not generate any interrupts. This makes them in some regards similar to software counters, and as a result their implimentation shares some common code (which an initial patch exposes) with the sw counters. Hi Cody, Can you please add some more explanation of this series. In particular why do we need two new PMUs, and how do they relate to each other? And can you add an example of how I'd actually use them using perf. cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
