On Wed, Nov 06, 2013 at 05:08:03PM +0800, Xie Xiaobo wrote: > TWR-P1025 Overview > ----------------- > 512Mbyte DDR3 (on board DDR) > 64MB Nor Flash > eTSEC1: Connected to RGMII PHY AR8035 > eTSEC3: Connected to RGMII PHY AR8035 > Two USB2.0 Type A > One microSD Card slot > One mini-PCIe slot > One mini-USB TypeB dual UART > > Signed-off-by: Michael Johnston <michael.johns...@freescale.com> > Signed-off-by: Xie Xiaobo <x....@freescale.com> > > --- > Patch V6: Add a binding doc for ssd1289 device. > Patch V5: Miscellaneous modification. e.g. move the qe ucc node into dtsi. > Patch V4: Fix the mdio phy interrupt issue in dts > Patch V3: fix pcie range issue in dts > Patch V2: QE related init codes were factored out to a common file > > .../devicetree/bindings/video/ssd1289fb.txt | 13 + > arch/powerpc/boot/dts/p1025twr.dts | 95 +++++++ > arch/powerpc/boot/dts/p1025twr.dtsi | 280 > +++++++++++++++++++++ > arch/powerpc/platforms/85xx/Kconfig | 6 + > arch/powerpc/platforms/85xx/Makefile | 1 + > arch/powerpc/platforms/85xx/twr_p102x.c | 147 +++++++++++
No mpc85xx_smp_defconfig update? -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev