RE: Help with device tree binding for SMC serial
From: Rune Torgersen Finally got it (sort-of) working. Turned out that for some reason the console init is setting the baudrate to 9600 the options string passed in to the console init fuunction is NULL. Any idea oon how this should be passed in from u-boot? Ok, needed a valid console= line on the command line. WHen we tried that, we had a typo, so it was not recognized. Our old 2.6.18 arch/ppc kernel didn't need a console parameter, it got the baudrate from u-boot somehow. Anyway of doing that here too? ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Help with device tree binding for SMC serial
Rune Torgersen wrote: Ok, needed a valid console= line on the command line. WHen we tried that, we had a typo, so it was not recognized. Our old 2.6.18 arch/ppc kernel didn't need a console parameter, it got the baudrate from u-boot somehow. Anyway of doing that here too? You could add something to the cuboot code to fill in current-speed based on the value in the bd_t. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Help with device tree binding for SMC serial
Rune Torgersen wrote: From: Scott Wood You could add something to the cuboot code to fill in current-speed based on the value in the bd_t. Ahh.. That was what I'm missing. Where in the devicetree is that supposed to be at? In the serial node. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: Help with device tree binding for SMC serial
From: Scott Wood You could add something to the cuboot code to fill in current-speed based on the value in the bd_t. Ahh.. That was what I'm missing. Where in the devicetree is that supposed to be at? ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: Help with device tree binding for SMC serial
From: Scott Wood The tree looks OK. The checkstop may be from erratum SIU18; I had this issue on the ep8248e board. Try clearing BCR[PLDP]. Not sure what was wrong. We took a step back, and redid some stuff, and now we have serial output from the boot-wrapper. THe checkstop came from the wrapper grying to access the bcsr and doing the chip select fixup. We don';t have a bcsr on our board, and the cs layout is different. Now our problem is that the kernel doesn't want to output anything to hte serial port. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Help with device tree binding for SMC serial
Rune Torgersen wrote: Not sure what was wrong. We took a step back, and redid some stuff, and now we have serial output from the boot-wrapper. THe checkstop came from the wrapper grying to access the bcsr and doing the chip select fixup. We don';t have a bcsr on our board, and the cs layout is different. There's no bcsr access in the upstream bootwrapper (the mention of bcsr in cuboot-pq2.c is just one reason why some boards require us to do the CS programming), and the CS programming is chip-level, not board-level (it just requires that the device tree have a correct localbus node for the board). -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: Help with device tree binding for SMC serial
From: Scott Wood Sent: Wednesday, January 09, 2008 1:46 PM We're trying to get a SMC serial port on a8280 to work. I cannot find any ecxamples on the binding, so we've tried to make one. is this anywhere close to workable? [EMAIL PROTECTED] { device_type = serial; compatible = fsl,mpc8280-smc-uart, fsl,cpm2-smc-uart; reg = 11a80 10 87fc 2; The current binding has the actual parameter ram block as the second reg property, not the two-byte pointer. If your firmware doesn't initialize the pointer, you'll have to do it in platform code. interrupts = 4 8; interrupt-parent = PIC; fsl,cpm-brg = 7; fsl,cpm-command = 0100; }; cpm-command should be 1d00 for SMC1. Otherwise, it looks OK. Ok we're now using [EMAIL PROTECTED] { device_type = serial; compatible = fsl,mpc8280-smc-uart, fsl,cpm2-smc-uart; reg = 11a80 10 0 40;// base_address length parameter_ram_address length interrupts = 4 8; // Interrupt from table 4.3 of mpc8280rm, interrupt is level or edge interrupt-parent = PIC; fsl,cpm-brg = 7; fsl,cpm-command = 1d00; // Page and Sub-block code of the CPCR }; Right now we're trying to just get a kernel to give us some serial output, so we can continue the porting job. We're unsig a cuImage (using the pq2fads code right now). Now our problem is that the serial port is spitting out 0x0a's as fast as it can. Seems to be repeadtin the linefeed at the end of Uncompressing Kernel Image ... OK ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Help with device tree binding for SMC serial
Rune Torgersen wrote: Ok we're now using [EMAIL PROTECTED] { device_type = serial; compatible = fsl,mpc8280-smc-uart, fsl,cpm2-smc-uart; reg = 11a80 10 0 40;// base_address length parameter_ram_address length interrupts = 4 8; // Interrupt from table 4.3 of mpc8280rm, interrupt is level or edge interrupt-parent = PIC; fsl,cpm-brg = 7; fsl,cpm-command = 1d00; // Page and Sub-block code of the CPCR }; Looks good. Right now we're trying to just get a kernel to give us some serial output, so we can continue the porting job. We're unsig a cuImage (using the pq2fads code right now). Now our problem is that the serial port is spitting out 0x0a's as fast as it can. Don't forget to exclude the SMC parameter RAM from the muram data area in /soc/cpm/muram/data/reg. If you have an older device tree binding that has no /soc/cpm/muram node, but instead has two resources in /soc/cpm/reg, you need to move to head-of-tree to get this to work. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: Help with device tree binding for SMC serial
From: Scott Wood Don't forget to exclude the SMC parameter RAM from the muram data area in /soc/cpm/muram/data/reg. If you have an older device tree binding that has no /soc/cpm/muram node, but instead has two resources in /soc/cpm/reg, you need to move to head-of-tree to get this to work. Did that, now we get e checkstop resert. Time to hook up the BDI-2000 Is there a way to have the bootwrapper use the u-boot serial for a while (like a early srial port) for debugging? ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Help with device tree binding for SMC serial
Rune Torgersen wrote: From: Scott Wood Don't forget to exclude the SMC parameter RAM from the muram data area in /soc/cpm/muram/data/reg. If you have an older device tree binding that has no /soc/cpm/muram node, but instead has two resources in /soc/cpm/reg, you need to move to head-of-tree to get this to work. Did that, now we get e checkstop resert. Time to hook up the BDI-2000 Is there a way to have the bootwrapper use the u-boot serial for a while (like a early srial port) for debugging? If you mean calling into u-boot for a console, no, there's no code for that. What do your cpm and muram nodes look like? -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: Help with device tree binding for SMC serial
From: Scott Wood [mailto:[EMAIL PROTECTED] Rune Torgersen wrote: From: Scott Wood Don't forget to exclude the SMC parameter RAM from the muram data area in /soc/cpm/muram/data/reg. If you have an older device tree binding that has no /soc/cpm/muram node, but instead has two resources in /soc/cpm/reg, you need to move to head-of-tree to get this to work. Did that, now we get e checkstop resert. Time to hook up the BDI-2000 Is there a way to have the bootwrapper use the u-boot serial for a while (like a early srial port) for debugging? If you mean calling into u-boot for a console, no, there's no code for that. What do your cpm and muram nodes look like? [EMAIL PROTECTED] { #address-cells = 1; #size-cells = 1; #interrupt-cells = 2; compatible = fsl,mpc8280-cpm, fsl,cpm2; reg = 119c0 30; ranges; [EMAIL PROTECTED] { #address-cells = 1; #size-cells = 1; ranges = 0 0 1; [EMAIL PROTECTED] { compatible = fsl,cpm-muram-data; reg = 100 1f00 9800 800; }; }; [EMAIL PROTECTED] { compatible = fsl,mpc8280-brg, fsl,cpm2-brg, fsl,cpm-brg; reg = 119f0 10 115f0 10; }; [EMAIL PROTECTED] { device_type = serial; compatible = fsl,mpc8280-smc-uart, fsl,cpm2-smc-uart; reg = 11a80 10 0 40;// base_address length parameter_ram_address length interrupts = 4 8; // Interrupt from table 4.3 of mpc8280rm, interrupt is level or edge interrupt-parent = PIC; fsl,cpm-brg = 7; fsl,cpm-command = 1d00; // Page and Sub-block code of the CPCR }; }; and chosen node (not sure if needed) chosen { linux,stdout-path = /soc/cpm/[EMAIL PROTECTED]; bootargs = console=ttyS0,115200; }; ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev