Re[2]: [PATCH 11/11][v2] ppc440spe-adma: ADMA driver for PPC440SP(e) systems

2009-01-16 Thread Yuri Tikhonov

 Hello David,

 Thanks a lot for review.

 The general note to be made here is that the changes to the DTS file 
made by this patch are necessary for a ppc440spe ADMA driver, which is 
a not-completed arch/powerpc port from the arch/ppc branch, and which 
uses DT (well, incorrectly) just to get interrupts. Otherwise, it's 
just a platform device driver.

 We provided this ADMA driver just as the reference of driver, which 
implements the RAID-6 related low-level stuff. ppc440spe ADMA in its 
current state is far from ready for merging. We'll elaborate on its 
cleaning up then (surely, taking into account all the comments made 
from community). But, even now, the driver works, so we publish this 
so interested people could use and test it.

 Some comments mixed in below.

On Tuesday, January 13, 2009 you wrote:

 On Tue, Jan 13, 2009 at 03:43:55AM +0300, Yuri Tikhonov wrote:
 Adds the platform device definitions and the architecture specific support
 routines for the ppc440spe adma driver.
 
 Any board equipped with PPC440SP(e) controller may utilize this driver.
 
 diff --git a/arch/powerpc/boot/dts/katmai.dts 
 b/arch/powerpc/boot/dts/katmai.dts
 index 077819b..f2f77c8 100644
 --- a/arch/powerpc/boot/dts/katmai.dts
 +++ b/arch/powerpc/boot/dts/katmai.dts
 @@ -16,7 +16,7 @@
  
  / {
   #address-cells = 2;
 - #size-cells = 1;
 + #size-cells = 2;

 You've changed the root level size-cells, but haven't updated the
 sub-nodes (such as /memory) accordingly.

 Thanks, we'll fix this in the next version of this patch.

   model = amcc,katmai;
   compatible = amcc,katmai;
   dcr-parent = {/cpus/c...@0};
 @@ -392,6 +392,30 @@
   0x0 0x0 0x0 0x3 UIC3 0xa 0x4 /* swizzled int 
 C */
   0x0 0x0 0x0 0x4 UIC3 0xb 0x4 /* swizzled int 
 D */;
   };
 + DMA0: dma0 {

 No 'compatible' property, which seems dubious.

 OK, we'll fix.

 + interrupt-parent = DMA0;
 + interrupts = 0 1;
 + #interrupt-cells = 1;
 + #address-cells = 0;
 + #size-cells = 0;
 + interrupt-map = 
 + 0 UIC0 0x14 4
 + 1 UIC1 0x16 4;
 + };
 + DMA1: dma1 {
 + interrupt-parent = DMA1;
 + interrupts = 0 1;
 + #interrupt-cells = 1;
 + #address-cells = 0;
 + #size-cells = 0;
 + interrupt-map = 
 + 0 UIC0 0x16 4
 + 1 UIC1 0x16 4;

 Are these interrupt-maps correct?  The second interrupt from both dma
 controllers is routed to the same line on UIC1?

 The map is correct:

- first interrupts are 'DMAx Command Status FIFO Needs Service';
- second interrupt is 'DMA Error', both DMA engines share common error IRQ.


 + };
 + xor {
 + interrupt-parent = UIC1;
 + interrupts = 0x1f 4;

 What the hell is this thing?  No compatible property, nor even a
 meaningful name.

 This is the XOR accelerator, the dedicated DMA engine of ppc440spe 
equipped with the ability to do XOR operations in h/w. I guess, it 
could be named like DMA2.

 Regards, Yuri

 --
 Yuri Tikhonov, Senior Software Engineer
 Emcraft Systems, www.emcraft.com

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Re[2]: [PATCH 11/11][v2] ppc440spe-adma: ADMA driver for PPC440SP(e) systems

2009-01-16 Thread Yuri Tikhonov

 Hello Anton,

 Thanks for review. Please note the general note I made in Re[2]: 
[PATCH 11/11][v2] ppc440spe-adma: ADMA driver for PPC440SP(e) 
systems.

 All your comments make sense, so we'll try to address these in the 
next version of the driver. Some comments below.

On Thursday, January 15, 2009 you wrote:

 Hello Yuri,

 On Tue, Jan 13, 2009 at 03:43:55AM +0300, Yuri Tikhonov wrote:
 Adds the platform device definitions and the architecture specific support
 routines for the ppc440spe adma driver.
 
 Any board equipped with PPC440SP(e) controller may utilize this driver.
 
 Signed-off-by: Yuri Tikhonov y...@emcraft.com
 Signed-off-by: Ilya Yanok ya...@emcraft.com
 ---

 Quite complex and interesting driver, I must say.
 Have you thought about splitting ppc440spe-adma.c into multiple
 files, btw?

 Admittedly, no. But I guess this makes sense. The driver supports two 
different types of DMA devices of ppc440spe: DMA0,1 and DMA2[XOR 
engine]. So, we could split the driver at least in two, which would 
definitely simplified the code. 

 A few comments down below...

 [...]
 +typedef struct ppc440spe_adma_device {

 Please avoid typedefs.

 OK.

 [...]
 +/*
 + * Descriptor of allocated CDB
 + */
 +typedef struct {
 + dma_cdb_t   *vaddr; /* virtual address of CDB */
 + dma_addr_t  paddr;  /* physical address of CDB */
 + /*
 +  * Additional fields
 +  */
 + struct list_headlink;   /* link in processing list */
 + u32 status; /* status of the CDB */
 + /* status bits:  */
 + #define DMA_CDB_DONE(10)  /* CDB processing competed */
 + #define DMA_CDB_CANCEL  (11)  /* waiting thread was interrupted */
 +} dma_cdbd_t;

 It seems there are no users of this struct.

 Indeed. This is an useless inheritance of some old version of the 
driver. Will remove this in the next patch.

[..]

 +/**
 + * ppc440spe_desc_init_dma01pq - initialize the descriptors for PQ operation
 + * qith DMA0/1
 + */
 +static inline void ppc440spe_desc_init_dma01pq(ppc440spe_desc_t *desc,
 + int dst_cnt, int src_cnt, unsigned long flags,
 + unsigned long op)
 +{

 Way to big for inline. The same for all the inlines.

 Btw, ppc_async_tx_find_best_channel() looks too big for inline
 and also too big to be in a .h file.

 OK, will be moved to the appropriate .c.

[..]

 [...]
 +static int ppc440spe_test_raid6 (ppc440spe_ch_t *chan)
 +{
 + ppc440spe_desc_t *sw_desc, *iter;
 + struct page *pg;
 + char *a;
 + dma_addr_t dma_addr, addrs[2];
 + unsigned long op = 0;
 + int rval = 0;
 +
 + /*FIXME*/

 ?

 +
 + set_bit(PPC440SPE_DESC_WXOR, op);
 +
 + pg = alloc_page(GFP_KERNEL);
 + if (!pg)
 + return -ENOMEM;
 +

 +
 +/**
 + * ppc440spe_adma_probe - probe the asynch device
 + */
 +static int __devinit ppc440spe_adma_probe(struct platform_device *pdev)
 +{
 + struct resource *res;

 Why is this a platform driver? What's the point of describing
 DMA nodes in the device tree w/o actually using them (don't count
 interrupts)? There are a lot of hard-coded addresses in the code...
 :-/

 And arch/powerpc/platforms/44x/ppc440spe_dma_engines.c file
 reminds me arch/ppc-style bindings. ;-)

 Right. This driver is a not-completed port from the arch/ppc branch.

 + int ret=0, irq1, irq2, initcode = PPC_ADMA_INIT_OK;
 + void *regs;
 + ppc440spe_dev_t *adev;
 + ppc440spe_ch_t *chan;
 + ppc440spe_aplat_t *plat_data;
 + struct ppc_dma_chan_ref *ref;
 + struct device_node *dp;
 + char s[10];
 +

 [...]
 +static int __init ppc440spe_adma_init (void)
 +{
 + int rval, i;
 + struct proc_dir_entry *p;
 +
 + for (i = 0; i  PPC440SPE_ADMA_ENGINES_NUM; i++)
 + ppc_adma_devices[i] = -1;
 +
 + rval = platform_driver_register(ppc440spe_adma_driver);
 +
 + if (rval == 0) {
 + /* Create /proc entries */
 + ppc440spe_proot = proc_mkdir(PPC440SPE_R6_PROC_ROOT, NULL);
 + if (!ppc440spe_proot) {
 + printk(KERN_ERR %s: failed to create %s proc 
 + directory\n,__func__,PPC440SPE_R6_PROC_ROOT);
 + /* User will not be able to enable h/w RAID-6 */
 + return rval;
 + }

 /proc? Why /proc? The driver has nothing to do with Linux VM subsystem
 or processes. I think /sys/ interface would suit better for this, no?
 Either way, userspace interfaces should be documented somehow
 (probably Documentation/ABI/, or at least some comments in the
 code).

 Agree, we'll fix this.

 Regards, Yuri

 --
 Yuri Tikhonov, Senior Software Engineer
 Emcraft Systems, www.emcraft.com

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