AW: 405GP Networking issue
Hi Georg, Thank you for your suggestion. However, we once checked the EMAC0_MR1, and it was right configuration. Sorry, not to be informed to you. But I'll check once again. As a fact, this problem does not happen everywhere. We need to go another place and it's far from here. Therefore, next investigation will be held at the middle of next week. I will keep you informed as more information becomes available. Regards, Kishinami --- On Fri, 28 Feb 2003 22:59:11 +0900 Georg Klug -san wrote: >> We are debugging a custom board designed based on the 405GP >> (200MHz) and have a problem not being sent ECHO REPLY ping >> packet from custom board to our PC via repeater hub on the >> heavy traffic under 10Mbps and half duplex condition. > >> ... > >> Following are the our simplest duplication process and the >> results. >> >> 1. Connect the repeater hub to backbone LAN. >> 2. Connect custom board, test PC to ping and other PCs to the >>repeater hub to the full. This case, 10 or more PCs are >>connected to repeater hub and each PC works normally by >>using network. >> 3. Increase the traffic by using ftp command. The ftp data was >>never addressed to the custom board. >> 4. Ping from our PC to custom board at one time. >> 5. The 60% pings were lost such condition. >> 6. We investigated the ping lost case. >>- LAN protocol analyzer captured the ECHO REQUEST which was >> address to custom board. It shows ECHO REQUEST was issued >> from our PC to LAN cable. >>- Logic analyzer captured the same ping packet which was >> already been captured by LAN analyzer between PHY(Intel >> LXT971A) and EMAC. It shows ECHO REQUEST was reached just >> before the EMAC. >>- The LAN device driver's receive buffer did not receive the >> ECHO REQUEST by using printk command. We suspected that the >> ECHO REQUEST was not issued to the MAL(Memory Access Layer), >> therefore ECHO REQUEST was not translated to the receive >> buffer. >> >> At the same time, many 4 byte short packet(0x00f0) which was >> not addressed to custom board was received to the LAN device driver's >> receive buffer with error status. According to 405GP manual, EMAC >> discards the packet which is not of its own. > >to me it looks like an half duplex issue. You should check whether both: >sender and receiver know that they are connected to a half duplex hub. >Otherwise collisions could occur which are not detected by the receiver >and also not by the transmitting entity. So you should make sure that >FDE is set to 0 in the EMAC Mode register 1 (EMAC0_MR1) according to >the Users manual) > - KISHINAMI Masaya Fujitsu Limited (Japan) ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
about flash_port_width
In message you wrote: > > I read the flash manual about INTEL 28F640J3A.I know it has two > programming operations:Byte or Word.Byte is 8 bits and the Word is 16 bits. > but I refer some source code in PPCBOOT(/board/nx823/flash.c),I find a > strange thing: Please do NOT post PPCBoot related questions to a Linux oriented mailing list. This is off topic here. Also note that PPCBoot is a dead end, as development has been discuntinued. You should base any current work on the successor, U-Boot, only. > Here,"data" is ulong and "*addr" is vu_long ,they are both 32 bits.Does > this mean programming operation is 32 bits?If so,it is opposition to the > FLASH manual.Why? This is just a configuration that uses two flash chips (one for the lower 16 bits, the other for the upper 16 bits) to give a 32 bit wide bus. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd at denx.de Anarchy may not be the best form of government, but it's better than no government at all. ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
RAMDISK
In message <3E5EF447.3B9088D7 at tataelxsi.co.in> you wrote: > > Command line argument for linux given is > root=/dev/nfsnfsaddrs=: > > My query is > 1. How to boot linux-2.4.1 using root file system rather than using > network file system? You always use a "root filesystem". With your option, you mount a filesystem exported by your NFS server as root filesystem. I guess you want to mount a ramdisk as rootfilesystem. To do so, make sure your "bootargs" variable contains the string "root=/dev/ram" > 2. How to make ramdisk(root fs) part of linux kernel? DO i need to > change some makefiles or config options? Why would you want to make it part of the kernel? This makes no sense. If you mean how to combine the ramdisk image and the kernel image into one image file, then please see the multi-file image format of the "mkimage" tol that comes with PPCBoot. > 3. How to remove dependency of nfs to boot-up LINUX i.e, OS image should > boot in standalone setup? Just do not use "root=/dev/nfs" in your "bootargs" settings. Maybe you can get some more detailed help from reading the docs, like http://www.denx.de/re/DPLG.html Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd at denx.de Without freedom of choice there is no creativity. -- Kirk, "The return of the Archons", stardate 3157.4 ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Good Books
In message <3.0.3.32.20030228081833.0076f7f8 at hollabaugh.com> you wrote: > > Do you have a URL for a table of contents for Yaghmour's book? I'm > anxious to see the TOC and order the book. At the moment all I know that is publicly available is the entry at Amazon (just search for "yaghmour"). [I happen to know more about the book just because I helped reviewing it.] Karim, maybe you have a link available? Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd at denx.de You don't need a weatherman to know which way the wind blows. - Bob Dylan ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
405GP Networking issue
Dear all, it's first time to post. We are debugging a custom board designed based on the 405GP (200MHz) and have a problem not being sent ECHO REPLY ping packet from custom board to our PC via repeater hub on the heavy traffic under 10Mbps and half duplex condition. We used the latest version of ibm_ocp LAN device driver at that time from kernel 2.4.21-pre3 and ported it to work on the kernel 2.4.18 because it costs many time to boot our custom board on the latest one. The board works fine unless not be such a case. Following are the our simplest duplication process and the results. 1. Connect the repeater hub to backbone LAN. 2. Connect custom board, test PC to ping and other PCs to the repeater hub to the full. This case, 10 or more PCs are connected to repeater hub and each PC works normally by using network. 3. Increase the traffic by using ftp command. The ftp data was never addressed to the custom board. 4. Ping from our PC to custom board at one time. 5. The 60% pings were lost such condition. 6. We investigated the ping lost case. - LAN protocol analyzer captured the ECHO REQUEST which was address to custom board. It shows ECHO REQUEST was issued from our PC to LAN cable. - Logic analyzer captured the same ping packet which was already been captured by LAN analyzer between PHY(Intel LXT971A) and EMAC. It shows ECHO REQUEST was reached just before the EMAC. - The LAN device driver's receive buffer did not receive the ECHO REQUEST by using printk command. We suspected that the ECHO REQUEST was not issued to the MAL(Memory Access Layer), therefore ECHO REQUEST was not translated to the receive buffer. At the same time, many 4 byte short packet(0x00f0) which was not addressed to custom board was received to the LAN device driver's receive buffer with error status. According to 405GP manual, EMAC discards the packet which is not of its own. Have anyone experienced a problem like this? Any help would be appreciated. Regards, Kishinami. - KISHINAMI Masaya Fujitsu Limited (Japan) ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Information about Library Optimizer
On Fri, 28 Feb 2003, Kamaraj P wrote: > Does Any body Used Library Optimizer ? > if so , can any one give some example how to use it .. I have strong doubts about tools like this - amazingly well though how it may actually do the job in a certain setup. Building a monolithic block of software first, and then rip it apart again just doesn't seem right to me. > Is there any other way to reduce the library size .. If you're really short on memory, you should consider using an alternative library solution like uClibc. Just my 2 cents. Regards, Marius - Marius Groeger SYSGO Real-Time Solutions AG mgroeger at sysgo.de Software Engineering Embedded and Real-Time Softwarewww.sysgo.de Voice: +49-6136-9948-0 Am Pfaffenstein 14 www.osek.de FAX: +49-6136-9948-10 55270 Klein-Winternheim, Germany www.elinos.com ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
how to get dwarf-1 debugging in crossGcc compilation
>> >I have built a cross GCC compiler (based on gcc 2.95.3) for my PowerPc >embedded project. This tool chain successfully output an executable ELF file >which can be ran on my target board. But when I tried to load this elf file >into my SingleStep SDS 7.5 debugger, the loading has failed. The reason is >SDS debugger only support dwarf-1 version and my elf file contains debug information which is disliked by her parser "fromelf.exe". >I tried to use all sort of compilation flags like "-gdwarf", "-gdwarf-1" and >"-gdwarf-2" so as to produce an elf with "dwarf-1" debug information in it. But all of >these trials had failed. I actually dump the elf, via fromelf, file out to see if dwarf >information has been included but none is found! Can anyone help me on the following questions: Does A) Is >dwarf-1 format supported in CrossGcc for MPC target?? B) if yes, what compilation flag >should I use in my makefile. (I am using -g in the make)? >Thanks in advance. >p.s. gcc -v on my host computer display this version info. > Reading specs from /usr/local/lib/gcc-lib/powerpc-linux/2.95.3/specs >gcc version 2.95.3 20010315 (release)" ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Question about modules
On Fri, 2003-02-28 at 18:27, Jean-Denis Boyer wrote: > > Everything works, till I try to insmod it: I get m8xx_cpm_alloc and > > m8xx_cpm_hostalloc as unresolved symbols. > > In commproc.c, add the following line: > EXPORT_SYMBOL(m8xx_cpm_hostalloc); > ok, i have already thought about that, but it means that my driver won't work with "standard" kernels, isn't it? people should change their kernel code to load my drivers, and that isn't cool :( thanks for your answer Cheers ibon. > > Regards, > > > Jean-Denis Boyer, B.Eng., Technical Leader > Mediatrix Telecom Inc. > 4229 Garlock Street > Sherbrooke (Qu?bec) > J1L 2C8 CANADA > (819)829-8749 x241 > > -- Ibon Gotxi Garcia ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Improved copy_page() function, about 30% speed up for mpc860!
Forget the copy_page below. I used a non cache aligned buffer :-( However if I enable the use of "dcbz" and remove "dcbt" in the orginal copy_page() and use a cache aligned test buffer, I still get a speedup of 30% or more on my mpc860 board. I think a new CONFIG option is apropiate where one can turn on the use of "dcbz" for 8xx. OK? Jocke > Hi all > > I have been playing with the copy_page() function in arch/ppc/kernel/misc.S > and gained about 30% speed up for my mpc860, rev D4 MHz. > > This is what i did: > - Use dcbz on 8xx but clear ahead one cache line(performance is really crappy > if I don't clear ahead). This is the biggest improvement. > - Use prefetch for 8xx as well. > > I know that dcbz is buggy for some 8xx CPUs but I don't know which ones. > For me works just fine, except in copy_tofrom_user(don't know why). > > I would like to get some feedback & test results both for 8xx and non 8xx. > Please include exact CPU and revision. > > Thanks > Jocke > > _GLOBAL(copy_page) > addir3,r3,-4 > addir4,r4,-4 > li r5,4 > #if MAX_COPY_PREFETCH > 1 > /* This will prefetch past end of page, does not seem to be a problem? > */ > li r0,MAX_COPY_PREFETCH > li r11,4 > mtctr r0 > 11: dcbtr11,r4 > addir11,r11,L1_CACHE_LINE_SIZE > bdnz11b > #else /* MAX_L1_COPY_PREFETCH == 1 */ > dcbtr5,r4 > li r11,L1_CACHE_LINE_SIZE+4 > #endif /* MAX_L1_COPY_PREFETCH */ > dcbzr5,r3 /* older 8xx CPUs may have buggy dcbz instructions, if so > try "dcbt r5,r3" instead */ > addir5,r5,L1_CACHE_LINE_SIZE > li r0,4096/L1_CACHE_LINE_SIZE-1 /* All, but the last cache line of > data due dcbz below */ > mtctr r0 > 1: > dcbtr11,r4 > dcbzr5,r3 /* zero the cache line after the one that is beeing copied > * older 8xx CPUs may have buggy dcbz instructions, if so > try "dcbt r5,r3" instead */ > COPY_16_BYTES > #if L1_CACHE_LINE_SIZE >= 32 > COPY_16_BYTES > #if L1_CACHE_LINE_SIZE >= 64 > COPY_16_BYTES > COPY_16_BYTES > #if L1_CACHE_LINE_SIZE >= 128 > COPY_16_BYTES > COPY_16_BYTES > COPY_16_BYTES > COPY_16_BYTES > #endif > #endif > #endif > bdnz1b > /* Copy the last cache line of data */ > COPY_16_BYTES > #if L1_CACHE_LINE_SIZE >= 32 > COPY_16_BYTES > #if L1_CACHE_LINE_SIZE >= 64 > COPY_16_BYTES > COPY_16_BYTES > #if L1_CACHE_LINE_SIZE >= 128 > COPY_16_BYTES > COPY_16_BYTES > COPY_16_BYTES > COPY_16_BYTES > #endif > #endif > #endif > blr > > > > ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Information about Library Optimizer
Hi All, Does Any body Used Library Optimizer ? if so , can any one give some example how to use it .. Is there any other way to reduce the library size .. Thanks in Advance Kamaraj ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Question about modules
On Fri, 2003-02-28 at 16:47, bhupinder sahran wrote: > Hi > > What abt System.map... > Can u check if symbols are there. > yes, they are, as well as in vmlinux. In my top level Makefile I find: $(NM) vmlinux | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | sort > System.map but I think that in the step of making zvmlinux, unneeded symbols _may_ be stripped off, because i cannot find all the symbols in the target (in /proc/ksyms or with ksyms -a). Am i right? Thank you for answering, anyway. Cheers Ibon. > Bye > Bhupi > > > --- Ibon Gotxi Garcia wrote: > > > > I'm trying to write a simple module for an 8xx board > > using the SMC2. > > Everything works, till I try to insmod it: I get > > m8xx_cpm_alloc and > > m8xx_cpm_hostalloc as unresolved symbols. > > > > I think that arch/ppc/8xx_io/commproc.c is properly > > compiled (I can see > > both symbols on vmlinux), but somehow the build > > process strips them off > > as they are unused (i cannot see them in /proc/ksyms > > in the target). Is > > that right? Any clue to solve it? (having them in > > the target kernel > > without modifying the original sources) > > > > Many regards. > > ibon > > > > -- > > Ibon Gotxi Garcia > > > > > > -- Ibon Gotxi Garcia ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
about flash_port_width
Hi,
I read the flash manual about INTEL 28F640J3A.I know it has two
programming operations:Byte or Word.Byte is 8 bits and the Word is 16 bits.
but I refer some source code in PPCBOOT(/board/nx823/flash.c),I find a
strange thing:
#define FLASH_PORT_WIDTH ulong
#define FLASH_PORT_WIDTHV vu_long
#endif
#define FPW FLASH_PORT_WIDTH
#define FPWV FLASH_PORT_WIDTHV
/*---
* Write a word or halfword to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int write_data (flash_info_t *info, ulong dest, FPW data)
{
FPWV *addr = (FPWV *)dest;
ulong status;
ulong start;
int flag;
.
flag = disable_interrupts();
*addr = (FPW)0x00400040; /* write setup */
*addr = data;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
return (0);
}
Here,"data" is ulong and "*addr" is vu_long ,they are both 32 bits.Does
this mean programming operation is 32 bits?If so,it is opposition to the
FLASH manual.Why?
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
AW: 405GP Networking issue
Hi Kishinami, > We are debugging a custom board designed based on the 405GP > (200MHz) and have a problem not being sent ECHO REPLY ping > packet from custom board to our PC via repeater hub on the > heavy traffic under 10Mbps and half duplex condition. > ... > Following are the our simplest duplication process and the > results. > > 1. Connect the repeater hub to backbone LAN. > 2. Connect custom board, test PC to ping and other PCs to the >repeater hub to the full. This case, 10 or more PCs are >connected to repeater hub and each PC works normally by >using network. > 3. Increase the traffic by using ftp command. The ftp data was >never addressed to the custom board. > 4. Ping from our PC to custom board at one time. > 5. The 60% pings were lost such condition. > 6. We investigated the ping lost case. >- LAN protocol analyzer captured the ECHO REQUEST which was > address to custom board. It shows ECHO REQUEST was issued > from our PC to LAN cable. >- Logic analyzer captured the same ping packet which was > already been captured by LAN analyzer between PHY(Intel > LXT971A) and EMAC. It shows ECHO REQUEST was reached just > before the EMAC. >- The LAN device driver's receive buffer did not receive the > ECHO REQUEST by using printk command. We suspected that the > ECHO REQUEST was not issued to the MAL(Memory Access Layer), > therefore ECHO REQUEST was not translated to the receive > buffer. > > At the same time, many 4 byte short packet(0x00f0) which was > not addressed to custom board was received to the LAN device driver's > receive buffer with error status. According to 405GP manual, EMAC > discards the packet which is not of its own. to me it looks like an half duplex issue. You should check whether both: sender and receiver know that they are connected to a half duplex hub. Otherwise collisions could occur which are not detected by the receiver and also not by the transmitting entity. So you should make sure that FDE is set to 0 in the EMAC Mode register 1 (EMAC0_MR1) according to the Users manual) Georg ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Question about modules
> Everything works, till I try to insmod it: I get m8xx_cpm_alloc and > m8xx_cpm_hostalloc as unresolved symbols. In commproc.c, add the following line: EXPORT_SYMBOL(m8xx_cpm_hostalloc); Regards, Jean-Denis Boyer, B.Eng., Technical Leader Mediatrix Telecom Inc. 4229 Garlock Street Sherbrooke (Qu?bec) J1L 2C8 CANADA (819)829-8749 x241 ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
kgdb help!
I want to use the kgdb,but don't know can I do? I went to the website http://kgdb.sourceforge.net I follow the step:preparing a kernel but when I finished the command: bunzip2 -c ~/linux-2.4.6.tar.bz2 | tar xvf - then I want to do the next: mv linux linux-2.4.6-kgdb but linux tell me that there is no directoy like "linux" Neither do I. how someday tell what happerns to it ? Tanks. ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Good Books
Check it out here : http://www.amazon.com/exec/obidos/ASIN/0672322269/qid%3D1015445968/sr%3D1-2/ref%3Dsr%5F1%5F2/002-1581213-6875226 Cheers, Samuel. On Fri, 28 Feb 2003, okisoftxman wrote: > > Hi > How & Where to get this book? > > Best Regards! > > > - Original Message - > From: "Dr. Craig Hollabaugh" > To: ; > Sent: Friday, February 28, 2003 11:24 AM > Subject: Re: Good Books > > > > > > At 05:05 PM 2/27/2003 -0800, John Chan wrote: > > > > > >Hello, Folks, > > > > > >I am looking for reference books which are related to PPC 440GP or/and > > >embedded PPC or/and Linux on PPC. Do you have any suggestion? > > > > John, > > > > My book, Embedded Linux: Hardware, Software and Interfacing, uses a PPC860 > (Embedded Planet RPX-CLLF) in numerous interfacing examples. This might help > with general PPC issues, not specifically the 440 though. > > > > Craig > > > > > > > > > > ___ > > Dr. Craig Hollabaugh craig at hollabaugh.com > > Author of Embedded Linux > > > > P.O. Box 1405 > > Ouray, CO 81427-1405See my "kitchen sink" resume at > > 970 325 4810 homewww.hollabaugh.com/resume.html > > 970 325 0509 office > > > > > > > > ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
405GP Networking issue
At 04:27 AM 2/28/2003, KISHINAMI Masaya wrote: >We are debugging a custom board designed based on the 405GP >(200MHz) and have a problem not being sent ECHO REPLY ping >packet from custom board to our PC via repeater hub on the >heavy traffic under 10Mbps and half duplex condition. >We used the latest version of ibm_ocp LAN device driver at >that time from kernel 2.4.21-pre3 and ported it to work on >the kernel 2.4.18 because it costs many time to boot our >custom board on the latest one. The board works fine unless >not be such a case. >- Logic analyzer captured the same ping packet which was > already been captured by LAN analyzer between PHY(Intel > LXT971A) and EMAC. It shows ECHO REQUEST was reached just > before the EMAC. If other obvious _software_ errors were eliminated (like incorrect duplex/speed settings etc) you can check _hardware_ related problems: Please, check the quality of the clock between PHY and EMAC (MII clock). We had some problems with this Intel PHY and IBM 440GP when PHY generated clock was _slightly_ out of spec for IBM CPU. You can try to increase MII drive strength in LXT971A Digital Config register (26), write 0x0800 to it. Make sure that your design uses _crystal_ based oscillator for PHY clock, not PLL based. This is _general_ observation regarding PHY clock in any designs (not just 4xx based) Eugene. ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Good Books
Hi How & Where to get this book? Best Regards! - Original Message - From: "Dr. Craig Hollabaugh" <[EMAIL PROTECTED]> To: ; Sent: Friday, February 28, 2003 11:24 AM Subject: Re: Good Books > > At 05:05 PM 2/27/2003 -0800, John Chan wrote: > > > >Hello, Folks, > > > >I am looking for reference books which are related to PPC 440GP or/and > >embedded PPC or/and Linux on PPC. Do you have any suggestion? > > John, > > My book, Embedded Linux: Hardware, Software and Interfacing, uses a PPC860 (Embedded Planet RPX-CLLF) in numerous interfacing examples. This might help with general PPC issues, not specifically the 440 though. > > Craig > > > > > ___ > Dr. Craig Hollabaugh craig at hollabaugh.com > Author of Embedded Linux > > P.O. Box 1405 > Ouray, CO 81427-1405See my "kitchen sink" resume at > 970 325 4810 homewww.hollabaugh.com/resume.html > 970 325 0509 office > > > ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
RAMDISK
Hello, Right now, iam working booting Linux 2.4.1 on MPC8260ADS. Iam using NFS option to boot the linux. Mount point is on the host PC. Iam using PPCBOOT bootloader. Command line argument for linux given is root=/dev/nfsnfsaddrs=: My query is 1. How to boot linux-2.4.1 using root file system rather than using network file system? 2. How to make ramdisk(root fs) part of linux kernel? DO i need to change some makefiles or config options? 3. How to remove dependency of nfs to boot-up LINUX i.e, OS image should boot in standalone setup? thanks in advance, with rgds, kamal ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
405GP Networking issue
Kishinami, You are correct, the 405GP's EMAC will discard any bad packets or packets that do not meet it's address match mechanism. There is one exception. If the packet received gets a good address match and the packet is large but has an FCS error, it may pass the bad packet to the MAL. The MAL will create an EOB interrupt and the RX_EOB routine should then look at the descriptors status bits to see that it is a bad packet. This is determined by the RX threshold value. Once the EMAC starts to send a packet to the MAL it will continue to send it, even though it fails the FCS check at the end of the packet. Once it starts a packet it runs to completion. SW then needs to detect the bad packet by the status bits. The real question is, why are you receiving what the EMAC thinks are bad packets? If you can isolate the board on a hub with only the ping traffic in question it will make things easier to debug. Most of the time when this type of thing happens, you have noise between the PHY and the EMAC on the MII bus. Here is the way I shoot these types of things. 1) Put the EMAC in promiscous mode, enable the reception of every bad packet it can. You do this by setting the RMR reg. Look at the open routine for the device. I think the RMR reg is set there. 2) Go to the RX_EOB routine where it checks the status bits in the descriptor. If it detects a bad packet, print the packet out. Look for any odd bit patterns. You may have a noisy bit. Remember, if the MII itnerface is so messed up that the preamble does not get deteceted correctly the EMAC will not see the packet at all. When I have it this type of problem, I pull out the Smartbit tester and embed data patterns in the packet that may fake the EMAC to think it has a preamble. For example, if I think I am dropping bit 0, I will send in a pattern of all 5's in the packet for a while and then a F. By using different data paterns you can determing the problem bit or bits. I have also seen where there was to much load on a line so it did not switch as it should. You should send your problem to PPCSUPP at us.ibm.com, IBM support. Send them a shapshot of what you captured on the MII interface. Also, a scope capture showing the RX_DV( I think that is the name of the MII signal that marks the beginning of a RX packet) line and a data line so they can see how they switch together. If the ctl line is late or the data line is early, you can get some weird results. Mark K. Wisner Advisory Software Engineer IBM Microelectronics 3039 Cornwallis Rd RTP, NC 27709 Tel. 919-254-7191 Fax 919-543-7575 -- Forwarded by Mark Wisner/Raleigh/IBM on 02/28/2003 10:36 AM --- Mark Wisner 02/28/2003 09:10 AM To:kishinami at cs.fujitsu.com.jp cc: From: Mark Wisner/Raleigh/[EMAIL PROTECTED] Subject:405GP Networking issue Kishinami, You are correct, the 405GP's EMAC will discard any bad packets or packets that do not meet it's address match mechanism. There is one exception. If the packet received gets a good address match and the packet is large but has an FCS error, it may pass the bad packet to the MAL. The MAL will create an EOB interrupt and the RX_EOB routine should then look at the descriptors status bits to see that it is a bad packet. This is determined by the RX threshold value. Once the EMAC starts to send a packet to the MAL it will continue to send it, even though it fails the FCS check at the end of the packet. Once it starts a packet it runs to completion. SW then needs to detect the bad packet by the status bits. The real question is, why are you receiving what the EMAC thinks are bad packets? If you can isolate the board on a hub with only the ping traffic in question it will make things easier to debug. Most of the time when this type of thing happens, you have noise between the PHY and the EMAC on the MII bus. Here is the way I shoot these types of things. 1) Put the EMAC in promiscous mode, enable the reception of every bad packet it can. You do this by setting the RMR reg. Look at the open routine for the device. I think the RMR reg is set there. 2) Go to the RX_EOB routine where it checks the status bits in the descriptor. If it detects a bad packet, print the packet out. Look for any odd bit patterns. You may have a noisy bit. Remember, if the MII itnerface is so messed up that the preamble does not get deteceted correctly the EMAC will not see the packet at all. When I have it this type of problem, I pull out the Smartbit tester and embed data patterns in the packet that may fake the EMAC to think it has a preamble. For example, if I think I am dropping bit 0, I will send in a pattern of all 5's in the packet for a while and then a F. By using different data paterns you can determing the problem bit or bits. I have also seen where there was to much load on a line so it did not switch as it should. You should send your problem to PPCSUPP at us.ibm.com, IBM support. Send them a shapshot of what you ca
Hung kernel on EP405?
Hi, Here is a detailed account of what's happening. (Monta Vista Hardhat Linux 2.0 running on an embedded planet EP405 rev 1.2 with Solaris 2.7 as the host) I build the kernel doing a 'make dep' and then a 'make zImage'. Then, I download the kernel(the umcompressed "vmlinux" kernel, is this the correct one to use?) via tftp using Planetcore Bootloader version 1.01. I load it into a reasonable location in the RAM(I've tried many). I am then able to dump the contents of memory using the bootloader and see that the kernel has in fact been loaded into RAM. Now, when I make the jump into the code one of two things happens: If I jump to an address 0x1 above where I loaded the code (I was told I needed to do this to get around the elf header) then I get no response in my kermit terminal, all the LEDs on the board are off and the only way to recover is to push the reset button on the board. If I jump to any other address(I've tried many) the board resets itself immediately and the bootloader begins running again. Am I just jumping to the wrong address or do you think I'm building the kernel improperly or is there something else I'm missing? Thanks Phill Treddenick Quoting Philip.Lougher at Zarlink.Com: > > Hi, > > Philip Treddenick wrote: > > >Any help or insight is appreciated. > > I'd like to help, but you don't give enough information to do so... > > >but when I run the kernel it appears to hang. I would like > >to know if there is a way to verify what it's doing? I've tried rlogin > and I've > >tried pinging it, but I don't get any response. The kernel is setup to > mount a > >NFS, but I don't know how to verify that that is working either. I tried > >enabling the ethernet port by setting the board control and status > registers. > >That didn't seem to work. > > What does 'it appears to hang' mean? Normally, when the kernel is entered > from the boot loader, and starts to boot-up, you will see a lot of kernel > booting messages on the serial port. If you don't see these, then the > kernel is not booting. In this case, there isn't any point in trying to > talk to the board via the ethernet, as it's not running anything. > > If you are seeing bootup messages, then what is the output? Normally, when > the kernel boots up it expects to mount the root from hard disk or an > initrd, and have the ethernet IP address setup after mounting the root. > However, if you're mounting the root via NFS (which is what is appears > you're doing), then the IP address has to be set before mounting the root. > To do this, the kernel has a configure option, that makes the kernel > automatically obtain an IP address via DHCP or BOOTP. Do you have that > option set? (its in submenu Networking options, called IP: kernel level > autoconfiguation). If you do, then you should check that your DHCP/BOOTP > server is getting a request, and is answering the board. If you don't, the > kernel is probably giving up trying to mount the root. In both cases, the > bootup messages will be pretty useful. > > Phillip > > > > > > > > Phillip.Treddenick at colorado.edu > > Sent by: To: > linuxppc-embedded at lists.linuxppc.org > owner-linuxppc-embedded at lists.lcc: > > inuxppc.orgSubject: Hung > kernel on EP405? > > > > > 16-Feb-2003 07:37 AM > > > > > > > > > > > I am having trouble running Monta Vista Hardhat Linux 2.0 on an Embedded Planet EP405 board rev 1.2 > with > Solaris 2.7 as the host. I'm using the Planetcore bootloader to download > the > kernel to the board, but when I run the kernel it appears to hang. I would > like > to know if there is a way to verify what it's doing? I've tried rlogin and > I've > tried pinging it, but I don't get any response. The kernel is setup to > mount a > NFS, but I don't know how to verify that that is working either. I tried > enabling the ethernet port by setting the board control and status > registers. > That didn't seem to work. Do these registers have specific settings > necessary > for running the EP405 board? > > Any help or insight is appreciated. > Thanks, Phill Treddenick > treddeni at colorado.edu > > > > > > > treddeni at colorado.edu 303 818-7694 - End forwarded message - Phill Treddenick treddeni at colorado.edu 303 818-7694 ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
cpu speed
Dear all, I 've a MPC8260 board with 2.4.18 kernel version and nfs root fs . First I have configurated it with cpu_clock = 133 MHz, cpm_clock = 100 MHz and bus_clock = 33 Mhz with good results. Then I have changed this configuration with cpu_clock = 166 MHz, cpm_clock = 100 MHz and bus_clock = 33 Mhz with bad results. With cpu clock at 166 Mhz I have several error but typically "Illegal istruction " error message is send on the console. I have checked the bus timing (memory read/write access) with no difference rispect to cpu_clock at 133 MHz. Can be a cache problem ? Tanks to all, Alessandro. ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Possible bug in flush_dcache_all on 440GP
This comment is from Thomas Sartorius, Eugene is correct about the "generic" way requiring that you load twice as many memory locations as would fit in the cache, in order to guarantee that any previous "dirty" contents get written to memory and removed from the cache. Note that his second suggestion regarding dccci requires that the processor be in supervisor mode, and assumes that there is no dirty data left in the cache at the time of the dccci (or else one doesn't care about causing such dirty data to be written back to memory). An alternative (and likely faster) method is to use a series of dcbz instructions (as many as there are lines in the cache) to a series of "safe" addresses for which it is known that the cache does not currently contain dirty data, and then use dccci at the end to eliminate this dirty data without causing any of it to be written back to memory. This technique should be much faster as it avoids having to actually read any memory locations into the cache. Another alternative is to use a loop that does a series of dcread/dcbf instructions, where the information that is read into the GPR by the dcread is then used by the dcbf to cause that line to be cast-out and invalidated. Depending on the possible state of the cache, it might be necessary to test the valid bit read by the dcread before trying to use the value for the dcbf, to avoid any MMU exceptions. One thing to note with regards to any of the techniques: you probably need to guarantee that interrupts do not occur during the sequence to make sure that the cache is cleanly flushed when the routine is finished. One more thing to note with regards to any of the techniques: you need to concern yourself with possible MMU exceptions during the sequence. One last thing to note: if you're using any of the techniques other than the dcread/dcbf sequence, then you need to concern yourself with the "victim limit" values, and whether or not the cache has been partitioned into "normal". "transient", and "locked" regions. The techniques described all presume that "normal" storage access operations will cause the "victim index" value to walk through all the values from 0 to 63, but if the cache has been partitioned, this will not be the case. In the end, I would suggest that the "safest", most robust technique is to use the dcread/dcbf sequence loop, with proper testing of the dcread result (e.g., for a valid bit) before executing the dcbf, and with proper MMU setup ahead of time to make sure you don't get MMU exceptions during the sequence. One last thing: Eugene suggests that "40x" processors have 32-byte cache lines, but that is not the case for the 403 and 401 (they have 16-byte cache lines). Segher Boessenkool @lists.linuxppc.org on 02/26/2003 10:39:05 AM Sent by:owner-linuxppc-embedded at lists.linuxppc.org To:Eugene Surovegin cc:linuxppc-embedded at lists.linuxppc.org Subject:Re: Possible bug in flush_dcache_all on 440GP Eugene Surovegin wrote: > I believe there is a bug in flush_dcache_all implementation for not cache > coherent processors. > > This function uses simple algorithm to force dcache flush by reading > "enough" data to completely reload the cache: ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Question about modules
I'm trying to write a simple module for an 8xx board using the SMC2. Everything works, till I try to insmod it: I get m8xx_cpm_alloc and m8xx_cpm_hostalloc as unresolved symbols. I think that arch/ppc/8xx_io/commproc.c is properly compiled (I can see both symbols on vmlinux), but somehow the build process strips them off as they are unused (i cannot see them in /proc/ksyms in the target). Is that right? Any clue to solve it? (having them in the target kernel without modifying the original sources) Many regards. ibon -- Ibon Gotxi Garcia ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Good Books
In message <3E5EB5CE.4090509 at corelis.com> you wrote: > > I am looking for reference books which are related to PPC 440GP or/and > embedded PPC or/and Linux on PPC. Do you have any suggestion? There is an excellent (IMHO) book to be available soon (couple of weeks?): Karim Yaghmour: Building Embedded Linux Systems - Tools and Resources. O'Reilly, ISBN 059600222X Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-4596-87 Fax: (+49)-8142-4596-88 Email: wd at denx.de The shortest unit of time in the multiverse is the News York Second, defined as the period of time between the traffic lights turning green and the cab behind you honking. - Terry Pratchett, _Lords and Ladies_ ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Question about modules
Hi What abt System.map... Can u check if symbols are there. Bye Bhupi --- Ibon Gotxi Garcia wrote: > > I'm trying to write a simple module for an 8xx board > using the SMC2. > Everything works, till I try to insmod it: I get > m8xx_cpm_alloc and > m8xx_cpm_hostalloc as unresolved symbols. > > I think that arch/ppc/8xx_io/commproc.c is properly > compiled (I can see > both symbols on vmlinux), but somehow the build > process strips them off > as they are unused (i cannot see them in /proc/ksyms > in the target). Is > that right? Any clue to solve it? (having them in > the target kernel > without modifying the original sources) > > Many regards. > ibon > > -- > Ibon Gotxi Garcia > > ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Good Books
I highly recommend this book. -Original Message- From: Dr. Craig Hollabaugh [mailto:[EMAIL PROTECTED] Sent: Thursday, February 27, 2003 9:24 PM To: john at corelis.com; linuxppc-embedded at lists.linuxppc.org Subject: Re: Good Books At 05:05 PM 2/27/2003 -0800, John Chan wrote: > >Hello, Folks, > >I am looking for reference books which are related to PPC 440GP or/and >embedded PPC or/and Linux on PPC. Do you have any suggestion? John, My book, Embedded Linux: Hardware, Software and Interfacing, uses a PPC860 (Embedded Planet RPX-CLLF) in numerous interfacing examples. This might help with general PPC issues, not specifically the 440 though. Craig ___ Dr. Craig Hollabaugh craig at hollabaugh.com Author of Embedded Linux P.O. Box 1405 Ouray, CO 81427-1405See my "kitchen sink" resume at 970 325 4810 homewww.hollabaugh.com/resume.html 970 325 0509 office ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
8250 IDMA TX Problems
Hi, After searching the archives I still have a few basic questions. I am using an 8250 Hip 4 Rev A. Linux kernel 2.4.19 with a few patches. I am trying to get IDMA working to transfer data between the 60x system memory and a device on the local bus. I am using DREQ and nDACK for TX, RX will come later. When I send a start command for IDMA3 to the CPM my serial port locks up. I have Initialized all the IDMA registers and loaded up 1 buffer descriptor with the LAST and WRAP bits set. Using a BDI 2000 debugger I can access the 60x bus and it seems to be working. The error registers of the CPM also don't show any info. The nDACK signal never asserts either and data does not seem to be written into the DPM transfer buffer. I checked DREQ and it is asserting though I am usually locked up before this event. Some info: RCCR = DR3M - DREQ 3 is level sensitive DR3QP - DREQ has lowest priority than the comm. controllers DCM =FB - Dual address mode DMA_WRAP - size of IDMA 3 transfer buffer = 2048 bytes SINC - source addr increment ERM - External Request Mode CP responds to DREQ S/D - Read from memory, write to peripheral 1. Has anyone used IDMA on an 8250? The 8250 and the 8260 are supposedly the same die so this functionality should be there, so I was told. 2. Has anyone managed to get IDMA working between 60x memory and a peripheral on the Local Bus using DPM for : a. BDs ? b. IDMAx Parameter Ram ? 3. Should I switch to local bus ram for BDs? 4. Should I use local bus ram for the data buffers? 5. For a write transaction I am using the following values : SS_MAX = 2048-32; STS = 2048-32; DTS = 4;// The peripheral port is 32 bits. 2048 is the largest packet I will ever transfer. Do these values look ok? Thanks for the help, John Penn ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Serial Console disable/enable dynamically
Hi I have an custom board which has PPC 440GP as its processor. I have build a kernel image and ramdisk to run on the custom board, which is running fine.There is only one serial port in the board. This serial port is used as the serial console. I wanted to disable and enable the serial console dynamically, whenever the serial console is disabled , I want to use the serial port for other purposes. Can anybody suggest how to disable and enable dynamically?. Thanking you in advance Regards Aman ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
