[PATCH 0/6] [RFC] Change MPC52xx to platform bus / ppc_sys model
Hi all, This series of patch changes all the MPC52xx related code to use platform bus and ppc_sys instead of OCP. It's divided in several patches that represents steps in the conversion. However the intermediate states might not be functionnal. This is the first try, comments and suggestions are welcomed. Sylvain
[PATCH 1/6] ppc32: Remove unnecessary test in MPC52xx reset code
ppc32: Remove unnecessary test in MPC52xx reset code
That test is part of an old version of the code and
erroneously made it to mainstream.
Signed-off-by: Sylvain Munaut tnt at 246tNt.com
---
diff -Nru a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c
--- a/arch/ppc/syslib/mpc52xx_setup.c 2005-03-21 20:09:24 +01:00
+++ b/arch/ppc/syslib/mpc52xx_setup.c 2005-03-21 20:09:24 +01:00
@@ -46,11 +46,8 @@
/* Turn on the watchdog and wait for it to expire. It effectively
does a reset */
- if (gpt0 != NULL) {
- out_be32(gpt0-count, 0x00ff);
- out_be32(gpt0-mode, 0x9004);
- } else
- printk(KERN_ERR mpc52xx_restart: Unable to ioremap GPT0
registers, - looping ...);
+ out_be32(gpt0-count, 0x00ff);
+ out_be32(gpt0-mode, 0x9004);
while (1);
}
[PATCH 2/6] ppc32: Remove the OCP system from the Freescale MPC52xx support
ppc32: Remove the OCP system from the Freescale MPC52xx support
We remove all usage of the OCP system as preparation to switch
to the platform bus model / ppc_sys model.
This is only for 'generic' support, drivers are adapted separatly,
afterwards.
Signed-off-by: Sylvain Munaut tnt at 246tNt.com
---
diff -Nru a/arch/ppc/Kconfig b/arch/ppc/Kconfig
--- a/arch/ppc/Kconfig 2005-03-21 20:09:47 +01:00
+++ b/arch/ppc/Kconfig 2005-03-21 20:09:47 +01:00
@@ -822,7 +822,7 @@
config FSL_OCP
bool
- depends on MPC10X_BRIDGE || PPC_MPC52xx
+ depends on MPC10X_BRIDGE
default y
config MPC10X_OPENPIC
diff -Nru a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
--- a/arch/ppc/platforms/Makefile 2005-03-21 20:09:47 +01:00
+++ b/arch/ppc/platforms/Makefile 2005-03-21 20:09:47 +01:00
@@ -45,7 +45,7 @@
obj-$(CONFIG_SANDPOINT)+= sandpoint.o
obj-$(CONFIG_SBC82xx) += sbc82xx.o
obj-$(CONFIG_SPRUCE) += spruce.o
-obj-$(CONFIG_LITE5200) += lite5200.o mpc5200.o
+obj-$(CONFIG_LITE5200) += lite5200.o
ifeq ($(CONFIG_SMP),y)
obj-$(CONFIG_PPC_PMAC) += pmac_smp.o
diff -Nru a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
--- a/arch/ppc/platforms/lite5200.c 2005-03-21 20:09:47 +01:00
+++ b/arch/ppc/platforms/lite5200.c 2005-03-21 20:09:47 +01:00
@@ -13,7 +13,7 @@
* Dale Farnsworth dale.farnsworth at mvista.com and
* Wolfgang Denk wd at denx.de
*
- * Copyright 2004 Sylvain Munaut tnt at 246tNt.com
+ * Copyright 2004-2005 Sylvain Munaut tnt at 246tNt.com
* Copyright 2003 Motorola Inc.
* Copyright 2003 MontaVista Software Inc.
* Copyright 2003 DENX Software Engineering (wd at denx.de)
@@ -29,10 +29,10 @@
#include linux/kdev_t.h
#include linux/root_dev.h
#include linux/console.h
+#include linux/module.h
#include asm/bootinfo.h
#include asm/io.h
-#include asm/ocp.h
#include asm/mpc52xx.h
#include syslib/mpc52xx_pci.h
@@ -46,31 +46,6 @@
/* */
-/* OCP device definition*/
-/* For board/shared resources like PSCs */
-/* */
-/* Be sure not to load conficting devices : e.g. loading the UART drivers for
- * PSC1 and then also loading a AC97 for this same PSC.
- * For details about how to create an entry, look in the doc of the concerned
- * driver ( eg drivers/serial/mpc52xx_uart.c for the PSC in uart mode )
- */
-
-static struct ocp_def board_ocp[] = {
- {
- .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_PSC_UART,
- .index = 0,
- .paddr = MPC52xx_PSC1,
- .irq= MPC52xx_PSC1_IRQ,
- .pm = OCP_CPM_NA,
- },
- { /* Terminating entry */
- .vendor = OCP_VENDOR_INVALID
- }
-};
-
-
-/* */
/* Platform specific code */
/* */
@@ -131,9 +106,6 @@
static void __init
lite5200_setup_arch(void)
{
- /* Add board OCP definitions */
- mpc52xx_add_board_devices(board_ocp);
-
/* CPU Port mux setup */
lite5200_setup_cpu();
diff -Nru a/arch/ppc/platforms/mpc5200.c b/arch/ppc/platforms/mpc5200.c
--- a/arch/ppc/platforms/mpc5200.c 2005-03-21 20:09:47 +01:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,53 +0,0 @@
-/*
- * arch/ppc/platforms/mpc5200.c
- *
- * OCP Definitions for the boards based on MPC5200 processor. Contains
- * definitions for every common peripherals. (Mostly all but PSCs)
- *
- * Maintainer : Sylvain Munaut tnt at 246tNt.com
- *
- * Copyright 2004 Sylvain Munaut tnt at 246tNt.com
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed as is without any warranty of any
- * kind, whether express or implied.
- */
-
-#include asm/ocp.h
-#include asm/mpc52xx.h
-
-
-static struct ocp_fs_i2c_data mpc5200_i2c_def = {
-.flags = FS_I2C_CLOCK_5200,
-};
-
-
-/* Here is the core_ocp struct.
- * With all the devices common to all board. Even if port multiplexing is
- * not setup for them (if the user don't want them, just don't select the
- * config option). The potentially conflicting devices (like PSCs) goes in
- * board specific file.
- */
-struct ocp_def core_ocp[] = {
- {
- .vendor = OCP_VENDOR_FREESCALE,
- .function = OCP_FUNC_IIC,
- .index = 0,
- .paddr = MPC52xx_I2C1,
- .irq= OCP_IRQ_NA, /* MPC52xx_IRQ_I2C1 - Buggy */
- .pm
[PATCH 3/6] ppc32: Change constants style in Freescale MPC52xx related code
ppc32: Change constants style in Freescale MPC52xx related code
This patch changes the way the constants used for register block
address are defined/used. This is a preparation for the use of
the platform bus / ppc_sys model.
Signed-off-by: Sylvain Munaut tnt at 246tNt.com
---
diff -Nru a/arch/ppc/boot/simple/mpc52xx_tty.c
b/arch/ppc/boot/simple/mpc52xx_tty.c
--- a/arch/ppc/boot/simple/mpc52xx_tty.c2005-03-21 20:10:10 +01:00
+++ b/arch/ppc/boot/simple/mpc52xx_tty.c2005-03-21 20:10:10 +01:00
@@ -20,32 +20,31 @@
#include asm/io.h
#include asm/time.h
-#if MPC52xx_PF_CONSOLE_PORT == 0
-#define MPC52xx_CONSOLEMPC52xx_PSC1
-#define MPC52xx_PSC_CONFIG_SHIFT 0
-#elif MPC52xx_PF_CONSOLE_PORT == 1
-#define MPC52xx_CONSOLEMPC52xx_PSC2
-#define MPC52xx_PSC_CONFIG_SHIFT 4
-#elif MPC52xx_PF_CONSOLE_PORT == 2
-#define MPC52xx_CONSOLEMPC52xx_PSC3
-#define MPC52xx_PSC_CONFIG_SHIFT 8
+
+#ifdef MPC52xx_PF_CONSOLE_PORT
+#define MPC52xx_CONSOLE MPC52xx_PSCx_OFFSET(MPC52xx_PF_CONSOLE_PORT)
+#define MPC52xx_PSC_CONFIG_SHIFT ((MPC52xx_PF_CONSOLE_PORT-1)2)
#else
#error MPC52xx_PF_CONSOLE_PORT not defined
#endif
static struct mpc52xx_psc __iomem *psc =
- (struct mpc52xx_psc __iomem *) MPC52xx_CONSOLE;
+ (struct mpc52xx_psc __iomem *) MPC52xx_PA(MPC52xx_CONSOLE);
/* The decrementer counts at the system bus clock frequency
* divided by four. The most accurate time base is connected to the
- * rtc. We read the decrementer change during one rtc tick (one second)
- * and multiply by 4 to get the system bus clock frequency.
+ * rtc. We read the decrementer change during one rtc tick
+ * and multiply by 4 to get the system bus clock frequency. Since a
+ * rtc tick is one seconds, and that's pretty long, we change the rtc
+ * dividers temporarly to set them 64x faster ;)
*/
static int
mpc52xx_ipbfreq(void)
{
- struct mpc52xx_rtc __iomem *rtc = (struct mpc52xx_rtc __iomem
*)MPC52xx_RTC;
- struct mpc52xx_cdm __iomem *cdm = (struct mpc52xx_cdm __iomem
*)MPC52xx_CDM;
+ struct mpc52xx_rtc __iomem *rtc =
+ (struct mpc52xx_rtc __iomem *) MPC52xx_PA(MPC52xx_RTC_OFFSET);
+ struct mpc52xx_cdm __iomem *cdm =
+ (struct mpc52xx_cdm __iomem *) MPC52xx_PA(MPC52xx_CDM_OFFSET);
int current_time, previous_time;
int tbl_start, tbl_end;
int xlbfreq, ipbfreq;
@@ -68,7 +67,8 @@
unsigned long
serial_init(int ignored, void *ignored2)
{
- struct mpc52xx_gpio __iomem *gpio = (struct mpc52xx_gpio __iomem
*)MPC52xx_GPIO;
+ struct mpc52xx_gpio __iomem *gpio =
+ (struct mpc52xx_gpio __iomem *) MPC52xx_PA(MPC52xx_GPIO_OFFSET);
int divisor;
int mode1;
int mode2;
diff -Nru a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
--- a/arch/ppc/platforms/lite5200.c 2005-03-21 20:10:10 +01:00
+++ b/arch/ppc/platforms/lite5200.c 2005-03-21 20:10:10 +01:00
@@ -73,8 +73,8 @@
u32 intr_ctrl;
/* Map zones */
- xlb = ioremap(MPC52xx_XLB,sizeof(struct mpc52xx_xlb));
- intr = ioremap(MPC52xx_INTR,sizeof(struct mpc52xx_intr));
+ xlb = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE);
+ intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
if (!xlb || !intr) {
printk(lite5200.c: Error while mapping XLB/INTR during
diff -Nru a/arch/ppc/platforms/lite5200.h b/arch/ppc/platforms/lite5200.h
--- a/arch/ppc/platforms/lite5200.h 2005-03-21 20:10:10 +01:00
+++ b/arch/ppc/platforms/lite5200.h 2005-03-21 20:10:10 +01:00
@@ -17,7 +17,7 @@
#define __PLATFORMS_LITE5200_H__
/* Serial port used for low-level debug */
-#define MPC52xx_PF_CONSOLE_PORT 0 /* PSC1 */
+#define MPC52xx_PF_CONSOLE_PORT 1 /* PSC1 */
#endif /* __PLATFORMS_LITE5200_H__ */
diff -Nru a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c
--- a/arch/ppc/syslib/mpc52xx_pci.c 2005-03-21 20:10:10 +01:00
+++ b/arch/ppc/syslib/mpc52xx_pci.c 2005-03-21 20:10:10 +01:00
@@ -183,7 +183,7 @@
pci_assign_all_busses = 1;
- pci_regs = ioremap(MPC52xx_PCI, sizeof(struct mpc52xx_pci));
+ pci_regs = ioremap(MPC52xx_PA(MPC52xx_PCI_OFFSET), MPC52xx_PCI_SIZE);
if (!pci_regs)
return;
diff -Nru a/arch/ppc/syslib/mpc52xx_pic.c b/arch/ppc/syslib/mpc52xx_pic.c
--- a/arch/ppc/syslib/mpc52xx_pic.c 2005-03-21 20:10:10 +01:00
+++ b/arch/ppc/syslib/mpc52xx_pic.c 2005-03-21 20:10:10 +01:00
@@ -180,8 +180,8 @@
u32 intr_ctrl;
/* Remap the necessary zones */
- intr = ioremap(MPC52xx_INTR, sizeof(struct mpc52xx_intr));
- sdma = ioremap(MPC52xx_SDMA, sizeof(struct mpc52xx_sdma));
+ intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
+ sdma = ioremap(MPC52xx_PA(MPC52xx_SDMA_OFFSET), MPC52xx_SDMA_SIZE);
if ((intr==NULL) || (sdma==NULL))
[PATCH 4/6] ppc32: Add platform bus / ppc_sys model to Freescale MPC52xx
ppc32: Add platform bus / ppc_sys model to Freescale MPC52xx
This patch makes all platform based around the Freescale MPC52xx use
the platform bus and more precisly the ppc_sys model put in
place by Kumar Gala.
Signed-off-by: Sylvain Munaut tnt at 246tNt.com
---
diff -Nru a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
--- a/arch/ppc/platforms/lite5200.c 2005-03-21 20:10:34 +01:00
+++ b/arch/ppc/platforms/lite5200.c 2005-03-21 20:10:34 +01:00
@@ -34,6 +34,7 @@
#include asm/bootinfo.h
#include asm/io.h
#include asm/mpc52xx.h
+#include asm/ppc_sys.h
#include syslib/mpc52xx_pci.h
@@ -49,6 +50,17 @@
/* Platform specific code */
/* */
+/* Supported PSC function in preference order */
+struct mpc52xx_psc_func mpc52xx_psc_functions[] = {
+ { .id = 0,
+ .func = uart,
+ },
+ { .id = -1, /* End entry */
+ .func = NULL,
+ }
+ };
+
+
static int
lite5200_show_cpuinfo(struct seq_file *m)
{
@@ -147,6 +159,9 @@
strcpy(cmd_line, (char *)(r6+KERNELBASE));
}
}
+
+ /* PPC Sys identification */
+ identify_ppc_sys_by_id(mfspr(SPRN_SVR));
/* BAT setup */
mpc52xx_set_bat();
diff -Nru a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
--- a/arch/ppc/syslib/Makefile 2005-03-21 20:10:34 +01:00
+++ b/arch/ppc/syslib/Makefile 2005-03-21 20:10:34 +01:00
@@ -106,7 +106,8 @@
obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o
endif
obj-$(CONFIG_MPC8555_CDS) += todc_time.o
-obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o
+obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o \
+ mpc52xx_sys.o mpc52xx_devices.o
ppc_sys.o
ifeq ($(CONFIG_PPC_MPC52xx),y)
obj-$(CONFIG_PCI) += mpc52xx_pci.o
endif
diff -Nru a/arch/ppc/syslib/mpc52xx_devices.c
b/arch/ppc/syslib/mpc52xx_devices.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/syslib/mpc52xx_devices.c 2005-03-21 20:10:34 +01:00
@@ -0,0 +1,333 @@
+/*
+ * arch/ppc/syslib/mpc52xx_devices.c
+ *
+ * Freescale MPC52xx device descriptions
+ *
+ *
+ * Maintainer : Sylvain Munaut tnt at 246tNt.com
+ *
+ * Copyright (C) 2005 Sylvain Munaut tnt at 246tNt.com
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include linux/fsl_devices.h
+#include linux/resource.h
+#include asm/mpc52xx.h
+#include asm/ppc_sys.h
+
+
+static u64 mpc52xx_dma_mask = 0xULL;
+
+static struct fsl_i2c_platform_data mpc52xx_fsl_i2c_pdata = {
+ .device_flags = FSL_I2C_DEV_CLOCK_5200,
+};
+
+
+/* We use relative offsets for IORESOURCE_MEM to be independent from the
+ * MBAR location at compile time
+ */
+
+/* TODO Add the BestComm initiator channel to the device definitions,
+ possibly using IORESOURCE_DMA. But that's when BestComm is ready ... */
+
+struct platform_device ppc_sys_platform_devices[] = {
+ [MPC52xx_MSCAN1] = {
+ .name = mpc52xx-mscan,
+ .id = 0,
+ .num_resources = 2,
+ .resource = (struct resource[]) {
+ {
+ .start = MPC52xx_MSCAN1_OFFSET,
+ .end= MPC52xx_MSCAN1_OFFSET +
+ MPC52xx_MSCAN_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MPC52xx_MSCAN1_IRQ,
+ .end= MPC52xx_MSCAN1_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ },
+ [MPC52xx_MSCAN2] = {
+ .name = mpc52xx-mscan,
+ .id = 1,
+ .num_resources = 2,
+ .resource = (struct resource[]) {
+ {
+ .start = MPC52xx_MSCAN2_OFFSET,
+ .end= MPC52xx_MSCAN2_OFFSET +
+ MPC52xx_MSCAN_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MPC52xx_MSCAN2_IRQ,
+ .end= MPC52xx_MSCAN2_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ },
+ [MPC52xx_SPI] = {
+ .name = mpc52xx-spi,
+ .id = -1,
+ .num_resources = 3,
+
[PATCH 5/6] serial: Update mpc52xx_uart.c to use platform bus
serial: Update mpc52xx_uart.c to use platform bus
All Freescale MPC52xx related code now use new constants and
the platform bus for it's driver. This patch makes this driver
make use of that.
Signed-off-by: Sylvain Munaut tnt at 246tNt.com
---
diff -Nru a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
--- a/drivers/serial/mpc52xx_uart.c 2005-03-21 20:11:00 +01:00
+++ b/drivers/serial/mpc52xx_uart.c 2005-03-21 20:11:00 +01:00
@@ -18,7 +18,7 @@
* Some of the code has been inspired/copied from the 2.4 code written
* by Dale Farnsworth dfarnsworth at mvista.com.
*
- * Copyright (C) 2004 Sylvain Munaut tnt at 246tNt.com
+ * Copyright (C) 2004-2005 Sylvain Munaut tnt at 246tNt.com
* Copyright (C) 2003 MontaVista, Software, Inc.
*
* This file is licensed under the terms of the GNU General Public License
@@ -26,33 +26,26 @@
* kind, whether express or implied.
*/
-/* OCP Usage :
+/* Platform device Usage :
*
- * This drivers uses the OCP model. To load the serial driver for one of the
- * PSCs, just add this to the core_ocp table :
+ * Since PSCs can have multiple function, the correct driver for each one
+ * is selected by calling mpc52xx_match_psc_function(...). The function
+ * handled by this driver is uart.
*
- * {
- * .vendor = OCP_VENDOR_FREESCALE,
- * .function = OCP_FUNC_PSC_UART,
- * .index = 0,
- * .paddr = MPC52xx_PSC1,
- * .irq= MPC52xx_PSC1_IRQ,
- * .pm = OCP_CPM_NA,
- * },
- *
- * This is for PSC1, replace the paddr and irq according to the PSC you want to
- * use. The driver all necessary registers to place the PSC in uart mode
without
+ * The driver init all necessary registers to place the PSC in uart mode
without
* DCD. However, the pin multiplexing aren't changed and should be set either
* by the bootloader or in the platform init code.
- * The index field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for
PSC2,
+ *
+ * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
* and so on). So the PSC1 is mapped to /dev/ttyS0, PSC2 to /dev/ttyS1 and so
* on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly for
* the console code : without this 1:1 mapping, at early boot time, when we are
* parsing the kernel args console=ttyS?, we wouldn't know wich PSC it will be
- * mapped to because OCP stuff is not yet initialized.
+ * mapped to.
*/
#include linux/config.h
+#include linux/device.h
#include linux/module.h
#include linux/tty.h
#include linux/serial.h
@@ -61,7 +54,6 @@
#include asm/delay.h
#include asm/io.h
-#include asm/ocp.h
#include asm/mpc52xx.h
#include asm/mpc52xx_psc.h
@@ -191,6 +183,13 @@
mpc52xx_uart_startup(struct uart_port *port)
{
struct mpc52xx_psc __iomem *psc = PSC(port);
+ int ret;
+
+ /* Request IRQ */
+ ret = request_irq(port-irq, mpc52xx_uart_int,
+ SA_INTERRUPT | SA_SAMPLE_RANDOM, mpc52xx_psc_uart, port);
+ if (ret)
+ return ret;
/* Reset/activate the port, clear and enable interrupts */
out_8(psc-command,MPC52xx_PSC_RST_RX);
@@ -225,6 +224,9 @@
port-read_status_mask = 0;
out_be16(psc-mpc52xx_psc_imr,port-read_status_mask);
+
+ /* Release interrupt */
+ free_irq(port-irq, port);
}
static void
@@ -326,15 +328,21 @@
iounmap(port-membase);
port-membase = NULL;
}
+
+ release_mem_region(port-mapbase, MPC52xx_PSC_SIZE);
}
static int
mpc52xx_uart_request_port(struct uart_port *port)
{
if (port-flags UPF_IOREMAP) /* Need to remap ? */
- port-membase = ioremap(port-mapbase, sizeof(struct
mpc52xx_psc));
-
- return port-membase != NULL ? 0 : -EBUSY;
+ port-membase = ioremap(port-mapbase, MPC52xx_PSC_SIZE);
+
+ if (!port-membase)
+ return -EINVAL;
+
+ return request_mem_region(port-mapbase, MPC52xx_PSC_SIZE,
+ mpc52xx_psc_uart) != NULL ? 0 : -EBUSY;
}
static void
@@ -354,7 +362,7 @@
if ( (ser-irq != port-irq) ||
(ser-io_type != SERIAL_IO_MEM) ||
(ser-baud_base != port-uartclk) ||
-// FIXME Should check addresses/irq as well ?
+(ser-iomem_base != (void*)port-mapbase) ||
(ser-hub6 != 0 ) )
return -EINVAL;
@@ -630,7 +638,7 @@
{
struct uart_port *port = mpc52xx_uart_ports[co-index];
- int baud = 9600;
+ int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
int bits = 8;
int parity = 'n';
int flow = 'n';
@@ -643,14 +651,12 @@
spin_lock_init(port-lock);
port-uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
port-ops = mpc52xx_uart_ops;
- port-mapbase = MPC52xx_PSCx(co-index);
+ port-mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co-index+1));
[PATCH 6/6] ppc32: Adds necessary cpu init to use USB on LITE5200 Platform
ppc32: Adds necessary cpu init to use USB on LITE5200 Platform
To use external peripheral on MPC5200, some clocking registers
and port-muxing must be done. Since this is platform specific,
it's placed the platform support file. This particular patch
is for USB support on the LITE5200.
Signed-off-by: Sylvain Munaut tnt at 246tNt.com
---
diff -Nru a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
--- a/arch/ppc/platforms/lite5200.c 2005-03-21 20:11:23 +01:00
+++ b/arch/ppc/platforms/lite5200.c 2005-03-21 20:11:23 +01:00
@@ -79,21 +79,47 @@
static void __init
lite5200_setup_cpu(void)
{
+ struct mpc52xx_cdm __iomem *cdm;
+ struct mpc52xx_gpio __iomem *gpio;
struct mpc52xx_intr __iomem *intr;
struct mpc52xx_xlb __iomem *xlb;
+ u32 port_config;
u32 intr_ctrl;
/* Map zones */
+ cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
+ gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
xlb = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE);
intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
- if (!xlb || !intr) {
- printk(lite5200.c: Error while mapping XLB/INTR during
+ if (!cdm || !gpio || !xlb || !intr) {
+ printk(lite5200.c: Error while mapping CDM/GPIO/XLB/INTR
during
lite5200_setup_cpu\n);
goto unmap_regs;
}
+ /* Use internal 48 Mhz */
+ out_8(cdm-ext_48mhz_en, 0x00);
+ out_8(cdm-fd_enable, 0x01);
+ if (in_be32(cdm-rstcfg) 0x40) /* Assumes 33Mhz clock */
+ out_be16(cdm-fd_counters, 0x0001);
+ else
+ out_be16(cdm-fd_counters, 0x);
+
+ /* Get port mux config */
+ port_config = in_be32(gpio-port_config);
+
+ /* 48Mhz internal, pin is GPIO */
+ port_config = ~0x0080;
+
+ /* USB port */
+ port_config = ~0x7000; /* Differential mode - USB1 only */
+ port_config |= 0x1000;
+
+ /* Commit port config */
+ out_be32(gpio-port_config, port_config);
+
/* Configure the XLB Arbiter */
out_be32(xlb-master_pri_enable, 0xff);
out_be32(xlb-master_priority, 0x);
@@ -111,6 +137,8 @@
/* Unmap reg zone */
unmap_regs:
+ if (cdm) iounmap(cdm);
+ if (gpio) iounmap(gpio);
if (xlb) iounmap(xlb);
if (intr) iounmap(intr);
}
@@ -171,7 +199,11 @@
isa_mem_base= 0;
/* Powersave */
- powersave_nap = 1; /* We allow this platform to NAP */
+ /* This is provided as an example on how to do it. But you
+ need to be aware that NAP disable bus snoop and that may
+ be required for some devices to work properly, like USB ... */
+ /* powersave_nap = 1; */
+
/* Setup the ppc_md struct */
ppc_md.setup_arch = lite5200_setup_arch;
Need help.
Hi everybody, Could any one suggest the toolchain and kernel versions that are compatible with the MPC7448 processor ( It's a motorola processor based on power PC architecture ). Is there any site from where we can download the precompiled binaries for the same processor. With Regards Thanks, A.Naveen Kumar, Design Engineer, Mistral Software Pvt Ltd. -- next part -- An HTML attachment was scrubbed... URL: http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/bbf5f84f/attachment.htm
[PATCH 0/6] [RFC] Change MPC52xx to platform bus / ppc_sys model
Hi Kumar, Kumar Gala wrote: Took a quick glance at the patches and they look good. Do you have a bk tree available with all these changes in them? I think a might have a few minor comments, but might be easier to see the bk tree. Sure, bk://tnt.bkbits.net/linux-2.5-mpc52xx-pending The only difference between that tree and the patch is a few trailing white space that are in BK but not in the patch. Note that now, I should also add CONFIG_PPC_MPC52xx to the change of /proc/cpuinfo. What about a CONFIG_PPC_SYS that would include ppc_sys.o in the kernel and activate the /proc/cpuinfo chipset line ? Sylvain
Help Regarding DEVFS
Hi, I faced a problem when i was doing Netboot on linux 2.4.29 on IBM PowerPC 4xx Processor. I am using filesystem develped for 2.4.18. Can anyone help me to sort out the problem. * IP-Config: Got BOOTP answer from 192.168.48.143, my address is 192.168.48.3 eth0:smc_set_multicast_list LAN91C111:smc_setmulticast IP-Config: Complete: device=eth0, addr=192.168.48.3, mask=255.255.255.0, gw=255.255.255.255, host=192.168.48.3, domain=mylinux.org, nis-domain=macindia.org, bootserver=192.168.48.143, rootserver=192.168.48.143, rootpath=/stb arp_tables: (C) 2002 David S. Miller NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. Looking up port of RPC 13/2 on 192.168.48.143 Looking up port of RPC 15/1 on 192.168.48.143 nfs: server 192.168.48.143 not responding, still trying nfs: server 192.168.48.143 OK VFS: Mounted root (nfs filesystem). Freeing unused kernel memory: 80k init Warning: unable to open an initial console. Kernel panic: No init found. Try passing init= option to kernel. 0Rebooting in 180 seconds.. *** -- Thanks and Regards, Vijesh V H
Linux 2.6.x on 8xx status
On Mon, Mar 21, 2005 at 04:45:21PM -0500, Guillaume Autran wrote: Hi, Was there any progress made about this issue or is it still pending ? That one is still pending. There are other issues in 8xx which are probably related to it, as follows. I'm running 2.6.11 and still see the problem... I'm currently trying to understand 8xx cache structure and VM semantics to find out why I'm seeing the following numbers. Test application is: copy 16M from /dev/zero to file-on-RAMDISK, using: # dd if=/dev/zero of=file bs=4k count=3840 v2.6: I-TLB userspace misses: 141264 I-TLB kernel misses: 117455 D-TLB userspace misses: 217590 D-TLB kernel misses: 202677 tlbie: 260 I-TLB userspace misses: 143455 I-TLB kernel misses: 119189 D-TLB userspace misses: 212828 D-TLB kernel misses: 197883 tlbie: 260 I-TLB userspace misses: 142248 I-TLB kernel misses: 118195 D-TLB userspace misses: 217576 D-TLB kernel misses: 202663 tlbie: 260 v2.4: I-TLB userspace misses: 266 I-TLB kernel misses: 5170 D-TLB userspace misses: 3661 D-TLB kernel misses: 177004 tlbie: 162599 I-TLB userspace misses: 266 I-TLB kernel misses: 3183 D-TLB userspace misses: 2024 D-TLB kernel misses: 180178 tlbie: 165675 I'm quite puzzled. Why v2.6 calls the tlbie instruction 100-or-so less times than v2.4 ? Paul, Ben? Regards, Guillaume. Marcelo Tosatti wrote: On Thu, Feb 10, 2005 at 03:06:58PM -0200, Marcelo Tosatti wrote: On Thu, Feb 10, 2005 at 02:26:52PM -0500, Dan Malek wrote: On Feb 10, 2005, at 10:04 AM, Marcelo Tosatti wrote: Does anyone have a clue of what is/can be wrong with the TLB entry for the address being flushed at __flush_dcache_icache()? Not sure. The problem is that the __flush_dcache_icache is passed a user space virtual address that doesn't look like it is mapped for writing or something. I don't know, as an ooops isn't sufficient to debug the problem. You have to catch it here and track down the current state of the TLB and the page tables. Of course, when I do this everything looks OK, How do you do track down the current TLB state? With a BDI? so what I've been trying to do is catch the TLBmiss reload that actually causes this to happen to see what it really tried to load into the tlb. Shouldnt it be loading the TLB entry which seem to be OK accordingly to your analysis ?? So this assumption which you have made sometime ago is wrong, given that now you know TLB entry is not stale ? The symptom is we appear to have a stale TLB entry, so at least one of the callouts from the generic VM code isn't doing the right thing for us. I'm still puzzled as to why it doesn't affect other PPC processor. ___ Linuxppc-embedded mailing list Linuxppc-embedded at ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded -- === Guillaume Autran Senior Software Engineer MRV Communications, Inc. Tel: (978) 952-4932 office E-mail: gautran at mrv.com ===
[PATCH] CPM2 cleanups
This patch cleans up CPM2 interrupt controller usage in the mpc8260/mpc8560, and adds the cpm_cp_command() convenience function. -- Jason McMullan jason.mcmullan at timesys.com TimeSys Corporation -- next part -- A non-text attachment was scrubbed... Name: cpu-ppc-cpm2.patch Type: text/x-patch Size: 11744 bytes Desc: not available Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/4ec5be50/attachment.bin -- next part -- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 189 bytes Desc: This is a digitally signed message part Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/4ec5be50/attachment.pgp
[PATCH] CPM2 I2C (SDMA and Bit-Banger)
This patch adds CPM2 I2C support, both in bit-bang and CPM SDMA modes. Lightly tested, and should be easily ported to the MPC8xx's CPM. -- Jason McMullan jason.mcmullan at timesys.com TimeSys Corporation -- next part -- A non-text attachment was scrubbed... Name: driver-i2c-cpm.patch Type: text/x-patch Size: 24305 bytes Desc: not available Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/81f8ec8d/attachment.bin -- next part -- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 189 bytes Desc: This is a digitally signed message part Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/81f8ec8d/attachment.pgp
Viosoft adds adds Abatron JTAG debug probe, PowerPC to toolsuite
disclaimer: i have no connection with the company above, i just thought some folks might want to know about this. http://linuxdevices.com/news/NS3861500285.html rday
[PATCH] MPC85xx FCC and I2C platform device support
Adds platform support for default FCC mac addresses/phy information, and I2C param info -- Jason McMullan jason.mcmullan at timesys.com TimeSys Corporation -- next part -- A non-text attachment was scrubbed... Name: cpu-ppc-mpc85xx.patch Type: text/x-patch Size: 6370 bytes Desc: not available Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/603aa5f9/attachment.bin -- next part -- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 189 bytes Desc: This is a digitally signed message part Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/603aa5f9/attachment.pgp
[PATCH] MPC85xx CDS - Time Of Day, Cache settings, CPM IRQs
Some minor fixes for: MPC85xx CDS Time of Day Clock /proc/cpuinfo shows cache settings CPM IRQs are allocated more sanely. -- Jason McMullan jason.mcmullan at timesys.com TimeSys Corporation -- next part -- A non-text attachment was scrubbed... Name: board-ppc-mpc85xx-cds.patch Type: text/x-patch Size: 7872 bytes Desc: not available Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/1e7df1f6/attachment.bin -- next part -- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 189 bytes Desc: This is a digitally signed message part Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/1e7df1f6/attachment.pgp
[PATCH] Updated: CPM2 I2C (SDMA and BitBang)
Updated (thanks to a quick eye by ebs) patch to add CPM2 SDMA and BitBang I2C support to the MPC85xx This patch gets rid of some really stupid cut paste errors during initialization. -- Jason McMullan jason.mcmullan at timesys.com TimeSys Corporation -- next part -- A non-text attachment was scrubbed... Name: driver-i2c-cpm.patch Type: text/x-patch Size: 24409 bytes Desc: not available Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/1468ffae/attachment.bin -- next part -- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 189 bytes Desc: This is a digitally signed message part Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050322/1468ffae/attachment.pgp
[PATCH] CPM2 cleanups
In message 523269.2987.58.camel at ad.doubleclick.net you wrote:
...
+static unsigned int cpm2_startup_irq(unsigned int irq)
+{
+ cpm2_unmask_irq(irq);
+ return 0;
+}
+
+static void cpm2_shutdown_irq(unsigned int irq)
+{
+ cpm2_mask_irq(irq);
+}
Why is cpm2_startup_irq() not void like cpm2_shutdown_irq() ?
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Overflow on /dev/null, please empty the bit bucket.
Need help.
While I can specify a place for you to get precompiled binaries for MPC7448, I can suggest grabbing crosstool from: http://www.kegel.com/crosstool/ There is a 7450 config which will work for MPC7448. - kumar On Mar 21, 2005, at 11:15 PM, Naveen Kumar Atmakuri wrote: Hi everybody, ? Could any one suggest the toolchain and kernel versions that are compatible with the MPC7448 processor ( It's a motorola processor based on power PC architecture ). Is there any site from where we can download the precompiled binaries for the same processor. ? With Regards Thanks, A.Naveen Kumar, Design Engineer, Mistral Software Pvt Ltd. ATT92461.txt
Linux 2.6.x on 8xx status
On Mar 22, 2005, at 8:04 AM, Marcelo Tosatti wrote: I'm quite puzzled. Why v2.6 calls the tlbie instruction 100-or-so less times than v2.4 ? Oh my ... I'm more worried about the high number of TLB misses in 2.6 compared to 2.4. That's really bad. How did you instrument the tlbie measurement? It could be that 2.4 used lots more 'tlbia' which were replaced by tlbie in 2.6. Thanks. -- Dan
Linux 2.6.x on 8xx status
On Tue, Mar 22, 2005 at 03:57:08PM -0500, Dan Malek wrote:
On Mar 22, 2005, at 8:04 AM, Marcelo Tosatti wrote:
I'm quite puzzled. Why v2.6 calls the tlbie instruction 100-or-so
less times than v2.4 ?
That was rather a _factor_ of 100-or-so less.
Oh my ... I'm more worried about the high number of TLB misses
in 2.6 compared to 2.4. That's really bad.
Newbie question: What prevents the initial kernel map (tuple of 8Mbyte I/D-TLB
entries)
and the IMMR 8Mbyte D-TLB entry from getting unmapped by translation pressure,
in case CONFIG_PIN_TLB is disabled ?
How did you instrument the tlbie measurement?
By a counter at the end of _tlbie function, similar to other counters which
you suggested.
It could be that 2.4 used lots more 'tlbia' which were replaced by tlbie in
2.6.
Dont think thats the case given that v2.4 calls tlbia through flush_tlb_mm() at
exit_mmap()
only. And at vmalloc_free which shouldnt be called at all.
I just noticed this conditional at switch_mm() (v2.6), which _can_ partly
explain the reduced tlbie's (its just a guess for now, though):
static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
struct task_struct *tsk)
{
#ifdef CONFIG_ALTIVEC
asm volatile (
BEGIN_FTR_SECTION
dssall;\n
#ifndef CONFIG_POWER4
sync;\n /* G4 needs a sync here, G5 apparently not */
#endif
END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
: : );
#endif /* CONFIG_ALTIVEC */
tsk-thread.pgdir = next-pgd;
/* No need to flush userspace segments if the mm doesnt change */
if (prev == next) --
return; --
/* Setup new userspace context */
get_mmu_context(next);
set_context(next-context, next-pgd);
}
I'm about to disable it and retry.
Spent part of the day reading the MMU section of 860 manual, I think I have
kind
of a clue how things are supposed to work at the lowlevel now.
I'll continue tracking it down - any help is appreciated.
PS: I can't reproduce the invalid TLB crash anymore. i.e. even by removing
the _tlbie() at update_mmu_cache() everything is working as expected.
How can I reproduce it again? Guillaume, what kernel version are you using?
Linux 2.6.x on 8xx status
On Mar 22, 2005, at 12:58 PM, Marcelo Tosatti wrote: Newbie question: What prevents the initial kernel map (tuple of 8Mbyte I/D-TLB entries) and the IMMR 8Mbyte D-TLB entry from getting unmapped by translation pressure, in case CONFIG_PIN_TLB is disabled ? Nothing. In fact, they are likely invalidated shortly after the kernel page tables are set up. This was only done to ensure we could get the kernel initialized without taking page faults. By a counter at the end of _tlbie function, similar to other counters which you suggested. OK. Dont think thats the case given that v2.4 calls tlbia through flush_tlb_mm() at exit_mmap() only. And at vmalloc_free which shouldnt be called at all. Hmmm ... Then, the 2.6 looks to be much less efficient with the MMU resources than 2.4 was. This is going to affect everyone, it's just easier to measure on this processor. I just noticed this conditional at switch_mm() (v2.6), which _can_ partly explain the reduced tlbie's (its just a guess for now, though): What is your guess? I don't know how this would reduce the number of tlbie instructions, since stealing a context (as part of get_context()) will simply whack the whole TLB with a tlbia. On 8xx, both instructions could be simply implemented as macros. Spent part of the day reading the MMU section of 860 manual, I think I have kind of a clue how things are supposed to work at the lowlevel now. :-) PS: I can't reproduce the invalid TLB crash anymore. i.e. even by removing the _tlbie() at update_mmu_cache() everything is working as expected. Well, that's interesting. It's likely to only happen on an 860 variant that has the large TLB. How can I reproduce it again? Guillaume, what kernel version are you using? It used to happen on early 2.6 versions as soon as you entered user space programs. -- Dan
[PATCH] MPC85xx CDS - Time Of Day, Cache settings, CPM IRQs
Some feedback on the patches: * I'm not going to accept the printing of caches enabled, etc. If you want to do this add sysfs attributes to the CPU. That is more useful going forward and we dont have to do it for every board then. (Plus we can add other attributes) * TODC should already exist in 2.6.12-rc1 * I'll take a look at the CPM changes - kumar On Mar 22, 2005, at 2:47 PM, Jason McMullan wrote: ___ Linuxppc-embedded mailing list Linuxppc-embedded at ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded Date: March 22, 2005 2:49:12 PM CST Subject: Date: March 22, 2005 2:49:12 PM CST Subject: ATT118674.txtboard-ppc-mpc85xx-cds.patch signature.asc
[PATCH] CPM2 cleanups
Jason, why did you bother to implement these functions, they dont
provide any value for us?
It looks like startup() shutdown() are only used in IRQ probing code
or code in which enable/disable will be used instead.
- kumar
On Mar 22, 2005, at 3:18 PM, Wolfgang Denk wrote:
In message 523269.2987.58.camel at ad.doubleclick.net you wrote:
...
+static unsigned int cpm2_startup_irq(unsigned int irq)
+{?
+?? cpm2_unmask_irq(irq);
+?? return 0;
+}
+
+static void cpm2_shutdown_irq(unsigned int irq)
+{
+?? cpm2_mask_irq(irq);
+}
Why is cpm2_startup_irq() not void like cpm2_shutdown_irq() ?
Best regards,
Wolfgang Denk
--
Software Engineering:? Embedded and Realtime Systems,? Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Overflow on /dev/null, please empty the bit bucket.
___
Linuxppc-embedded mailing list
Linuxppc-embedded at ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
[PATCH] CPM2 cleanups
Some additional comments: * Did you actually try setting CPM_IRQ_OFFSET to a non-zero value? I'm guessing this doesnt work since you are not offset the irq passed into the other functions. For example, if CPM_IRQ_OFFSET is 64, will cpm2_mask_irq() work? * what is SA_NOTHREAD all about? - kumar On Mar 22, 2005, at 2:27 PM, Jason McMullan wrote: ___ Linuxppc-embedded mailing list Linuxppc-embedded at ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded Date: March 22, 2005 2:28:51 PM CST Subject: Date: March 22, 2005 2:28:51 PM CST Subject: ATT128341.txtcpu-ppc-cpm2.patch signature.asc
