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Impact of change n port size
Hi Atit, On Monday 18 April 2005 01:31, Atit_Shah wrote: Hi All, I have a kernel image which works perfectly for my reference board. When I try to port the same image on my board I seem to be facing problems. Like what? The only difference I see between the reference board and my board is the port size and capacity of RAM. And hw design, board layout, ... I have taken care of sending the right value for the RAM size through BD_INFO. Would there be and where all would the change be, if any, in the kernel code OR when I make the kernel image ie through make menuconfig / menu xconfig required to be made for port size of RAM? Well, if you're using PPCBoot or U-Boot to boot Linux, what you've done would be enough. OTOH, as you have a new hardware design you should check the SDRAM controller initialization in the bootloader code. It may be sligthly wrong, so the bootloader runs but the OS doesn't, because Linux really stresses out RAM operation in burst mode. (BTW, this is a FAQ, if appliable). Out of curiosity what would be the change required for different FLASH port size again on the kernel side. Look for the MTD parameters in the kernel compilation options. HTH, -- Ricardo Scop. \|/ ___ -*- (@ @)/|\ / V \| R SCOP Consult. /( )\ Linux-based communications --^^---^^+-- rscop at matrix.com.br +55 51 999-36-777 Porto Alegre, RS - BRazil
HW + SW development tools for embedded linux (was Re: using initramfs with ppc)
Hi Manoj, On Monday 18 April 2005 21:36, Manoj Padhi wrote: Pawel, I am new to embedded linux development and planning to develop a small project using embedded linux. You failed to mention your project's budget :). I looked for an evaluation kit in the market and it comes around $1100 + development tool licence (starts at $6K). Hence I need some advice ^^^ ELDK is free and probably better (GNU tools rock!) regarding getting an custom board and use free tools. Can you suggest such a board. We bought an RPXlite once and it worked well (sorry, but I don't remember the price, please google the net). Cheers, -- Ricardo Scop. \|/ ___ -*- (@ @)/|\ / V \| R SCOP Consult. /( )\ Linux-based communications --^^---^^+-- rscop at matrix.com.br +55 51 999-36-777 Porto Alegre, RS - BRazil
824x Sandpoint with 2.6.x
Mark A. Greer mgreer at mvista.com wrote: Sorry for the delay, I was on vacation last week. Not at all. I experienced a lot during your vacation:) It could be lots of things. Can you dump __log_buf? If so, please dump and send it so we can have a look. If not, try adding more progress stmts and telling us exactly where its stopping. OK, I am now up to the joint of early_console and normal console. Switch problem. Perhaps I miss sth or what? ## Booting image at 0120 ... Image Name: Linux-2.6.11 Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size:442401 Bytes = 432 kB Load Address: Entry Point: Uncompressing Kernel Image ... OK ## Loading RAMDisk Image at ff95 ... Image Name: Ramdisk Image Image Type: PowerPC Linux RAMDisk Image (gzip compressed) Data Size:4479838 Bytes = 4.3 MB Load Address: Entry Point: Loading Ramdisk to 03b02000, end 03f47b5e ... OK Loading kernel .. Linux version 2.6.11 (root at localhost.localdomain) (gcc version 3.2.2 20030217 (Y [snip] Kernel command line: console=uart,mmio,0xfdfce500,115200n8 console=ttyS0,115200 root=/dev/ram rw ramdisk_size=20 ip=192.168.0.3:192.168..2:::sandpoint:et h0:off panic=1 OpenPIC Version 1.2 (1 CPUs and 6 IRQ sources) at fdfcf000 OpenPIC timer frequency is 100.00 MHz PID hash table entries: 512 (order: 9, 8192 bytes) time_init: decrementer frequency = 25.00 MHz first init port.membase = 0x-34585344 Early serial console at MMIO 0xfdfce500 (options '115200n8') Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) Memory: 63872k available (684k kernel code, 228k data, 92k init, 0k highmem) Mount-cache hash table entries: 512 (order: 0, 4096 bytes) Linux NoNET1.0 for Linux 2.6 PCI: Probing PCI hardware PCI: Cannot allocate resource region 1 of device :00:00.0 Serial: 8250/16550 driver $Revision: 1.90 $ 1 ports, IRQ sharing enabled io scheduler noop registered RAMDISK driver initialized: 16 RAM disks of 20K size 1024 blocksize No ttyS device at MMIO 0xfdfce500 for console No matter how I changed the uart parameter, still no luck to get any further info. I looked into old_serial_port value and found that all invaild. So how to deal with it next? Thanks, Sam _ Do You Yahoo!? 150??MP3 http://music.yisou.com/ ??? http://image.yisou.com 1G??1000??? http://cn.rd.yahoo.com/mail_cn/tag/1g/*http://cn.mail.yahoo.com/event/mail_1g/
DMA using PPC440GX DMAC?
To use the DMA Controller on PPC440GX, should I use ppc4xx_set_dma_xxx instead of set_dma_xxx? If yes, where are in the kernel are they mapped to each other? Any help or pointers. Thanks in advance. Sanjay
update DataTLBMiss exception comment
Hi, Since v2.6 DataTLBMiss doesnt jump to the page fault handler, it instead loads invalid TLB which in turn causes a DataTLBError exception. The comment on top of it haven't been update since the change. What about this? --- head_8xx.S.orig 2005-04-19 13:29:14.0 -0300 +++ head_8xx.S 2005-04-19 13:34:44.0 -0300 @@ -289,13 +289,11 @@ * For the MPC8xx, this is a software tablewalk to load the instruction * TLB. It is modelled after the example in the Motorola manual. The task * switch loads the M_TWB register with the pointer to the first level table. - * If we discover there is no second level table (the value is zero), the - * plan was to load that into the TLB, which causes another fault into the - * TLB Error interrupt where we can handle such problems. However, that did - * not work, so if we discover there is no second level table, we restore - * registers and branch to the error exception. We have to use the MD_xxx - * registers for the tablewalk because the equivalent MI_xxx registers - * only perform the attribute functions. + * If we discover there is no second level table (value is zero) or if there + * is an invalid pte, we load that into the TLB, which causes another fault + * into the TLB Error interrupt where we can handle such problems. + * We have to use the MD_xxx registers for the tablewalk because the + * equivalent MI_xxx registers only perform the attribute functions. */ InstructionTLBMiss: #ifdef CONFIG_8xx_CPU6
update DataTLBMiss exception comment
On Apr 19, 2005, at 7:52 AM, Marcelo Tosatti wrote: Since v2.6 DataTLBMiss doesnt jump to the page fault handler, it instead loads invalid TLB which in turn causes a DataTLBError exception. Which, of course, is the logically correct way to do it. I guess I just read too much into the suggestion in the manual to jump to the unused Data Error exception vector under some miss conditions. I tried to eliminate the immediate error fault that was going to happen, but I guess we have to force that fault to get the proper information in the fault registers. The comment on top of it haven't been update since the change. What about this? Yes, thanks. -- Dan
824x Sandpoint with 2.6.x
Sam Song wrote: snip OK, I am now up to the joint of early_console and normal console. Switch problem. Perhaps I miss sth or what? snip Kernel command line: console=uart,mmio,0xfdfce500,115200n8 console=ttyS0,115200 root=/dev/ram rw ramdisk_size=20 ip=192.168.0.3:192.168..2:::sandpoint:et h0:off panic=1 snip Get rid of the console=uart,mmio,0xfdfce500,115200n8 part of the cmdline and see what happens (keep the console=ttyS0,115200 part). Mark
