Re: Unable to Read PPC440EPx Board ID thru Board Control and Status Registers (BCSR)

2007-12-02 Thread Dell Query 
Hi Stefan,

I finally got the new pdf files from other Resource CDs and used 0xc00 
address, without 0x2000 offset.

It works! Thanks a lot for the help.

But may I know why in Linux it is mapped to 0x1c00, wherein the doc stated 
0xc00?

Thanks a lot!

Stefan Roese [EMAIL PROTECTED] wrote: Hi Dell (???),

On Thursday 29 November 2007, Dell Query wrote:
 1. I used the 0x1c0002000 offset because I was referring to the first reply
 that I received. Now, I used the address 0x1c0002000 and tried to read from
 it. I retrieved 0x0f01c087. May I know what does this mean? How does this
 data relate to Board ID?

Please refer to the document describing the CPLD registers. They are byte 
registers and not 32bit lword registers (see below).

 2. Referring back to Embedded Planet 440xC document, I tried to activate
 the USER_LED0/USER_LED1 (with new address 0x1c000 + 0x2 offset) by
 setting it to 0. But didn't see the led turned on. Did some experiments and
 tried 0x1c000 without offset, sent 0, and found that USER_LED0 (CR3)
 and USER_LED1 (CR4) are activated! This got me confused. May I know why is
 this so? Could you please refer me to some documents?

The address of the CPLD is without this 0x2000 offset as it seems. Maybe the 
Sequoia users manual is incorrect here.

Make sure that you address these registers with the correct functions. That is 
in_8()/out_8(). Here a log from U-Boot:

= md.l c000 1
c000: 0f00c007
= md.b c000 4
c000: 0f 00 c0 07

By writing 0x00 to offset 0x02 (LED control) I am able to set the user led's. 
This should work in Linux the same way:

= mw.b c002 00

Best regards,
Stefan

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Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
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Re: Unable to Read PPC440EPx Board ID thru Board Control and Status Registers (BCSR)

2007-11-29 Thread Dell Query 
Hi Stefan,

1. I used the 0x1c0002000 offset because I was referring to the first reply 
that I received. Now, I used the address 0x1c0002000 and tried to read from it. 
I retrieved 0x0f01c087. May I know what does this mean? How does this data 
relate to Board ID?

2. Referring back to Embedded Planet 440xC document, I tried to activate the 
USER_LED0/USER_LED1 (with new address 0x1c000 + 0x2 offset) by setting it 
to 0. But didn't see the led turned on. Did some experiments and tried 
0x1c000 without offset, sent 0, and found that USER_LED0 (CR3) and 
USER_LED1 (CR4) are activated! This got me confused. May I know why is this so? 
Could you please refer me to some documents?


Thanks for all the assistance.

Regards,
dell
Stefan Roese [EMAIL PROTECTED] wrote: On Thursday 29 November 2007, Dell 
Query wrote:
 I see. No wonder I couldn't get more information on BCSR. I should contact
 sequoia to get the proper details like the correct addresses.

 I already used ioremap64(), remapping 0x1c0002000. I got a hex value for
 the Board ID but could figure out what it means. So I tried the
 USER_LED0/USER_LED1 (base address+0x2), to see if I could turn on/off the
 user LEDS, but still no luck. I think I am accessing the wrong addresses so
 I need to verify it with them.

Why do think you need the offset 0x2000? I just tested on my Sequoia under 
U-Boot and see the CPLD at address 0xc000.:

= md.b c000 20
c000: 0f 00 c0 07 00 80 00 80 00 20 00 00 00 00 00 00. ..
c010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

So you should map not 0x1.c000.2000 but 0x1.c000. under Linux. Please let 
me know if this works.

Best regards,
Stefan

=
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
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Re: Unable to Read PPC440EPx Board ID thru Board Control and Status Registers (BCSR)

2007-11-28 Thread Dell Query 
Oh is it 0x1C0002000?

Where can I get the document? What I have is 0xC0002000 from 
ep440xc_um_amcc.pdf file that I get from the accompanying PPC440EPx resource CD.

Thanks!

dell

Josh Boyer [EMAIL PROTECTED] wrote: On Tue, 27 Nov 2007 02:47:45 -0800 (PST)
Dell Query  wrote:

 Hi,
 
 I am creating a simple program which will try to read the board ID of the 
 PPC440EPx thru BCSR but when I load it, it gives me Data Read PLB Error. 
 
 I am not sure if I missed out something.
 
 I would really appreciate it if somebody could help me on this.
 
 I have posted the source code below, as well as the complete message.
 
 Many thanks!
 
 SOURCE CODE:
 --
 #include 

 #include 

 #include 

 #include 

 #include 

 #include 

 #include 

 #include 
 #include 
 #include 

 #include 

 #include 
 #include 
 
 MODULE_LICENSE(GPL);
 
 #define BCSR_BASE   0xC0002000

This is wrong.  It's 0x1C0002000.

 #define BCSR0   0
 #define BCSR1   1
 #define BCSR2   2
 
 #define USER_LED0x2
 #define SIZE_TO_MAP 10
 
 #define LED_ON  0
 
 uint __iomem *bcsrbase = NULL;
 
 static int __init initFunction(void) {
uint tmp;
printk(1 Calling init function.\n);
printk(1 bcsrbase value %p...\n,bcsrbase);
printk(1 Remapping %x...\n,BCSR_BASE);
/*map*/
bcsrbase = ioremap(BCSR_BASE, SIZE_TO_MAP);

Since this seems to be arch/ppc, use ioremap64.

josh
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Re: Unable to Read PPC440EPx Board ID thru Board Control and Status Registers (BCSR)

2007-11-28 Thread Dell Query 
I don't know if the document that came with the PPC440EPx Sequoia Resource CD 
is right. It is odd that it is entitled Embedded Planet 440xC and it showed 
in page 34:
---
Table 4-4. Memory Map

 Function   Start Address   End AddressSize Chip Select
 DDR SDRAM  0x  0x0FFF   256 MB —
 PCI Memory 0x8000  0xBFFF  1024 MB —
 BCSR   0xC000  0xCFFF   256 MB CS2
 NAND FLASH Controller1 0xD000  0xD00F 1 MB CS3/CS0
 NOR FLASH1 0xFC00  0x    64 MB CS0/CS3
---
Anyway, I have seen Table 1. System Memory Address Map and it got EBC mapped at 
0x1.c000. and another one at 0x1.f000..  But I didn't see any BCSR 
info. Correct me if I am wrong, but should it not give me BCSR details like:

Register 0 = ID Board ID
Register 1 =    CPLD revision
Register 2 =    User dip-switch / LEDs
Register 3 =    Configuration dip-switch
Register 4 =    TMRCLK control
Register 5 =    PCI control, status, info
Register 6 =    Reset control
Register 7 =  001x  Memory control
Register 8 =    Ethernet control
Register 9 =  0001  USB control
Register 10 =   Performance timer (MS Byte, bits 27-24)
Register 11 =   Performance timer (bits 23-16)
Register 12 =   Performance timer (bits 15-8)
Register 13 =   Performance timer (LS Byte, bits 7-0)


Regards,

dell
Stefan Roese [EMAIL PROTECTED] wrote: On Wednesday 28 November 2007, Dell 
Query wrote:
 Oh is it 0x1C0002000?

Just to be sure here, we are talking about the AMCC Sequoia board, right?

 Where can I get the document? What I have is 0xC0002000 from
 ep440xc_um_amcc.pdf file that I get from the accompanying PPC440EPx
 resource CD.

Please take a look at the 440EPx data sheet. It has a nice table with an 
overview of the address maps (table 1). Here you will notice that the EBC has 
multiple maps, one starting at 0x1.c000. and another one at 
0x1.f000.. Yes, these are 36bit physical addresses. In U-Boot these are 
mapped via the TLB to 0xc000. and 0xf000.. So in U-Boot you are able 
to access the CPLD at 0xc000. But in Linux you have to map the 36bit 
address to get the virtual address which you need for accessing. And using 
arch/ppc you need to call ioremap64() with this 36bit address as parameter.

Hope this helps.

Best regards,
Stefan

=
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
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Re: How to map addresses beyond 4GB

2007-11-27 Thread Dell Query 
Thanks

Dan Malek [EMAIL PROTECTED] wrote: 
On Nov 22, 2007, at 2:42 AM, Dell Query wrote:

 May I know how to map this one?

Just call ioremap() as usual.  It will understand the  4G
physical address and return a useful virtual address
to you.

 -- Dan



   
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Unable to Read PPC440EPx Board ID thru Board Control and Status Registers (BCSR)

2007-11-27 Thread Dell Query 
Hi,

I am creating a simple program which will try to read the board ID of the 
PPC440EPx thru BCSR but when I load it, it gives me Data Read PLB Error. 

I am not sure if I missed out something.

I would really appreciate it if somebody could help me on this.

I have posted the source code below, as well as the complete message.

Many thanks!

SOURCE CODE:
--
#include linux/module.h
#include linux/kernel.h
#include linux/ioport.h
#include linux/delay.h
#include linux/init.h
#include linux/interrupt.h
#include linux/platform_device.h
#include asm/irq.h
#include asm/io.h
#include linux/i2c.h
#include linux/i2c-id.h
#include asm/ocp.h
#include asm/ibm4xx.h

MODULE_LICENSE(GPL);

#define BCSR_BASE   0xC0002000
#define BCSR0   0
#define BCSR1   1
#define BCSR2   2

#define USER_LED0x2
#define SIZE_TO_MAP 10

#define LED_ON  0

uint __iomem *bcsrbase = NULL;

static int __init initFunction(void) {
   uint tmp;
   printk(1 Calling init function.\n);
   printk(1 bcsrbase value %p...\n,bcsrbase);
   printk(1 Remapping %x...\n,BCSR_BASE);
   /*map*/
   bcsrbase = ioremap(BCSR_BASE, SIZE_TO_MAP);
   printk(1 bcsrbase new value %p...\n,bcsrbase);
   /*read value*/
   /*based on PPC440EPx document, BCSR0 is BoardID*/
   tmp = in_be32(bcsrbase + BCSR0 /* BCSR0 */);
   printk(1 BCSR0 %x...\n,tmp);
   /*try to output something*/
   //out_be32(bcsrbase , /*LED_ON*/);
   return 0;
}
static void __exit cleanupFunction(void) {
   printk(1 Calling cleanup function.\n);
   /*unmap*/
   iounmap(bcsrbase);
}

module_init(initFunction);
module_exit(cleanupFunction);
--
ERROR MESSAGE:
--
/mnt/flash_fs/var/ftp # insmod bcsr.ko
 Calling init function.
 bcsrbase value ...
 Remapping c0002000...
 bcsrbase new value d50fe000...
Machine check in kernel mode.
Data Read PLB Error
OPB to PLB3: BSTAT= 0x
PLB3 to PLB4: BEAR=0x7fff BESR0=0x BESR1=0x
PLB4 to PLB3: BEAR=0xfd7f BESR0=0x BESR1=0x
PLB3 to OPB: BEAR=0x BESR0=0x BESR1=0x
PLB3 arbiter: BEAR=0xbfef ACR=0x9000 BESR=0x
PLB4 to OPB1: BEAR=0x000efffbfffb BESR0=0x BESR1=0x
PLB40 Arbiter: BEAR=0xc0002000 ACR=0xde00 BESR0=0x0f00
PLB41 Arbiter: BEAR=0xfffa ACR=0xdf00 BESR0=0x
POB0: BEAR=0xc27e3194 BESR0=0x BESR1=0x
OPB0: BEAR=0x BSTAT=0x
Oops: machine check, sig: 7 [#1]
NIP: D50FC07C LR: D50FC070 CTR: 
REGS: c02bcf50 TRAP: 0202   Not tainted  (2.6.21-rc4)
MSR: 00029000 EE,ME  CR: 24004022  XER: 
TASK = c05fe490[115] 'insmod' THREAD: cdc6c000
GPR00: D50FC070 CDC6DE80 C05FE490 0023 0A00C100 0001  0031
GPR08:  D50FE000 17E4 C029 04004022 1016F458  
GPR16:   0030 0030 0124 D51132BC  C0035E2C
GPR24: 0022 D5108000 0022 D50F7500 CF68A21C D50F CF68A000 C0279CEC
NIP [D50FC07C] initFunction+0x7c/0x128 [bcsr]
LR [D50FC070] initFunction+0x70/0x128 [bcsr]
Call Trace:
[CDC6DE80] [D50FC070] initFunction+0x70/0x128 [bcsr] (unreliable)
[CDC6DEA0] [C003731C] sys_init_module+0xe4/0x1458
[CDC6DF40] [C0001AC4] ret_from_syscall+0x0/0x3c
Instruction dump:
60842000 3860 4865 7c601b78 3c60d50f 7c040378 386370e8 901d76a0
483d 813d76a0 7c0004ac 8089 0c04 4c00012c 3c60d50f 38637108
Bus error
--

   
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Re: PPC440EPx GPIO control help

2007-10-18 Thread Dell Query 

Hi David,

I'll take a look at the PDF file you sent me.

Thanks,
dell
David Hawkins [EMAIL PROTECTED] wrote: Hi Dell,

If you do decide to look at kernel drivers, Jeff has sent you
code, and I also have a tutorial with example code you are
welcome to look at:

http://www.ovro.caltech.edu/~dwh/correlator/pdf/LNX-723-Hawkins.pdf
http://www.ovro.caltech.edu/~dwh/correlator/software/driver_design.tar.gz

Feel free to ask questions. I recall writing some test driver
code for the 440EP Yosemite board too. I'm just not sure where
I put it ...  :)

Cheers,
Dave




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Re: PPC440EPx GPIO control help

2007-10-17 Thread Dell Query 
Hi Jeff,

I read the device drivers part of the LDD3, it's really difficult as I 
expected. Thanks for the sample codes. I'll develop my own driver basing from 
your samples. Regarding reading the status of the LED, is it really necessary 
to use proc?

Regards,
dell

Jeff Mock [EMAIL PROTECTED] wrote: 
David Hawkins wrote:
 I have a PPC440EPx Sequoia Evaluation board that runs on Linux 2.6.21. 
 What I would want to do is to control (write and read values to) its 
 GPIO. Perhaps similar to Turbo C's outputb(0x378,0x01) to write and 
 inportb(0x378) to read. I read the PPC440EPx manual but I find it 
 difficult to understand.

 Could anyone show me any tutorial or some sample codes?
 
 I copied the code below from some test code I wrote for a TS7300
 board (uses an ARM EP9302 processor). However, since its user-space
 code it should work fine.
 

I might be a little out of date, but I think you must write your own 
driver to wiggle the GPIO pins on a 440 processor.  I just finished a 
project using a 440GX with a 2.6.15 kernel (we froze the code about 8 
months ago).

The 440 powerPC core is a 32-bit processor with 36-bit physical 
addresses.  The physical address for the GPIO pins is someplace above 
4GB.  An mmap() of /dev/mem only lets you map the lower 4GB of the 
address space, as a result you can't write a user space program on the 
440 to wiggle the GPIO pins.  (This was true with 2.6.15, I can't speak 
for later kernels).

This tossed me into writing device drivers, which turned out to be not 
nearly as scary as I imagined.  The Linux Device Drivers book is fabulous:

http://lwn.net/Kernel/LDD3/

Here is a driver for the 440GX that controls an LED on one of the GPIO 
pins you can use as an example.  The device /dev/pdev-led has a 
read/write interface so you can do something like this:

# echo 1  /dev/pdev-led  # turn on LED
# echo 0  /dev/pdev-led  # turn off LED

It also has a /proc interface so you can cat /proc/pdev-led to read the 
status of the LED.  There are several other drivers there that probably 
won't be interesting, but pdev-led.c is probably a good starting point:
 
http://www.mock.com/wsvn/listing.php?repname=mock.pdevpath=/trunk/sw/driver/

jeff




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PPC440EPx GPIO control help

2007-10-16 Thread Dell Query 
Hi,

I am a Linux and PPC newbie.

I have a PPC440EPx Sequoia Evaluation board that runs on Linux 2.6.21. What I 
would want to do is to control (write and read values to) its GPIO. Perhaps 
similar to Turbo C's outputb(0x378,0x01) to write and inportb(0x378) to read. I 
read the PPC440EPx manual but I find it difficult to understand.

Could anyone show me any tutorial or some sample codes?

Thanks,
Dell
   
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PPC440EPx GPIO control help

2007-10-16 Thread Dell Query 
Hi,

I am a Linux and PPC newbie.

I have a PPC440EPx Sequoia Evaluation board that runs on Linux 2.6.21. What I 
would want to do is to control (write and read values to) its GPIO. Perhaps 
similar to Turbo C's outputb(0x378,0x01) to write and inportb(0x378) to read. I 
read the PPC440EPx manual but I find it difficult to understand.

Could anyone show me any tutorial or some sample codes?

Thanks,
Dell
   
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