Any PPC system with working USB 2.0 host

2006-09-11 Thread Steven Blakeslee
 Any other boards that are known to work?
 

AMCC 440EPx.  Freescale 8343.  Both have Linux support with USB 2.0
host.



How to search in this mailing-list?

2006-06-27 Thread Steven Blakeslee
 

   This is maybe a bit silly, but I really don't know: 
   How to search using some key words in this mailing-list? 

Go to google and do a site search

example
site:ozlabs.org/pipermail/linuxppc-embedded/ 440EP






USB on MPC8349EMDS

2006-05-02 Thread Steven Blakeslee
 
 / #  usb 1-2: new high speed USB device using fsl-usb2-mph 
 and address 8 usb 1-2: khubd timed out on ep0in usb 1-2: new 
 high speed USB device using fsl-usb2-mph and address 9 usb 
 1-2: khubd timed out on ep0in
 

When I used that driver I found it only worked with Full speed devices.
Low and High speed devices did not work.



How do you make linux 2.6.10 U-Boot aware?

2006-04-26 Thread Steven Blakeslee
 I'm using MontaVista linux 4.01 for the PPC440GX which is 
 based on 2.6.10.  It doesn't read the bootargs from U-Boot 
 however.  Does anyone out there have a synopsis of what needs 
 to be modified (bd_info, etc.) to make this work with a 
 2.6.10 based release?
 

The bd_info structure needs to come from ppcboot.h and the make command
is make uImage  That should be about it.



About 2.6.14 on AMCC Yosemite board

2005-11-02 Thread Steven Blakeslee
Your FLASH mapping says that FLASH starts at 0xFC00.  There should
only be 32Meg of FLASH starting at address 0xFE00. 

 -Original Message-
 From: linuxppc-embedded-bounces at ozlabs.org 
 [mailto:linuxppc-embedded-bounces at ozlabs.org] On Behalf Of KylongMu
 Sent: Wednesday, November 02, 2005 8:50 AM
 To: 'Wolfgang Denk'
 Cc: Linuxppc-embedded at ozlabs.org
 Subject: About 2.6.14 on AMCC Yosemite board
 
 Hi, Denk
   I've got my Yosemite board today, it's shows very good 
 by default test.
 I downloaded the 2.6.14 according the repository from your 
 website by cogito.
 with default configure, I boot with the uImage, but the 
 system halt, attachment is the message.
   I don't know what happen with it, pls help me.
 
 Thanks a lot!
 
 Kylong Mu
 



bdi2000 file for yosemite board

2005-10-21 Thread Steven Blakeslee
Never tried the FLASH portion.




From: linuxppc-embedded-bounces at ozlabs.org
[mailto:linuxppc-embedded-bounces at ozlabs.org] On Behalf Of Peter Fercher
Sent: Friday, October 21, 2005 10:20 AM
To: linux-ppc-embedded
Subject: bdi2000 file for yosemite board


does anybody have a clue where to get a yosemite (ppc440ep eval
board from embedded planet) .cfg and .reg (configuration and register
definition) file for the bdi2000 programmer to reprogramm the flash
(write u-boot into flash) ?
 
 

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RPXClassic Help

2005-08-24 Thread Steven Blakeslee
Uniform Multi-Platform E-IDE driver Revision: 7.00beta4-2.4
ide: Assuming 50MHz system bus speed for PIO modes; override with
idebus=xx PCMCIA slot B: phys meme000...e801 (size
0801) Card ID: SunDisk SDP 5/3 0.6
  Fixed Disk Card
  IDE interface
  [silicon] [unique] [single] [sleep] [standby] [idle] [low power]
Probing IDE interface ide0...
probing for hda: present=0, media=32, probetype=ATA do_probe 471
probing for hda: present=0, media=32,  probetype=ATAPI do_probe
471 probing for hdb: present=0, media=32, probetype=ATA do_probe 471
probing for hdb:  present=0, media=32, probetype=ATAPI do_probe 471
Linux Kernel Card Services 3.1.22
   options:  none
m8xx_pcmcia: Version 0.05, 14-Apr-2002
m8xx_pcmcia: RPX CLASSIC or RPX LITE using SLOT_B with IRQ 13.

I use the PCMCIA card services at sourceforge instead of the built in
support.  They work very well including ATA/IDE.





Linux 2.4.25 / MPC8280 / ram config vs Linux instability?

2005-07-11 Thread Steven Blakeslee
 I am using U-boot to configure up the SDRAM and SRAM in our 
 system before we launch Linux. We have 32 Mb of SDRAM and 2 
 MB of SRAM in the system. 
 

When I was working on an 8260 a while back I had to map PSDRAM at
address 0x and LSDRAM starting at the PSDRAM's end.  I found
that when I made the PSDRAM smaller than the LSDRAM then the LSDRAM was
not mapped properly.  This was due to the fact that the start address
for the memory bank needed to be a multiple of the bank size.  If the
LSDRAM was 32Meg then the start address of the bank needed to be on a
32Meg boundary.

I am not sure but if you are mapping a 2Meg SRAM at 0x followed
by a 32Meg SDRAM then the SDRAM is not on a 32Meg boundary.  This may
not be your issue but it may be worth looking in to.



2.4.26 and MPC885 context switching time

2005-06-16 Thread Steven Blakeslee
 Therefore i wonder, if there are any known problems with the 
 MMU on 8xx and 2.4.2x which might explain that? 
 

I did some work on an 885 with Linux 2.4.22.  I found that when the
processor was running at 100MHz or higher Linux would die when
decompressing the ramdisk.  Below 100MHz it would run fine.  I came up
with a hacky fix because I mis-read an errata notice.  What I did was
set the ICTRL register to 0x0001, this fixed the problem.  Basically
all this does is slow the processor down considerable.  The Linux you
have may be doing the same thing.  This could explain the performance
hit you are seeing.



Linux 2.4.26 boot over network

2005-06-15 Thread Steven Blakeslee
Now, I am trying to boot Linux over the network using the following
boot arguments:
Kernel command line: console=ttyS0,9600n8 console=tty0 root=/dev/nfs rw
nfsroot=
192.168.49.189:/home/proj/at921/Filesys/usr/local/gefnes/target
192.168.49.1:192.168.49.189::255.255.255.0::eth0:off da104_gpio=8

In the first one you had ip=bootp, this uses bootp to get the ip
address.  In the second one you do not have an ip define so the ethernet
is not being enabled.  You need something like this
ip=192.168.49.1:::255.255.255.0




RE: Réf. : Re: starting RAM adress for linux kernel

2005-06-03 Thread Steven Blakeslee
 
 we need to have the start of Ram at 0x0300  because we 
 use the command mem=40M (for uboot) to force Linux in the low 
 part of memory and to reserve the high part of memory (218M 
 exactly ) for ioremap (for our application) but we keep the 
 same flash mapping (to avoid more problems).
 So how can we do that ? The boot seems OK but there is some 
 problems in Kernel after uncompressing the kernel image.
 Is the only solution is to inverse the mapping with Ram from 
 0 to 258M and the flash above ?

RAM should always start at address 0x0 in your chip select mapping.  When you 
pass mem=40M Linux will claim
RAM from 0x0 to 0x0280.  The rest of the RAM, 0x0280 to the end will be 
available for ioremap.  The reason your kernel does nothing after being 
uncompressed is because it has no idea where it is and probably is not being 
uncompressed to a valid RAM address.

The sensible place to map FLASH is the end of memory, or anywhere out of the 
way.  I assume you are low booting and that is why you think FLASH needs to be 
at the beginning of memory.  It does not, even though that is where you boot 
from you can remap the FLASH.


 
 Finally, will Busybox work with Ram starting at 0x0300 ?

Busy box is part of your ramdisk, it does not know anything about the memory 
map.  If your kernel does not get past uncompressing then you did not get 
anywhere near busy box running.




USB-host driver for 440ep (bamboo)?

2005-05-18 Thread Steven Blakeslee
  -Original Message-
 From: linuxppc-embedded-bounces at ozlabs.org 
 [mailto:linuxppc-embedded-bounces at ozlabs.org] On Behalf Of 
 extabe at bredband.net
 Sent: Wednesday, May 18, 2005 9:16 AM
 To: linuxppc-embedded at ozlabs.org
 Subject: USB-host driver for 440ep (bamboo)?
 
 Is there any driver for the USB-host-controller built-in the 
 440ep CPU.
 I?m using the Bamboo board and need USB-host support.
 Does anyone have any experience with that?
 

U-boot 1.1.3 has a usb_ohci.c driver for the MPC5200.  That driver with just a 
few changes worked like a champ on the 440EP.



Linux crashes during memory mapping

2005-03-31 Thread Steven Blakeslee
   I do not have any problem with the functioning of U-Boot but
Linux crashes after   
 printing Uncompressing Kernel ... OK and then it seems that nothing
is happening.

Do you have the SYPCR(serial watch dog timer) disabled?




   3. The memory map of the VPN Board (MY BOARD) is as folllows: 

= 
   Memory RegionSize
Address Range 

== 
   SDRAM32MByte  _
-- 01FF_  
   Flash32MByte  FF00_
-- _   

Have you done a full test to make sure your RAM is correctly mapped?

  

   This is what the console log buffer has shown: 

= 
   md 0x00177e34 

   00177e34: 3c363e6d 73746172 743d303c 363e6d73
6mstart=06ms 
   00177e44: 697a653d 303c363e 66737461 72743d30
ize=06fstart=0 
   00177e54: 3c363e66 73697a65 3d303c36 3e696d6d
6fsize=06imm 
   00177e64: 723d303c 363e626f 74666c61 673d303c
r=06botflag=0 
   00177e74: 363e6970 6164643d 303c363e 65616464
6ipadd=06eadd 
   00177e84: 3d633031 35303032 383c363e 65737065
=c01500286espe 
   00177e94: 643d303c 363e696e 6974663d 303c363e
d=06initf=06 
   00177ea4: 62757366 3d303c36 3e63706d 663d303c
busf=06cpmf=0 
   00177eb4: 363e6272 67663d30 3c363e73 6363663d
6brgf=06sccf= 
   00177ec4: 303c363e 76636f3d 303c363e 62617564
06vco=06baud 
   00177ed4: 3d304f6f 70733a20 6b65726e 656c2061=0Oops: kernel
a 

These values do not look correct.  Everything is zero.



USB host on Freescale MPC880

2005-01-18 Thread Steven Blakeslee
http://www.heeltoe.com/ has a usb driver for the 823, 850 processors.
This should be able to get you started.  There is also text talking
about the pitfalls using the 8xx USB controller. 

 -Original Message-
 From: linuxppc-embedded-bounces at ozlabs.org 
 [mailto:linuxppc-embedded-bounces at ozlabs.org] On Behalf Of 
 Dayton, Dean
 Sent: Tuesday, January 18, 2005 8:32 AM
 To: linux-usb-devel at lists.sourceforge.net; 
 linuxppc-embedded at ozlabs.org
 Subject: USB host on Freescale MPC880
 
 I need to provide a USB host interface on a propietary board 
 using a Freescale (Motorola) MPC880. The MPC880 has a USB 
 implemented in the CPM, but I haven't found any Linux support 
 for it. Can anyone point me to existing drivers? Does anyone 
 know of any problems that would/should prevent me from using 
 the MPC880's USB interface?
 
 Thanks
 
 -
 Dean Dayton
 Staff Engineer - Applied Innovation Inc. 
 (614)923-1174
 deand at aiinet.com 
 
 ___
 Linuxppc-embedded mailing list
 Linuxppc-embedded at ozlabs.org
 https://ozlabs.org/mailman/listinfo/linuxppc-embedded
 



Some issues with kernel 2.6 for MPC8260 target

2005-01-12 Thread Steven Blakeslee
I ported it to the Embedded Planet ep8260 board with FCC3, ep8248 board
with FCC1 and FCC2 and ep8280 with FCC2 and FCC3.  I had to make very
little, if anything, to get it to work.  I did not try 2.6.9.  I am
currently using 2.6.10-rc3 which I believe after the last merge is now
2.6.10.  I did practically nothing to get all of these to work. 

 -Original Message-
 From: Saso Kavcic [mailto:saso at activetools.si] 
 Sent: Wednesday, January 12, 2005 9:27 AM
 To: Steven Blakeslee
 Cc: linuxppc-embedded at ozlabs.org
 Subject: Re: Some issues with kernel 2.6 for MPC8260 target
 
 Hi Steven,
 
 Have you noticed any improvements in 2.6.10. over 2.6.9? We 
 were porting
 2.6.9 to a custom mpc8275vr
 board and we were able to get everything working except 
 ethernet (fcc enet). We did manage to get a few packets over 
 it but it was all very slow, unstable and unpredictable and 
 it seemed that fcc enet driver doesn't work well in 2.6. Were 
 you able to use fcc under 2.6.9?
 
 Best Regards, Saso
 
 Steven Blakeslee wrote:
 
 I would suggest going to the latest 2.6.10 kernel.  I have 
 it running 
 with several ethernets running on all the 82xx processors.
 
   
 
 -Original Message-
 From: linuxppc-embedded-bounces at ozlabs.org
 [mailto:linuxppc-embedded-bounces at ozlabs.org] On Behalf Of Vijay 
 Padiyar
 Sent: Wednesday, January 12, 2005 5:37 AM
 To: LinuxPPC Support
 Subject: Some issues with kernel 2.6 for MPC8260 target
 
 Hi all
 
 I wish to discuss some strange issues that I faced with 
 respect to the 
 Linux
 2.6.8 kernel (downloaded from kernel.org). Firstly, I wish to know 
 whether this has been known to work on an MPC8260 PowerPC target.
 
 Secondly, when I tried to compile the Linux kernel with my 
 toolchain 
 (built with Dan Kegel's crosstool for the PowerPC 603e 
 core, which is 
 what my processor has), I got some errors which I found to rather 
 queer after investigation. Firstly, let me state the errors that I 
 got:
 
 --
 
   LD  init/built-in.o
   LD  .tmp_vmlinux1
 arch/ppc/8260_io/built-in.o(.text+0x103c): In function
 `mii_queue_relink':
 arch/ppc/8260_io/fcc_enet.c:1254: undefined reference to 
 `schedule_task'
 arch/ppc/8260_io/built-in.o(.text+0x1074): In function
 `mii_queue_config':
 arch/ppc/8260_io/fcc_enet.c:1263: undefined reference to 
 `schedule_task'
 
 --
 
 On further investigation, I find that 'schedule_task()' is 
 simply not 
 defined anywhere in the 2.6.8 kernel sources. This is quite wierd! 
 However, it is defined in a file 'context.c'
 (linux-src/kernel) in the 2.4.27 kernel sources, which we 
 were using 
 earlier. How is it that a function is being called but its 
 definition 
 has been removed from the sources?
 
 Another such example is with the structure 'tq_struct'. It 
 is referred 
 to in the file 'fcc_enet.c'
 (linux-src/arch/ppc/8260_io) but it's not defined anywhere! 
 Again, after checking in the 2.4.27 sources, I find that 
 it's defined 
 in the file 'tqueue.h' (linux-src/include/linux)!
 
 A third thing is that the 2.4.27 kernel source file 'uart.c'
 (linux-src/arch/ppc/cpm2_io) is not present in the corresponding 
 folder in the 2.6.8 source (linux-src/arch/ppc/8260_io). 
 There is one 
 'uart.c' in the folder '8xx_io', but it doesn't get compiled during 
 the kernel build process. Will my UART work correctly with 
 this build?
 
 Can someone please tell me if there's some explanation for 
 this that 
 I'm unaware of? Which would be the proper forum to report 
 this? Again 
 I would like to ask: Has the 2.6.8 kernel been tested 
 successfully on 
 the MPC8260 PowerPC platform?
 
 Lastly, where can I get the latest stable Linux kernel 
 source for the 
 PowerPC platform?
 
 Regards
 
 Vijay Padiyar
 ___
 Linuxppc-embedded mailing list
 Linuxppc-embedded at ozlabs.org
 https://ozlabs.org/mailman/listinfo/linuxppc-embedded
 
 
 
 ___
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 Linuxppc-embedded at ozlabs.org
 https://ozlabs.org/mailman/listinfo/linuxppc-embedded
   
 
 
 



2.6.10-rc3 for 8xx booting load_kernel(...) function problem vs configuring and initializing serial console ?

2004-12-23 Thread Steven Blakeslee
 CONFIG_CMDLINE=console=ttyCPM0 panic=3 root=/dev/ram

All I had to do to get the rpxlite running was do console=ttyCPM0
root=/dev/ram rw.  Check the default config for the rpxlite, that may
help you.

  (then from load_kernel() I would see)** 
  loaded at: 0018 0035622C
  board data at: 0035313C 0035317C
  relocated to:  001852CC 0018530C
  zimage at: 001857F9 00226057
  initrd at: 00227000 00352ADF
  avail ram: 00357000 0200
  
  Linux/PPC load: panic=3 root=/dev/ram
  Uncompressing Linux...done.

It would appear you did not recompile the kernel or you did not reload
it.  It still shows the command line without console=ttyCPM0.



Error cross-building Linux 2.6 for 8xx

2004-12-16 Thread Steven Blakeslee
arch/ppc/8xx_io/uart.c is the problem.  For the 2.6 kernel that compiles
for 8xx that file does not exist.  You need a newer version of the 2.6
kernel.  The version that compiles correctly and sort of runs is Linux
2.6.10-rc3.  I know for a fact that Linux 2.6.9 and lower does not
compile correctly on 8xx. 

Also, nfs root does not work, use a ramdisk.

My email client sucks, so I probably broke the thread, sorry.




 -Original Message-
 From: linuxppc-embedded-bounces at ozlabs.org 
 [mailto:linuxppc-embedded-bounces at ozlabs.org] On Behalf Of 
 Povolotsky, Alexander
 Sent: Thursday, December 16, 2004 10:31 AM
 To: 'linuxppc-embedded at ozlabs.org'; 'etux at embeddedtux.org'
 Subject: Error cross-building Linux 2.6 for 8xx
 
 Hi - I am double posting this on both: 
 linuxppc-embedded at ozlabs.org and etux at embeddedtux.org, hoping 
 to increase the audience and, hence, to maximize the number 
 of responses (if only the same people read both mail lists, 
 why such duplicate redundant mail lists exist ?)
 
 I recognize and highly appreciate what Wolfgang Denk 
 wd at denx.de wrote (to
 me) on etux at embeddedtux.org:
 
 Forget the combination of a 2.6 kernel and  a  MPC8xx  
 processor  for 
 now. There are still serious problems in 2.6 on these processors.
 
 But at least (I thought) I should be able to build the 2.6 
 kernel for 8xx.
 So firstly I ran into I2C no-current-support-for-8xx (see 
 details in the listed below e-mail chain) ...
 
 Then I took the I2C configuration out and tried to build the 
 kernel again - but I am still getting errors (not sure though 
 whether cross-compiler contributes to those recent errors 
 or not ... - I would, as always,  appreciate any opinion/input ! ):
 
 Make zImage
 
   CHK include/linux/version.h
 make[1]: `arch/ppc/kernel/asm-offsets.asm' is up to date.
   CHK include/linux/compile.h
   CC  arch/ppc/8xx_io/uart.o
 arch/ppc/8xx_io/uart.c:82: warning: type defaults to `int' in 
 declaration of `DECLARE_TASK_QUEUE'
 arch/ppc/8xx_io/uart.c:82: warning: parameter names (without 
 types) in function declaration
 arch/ppc/8xx_io/uart.c: In function `serial_console_device':
 arch/ppc/8xx_io/uart.c:145: error: storage class specified 
 for parameter `rs_table'
 arch/ppc/8xx_io/uart.c:145: error: parameter `rs_table' is initialized
 
 Thanks,
 Best Regards,
 Alex
 
 -Original Message-
 From: Dan Malek [mailto:dan at embeddededge.com]
 Sent: Wednesday, December 15, 2004 11:54 AM
 To: Povolotsky, Alexander
 Cc: 'linuxppc-embedded at ozlabs.org'
 Subject: Re: I2C + Linux 2.6 on MPC880/MPC885 based board(s)
 
 
 On Dec 15, 2004, at 11:04 AM, Povolotsky, Alexander wrote:
 
  On a software (Linux 2.6) side ...
  Did you deal with Linux 2.6 + MPC880/MPC885 (or at least 
 any MPC8xx) ?
   If yes, what I2C settings in .config were used for successful 2.6 
  kernel
 
   build ?
   I am having a problem building it (see below attached) ... 
 - that is  
  why I am trying to understand from the hardware point of 
 view - hence 
  my
 h/w related questions  
   ... - the importance of I2C.
 
 It looks like someone that has an interest in using the CPM 
 I2C (which isn't me) will need to port it first to 2.6, then 
 provide the board specific functions for set up and control.
 
 On top of this, if you want to run the SMBus protocols, you 
 will need a much more complex CPM I2C functions.
 
 
   -- Dan
 **
 -Original Message-
 From: Povolotsky, Alexander
 Sent: Tuesday, December 14, 2004 6:13 PM
 To: 'Greg KH'; Jean Delvare
 Subject: RE: 8xx i2c drivers (cross)compilation errors on Linux 2.6.8
 
 
 Hi,
 
 Alexander, what arch are you building for?
 
 PPC -8xx -MPC880 (Motorola - FreeScale Semiconductor)
 http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code
=MPC885nodeId
 =018rH3bTdG4204
 
 Thanks,
 Best Regards,
 Alex
 
 PPS I have attached my original e-mail in its entirety (at the end ).
 
 -Original Message-
 From: Greg KH [mailto:greg at kroah.com]
 Sent: Tuesday, December 14, 2004 4:50 PM
 To: Jean Delvare
 Cc: Alexander.Povolotsky at marconi.com
 Subject: Re: 8xx i2c drivers (cross)compilation errors on Linux 2.6.8
 
 
 On Tue, Dec 14, 2004 at 10:38:00AM +0100, Jean Delvare wrote:
  
  On 2004-12-14, Alexander Povolotsky wrote:
  
   Hi,
  
   I have the following .config setup:
   (...)
   CONFIG_I2C_RPXLITE=y
   (...)
   
   Originally I was getting error:
CC  drivers/i2c/busses/i2c-rpx.o
   drivers/i2c/busses/i2c-rpx.c:20:32: linux/i2c-algo-8xx.h: 
 No such file
 or
   directory - why I am missing it - any hint ?
  
  Hm, looks like the 8xx i2c algorithm was never ported to 
 Linux 2.6. Greg,
  how come that the RPX adapter driver is present in the tree and the
  algorithm it depends on isn't?
 
 Because no one ever sent me the patch with those files in it?  :)
 
 I have no idea, I've not cross built this driver before.
 
  Greg, could it be that an arch-specific (m68k? don't know what this
  

405GPr PCI target/host

2004-08-19 Thread Steven Blakeslee

I am trying to get an IBM 405GPr processor to work as a target/host on a PCI
bus.  A PCI target can temporarily become a host on the PCI bus. Basically
this means it needs to do everything the host currently does except
assigning PCI memory space, the dedicated host is responsible for this.

I saw a message concerning this on Tue 12/23/2003 4:20 PM, the questions was
for MPC7447(Dual CPU) + MV64360 based Processor PMC boards  I only saw one
response to this and it did not seem to be correct.

I was wondering if anyone has done something like this, not necessarily with
a 405, any processor experience will do.  I appreciate any help or advice.

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/





anyone ever see swap_dup: Bad swap file entry?

2004-04-22 Thread Steven Blakeslee

I am using the linuxppc_2_4_devel tree from http://ppc.bkbits.net/ and a
ramdisk which I downloaded from Wolfgang Denx's FTP site.  The compile
environment is the latest ELDK.  I have this tree and ramdisk working just
fine on an MPC8260 processor.  I took that support and changed a few lines
of code in arch/ppc/lib/string.S and arch/ppc/kernel/misc.S to get the
kernel to boot on an MPC8248 processor.  The kernel appears to boot and
mount the ramdisk but then I get the following error.

RAMDISK: Compressed image found at block 0
Freeing initrd memory: 1431k freed
VFS: Mounted root (ext2 filesystem).
Mounted devfs on /dev
Freeing unused kernel memory: 56k init
swap_dup: Bad swap file entry 0e18d55c
swap_dup: Bad swap file entry 0e18d55c
swap_dup: Bad swap file entry 0e18d55c
swap_dup: Bad swap file entry 0e18d55c
swap_dup: Bad swap file entry 0e18d55c
swap_dup: Bad swap file entry 0e18d55c
swap_dup: Bad swap file entry 0e18d55c
swap_dup: Bad swap file entry 0e18d55c

This error is in mm/swapfile.c  It happens when type = nr_swapfile in
function swap_duplicate.  The only time nr_swapfile gets changed is function
sys_swapon.  Using my BDI2000 I see that sys_swapon is never getting called.
Does anyone know when or if sys_swapon should get called?  Has anyone seen
this before?  Any advice is always appreciated.

Steve Blakeslee

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good learning experience for Linux

2004-04-22 Thread Steven Blakeslee

I sent a message earlier today about getting a swap_dup: Bad swap file
entry 0e18d55c error.  I found the problem and fixed it and wanted to share
it with people who are still learning this stuff, like myself.

After 2 days of pounding on my head I found the file
Documentation/powerpc/cpu_features.txt  It explained how the file
arch/ppc/kernel/cputable.c has a list of the known powerPC PVRs(processor
version register).  The 8248 was not in there so it was using a default
entry.  That was the cause of my problems.  I added a new entry for the 8248
and all is working.  My lesson was a little research makes things much
nicer.  Lesson learned.

Steve Blakeslee

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good learning experience for Linux

2004-04-22 Thread Steven Blakeslee

I still have so more to do like verifying FEC and PCI.  Also I did it on 2.4
which I believe is done or close to being.  I can provide a patch when I am
done.

-Original Message-
From: Dan Kegel [mailto:[EMAIL PROTECTED]
Sent: Thursday, April 22, 2004 11:59 AM
To: Steven Blakeslee
Cc: 'linuxppc-embedded at lists.linuxppc.org'; 'etux at embeddedtux.org'
Subject: Re: good learning experience for Linux


Steven Blakeslee wrote:
 I sent a message earlier today about getting a swap_dup: Bad swap file
 entry 0e18d55c error.  I found the problem and fixed it and wanted to
share
 it with people who are still learning this stuff, like myself.

 After 2 days of pounding on my head I found the file
 Documentation/powerpc/cpu_features.txt  It explained how the file
 arch/ppc/kernel/cputable.c has a list of the known powerPC PVRs(processor
 version register).  The 8248 was not in there so it was using a default
 entry.  That was the cause of my problems.  I added a new entry for the
8248
 and all is working.  My lesson was a little research makes things much
 nicer.  Lesson learned.

So, is this already in the latest kernel sources?  If not,
have you considered sending in a patch?
- Dan

--
My technical stuff: http://kegel.com
My politics: see http://www.misleader.org for examples of why I'm for regime
change

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MPC852 Cache initializing problem

2004-04-19 Thread Steven Blakeslee

It may be your debugger that is causing the problem.  The next thing called
is turn_on_mmu and I believe that causes an exception.

-Original Message-
From: Meriin Michael-BMM063 [mailto:[EMAIL PROTECTED]
Sent: Monday, April 19, 2004 11:57 AM
To: 'linuxppc-embedded at lists.linuxppc.org'
Subject: MPC852 Cache initializing problem



Hello,

I'm trying to put Linux on MPC852T platform (Embedded Planet).
I'm using UBOOT as a Boot Loader.
I'm trying to put kernel 2.4.20
On the very beginning of the Linux Initializing
in initial_mmu after enabling Cache the system crashes.
Any ideas?

Thanks,

Best Regards,
 Michael Meriin


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C++ Memory Requirements for PowerQUICC 1

2004-04-02 Thread Steven Blakeslee

It depends on the application.  An entire Linux kernel complete with ramdisk
can run on 8MB of RAM.

-Original Message-
From: vze8n24y at verizon.net [mailto:[EMAIL PROTECTED]
Sent: Friday, April 02, 2004 12:30 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: C++ Memory Requirements for PowerQUICC 1



Hi:

I would like to run C++ on a PowerQUICC I system that has 8 MB of RAM. I was
told by a friend that this was not enough memory to run a C++ program with
the C++ libraries. Does anyone have experience with this?

Regards,

Bob Davis


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Preferred Phy for MPC8260

2004-03-26 Thread Steven Blakeslee

intel lxt971

-Original Message-
From: Jos Beck [mailto:[EMAIL PROTECTED]
Sent: Friday, March 26, 2004 10:15 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Preferred Phy for MPC8260



Hi,

I hope I am not too much off-topic in this mail list .. but

Would anyone of you know a preferred 10/100baseT phy for the MPC8260?
Or specific brands/types to avoid?
Or does it really not matter what we use?

Thanks,

Jos


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Simple module question

2004-02-19 Thread Steven Blakeslee

look into wait queues.

-Original Message-
From: Karsten Jeppesen [mailto:[EMAIL PROTECTED]
Sent: Thursday, February 19, 2004 3:29 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Simple module question



Aren't they all..


I am doing some heavy work in a write function.
But I have a poll wait loop (waiting for flash program end) where a lot
of time is wasted.
How do I tell the scheduler that I would like t surrender the CPU for
others to use?
I tried calling scheduler(), but that only crashed the kernel.
What is the correct way?

Sincerely,
Karsten


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Issues configuring the network interafce on a 8260 board with multiple eth ports

2004-02-03 Thread Steven Blakeslee

I believe you need to specify which eth device to use in the config
parameter.  Try the following

ip=10.121.10.21:10.121.10.150:10.121.10.254:255.255.255.0:voip_lnx_joao:eth0
:off

-Original Message-
From: Joao Vicente [mailto:[EMAIL PROTECTED]
Sent: Tuesday, February 03, 2004 9:45 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Issues configuring the network interafce on a 8260 board with
multiple eth ports



Hi

I am trying to bring up a second network interface, on a MPC8260 based
custom board
If I configure the kernel with only one FCC, it does bring up both the
ethernet and IP services.
If I configure the second eth port, by choosing FCC2 on the menuconfig, it
configures both eth0 and eth1 properly, but if fails to resolve the IP
interfaces.

When I try checking the intefaces with ifconfig I can only see the loopback
device.

I have have also noticed that the MAC address selected for the eth1 is an
increment from eth0. Does this apply to the default IP address chosen, or do
I need to pass it though the kernel cmdline ?

I was also looking for details/examples on the kernel cmdline. All I could
find was a brief reference on the kernel folder
Documentation/kernel-parameters.txt. Does anybody know of good reference for
selecting kernel parameters.

Find below the boot-up sequence that I get when I have both FCC1 and FCC2
eth interfaces enabled.

## cmdline at 0x007FFF00 ... 0x007FFF8D
bd address  = 0x01FB2FB4
memstart= 0x
memsize = 0x0200
flashstart  = 0xE240
flashsize   = 0x0040
flashoffset = 0x
sramstart   = 0x
sramsize= 0x
immr_base   = 0xF000
bootflags   = 0x0001
vco =240 MHz
sccfreq = 60 MHz
brgfreq = 15 MHz
intfreq =180 MHz
cpmfreq =120 MHz
busfreq = 60 MHz
ethaddr = 00:D0:9B:00:00:B9
IP addr = 10.121.10.21
baudrate= 115200 bps
## Loading RAMDisk Image at e240 ...
   Image Name:   RAM Disk
   Image Type:   PowerPC Linux RAMDisk Image (gzip compressed)
   Data Size:1439292 Bytes =  1.4 MB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK
## initrd at 0xE2400040 ... 0xE255F67B (len=1439292=0x15F63C)
   Loading Ramdisk to 01e52000, end 01fb163c ... OK
## Transferring control to Linux (at address ) ...
Memory BAT mapping: BAT2=32Mb, BAT3=0Mb, residual: 0Mb
Linux version 2.4.20 (jvicente at lab00056l.localdomain) (gcc version 2.95.4
20010319 (prerelease/franzo/20011204)) #32 Tue Feb 3 14:05:14 GMT 2004
On node 0 totalpages: 8192
zone(0): 8192 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/ram rw
ip=10.121.10.21:10.121.10.150:10.121.10.254:255.255.255.0:voip_lnx_joao::off
mem=32M console=ttyS3,115200 ramdisk_size=8192k
IP-Config: Parameter #0: `10.121.10.21'
IP-Config: Parameter #1: `10.121.10.150'
IP-Config: Parameter #2: `10.121.10.254'
IP-Config: Parameter #3: `255.255.255.0'
IP-Config: Parameter #4: `voip_lnx_joao'
IP-Config: Parameter #6: `off'
Warning: real time clock seems stuck!
Calibrating delay loop... 119.60 BogoMIPS
Memory: 29172k available (1084k kernel code, 400k data, 52k init, 0k
highmem)
Dentry cache hash table entries: 4096 (order: 3, 32768 bytes)
Inode cache hash table entries: 2048 (order: 2, 16384 bytes)
Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 8192 (order: 3, 32768 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
JFFS version 1.0, (C) 1999, 2000  Axis Communications AB
JFFS2 version 2.1. (C) 2001 Red Hat, Inc., designed by Axis Communications
AB.
CPM UART driver version 0.01
ttyS0 on SCC1 at 0x8000, BRG1
ttyS1 on SCC2 at 0x8100, BRG2
ttyS2 on SCC3 at 0x8200, BRG3
ttyS3 on SCC4 at 0x8300, BRG4
pty: 256 Unix98 ptys configured
eth0: FCC1 ENET Version 0.4, 00:D0:9B:00:00:B9
eth0: Phy @ 0x0, type LXT973 (0x00137a10)
eth1: FCC2 ENET Version 0.4, 00:D0:9B:00:00:BA
eth1: Phy @ 0x1, type LXT973 (0x00137a10)
RAMDISK driver initialized: 16 RAM disks of 8192K size 1024 blocksize
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 2048 bind 2048)
IP-Config: Entered.
eth0: config: auto-negotiation on, 100FDX, 100HDX, 10FDX, 10HDX.
IP-Config: eth0 UP (able=0, xid=)
eth0: status: link up, 10 Mbps Half Duplex, auto-negotiation complete.
eth1: config: auto-negotiation on, 100FDX, 100HDX, 10FDX, 10HDX.
IP-Config: eth1 UP (able=0, xid=)
IP-Config: (REVISIT) ic_myaddr = 10.121.10.21
IP-Config: (REVISIT) root_server_addr = 255.255.255.255
IP-Config: (REVISIT) ic_servaddr = 10.121.10.150
IP-Config: (REVISIT) ic_first_dev-next = c1e50500
IP-Config: Incomplete network configuration information.
IP-Config: Downing eth0
IP-Config: Downing eth1

usb driver requries pdev?

2004-02-03 Thread Steven Blakeslee

I have been looking through the USB driver for the latest linuxppc_2_4_devel
tree at ppc.bkbits.net and I spotted something that looks like a bug.  I did
a search through the list and did not see any mention of it.

In drivers/usb/hcd.h  the declaration of pdev is in #ifdef CONFIG_PCI
#endif.

In drivers/usb/hcd.c  I see pdev used several times but it is not in #ifdef
CONFIG_PCI   #endif.

The make file forces hcd.c to be compiled when USB support is enabled but if
the board does not have PCI the compile will fail because of this.

Steve Blakeslee

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downloading source with specific changeset

2004-01-09 Thread Steven Blakeslee

I was hoping someone with experience with bitkeeper could advise me on what
I am doing wrong.

I am trying to download a specific revision of the linuxppc_2_4_devel tree,
tag v2.4.21_linuxppc_2_4_devel, at
http://ppc.bkbits.net:8080/linuxppc_2_4_devel

The command I give is
bk clone -r1.1308.1.36 http://ppc.bkbits.net/linuxppc_2_4_devel

I thought the -r1.1308.1.36 would tell it to download up to changset
1.1308.1.36 but I keep getting the most recent version.  Can you please tell
me what I am doing wrong.

Thank you,
Steven Blakeslee

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want help regarding toolchain for E8260 Planetcore

2003-12-20 Thread Steven Blakeslee

 I use ELDK(www.denx.de) as the tool chain and the linuxppc_2_4_devel tree
to run on the ep8260

-Original Message-
From: Nikhil Bhargava
To: dank at kegel.com; linuxppc-embedded at lists.linuxppc.org
Sent: 12/17/03 11:21 PM
Subject: want help regarding toolchain for E8260 Planetcore


hello,

Thanks for all members of this grp for helping me out on almost all
ocassions when i have a doubt going beyond myself.

I have to port opensource Linux 2.4.X on to an E8260 mpc 8260 target
board from planet core. I will use this development board in testing
some protocol stacks. Can any one tell me what are the most stable
versions of Gcc, Glibc etc should i use. Further what components to
choose and what to discard from the standard os. Moreso, the board
already have a bootloader running so i just need to port the os on it.
In this scenarios how should i go about it. I will be using BDI 2000
emulator/debugger.

I am following Karim's embedded linux book and web resources for this.


Regards,

Nikhil Bhargava


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ram root filesystem

2003-12-03 Thread Steven Blakeslee

Try the ram disk at
ftp://ftp.denx.de/pub/LinuxPPC/usr/src/SELF/images/ppc_82xx/

-Original Message-
From: AlessandroPPC [mailto:[EMAIL PROTECTED]
Sent: Wednesday, December 03, 2003 12:49 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: ram root filesystem



Hi to all,

I'm developing a custom application on 8260 based board. I have first used
the ELDK package version 2.0.2 with Kernel 2.4.4
and nfs root filesystem. Now I want migrate my application on the system
using ram fs instead of nfs.
To do this I have generated a ramdisk image derived from ELDK fs eliminating
superfluous packages and using a makefile with
this instructions:

 @echo 
 @echo create root files system
 @echo 
 rm -rf $(BUILD)/var/log/tegated
 mkdir $(BUILD)/var/log/tegated
 rm -rf $(RAMFS)/tmp/
 mkdir $(RAMFS)/tmp
 dd if=/dev/zero of=$(RAMFS)/ramrootfs bs=1k count=36864
 mke2fs -F -m0 $(RAMFS)/ramrootfs
 mount -o loop -t ext2 $(RAMFS)/ramrootfs $(RAMFS)/tmp
 cp -av $(BUILD)/* $(RAMFS)/tmp
 umount $(RAMFS)/tmp
 cat $(RAMFS)/ramrootfs | gzip -9  $(IMGTGZ)
 /opt/eldk/usr/bin/mkimage -T ramdisk -C gzip -n DexGate filesystem
image -d $(IMGTGZ) $(RAMDSK)
 rm -rf $(RAMFS)/tmp/
 @echo 
 @echo Ramdisk image now in /tftpboot/ramdisk
 @echo 


In this way I'm able obtain a valid ramdisk image to download on my board
using ppcboot. giving the commands

bootp 0x250 /tftpboot/image
BOOTP broadcast 1
ARP broadcast 1
TFTP from server 10.0.0.4; our IP address is 10.0.0.20
Filename '/tftpboot/image'.
Load address: 0x250
Loading: #
 ###
done
Bytes transferred = 610742 (951b6 hex)
fec001 bootp 0x260 /tftpboot/ramdisk
BOOTP broadcast 1
ARP broadcast 2
TFTP from server 10.0.0.4; our IP address is 10.0.0.20
Filename '/tftpboot/ramdisk'.
Load address: 0x260
Loading: #
 #
 #
 #
 #
 #
 #
 #
 #
 #
done
Bytes transferred = 11645509 (b1b245 hex)
fec001 setenv bootargs root=/dev/ram rw
fec001 bootm 0x250 0x260

At this point the system boots and the kernel mounts the ram disk but at
time of rc.sysint script I have this error :

VFS: Mounted root (ext2 filesystem).
Freeing unused kernel memory: 60k init
INIT: version 2.78 booting

Mounting proc filesystem   :  [  OK  ]
Configuring kernel parameters  :  [  OK  ]
Setting clock : Wed Dec 31 19:00:15 EST 1969  [  OK  ]
Activating swap partitions :  [  OK  ]
Setting hostname 10.0.0.20 :  [  OK  ]
Checking root filesystem
/dev/ram:
The superblock could not be read or does not describe a correct ext2
filesystem.  If the device is valid and it really contains an ext2
filesystem (and not swap or ufs or something else), then the superblock
is corrupt, and you might try running e2fsck with an alternate superblock:
e2fsck -b 8193 device

[/sbin/fsck.ext2 (1) -- /] fsck.ext2 -a /dev/ram
fsck.ext2: Bad magic number in super-block while trying to open /dev/ram
[FAILED]

*** An error occurred during the file system check.
*** Dropping you to a shell; the system will reboot
*** when you leave the shell.
Give root password for maintenance
(or type Control-D for normal startup):


Notice that if  I write  rc.sysinit script to skip Checking root
filesystem I obtain the prompt but the syslogd deamon fails the startup.

From ELDK distribution I have changed /etc/fstab file in

/dev/ram/   ext2defaults   0 0
none/proc   procdefaults   0 0

and /etc/mtab file in

/dev/ram / ext2 rw 0 0
none /proc proc rw 0 0

Someone can say why fsck is not able to check ram fs and if the syslogd
problem is related to ram fs?

thanks to all,
Regards,
Alessandro.


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Network problem when using jtag debugger on EP8260

2003-11-21 Thread Steven Blakeslee

I've used an Abatron on the EP8260 and I never saw any network problems.

-Original Message-
From: Jeff Mintz [mailto:[EMAIL PROTECTED]
Sent: Thursday, November 20, 2003 8:17 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Network problem when using jtag debugger on EP8260



I am attempting to debug the Linux Kernel on an Embedded Planet 8260
board,
using a COP JTAG debugger.  I am encountering a behavior where when I
halt
the kernel, and resume, the kernel's ability to access the network seems
to
be disturbed.  I am wondering if anyone has seen something like this
before.

Let me clarify the problem:

[Case 1]
- I boot the Linux kernel (version 2.4.22, obtained from Embedded
Planet)
- When I get to the prompt, I halt the target using the debugger.  The
target always seems to halt at address 0x904.
- I resume the target.  A network access (such as ls) takes about 7
seconds, instead of being instantaneous.  (I'm not using a ramdisk, so
ls
uses NFS).
- If I halt and resume again, network access is slowed down even
further, certainly to the point of being unusable.

[Case 2]
- When I get to the prompt, I issue the command while(true); do true;
done which sets the kernel off and running infinitely (until I stop it
with Ctrl-C).
- Using the debugger, I halt the target.  I am not at 0x904, but
somewhere else, either in the kernel code, or in what seems to be a user

application page.
- I can stop, singlestep, resume, set and hit breakpoints using the
debugger.  When I finally stop the while loop, the network is fine.  All

of my debugging activity did nothing to disturb network access.

[Case 3]
- Same as Case 2.  This time, after halting the target, I set a
breakpoint on the first line in the function fcc_enet_rx.  I resume the
target.  This breakpoint is hit about 15 times, and then it is not hit
anymore.  When I attempt to stop the while loop, the network access has
been disturbed.

[Case 4]
- Same as Case 1.  This time, before I halt the target using the
debugger,
I unplug the ethernet cable.  Then I halt the target, and it is again
at 0x904.
- Now I resume the target using the debugger.
- Now I plug in the ethernet cable to the target again.
- Network accesses (i.e. ls) works fine.


My primary goal is to fix Case 1.  I do not want to lose network access
when I halt the kernel when it is idle.  Case 2 gives me hope that this
is possible, because this is a case where I can halt the Linux kernel
without disturbing the network access.

The JTAG debugger I am using is a Green Hills Probe.  I have also tried
with
an Agilent E5900B Emulation Probe and seen similar behavior.

Some questions:
- Has anyone seen this before?  If so, is there a known remedy or
workaround?  (For example, is there a kernel patch?  Is there a way to
recover from this slowed network state?)  If not, does anyone have
a theory to explain why I am seeing this behavior?
- Does this occur on the BDI2000 debugger?  I don't have access to one
of
those, but I hear that is the best JTAG debugger for Linux.  If anyone
can
easily try some of these test cases on other debuggers and let me know
the
results, that would be helpful.
- Is there any reason to think that the scenario I described in Case 1,
halting the target while at the shell prompt, is something that users
typically don't do (and hence, I shouldn't worry about it)?


Thanks in advance,
Jeff Mintz
Green Hills Software


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Silicon Motion VGA controllers and PPC architecture

2003-11-12 Thread Steven Blakeslee

I've had success with a sensoray card connected to a 405.

-Original Message-
From: Mark Powell [mailto:[EMAIL PROTECTED]
Sent: Wednesday, November 12, 2003 12:19 PM
To: llandre
Cc: linuxppc-embedded at lists.linuxppc.org
Subject: Re: Silicon Motion VGA controllers and PPC architecture



llandre wrote:


 I'm looking for a VGA controller to use with an embedded PPC405-based
 system.
 I had a look at the Silicon Motion chips (712/722) and they seem very
 suited for embedded applications.
 Unfortunately the techical support claims that these chips, because the
 presence of x86 BIOS, support only the x86 architecture. Anybody can
 confirm this?

We have used the 3DM/3DM+ and ran into this problem.
There is no documentation on how to initialise the chip and the
documentation that there is contains little description or explanation
and is just plain wrong in places.

--
Mark Powell, Senior Software Engineer, Primagraphics Limited
New Cambridge House, Litlington, nr.Royston, Herts, SG8 0SS, UK
Tel. +44 1763 85, Fax. 853324, http://www.primagraphics.co.uk


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RAMDISK problem

2003-11-11 Thread Steven Blakeslee

did you add a configuration line command like root=/dev/ram0

-Original Message-
From: Joao Vicente [mailto:[EMAIL PROTECTED]
Sent: Tuesday, November 11, 2003 10:45 AM
Subject: RAMDISK problem

I am struggling with a problem where I dont seem to be
able to mount a boot filesystem from a RAMDISK. I am using
the sample RAMDisk root filesystem available from Denx's
ftp://ftp.denx.de/pub/LinuxPPC/usr/src/SELF/images/ppc_82xx/

On the config file I have the following lines:
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y
CONFIG_CRAMFS=y
CONFIG_RAMFS=y
CONFIG_PROC_FS=y
CONFIG_DEVPTS_FS=y
CONFIG_EXT2_FS=y

I've browsed through a lot of threads relating to problems mounting the
root filsystem from RAM but I failed to see a similar symptom to this,
with a response.

I would appreciate any suggestion from perhaps somebody that has gone
through this problem already.

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405EP peripheral memory access

2003-10-29 Thread Steven Blakeslee

I would recommend you get the following books.


Embedded Linux: Hardware, Software, and Interfacing by Craig Hollabaugh

Linux Device Drivers, 2nd Edition by Alessandro Rubini, Jonathan Corbet

Building Embedded Linux Systems by Karim Yaghmour



-Original Message-
From: Paul Miller [mailto:[EMAIL PROTECTED]
Sent: Wednesday, October 29, 2003 9:08 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: 405EP peripheral memory access



Hi,

I am new to Linux embedded programming.  I have experience programming
microcontrollers and DSPs without an operating system, so I have some
idea what I'm doing.  Anyhow, I'm trying to use the peripheral memory
bus on my 405EP CerfCube from Intrinsyc.  Does anyone have an example
that I can work from?

To setup the memory's timings, I need access to the DCR register.  In
the PowerPC datasheet it says to use assembly instructions mtdcr and
mfdcr.  I don't know much about assembly, but I found a kernel patch
that uses these functions.  So, working off this patch, I tried making
a simple program to read these registers.  When I run it, Linux reports
an Illegal instruction and doesn't let me access the register.

Does access to this bus need to be done in kernel mode?  If so, where
can I find more information about writing a kernel driver?  Ideally,
I'd like to just open a device file and read/write to the bus.

Thanks!
-Paul


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PCI graphics cards for 405-based system

2003-10-22 Thread Steven Blakeslee

sensoray make a nice one.

-Original Message-
From: llandre [mailto:r[EMAIL PROTECTED]
Sent: Wednesday, October 22, 2003 11:34 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: PCI graphics cards for 405-based system



Hi all,

I'm looking for PCI graphics cards to plug in a 405-based system. Anybody
can suggest me boards that are supported by the 4xx processors?

Many thanks in advance and best regards,

llandre


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mpc8xx memory mapped 16550 extrenal uart driver

2003-10-03 Thread Steven Blakeslee

It's already in there.  drivers/char/serial.c

-Original Message-
From: Lokesh Kumar [mailto:[EMAIL PROTECTED]
Sent: Friday, October 03, 2003 9:02 AM
To: 'linuxppc-embedded at lists.linuxppc.org'
Subject: mpc8xx memory mapped 16550 extrenal uart driver



Hi gurus,

Does anybody know of a driver for an external 16550 memory mapped uart
driver for an mpc855 based board? Any help is appreciated?


Lokesh Kumar
Wireless Matrix USA Inc.
703-262-4032


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mpc8xx memory mapped 16550 extrenal uart driver

2003-10-03 Thread Steven Blakeslee

You can do the mapping anywhere you want, anywhere you do specific board
initialization is a good spot.  Check out
arch/ppc/platforms/sandpoint_setup.c
arch/ppc/platforms/sandpoint_serial.h
for an example on setting up the serial device.


-Original Message-
From: Lokesh Kumar [mailto:[EMAIL PROTECTED]
Sent: Friday, October 03, 2003 9:26 AM
To: 'Steven Blakeslee'; Lokesh Kumar;
'linuxppc-embedded at lists.linuxppc.org'
Subject: RE: mpc8xx memory mapped 16550 extrenal uart driver


Hi Steven,
Thanks for the quick reply. I did look at serial.c, however, i did not find
where do we map the device to the memory i.e. where are we doing chip select
setting and stuff. I saw that being done for CONFIG_SERIAL_TTTECH. Is that
what you are referring to or I am missing the point completely?

Lokesh

-Original Message-
From: Steven Blakeslee [mailto:[EMAIL PROTECTED]
Sent: Friday, October 03, 2003 9:16 AM
To: 'Lokesh Kumar'; 'linuxppc-embedded at lists.linuxppc.org'
Subject: RE: mpc8xx memory mapped 16550 extrenal uart driver


It's already in there.  drivers/char/serial.c

-Original Message-
From: Lokesh Kumar [mailto:[EMAIL PROTECTED]
Sent: Friday, October 03, 2003 9:02 AM
To: 'linuxppc-embedded at lists.linuxppc.org'
Subject: mpc8xx memory mapped 16550 extrenal uart driver



Hi gurus,

Does anybody know of a driver for an external 16550 memory mapped uart
driver for an mpc855 based board? Any help is appreciated?


Lokesh Kumar
Wireless Matrix USA Inc.
703-262-4032


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MPC823 and LCD?

2003-09-30 Thread Steven Blakeslee

It should work on all 823E boards.  Specific support for your LCD may be
required.

-Original Message-
From: Steven Scholz [mailto:[EMAIL PROTECTED]
Sent: Tuesday, September 30, 2003 7:18 AM
To: Steven Blakeslee
Cc: Linuxppc-Embedded
Subject: Re: MPC823 and LCD?


Steven,

 1. Has someone a working driver for linux  2.4.20?
 check out drivers/video/rpxfb.c

Thanks for that hint.
Is this driver in any way special to RPX boards?
Or could we make it available to other MPC823 boards as well?

IIRC the lcd823.c driver in DENX kernel is quite generic.

Thanks,

Steven


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MPC823 and LCD?

2003-09-29 Thread Steven Blakeslee

check out drivers/video/rpxfb.c

-Original Message-
From: Steven Scholz [mailto:[EMAIL PROTECTED]
Sent: Monday, September 29, 2003 11:52 AM
To: Linuxppc-Embedded
Subject: MPC823 and LCD?



Hi there,

two questions about MPC823 and LCD:

1. Has someone a working driver for linux  2.4.20?
2. what's the difference between lcd823.c and video823.c in linux-2.4.4 from
DENX?

Thanks,

Steven


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64-bit Data Flash Access Problem [MPC8245]

2003-09-24 Thread Steven Blakeslee

Are you sure you are not using software floating points?

-Original Message-
From: Augustine Nebu Philips [mailto:[EMAIL PROTECTED]
Sent: Wednesday, September 24, 2003 1:05 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: 64-bit Data Flash Access Problem [MPC8245]



Hi
I have a set of 8 1GB data flash chips (Samsung) on an MPC8245 Ref. Board.
These are on a 64-bit bus-mode.

---DBUS_SIZ[0-1]:DBUS_SIZ[2] = 110b ---

All 8 chips are selected by a single chip select (RCS1). Trying a 32-bit
read from the Data Address Location after giving the Command to Access the
flash IDs, only 4 flashes on a common byte lane seem to be responding.
32-bit writes appear only on the DH[0-31] and not on DL[0-31].

I am not very clear as to:

(a) How do we perform writes to send out data out on
all 64-bits of the bus..?
(b) How would we ideally access 64-bit data through 32-bit reads..?
(c) Or must we *have* 64- bit read/write
instructions..?

many thanks in advance for any response ..

Regards
Nebu


Need a new email address that people can remember
Check out the new EudoraMail at
http://www.eudoramail.com


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64-bit Data Flash Access Problem [MPC8245]

2003-09-24 Thread Steven Blakeslee

It sounded like the problem you were describing is caused by software
floating points.  If the bus size is 64bit then you must write 64bit.
Software floating points cheat this by doing two consecutive 32bit writes,
the 8245 will not allow this.

-Original Message-
From: Augustine Nebu Philips [mailto:[EMAIL PROTECTED]
Sent: Wednesday, September 24, 2003 1:35 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: RE: 64-bit Data Flash Access Problem [MPC8245]



Steve,
 I tried to use fp assembly instructions (like lfd). But my assembler has
problems and doesnt let me generate my binary. I'm sorry I couldnt properly
get you... Should I make use of sw floating points..? That means, should I
access 64-bit data only through 64-bit operations..?

Thanks and Regards
Nebu
- Original Message -

DATE: Wed, 24 Sep 2003 13:31:50
From: Steven Blakeslee [EMAIL PROTECTED]

Are you sure you are not using software floating points?


Subject: 64-bit Data Flash Access Problem [MPC8245]



Hi
I have a set of 8 1GB data flash chips (Samsung) on an MPC8245 Ref. Board.
These are on a 64-bit bus-mode.

---DBUS_SIZ[0-1]:DBUS_SIZ[2] = 110b ---

All 8 chips are selected by a single chip select (RCS1). Trying a 32-bit
read from the Data Address Location after giving the Command to Access the
flash IDs, only 4 flashes on a common byte lane seem to be responding.
32-bit writes appear only on the DH[0-31] and not on DL[0-31].

I am not very clear as to:

(a) How do we perform writes to send out data out on
all 64-bits of the bus..?
(b) How would we ideally access 64-bit data through 32-bit reads..?
(c) Or must we *have* 64- bit read/write
instructions..?

many thanks in advance for any response ..

Regards
Nebu


Need a new email address that people can remember
Check out the new EudoraMail at
http://www.eudoramail.com





Need a new email address that people can remember
Check out the new EudoraMail at
http://www.eudoramail.com


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mpc8xx CPM timer usage

2003-09-03 Thread Steven Blakeslee

The usb driver at http://www.heeltoe.com/software/usb/usb.html uses the
timers.

-Original Message-
From: Robin Gilks [mailto:[EMAIL PROTECTED]
Sent: Tuesday, September 02, 2003 11:42 PM
To: linuxppc mail list
Subject: mpc8xx CPM timer usage



Greetings

Does anyone know of any 'standard' Linux drivers that make use of any of
the 4 CPM timers?

I just want to check before the hardware guys caste our i/o lines into
stone :-))

Many thanks

--
Robin Gilks
Senior Design Engineer  Phone: (+64)(3) 357 1569
Tait ElectronicsFax  :  (+64)(3) 359 4632
PO Box 1645 ChristchurchEmail : robin.gilks at tait.co.nz
New Zealand


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Heretical Question

2003-07-09 Thread Steven Blakeslee

ddd will let you specify a gdb debugger to use. You have to add -g -ggdb to
the CFLAGS and compile the kernel.  Then give the command

ddd --debugger ppc_8xx-gdb vmlinux

Replace ppc_8xx-gdb with your debugger of choice, gdb is the default if you
do not specify.

-Original Message-
From: Kent Borg [mailto:[EMAIL PROTECTED]
Sent: Wednesday, July 09, 2003 3:57 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Heretical Question



I know it is wrong for me to ask, but is there (possibly already
lurking in my Red Hat box?) a graphical front end to GDB that will
work with embedded programming?  Emacs already lets me debug with
source code pretty well (not assembly, however), and that is nice, but
what I really miss is a way to browse through data structures.  Kdbg
looks good, but it seems to be for native debugging only (though I
might hack at it a little to issue the elusive target remote ...).
It is possible ddd would do, but it also seems to be for native
debugging only too.

Suggestions?


Thanks,

-kb


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Heretical Question

2003-07-09 Thread Steven Blakeslee

I've used insight on cygwin with an Abatron BDI 2000.  It seemed to work ok.

-Original Message-
From: Kenneth Johansson [mailto:[EMAIL PROTECTED]
Sent: Wednesday, July 09, 2003 4:53 PM
To: Kent Borg
Cc: linuxppc-embedded at lists.linuxppc.org
Subject: Re: Heretical Question



On Wed, 2003-07-09 at 21:57, Kent Borg wrote:

 I know it is wrong for me to ask, but is there (possibly already
 lurking in my Red Hat box?) a graphical front end to GDB that will
 work with embedded programming?  Emacs already lets me debug with
 source code pretty well (not assembly, however), and that is nice, but
 what I really miss is a way to browse through data structures.  Kdbg
 looks good, but it seems to be for native debugging only (though I
 might hack at it a little to issue the elusive target remote ...).
 It is possible ddd would do, but it also seems to be for native
 debugging only too.

 Suggestions?


http://sourceware.redhat.com/insight/

Never tried but since this is the old cygnus stuff it really should do
cross debugging well.


--
Kenneth Johansson
Ericsson AB   Tel: +46 8 719 70 20
Tellusborgsv?gen  90  Fax: +46 8 719 29 45
126 25 Stockholm  ken at switchboard.ericsson.se


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Problems in booting kernel from bootloader.

2003-07-03 Thread Steven Blakeslee

Also, make sure the SYPCR is disabled.

-Original Message-
From: Muhammad Sarwar [mailto:[EMAIL PROTECTED]
Sent: Thursday, July 03, 2003 8:14 AM
To: nbasker at india.tejasnetworks.com;
linuxppc-embedded at lists.linuxppc.org
Subject: RE: Problems in booting kernel from bootloader.



If you are using EP8260 version 1.3, you need to enable PIPELINE in the
planet core boot loader.
In planet core:
PIPELINE=1
STO

Regards,

Muhammad Sarwar
Mangrove Systems Inc.

-Original Message-
From: [EMAIL PROTECTED]
[mailto:nbasker at india.tejasnetworks.com]
Sent: Wednesday, July 02, 2003 11:18 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Fwd: Problems in booting kernel from bootloader.


Hi,


 I am having an EP8260 board. And I got a zImage binary from TimeSys
linux(2.4.7). The board comes with a bootloader and diagnostics.

 The TimeSys linux gives me a binary called
zImage.initrd.bin-2.4.7-timesys-3.1.180-ep8260.


 I am trying to boot the kernel using the bootloader given by the
PlanetCore guys. The kernel was the one which I got from TimeSys. But
this
kernel doesn't come up(It hangs).


Then I tried modifying a few lines of
assembly code(arch/ppc/boot/mbx/head_8260.S) to find the problem. The
board always goes for a reset when I run my code. I get the initial
prints
regarding the



loaded at: 0080 0080C27C
relocated to:  0040 0040C27C
board data at: F0003000 F0003034
relocated to:  0040C148 0040C17C
zimage at: 0080C27C 008C6253
avail ram: 008C7000 0400

And then the Uncompress kerneland Now booting kernel prints are seen
and then the board goes for a reset.


 The embed_config, decompress_kernel functions are run correctly. I
could
come to this conclusion from the dump of the first few bytes of
memory. These were exactly identical to the disassembled code of
vmlinux.

The head_8260.S is followed by the head.S code in arch/ppc/kernel. What
I
found is that I am able to jump to the diagnostics of the PlanetCore
just
before entering the _start of arch/ppc/kernel. But I am not able to
jump
to the diagnostics just after entering the _start of the kernel
head.S.



How do I debug this problem, I know that the first few bytes of SDRAM
are
exactly what was expected. These values I dumped. Then what is the
problem
in jumping to that location. With my binary, the board goes for a reset.

Please help.
Nicholas

-
This mail sent through Tejasnetworks Webclient


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EP405 network interface

2003-07-02 Thread Steven Blakeslee

You need to look at the board's user manual.  There is a section called
Board Control and Status Registers

-Original Message-
From: Toni Van Remortel [mailto:[EMAIL PROTECTED]
Sent: Wednesday, July 02, 2003 10:25 AM
To: Steven Blakeslee
Cc: PPC Mailinglist
Subject: RE: EP405 network interface


How and where?

I found that the PHY address in the manual is 0b0 and in the code
PPC405_PCI_PHY_MEM_BASE is set to 0x8000.


Op do 26-06-2003, om 20:39 schreef Steven Blakeslee:
 Did you enable the phy in the Board Control Status Register?

 -Original Message-
 From: Toni Van Remortel [mailto:t.vanremortel at ha.be]
 Sent: Thursday, June 26, 2003 10:01 AM
 To: PPC Mailinglist
 Subject: EP405 network interface



 Hi all,

 I cannot get the NIC working on my EP405. I used the ep405_config from
 the linuxppc_2_4_devel tree.

 This is a part of the output:

 ...
 loop: loaded (max 8 devices)
 eth0: No PHY device found.
 removing net dev
 ...

 So it seems that the kernel doesn't find the NIC (but it is there, and
 working, ep-bootloader can use it to download the image).

 Anybody an idea?

 I already checked the NIC support, and the onboard-IBM NIC support is
 enabled.

 Regards,
 --
Toni Van Remortel
   Wetenschappelijk Medewerker - D-science lab
  Tel: 03 205 61 72 - Fax: 03 205 61 95
   E-mail: t.vanremortel at ha.be




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EP405 network interface

2003-06-26 Thread Steven Blakeslee

Did you enable the phy in the Board Control Status Register?

-Original Message-
From: Toni Van Remortel [mailto:[EMAIL PROTECTED]
Sent: Thursday, June 26, 2003 10:01 AM
To: PPC Mailinglist
Subject: EP405 network interface



Hi all,

I cannot get the NIC working on my EP405. I used the ep405_config from
the linuxppc_2_4_devel tree.

This is a part of the output:

...
loop: loaded (max 8 devices)
eth0: No PHY device found.
removing net dev
...

So it seems that the kernel doesn't find the NIC (but it is there, and
working, ep-bootloader can use it to download the image).

Anybody an idea?

I already checked the NIC support, and the onboard-IBM NIC support is
enabled.

Regards,
--
   Toni Van Remortel
  Wetenschappelijk Medewerker - D-science lab
 Tel: 03 205 61 72 - Fax: 03 205 61 95
  E-mail: t.vanremortel at ha.be


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Booting CLLF ppc862 board from flash

2003-06-02 Thread Steven Blakeslee

The Embedded Planet boards ship with a documentation CD that contains an
executable called the Planet Core FLASH burner.  This program will allow you
to burn the Linux kernel to FLASH.  Most Linux kernels have a small boot
section that is smart enough to copy the kernel to the location it was
compiled for and boot it.

-Original Message-
From: XOL [mailto:[EMAIL PROTECTED]
Sent: Sunday, June 01, 2003 7:02 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Booting CLLF ppc862 board from flash



Hello.
Sorry for my probably stupid question.
I'm new in embedded field.

I have CLLF ppc862 board from EmbeddedPlanet.
I have it running booting from tftp with root fs NFS mounted
on one of the desktop Linux PC.

Now I want to get it running in standalone mode from Flash.
My board has PCMCIA connector with Flash Card adapter. I have
flash card of 64K. Also there are on-board flash 64K and 32K RAM.
Are there any step-by-step howto about this issue.
Thank you in advance.
Best Regards.


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Embedded Planet SBC860H

2003-05-30 Thread Steven Blakeslee

The EP8xx is the same as a CLLF BW31 but it has SDRAM instead of DRAM.

-Original Message-
From: Karim Yaghmour [mailto:[EMAIL PROTECTED]
Sent: Friday, May 30, 2003 1:42 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Embedded Planet SBC860H



I was wondering whether anyone had experience running Linux and
U-Boot on an Embedded Planet SBC860H? I suppose it ought to be
quite similar to the RPX boards ... I just don't see an SBC860H
item in the kernel config or in U-Boot ... so just making sure.

Thanks,

Karim

--
Author, Speaker, Developer, Consultant
Pushing Embedded and Real-Time Linux Systems Beyond the Limits
http://www.opersys.com || karim at opersys.com || 514-812-4145


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BDI2000 config repository

2003-05-09 Thread Steven Blakeslee

ftp://ftp.denx.de/pub/BDI2000/


-Original Message-
From: Curtis, Allen [mailto:[EMAIL PROTECTED]
Sent: Friday, May 09, 2003 2:03 PM
To: 'linuxppc-embedded at lists.linuxppc.org'
Subject: BDI2000 config repository



I know there was talk about this, is there a repository for BDI2000 platform
configuration files?


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MPC860 and I2C

2003-05-08 Thread Steven Blakeslee

Are you sure you need to use the relocation patch?

-Original Message-
From: Eitan Rabin [mailto:[EMAIL PROTECTED]
Sent: Thursday, May 08, 2003 3:04 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: MPC860 and I2C



Hi All,

I'm trying to use the MPC I2C controller to generate I2C transactions. I
use  the devel kernel version and include the I2C relocation patch (seen
in /var/log/messages).

I used the standard I2C driver and also tried the driver downloaded
directly from lmsensors.

The problem occurs when I activate the master. As soon as I give the
master the start command (i2c-i2c_i2com = 0x80) for the DMA transaction
to start the CPU complete freezes.
I narrowed the problem and found out the it is actually the address of the
descriptor the one causing the CPU to hang. If I give addresses that are
relatively small, few Kilos, then everything is OK. If I give addresses
that are given to me by kmalloc and translated properly then the cpu
hangs.

It seems to me that maybe something is wrong with the SDMA
configuration.

The cards I'm using are CLLF from embedded planet.


Any assistance will be highly appreciated.

Thanks.

Eitan.


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Kernel panic: eth0: PHY id 0x31903190 is not supported!

2003-04-30 Thread Steven Blakeslee

I've booted the linuxppc_2_4_devel tree on the EP405PC and the ethernet
worked fine.

-Original Message-
From: Andrew H Pham [mailto:[EMAIL PROTECTED]
Sent: Wednesday, April 30, 2003 5:43 PM
To: linuxppc-embedded at lists.linuxppc.org; akuster at mvista.com;
BlakesleeS at embeddedplanet.com
Subject: Kernel panic: eth0: PHY id 0x31903190 is not supported!






Hi,

I loaded a 2.4.18 linux kernel onto my ICE Planet box ( a PPC box with EP
405PC board and a 405GP chip) but when the kernel uncompresses itself and
tries to start up I got the an error message:

A screen shot:
...
relocated to:  00494128 00494144
zimage at: 004059F8 00493747
avail ram: 00498000 0400
Linux/PPC load: console=ttyS0,9600 console=tty0 init=/bin/ash root=/dev/nfs
nfsp
Uncompressing Linux...done.
Now booting the kernel
Linux version 2.4.18-rc4 (root at sunflower2.austin.ibm.com) (gcc version
3.2.3 203
On node 0 totalpages: 16384
zone(0): 16384 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: console=ttyS0,9600 console=tty0 init=/bin/ash
root=/dev/nfp
Calibrating delay loop... 199.88 BogoMIPS
Memory: 63124k available (1004k kernel code, 292k data, 72k init, 0k
highmem)
Dentry-cache hash table entries: 8192 (order: 4, 65536 bytes)
Inode-cache hash table entries: 4096 (order: 3, 32768 bytes)
Mount-cache hash table entries: 1024 (order: 1, 8192 bytes)
Buffer-cache hash table entries: 4096 (order: 2, 16384 bytes)
Page-cache hash table entries: 16384 (order: 4, 65536 bytes)
POSIX conformance testing by UNIFIX
PCI: Probing PCI hardware
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
NTFS driver v1.1.22 [Flags: R/O]
i2c-core.o: i2c core module
Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ
SERIAL_PCI ed
ttyS00 at 0xef600300x (irq = 0) is a 16550A
ttyS01 at 0xef600400x (irq = 1) is a 16550A
block: 128 slots per queue, batch=32
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
loop: loaded (max 8 devices)
Kernel panic: eth0: PHY id 0x31903190 is not supported!

 0Rebooting in 180 seconds..NULL

PPC4xx PlanetCore Boot Loader v1.07
Copyright 1998-2003 Embedded Planet, LLC. All rights reserved.
...

I did some debuggings and found that the error message  eth0: PHY id
0x31903190 is not supported! is generated by the file ibm.ocp_phy.c
within the kernel source code.

Has anyone encountered this problem before?  I am just curious if my
ethernet card is bad or it is not supported by this kernel.

Any help is appreciated.

Andy

p.s. ibm.ocp.phy.c is attached below.

(See attached file: ibm_ocp_phy.c)

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Start address for ICE Planet, EP405PC

2003-04-28 Thread Steven Blakeslee

If you are using an srec or binary file then the start address is the same
as the one you load to.  If you are using an elf file the start address is
the load address + 0x1.

-Original Message-
From: Andrew H Pham [mailto:[EMAIL PROTECTED]
Sent: Friday, April 25, 2003 6:01 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Start address for ICE Planet, EP405PC



Hi,

I am trying to tftp load a kernel image into memory and boot it; however, I
don't know what address to set the Start variable to.
Start is the address where the boot loader goes to and executes when you
issues the go command using the boot loader v1.03
In another the word, does anyone know what is the offset is for the ppc
kernel?  Let say the image is stored starting at address 20,
what address should i jump to so execution can begin (200???)?

Thanks in advance for any help,
Andy


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SPI again

2003-04-18 Thread Steven Blakeslee

Actaully you are using the I2C.  Early in the boot Linux uses the I2C to
read configuration keys from the onboard EEPROM.

-Original Message-
From: Stefano Bodini [mailto:[EMAIL PROTECTED]
Sent: Friday, April 18, 2003 11:26 AM
To: 'linuxppc-embedded at lists.linuxppc.org'
Subject: SPI again



Hi

I spent a lot of time searching on the net and in this mailing list about a
problem I'm having with the SPI but so far the information I found didn't
help me too much (I found great suggestions anyway)... I really needs
suggestions.
I'm working on an Embedded Planet Card (CLX), PPC860 with the kernel 2.4.17
from MontaVista (Hard Hat Pro 2.1).

I'm developing a kernel module that include also the SPI, i.e. I have my
code to handle the SPI, I'm not using the device driver for the SPI inside
the kernel.
So I'm using ioremap (I also used ioremap_nocache) to obtain the DPR and
register area for the SPI, I allocate the BDs with the help of the
m8xx_cpm_dpalloc() function (I've not yet applied the patches to allow the
release of the DPR allocated, but at the moment is ok).

Is important to know that the SPI management I'm trying to use under Linux,
is working under other platforms (for example VxWorks, PsOS, MQX, ecc.),
i.e. I'm confident about how to program and use the SPI itself.

All seems ok, all the registers and DPR area contains the expected values.
The problem is that when I fire the SPI I can see only 1 clock coming out
on the SPICLK pin. And no data are sent out to the other SPI pins.

Ah, the Hw is ok. Same hardware with different platform/OS is working fine.

I tried to compile the kernel with and without the RISC patches for the SPI
(beside I'm using SCC1 for ethernet and not using I2C at all) and of course
modifying the SPI driver accordingly.
No way, I continue to see only 1 clock coming out every time I fire the SPI.

So .. anybody has some suggestions about what can be ?

Thanks in advance !!!

C'ya
Steve


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Linux training

2003-04-04 Thread Steven Blakeslee

I was wondering if anyone can direct me to training courses on porting
embedded Linux to single board computers.  Thank you for any direction and I
welcome all comments.

Steven Blakeslee

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USB on RPXLite-DW w/ ppc-823e + ELDK

2003-03-25 Thread Steven Blakeslee

If you look at Board Control Status Register 2 of the LITE DW you will see
that bit 21 allows you to route PA7 to PC15.  This allows you to apply a
1KHz signal on PC15.  The microcode patch uses this 1KHz signal to generate
an SOF.

-Original Message-
From: curt brune [mailto:[EMAIL PROTECTED]
Sent: Monday, March 24, 2003 9:10 PM
To: Linuxppc-Embedded (E-mail)
Subject: USB on RPXLite-DW w/ ppc-823e + ELDK



Hello,

I am trying to get USB working on an RPXLite board with a 823e
processor.  I am using the ELDK 2.4.4 kernel from CVS -- in
arch/ppc/8xx_io/ I see several files (uart.c, micropatch.c, etc.) that
depend on CONFIG_USB_MPC8xxx, but I do not see how to set
CONFIG_USB_MPC8xxx from make menuconfig.

I am also wondering about a potential hardware modification required
to make the USB work on the RPXLite -- from a previous posting to this
list I read:

 The 823e, and newer 850 (Rev. B) processors have some modifications
 to better allow USB host support. These require some external
 support (looping a clock back to the I/O pin) and the downloading of
 a microcode patch for properly generating SOF timing.

Is this modification still necesarry?  Does anyone know the details?

Cheers,
Curt


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SCC3 UART for MPC850

2003-03-03 Thread Steven Blakeslee

Are you sure that particular variant of the 850 processor has an SCC3?

-Original Message-
From: Donald MacArthur [mailto:[EMAIL PROTECTED]
Sent: Monday, March 03, 2003 8:53 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: SCC3 UART for MPC850



I am currently working with an embedded planet LICCE MPC850 Credit card
board with the associated MPC860 Timesys Linux Kernel.  I would like to use
as many SCC and SMC channels for UARTs as possible.  I have successfully
enabled SMC1, SMC2, and SCC2 for UART but SCC3 does not work.  Normally for
the UART channels the TX lines go high when the kernel boots but the SCC3 Tx
channel does not.  Does anyone know of modifications required for the kernel
to get SCC3 to work as a UART or were possible conflicts might arise?

Thank You
Don MacArthur
dmacarth at ufl.edu


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Good Books

2003-02-28 Thread Steven Blakeslee

I highly recommend this book.

-Original Message-
From: Dr. Craig Hollabaugh [mailto:[EMAIL PROTECTED]
Sent: Thursday, February 27, 2003 9:24 PM
To: john at corelis.com; linuxppc-embedded at lists.linuxppc.org
Subject: Re: Good Books



At 05:05 PM 2/27/2003 -0800, John Chan wrote:

Hello, Folks,

I am looking for reference books which are related to PPC 440GP or/and
embedded PPC or/and Linux on PPC. Do you have any suggestion?

John,

My book, Embedded Linux: Hardware, Software and Interfacing, uses a PPC860
(Embedded Planet RPX-CLLF) in numerous interfacing examples. This might help
with general PPC issues, not specifically the 440 though.

Craig




___
Dr. Craig Hollabaugh   craig at hollabaugh.com
Author of Embedded Linux

P.O. Box 1405
Ouray, CO 81427-1405See my kitchen sink resume at
970 325 4810 homewww.hollabaugh.com/resume.html
970 325 0509 office


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Hung kernel on EP405?

2003-02-17 Thread Steven Blakeslee

I have used the http://ppc.bkbits.net:8080/linuxppc_2_4_devel tree on the
ep405.  I have a .config file if you would like it.

-Original Message-
From: [EMAIL PROTECTED]
[mailto:Phillip.Treddenick at colorado.edu]
Sent: Sunday, February 16, 2003 2:38 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Hung kernel on EP405?



I am having trouble running Monta Vista Hardhat Linux on an EP405 board with
Solaris 2.7 as the host.  I'm using the Planetcore bootloader to download
the
kernel to the board, but when I run the kernel it appears to hang.  I would
like
to know if there is a way to verify what it's doing?  I've tried rlogin and
I've
tried pinging it, but I don't get any response.  The kernel is setup to
mount a
NFS, but I don't know how to verify that that is working either.  I tried
enabling the ethernet port by setting the board control and status
registers.
That didn't seem to work.  Do these registers have specific settings
necessary
for running the EP405 board?

Any help or insight is appreciated.
Thanks, Phill Treddenick
treddeni at colorado.edu


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question about first packet received by mpc8260

2003-02-14 Thread Steven Blakeslee

I've done a search of the mailing list but I did not find anything related
to my question.  I have found on my companies MPC 8260 board that the first
packet sent to the Ethernet when initialized is never received.  At first I
thought the network interface had not come up fully so I put a large delay
between the FCC3 Ethernet init and the reading for the first packet.  Also,
I have tried reading packets for several seconds then sending it a packet,
it still does not receive it.  It seems to receive every packet after the
first one.  Has anyone seen something like this.

Thank you,
Steven Blakeslee

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Arriba ELE

2003-02-06 Thread Steven Blakeslee

The company I work for decided not to resell Arriba.  It is overly
complicated and not very stable.  Instead of developing Linux on a Windows
computer invest in a Linux computer and a BDI2000.

-Original Message-
From: Kerl, John [mailto:[EMAIL PROTECTED]
Sent: Thursday, February 06, 2003 12:13 PM
To: 'linuxppc-embedded at lists.linuxppc.org'
Subject: Arriba ELE



Can anyone comment on Arriba Embedded Linux Edition
from Viosoft?  Any positive or negative experiences?

Thanks.


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Howto install bootloader using jtag?

2003-01-30 Thread Steven Blakeslee

The first thing you do is create an appropriate config file for the debugger
and board.  If you go to ftp://ftp.denx.de/pub/BDI2000/ you can get Abatron
BDI config files for the ep405 board.  You run this script then download the
pcl.ep file that is on the documentation CD.  This file executes at
location 0x10 and will burn the bootloader into flash.

It is important to note that the JTAG/COP connector on the ep405 ships with
the COP enabled, not the JTAG.  There is very little difference between JTAG
and COP but this can mess people up under certain circumstances.  I have
used the Abatron BDI 2000, Macraigor RAVEN, Macraigor OCDemon and the IBM
RiscWatch.

-Original Message-
From: Michael Washburn [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 29, 2003 10:51 PM
To: nitesh_ppc at lycos.com; linuxppc-embedded at lists.linuxppc.org
Subject: Re: Howto install bootloader using jtag?



Depending on what JTAG debugger you're using, there should be a way to
download and execute the S-Rec file (usually a .mot file). The bootloader
file provided by Emdedded Planet is actually an executable that contains the
boot loader image. You should be able to download and execute it in one
simple step.

Mike Washburn
- Original Message -
From: Nitesh Goyal [EMAIL PROTECTED]
To: linuxppc-embedded at lists.linuxppc.org
Sent: Wednesday, January 29, 2003 9:45 PM
Subject: Howto install bootloader using jtag?



 Hi,
 I'm using a IBM PPC 405GP board(from embeddedplanet) I accidently
 deleted the bootloader.

 I have the bootloader srecord image on my host, but I do not know how to
 burn it on board using JTAG ?

 Is there a utility available that I can use on host to download the
 bootloader image to tbe board ?

 Thanks,
 NItesh





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Can software discover MPC8xx variant?

2003-01-29 Thread Steven Blakeslee

Or you could set it in some type of data structure in your bootloader.  No
hardware change this way.

-Original Message-
From: Leonardo Pereira Santos [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 29, 2003 11:30 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Re: Can software discover MPC8xx variant?




As the 8xx family is supported by the kernel, I assume that what you want is
to know if the 8xx processor running supports some feature? If this is the
case, I can tell you how to do it the way I'd.
You can define some ioport with pull-up and pool-down resistors and in the
manufacturing process specifiy if this board is for product A, then you
should use MPC850DSL and you will mount some of the pull-ups and pull-downs.
If the board is for product B, then you should mount MPC850SAR and mount
differently the pull-ups and downs. By reading the value on the selected
pins, you might de able to know what board this is. This scheme can also be
used to know what hardware revision your board have.

On Wednesday 29 January 2003 12:13, Marius Groeger wrote:
 On Wed, 29 Jan 2003, Alex Zeffertt wrote:
  Can anybody tell me if there is a way to identify which processor from
  the MPC8xx family software is running on.  I hoped I could use the IMMR
  special purpose register.  However, this only tells you the silicon
  revision, which can have the same value even if the processors are
  different!
 
  Does the processor type (e.g. 862, 857T, 857DSL) reside anywhere in the
  processor?

 U-Boot/PPCboots cpu/mpc8xx/cpu.c contains a lot of generic type
 detection code, but even there the assumes that the basic type is
 known at compile time.

 Regards,
 Marius


---
-- Marius Groeger   SYSGO Real-Time Solutions AG
 mgroeger at sysgo.de Software Engineering Embedded and Real-Time Software
   www.sysgo.de Voice: +49-6136-9948-0   Am Pfaffenstein 14
 www.osek.de FAX:   +49-6136-9948-10  55270 Klein-Winternheim, Germany
 www.elinos.com

- --

Leonardo Pereira Santos
Engenheiro de Projetos
PD3 Tecnologia
av. Par? 330/202
(51) 3337 1237

Today Fortune tells us:
Are you scared of speed? If so, try Windows NT.


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/





Can software discover MPC8xx variant?

2003-01-29 Thread Steven Blakeslee

I'm guessing you've never worked with a contract manufacturer.  :) jk

-Original Message-
From: Leonardo Pereira Santos [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 29, 2003 12:15 PM
To: Steven Blakeslee
Cc: linuxppc-embedded at lists.linuxppc.org
Subject: Re: Can software discover MPC8xx variant?



Ok, but in this case the hardware itself wouldn't know waht revision or
whatever it is. And they already have to change the processor, so you have
to
change the hardware anyway, mount or not a few resistors shouldn't be hard.

On Wednesday 29 January 2003 15:02, you wrote:
 Or you could set it in some type of data structure in your bootloader.  No
 hardware change this way.

 -Original Message-
 From: Leonardo Pereira Santos [mailto:lsantos at pd3.com.br]
 Sent: Wednesday, January 29, 2003 11:30 AM
 To: linuxppc-embedded at lists.linuxppc.org
 Subject: Re: Can software discover MPC8xx variant?




 As the 8xx family is supported by the kernel, I assume that what you want
 is to know if the 8xx processor running supports some feature? If this is
 the case, I can tell you how to do it the way I'd.
 You can define some ioport with pull-up and pool-down resistors and in the
 manufacturing process specifiy if this board is for product A, then you
 should use MPC850DSL and you will mount some of the pull-ups and
 pull-downs. If the board is for product B, then you should mount MPC850SAR
 and mount differently the pull-ups and downs. By reading the value on the
 selected pins, you might de able to know what board this is. This scheme
 can also be used to know what hardware revision your board have.

 On Wednesday 29 January 2003 12:13, Marius Groeger wrote:
  On Wed, 29 Jan 2003, Alex Zeffertt wrote:
   Can anybody tell me if there is a way to identify which processor from
   the MPC8xx family software is running on.  I hoped I could use the
IMMR
   special purpose register.  However, this only tells you the silicon
   revision, which can have the same value even if the processors are
   different!
  
   Does the processor type (e.g. 862, 857T, 857DSL) reside anywhere in
the
   processor?
 
  U-Boot/PPCboots cpu/mpc8xx/cpu.c contains a lot of generic type
  detection code, but even there the assumes that the basic type is
  known at compile time.
 
  Regards,
  Marius


---

 -- Marius Groeger   SYSGO Real-Time Solutions AG
  mgroeger at sysgo.de Software Engineering Embedded and Real-Time
  Software www.sysgo.de Voice: +49-6136-9948-0   Am Pfaffenstein 14
  www.osek.de FAX:   +49-6136-9948-10  55270 Klein-Winternheim, Germany
  www.elinos.com

 - --

 Leonardo Pereira Santos
 Engenheiro de Projetos
 PD3 Tecnologia
 av. Par? 330/202
 (51) 3337 1237

 Today Fortune tells us:
 Are you scared of speed? If so, try Windows NT.


- --

Leonardo Pereira Santos
Engenheiro de Projetos
PD3 Tecnologia
av. Par? 330/202
(51) 3337 1237

Today Fortune tells us:
Is knowledge knowable?  If not, how do we know that?

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/





wireless lan PCMCIA card advice

2003-01-06 Thread Steven Blakeslee

I've heard of success with the Cisco Aironet 340.

-Original Message-
From: curt brune [mailto:[EMAIL PROTECTED]
Sent: Monday, January 06, 2003 3:51 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: wireless lan PCMCIA card advice



Hello,

I have a RPXLite 823e based board from EmbeddedPlanet that has an open
PCMCIA slot in it.  Currently I am booting a 2.4.4 kernel from ELDK
which works just fine.

I would like to buy a wireless 802.11b PCMCIA card for this board and
am wondering about any past experiences.  I have researched the
general linux+WiFi webistes a bit, but I wanted the embedded society's
opinion also.

Any success stories out there?  If so could you include the following
info?

  embedded board:
  PCMCIA hardware:
  PCMCIA vendor:
  driver used:
  kernel version:

I appreciate your help.  Please CC: me on the replies.

Cheers,
Curt


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use bdi on board with ppcbug

2002-12-20 Thread Steven Blakeslee

Good point.

-Original Message-
From: Wolfgang Denk [mailto:[EMAIL PROTECTED]
Sent: Friday, December 20, 2002 12:11 PM
To: Steven Blakeslee
Cc: ??; linuxppc-embedded at lists.linuxppc.org
Subject: Re: use bdi on board with ppcbug


In message D73A25AA6E54D511AD74009027B1110F3C050D at ORION you wrote:
 Also, wouldn't the INIT section of the config script have to be empty?

This depends on the hardware. On many boards a minimal initialization
MUST be performed (like switching off the watchdog timer :-)

Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
Wish not to seem, but to be, the best.  - Aeschylus

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823 Video Controller Driver - where ?

2002-12-16 Thread Steven Blakeslee

We have Linux frame buffer drivers for our 823E(LITE DW) and our
IBM405GP(EP405PC).

-Original Message-
From: Wolfgang Denk [mailto:[EMAIL PROTECTED]
Sent: Friday, December 13, 2002 11:43 AM
To: Steve Rossi
Cc: Embedded Linux PPC List
Subject: Re: 823 Video Controller Driver - where ?



Dear Steve,

in message 3DFA05C3.30703 at ccrl.mot.com you wrote:

 I've seen some reference on the list regarding a driver for the 823
 Video Controller -
 i.e.

http://lists.linuxppc.org/results.html?restrict=linuxppc-embeddedwords=vid8
23
 however I've been unable to locate the source to vid823.c

It is my understanding that this driver is  available  with  and  for
some EP board only, and obviously not available for free.

 apparently this question was asked before:
 http://lists.linuxppc.org/linuxppc-embedded/200201/msg00164.html
 and the answer was that its in the 2_4_devel tree, but I was unable to
 find it in a recent snapshot of the tree (I'm unable to get the tree

I haven't found anything either when I searched some time ago.

 I'm looking for a driver for the video controller to output to an NTSC
 encoder. Am I just missing something?
 Anyone know where I can get vid823.c (or whatever it might be called
 now) and whether its a true framebuffer driver?

We have  a  video  controller  driver  in  our  source  tree  (module
linux-2.4 on our CVS server), see arch/ppc/8xx_io/video823.c

Note: the code relies on some initialization performed by the  U-Boot
boot  loader,  and  it  has  never  been tested yet with NTSC. But it
should be a starting point at least.

And yes, it is a  true  framebuffer  driver,  although  it  uses  the
awkward YUYV video mode format only.

Hope this helps.

Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
God may be subtle, but He isn't plain mean. - Albert Einstein

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Embedded Planet RPX LICC_E board and Timesys

2002-12-06 Thread Steven Blakeslee

I built the Timesys Linux for the 850 and ran it on a LICC_E, it booted into
the initrd just fine.

-Original Message-
From: Donald MacArthur [mailto:[EMAIL PROTECTED]
Sent: Friday, December 06, 2002 7:25 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Embedded Planet RPX LICC_E board and Timesys



I am currently working on a research project involving
the RPX MPC850SR LICC_E board from Embedded Planet.

I tried the BSP provided by Timesys for the 850
but after tftping the image to the board and
'go' nothing happened.  I spoke to the reps from
timesys and embedded planet and found that the
850 BSP was compiled for the LITE_CW versions of the
Embedded Planet boards.  These differed due to the
existence of NVRAM and an RTC.

I recompiled the kernel using several different configurations
and was able to get the kernel to boot when the NVRAM option
was turned off.  I can boot the kernel and load the NFS
root with the initrd and ramdisk options turned off but
when I enable these options, the kernel stops booting at
the ramdisk creation.

Can anyone provide any insight about this problem?

Thank You
Donald MacArthur
dmacarth at ufl.edu


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Frozen ! any idea ?

2002-12-02 Thread Steven Blakeslee

Do you have the watch dog timer enabled?  This could be the problem.

-Original Message-
From: Stefano Bodini [mailto:[EMAIL PROTECTED]
Sent: Monday, November 25, 2002 2:45 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Frozen ! any idea ?



Hi all !

I have (for me) a curious problem.
I have an Embedded Planet RXP Classic credit card (ppc860) loaded with a
2.4.17 kernel (compiled with MontaVista Pro 2.1).
I'm able to load correctly the kernel and the filesystem .. all is working
just fine, but after 1 minute since the last command issued, the system
just freeze.
1 minute without any command issued and the system is gone .. no errors, no
messages, no logs, nothing.
Just doesn't accept anymore commands .. even the echo on the tty port is
gone.

About the 1 minute value, I did some tests to figure out the timing and is
more or less 1 minute.
Up to 30-45 secs. and the system still react, after (50-70 secs) the system
freeze.
If you continue to issue commands the system doesn't freeze .. but it do it
as long as you stop to issue commands.

I tried to load also the default kernel image for that board .. same result.
It seems a kind of watch dog or timer .. but I don't understand why all is
frozen !

Any idea ?

Thanks in advance

C'ya
Steve


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EP405GP GPIO Control Question

2002-11-12 Thread Steven Blakeslee

It's in the Embedded Planet user manual under Board Control Status
Registers.

-Original Message-
From: Crawford Matthew A [mailto:[EMAIL PROTECTED]
Sent: Monday, November 11, 2002 6:16 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: EP405GP GPIO Control Question



Does anyone out there know where I can find information on, or know how to
control the output pins
associated with the GPIO on this board?  We are trying to write a small
driver that will send a
signal out to trigger some power measuring equipment.

Thanks,
Matt


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Linux Image

2002-10-17 Thread Steven Blakeslee

If you are using the serial port on the board then I would assume you have
to use an srec format.

-Original Message-
From: Aman [mailto:[EMAIL PROTECTED]
Sent: Monday, August 19, 2002 8:37 PM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Linux Image



Hi All

I have an rom monitor code without ethernet support running on PPC440GP. Is
it possible to download a linux image to the board using the Kermit
protocol. If so what type of linux image has to build for that.

Thanking you in advance
Regards
Aman


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mpc8xx - power save modes - PIT

2002-10-11 Thread Steven Blakeslee

In the 850 user manual I found the following to describe the SCCR[DNFH].
Division factor high frequency. Sets the VCOOUT frequency division factor
for general system
clocks to be used in normal mode. In normal mode, the MPC850 automatically
switches to the
DFNH frequency. To select the DFNH frequency, load this ?eld with the divide
value and clear
CSRC. A loss-of-lock condition does not occur when this ?eld is changed.
This ?eld is cleared by a power-on or hard reset.

You have the following code.
imp-im_clkrst.car_plprcr |= 121; // plprcr[csrc]=1

It seems like it should be cleared, not set.




-Original Message-
From: Patrick Mahoney [mailto:[EMAIL PROTECTED]
Sent: Thursday, October 10, 2002 4:47 PM
To: Steven Blakeslee
Subject: Re: mpc8xx - power save modes - PIT


I therefore conclude that the register MSB is in the variable
LBS. Thats always goot to know! :) Thanks for the tip...

... but i still lose my console when i switch eith power mode or clock
divider. Ex:

/* Normal high mode
 * clock divider set to 2
 * (sccr[dfnh]=110)
 */
imp = (immap_t *)IMAP_ADDR;
imp-im_clkrst.car_sccr = ~(0x75);
imp-im_clkrst.car_sccr |= 0x15;

Would you happen to know why?
Thanks again,


Pat Mahoney



On Thu, Oct 10, 2002 at 04:20:34PM -0400, Steven Blakeslee wrote:
 The line
 imp-im_clkrst.car_plprcr |= 121;
 seems to be incorrect.  This line sets bit 10.  If you are setting
 plprcr[csrc] you would do the following
 imp-im_clkrst.car_plprcr |= 0x80;

 The line
 imp-im_clkrst.car_plprcr = ~(0x322);
 seems to be incorrect.  This line clears 9 and 8.  If you want to clear
 PLPRCR[LPM] you would do the following
 imp-im_clkrst.car_plprcr = ~(0x100 | 0x200);



 -Original Message-
 From: Patrick Mahoney [mailto:pmahoney at 8d.com]
 Sent: Thursday, October 10, 2002 3:40 PM
 To: Steven Blakeslee
 Subject: Re: mpc8xx - power save modes - PIT


 That was supposed to be:

 /* Normal low mode
  */
 imp = (immap_t *)IMAP_ADDR;
 imp-im_clkrstk.cark_plprcrk = ~KAPWR_KEY;
 imp-im_clkrstk.cark_plprcrk = KAPWR_KEY;
 imp-im_clkrst.car_plprcr |= 121;
 imp-im_clkrst.car_plprcr = ~(0x322);

 Sorry bout that.
 Thanks again,


 Pat Mahoney


 On Thu, Oct 10, 2002 at 03:33:19PM -0400, Patrick Mahoney wrote:
  Hi Steven,
 
  In my module's init_module function, i do:
 
  /* Normal low mode
   * ref: p. 14-21 of mpc850 ref book.
   */
  imp = (immap_t *)IMAP_ADDR;
  imp-im_clkrstk.cark_sccrk = ~KAPWR_KEY;// unlock the
  imp-im_clkrstk.cark_sccrk = KAPWR_KEY; //  register key
  imp-im_clkrst.car_plprcr |= 121; // plprcr[csrc]=1
  imp-im_clkrst.car_plprcr = ~(0x322);// PLPRCR[LPM]=00
 
  Did you succeed in toggling between power modes?
 
  Thanks for your support.
  Best regards,
 
 
  Pat Mahoney
 
  On Thu, Oct 10, 2002 at 03:19:58PM -0400, Steven Blakeslee wrote:
   What are you doing to put the processor into low power mode?  What
 registers
   are you changing?
  
  
   -Original Message-
   From: Patrick Mahoney [mailto:pmahoney at 8d.com]
   Sent: Thursday, October 10, 2002 2:35 PM
   To: linuxppc-embedded at lists.linuxppc.org
   Subject: mpc8xx - power save modes - PIT
  
  
  
   Hello pple,
  
   My setup: MPC850 on a RPXlite_dw board.
  
   My problem:
  
   I am trying toggle between power saving modes and evaluate the current
   drops with an ampermeter.
  
   I succeeded in switching to several power modes, but each time i
   switch, my serial connection dies, even if i switch to the  'normal
   low mode', which is supposed to keep all functionnalities  present.
  
   I am looking to use the PIT to automatically bring back the chip to
   normal full power mode.
  
   I tried the following:
  
 init_timer(timer);
 timer.expires=1000;
 timer.function=timer_handler;
 add_timer(timer);
  
   without success. The kernel oops'es everytime. Ive been browsing the
   kernel sources, but have yet to see where the PIT was
   initialized/used.
  
   Would anyone have successfully used the several power modes of the
   mpc850 (or equivalent) through linux 2.4? If so, is there any code
   snippet available?
  
   Also, do you have any idea as to why the serial connection dies? Is it
   a uart syncing -type problem?
  
   Best regards,
  
  
   Pat Mahoney
  

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how to buitl ramdisk image..

2002-10-10 Thread Steven Blakeslee

In the documentation directory there is an initrd.txt file that explains how
to make it.

-Original Message-
From: rekha gvv [mailto:[EMAIL PROTECTED]
Sent: Thursday, October 10, 2002 6:09 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: how to buitl ramdisk image..



Hello all,
I am using linux2.4.4 for fads860T
can anyone tell me how to build an ramdisk.image.gz
I made
 make  zImage.initrd

but it gave this error

powerpc-linux-ld -T ../vmlinux.lds -Ttext 0x0018
-o zvmlinux.tmp head.o misc.o ../coffboot/zlib.o
m8xx_tty.o
powerpc-linux-objcopy -O elf32-powerpc -R .comment
--add-section=image=../coffboot/vmlinux.gz \
zvmlinux.tmp zvmlinux
rm zvmlinux.tmp
powerpc-linux-ld -T ../vmlinux.lds -Ttext 0x0018
-o zvmlinux.initrd.tmp1 head.o misc.o
../coffboot/zlib.o m8xx_tty.o
powerpc-linux-objcopy -O elf32-powerpc -R .comment \
--add-section=initrd=ramdisk.image.gz \
--add-section=image=../coffboot/vmlinux.gz \
zvmlinux.initrd.tmp1 zvmlinux.initrd1
powerpc-linux-objcopy: cannot stat: ramdisk.image.gz:
No such file or directory
make[1]: *** [zvmlinux.initrd] Error 1
make[1]: Leaving directory
`/usr/src/linux-2.4.4-2002-03-21/arch/ppc/mbxboot'
___
bye!


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ppcboot on rpxlite_dw mpc850

2002-09-25 Thread Steven Blakeslee

The RPXlite_config in ppcboot is for the Embedded Planet LITE CW not the DW.
The CW is high boot and has DRAM, the DW is low boot and has SDRAM.



-Original Message-
From: Patrick Mahoney [mailto:[EMAIL PROTECTED]
Sent: Wednesday, September 25, 2002 2:49 PM
To: ppcboot-users at lists.sourceforge.net;
linuxppc-embedded at lists.linuxppc.org
Cc: yooth at ipone.co.kr
Subject: ppcboot on rpxlite_dw mpc850



Hello lists,

Apologies for the crosspost. I believe both lists are concerned.

Regarding my problem, i searched the archives and did not find any
relevant information. Yet, i am new to this project, so there might be
some elementary stuff i am not aware of...

I have an RPXlite_dw board from EmbeddedPlanet with the MPC850 chip. I
use SourceGate II ver 4 from Avocet Systems for debugging. I am trying
to boot ppcboot on it.

For ppcboot compilation, i did:

$ make RPXlite_config
$ make

I installed the binary file into flash. Using the debugger, i can see
that the first instructions are located at address 0x100, as they
should be.

When i boot the board, no output is performed on the serial
port. The first few instructions appear as follows (as viewed by the
debugger) with the corresponding code snippet pasted at the end.

0x100 LIS   r3,-0x5E0
0x104 MTSPR IMMR,r3
0x108 LIr21,0x1
0x10C B 0x118
0x110 LIr21,0x2
0x114 B 0x118
0x118 LIr3,0x1002
0x11C MTMSR r3

Using the debugger and doing a step by step execution, it seems that
these instructions generate breakpoint exceptions, change the memory
map in some way, and jump somewhere in the code. It finally ends by
executing the '' instruction (in flash?) which generates a
float-instruction exception. I apologize for this somewhat unclear
description, but it seems that the execution is different from time to
time.

Now, here are my interrogations...

- Has anyone booted ppcboot with this exact board?

- Where does the LI instruction come from? It doesn't appear in the
Motorola's 32 bit ppc ref books. Could the problem be at the
cross-compiling level?

- Here's a notice written by Yoo. Jonghoon in the
.../board/RPXlite/flash.c file:

/*
 * Yoo. Jonghoon, IPone, yooth at ipone.co.kr
 * PPCboot port on RPXlite board
 *
 * Some of flash control words are modified. (from 2x16bit device
 * to 4x8bit device)
 * RPXLite board I tested has only 4 AM29LV800BB devices. Other devices
 * are not tested.
 *
 * (?) Does an RPXLite board which
 *  does not use AM29LV800 flash memory exist ?
 *  I don't know...
 */

Can I rightfully conclude that ppcboot has yet to be ported to this
precise board? If so, what are the modifications that would be to be
done? Any useful links?

Best regards,


Patrick Mahoney


.../cpu/mpc8xx/start.S:

.globl  _start
_start:
lis r3, CFG_IMMR at h  /* position IMMR */
mtspr   638, r3
li  r21, BOOTFLAG_COLD  /* Normal Power-On: Boot from FLASH
*/
b   boot_cold

. = EXC_OFF_SYS_RESET + 0x10

.globl  _start_warm
_start_warm:
li  r21, BOOTFLAG_WARM  /* Software reboot
*/
b   boot_warm

boot_cold:
boot_warm:

/* Initialize machine status; enable machine check interrupt
*/

/*--*/
li  r3, MSR_KERNEL  /* Set ME, RI flags */
mtmsr   r3




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Serial port on IcePlanet

2002-08-23 Thread Steven Blakeslee

This is code that I wrote to set up the second uart.  I used Metrowerks 6.0
to compile it.

//---
//UART1
void setUpOtherUart()
{

unsigned char* uart = (unsigned char*)0xef600400;
unsigned char* bcsr3= (unsigned char*)0xF403;
int k = 11059200 / (16 * 9600);

uart[3]   |= 0x80;// set lcr[DLAB] divisor latch access bit
uart[0] =  k   0xFF;   // set LSB of divisor
uart[1] =  k  8;  // set MSB of divisor
uart[3]   |=~0x80;// clear lcr[DLAB] divisor latch access
bit

uart[3] = 0x03;   // 8 bit, 1 stop, no parity
uart[4] = 0x03;   // DTR and RTS active.
uart[2] = 0x01;   // 16550 Fifo enabled.

uart[0] |= 0x10;


}

-Original Message-
From: Linux PPC [mailto:[EMAIL PROTECTED]
Sent: Friday, August 23, 2002 11:06 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: Serial port on IcePlanet



Hi!

Has anybody got the second serial port working on the
Iceplanet (405pc processor)? The second serial port doesn't have
DCD and RI pins on it. Does this mean that the standard serial
driver will not work for it?

Thanx for reading,


- navin.

__


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cygwin and embedded linux

2002-08-21 Thread Steven Blakeslee

viosoft has done it

-Original Message-
From: Magnus Damm [mailto:[EMAIL PROTECTED]
Sent: Wednesday, August 21, 2002 10:54 AM
To: John.Fisher at nec.com.au
Cc: linuxppc-embedded at lists.linuxppc.org
Subject: Re: cygwin and embedded linux



 Is anyone seriously trying to do embedded Linux development for power PC
 using Cygwin as the host?

I've designed a build-system for a customer, and I tried (just to see
how
much that worked ok) to build under Cygwin. Everything worked out ok
until
the system cross compiled glibc-2.1.3. Building glibc generated a error
message that meant something like you-have-bad-memory-on-your-system.
I tried to find the source of the problem with rebuilding and running
memtest86. But no success. But this was maybe a year ago.

The same system works great on Linux boxes.

That's my only experience.

But I have a box from Lynuxworks somewhere here (someone gave it to me)
and that box says that the build system is hosted on windows...

/ Magnus

John Fisher wrote:

 Is anyone seriously trying to do embedded Linux development for power PC
 using Cygwin as the host?

 I'm trying to get linux running on proprietary MPC850/860/8260 boards.
I'll
 start with either the 850 or the 860 board as I'm more familiar with these
 processors than with the 8260.

 I have the Macraigor blackbird BDM interface for the MPC850/860. I have
both
 an Agilent ethernet based probe and the Wind River Vision Probe II for the
 8260.

 All boards will be running with plenty of flash and RAM: 16MB and 32MB
 respectively for both the 850 and 860 boards. They will be running with no
 disk drive, no monitor and a serial port on SCC3.

 I may have real time requirements, but this is yet to be determined.

 This is a learning exercise at this stage.

 John Fisher
 NEC Australia Pty Ltd



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question concerning ram filestructure

2002-04-09 Thread Steven Blakeslee

I'm working with linux 2.4 on an embedded planet ep405.  I have been trying
to get a ram file structure working but I'm getting a reoccuring error.

RAMDISK: Compressed image found at block 0
crc errorFreeing initrd memory: 2201k freed
Kernel panic: VFS: Unable to mount root fs on 01:00
0Rebooting in 180 seconds..

I've seen this before on different ports of linux but I have not been able
to figure it out.  Does anyone have suggestions?
Steven Blakeslee

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booting from flash

2002-03-04 Thread Steven Blakeslee

Is there a simple way to boot embedded linux from flash?  I've been able to
easily compile and execute from RAM but when I try from flash the kernel can
not use the initrd and it panics.
Steven Blakeslee

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execute from flash?

2002-02-25 Thread Steven Blakeslee

Does anyone know how I can run a program in flash from my embedded linux
kernel that is also running in flash?  Below is the code that I tried but it
did not work.  It compiles but does not run correctly.

typedef int (codePtr(char *info));

void main(char *argv)
{
int addr = 0xfff8;
codePtr* startloc = (codePtr *)addr;
(startloc(argv));
}

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