ioremap64 and remap_page_range in 440GP
Hi All, In PPC Linux, to bring a particular IO page onto Linux addressing space, we use ioremap64(). Is my understanding correct? If I want to map this remapped address on user space, I have to use remap_page_range() of kernel in my driver. remap_page_range() takes a 32-bit physical address as argument. But in 440GP, all addresses are 36-bit with respect to processor. Is there any 64-bit equivalent of remap_page_range(). If it exists, how to use it? Please help me out since I am stuck while mapping an external peripheral registers onto user space. Thanks in advance. Regards, vishwa ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Device Accessing Problem in 440GP
Hi All, I am working on IBM 440GP based proprietry board using MVL 2.1 linux. I have a device siiting on the EBC at 0x10010 and I want to access it from the user space. I use mmap call of my driver to do that. I have not initialized the device. I have set the access parameters and controller registers of EBC appropriately to access the device. But when I make ioremap() call using, ioremap64(0x10010, 0x2000), the function returns a valid pointer. But when I do a sample write and read, I am not getting correct values. While I was debigging, I couldn't find the TLB entry for the real address. When I try to access the returned mmap() pointer, kernel says , do_wp_page: bogus page at address (page ) VM: killing process xxx Does anyone know what could be the reason? 1. Do I have to initialize the device in setup_arch function ? 2. Do I have to explicitly create a TLB entry for the device ? Hoping to get a response. I am stuck in the middle. Thanks and regards, Vishwa ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
I2C Device Register Read problem in 440GP
Hi all, I have written custom driver for accessing a device sitting on the I2C bus of IBM 440GP. I am operating in the master mode of I2C controller of 440GP. I was able to write a particular value onto the device register. But when I try to read the value back, it is returning 0. I have disabled the interrupts. When I was debugging, I found that data was arriving on the I2C bus. But before I could read the Master Data Buffer Register of 440 GP, the register is getting cleared. Does anyone no why? Pls help me. I am stuck. Thanks and regards, vishwa ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
Monta Vista Linux Supporting Floating Point operations
Hi All, I am working on 440GP using Monta Vista Linux 2.1. I need floating point operation support (for eg. function sqrt() for calculating square root of given float variable) on Linux. I didn't find math emualtion on the Linux. Can anyone tell me how can I get floating point support ? Thanks in advance. Regards, Vishwanath ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
IBM 440GP IIC driver
Hi All, I am working on 440 GP board. I2C controller of 440 GP supports both 7-bit and 10-bit addressing. But Linux supports only 7-bit addressing as of now. I have a device which has i2c sub-addresses more than 128. So I need 10-bit addressing of I2C controller. Apart from loading the higher bits of address in High Address Register, is there any special thing to be taken care of, while modifying the driver for 10-bit addressing ? Thanks and regards, Vishwanath ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
IBM 440GP 36-bit addressing
Hi All, Thanks for your information. I have few more doubts. By going through the code, I understood that ioremap64() is used for mapping the 36-bit real address onto 32-bit effective address space. How this mapping information is conveyed to user applications ? If I am writing assembly instructions to access 440GP registers, do I have to pass 36-bit real address or 32-bit effective address ? Physical address map of 440GP provides information only about Real addresses. How can I convert these real addresses onto effective addresses ? Do I have to write a TLB entry regarding my addresses ? Thanks and Regards, Vishwa - Original Message - From: "Hollis Blanchard" <[EMAIL PROTECTED]> To: Sent: Friday, August 23, 2002 8:30 PM Subject: Re: IBM 440GP 36-bit addressing > > On Fri, 2002-08-23 at 10:00, Vishwanath wrote: > > > > I am new to PPC Linux. I am working on IBM 440 GP board. I am using > > MontaVista Linux source code. I didn't understand how 36-bit addressing is > > taken care in this code. If an application has to access the a memory > > location in SDRAM of 440 GP or its internal peripheral registers, whether it > > has to pass 36-bit address or normal 32-bit address. > > It's a 36-bit real address space, but 32-bit effective (aka "virtual"). > Applications, which run entirely in effective address space, have no > reason to think about such things and require no modification. > > The kernel has to care about the real address space, mostly when you > want to ioremap (all the on-chip peripheral addresses are higher than > 4GB as I recall) a 36-bit real address to a 32-bit effective address so > you can use it in the kernel (which also runs in effective mode). > > -Hollis > > > > ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
IBM 440GP 36-bit addressing
Hi, I am new to PPC Linux. I am working on IBM 440 GP board. I am using MontaVista Linux source code. I didn't understand how 36-bit addressing is taken care in this code. If an application has to access the a memory location in SDRAM of 440 GP or its internal peripheral registers, whether it has to pass 36-bit address or normal 32-bit address. I am afraid my doubt is silly one. But still I am totally confused. Hope to get reply soon. Thanks and regards, Vishwanath ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
