Re: [PATCH 5/5] lite5200b suspend: low-power mode

2007-04-17 Thread Grant Likely
On 4/17/07, Domen Puncer <[EMAIL PROTECTED]> wrote:
> Low-power mode implementation for Lite5200b.  (Most of devices
> on board, including the CPU, are powered down)
>
> Some I/O registers are also saved here.
>
> A patch to U-Boot that wakes up SDRAM, and transfers control
> to address saved at physical 0x0 is needed, and is already
> merged in git://www.denx.de/git/u-boot-ppc4xx.git tree.
>
>
> Signed-off-by: Domen Puncer <[EMAIL PROTECTED]>
Acked-by: Grant Likely <[EMAIL PROTECTED]>
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Re: [PATCH 5/5] lite5200b suspend: low-power mode

2007-04-17 Thread Domen Puncer
Low-power mode implementation for Lite5200b.  (Most of devices
on board, including the CPU, are powered down)

Some I/O registers are also saved here.

A patch to U-Boot that wakes up SDRAM, and transfers control
to address saved at physical 0x0 is needed, and is already
merged in git://www.denx.de/git/u-boot-ppc4xx.git tree.


Signed-off-by: Domen Puncer <[EMAIL PROTECTED]>

---
 arch/powerpc/platforms/52xx/Makefile |3 
 arch/powerpc/platforms/52xx/lite5200.c   |2 
 arch/powerpc/platforms/52xx/lite5200_pm.c|  210 +
 arch/powerpc/platforms/52xx/lite5200_sleep.S |  413 +++
 include/asm-powerpc/mpc52xx.h|   10 
 5 files changed, 637 insertions(+), 1 deletion(-)

Index: grant.git/arch/powerpc/platforms/52xx/lite5200_pm.c
===
--- /dev/null
+++ grant.git/arch/powerpc/platforms/52xx/lite5200_pm.c
@@ -0,0 +1,210 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "bestcomm.h"
+
+/* defined in lite5200_sleep.S and only used here */
+extern void lite5200_low_power(void *sram, void *mbar);
+
+static struct mpc52xx_cdm __iomem *cdm;
+static struct mpc52xx_intr __iomem *pic;
+static struct mpc52xx_sdma __iomem *bes;
+static struct mpc52xx_xlb __iomem *xlb;
+static struct mpc52xx_gpio __iomem *gps;
+static struct mpc52xx_gpio_wkup __iomem *gpw;
+static void __iomem *mbar;
+
+static int lite5200_pm_valid(suspend_state_t state)
+{
+   switch (state) {
+   case PM_SUSPEND_STANDBY:
+   case PM_SUSPEND_MEM:
+   return 1;
+   default:
+   return 0;
+   }
+}
+
+static int lite5200_pm_prepare(suspend_state_t state)
+{
+   /* deep sleep? let mpc52xx code handle that */
+   if (state == PM_SUSPEND_STANDBY)
+   return mpc52xx_pm_prepare(state);
+
+   if (state != PM_SUSPEND_MEM)
+   return -EINVAL;
+
+   /* map registers */
+   mbar = mpc52xx_find_and_map("mpc5200");
+   if (!mbar) {
+   printk(KERN_ERR "%s:%i Error mapping registers\n", __func__, 
__LINE__);
+   return -ENOSYS;
+   }
+
+   cdm = mbar + 0x200;
+   pic = mbar + 0x500;
+   gps = mbar + 0xb00;
+   gpw = mbar + 0xc00;
+   bes = mbar + 0x1200;
+   xlb = mbar + 0x1f00;
+
+   return 0;
+}
+
+/* save and restore registers not bound to any real devices */
+static struct mpc52xx_cdm scdm;
+static struct mpc52xx_intr spic;
+static struct mpc52xx_sdma sbes;
+static struct mpc52xx_xlb sxlb;
+static struct mpc52xx_gpio sgps;
+static struct mpc52xx_gpio_wkup sgpw;
+
+static void lite5200_save_regs(void)
+{
+   _memcpy_fromio(&spic, pic, sizeof(*pic));
+   _memcpy_fromio(&sbes, bes, sizeof(*bes));
+   _memcpy_fromio(&scdm, cdm, sizeof(*cdm));
+   _memcpy_fromio(&sxlb, xlb, sizeof(*xlb));
+   _memcpy_fromio(&sgps, gps, sizeof(*gps));
+   _memcpy_fromio(&sgpw, gpw, sizeof(*gpw));
+
+   memcpy(saved_sram, sdma.sram, sdma.sram_size);
+}
+
+static void lite5200_restore_regs(void)
+{
+   int i;
+   memcpy(sdma.sram, saved_sram, sdma.sram_size);
+
+
+   /*
+* GPIOs. Interrupt Master Enable has higher address then other
+* registers, so just memcpy is ok.
+*/
+   _memcpy_toio(gpw, &sgpw, sizeof(*gpw));
+   _memcpy_toio(gps, &sgps, sizeof(*gps));
+
+
+   /* XLB Arbitrer */
+   out_be32(&xlb->snoop_window, sxlb.snoop_window);
+   out_be32(&xlb->master_priority, sxlb.master_priority);
+   out_be32(&xlb->master_pri_enable, sxlb.master_pri_enable);
+
+   /* enable */
+   out_be32(&xlb->int_enable, sxlb.int_enable);
+   out_be32(&xlb->config, sxlb.config);
+
+
+   /* CDM - Clock Distribution Module */
+   out_8(&cdm->ipb_clk_sel, scdm.ipb_clk_sel);
+   out_8(&cdm->pci_clk_sel, scdm.pci_clk_sel);
+
+   out_8(&cdm->ext_48mhz_en, scdm.ext_48mhz_en);
+   out_8(&cdm->fd_enable, scdm.fd_enable);
+   out_be16(&cdm->fd_counters, scdm.fd_counters);
+
+   out_be32(&cdm->clk_enables, scdm.clk_enables);
+
+   out_8(&cdm->osc_disable, scdm.osc_disable);
+
+   out_be16(&cdm->mclken_div_psc1, scdm.mclken_div_psc1);
+   out_be16(&cdm->mclken_div_psc2, scdm.mclken_div_psc2);
+   out_be16(&cdm->mclken_div_psc3, scdm.mclken_div_psc3);
+   out_be16(&cdm->mclken_div_psc6, scdm.mclken_div_psc6);
+
+
+   /* BESTCOMM */
+   out_be32(&bes->taskBar, sbes.taskBar);
+   out_be32(&bes->currentPointer, sbes.currentPointer);
+   out_be32(&bes->endPointer, sbes.endPointer);
+   out_be32(&bes->variablePointer, sbes.variablePointer);
+
+   out_8(&bes->IntVect1, sbes.IntVect1);
+   out_8(&bes->IntVect2, sbes.IntVect2);
+   out_be16(&bes->PtdCntrl, sbes.PtdCntrl);
+
+   for (i=0; i<32; i++)
+   out_8(&bes->ipr[i], sbes.ipr[i]);
+
+   out_be32(&bes->cReqSelect, sbes.cReqSelect);
+   out_be32(&bes->task_size0, sbes.task_size0);
+  

Re: [PATCH 5/5] lite5200b suspend: low-power mode

2007-03-26 Thread Grant Likely
On 3/26/07, Domen Puncer <[EMAIL PROTECTED]> wrote:
> On 22/03/07 08:41 +0100, Domen Puncer wrote:
> > On 15/03/07 17:36 +0100, Domen Puncer wrote:
> > > Well... the code is only applicable for Lite5200b/mpc5200
> > > and numbers are from specs.
> > > And it's shorter than mpc52xx_find_and_map() lines.
> > > I guess I could rewrite it.
> >
> > In asm code I need access to SDRAM controller registers (MBAR+0x100).
> > Do I add an entry to dts, or do you have other suggestions?

Fair enough; this is chip-specific code after all; not device driver
code.  MBAR must always be retrieved from the device tree, but these
offsets from MBAR will never move, so you don't need to pull them from
the device tree.  At least comment it as to where the numbers came
from.

g.

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Secret Lab Technologies Ltd.
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Re: [PATCH 5/5] lite5200b suspend: low-power mode

2007-03-26 Thread Domen Puncer
On 22/03/07 08:41 +0100, Domen Puncer wrote:
> On 15/03/07 17:36 +0100, Domen Puncer wrote:
> > On 15/03/07 08:09 -0600, Grant Likely wrote:
> > > On 3/15/07, Domen Puncer <[EMAIL PROTECTED]> wrote:
> > ...
> > > >+   /* map registers */
> > > >+   mbar = ioremap_nocache(0xf000, 0x8000);
> > > 
> > > Magic numbers?  Really?  This should be retrieved from the device
> > > tree.  There is always the possibility of mbar getting moved.
> > > 
> > ...
> > > >+   gpw = mbar + 0xc00;
> > > >+   bes = mbar + 0x1200;
> > > >+   xlb = mbar + 0x1f00;
> > > 
> > > Again, magic numbers
> > 
> > Well... the code is only applicable for Lite5200b/mpc5200
> > and numbers are from specs.
> > And it's shorter than mpc52xx_find_and_map() lines.
> > I guess I could rewrite it.
> 
> In asm code I need access to SDRAM controller registers (MBAR+0x100).
> Do I add an entry to dts, or do you have other suggestions?

And on efika, the same problem + there is no CDM nor (wakeup)
gpio's in device tree. What to do there?


Domen
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Re: [PATCH 5/5] lite5200b suspend: low-power mode

2007-03-21 Thread Domen Puncer
On 15/03/07 17:36 +0100, Domen Puncer wrote:
> On 15/03/07 08:09 -0600, Grant Likely wrote:
> > On 3/15/07, Domen Puncer <[EMAIL PROTECTED]> wrote:
> ...
> > >+   /* map registers */
> > >+   mbar = ioremap_nocache(0xf000, 0x8000);
> > 
> > Magic numbers?  Really?  This should be retrieved from the device
> > tree.  There is always the possibility of mbar getting moved.
> > 
> ...
> > >+   gpw = mbar + 0xc00;
> > >+   bes = mbar + 0x1200;
> > >+   xlb = mbar + 0x1f00;
> > 
> > Again, magic numbers
> 
> Well... the code is only applicable for Lite5200b/mpc5200
> and numbers are from specs.
> And it's shorter than mpc52xx_find_and_map() lines.
> I guess I could rewrite it.

In asm code I need access to SDRAM controller registers (MBAR+0x100).
Do I add an entry to dts, or do you have other suggestions?


Domen
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Re: [PATCH 5/5] lite5200b suspend: low-power mode

2007-03-15 Thread Domen Puncer
On 15/03/07 08:09 -0600, Grant Likely wrote:
> On 3/15/07, Domen Puncer <[EMAIL PROTECTED]> wrote:
> >Low-power mode implementation for Lite5200b.
> >Some I/O registers are also saved here.
> >
> >A patch to U-Boot that wakes up SDRAM, and transfers control
> >to address saved at physical 0x0 is needed.
> 
> I don't see any structural problems with this code, but I have a few
> comments below.  I'm also concerned about the blind register
> save/restore by memcpy_to/fromio.  I haven't looked at the chip
> documentation, but it looks scary.  Is it safe to restore those
> registers in that manner?
> 
...
> >+   /* map registers */
> >+   mbar = ioremap_nocache(0xf000, 0x8000);
> 
> Magic numbers?  Really?  This should be retrieved from the device
> tree.  There is always the possibility of mbar getting moved.
> 
...
> >+   gpw = mbar + 0xc00;
> >+   bes = mbar + 0x1200;
> >+   xlb = mbar + 0x1f00;
> 
> Again, magic numbers

Well... the code is only applicable for Lite5200b/mpc5200
and numbers are from specs.
And it's shorter than mpc52xx_find_and_map() lines.
I guess I could rewrite it.

> >+   _memcpy_fromio(&scdm, cdm, sizeof(*cdm));
> >+   _memcpy_fromio(&sxlb, xlb, sizeof(*xlb));
> >+   _memcpy_fromio(&sgps, gps, sizeof(*gps));
> >+   _memcpy_fromio(&sgpw, gpw, sizeof(*gpw));
> 
> Hmmm.  I have not dug into this deeply, but blind save/restore to
> blocks of registers scares me.

Seems to work (tm), I'll look at datasheet.

> >+// about 2000 cpu cycles for one sdram cycle here
> >+// just increase, to be on the safe side?
> >+#define TCK5000
> 
> Please avoid c++ comments

// are in ANSI C99 too, but ok, I know kernel folks don't like them :-)


> >+#define DONT_DEBUG 1
> 
> Convention is to #define DEBUG to enable debugging (as opposed to
> #defining something to disable it)

Yeah, makes sense.


Domen
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Re: [PATCH 5/5] lite5200b suspend: low-power mode

2007-03-15 Thread Grant Likely
On 3/15/07, Domen Puncer <[EMAIL PROTECTED]> wrote:
> Low-power mode implementation for Lite5200b.
> Some I/O registers are also saved here.
>
> A patch to U-Boot that wakes up SDRAM, and transfers control
> to address saved at physical 0x0 is needed.

I don't see any structural problems with this code, but I have a few
comments below.  I'm also concerned about the blind register
save/restore by memcpy_to/fromio.  I haven't looked at the chip
documentation, but it looks scary.  Is it safe to restore those
registers in that manner?

Cheers,
g.

>
>
> Signed-off-by: Domen Puncer <[EMAIL PROTECTED]>
>
> ---
>  arch/powerpc/platforms/52xx/Makefile |3
>  arch/powerpc/platforms/52xx/lite5200_pm.c|  125 
>  arch/powerpc/platforms/52xx/lite5200_sleep.S |  419 
> +++
>  3 files changed, 547 insertions(+)
>
> Index: grant.git/arch/powerpc/platforms/52xx/lite5200_pm.c
> ===
> --- /dev/null
> +++ grant.git/arch/powerpc/platforms/52xx/lite5200_pm.c
> @@ -0,0 +1,125 @@

> +static int lite5200_pm_prepare(suspend_state_t state)
> +{
> +   /* deep sleep? let mpc52xx code handle that */
> +   if (state == PM_SUSPEND_STANDBY)
> +   return mpc52xx_pm_prepare(state);
> +
> +   if (state != PM_SUSPEND_MEM)
> +   return -EINVAL;
> +
> +   /* map registers */
> +   mbar = ioremap_nocache(0xf000, 0x8000);

Magic numbers?  Really?  This should be retrieved from the device
tree.  There is always the possibility of mbar getting moved.

> +static void lite5200_save_regs(void)
> +{
> +   _memcpy_fromio(&sbes, bes, sizeof(*bes));
> +   _memcpy_fromio(&spic, pic, sizeof(*pic));
> +   _memcpy_fromio(&scdm, cdm, sizeof(*cdm));
> +   _memcpy_fromio(&sxlb, xlb, sizeof(*xlb));
> +   _memcpy_fromio(&sgps, gps, sizeof(*gps));
> +   _memcpy_fromio(&sgpw, gpw, sizeof(*gpw));

Hmmm.  I have not dug into this deeply, but blind save/restore to
blocks of registers scares me.

> +
> +   memcpy(saved_sram, sdma.sram, sdma.sram_size);
> +}
> +
> +static void lite5200_restore_regs(void)
> +{
> +   memcpy(sdma.sram, saved_sram, sdma.sram_size);
> +
> +   _memcpy_toio(gpw, &sgpw, sizeof(*gpw));
> +   _memcpy_toio(gps, &sgps, sizeof(*gps));
> +   _memcpy_toio(xlb, &sxlb, sizeof(*xlb));
> +   _memcpy_toio(cdm, &scdm, sizeof(*cdm));
> +   _memcpy_toio(pic, &spic, sizeof(*pic));
> +   _memcpy_toio(bes, &sbes, sizeof(*bes));
> +}
> +
> +static int lite5200_pm_enter(suspend_state_t state)
> +{
> +   /* deep sleep? let mpc52xx code handle that */
> +   if (state == PM_SUSPEND_STANDBY) {
> +   return mpc52xx_pm_enter(state);
> +   }
> +
> +   cdm = mbar + 0x200;
> +   pic = mbar + 0x500;
> +   gps = mbar + 0xb00;
> +   gpw = mbar + 0xc00;
> +   bes = mbar + 0x1200;
> +   xlb = mbar + 0x1f00;

Again, magic numbers


> Index: grant.git/arch/powerpc/platforms/52xx/lite5200_sleep.S
> ===
> --- /dev/null
> +++ grant.git/arch/powerpc/platforms/52xx/lite5200_sleep.S
> @@ -0,0 +1,419 @@
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +
> +#define SDRAM_MODE 0x100
> +#define SDRAM_CTRL 0x104
> +#define SC_MODE_EN (1<<31)
> +#define SC_CKE (1<<30)
> +#define SC_REF_EN  (1<<28)
> +#define SC_SOFT_PRE(1<<1)
> +
> +#define GPIOW_GPIOE0xc00
> +#define GPIOW_ODE  0xc04
> +#define GPIOW_DDR  0xc08
> +#define GPIOW_DVO  0xc0c
> +#define GPIOW_INTEN0xc10
> +
> +#define CDM_CE 0x214
> +#define CDM_SDRAM  (1<<3)
> +
> +
> +// about 2000 cpu cycles for one sdram cycle here
> +// just increase, to be on the safe side?
> +#define TCK5000

Please avoid c++ comments

> +
> +
> +#define DONT_DEBUG 1

Convention is to #define DEBUG to enable debugging (as opposed to
#defining something to disable it)

> +restore_regs:
> +   lis r4, [EMAIL PROTECTED]
> +   ori r4, r4, [EMAIL PROTECTED]
> +#ifdef DONT_DEBUG

should be #if !defined(DEBUG)

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[PATCH 5/5] lite5200b suspend: low-power mode

2007-03-15 Thread Domen Puncer
Low-power mode implementation for Lite5200b.
Some I/O registers are also saved here.

A patch to U-Boot that wakes up SDRAM, and transfers control
to address saved at physical 0x0 is needed.


Signed-off-by: Domen Puncer <[EMAIL PROTECTED]>

---
 arch/powerpc/platforms/52xx/Makefile |3 
 arch/powerpc/platforms/52xx/lite5200_pm.c|  125 
 arch/powerpc/platforms/52xx/lite5200_sleep.S |  419 +++
 3 files changed, 547 insertions(+)

Index: grant.git/arch/powerpc/platforms/52xx/lite5200_pm.c
===
--- /dev/null
+++ grant.git/arch/powerpc/platforms/52xx/lite5200_pm.c
@@ -0,0 +1,125 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "mpc52xx_pic.h"
+#include "bestcomm.h"
+
+extern void lite5200_low_power(void *sram, void *mbar);
+extern int mpc52xx_pm_enter(suspend_state_t);
+extern int mpc52xx_pm_prepare(suspend_state_t);
+
+static void __iomem *mbar;
+
+static int lite5200_pm_valid(suspend_state_t state)
+{
+   switch (state) {
+   case PM_SUSPEND_STANDBY:
+   case PM_SUSPEND_MEM:
+   return 1;
+   default:
+   return 0;
+   }
+}
+
+static int lite5200_pm_prepare(suspend_state_t state)
+{
+   /* deep sleep? let mpc52xx code handle that */
+   if (state == PM_SUSPEND_STANDBY)
+   return mpc52xx_pm_prepare(state);
+
+   if (state != PM_SUSPEND_MEM)
+   return -EINVAL;
+
+   /* map registers */
+   mbar = ioremap_nocache(0xf000, 0x8000);
+   if (!mbar) {
+   printk(KERN_ERR "%s:%i Error mapping registers\n", __func__, 
__LINE__);
+   return -ENOSYS;
+   }
+
+   return 0;
+}
+
+/* save and restore registers not bound to any real devices */
+static struct mpc52xx_cdm __iomem *cdm;
+static struct mpc52xx_cdm scdm;
+static struct mpc52xx_intr __iomem *pic;
+static struct mpc52xx_intr spic;
+static struct mpc52xx_sdma __iomem *bes;
+static struct mpc52xx_sdma sbes;
+static struct mpc52xx_xlb __iomem *xlb;
+static struct mpc52xx_xlb sxlb;
+static struct mpc52xx_gpio __iomem *gps;
+static struct mpc52xx_gpio sgps;
+static struct mpc52xx_gpio_wkup __iomem *gpw;
+static struct mpc52xx_gpio_wkup sgpw;
+extern char saved_sram[0x4000];
+
+static void lite5200_save_regs(void)
+{
+   _memcpy_fromio(&sbes, bes, sizeof(*bes));
+   _memcpy_fromio(&spic, pic, sizeof(*pic));
+   _memcpy_fromio(&scdm, cdm, sizeof(*cdm));
+   _memcpy_fromio(&sxlb, xlb, sizeof(*xlb));
+   _memcpy_fromio(&sgps, gps, sizeof(*gps));
+   _memcpy_fromio(&sgpw, gpw, sizeof(*gpw));
+
+   memcpy(saved_sram, sdma.sram, sdma.sram_size);
+}
+
+static void lite5200_restore_regs(void)
+{
+   memcpy(sdma.sram, saved_sram, sdma.sram_size);
+
+   _memcpy_toio(gpw, &sgpw, sizeof(*gpw));
+   _memcpy_toio(gps, &sgps, sizeof(*gps));
+   _memcpy_toio(xlb, &sxlb, sizeof(*xlb));
+   _memcpy_toio(cdm, &scdm, sizeof(*cdm));
+   _memcpy_toio(pic, &spic, sizeof(*pic));
+   _memcpy_toio(bes, &sbes, sizeof(*bes));
+}
+
+static int lite5200_pm_enter(suspend_state_t state)
+{
+   /* deep sleep? let mpc52xx code handle that */
+   if (state == PM_SUSPEND_STANDBY) {
+   return mpc52xx_pm_enter(state);
+   }
+
+   cdm = mbar + 0x200;
+   pic = mbar + 0x500;
+   gps = mbar + 0xb00;
+   gpw = mbar + 0xc00;
+   bes = mbar + 0x1200;
+   xlb = mbar + 0x1f00;
+   lite5200_save_regs();
+
+   lite5200_low_power(sdma.sram, mbar);
+
+   lite5200_restore_regs();
+
+   iounmap(mbar);
+   return 0;
+}
+
+static int lite5200_pm_finish(suspend_state_t state)
+{
+   return 0;
+}
+
+static struct pm_ops lite5200_pm_ops = {
+   .valid  = lite5200_pm_valid,
+   .prepare= lite5200_pm_prepare,
+   .enter  = lite5200_pm_enter,
+   .finish = lite5200_pm_finish,
+};
+
+static int __init lite5200_pm_init(void)
+{
+   pm_set_ops(&lite5200_pm_ops);
+   return 0;
+}
+
+arch_initcall(lite5200_pm_init);
Index: grant.git/arch/powerpc/platforms/52xx/lite5200_sleep.S
===
--- /dev/null
+++ grant.git/arch/powerpc/platforms/52xx/lite5200_sleep.S
@@ -0,0 +1,419 @@
+#include 
+#include 
+#include 
+#include 
+
+
+#define SDRAM_MODE 0x100
+#define SDRAM_CTRL 0x104
+#define SC_MODE_EN (1<<31)
+#define SC_CKE (1<<30)
+#define SC_REF_EN  (1<<28)
+#define SC_SOFT_PRE(1<<1)
+
+#define GPIOW_GPIOE0xc00
+#define GPIOW_ODE  0xc04
+#define GPIOW_DDR  0xc08
+#define GPIOW_DVO  0xc0c
+#define GPIOW_INTEN0xc10
+
+#define CDM_CE 0x214
+#define CDM_SDRAM  (1<<3)
+
+
+// about 2000 cpu cycles for one sdram cycle here
+// just increase, to be on the safe side?
+#define TCK5000
+
+
+#define DONT_DEBUG 1
+
+// helpers... beware: r10 and r4 are overwritten
+#define SAVE_SPRN(reg, addr)