[Lldb-commits] [PATCH] D147627: [lldb][ObjectFileELF] Improve error output for unsupported arch/relocations

2023-04-06 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining accepted this revision.
SixWeining added a comment.
This revision is now accepted and ready to land.

LGTM. I think this is a requirement for adding other 32bit arch support.


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[Lldb-commits] [PATCH] D145550: [LLDB][ObjectFileELF] Correct the return type of RelocOffset64 and RelocAddend64

2023-03-13 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG174a38f9c316: [LLDB][ObjectFileELF] Correct the return type 
of RelocOffset64 and RelocAddend64 (authored by SixWeining).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145550/new/

https://reviews.llvm.org/D145550

Files:
  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
  lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml


Index: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
===
--- lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
+++ lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
@@ -6,9 +6,9 @@
 # CHECK:  Name: .debug_info
 # CHECK:  Data:  (
 ## Before relocation:
-##:   
+##:     
 ## After relocation:
-# CHECK-NEXT: : 3412 7856 
+# CHECK-NEXT: : 3412 88776655 44332211 8899AABB CCDDEEFF
 # CHECK-NEXT: )
 
 --- !ELF
@@ -22,7 +22,7 @@
 Type:SHT_PROGBITS
   - Name:.debug_info
 Type:SHT_PROGBITS
-Content: 
+Content: 
   - Name:.rela.debug_info
 Type:SHT_RELA
 Info:.debug_info
@@ -34,7 +34,11 @@
   - Offset:  0x0004
 Symbol:  .debug_str
 Type:R_LARCH_64
-Addend:  0x5678
+Addend:  0x1122334455667788
+  - Offset:  0x000C
+Symbol:  .debug_str
+Type:R_LARCH_64
+Addend:  0xFFEEDDCCBBAA9988
 Symbols:
   - Name:.debug_str
 Type:STT_SECTION
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -116,11 +116,11 @@
 
   static unsigned RelocOffset32(const ELFRelocation );
 
-  static unsigned RelocOffset64(const ELFRelocation );
+  static elf_addr RelocOffset64(const ELFRelocation );
 
   static unsigned RelocAddend32(const ELFRelocation );
 
-  static unsigned RelocAddend64(const ELFRelocation );
+  static elf_sxword RelocAddend64(const ELFRelocation );
 
   bool IsRela() { return (reloc.is()); }
 
@@ -192,7 +192,7 @@
 return rel.reloc.get()->r_offset;
 }
 
-unsigned ELFRelocation::RelocOffset64(const ELFRelocation ) {
+elf_addr ELFRelocation::RelocOffset64(const ELFRelocation ) {
   if (rel.reloc.is())
 return rel.reloc.get()->r_offset;
   else
@@ -206,7 +206,7 @@
 return rel.reloc.get()->r_addend;
 }
 
-unsigned ELFRelocation::RelocAddend64(const ELFRelocation ) {
+elf_sxword  ELFRelocation::RelocAddend64(const ELFRelocation ) {
   if (rel.reloc.is())
 return 0;
   else


Index: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
===
--- lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
+++ lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
@@ -6,9 +6,9 @@
 # CHECK:  Name: .debug_info
 # CHECK:  Data:  (
 ## Before relocation:
-##:   
+##:     
 ## After relocation:
-# CHECK-NEXT: : 3412 7856 
+# CHECK-NEXT: : 3412 88776655 44332211 8899AABB CCDDEEFF
 # CHECK-NEXT: )
 
 --- !ELF
@@ -22,7 +22,7 @@
 Type:SHT_PROGBITS
   - Name:.debug_info
 Type:SHT_PROGBITS
-Content: 
+Content: 
   - Name:.rela.debug_info
 Type:SHT_RELA
 Info:.debug_info
@@ -34,7 +34,11 @@
   - Offset:  0x0004
 Symbol:  .debug_str
 Type:R_LARCH_64
-Addend:  0x5678
+Addend:  0x1122334455667788
+  - Offset:  0x000C
+Symbol:  .debug_str
+Type:R_LARCH_64
+Addend:  0xFFEEDDCCBBAA9988
 Symbols:
   - Name:.debug_str
 Type:STT_SECTION
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -116,11 +116,11 @@
 
   static unsigned RelocOffset32(const ELFRelocation );
 
-  static unsigned RelocOffset64(const ELFRelocation );
+  static elf_addr RelocOffset64(const ELFRelocation );
 
   static unsigned

[Lldb-commits] [PATCH] D145571: [LLDB][ObjectFileELF] Correct the return type of Reloc{Offset, Addend}32

2023-03-13 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG27705f456a3a: [LLDB][ObjectFileELF] Correct the return type 
of Reloc{Offset,Addend}32 (authored by SixWeining).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145571/new/

https://reviews.llvm.org/D145571

Files:
  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp


Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -114,11 +114,11 @@
 
   static unsigned RelocSymbol64(const ELFRelocation );
 
-  static unsigned RelocOffset32(const ELFRelocation );
+  static elf_addr RelocOffset32(const ELFRelocation );
 
   static elf_addr RelocOffset64(const ELFRelocation );
 
-  static unsigned RelocAddend32(const ELFRelocation );
+  static elf_sxword RelocAddend32(const ELFRelocation );
 
   static elf_sxword RelocAddend64(const ELFRelocation );
 
@@ -185,7 +185,7 @@
 return ELFRela::RelocSymbol64(*rel.reloc.get());
 }
 
-unsigned ELFRelocation::RelocOffset32(const ELFRelocation ) {
+elf_addr ELFRelocation::RelocOffset32(const ELFRelocation ) {
   if (rel.reloc.is())
 return rel.reloc.get()->r_offset;
   else
@@ -199,7 +199,7 @@
 return rel.reloc.get()->r_offset;
 }
 
-unsigned ELFRelocation::RelocAddend32(const ELFRelocation ) {
+elf_sxword ELFRelocation::RelocAddend32(const ELFRelocation ) {
   if (rel.reloc.is())
 return 0;
   else


Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -114,11 +114,11 @@
 
   static unsigned RelocSymbol64(const ELFRelocation );
 
-  static unsigned RelocOffset32(const ELFRelocation );
+  static elf_addr RelocOffset32(const ELFRelocation );
 
   static elf_addr RelocOffset64(const ELFRelocation );
 
-  static unsigned RelocAddend32(const ELFRelocation );
+  static elf_sxword RelocAddend32(const ELFRelocation );
 
   static elf_sxword RelocAddend64(const ELFRelocation );
 
@@ -185,7 +185,7 @@
 return ELFRela::RelocSymbol64(*rel.reloc.get());
 }
 
-unsigned ELFRelocation::RelocOffset32(const ELFRelocation ) {
+elf_addr ELFRelocation::RelocOffset32(const ELFRelocation ) {
   if (rel.reloc.is())
 return rel.reloc.get()->r_offset;
   else
@@ -199,7 +199,7 @@
 return rel.reloc.get()->r_offset;
 }
 
-unsigned ELFRelocation::RelocAddend32(const ELFRelocation ) {
+elf_sxword ELFRelocation::RelocAddend32(const ELFRelocation ) {
   if (rel.reloc.is())
 return 0;
   else
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[Lldb-commits] [PATCH] D145462: [LLDB][ObjectFileELF] Support LoongArch64 in ApplyReloctions

2023-03-13 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc2c93873d191: [LLDB][ObjectFileELF] Support LoongArch64 in 
ApplyReloctions (authored by SixWeining).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145462/new/

https://reviews.llvm.org/D145462

Files:
  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
  lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml

Index: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
===
--- /dev/null
+++ lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
@@ -0,0 +1,45 @@
+# RUN: yaml2obj %s -o %t
+# RUN: lldb-test object-file -contents %t | FileCheck %s
+
+## Test that relocations are correctly applied to the .debug_info section on loongarch64.
+
+# CHECK:  Name: .debug_info
+# CHECK:  Data:  (
+## Before relocation:
+##:   
+## After relocation:
+# CHECK-NEXT: : 3412 7856 
+# CHECK-NEXT: )
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS64
+  Data:ELFDATA2LSB
+  Type:ET_REL
+  Machine: EM_LOONGARCH
+Sections:
+  - Name:.debug_str
+Type:SHT_PROGBITS
+  - Name:.debug_info
+Type:SHT_PROGBITS
+Content: 
+  - Name:.rela.debug_info
+Type:SHT_RELA
+Info:.debug_info
+Relocations:
+  - Offset:  0x
+Symbol:  .debug_str
+Type:R_LARCH_32
+Addend:  0x1234
+  - Offset:  0x0004
+Symbol:  .debug_str
+Type:R_LARCH_64
+Addend:  0x5678
+Symbols:
+  - Name:.debug_str
+Type:STT_SECTION
+Section: .debug_str
+  - Name:.debug_info
+Type:STT_SECTION
+Section: .debug_info
+...
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -2593,6 +2593,50 @@
  rel_data, symtab_data, strtab_data);
 }
 
+static void ApplyELF64ABS64Relocation(Symtab *symtab, ELFRelocation ,
+  DataExtractor _data,
+  Section *rel_section) {
+  Symbol *symbol = symtab->FindSymbolByID(ELFRelocation::RelocSymbol64(rel));
+  if (symbol) {
+addr_t value = symbol->GetAddressRef().GetFileAddress();
+DataBufferSP _buffer_sp = debug_data.GetSharedDataBuffer();
+// ObjectFileELF creates a WritableDataBuffer in CreateInstance.
+WritableDataBuffer *data_buffer =
+llvm::cast(data_buffer_sp.get());
+uint64_t *dst = reinterpret_cast(
+data_buffer->GetBytes() + rel_section->GetFileOffset() +
+ELFRelocation::RelocOffset64(rel));
+uint64_t val_offset = value + ELFRelocation::RelocAddend64(rel);
+memcpy(dst, _offset, sizeof(uint64_t));
+  }
+}
+
+static void ApplyELF64ABS32Relocation(Symtab *symtab, ELFRelocation ,
+  DataExtractor _data,
+  Section *rel_section, bool is_signed) {
+  Symbol *symbol = symtab->FindSymbolByID(ELFRelocation::RelocSymbol64(rel));
+  if (symbol) {
+addr_t value = symbol->GetAddressRef().GetFileAddress();
+value += ELFRelocation::RelocAddend32(rel);
+if ((!is_signed && (value > UINT32_MAX)) ||
+(is_signed &&
+ ((int64_t)value > INT32_MAX || (int64_t)value < INT32_MIN))) {
+  Log *log = GetLog(LLDBLog::Modules);
+  LLDB_LOGF(log, "Failed to apply debug info relocations");
+  return;
+}
+uint32_t truncated_addr = (value & 0x);
+DataBufferSP _buffer_sp = debug_data.GetSharedDataBuffer();
+// ObjectFileELF creates a WritableDataBuffer in CreateInstance.
+WritableDataBuffer *data_buffer =
+llvm::cast(data_buffer_sp.get());
+uint32_t *dst = reinterpret_cast(
+data_buffer->GetBytes() + rel_section->GetFileOffset() +
+ELFRelocation::RelocOffset32(rel));
+memcpy(dst, _addr, sizeof(uint32_t));
+  }
+}
+
 unsigned ObjectFileELF::ApplyRelocations(
 Symtab *symtab, const ELFHeader *hdr, const ELFSectionHeader *rel_hdr,
 const ELFSectionHeader *symtab_hdr, const ELFSectionHeader *debug_hdr,
@@ -2656,55 +2700,50 @@
  reloc_type(rel));
   }
 } else {
-  switch (reloc_type(rel)) {
-  case R_AARCH64_ABS64:
-  case R_X86_64_64: {
-symbol = symtab->FindSymbolByID(reloc_symbol(rel));
-if (symbol) {
-  addr_t value = symbol->GetAddressRef().GetFileAddress();
-  DataBufferSP _buffer_sp =

[Lldb-commits] [PATCH] D145571: [LLDB][ObjectFileELF] Correct the return type of Reloc{Offset, Addend}32

2023-03-08 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining created this revision.
SixWeining added a reviewer: DavidSpickett.
Herald added a subscriber: emaste.
Herald added a project: All.
SixWeining requested review of this revision.
Herald added subscribers: lldb-commits, MaskRay.
Herald added a project: LLDB.

This is a follow up of D145550 .

I think Reloc{Type,Symbol}{32,64} can keep unchanged as they are not
directly returning a field of the ELFRel[a] struct.

Depends on D145550 .


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145571

Files:
  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp


Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -114,11 +114,11 @@
 
   static unsigned RelocSymbol64(const ELFRelocation );
 
-  static unsigned RelocOffset32(const ELFRelocation );
+  static elf_addr RelocOffset32(const ELFRelocation );
 
   static elf_addr RelocOffset64(const ELFRelocation );
 
-  static unsigned RelocAddend32(const ELFRelocation );
+  static elf_sxword RelocAddend32(const ELFRelocation );
 
   static elf_sxword RelocAddend64(const ELFRelocation );
 
@@ -185,7 +185,7 @@
 return ELFRela::RelocSymbol64(*rel.reloc.get());
 }
 
-unsigned ELFRelocation::RelocOffset32(const ELFRelocation ) {
+elf_addr ELFRelocation::RelocOffset32(const ELFRelocation ) {
   if (rel.reloc.is())
 return rel.reloc.get()->r_offset;
   else
@@ -199,7 +199,7 @@
 return rel.reloc.get()->r_offset;
 }
 
-unsigned ELFRelocation::RelocAddend32(const ELFRelocation ) {
+elf_sxword ELFRelocation::RelocAddend32(const ELFRelocation ) {
   if (rel.reloc.is())
 return 0;
   else


Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -114,11 +114,11 @@
 
   static unsigned RelocSymbol64(const ELFRelocation );
 
-  static unsigned RelocOffset32(const ELFRelocation );
+  static elf_addr RelocOffset32(const ELFRelocation );
 
   static elf_addr RelocOffset64(const ELFRelocation );
 
-  static unsigned RelocAddend32(const ELFRelocation );
+  static elf_sxword RelocAddend32(const ELFRelocation );
 
   static elf_sxword RelocAddend64(const ELFRelocation );
 
@@ -185,7 +185,7 @@
 return ELFRela::RelocSymbol64(*rel.reloc.get());
 }
 
-unsigned ELFRelocation::RelocOffset32(const ELFRelocation ) {
+elf_addr ELFRelocation::RelocOffset32(const ELFRelocation ) {
   if (rel.reloc.is())
 return rel.reloc.get()->r_offset;
   else
@@ -199,7 +199,7 @@
 return rel.reloc.get()->r_offset;
 }
 
-unsigned ELFRelocation::RelocAddend32(const ELFRelocation ) {
+elf_sxword ELFRelocation::RelocAddend32(const ELFRelocation ) {
   if (rel.reloc.is())
 return 0;
   else
___
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[Lldb-commits] [PATCH] D145550: [LLDB][ObjectFileELF] Correct the return type of RelocOffset64 and RelocAddend64

2023-03-08 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining updated this revision to Diff 503264.
SixWeining added a comment.

Address @DavidSpickett's comments.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145550/new/

https://reviews.llvm.org/D145550

Files:
  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
  lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml


Index: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
===
--- lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
+++ lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
@@ -6,9 +6,9 @@
 # CHECK:  Name: .debug_info
 # CHECK:  Data:  (
 ## Before relocation:
-##:   
+##:     
 ## After relocation:
-# CHECK-NEXT: : 3412 7856 
+# CHECK-NEXT: : 3412 88776655 44332211 8899AABB CCDDEEFF
 # CHECK-NEXT: )
 
 --- !ELF
@@ -22,7 +22,7 @@
 Type:SHT_PROGBITS
   - Name:.debug_info
 Type:SHT_PROGBITS
-Content: 
+Content: 
   - Name:.rela.debug_info
 Type:SHT_RELA
 Info:.debug_info
@@ -34,7 +34,11 @@
   - Offset:  0x0004
 Symbol:  .debug_str
 Type:R_LARCH_64
-Addend:  0x5678
+Addend:  0x1122334455667788
+  - Offset:  0x000C
+Symbol:  .debug_str
+Type:R_LARCH_64
+Addend:  0xFFEEDDCCBBAA9988
 Symbols:
   - Name:.debug_str
 Type:STT_SECTION
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -116,11 +116,11 @@
 
   static unsigned RelocOffset32(const ELFRelocation );
 
-  static unsigned RelocOffset64(const ELFRelocation );
+  static elf_addr RelocOffset64(const ELFRelocation );
 
   static unsigned RelocAddend32(const ELFRelocation );
 
-  static unsigned RelocAddend64(const ELFRelocation );
+  static elf_sxword RelocAddend64(const ELFRelocation );
 
   bool IsRela() { return (reloc.is()); }
 
@@ -192,7 +192,7 @@
 return rel.reloc.get()->r_offset;
 }
 
-unsigned ELFRelocation::RelocOffset64(const ELFRelocation ) {
+elf_addr ELFRelocation::RelocOffset64(const ELFRelocation ) {
   if (rel.reloc.is())
 return rel.reloc.get()->r_offset;
   else
@@ -206,7 +206,7 @@
 return rel.reloc.get()->r_addend;
 }
 
-unsigned ELFRelocation::RelocAddend64(const ELFRelocation ) {
+elf_sxword  ELFRelocation::RelocAddend64(const ELFRelocation ) {
   if (rel.reloc.is())
 return 0;
   else


Index: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
===
--- lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
+++ lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
@@ -6,9 +6,9 @@
 # CHECK:  Name: .debug_info
 # CHECK:  Data:  (
 ## Before relocation:
-##:   
+##:     
 ## After relocation:
-# CHECK-NEXT: : 3412 7856 
+# CHECK-NEXT: : 3412 88776655 44332211 8899AABB CCDDEEFF
 # CHECK-NEXT: )
 
 --- !ELF
@@ -22,7 +22,7 @@
 Type:SHT_PROGBITS
   - Name:.debug_info
 Type:SHT_PROGBITS
-Content: 
+Content: 
   - Name:.rela.debug_info
 Type:SHT_RELA
 Info:.debug_info
@@ -34,7 +34,11 @@
   - Offset:  0x0004
 Symbol:  .debug_str
 Type:R_LARCH_64
-Addend:  0x5678
+Addend:  0x1122334455667788
+  - Offset:  0x000C
+Symbol:  .debug_str
+Type:R_LARCH_64
+Addend:  0xFFEEDDCCBBAA9988
 Symbols:
   - Name:.debug_str
 Type:STT_SECTION
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -116,11 +116,11 @@
 
   static unsigned RelocOffset32(const ELFRelocation );
 
-  static unsigned RelocOffset64(const ELFRelocation );
+  static elf_addr RelocOffset64(const ELFRelocation );
 
   static unsigned RelocAddend32(const ELFRelocation );
 
-  static unsigned RelocAddend64(const ELFRelocation );
+  static

[Lldb-commits] [PATCH] D145550: [LLDB][ObjectFileELF] Correct the return type of RelocOffset64 and RelocAddend64

2023-03-08 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added a comment.

In D145550#4177291 , @DavidSpickett 
wrote:

> Seems to me that member functions of `ELFRelocation` should use the typedefs 
> from `lldb/source/Plugins/ObjectFile/ELF/ELFHeader.h` where there is one. 
> `elf_sxword` for example.
>
> If you want to do that in another patch, that's fine. Just in case some test 
> case is relying on the uin64_t -> unsigned down cast unintentionally.

Yes, I agree. Let me do that in another patch. Thanks.




Comment at: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml:37
 Type:R_LARCH_64
-Addend:  0x5678
+Addend:  0x1122334455667788
 Symbols:

DavidSpickett wrote:
> I'm not familiar with how these relocation are processed, would it be better 
> to use something with the sign bit set here? Or does it not matter, the value 
> is just copied into .debug_info verbatim anyway.
For this case, it is processed by below code:
```
2596 static void ApplyELF64ABS64Relocation(Symtab *symtab, ELFRelocation ,
2597   DataExtractor _data,
2598   Section *rel_section) {
2599   Symbol *symbol = 
symtab->FindSymbolByID(ELFRelocation::RelocSymbol64(rel));
2600   if (symbol) {
2601 addr_t value = symbol->GetAddressRef().GetFileAddress();
2602 DataBufferSP _buffer_sp = debug_data.GetSharedDataBuffer(); 
2603 // ObjectFileELF creates a WritableDataBuffer in CreateInstance.
2604 WritableDataBuffer *data_buffer =
2605 llvm::cast(data_buffer_sp.get());
2606 uint64_t *dst = reinterpret_cast(
2607 data_buffer->GetBytes() + rel_section->GetFileOffset() +
2608 ELFRelocation::RelocOffset64(rel));
2609 uint64_t val_offset = value + ELFRelocation::RelocAddend64(rel);
2610 memcpy(dst, _offset, sizeof(uint64_t));
2611   }
2612 }
```

Memcpy `S + A` to .debug_info.

I can add another relocation entry with the sign bit set.


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[Lldb-commits] [PATCH] D145550: [LLDB][ObjectFileELF] Correct the return type of RelocOffset64 and RelocAddend64

2023-03-07 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining created this revision.
SixWeining added reviewers: DavidSpickett, labath, davide, xen0n, wangleiat, 
MaskRay.
Herald added a subscriber: emaste.
Herald added a project: All.
SixWeining requested review of this revision.
Herald added a project: LLDB.
Herald added a subscriber: lldb-commits.

According to `/usr/include/elf.h` and 
`lldb/source/Plugins/ObjectFile/ELF/ELFHeader.h`.
For ELF64 relocation, types of `offset` and `addend` should be `uint64_t` and 
`int64_t`.

Depends on D145462 .


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145550

Files:
  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
  lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml


Index: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
===
--- lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
+++ lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
@@ -8,7 +8,7 @@
 ## Before relocation:
 ##:   
 ## After relocation:
-# CHECK-NEXT: : 3412 7856 
+# CHECK-NEXT: : 3412 88776655 44332211
 # CHECK-NEXT: )
 
 --- !ELF
@@ -34,7 +34,7 @@
   - Offset:  0x0004
 Symbol:  .debug_str
 Type:R_LARCH_64
-Addend:  0x5678
+Addend:  0x1122334455667788
 Symbols:
   - Name:.debug_str
 Type:STT_SECTION
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -116,11 +116,11 @@
 
   static unsigned RelocOffset32(const ELFRelocation );
 
-  static unsigned RelocOffset64(const ELFRelocation );
+  static uint64_t RelocOffset64(const ELFRelocation );
 
   static unsigned RelocAddend32(const ELFRelocation );
 
-  static unsigned RelocAddend64(const ELFRelocation );
+  static int64_t RelocAddend64(const ELFRelocation );
 
   bool IsRela() { return (reloc.is()); }
 
@@ -192,7 +192,7 @@
 return rel.reloc.get()->r_offset;
 }
 
-unsigned ELFRelocation::RelocOffset64(const ELFRelocation ) {
+uint64_t ELFRelocation::RelocOffset64(const ELFRelocation ) {
   if (rel.reloc.is())
 return rel.reloc.get()->r_offset;
   else
@@ -206,7 +206,7 @@
 return rel.reloc.get()->r_addend;
 }
 
-unsigned ELFRelocation::RelocAddend64(const ELFRelocation ) {
+int64_t ELFRelocation::RelocAddend64(const ELFRelocation ) {
   if (rel.reloc.is())
 return 0;
   else


Index: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
===
--- lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
+++ lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
@@ -8,7 +8,7 @@
 ## Before relocation:
 ##:   
 ## After relocation:
-# CHECK-NEXT: : 3412 7856 
+# CHECK-NEXT: : 3412 88776655 44332211
 # CHECK-NEXT: )
 
 --- !ELF
@@ -34,7 +34,7 @@
   - Offset:  0x0004
 Symbol:  .debug_str
 Type:R_LARCH_64
-Addend:  0x5678
+Addend:  0x1122334455667788
 Symbols:
   - Name:.debug_str
 Type:STT_SECTION
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -116,11 +116,11 @@
 
   static unsigned RelocOffset32(const ELFRelocation );
 
-  static unsigned RelocOffset64(const ELFRelocation );
+  static uint64_t RelocOffset64(const ELFRelocation );
 
   static unsigned RelocAddend32(const ELFRelocation );
 
-  static unsigned RelocAddend64(const ELFRelocation );
+  static int64_t RelocAddend64(const ELFRelocation );
 
   bool IsRela() { return (reloc.is()); }
 
@@ -192,7 +192,7 @@
 return rel.reloc.get()->r_offset;
 }
 
-unsigned ELFRelocation::RelocOffset64(const ELFRelocation ) {
+uint64_t ELFRelocation::RelocOffset64(const ELFRelocation ) {
   if (rel.reloc.is())
 return rel.reloc.get()->r_offset;
   else
@@ -206,7 +206,7 @@
 return rel.reloc.get()->r_addend;
 }
 
-unsigned ELFRelocation::RelocAddend64(const ELFRelocation ) {
+int64_t ELFRelocation::RelocAddend64(const ELFRelocation ) {
   if (rel.reloc.is())
 return 0;
   else
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[Lldb-commits] [PATCH] D145462: [LLDB][ObjectFileELF] Support LoongArch64 in ApplyReloctions

2023-03-07 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining updated this revision to Diff 503236.
SixWeining added a comment.

Address @DavidSpickett's comments.

1. Fix the `&&` issue.
2. Make the test more readable.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145462/new/

https://reviews.llvm.org/D145462

Files:
  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
  lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml

Index: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
===
--- /dev/null
+++ lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
@@ -0,0 +1,45 @@
+# RUN: yaml2obj %s -o %t
+# RUN: lldb-test object-file -contents %t | FileCheck %s
+
+## Test that relocations are correctly applied to the .debug_info section on loongarch64.
+
+# CHECK:  Name: .debug_info
+# CHECK:  Data:  (
+## Before relocation:
+##:   
+## After relocation:
+# CHECK-NEXT: : 3412 7856 
+# CHECK-NEXT: )
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS64
+  Data:ELFDATA2LSB
+  Type:ET_REL
+  Machine: EM_LOONGARCH
+Sections:
+  - Name:.debug_str
+Type:SHT_PROGBITS
+  - Name:.debug_info
+Type:SHT_PROGBITS
+Content: 
+  - Name:.rela.debug_info
+Type:SHT_RELA
+Info:.debug_info
+Relocations:
+  - Offset:  0x
+Symbol:  .debug_str
+Type:R_LARCH_32
+Addend:  0x1234
+  - Offset:  0x0004
+Symbol:  .debug_str
+Type:R_LARCH_64
+Addend:  0x5678
+Symbols:
+  - Name:.debug_str
+Type:STT_SECTION
+Section: .debug_str
+  - Name:.debug_info
+Type:STT_SECTION
+Section: .debug_info
+...
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -2593,6 +2593,50 @@
  rel_data, symtab_data, strtab_data);
 }
 
+static void ApplyELF64ABS64Relocation(Symtab *symtab, ELFRelocation ,
+  DataExtractor _data,
+  Section *rel_section) {
+  Symbol *symbol = symtab->FindSymbolByID(ELFRelocation::RelocSymbol64(rel));
+  if (symbol) {
+addr_t value = symbol->GetAddressRef().GetFileAddress();
+DataBufferSP _buffer_sp = debug_data.GetSharedDataBuffer();
+// ObjectFileELF creates a WritableDataBuffer in CreateInstance.
+WritableDataBuffer *data_buffer =
+llvm::cast(data_buffer_sp.get());
+uint64_t *dst = reinterpret_cast(
+data_buffer->GetBytes() + rel_section->GetFileOffset() +
+ELFRelocation::RelocOffset64(rel));
+uint64_t val_offset = value + ELFRelocation::RelocAddend64(rel);
+memcpy(dst, _offset, sizeof(uint64_t));
+  }
+}
+
+static void ApplyELF64ABS32Relocation(Symtab *symtab, ELFRelocation ,
+  DataExtractor _data,
+  Section *rel_section, bool is_signed) {
+  Symbol *symbol = symtab->FindSymbolByID(ELFRelocation::RelocSymbol64(rel));
+  if (symbol) {
+addr_t value = symbol->GetAddressRef().GetFileAddress();
+value += ELFRelocation::RelocAddend32(rel);
+if ((!is_signed && (value > UINT32_MAX)) ||
+(is_signed &&
+ ((int64_t)value > INT32_MAX || (int64_t)value < INT32_MIN))) {
+  Log *log = GetLog(LLDBLog::Modules);
+  LLDB_LOGF(log, "Failed to apply debug info relocations");
+  return;
+}
+uint32_t truncated_addr = (value & 0x);
+DataBufferSP _buffer_sp = debug_data.GetSharedDataBuffer();
+// ObjectFileELF creates a WritableDataBuffer in CreateInstance.
+WritableDataBuffer *data_buffer =
+llvm::cast(data_buffer_sp.get());
+uint32_t *dst = reinterpret_cast(
+data_buffer->GetBytes() + rel_section->GetFileOffset() +
+ELFRelocation::RelocOffset32(rel));
+memcpy(dst, _addr, sizeof(uint32_t));
+  }
+}
+
 unsigned ObjectFileELF::ApplyRelocations(
 Symtab *symtab, const ELFHeader *hdr, const ELFSectionHeader *rel_hdr,
 const ELFSectionHeader *symtab_hdr, const ELFSectionHeader *debug_hdr,
@@ -2656,55 +2700,50 @@
  reloc_type(rel));
   }
 } else {
-  switch (reloc_type(rel)) {
-  case R_AARCH64_ABS64:
-  case R_X86_64_64: {
-symbol = symtab->FindSymbolByID(reloc_symbol(rel));
-if (symbol) {
-  addr_t value = symbol->GetAddressRef().GetFileAddress();
-  DataBufferSP _buffer_sp =

[Lldb-commits] [PATCH] D145462: [LLDB][ObjectFileELF] Support LoongArch64 in ApplyReloctions

2023-03-07 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added inline comments.



Comment at: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp:2623
+(is_signed &&
+ ((int64_t)value > INT32_MAX && (int64_t)value < INT32_MIN))) {
+  Log *log = GetLog(LLDBLog::Modules);

DavidSpickett wrote:
> Should this be `||` not `&&`?
Yes I think so. This should be an error in original code but not introduced 
this time. Do you mind I include the fix in current patch or in a separate one?



Comment at: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml:10
+# CHECK-NEXT: )
+
+--- !ELF

DavidSpickett wrote:
> Please add a comment to explain briefly how this proves the relocations are 
> being processed. As it is I don't see how the content of the data section 
> proves that any work was done, besides us not crashing.
> 
> Or the other way around, if the relocations were not applied what would we 
> see here?
No problem.

Actually I just add this test like what aarch64 and i386 did before. Let me 
simplify the test and make it more readable. Thanks.


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[Lldb-commits] [PATCH] D145462: [LLDB][ObjectFileELF] Support LoongArch64 in ApplyReloctions

2023-03-06 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining created this revision.
SixWeining added reviewers: labath, davide, DavidSpickett, xen0n, wangleiat, 
MaskRay.
Herald added subscribers: pengfei, emaste.
Herald added a project: All.
SixWeining requested review of this revision.
Herald added a project: LLDB.
Herald added a subscriber: lldb-commits.

Currently ApplyReloctions() deals with different archs' relocation types
together (in a single `switch() {..}`). I think it is incorrect because
different relocation types of different archs may have same enum values.
For example:
`R_LARCH_32` and `R_X86_64_64` are both `1`;
`R_LARCH_64` and `R_X86_64_PC32` are both `2`.

This patch handles each arch in seperate `switch()` to solve the enum
values conflict issue.

And a new test is added for LoongArch64.

Change-Id: I96aef784bd6ca9387067ef67ffa9f0fd9a7cf18b


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145462

Files:
  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
  lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml

Index: lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
===
--- /dev/null
+++ lldb/test/Shell/ObjectFile/ELF/loongarch64-relocations.yaml
@@ -0,0 +1,93 @@
+# RUN: yaml2obj %s -o %t
+# RUN: lldb-test object-file -contents %t | FileCheck %s
+
+# CHECK:  Name: .debug_info
+# CHECK:  Data:  (
+# CHECK-NEXT: : 4700 0400 0801  0C002D00  3700 
+# CHECK-NEXT: 0020:  0800 0200  0008 0001 6F49 00010243
+# CHECK-NEXT: 0040: 0003 4B00 050400
+# CHECK-NEXT: )
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS64
+  Data:ELFDATA2LSB
+  Type:ET_REL
+  Machine: EM_LOONGARCH
+Sections:
+  - Name:.text
+Type:SHT_PROGBITS
+Flags:   [ SHF_ALLOC, SHF_EXECINSTR ]
+AddressAlign:0x0004
+Content: E0031B32C0035FD6
+  - Name:.debug_str
+Type:SHT_PROGBITS
+Flags:   [ SHF_MERGE, SHF_STRINGS ]
+AddressAlign:0x0001
+Size:0x50
+  - Name:.debug_abbrev
+Type:SHT_PROGBITS
+AddressAlign:0x0001
+Size:0x10
+  - Name:.debug_info
+Type:SHT_PROGBITS
+AddressAlign:0x0001
+Content: 4700040008010C000800020800016F0102430003050400
+  - Name:.rela.debug_info
+Type:SHT_RELA
+Link:.symtab
+AddressAlign:0x0008
+Info:.debug_info
+Relocations:
+  - Offset:  0x0006
+Symbol:  .debug_abbrev
+Type:R_LARCH_32
+  - Offset:  0x000C
+Symbol:  .debug_str
+Type:R_LARCH_32
+  - Offset:  0x0012
+Symbol:  .debug_str
+Type:R_LARCH_32
+Addend:  45
+  - Offset:  0x0016
+Symbol:  .debug_line
+Type:R_LARCH_32
+  - Offset:  0x001A
+Symbol:  .debug_str
+Type:R_LARCH_32
+Addend:  55
+  - Offset:  0x001E
+Symbol:  .text
+Type:R_LARCH_64
+  - Offset:  0x002B
+Symbol:  .text
+Type:R_LARCH_64
+  - Offset:  0x0039
+Symbol:  .debug_str
+Type:R_LARCH_32
+Addend:  73
+  - Offset:  0x0044
+Symbol:  .debug_str
+Type:R_LARCH_32
+Addend:  75
+  - Name:.debug_line
+Type:SHT_PROGBITS
+AddressAlign:0x0001
+Size:0x20
+Symbols:
+  - Name:.text
+Type:STT_SECTION
+Section: .text
+  - Name:.debug_str
+Type:STT_SECTION
+Section: .debug_str
+  - Name:.debug_abbrev
+Type:STT_SECTION
+Section: .debug_abbrev
+  - Name:.debug_info
+Type:STT_SECTION
+Section: .debug_info
+  - Name:.debug_line
+Type:STT_SECTION
+Section: .debug_line
+...
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -2593,6 +2593,50 @@
  rel_data, symtab_data, strtab_data);
 }
 
+static void

[Lldb-commits] [PATCH] D140759: [LLDB][LoongArch] Add FP branch instructions for EmulateInstructionLoongArch

2023-01-13 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGb7ae5762a110: [LLDB][LoongArch] Add FP branch instructions 
for EmulateInstructionLoongArch (authored by lh03061238, committed by 
SixWeining).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140759/new/

https://reviews.llvm.org/D140759

Files:
  lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
  lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
  lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp

Index: lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp
===
--- lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp
+++ lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp
@@ -38,6 +38,14 @@
 testBZcondBranch(this, name, false, rj_val_continued); \
   }
 
+#define GEN_BCZCOND_TEST(bit, name, cj_val_branched, cj_val_continued) \
+  TEST_F(LoongArch##bit##EmulatorTester, test##name##branched) {   \
+testBCZcondBranch(this, name, true, cj_val_branched);  \
+  }\
+  TEST_F(LoongArch##bit##EmulatorTester, test##name##continued) {  \
+testBCZcondBranch(this, name, false, cj_val_continued);\
+  }
+
 struct LoongArch64EmulatorTester : public EmulateInstructionLoongArch,
testing::Test {
   RegisterInfoPOSIX_loongarch64::GPR gpr;
@@ -136,8 +144,26 @@
   return EncodeBZcondType(0b010001, rj, uint32_t(offs21));
 }
 
+// BCEQZ BCNEZ
+static uint32_t EncodeBCZcondType(uint32_t opcode, uint8_t cj,
+  uint32_t offs21) {
+  uint32_t offs20_16 = (offs21 & 0x001f) >> 16;
+  uint32_t offs15_0 = offs21 & 0x;
+  return (opcode >> 2) << 26 | offs15_0 << 10 | (opcode & 0b11) << 8 | cj << 5 |
+ offs20_16;
+}
+
+static uint32_t BCEQZ(uint8_t cj, int32_t offs21) {
+  return EncodeBCZcondType(0b01001000, cj, uint32_t(offs21));
+}
+
+static uint32_t BCNEZ(uint8_t cj, int32_t offs21) {
+  return EncodeBCZcondType(0b01001001, cj, uint32_t(offs21));
+}
+
 using EncoderBcond = uint32_t (*)(uint32_t rj, uint32_t rd, int32_t offs16);
 using EncoderBZcond = uint32_t (*)(uint32_t rj, int32_t offs21);
+using EncoderBCZcond = uint32_t (*)(uint8_t cj, int32_t offs21);
 
 TEST_F(LoongArch64EmulatorTester, testJIRL) {
   bool success = false;
@@ -220,6 +246,21 @@
   ASSERT_EQ(pc, old_pc + (branched ? (-256 * 4) : 4));
 }
 
+static void testBCZcondBranch(LoongArch64EmulatorTester *tester,
+  EncoderBCZcond encoder, bool branched,
+  uint32_t cj_val) {
+  bool success = false;
+  addr_t old_pc = 0x12000600;
+  tester->WritePC(old_pc);
+  tester->fpr.fcc = cj_val;
+  // bcz fcc0, 256
+  uint32_t inst = encoder(0, 256);
+  ASSERT_TRUE(tester->TestExecute(inst));
+  auto pc = tester->ReadPC();
+  ASSERT_TRUE(success);
+  ASSERT_EQ(pc, old_pc + (branched ? (256 * 4) : 4));
+}
+
 GEN_BCOND_TEST(64, BEQ, 1, 1, 0)
 GEN_BCOND_TEST(64, BNE, 1, 0, 1)
 GEN_BCOND_TEST(64, BLT, -2, 1, -3)
@@ -228,3 +269,5 @@
 GEN_BCOND_TEST(64, BGEU, -2, 1, -1)
 GEN_BZCOND_TEST(64, BEQZ, 0, 1)
 GEN_BZCOND_TEST(64, BNEZ, 1, 0)
+GEN_BCZCOND_TEST(64, BCEQZ, 0, 1)
+GEN_BCZCOND_TEST(64, BCNEZ, 1, 0)
Index: lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
===
--- lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
+++ lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
@@ -75,6 +75,8 @@
 
   bool EmulateBEQZ(uint32_t inst);
   bool EmulateBNEZ(uint32_t inst);
+  bool EmulateBCEQZ(uint32_t inst);
+  bool EmulateBCNEZ(uint32_t inst);
   bool EmulateJIRL(uint32_t inst);
   bool EmulateB(uint32_t inst);
   bool EmulateBL(uint32_t inst);
@@ -88,6 +90,8 @@
 
   bool EmulateBEQZ64(uint32_t inst);
   bool EmulateBNEZ64(uint32_t inst);
+  bool EmulateBCEQZ64(uint32_t inst);
+  bool EmulateBCNEZ64(uint32_t inst);
   bool EmulateJIRL64(uint32_t inst);
   bool EmulateB64(uint32_t inst);
   bool EmulateBL64(uint32_t inst);
Index: lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
===
--- lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
+++ lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
@@ -40,6 +40,10 @@
"beqz rj, offs21"},
   {0xfc00, 0x4400, ::EmulateBNEZ,
"bnez rj, offs21"},
+  {0xfc000300, 0x4800, ::EmulateBCEQZ,
+   "bceqz cj, offs21"},
+  {0xfc000300, 0x48000100, ::EmulateBCNEZ,
+   "bcnez cj, offs21"},
   {0xfc00, 0x4c00, ::EmulateJIRL,
"jirl rd, rj,

[Lldb-commits] [PATCH] D140615: [LLDB][LoongArch] Delete the s9 register alias definition

2023-01-13 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGb1f4f06dede5: [LLDB][LoongArch] Delete the s9 register alias 
definition (authored by lh03061238, committed by SixWeining).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140615/new/

https://reviews.llvm.org/D140615

Files:
  lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
  lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
  lldb/source/Utility/LoongArch_DWARF_Registers.h


Index: lldb/source/Utility/LoongArch_DWARF_Registers.h
===
--- lldb/source/Utility/LoongArch_DWARF_Registers.h
+++ lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -128,7 +128,6 @@
   dwarf_gpr_t7 = dwarf_gpr_r19,
   dwarf_gpr_t8 = dwarf_gpr_r20,
   dwarf_gpr_fp = dwarf_gpr_r22,
-  dwarf_gpr_s9 = dwarf_gpr_r22,
   dwarf_gpr_s0 = dwarf_gpr_r23,
   dwarf_gpr_s1 = dwarf_gpr_r24,
   dwarf_gpr_s2 = dwarf_gpr_r25,
Index: lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
===
--- lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
+++ lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
@@ -85,7 +85,6 @@
   gpr_t7_loongarch = gpr_r19_loongarch,
   gpr_t8_loongarch = gpr_r20_loongarch,
   gpr_fp_loongarch = gpr_r22_loongarch,
-  gpr_s9_loongarch = gpr_r22_loongarch,
   gpr_s0_loongarch = gpr_r23_loongarch,
   gpr_s1_loongarch = gpr_r24_loongarch,
   gpr_s2_loongarch = gpr_r25_loongarch,
Index: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
===
--- lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
+++ lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
@@ -100,7 +100,6 @@
 DEFINE_GPR64_ALT(r20, t8, LLDB_INVALID_REGNUM),
 DEFINE_GPR64(r21, LLDB_INVALID_REGNUM),
 DEFINE_GPR64_ALT(r22, fp, LLDB_REGNUM_GENERIC_FP),
-DEFINE_GPR64_ALT(r22, s9, LLDB_REGNUM_GENERIC_FP),
 DEFINE_GPR64_ALT(r23, s0, LLDB_INVALID_REGNUM),
 DEFINE_GPR64_ALT(r24, s1, LLDB_INVALID_REGNUM),
 DEFINE_GPR64_ALT(r25, s2, LLDB_INVALID_REGNUM),


Index: lldb/source/Utility/LoongArch_DWARF_Registers.h
===
--- lldb/source/Utility/LoongArch_DWARF_Registers.h
+++ lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -128,7 +128,6 @@
   dwarf_gpr_t7 = dwarf_gpr_r19,
   dwarf_gpr_t8 = dwarf_gpr_r20,
   dwarf_gpr_fp = dwarf_gpr_r22,
-  dwarf_gpr_s9 = dwarf_gpr_r22,
   dwarf_gpr_s0 = dwarf_gpr_r23,
   dwarf_gpr_s1 = dwarf_gpr_r24,
   dwarf_gpr_s2 = dwarf_gpr_r25,
Index: lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
===
--- lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
+++ lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
@@ -85,7 +85,6 @@
   gpr_t7_loongarch = gpr_r19_loongarch,
   gpr_t8_loongarch = gpr_r20_loongarch,
   gpr_fp_loongarch = gpr_r22_loongarch,
-  gpr_s9_loongarch = gpr_r22_loongarch,
   gpr_s0_loongarch = gpr_r23_loongarch,
   gpr_s1_loongarch = gpr_r24_loongarch,
   gpr_s2_loongarch = gpr_r25_loongarch,
Index: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
===
--- lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
+++ lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
@@ -100,7 +100,6 @@
 DEFINE_GPR64_ALT(r20, t8, LLDB_INVALID_REGNUM),
 DEFINE_GPR64(r21, LLDB_INVALID_REGNUM),
 DEFINE_GPR64_ALT(r22, fp, LLDB_REGNUM_GENERIC_FP),
-DEFINE_GPR64_ALT(r22, s9, LLDB_REGNUM_GENERIC_FP),
 DEFINE_GPR64_ALT(r23, s0, LLDB_INVALID_REGNUM),
 DEFINE_GPR64_ALT(r24, s1, LLDB_INVALID_REGNUM),
 DEFINE_GPR64_ALT(r25, s2, LLDB_INVALID_REGNUM),
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[Lldb-commits] [PATCH] D140386: [LLDB][LoongArch] Add unittests for EmulateInstructionLoongArch

2023-01-12 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1eaadaea5090: [LLDB][LoongArch] Add unittests for 
EmulateInstructionLoongArch (authored by lh03061238, committed by SixWeining).

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Files:
  lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
  lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
  lldb/unittests/Instruction/CMakeLists.txt
  lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp

Index: lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp
===
--- /dev/null
+++ lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp
@@ -0,0 +1,230 @@
+//===-- TestLoongArchEmulator.cpp -===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "lldb/Core/Address.h"
+#include "lldb/Core/Disassembler.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Target/ExecutionContext.h"
+#include "lldb/Utility/ArchSpec.h"
+#include "lldb/Utility/RegisterValue.h"
+#include "gtest/gtest.h"
+
+#include "Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h"
+#include "Plugins/Process/Utility/lldb-loongarch-register-enums.h"
+
+using namespace llvm;
+using namespace lldb;
+using namespace lldb_private;
+
+#define GEN_BCOND_TEST(bit, name, rj_val, rd_val_branched, rd_val_continued)   \
+  TEST_F(LoongArch##bit##EmulatorTester, test##name##branched) {   \
+testBcondBranch(this, name, true, rj_val, rd_val_branched);\
+  }\
+  TEST_F(LoongArch##bit##EmulatorTester, test##name##continued) {  \
+testBcondBranch(this, name, false, rj_val, rd_val_continued);  \
+  }
+
+#define GEN_BZCOND_TEST(bit, name, rj_val_branched, rj_val_continued)  \
+  TEST_F(LoongArch##bit##EmulatorTester, test##name##branched) {   \
+testBZcondBranch(this, name, true, rj_val_branched);   \
+  }\
+  TEST_F(LoongArch##bit##EmulatorTester, test##name##continued) {  \
+testBZcondBranch(this, name, false, rj_val_continued); \
+  }
+
+struct LoongArch64EmulatorTester : public EmulateInstructionLoongArch,
+   testing::Test {
+  RegisterInfoPOSIX_loongarch64::GPR gpr;
+  RegisterInfoPOSIX_loongarch64::FPR fpr;
+
+  LoongArch64EmulatorTester(
+  std::string triple = "loongarch64-unknown-linux-gnu")
+  : EmulateInstructionLoongArch(ArchSpec(triple)) {
+EmulateInstruction::SetReadRegCallback(ReadRegisterCallback);
+EmulateInstruction::SetWriteRegCallback(WriteRegisterCallback);
+  }
+
+  static bool ReadRegisterCallback(EmulateInstruction *instruction, void *baton,
+   const RegisterInfo *reg_info,
+   RegisterValue _value) {
+LoongArch64EmulatorTester *tester =
+(LoongArch64EmulatorTester *)instruction;
+uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+if (reg >= gpr_r0_loongarch && reg <= gpr_r31_loongarch)
+  reg_value.SetUInt(tester->gpr.gpr[reg], reg_info->byte_size);
+else if (reg == gpr_orig_a0_loongarch)
+  reg_value.SetUInt(tester->gpr.orig_a0, reg_info->byte_size);
+else if (reg == gpr_pc_loongarch)
+  reg_value.SetUInt(tester->gpr.csr_era, reg_info->byte_size);
+else if (reg == gpr_badv_loongarch)
+  reg_value.SetUInt(tester->gpr.csr_badv, reg_info->byte_size);
+else if (reg == fpr_first_loongarch + 32)
+  // fcc0
+  reg_value.SetUInt(tester->fpr.fcc, reg_info->byte_size);
+return true;
+  }
+
+  static bool WriteRegisterCallback(EmulateInstruction *instruction,
+void *baton, const Context ,
+const RegisterInfo *reg_info,
+const RegisterValue _value) {
+LoongArch64EmulatorTester *tester =
+(LoongArch64EmulatorTester *)instruction;
+uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
+if (reg >= gpr_r0_loongarch && reg <= gpr_r31_loongarch)
+  tester->gpr.gpr[reg] = reg_value.GetAsUInt64();
+else if (reg == gpr_orig_a0_loongarch)
+  tester->gpr.orig_a0 = reg_value.GetAsUInt64();
+else if (reg == gpr_pc_loongarch)
+  tester->gpr.csr_era = reg_value.GetAsUInt64();
+else if

[Lldb-commits] [PATCH] D141245: [LLDB][LoongArch] ObjectFile: add a case for `EM_LOONGARCH`

2023-01-12 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd52582b6b7df: [LLDB][LoongArch] ObjectFile: add a case for 
`EM_LOONGARCH` (authored by lh03061238, committed by SixWeining).

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Files:
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Index: lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
@@ -211,6 +211,9 @@
   case EM_RISCV:
 slot = R_RISCV_JUMP_SLOT;
 break;
+  case EM_LOONGARCH:
+slot = R_LARCH_JUMP_SLOT;
+break;
   }
 
   return slot;


Index: lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
@@ -211,6 +211,9 @@
   case EM_RISCV:
 slot = R_RISCV_JUMP_SLOT;
 break;
+  case EM_LOONGARCH:
+slot = R_LARCH_JUMP_SLOT;
+break;
   }
 
   return slot;
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[Lldb-commits] [PATCH] D140759: [LLDB][LoongArch] Add FP branch instructions for EmulateInstructionLoongArch

2022-12-30 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining accepted this revision.
SixWeining added a comment.
This revision is now accepted and ready to land.

LGTM from the LoongArch side. Thanks.




Comment at: lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp:154
+  opcode = opcode >> 2;
+  return opcode << 26 | offs15_0 << 10 | bcxxz << 8 | cj << 5 | offs20_16;
+}

Seems you can use `opcode & 0b11` directly.


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[Lldb-commits] [PATCH] D140759: [LLDB][LoongArch] Add FP branch instructions for EmulateInstructionLoongArch

2022-12-29 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added inline comments.



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:42
"bnez rj, offs21"},
+  {0xfc00, 0x4800, ::EmulateBCXXZ,
+   "bceqz/bcnez cj, offs21"},

It should be 0xfc000300. BCEQZ and BCNEZ should be seperated.
See 
https://github.com/loongson/LoongArch-Documentation/blob/main/docs/LoongArch-Vol1-EN/table-of-instruction-encoding.adoc



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:303
 
+// bceqz   cj, offs21
+// if CFR[cj] == 0:

A single space is enough.



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:312
+  uint32_t bcxxz = (inst >> 8) & 0b11;
+  uint32_t cj = Bits32(inst, 7, 5) + fpr_first_loongarch + 32;
+  uint64_t pc = ReadPC();

Is this number of FPRs? Would it be changed in future when we support vertor 
registers? Adding some comment may help future readers.



Comment at: lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp:157
+static uint32_t BCEQZ(uint8_t cj, int32_t offs21) {
+  return EncodeBCZcondType(0b010010, cj, 0b00, uint32_t(offs21));
+}

The opcode is 8 bits `0b01001000`. See: 
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td#L109

I think you can remove the third argument `bcxxz`.



Comment at: lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp:256
+  tester->fpr.fcc = cj_val;
+  // bcz  fcc0, (256)
+  uint32_t inst = encoder(0, 256);

Ditto.


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[Lldb-commits] [PATCH] D140615: [LLDB][LoongArch] Delete the s9 register alias definition

2022-12-29 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining accepted this revision.
SixWeining added a comment.
This revision is now accepted and ready to land.

LGTM.


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[Lldb-commits] [PATCH] D140386: [LLDB][LoongArch] Add unittests for EmulateInstructionLoongArch

2022-12-28 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added a comment.

The tests LGTM.




Comment at: lldb/unittests/Instruction/LoongArch/TestLoongArchEmulator.cpp:1-2
+//===-- TestLoongArchEmulator.cpp
+//-===//
+//

Merge these lines into one.


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[Lldb-commits] [PATCH] D140616: [LLDB][LoongArch] Optimize EmulateInstructionLoongArch related code

2022-12-27 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3473c1093aa0: [LLDB][LoongArch] Optimize 
EmulateInstructionLoongArch related code (authored by lh03061238, committed by 
SixWeining).

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Files:
  lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp

Index: lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
===
--- lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
+++ lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
@@ -199,80 +199,47 @@
 }
 
 bool EmulateInstructionLoongArch::EmulateBEQZ(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBEQZ64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBEQZ64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBNEZ(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBNEZ64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBNEZ64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateJIRL(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateJIRL64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateJIRL64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateB(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateB64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateB64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBL(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBL64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBL64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBEQ(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBEQ64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBEQ64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBNE(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateJIRL64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBNE64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBLT(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBLT64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBLT64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBGE(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBGE64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBGE64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBLTU(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBLTU64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBLTU64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBGEU(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBGEU64(inst);
-  else
-return false;
+  return IsLoongArch64() ? EmulateBGEU64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateNonJMP(uint32_t inst) { return false; }
@@ -281,20 +248,17 @@
 // if GR[rj] == 0:
 //   PC = PC + SignExtend({offs21, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBEQZ64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
-  uint64_t rj_val;
   uint64_t pc = ReadPC();
   if (!success)
 return false;
   uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
-  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, );
+  uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, );
   if (!success)
 return false;
   if (rj_val == 0) {
-imm_sign_extend = llvm::SignExtend64<23>(offs21 << 2);
-next_pc = pc + imm_sign_extend;
+uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2);
 return WritePC(next_pc);
   } else
 return WritePC(pc + 4);
@@ -304,20 +268,17 @@
 // if GR[rj] != 0:
 //   PC = PC + SignExtend({offs21, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBNEZ64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
-  uint64_t rj_val;
   uint64_t pc = ReadPC();
   if (!success)
 return false;
   uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
-  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, );
+  uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, );
   if (!success)
 return false;
   if (rj_val != 0) {
-imm_sign_extend = llvm::SignExtend64<23>(offs21 << 2);
-next_pc = pc + imm_sign_extend;
+uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2);
 return WritePC(next_pc);
   } else
 return WritePC(pc + 4);
@@ -327,8 +288,6 @@
 // GR[rd] = PC + 4
 // PC = GR[rj] + SignExtend({offs16, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateJIRL64(uint32_t inst) {
-  uint64_t

[Lldb-commits] [PATCH] D140616: [LLDB][LoongArch] Optimize EmulateInstructionLoongArch related code

2022-12-25 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining accepted this revision.
SixWeining added a comment.
This revision is now accepted and ready to land.

LGTM. Thanks.


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[Lldb-commits] [PATCH] D140616: [LLDB][LoongArch] Optimize EmulateInstructionLoongArch related code

2022-12-23 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added inline comments.



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:202
 bool EmulateInstructionLoongArch::EmulateBEQZ(uint32_t inst) {
-  if (IsLoongArch64())
-return EmulateBEQZ64(inst);
-  else
-return false;
+  return (IsLoongArch64()) ? EmulateBEQZ64(inst) : false;
 }

return IsLoongArch64() ? EmulateBEQZ64(inst) : false;


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[Lldb-commits] [PATCH] D139833: [LLDB][LoongArch] Add branch instructions for EmulateInstructionLoongArch

2022-12-16 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGeafe2d4cf17b: [LLDB][LoongArch] Add branch instructions for 
EmulateInstructionLoongArch (authored by lh03061238, committed by SixWeining).

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Files:
  lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
  lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h

Index: lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
===
--- lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
+++ lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
@@ -38,8 +38,9 @@
   static void Terminate();
 
 public:
-  EmulateInstructionLoongArch(const ArchSpec )
-  : EmulateInstruction(arch) {}
+  EmulateInstructionLoongArch(const ArchSpec ) : EmulateInstruction(arch) {
+m_arch_subtype = arch.GetMachine();
+  }
 
   llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
 
@@ -57,6 +58,7 @@
uint32_t reg_num) override;
   lldb::addr_t ReadPC(bool *success);
   bool WritePC(lldb::addr_t pc);
+  bool IsLoongArch64() { return m_arch_subtype == llvm::Triple::loongarch64; }
 
 private:
   struct Opcode {
@@ -66,9 +68,33 @@
 const char *name;
   };
 
+  llvm::Triple::ArchType m_arch_subtype;
   Opcode *GetOpcodeForInstruction(uint32_t inst);
 
+  bool EmulateBEQZ(uint32_t inst);
+  bool EmulateBNEZ(uint32_t inst);
+  bool EmulateJIRL(uint32_t inst);
+  bool EmulateB(uint32_t inst);
+  bool EmulateBL(uint32_t inst);
+  bool EmulateBEQ(uint32_t inst);
+  bool EmulateBNE(uint32_t inst);
+  bool EmulateBLT(uint32_t inst);
+  bool EmulateBGE(uint32_t inst);
+  bool EmulateBLTU(uint32_t inst);
+  bool EmulateBGEU(uint32_t inst);
   bool EmulateNonJMP(uint32_t inst);
+
+  bool EmulateBEQZ64(uint32_t inst);
+  bool EmulateBNEZ64(uint32_t inst);
+  bool EmulateJIRL64(uint32_t inst);
+  bool EmulateB64(uint32_t inst);
+  bool EmulateBL64(uint32_t inst);
+  bool EmulateBEQ64(uint32_t inst);
+  bool EmulateBNE64(uint32_t inst);
+  bool EmulateBLT64(uint32_t inst);
+  bool EmulateBGE64(uint32_t inst);
+  bool EmulateBLTU64(uint32_t inst);
+  bool EmulateBGEU64(uint32_t inst);
 };
 
 } // namespace lldb_private
Index: lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
===
--- lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
+++ lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
@@ -33,8 +33,30 @@
 
 EmulateInstructionLoongArch::Opcode *
 EmulateInstructionLoongArch::GetOpcodeForInstruction(uint32_t inst) {
-  // TODO: Add the mask of jump instruction.
+  // TODO: Add the mask for other instruction.
   static EmulateInstructionLoongArch::Opcode g_opcodes[] = {
+  {0xfc00, 0x4000, ::EmulateBEQZ,
+   "beqz rj, offs21"},
+  {0xfc00, 0x4400, ::EmulateBNEZ,
+   "bnez rj, offs21"},
+  {0xfc00, 0x4c00, ::EmulateJIRL,
+   "jirl rd, rj, offs16"},
+  {0xfc00, 0x5000, ::EmulateB,
+   " b  offs26"},
+  {0xfc00, 0x5400, ::EmulateBL,
+   "bl  offs26"},
+  {0xfc00, 0x5800, ::EmulateBEQ,
+   "beq  rj, rd, offs16"},
+  {0xfc00, 0x5c00, ::EmulateBNE,
+   "bne  rj, rd, offs16"},
+  {0xfc00, 0x6000, ::EmulateBLT,
+   "blt  rj, rd, offs16"},
+  {0xfc00, 0x6400, ::EmulateBGE,
+   "bge  rj, rd, offs16"},
+  {0xfc00, 0x6800, ::EmulateBLTU,
+   "bltu rj, rd, offs16"},
+  {0xfc00, 0x6c00, ::EmulateBGEU,
+   "bgeu rj, rd, offs16"},
   {0x, 0x, ::EmulateNonJMP,
"NonJMP"}};
   static const size_t num_loongarch_opcodes = std::size(g_opcodes);
@@ -176,6 +198,339 @@
   return arch.GetTriple().isLoongArch();
 }
 
+bool EmulateInstructionLoongArch::EmulateBEQZ(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBEQZ64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBNEZ(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBNEZ64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateJIRL(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateJIRL64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateB(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateB64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBL(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBL64(inst);
+  else
+return false;
+}
+
+bool EmulateInstructionLoongArch::EmulateBEQ(uint32_t inst) {
+  if (IsLoongArch64())
+return EmulateBEQ64(inst);
+  else
+return

[Lldb-commits] [PATCH] D139833: [LLDB][LoongArch] Add branch instructions for EmulateInstructionLoongArch

2022-12-15 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining accepted this revision.
SixWeining added a comment.

LGTM from the LoongArch side.


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[Lldb-commits] [PATCH] D139833: [LLDB][LoongArch] Add branch instructions for EmulateInstructionLoongArch

2022-12-12 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added a comment.

1. Does the directory `lldb/source/Plugins/Instruction/LoongArch/` target both 
`LoongArch64` and `LoongArch32`?
2. Will you handle floating pointer branching instructions `bceqz` and `bcnez` 
in future?




Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:205
+bool EmulateInstructionLoongArch::EmulateBEQZ(uint32_t inst) {
+  uint64_t next_pc, imm_sign_extend;
+  bool success = false;

On LoongArch32, it should be `uint32_t`, right?



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:208
+  uint32_t rj = Bits32(inst, 9, 5);
+  uint64_t rj_val;
+  uint64_t pc = ReadPC();

On LoongArch32, it should be `uint32_t`, right?



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:213
+  uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
+  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, );
+  if (rj_val == 0) {

Should `success` be checked after call ?



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:215
+  if (rj_val == 0) {
+imm_sign_extend = llvm::SignExtend64<23>(offs21 << 2);
+next_pc = pc + imm_sign_extend;

On LoongArch32, it should be `llvm::SignExtend32`, right?



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:258
+return false;
+  ReadRegister(eRegisterKindLLDB, rj, value);
+  imm_sign_extend = llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);

Return value should be checked ?



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:269
+  bool success = false;
+  uint64_t pc = ReadPC();
+  uint32_t offs26 = Bits32(inst, 25, 10) + (Bits32(inst, 9, 0) << 16);

Should it be checked ?



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:306
+return false;
+  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, );
+  rd_val = ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, );

Ditto.


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[Lldb-commits] [PATCH] D139158: [LLDB][LoongArch] Make software single stepping work

2022-12-08 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3a9e07b1e7f4: [LLDB][LoongArch] Make software single 
stepping work (authored by SixWeining).

Repository:
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CHANGES SINCE LAST ACTION
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Files:
  lldb/source/Plugins/Instruction/CMakeLists.txt
  lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt
  lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp
  lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
  lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
  lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
  lldb/tools/lldb-server/CMakeLists.txt
  lldb/tools/lldb-server/SystemInitializerLLGS.cpp

Index: lldb/tools/lldb-server/SystemInitializerLLGS.cpp
===
--- lldb/tools/lldb-server/SystemInitializerLLGS.cpp
+++ lldb/tools/lldb-server/SystemInitializerLLGS.cpp
@@ -29,6 +29,11 @@
 #include "Plugins/Instruction/ARM/EmulateInstructionARM.h"
 #endif
 
+#if defined(__loongarch__)
+#define LLDB_TARGET_LoongArch
+#include "Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h"
+#endif
+
 #if defined(__mips64__) || defined(mips64) || defined(__mips64) || \
 defined(__MIPS64__) || defined(_M_MIPS64)
 #define LLDB_TARGET_MIPS64
@@ -57,6 +62,9 @@
 #if defined(LLDB_TARGET_ARM) || defined(LLDB_TARGET_ARM64)
   EmulateInstructionARM::Initialize();
 #endif
+#if defined(LLDB_TARGET_LoongArch)
+  EmulateInstructionLoongArch::Initialize();
+#endif
 #if defined(LLDB_TARGET_MIPS) || defined(LLDB_TARGET_MIPS64)
   EmulateInstructionMIPS::Initialize();
 #endif
@@ -76,6 +84,9 @@
 #if defined(LLDB_TARGET_ARM) || defined(LLDB_TARGET_ARM64)
   EmulateInstructionARM::Terminate();
 #endif
+#if defined(LLDB_TARGET_LoongArch)
+  EmulateInstructionLoongArch::Terminate();
+#endif
 #if defined(LLDB_TARGET_MIPS) || defined(LLDB_TARGET_MIPS64)
   EmulateInstructionMIPS::Terminate();
 #endif
Index: lldb/tools/lldb-server/CMakeLists.txt
===
--- lldb/tools/lldb-server/CMakeLists.txt
+++ lldb/tools/lldb-server/CMakeLists.txt
@@ -51,6 +51,7 @@
   lldbVersion
   ${LLDB_PLUGINS}
   lldbPluginInstructionARM
+  lldbPluginInstructionLoongArch
   lldbPluginInstructionMIPS
   lldbPluginInstructionMIPS64
   lldbPluginInstructionRISCV
Index: lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
===
--- lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
+++ lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
@@ -168,7 +168,7 @@
   size_hint = 4;
 }
   } else if (arch.IsMIPS() || arch.GetTriple().isPPC64() ||
- arch.GetTriple().isRISCV())
+ arch.GetTriple().isRISCV() || arch.GetTriple().isLoongArch())
 size_hint = 4;
   error = process.SetBreakpoint(next_pc, size_hint, /*hardware=*/false);
 
Index: lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
===
--- lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
+++ lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
@@ -883,7 +883,7 @@
 
 bool NativeProcessLinux::SupportHardwareSingleStepping() const {
   if (m_arch.IsMIPS() || m_arch.GetMachine() == llvm::Triple::arm ||
-  m_arch.GetTriple().isRISCV())
+  m_arch.GetTriple().isRISCV() || m_arch.GetTriple().isLoongArch())
 return false;
   return true;
 }
Index: lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
===
--- /dev/null
+++ lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h
@@ -0,0 +1,76 @@
+//===---EmulateInstructionLoongArch.h--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_LOONGARCH_EMULATEINSTRUCTIONLOONGARCH_H
+#define LLDB_SOURCE_PLUGINS_INSTRUCTION_LOONGARCH_EMULATEINSTRUCTIONLOONGARCH_H
+
+#include "lldb/Core/EmulateInstruction.h"
+#include "lldb/Interpreter/OptionValue.h"
+#include "lldb/Utility/Log.h"
+#include "lldb/Utility/Status.h"
+
+namespace lldb_private {
+
+class EmulateInstructionLoongArch : public EmulateInstruction {
+public:
+  static llvm::StringRef GetPluginNameStatic() { return "LoongArch"; }
+
+  static llvm::StringRef GetPluginDescriptionStatic() {
+return "Emulate instructions for the LoongArch architecture.";
+  }
+
+  static bool

[Lldb-commits] [PATCH] D139158: [LLDB][LoongArch] Make software single stepping work

2022-12-06 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining accepted this revision.
SixWeining added a comment.
This revision is now accepted and ready to land.

In D139158#3974801 , @DavidSpickett 
wrote:

> Looks mechanically fine. These classes are all a bit of a copy paste job 
> right now, so if you were going to take inspiration riscv is your best bet.
>
> On the subject of coding style, 
> https://lldb.llvm.org/resources/contributing.html.
>
>   Coding Style: LLDB’s code style differs from LLVM’s coding style. 
> Unfortunately there is no document describing the differences. Please be 
> consistent with the existing code.
>
> Which isn't super helpful but in general look at something central like 
> `lldb/source/Target/Process.cpp` and see what it does. The main difference 
> you'll see is `variable_names_with_underscores_like_this` and `m_` prefix for 
> class members.
>
> For me, the style here looks fine.

Thanks for the clarification. Then LGTM for LoongArch related change.


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[Lldb-commits] [PATCH] D139158: [LLDB][LoongArch] Make software single stepping work

2022-12-03 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added a comment.

I'm not sure whether lldb should follow llvm coding standard.




Comment at: lldb/source/Plugins/Instruction/LoongArch/CMakeLists.txt:7-8
+lldbInterpreter
+lldbSymbol
+lldbPluginProcessUtility
+  LINK_COMPONENTS

It's better to sort alphabetically.



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:37
+  static EmulateInstructionLoongArch::Opcode g_opcodes[] = {
+  {0x, 0x, ::EmulateNonJMP,
+   "NonJMP"}};

Will the mask be changed in future? If so, better to leave a `FIXME` or `TODO`. 
If not, the following `for` loop always return the `NonJMP` opcode?



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:39
+   "NonJMP"}};
+  static const size_t num_ppc_opcodes = std::size(g_opcodes);
+

loongarch?



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:41
+
+  for (size_t i = 0; i < num_ppc_opcodes; ++i) {
+if ((g_opcodes[i].mask & inst) == g_opcodes[i].value)

useless `{`



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:44
+  return _opcodes[i];
+  }
+  return nullptr;

Ditto.



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:49
+bool EmulateInstructionLoongArch::EvaluateInstruction(uint32_t options) {
+  uint32_t inst_size = m_opcode.GetByteSize();
+  uint32_t inst = m_opcode.GetOpcode32();

Could it be `InstSize`? 
https://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:66-68
+  success = (this->*opcode_data->callback)(inst);
+  if (!success)
+return false;

  if (!(this->*opcode_data->callback)(inst))
return false;



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:75-78
+if (new_pc == old_pc) {
+  if (!WritePC(old_pc + inst_size))
+return false;
+}

```
if (new_pc == old_pc && !WritePC(old_pc + inst_size)
return false;
```



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:84
+bool EmulateInstructionLoongArch::ReadInstruction() {
+
+  bool success = false;

Remove useless blank line.



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:174
+  if (EmulateInstructionLoongArch::SupportsThisInstructionType(inst_type) &&
+  SupportsThisArch(arch)) {
+return new EmulateInstructionLoongArch(arch);

useless `{`



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp:176
+return new EmulateInstructionLoongArch(arch);
+  }
+

Ditto



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h:28-36
+switch (inst_type) {
+case eInstructionTypePCModifying:
+  return true;
+case eInstructionTypeAny:
+case eInstructionTypePrologueEpilogue:
+case eInstructionTypeAll:
+  return false;

Do you plan to support `eInstructionTypeAny` `eInstructionTypePrologueEpilogue` 
`eInstructionTypeAll` in future? If so, had better leave a `TODO` here. 
Otherwise this function can be simplied to:
```
  return inst_type == eInstructionTypePCModifying;
```



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h:66
+   uint32_t reg_num) override;
+  lldb::addr_t ReadPC(bool *success);
+  bool WritePC(lldb::addr_t pc);

Could it be a private function?



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h:79
+
+  bool EmulateNonJMP(uint32_t inst);
+};

Is it a override function?



Comment at: lldb/tools/lldb-server/SystemInitializerLLGS.cpp:51
+#define LLDB_TARGET_LoongArch
+#include "Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h"
+#endif

Sort alphabetically?


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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations

2022-11-25 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGed34590c1acb: [LLDB] Add LoongArch register definitions and 
operations (authored by seehearfeel, committed by SixWeining).

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Files:
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
  lldb/source/Plugins/Process/Utility/CMakeLists.txt
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
  lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
  lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
  lldb/source/Utility/LoongArch_DWARF_Registers.h

Index: lldb/source/Utility/LoongArch_DWARF_Registers.h
===
--- /dev/null
+++ lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -0,0 +1,178 @@
+//===-- LoongArch_DWARF_Registers.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+#define LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+
+#include "lldb/lldb-private.h"
+
+namespace loongarch_dwarf {
+
+enum {
+  dwarf_gpr_r0 = 0,
+  dwarf_gpr_r1,
+  dwarf_gpr_r2,
+  dwarf_gpr_r3,
+  dwarf_gpr_r4,
+  dwarf_gpr_r5,
+  dwarf_gpr_r6,
+  dwarf_gpr_r7,
+  dwarf_gpr_r8,
+  dwarf_gpr_r9,
+  dwarf_gpr_r10,
+  dwarf_gpr_r11,
+  dwarf_gpr_r12,
+  dwarf_gpr_r13,
+  dwarf_gpr_r14,
+  dwarf_gpr_r15,
+  dwarf_gpr_r16,
+  dwarf_gpr_r17,
+  dwarf_gpr_r18,
+  dwarf_gpr_r19,
+  dwarf_gpr_r20,
+  dwarf_gpr_r21,
+  dwarf_gpr_r22,
+  dwarf_gpr_r23,
+  dwarf_gpr_r24,
+  dwarf_gpr_r25,
+  dwarf_gpr_r26,
+  dwarf_gpr_r27,
+  dwarf_gpr_r28,
+  dwarf_gpr_r29,
+  dwarf_gpr_r30,
+  dwarf_gpr_r31 = 31,
+
+  dwarf_gpr_orig_a0,
+  dwarf_gpr_pc,
+  dwarf_gpr_badv,
+
+  dwarf_gpr_reserved0 = 35,
+  dwarf_gpr_reserved1,
+  dwarf_gpr_reserved2,
+  dwarf_gpr_reserved3,
+  dwarf_gpr_reserved4,
+  dwarf_gpr_reserved5,
+  dwarf_gpr_reserved6,
+  dwarf_gpr_reserved7,
+  dwarf_gpr_reserved8,
+  dwarf_gpr_reserved9,
+
+  dwarf_fpr_f0 = 45,
+  dwarf_fpr_f1,
+  dwarf_fpr_f2,
+  dwarf_fpr_f3,
+  dwarf_fpr_f4,
+  dwarf_fpr_f5,
+  dwarf_fpr_f6,
+  dwarf_fpr_f7,
+  dwarf_fpr_f8,
+  dwarf_fpr_f9,
+  dwarf_fpr_f10,
+  dwarf_fpr_f11,
+  dwarf_fpr_f12,
+  dwarf_fpr_f13,
+  dwarf_fpr_f14,
+  dwarf_fpr_f15,
+  dwarf_fpr_f16,
+  dwarf_fpr_f17,
+  dwarf_fpr_f18,
+  dwarf_fpr_f19,
+  dwarf_fpr_f20,
+  dwarf_fpr_f21,
+  dwarf_fpr_f22,
+  dwarf_fpr_f23,
+  dwarf_fpr_f24,
+  dwarf_fpr_f25,
+  dwarf_fpr_f26,
+  dwarf_fpr_f27,
+  dwarf_fpr_f28,
+  dwarf_fpr_f29,
+  dwarf_fpr_f30,
+  dwarf_fpr_f31 = 76,
+
+  dwarf_fpr_fcc0,
+  dwarf_fpr_fcc1,
+  dwarf_fpr_fcc2,
+  dwarf_fpr_fcc3,
+  dwarf_fpr_fcc4,
+  dwarf_fpr_fcc5,
+  dwarf_fpr_fcc6,
+  dwarf_fpr_fcc7,
+  dwarf_fpr_fcsr,
+
+  // register name alias
+  dwarf_gpr_zero = dwarf_gpr_r0,
+  dwarf_gpr_ra = dwarf_gpr_r1,
+  dwarf_gpr_tp = dwarf_gpr_r2,
+  dwarf_gpr_sp = dwarf_gpr_r3,
+  dwarf_gpr_a0 = dwarf_gpr_r4,
+  dwarf_gpr_a1 = dwarf_gpr_r5,
+  dwarf_gpr_a2 = dwarf_gpr_r6,
+  dwarf_gpr_a3 = dwarf_gpr_r7,
+  dwarf_gpr_a4 = dwarf_gpr_r8,
+  dwarf_gpr_a5 = dwarf_gpr_r9,
+  dwarf_gpr_a6 = dwarf_gpr_r10,
+  dwarf_gpr_a7 = dwarf_gpr_r11,
+  dwarf_gpr_t0 = dwarf_gpr_r12,
+  dwarf_gpr_t1 = dwarf_gpr_r13,
+  dwarf_gpr_t2 = dwarf_gpr_r14,
+  dwarf_gpr_t3 = dwarf_gpr_r15,
+  dwarf_gpr_t4 = dwarf_gpr_r16,
+  dwarf_gpr_t5 = dwarf_gpr_r17,
+  dwarf_gpr_t6 = dwarf_gpr_r18,
+  dwarf_gpr_t7 = dwarf_gpr_r19,
+  dwarf_gpr_t8 = dwarf_gpr_r20,
+  dwarf_gpr_fp = dwarf_gpr_r22,
+  dwarf_gpr_s9 = dwarf_gpr_r22,
+  dwarf_gpr_s0 = dwarf_gpr_r23,
+  dwarf_gpr_s1 = dwarf_gpr_r24,
+  dwarf_gpr_s2 = dwarf_gpr_r25,
+  dwarf_gpr_s3 = dwarf_gpr_r26,
+  dwarf_gpr_s4 = dwarf_gpr_r27,
+  dwarf_gpr_s5 = dwarf_gpr_r28,
+  dwarf_gpr_s6 = dwarf_gpr_r29,
+  dwarf_gpr_s7 = dwarf_gpr_r30,
+  dwarf_gpr_s8 = dwarf_gpr_r31,
+
+  dwarf_fpr_fa0 = dwarf_fpr_f0,
+  dwarf_fpr_fa1 = dwarf_fpr_f1,
+  dwarf_fpr_fa2 = dwarf_fpr_f2,
+  dwarf_fpr_fa3 = dwarf_fpr_f3,
+  dwarf_fpr_fa4 = dwarf_fpr_f4,
+  dwarf_fpr_fa5 = dwarf_fpr_f5,
+  dwarf_fpr_fa6 = dwarf_fpr_f6,
+  dwarf_fpr_fa7 = dwarf_fpr_f7,
+  dwarf_fpr_ft0 = dwarf_fpr_f8,
+  dwarf_fpr_ft1 = dwarf_fpr_f9,
+  dwarf_fpr_ft2 = dwarf_fpr_f10,
+  dwarf_fpr_ft3 = dwarf_fpr_f11,
+  dwarf_fpr_ft4 = dwarf_fpr_f12,
+  dwarf_fpr_ft5 =

[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Add minimal LoongArch support

2022-11-24 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added a comment.

> Regarding the public buildbot, I'm trying to set it up and maybe we can see 
> it in one or two weeks.

FYI. D138672  is the review for adding 
LoongArch buildbot.


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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations

2022-11-24 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining accepted this revision.
SixWeining added a comment.

My comments are all addressed. LGTM from the LoongArch side.


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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations

2022-11-23 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added inline comments.



Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:21
+#define GPR_OFFSET(idx) ((idx)*8 + 0)
+#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
+#define FCC_OFFSET(idx) ((idx)*1 + 32 * 8 + 
sizeof(RegisterInfoPOSIX_loongarch64::GPR))

I'm not sure whether you could use `RegisterInfoPOSIX_loongarch64` in this file 
directly because I think this file is a `common` file. What do you think? 
@DavidSpickett



Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:98
+DEFINE_GPR64_ALT(r20, t8, LLDB_INVALID_REGNUM),
+DEFINE_GPR64_ALT(r21, u0, LLDB_INVALID_REGNUM),
+DEFINE_GPR64_ALT(r22, fp, LLDB_REGNUM_GENERIC_FP),

`u0` is a unknown alias. Could we just use `DEFINE_GPR64`?


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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations

2022-11-22 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added inline comments.



Comment at: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:27
+// NT_PRSTATUS and NT_FPREGSET definition
+#include 
+

[[ https://llvm.org/docs/CodingStandards.html#include-style | Should be sorted 
lexicographically by the full path ]]. So put it before `sys/uio.h`. 



Comment at: 
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp:138
+size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetCount() const {
+  return k_num_register_sets - 1;
+}

Why `-  1`?



Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:35
+  {
\
+loongarch_dwarf::dwarf_##reg, loongarch_dwarf::dwarf_##reg, generic_kind,  
\
+LLDB_INVALID_REGNUM, reg##_loongarch   
\

unnecessary indent?



Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:56
+
+#define DEFINE_FPR64(reg, generic_kind)
\
+  {
\

Not allow accessing FPR registers through ABI names?


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[Lldb-commits] [PATCH] D137519: [LLDB] Add LoongArch software breakpoint trap opcode

2022-11-09 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG97842fcba9e3: [LLDB] Add LoongArch software breakpoint trap 
opcode (authored by seehearfeel, committed by SixWeining).

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Files:
  lldb/source/Host/common/NativeProcessProtocol.cpp
  lldb/source/Target/Platform.cpp


Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1939,6 +1939,14 @@
 }
   } break;
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64: {
+static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+ 0x00}; // break 0x5
+trap_opcode = g_loongarch_opcode;
+trap_opcode_size = sizeof(g_loongarch_opcode);
+  } break;
+
   default:
 return 0;
   }
Index: lldb/source/Host/common/NativeProcessProtocol.cpp
===
--- lldb/source/Host/common/NativeProcessProtocol.cpp
+++ lldb/source/Host/common/NativeProcessProtocol.cpp
@@ -507,6 +507,8 @@
   static const uint8_t g_ppcle_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
   static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
   static const uint8_t g_riscv_opcode_c[] = {0x02, 0x90};   // c.ebreak
+  static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+   0x00}; // break 0x5
 
   switch (GetArchitecture().GetMachine()) {
   case llvm::Triple::aarch64:
@@ -541,6 +543,10 @@
   : llvm::makeArrayRef(g_riscv_opcode);
   }
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
+return llvm::makeArrayRef(g_loongarch_opcode);
+
   default:
 return llvm::createStringError(llvm::inconvertibleErrorCode(),
"CPU type not supported!");
@@ -567,6 +573,8 @@
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
 // On these architectures the PC doesn't get updated for breakpoint hits.
 return 0;
 


Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1939,6 +1939,14 @@
 }
   } break;
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64: {
+static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+ 0x00}; // break 0x5
+trap_opcode = g_loongarch_opcode;
+trap_opcode_size = sizeof(g_loongarch_opcode);
+  } break;
+
   default:
 return 0;
   }
Index: lldb/source/Host/common/NativeProcessProtocol.cpp
===
--- lldb/source/Host/common/NativeProcessProtocol.cpp
+++ lldb/source/Host/common/NativeProcessProtocol.cpp
@@ -507,6 +507,8 @@
   static const uint8_t g_ppcle_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
   static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
   static const uint8_t g_riscv_opcode_c[] = {0x02, 0x90};   // c.ebreak
+  static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+   0x00}; // break 0x5
 
   switch (GetArchitecture().GetMachine()) {
   case llvm::Triple::aarch64:
@@ -541,6 +543,10 @@
   : llvm::makeArrayRef(g_riscv_opcode);
   }
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
+return llvm::makeArrayRef(g_loongarch_opcode);
+
   default:
 return llvm::createStringError(llvm::inconvertibleErrorCode(),
"CPU type not supported!");
@@ -567,6 +573,8 @@
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
 // On these architectures the PC doesn't get updated for breakpoint hits.
 return 0;
 
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[Lldb-commits] [PATCH] D137519: [LLDB] Add LoongArch software breakpoint trap opcode

2022-11-06 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining accepted this revision.
SixWeining added a comment.

LGTM.


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[Lldb-commits] [PATCH] D137312: [LLDB] [LoongArch] Add loongarch64 case in ComputeHostArchitectureSupport()

2022-11-03 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGde865087f8c0: [LLDB] [LoongArch] Add loongarch64 case in 
ComputeHostArchitectureSupport() (authored by SixWeining).

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Index: lldb/source/Host/common/HostInfoBase.cpp
===
--- lldb/source/Host/common/HostInfoBase.cpp
+++ lldb/source/Host/common/HostInfoBase.cpp
@@ -340,6 +340,7 @@
   case llvm::Triple::ppc64le:
   case llvm::Triple::x86_64:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch64:
 arch_64.SetTriple(triple);
 arch_32.SetTriple(triple.get32BitArchVariant());
 break;


Index: lldb/source/Host/common/HostInfoBase.cpp
===
--- lldb/source/Host/common/HostInfoBase.cpp
+++ lldb/source/Host/common/HostInfoBase.cpp
@@ -340,6 +340,7 @@
   case llvm::Triple::ppc64le:
   case llvm::Triple::x86_64:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch64:
 arch_64.SetTriple(triple);
 arch_32.SetTriple(triple.get32BitArchVariant());
 break;
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[Lldb-commits] [PATCH] D137057: [LLDB][LoongArch] Add LoongArch ArchSpec and subtype detection

2022-11-01 Thread Lu Weining via Phabricator via lldb-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe9c34618c904: [LLDB][LoongArch] Add LoongArch ArchSpec and 
subtype detection (authored by seehearfeel, committed by SixWeining).

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  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
  lldb/source/Utility/ArchSpec.cpp
  lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml

Index: lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml
===
--- /dev/null
+++ lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml
@@ -0,0 +1,24 @@
+# RUN: yaml2obj --docnum=1 %s > %t32
+# RUN: yaml2obj --docnum=2 %s > %t64
+# RUN: lldb-test object-file %t32 | FileCheck --check-prefix=CHECK-LA32 %s
+# RUN: lldb-test object-file %t64 | FileCheck --check-prefix=CHECK-LA64 %s
+
+# CHECK-LA32: Architecture: loongarch32--
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS32
+  Data:ELFDATA2LSB
+  Type:ET_EXEC
+  Machine: EM_LOONGARCH
+...
+
+# CHECK-LA64: Architecture: loongarch64--
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS64
+  Data:ELFDATA2LSB
+  Type:ET_EXEC
+  Machine: EM_LOONGARCH
+...
Index: lldb/source/Utility/ArchSpec.cpp
===
--- lldb/source/Utility/ArchSpec.cpp
+++ lldb/source/Utility/ArchSpec.cpp
@@ -220,6 +220,11 @@
 {eByteOrderLittle, 8, 2, 4, llvm::Triple::riscv64, ArchSpec::eCore_riscv64,
  "riscv64"},
 
+{eByteOrderLittle, 4, 4, 4, llvm::Triple::loongarch32,
+ ArchSpec::eCore_loongarch32, "loongarch32"},
+{eByteOrderLittle, 8, 4, 4, llvm::Triple::loongarch64,
+ ArchSpec::eCore_loongarch64, "loongarch64"},
+
 {eByteOrderLittle, 4, 4, 4, llvm::Triple::UnknownArch,
  ArchSpec::eCore_uknownMach32, "unknown-mach-32"},
 {eByteOrderLittle, 8, 4, 4, llvm::Triple::UnknownArch,
@@ -406,6 +411,12 @@
  ArchSpec::eRISCVSubType_riscv32, 0xu, 0xu}, // riscv32
 {ArchSpec::eCore_riscv64, llvm::ELF::EM_RISCV,
  ArchSpec::eRISCVSubType_riscv64, 0xu, 0xu}, // riscv64
+{ArchSpec::eCore_loongarch32, llvm::ELF::EM_LOONGARCH,
+ ArchSpec::eLoongArchSubType_loongarch32, 0xu,
+ 0xu}, // loongarch32
+{ArchSpec::eCore_loongarch64, llvm::ELF::EM_LOONGARCH,
+ ArchSpec::eLoongArchSubType_loongarch64, 0xu,
+ 0xu}, // loongarch64
 };
 
 static const ArchDefinition g_elf_arch_def = {
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -320,6 +320,18 @@
 return ArchSpec::eCore_ppc64_generic;
 }
 
+static uint32_t loongarchVariantFromElfFlags(const elf::ELFHeader ) {
+  uint32_t fileclass = header.e_ident[EI_CLASS];
+  switch (fileclass) {
+  case llvm::ELF::ELFCLASS32:
+return ArchSpec::eLoongArchSubType_loongarch32;
+  case llvm::ELF::ELFCLASS64:
+return ArchSpec::eLoongArchSubType_loongarch64;
+  default:
+return ArchSpec::eLoongArchSubType_unknown;
+  }
+}
+
 static uint32_t subTypeFromElfHeader(const elf::ELFHeader ) {
   if (header.e_machine == llvm::ELF::EM_MIPS)
 return mipsVariantFromElfFlags(header);
@@ -327,6 +339,8 @@
 return ppc64VariantFromElfFlags(header);
   else if (header.e_machine == llvm::ELF::EM_RISCV)
 return riscvVariantFromElfFlags(header);
+  else if (header.e_machine == llvm::ELF::EM_LOONGARCH)
+return loongarchVariantFromElfFlags(header);
 
   return LLDB_INVALID_CPUTYPE;
 }
Index: lldb/include/lldb/Utility/ArchSpec.h
===
--- lldb/include/lldb/Utility/ArchSpec.h
+++ lldb/include/lldb/Utility/ArchSpec.h
@@ -108,6 +108,12 @@
 eRISCVSubType_riscv64,
   };
 
+  enum LoongArchSubType {
+eLoongArchSubType_unknown,
+eLoongArchSubType_loongarch32,
+eLoongArchSubType_loongarch64,
+  };
+
   enum Core {
 eCore_arm_generic,
 eCore_arm_armv4,
@@ -204,6 +210,9 @@
 eCore_riscv32,
 eCore_riscv64,
 
+eCore_loongarch32,
+eCore_loongarch64,
+
 eCore_uknownMach32,
 eCore_uknownMach64,
 
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[Lldb-commits] [PATCH] D137057: [LLDB][LoongArch] Add LoongArch ArchSpec and subtype detection

2022-10-31 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added inline comments.



Comment at: lldb/source/Utility/ArchSpec.cpp:223
 
+{eByteOrderLittle, 4, 1, 4, llvm::Triple::loongarch32,
+ ArchSpec::eCore_loongarch32, "loongarch32"},

xen0n wrote:
> `min_opcode_byte_size` should be 4 too, all LoongArch insns are 32 bits long. 
> Same for `loongarch64`.
Right. So, the test doesn't cover this change?


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[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Add minimal LoongArch support

2022-10-25 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining accepted this revision.
SixWeining added a comment.

LGTM for LoongArch related changes.




Comment at: 
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h:26
+public:
+  struct GPR {
+uint64_t gpr[32];

xry111 wrote:
> SixWeining wrote:
> > Why is this structure and below `FPR` defined like this? Do you intent to 
> > keep the layout same as some structures of Linux? If yes, is it necessary?
> It seems necessary because lldb invokes `ptrace` system call which directly 
> stores into the pointer returned by `GetGPRBuffer`.
Make sense. Thanks.


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[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Add minimal LoongArch support

2022-10-25 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added inline comments.



Comment at: 
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h:26
+public:
+  struct GPR {
+uint64_t gpr[32];

Why is this structure and below `FPR` defined like this? Do you intent to keep 
the layout same as some structures of Linux? If yes, is it necessary?


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[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Add minimal LoongArch support

2022-10-24 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added a comment.

Build is OK on my local LoongArch machine with 229 failed tests and 2 timed out 
tests.


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[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Add minimal LoongArch support

2022-10-24 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added a comment.

In D136578#3878744 , @DavidSpickett 
wrote:

> Always good to see another architecture in lldb.
>
> A few points up front.
>
> Changes like this are fine and we can review them, but can only be landed 
> once we see that they'll be built on. So please stack changes so that we can 
> see what is upcoming. 
> https://llvm.org/docs/Phabricator.html#creating-a-patch-series
>
> Do you have a plan to test this configuration? I don't see any public 
> buildbots for Loongson (please correct me if I am wrong) but that is not a 
> requirement as long as you have some testing plan (RISCV doesn't have a 
> public bot, as one example).
>
> Do you have community members who can review these changes for architectural 
> correctness? Speaking just for myself I am happy to review bits of lldb 
> machinery but when it comes to architecture details I am not, and will not, 
> be an expert in Loongson.
>
> I'm ok accepting patches without a second reviewer, but I advise for your own 
> benefit to try to find someone who already knows the details of Loongson.

Hi @DavidSpickett, thanks for your advice. I (as the LoongArch backend code 
owner) can review these changes for architectural correctness. And I think 
other LoongArch community members (non Loongson employees) also can take it. 
Especially @xen0n and @xry111 who are quite familar with LoongArch.

What's more, AFAIK, @seehearfeel (yangtie...@loongson.cn) is the LoongArch port 
maintainer of gdb 
.

Regarding the public buildbot, I'm trying to set it up and maybe we can see it 
one or two weeks.




Comment at: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h:24
+
+class NativeRegisterContextLinux_loongarch64 : public 
NativeRegisterContextLinux {
+public:

Pls limit the columns count to 80 which can be done by `clang-format`. See: 
https://llvm.org/docs/Contributing.html#how-to-submit-a-patch



Comment at: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h:9
+
+#if defined(__loongarch__) && __loongarch_grlen == 64
+

Seems `#if __loongarch_grlen == 64` is enough? But I'm fine with both.


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[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Fix build errors

2022-10-24 Thread Lu Weining via Phabricator via lldb-commits 
SixWeining added inline comments.



Comment at: lldb/source/Plugins/Process/Linux/CMakeLists.txt:11
   NativeRegisterContextLinux_arm64.cpp
+  NativeRegisterContextLinux_loongarch64.cpp
   NativeRegisterContextLinux_ppc64le.cpp

Had better use `git diff -U99` to generate the patch so that we can get 
more context.
See: 
https://llvm.org/docs/Phabricator.html#requesting-a-review-via-the-web-interface


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