[Lldb-commits] [lldb] [lldb][AArch64][Linux] Rename IsEnabled to IsPresent (PR #70303)
https://github.com/DavidSpickett closed https://github.com/llvm/llvm-project/pull/70303 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [lldb] [lldb][AArch64][Linux] Rename IsEnabled to IsPresent (PR #70303)
DavidSpickett wrote: Unless there are objections this is going in end of today. https://github.com/llvm/llvm-project/pull/70303 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [lldb] [lldb][AArch64][Linux] Rename IsEnabled to IsPresent (PR #70303)
DavidSpickett wrote: @omjavaid Any objections? https://github.com/llvm/llvm-project/pull/70303 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [lldb] [lldb][AArch64][Linux] Rename IsEnabled to IsPresent (PR #70303)
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70303
>From bbcdfa3bb4844f609efabbb819444bbab02b02f8 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Thu, 26 Oct 2023 08:28:02 +
Subject: [PATCH] [lldb][AArch64][Linux] Reanme IsEnabled to
IsPresent
For most register sets, if it was enabled this meant you could use it,
it was present in the process. There was no present but turned off state.
So "enabled" made sense.
Then ZA came along (and soon to be ZT0) where ZA can be present in the
hardware when you have SME, but ZA itself can be made inactive.
This means that "IsZAEnabled()" doesn't mean is it active, it means
do you have SME. Which is very confusing when we actually want to know
if ZA is active.
So instead say "IsZAPresent", to make these checks more specific.
For things that can't be made inactive, present will imply "active"
as they're never inactive.
---
.../NativeRegisterContextLinux_arm64.cpp | 21 +--
.../Process/Utility/RegisterInfoPOSIX_arm64.h | 12 +--
.../RegisterContextPOSIXCore_arm64.cpp| 12 +--
3 files changed, 22 insertions(+), 23 deletions(-)
diff --git
a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
index b5210c368144206..22aa2f3a920945d 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -166,10 +166,10 @@
NativeRegisterContextLinux_arm64::NativeRegisterContextLinux_arm64(
m_tls_is_valid = false;
// SME adds the tpidr2 register
- m_tls_size = GetRegisterInfo().IsSSVEEnabled() ? sizeof(m_tls_regs)
+ m_tls_size = GetRegisterInfo().IsSSVEPresent() ? sizeof(m_tls_regs)
:
sizeof(m_tls_regs.tpidr_reg);
- if (GetRegisterInfo().IsSVEEnabled() || GetRegisterInfo().IsSSVEEnabled())
+ if (GetRegisterInfo().IsSVEPresent() || GetRegisterInfo().IsSSVEPresent())
m_sve_state = SVEState::Unknown;
else
m_sve_state = SVEState::Disabled;
@@ -609,8 +609,7 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
if (error.Fail())
return error;
- // Here this means, does the system have ZA, not whether it is active.
- if (GetRegisterInfo().IsZAEnabled()) {
+ if (GetRegisterInfo().IsZAPresent()) {
error = ReadZAHeader();
if (error.Fail())
return error;
@@ -628,7 +627,7 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
}
// If SVE is enabled we need not copy FPR separately.
- if (GetRegisterInfo().IsSVEEnabled() || GetRegisterInfo().IsSSVEEnabled()) {
+ if (GetRegisterInfo().IsSVEPresent() || GetRegisterInfo().IsSSVEPresent()) {
// Store mode and register data.
cached_size +=
sizeof(RegisterSetType) + sizeof(m_sve_state) + GetSVEBufferSize();
@@ -640,7 +639,7 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
if (error.Fail())
return error;
- if (GetRegisterInfo().IsMTEEnabled()) {
+ if (GetRegisterInfo().IsMTEPresent()) {
cached_size += sizeof(RegisterSetType) + GetMTEControlSize();
error = ReadMTEControl();
if (error.Fail())
@@ -708,7 +707,7 @@ Status
NativeRegisterContextLinux_arm64::ReadAllRegisterValues(
// constants and the functions vec_set_vector_length, sve_set_common and
// za_set in the Linux Kernel.
- if ((m_sve_state != SVEState::Streaming) && GetRegisterInfo().IsZAEnabled())
{
+ if ((m_sve_state != SVEState::Streaming) && GetRegisterInfo().IsZAPresent())
{
// Use the header size not the buffer size, as we may be using the buffer
// for fake data, which we do not want to write out.
assert(m_za_header.size <= GetZABufferSize());
@@ -716,7 +715,7 @@ Status
NativeRegisterContextLinux_arm64::ReadAllRegisterValues(
m_za_header.size);
}
- if (GetRegisterInfo().IsSVEEnabled() || GetRegisterInfo().IsSSVEEnabled()) {
+ if (GetRegisterInfo().IsSVEPresent() || GetRegisterInfo().IsSSVEPresent()) {
dst = AddRegisterSetType(dst, RegisterSetType::SVE);
*(reinterpret_cast(dst)) = m_sve_state;
dst += sizeof(m_sve_state);
@@ -726,13 +725,13 @@ Status
NativeRegisterContextLinux_arm64::ReadAllRegisterValues(
GetFPRSize());
}
- if ((m_sve_state == SVEState::Streaming) && GetRegisterInfo().IsZAEnabled())
{
+ if ((m_sve_state == SVEState::Streaming) && GetRegisterInfo().IsZAPresent())
{
assert(m_za_header.size <= GetZABufferSize());
dst = AddSavedRegisters(dst, RegisterSetType::SME, GetZABuffer(),
m_za_header.size);
}
- if (GetRegisterInfo().IsMTEEnabled()) {
+ if (GetRegisterInfo().IsMTEPresent()) {
dst = AddSavedRegisters(dst, RegisterSetType::MTE, GetMTEControl(),
GetMTEControlSize());
[Lldb-commits] [lldb] [lldb][AArch64][Linux] Rename IsEnabled to IsPresent (PR #70303)
@@ -610,7 +610,7 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
return error;
// Here this means, does the system have ZA, not whether it is active.
bulbazord wrote:
You could probably remove this comment
https://github.com/llvm/llvm-project/pull/70303
___
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[Lldb-commits] [lldb] [lldb][AArch64][Linux] Rename IsEnabled to IsPresent (PR #70303)
https://github.com/bulbazord edited https://github.com/llvm/llvm-project/pull/70303 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [lldb] [lldb][AArch64][Linux] Rename IsEnabled to IsPresent (PR #70303)
https://github.com/bulbazord approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/70303 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [lldb] [lldb][AArch64][Linux] Rename IsEnabled to IsPresent (PR #70303)
llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: David Spickett (DavidSpickett)
Changes
For most register sets, if it was enabled this meant you could use it, it was
present in the process. There was no present but turned off state. So "enabled"
made sense.
Then ZA came along (and soon to be ZT0) where ZA can be present in the hardware
when you have SME, but ZA itself can be made inactive. This means that
"IsZAEnabled()" doesn't mean is it active, it means do you have SME. Which is
very confusing when we actually want to know if ZA is active.
So instead say "IsZAPresent", to make these checks more specific. For things
that can't be made inactive, present will imply "active" as they're never
inactive.
---
Full diff: https://github.com/llvm/llvm-project/pull/70303.diff
3 Files Affected:
- (modified)
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp (+10-10)
- (modified) lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
(+6-6)
- (modified)
lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp (+6-6)
``diff
diff --git
a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
index b5210c368144206..b23b4ed2171b546 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -166,10 +166,10 @@
NativeRegisterContextLinux_arm64::NativeRegisterContextLinux_arm64(
m_tls_is_valid = false;
// SME adds the tpidr2 register
- m_tls_size = GetRegisterInfo().IsSSVEEnabled() ? sizeof(m_tls_regs)
+ m_tls_size = GetRegisterInfo().IsSSVEPresent() ? sizeof(m_tls_regs)
:
sizeof(m_tls_regs.tpidr_reg);
- if (GetRegisterInfo().IsSVEEnabled() || GetRegisterInfo().IsSSVEEnabled())
+ if (GetRegisterInfo().IsSVEPresent() || GetRegisterInfo().IsSSVEPresent())
m_sve_state = SVEState::Unknown;
else
m_sve_state = SVEState::Disabled;
@@ -610,7 +610,7 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
return error;
// Here this means, does the system have ZA, not whether it is active.
- if (GetRegisterInfo().IsZAEnabled()) {
+ if (GetRegisterInfo().IsZAPresent()) {
error = ReadZAHeader();
if (error.Fail())
return error;
@@ -628,7 +628,7 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
}
// If SVE is enabled we need not copy FPR separately.
- if (GetRegisterInfo().IsSVEEnabled() || GetRegisterInfo().IsSSVEEnabled()) {
+ if (GetRegisterInfo().IsSVEPresent() || GetRegisterInfo().IsSSVEPresent()) {
// Store mode and register data.
cached_size +=
sizeof(RegisterSetType) + sizeof(m_sve_state) + GetSVEBufferSize();
@@ -640,7 +640,7 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
if (error.Fail())
return error;
- if (GetRegisterInfo().IsMTEEnabled()) {
+ if (GetRegisterInfo().IsMTEPresent()) {
cached_size += sizeof(RegisterSetType) + GetMTEControlSize();
error = ReadMTEControl();
if (error.Fail())
@@ -708,7 +708,7 @@ Status
NativeRegisterContextLinux_arm64::ReadAllRegisterValues(
// constants and the functions vec_set_vector_length, sve_set_common and
// za_set in the Linux Kernel.
- if ((m_sve_state != SVEState::Streaming) && GetRegisterInfo().IsZAEnabled())
{
+ if ((m_sve_state != SVEState::Streaming) && GetRegisterInfo().IsZAPresent())
{
// Use the header size not the buffer size, as we may be using the buffer
// for fake data, which we do not want to write out.
assert(m_za_header.size <= GetZABufferSize());
@@ -716,7 +716,7 @@ Status
NativeRegisterContextLinux_arm64::ReadAllRegisterValues(
m_za_header.size);
}
- if (GetRegisterInfo().IsSVEEnabled() || GetRegisterInfo().IsSSVEEnabled()) {
+ if (GetRegisterInfo().IsSVEPresent() || GetRegisterInfo().IsSSVEPresent()) {
dst = AddRegisterSetType(dst, RegisterSetType::SVE);
*(reinterpret_cast(dst)) = m_sve_state;
dst += sizeof(m_sve_state);
@@ -726,13 +726,13 @@ Status
NativeRegisterContextLinux_arm64::ReadAllRegisterValues(
GetFPRSize());
}
- if ((m_sve_state == SVEState::Streaming) && GetRegisterInfo().IsZAEnabled())
{
+ if ((m_sve_state == SVEState::Streaming) && GetRegisterInfo().IsZAPresent())
{
assert(m_za_header.size <= GetZABufferSize());
dst = AddSavedRegisters(dst, RegisterSetType::SME, GetZABuffer(),
m_za_header.size);
}
- if (GetRegisterInfo().IsMTEEnabled()) {
+ if (GetRegisterInfo().IsMTEPresent()) {
dst = AddSavedRegisters(dst, RegisterSetType::MTE, GetMTEControl(),
GetMTEControlSize());
}
@@ -1411,7 +1411,7 @@ std::vector
[Lldb-commits] [lldb] [lldb][AArch64][Linux] Rename IsEnabled to IsPresent (PR #70303)
https://github.com/DavidSpickett created
https://github.com/llvm/llvm-project/pull/70303
For most register sets, if it was enabled this meant you could use it, it was
present in the process. There was no present but turned off state. So "enabled"
made sense.
Then ZA came along (and soon to be ZT0) where ZA can be present in the hardware
when you have SME, but ZA itself can be made inactive. This means that
"IsZAEnabled()" doesn't mean is it active, it means do you have SME. Which is
very confusing when we actually want to know if ZA is active.
So instead say "IsZAPresent", to make these checks more specific. For things
that can't be made inactive, present will imply "active" as they're never
inactive.
>From c513a486814ac03d3150f59c1b2c835e379ebdb6 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Thu, 26 Oct 2023 08:28:02 +
Subject: [PATCH] [lldb][AArch64][Linux] Reanme IsEnabled to
IsPresent
For most register sets, if it was enabled this meant you could use it,
it was present in the process. There was no present but turned off state.
So "enabled" made sense.
Then ZA came along (and soon to be ZT0) where ZA can be present in the
hardware when you have SME, but ZA itself can be made inactive.
This means that "IsZAEnabled()" doesn't mean is it active, it means
do you have SME. Which is very confusing when we actually want to know
if ZA is active.
So instead say "IsZAPresent", to make these checks more specific.
For things that can't be made inactive, present will imply "active"
as they're never inactive.
---
.../NativeRegisterContextLinux_arm64.cpp | 20 +--
.../Process/Utility/RegisterInfoPOSIX_arm64.h | 12 +--
.../RegisterContextPOSIXCore_arm64.cpp| 12 +--
3 files changed, 22 insertions(+), 22 deletions(-)
diff --git
a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
index b5210c368144206..b23b4ed2171b546 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
@@ -166,10 +166,10 @@
NativeRegisterContextLinux_arm64::NativeRegisterContextLinux_arm64(
m_tls_is_valid = false;
// SME adds the tpidr2 register
- m_tls_size = GetRegisterInfo().IsSSVEEnabled() ? sizeof(m_tls_regs)
+ m_tls_size = GetRegisterInfo().IsSSVEPresent() ? sizeof(m_tls_regs)
:
sizeof(m_tls_regs.tpidr_reg);
- if (GetRegisterInfo().IsSVEEnabled() || GetRegisterInfo().IsSSVEEnabled())
+ if (GetRegisterInfo().IsSVEPresent() || GetRegisterInfo().IsSSVEPresent())
m_sve_state = SVEState::Unknown;
else
m_sve_state = SVEState::Disabled;
@@ -610,7 +610,7 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
return error;
// Here this means, does the system have ZA, not whether it is active.
- if (GetRegisterInfo().IsZAEnabled()) {
+ if (GetRegisterInfo().IsZAPresent()) {
error = ReadZAHeader();
if (error.Fail())
return error;
@@ -628,7 +628,7 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
}
// If SVE is enabled we need not copy FPR separately.
- if (GetRegisterInfo().IsSVEEnabled() || GetRegisterInfo().IsSSVEEnabled()) {
+ if (GetRegisterInfo().IsSVEPresent() || GetRegisterInfo().IsSSVEPresent()) {
// Store mode and register data.
cached_size +=
sizeof(RegisterSetType) + sizeof(m_sve_state) + GetSVEBufferSize();
@@ -640,7 +640,7 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
if (error.Fail())
return error;
- if (GetRegisterInfo().IsMTEEnabled()) {
+ if (GetRegisterInfo().IsMTEPresent()) {
cached_size += sizeof(RegisterSetType) + GetMTEControlSize();
error = ReadMTEControl();
if (error.Fail())
@@ -708,7 +708,7 @@ Status
NativeRegisterContextLinux_arm64::ReadAllRegisterValues(
// constants and the functions vec_set_vector_length, sve_set_common and
// za_set in the Linux Kernel.
- if ((m_sve_state != SVEState::Streaming) && GetRegisterInfo().IsZAEnabled())
{
+ if ((m_sve_state != SVEState::Streaming) && GetRegisterInfo().IsZAPresent())
{
// Use the header size not the buffer size, as we may be using the buffer
// for fake data, which we do not want to write out.
assert(m_za_header.size <= GetZABufferSize());
@@ -716,7 +716,7 @@ Status
NativeRegisterContextLinux_arm64::ReadAllRegisterValues(
m_za_header.size);
}
- if (GetRegisterInfo().IsSVEEnabled() || GetRegisterInfo().IsSSVEEnabled()) {
+ if (GetRegisterInfo().IsSVEPresent() || GetRegisterInfo().IsSSVEPresent()) {
dst = AddRegisterSetType(dst, RegisterSetType::SVE);
*(reinterpret_cast(dst)) = m_sve_state;
dst += sizeof(m_sve_state);
@@ -726,13 +726,13 @@ Status
