Author: Fred Riss
Date: 2020-01-17T20:34:16-08:00
New Revision: 509b78883d4f8fdb13ccc754bba9782d51b477d8

URL: 
https://github.com/llvm/llvm-project/commit/509b78883d4f8fdb13ccc754bba9782d51b477d8
DIFF: 
https://github.com/llvm/llvm-project/commit/509b78883d4f8fdb13ccc754bba9782d51b477d8.diff

LOG: [lldb/Makefile.rules] Force the default target to be 'all'

The test harness invokes the test Makefiles with an explicit 'all'
target, but it's handy to be able to recursively call Makefile.rules
without speficying a goal.

Some time ago, we rewrote some tests in terms of recursive invocations
of Makefile.rules. It turns out this had an unintended side
effect. While using $(MAKE) for a recursive invocation passes all the
variables set on the command line down, it doesn't pass the make
goals. This means that those recursive invocations would invoke the
default rule. It turns out the default rule of Makefile.rules is not
'all', but $(EXE). This means that ti would work becuase the
executable is always needed, but it also means that the created
binaries would not follow some of the other top-level build
directives, like MAKE_DSYM.

Forcing 'all' to be the default target seems easier than making sure
all the invocations are correct going forward. This patch does this
using the .DEFAULT_GOAL directive rather than hoisting the 'all' rule
to be the first one of the file. It seems like this explicit approach
will be less prone to be broken in the future. Hopefully all the make
implementations we use support it.

Added: 
    

Modified: 
    lldb/packages/Python/lldbsuite/test/make/Makefile.rules

Removed: 
    


################################################################################
diff  --git a/lldb/packages/Python/lldbsuite/test/make/Makefile.rules 
b/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
index f25d062ca43f..ecb75413a0c0 100644
--- a/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
+++ b/lldb/packages/Python/lldbsuite/test/make/Makefile.rules
@@ -41,6 +41,13 @@ MAKEFILE_RULES := $(lastword $(MAKEFILE_LIST))
 THIS_FILE_DIR := $(shell dirname $(MAKEFILE_RULES))
 LLDB_BASE_DIR := $(THIS_FILE_DIR)/../../../../../
 
+# The test harness invokes the test Makefiles with an explicit 'all'
+# target, but its handy to be able to recursively call this Makefile
+# without speficying a goal. You almost certainly want to build 'all',
+# and not only the first target defined in this file (which might vary
+# according to varaible values).
+.DEFAULT_GOAL := all
+
 #----------------------------------------------------------------------
 # If OS is not defined, use 'uname -s' to determine the OS name.
 #


        
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