[llvm-branch-commits] [lldb] b6e04ac - [lldb/test] Avoid the socket "pump" thread
Author: Pavel Labath Date: 2020-11-30T09:07:45+01:00 New Revision: b6e04ac5aa881c1fbb66da884b04e48dfb102474 URL: https://github.com/llvm/llvm-project/commit/b6e04ac5aa881c1fbb66da884b04e48dfb102474 DIFF: https://github.com/llvm/llvm-project/commit/b6e04ac5aa881c1fbb66da884b04e48dfb102474.diff LOG: [lldb/test] Avoid the socket "pump" thread A separate thread is not necessary, as we can do its work on the main thread, while waiting for the packet to arrive. This makes the code easier to understand and debug (other simplifications are possible too, but I'll leave that for separate patches). The new implementation also avoids busy waiting. Added: Modified: lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py lldb/packages/Python/lldbsuite/test/tools/lldb-server/socket_packet_pump.py Removed: diff --git a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py index 0c01bdfb1c69..b5c635a77b5c 100644 --- a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py +++ b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py @@ -236,7 +236,7 @@ def expect_lldb_gdbserver_replay( if sequence_entry.is_output_matcher(): try: # Grab next entry from the output queue. -content = pump_queues.output_queue().get(True, timeout_seconds) +content = pump.get_output(timeout_seconds) except queue.Empty: if logger: logger.warning( @@ -247,7 +247,7 @@ def expect_lldb_gdbserver_replay( pump.get_accumulated_output())) else: try: -content = pump_queues.packet_queue().get(True, timeout_seconds) +content = pump.get_packet(timeout_seconds) except queue.Empty: if logger: logger.warning( diff --git a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/socket_packet_pump.py b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/socket_packet_pump.py index 3de76345896d..6c41ed473b45 100644 --- a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/socket_packet_pump.py +++ b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/socket_packet_pump.py @@ -5,6 +5,7 @@ import re import select import threading +import time import traceback from six.moves import queue @@ -74,8 +75,6 @@ def __init__(self, pump_socket, pump_queues, logger=None): if not pump_socket: raise Exception("pump_socket cannot be None") -self._thread = None -self._stop_thread = False self._socket = pump_socket self._logger = logger self._receive_buffer = "" @@ -83,29 +82,42 @@ def __init__(self, pump_socket, pump_queues, logger=None): self._pump_queues = pump_queues def __enter__(self): -"""Support the python 'with' statement. - -Start the pump thread.""" -self.start_pump_thread() +self._receive_buffer = "" +self._accumulated_output = "" return self def __exit__(self, exit_type, value, the_traceback): -"""Support the python 'with' statement. - -Shut down the pump thread.""" -self.stop_pump_thread() +pass + +def _read(self, timeout_seconds, q): +now = time.monotonic() +deadline = now + timeout_seconds +while q.empty() and now <= deadline: +can_read, _, _ = select.select([self._socket], [], [], deadline-now) +now = time.monotonic() +if can_read and self._socket in can_read: +try: +new_bytes = seven.bitcast_to_string(self._socket.recv(4096)) +if self._logger and new_bytes and len(new_bytes) > 0: +self._logger.debug( +"pump received bytes: {}".format(new_bytes)) +except: +# Likely a closed socket. Done with the pump thread. +if self._logger: +self._logger.debug( +"socket read failed, stopping pump read thread\n" + +traceback.format_exc(3)) +break +self._process_new_bytes(new_bytes) +if q.empty(): +raise queue.Empty() +return q.get(True) -def start_pump_thread(self): -if self._thread: -raise Exception("pump thread is already running") -self._stop_thread = False -self._thread = threading.Thread(target=self._run_method) -self._thr
[llvm-branch-commits] [clang] ec6c5e9 - [clang] Improve diagnostics for auto-return-type function if the return expr had an error.
Author: Haojian Wu Date: 2020-11-30T09:19:15+01:00 New Revision: ec6c5e920a89db0e1c5f73b8349ee0b84192072d URL: https://github.com/llvm/llvm-project/commit/ec6c5e920a89db0e1c5f73b8349ee0b84192072d DIFF: https://github.com/llvm/llvm-project/commit/ec6c5e920a89db0e1c5f73b8349ee0b84192072d.diff LOG: [clang] Improve diagnostics for auto-return-type function if the return expr had an error. Given the following case: ``` auto k() { return undef(); return 1; } ``` Prior to the patch, clang emits an `cannot initialize return object of type 'auto' with an rvalue of type 'int'` diagnostic on the second return (because the return type of the function cannot be deduced from the first contain-errors return). This patch suppresses this error. Differential Revision: https://reviews.llvm.org/D92211 Added: Modified: clang/lib/Sema/SemaStmt.cpp clang/test/SemaCXX/attr-target-mv.cpp clang/test/SemaCXX/cxx1y-deduced-return-type.cpp clang/test/SemaCXX/lambda-expressions.cpp Removed: diff --git a/clang/lib/Sema/SemaStmt.cpp b/clang/lib/Sema/SemaStmt.cpp index 195121e1e256..f5bf889b3878 100644 --- a/clang/lib/Sema/SemaStmt.cpp +++ b/clang/lib/Sema/SemaStmt.cpp @@ -3327,9 +3327,14 @@ Sema::ActOnCapScopeReturnStmt(SourceLocation ReturnLoc, Expr *RetValExp) { } if (HasDeducedReturnType) { +FunctionDecl *FD = CurLambda->CallOperator; +// If we've already decided this lambda is invalid, e.g. because +// we saw a `return` whose expression had an error, don't keep +// trying to deduce its return type. +if (FD->isInvalidDecl()) + return StmtError(); // In C++1y, the return type may involve 'auto'. // FIXME: Blocks might have a return type of 'auto' explicitly specified. -FunctionDecl *FD = CurLambda->CallOperator; if (CurCap->ReturnType.isNull()) CurCap->ReturnType = FD->getReturnType(); @@ -3709,6 +3714,11 @@ StmtResult Sema::BuildReturnStmt(SourceLocation ReturnLoc, Expr *RetValExp) { if (getLangOpts().CPlusPlus14) { if (AutoType *AT = FnRetType->getContainedAutoType()) { FunctionDecl *FD = cast(CurContext); + // If we've already decided this function is invalid, e.g. because + // we saw a `return` whose expression had an error, don't keep + // trying to deduce its return type. + if (FD->isInvalidDecl()) +return StmtError(); if (DeduceFunctionTypeFromReturnExpr(FD, ReturnLoc, RetValExp, AT)) { FD->setInvalidDecl(); return StmtError(); diff --git a/clang/test/SemaCXX/attr-target-mv.cpp b/clang/test/SemaCXX/attr-target-mv.cpp index 11f3a276c7c7..5ef1d398d2d8 100644 --- a/clang/test/SemaCXX/attr-target-mv.cpp +++ b/clang/test/SemaCXX/attr-target-mv.cpp @@ -107,7 +107,6 @@ int __attribute__((target("arch=sandybridge"))) diff _mangle(void) { return 0; } // expected-error@+1 {{multiversioned functions do not yet support deduced return types}} auto __attribute__((target("default"))) deduced_return(void) { return 0; } -// expected-error@-1 {{cannot initialize return object of type 'auto' with an rvalue of type 'int'}} auto __attribute__((target("default"))) trailing_return(void)-> int { return 0; } diff --git a/clang/test/SemaCXX/cxx1y-deduced-return-type.cpp b/clang/test/SemaCXX/cxx1y-deduced-return-type.cpp index 958728b10487..3e544c300884 100644 --- a/clang/test/SemaCXX/cxx1y-deduced-return-type.cpp +++ b/clang/test/SemaCXX/cxx1y-deduced-return-type.cpp @@ -22,7 +22,7 @@ int conv1d = conv1.operator int(); // expected-error {{no member named 'operator struct Conv2 { operator auto() { return 0; } // expected-note {{previous}} - operator auto() { return 0.; } // expected-error {{cannot be redeclared}} expected-error {{cannot initialize return object of type 'auto' with an rvalue of type 'double'}} + operator auto() { return 0.; } // expected-error {{cannot be redeclared}} }; struct Conv3 { @@ -100,7 +100,7 @@ auto fac(int n) { auto fac_2(int n) { // expected-note {{declared here}} if (n > 2) return n * fac_2(n-1); // expected-error {{cannot be used before it is defined}} - return n; // expected-error {{cannot initialize return object of type 'auto'}} + return n; } auto void_ret() {} @@ -617,7 +617,6 @@ namespace PR33222 { }; template<> auto *B::q() { return (int*)0; } template<> auto B::q() { return (int*)0; } // expected-error {{return type}} - // FIXME: suppress this follow-on error: expected-error@-1 {{cannot initialize}} template<> int B::q() { return 0; } // expected-error {{return type}} } diff --git a/clang/test/SemaCXX/lambda-expressions.cpp b/clang/test/SemaCXX/lambda-expressions.cpp index 7f7f9c570487..22e0939379f5 100644 --- a/clang/test/SemaCXX/lambda-expressions.cpp +++ b/clang/test/SemaCXX/lambda-expressions.cpp @@ -521,6 +521,10 @@ void foo() { return undeclared_error; // expected-error {{us
[llvm-branch-commits] [libc] 699d17d - [libc] Improve memcpy copy loop
Author: Guillaume Chatelet Date: 2020-11-30T08:24:10Z New Revision: 699d17d4d64e9b1cf6db0443e87a700104e94aca URL: https://github.com/llvm/llvm-project/commit/699d17d4d64e9b1cf6db0443e87a700104e94aca DIFF: https://github.com/llvm/llvm-project/commit/699d17d4d64e9b1cf6db0443e87a700104e94aca.diff LOG: [libc] Improve memcpy copy loop Rewriting loop so the terminating condition does not depend on the loop body Differential Revision: https://reviews.llvm.org/D91976 Added: Modified: libc/src/string/memory_utils/memcpy_utils.h libc/test/src/string/memory_utils/memcpy_utils_test.cpp Removed: diff --git a/libc/src/string/memory_utils/memcpy_utils.h b/libc/src/string/memory_utils/memcpy_utils.h index a0e5ccc81c9e..aa27b3c38dbd 100644 --- a/libc/src/string/memory_utils/memcpy_utils.h +++ b/libc/src/string/memory_utils/memcpy_utils.h @@ -90,9 +90,10 @@ static void CopyAlignedBlocks(char *__restrict dst, const char *__restrict src, CopyBlock(dst, src); // Copy first block // Copy aligned blocks - size_t offset = kBlockSize - offset_from_last_aligned(dst); - for (; offset + kBlockSize < count; offset += kBlockSize) -CopyBlock(dst + offset, src + offset); + const size_t ofla = offset_from_last_aligned(dst); + const size_t limit = count + ofla - kBlockSize; + for (size_t offset = kBlockSize; offset < limit; offset += kBlockSize) +CopyBlock(dst - ofla + offset, src - ofla + offset); CopyLastBlock(dst, src, count); // Copy last block } diff --git a/libc/test/src/string/memory_utils/memcpy_utils_test.cpp b/libc/test/src/string/memory_utils/memcpy_utils_test.cpp index 7e32fb4f3080..93c0c48c8976 100644 --- a/libc/test/src/string/memory_utils/memcpy_utils_test.cpp +++ b/libc/test/src/string/memory_utils/memcpy_utils_test.cpp @@ -162,7 +162,23 @@ TEST(MemcpyUtilsTest, CopyBlockOverlap) { TEST(MemcpyUtilsTest, CopyAlignedBlocks) { auto &trace = GetTrace(); - // Destination is aligned already. + // Destination is aligned and multiple of alignment. + // "" + trace.Clear(); + CopyAlignedBlocks<4>(I(0), I(0), 4); + EXPECT_STREQ(trace.Write(), ""); + EXPECT_STREQ(trace.Read(), ""); + + // Destination is aligned and multiple of alignment. + // "" + // + "" + // = "" + trace.Clear(); + CopyAlignedBlocks<4>(I(0), I(0), 8); + EXPECT_STREQ(trace.Write(), ""); + EXPECT_STREQ(trace.Read(), ""); + + // Destination is aligned already overlap at end. // "0" // + "0" // + "0" @@ -173,7 +189,7 @@ TEST(MemcpyUtilsTest, CopyAlignedBlocks) { EXPECT_STREQ(trace.Write(), "12221"); EXPECT_STREQ(trace.Read(), "12221"); - // Misaligned destination + // Misaligned destination. // "00" // + "00" // + "00" @@ -183,6 +199,16 @@ TEST(MemcpyUtilsTest, CopyAlignedBlocks) { CopyAlignedBlocks<4>(I(1), I(0), 13); EXPECT_STREQ(trace.Write(), "0111212211"); EXPECT_STREQ(trace.Read(), "111212211"); + + // Misaligned destination aligned at end. + // "0000" + // + "" + // + "" + // = "01112111" + trace.Clear(); + CopyAlignedBlocks<4>(I(1), I(0), 11); + EXPECT_STREQ(trace.Write(), "01112111"); + EXPECT_STREQ(trace.Read(), "1112111"); } TEST(MemcpyUtilsTest, MaxReloads) { ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] c219282 - [AST][RecoveryAST] Preseve more invalid return stmt.
Author: Haojian Wu Date: 2020-11-30T09:26:41+01:00 New Revision: c21928285430cc25905f774a89cb948867ae55b6 URL: https://github.com/llvm/llvm-project/commit/c21928285430cc25905f774a89cb948867ae55b6 DIFF: https://github.com/llvm/llvm-project/commit/c21928285430cc25905f774a89cb948867ae55b6.diff LOG: [AST][RecoveryAST] Preseve more invalid return stmt. suppress the diagnostics for missing return stmt in constexpr func. Differential Revision: https://reviews.llvm.org/D82284 Added: Modified: clang/lib/Sema/SemaStmt.cpp clang/test/SemaCXX/constant-expression-cxx11.cpp clang/test/SemaCXX/typo-correction-crash.cpp Removed: diff --git a/clang/lib/Sema/SemaStmt.cpp b/clang/lib/Sema/SemaStmt.cpp index f5bf889b3878..d89dfaf78a9c 100644 --- a/clang/lib/Sema/SemaStmt.cpp +++ b/clang/lib/Sema/SemaStmt.cpp @@ -3629,7 +3629,8 @@ Sema::ActOnReturnStmt(SourceLocation ReturnLoc, Expr *RetValExp, Scope *CurScope) { // Correct typos, in case the containing function returns 'auto' and // RetValExp should determine the deduced type. - ExprResult RetVal = CorrectDelayedTyposInExpr(RetValExp); + ExprResult RetVal = CorrectDelayedTyposInExpr( + RetValExp, nullptr, /*RecoverUncorrectedTypos=*/true); if (RetVal.isInvalid()) return StmtError(); StmtResult R = BuildReturnStmt(ReturnLoc, RetVal.get()); diff --git a/clang/test/SemaCXX/constant-expression-cxx11.cpp b/clang/test/SemaCXX/constant-expression-cxx11.cpp index 8b80f5438d8e..67c5e78b8791 100644 --- a/clang/test/SemaCXX/constant-expression-cxx11.cpp +++ b/clang/test/SemaCXX/constant-expression-cxx11.cpp @@ -1807,11 +1807,10 @@ namespace PR15884 { } namespace AfterError { - // FIXME: Suppress the 'no return statements' diagnostic if the body is invalid. - constexpr int error() { // expected-error {{no return statement}} + constexpr int error() { return foobar; // expected-error {{undeclared identifier}} } - constexpr int k = error(); + constexpr int k = error(); // expected-error {{constexpr variable 'k' must be initialized by a constant expression}} } namespace std { diff --git a/clang/test/SemaCXX/typo-correction-crash.cpp b/clang/test/SemaCXX/typo-correction-crash.cpp index 10c0c11aaa6b..49ea4c1bf16c 100644 --- a/clang/test/SemaCXX/typo-correction-crash.cpp +++ b/clang/test/SemaCXX/typo-correction-crash.cpp @@ -16,7 +16,8 @@ template struct is_same { static constexpr bool value = true; }; auto L1 = [] { return s; }; // expected-error {{use of undeclared identifier 's'}} using T1 = decltype(L1()); -static_assert(is_same::value, "Return statement should be discarded"); +// FIXME: Suppress the 'undeclared identifier T1' diagnostic, the UsingDecl T1 is discarded because of an invalid L1(). +static_assert(is_same::value, "Return statement should be discarded"); // expected-error {{use of undeclared identifier 'T1'}} auto L2 = [] { return tes; }; // expected-error {{use of undeclared identifier 'tes'; did you mean 'test'?}} using T2 = decltype(L2()); static_assert(is_same::value, "Return statement was corrected"); ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] 047400e - [mlir][LLVMIR] Add support for InlineAsmOp
Author: Nicolas Vasilache Date: 2020-11-30T08:32:02Z New Revision: 047400ed8204ebcc0b361ca9285b34ea91479b69 URL: https://github.com/llvm/llvm-project/commit/047400ed8204ebcc0b361ca9285b34ea91479b69 DIFF: https://github.com/llvm/llvm-project/commit/047400ed8204ebcc0b361ca9285b34ea91479b69.diff LOG: [mlir][LLVMIR] Add support for InlineAsmOp The InlineAsmOp mirrors the underlying LLVM semantics with a notable exception: the embedded `asm_string` is not allowed to define or reference any symbol or any global variable: only the operands of the op may be read, written, or referenced. Attempting to define or reference any symbol or any global behavior is considered undefined behavior at this time. The asm dialect syntax is currently specified with an integer (0 [default] for the "att dialect", 1 for the intel dialect) to circumvent the ODS limitation on string enums. Translation to LLVM is provided and raises the fact that the asm constraints string must be well-formed with respect to in/out operands. No check is performed on the asm_string. An InlineAsm instruction in LLVM is a special call operation to a function that is constructed on the fly. It does not fit the current model of MLIR calls with symbols. As a consequence, the current implementation constructs the function type in ModuleTranslation.cpp. This should be refactored in the future. The mlir-cpu-runner is augmented with the global initialization of the X86 asm parser to allow proper execution in JIT mode. Previously, only the X86 asm printer was initialized. Differential revision: https://reviews.llvm.org/D92166 Added: mlir/integration_test/Dialect/LLVMIR/CPU/X86/lit.local.cfg mlir/integration_test/Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir Modified: mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp mlir/lib/Target/LLVMIR/ModuleTranslation.cpp mlir/test/Dialect/LLVMIR/roundtrip.mlir mlir/test/Target/llvmir.mlir mlir/tools/mlir-cpu-runner/CMakeLists.txt mlir/tools/mlir-cpu-runner/mlir-cpu-runner.cpp Removed: diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td index 542afaa83f5f..e4dee53560bd 100644 --- a/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td +++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td @@ -1191,4 +1191,48 @@ def LLVM_FenceOp : LLVM_ZeroResultOp<"fence", []> { let printer = [{ printFenceOp(p, *this); }]; let verifier = "return ::verify(*this);"; } + +def AsmATT : LLVM_EnumAttrCase< + /*string cppSym=*/"AD_ATT", /*string irSym=*/"att", + /*string llvmSym=*/"AD_ATT", /*int val=*/0>; +def AsmIntel : LLVM_EnumAttrCase< + /*string cppSym=*/"AD_Intel", /*string irSym=*/"intel", + /*string llvmSym=*/"AD_Intel", /*int val=*/1>; +def AsmATTOrIntel : LLVM_EnumAttr< + /*string name=*/"AsmDialect", + /*string llvmName=*/"::llvm::InlineAsm::AsmDialect", + /*string description=*/"ATT (0) or Intel (1) asm dialect", + /*list cases=*/[AsmATT, AsmIntel]> { + let cppNamespace = "::mlir::LLVM"; +} + +def LLVM_InlineAsmOp : LLVM_Op<"inline_asm", []> { + let description = [{ +The InlineAsmOp mirrors the underlying LLVM semantics with a notable +exception: the embedded `asm_string` is not allowed to define or reference +any symbol or any global variable: only the operands of the op may be read, +written, or referenced. +Attempting to define or reference any symbol or any global behavior is +considered undefined behavior at this time. + }]; + let arguments = ( +ins Variadic:$operands, +StrAttr:$asm_string, +StrAttr:$constraints, +UnitAttr:$has_side_effects, +UnitAttr:$is_align_stack, +OptionalAttr< + DefaultValuedAttr>:$asm_dialect); + + let results = (outs Optional:$res); + + let assemblyFormat = [{ +(`has_side_effects` $has_side_effects^)? +(`is_align_stack` $is_align_stack^)? +(`asm_dialect` `=` $asm_dialect^)? +attr-dict +$asm_string `,` $constraints +operands `:` functional-type(operands, results) + }]; +} #endif // LLVMIR_OPS diff --git a/mlir/integration_test/Dialect/LLVMIR/CPU/X86/lit.local.cfg b/mlir/integration_test/Dialect/LLVMIR/CPU/X86/lit.local.cfg new file mode 100644 index ..84776f850fcb --- /dev/null +++ b/mlir/integration_test/Dialect/LLVMIR/CPU/X86/lit.local.cfg @@ -0,0 +1,8 @@ +import platform + +if platform.machine() != 'x86_64': +config.unsupported = True + +# No JIT on win32. +if sys.platform == 'win32': +config.unsupported = True diff --git a/mlir/integration_test/Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir b/mlir/integration_test/Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir new file mode 100644 index ..a4c0efb7beed --- /dev/null +++ b/mlir/integration_test/Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir @@ -0,0 +1,16 @@ +// RUN: mlir-cpu-runner %s
[llvm-branch-commits] [llvm] 112b3cb - [TableGen][SchedModels] Fix read/write variant substitution
Author: Evgeny Leviant Date: 2020-11-30T11:55:55+03:00 New Revision: 112b3cb6ba49aacd821440d0913f15b32131480e URL: https://github.com/llvm/llvm-project/commit/112b3cb6ba49aacd821440d0913f15b32131480e DIFF: https://github.com/llvm/llvm-project/commit/112b3cb6ba49aacd821440d0913f15b32131480e.diff LOG: [TableGen][SchedModels] Fix read/write variant substitution Patch fixes multiple issues related to expansion of variant sched reads and writes. Differential revision: https://reviews.llvm.org/D90844 Added: llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir Modified: llvm/lib/Target/ARM/ARMScheduleA57.td llvm/utils/TableGen/CodeGenSchedule.cpp llvm/utils/TableGen/CodeGenSchedule.h Removed: diff --git a/llvm/lib/Target/ARM/ARMScheduleA57.td b/llvm/lib/Target/ARM/ARMScheduleA57.td index be8591935810..0c610a4839f8 100644 --- a/llvm/lib/Target/ARM/ARMScheduleA57.td +++ b/llvm/lib/Target/ARM/ARMScheduleA57.td @@ -183,11 +183,6 @@ class A57BranchForm : // TODO: according to the doc, conditional uses I0/I1, unconditional uses M // Why more complex instruction uses more simple pipeline? // May be an error in doc. -def A57WriteALUsi : SchedWriteVariant<[ - // lsl #2, lsl #1, or lsr #1. - SchedVar>]>, - SchedVar>]> -]>; def A57WriteALUsr : SchedWriteVariant<[ SchedVar>]>, SchedVar>]> @@ -200,7 +195,7 @@ def A57ReadALUsr : SchedReadVariant<[ SchedVar, SchedVar ]>; -def : SchedAlias; +def : SchedAlias>>; def : SchedAlias; def : SchedAlias; def : SchedAlias; diff --git a/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir b/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir new file mode 100644 index ..da8df20e54d7 --- /dev/null +++ b/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir @@ -0,0 +1,34 @@ +# RUN: llc -mcpu=cortex-a57 -mtriple=thumb -enable-misched -run-pass=machine-scheduler -debug-only=machine-scheduler %s 2>&1 | FileCheck %s + +# CHECK-LABEL: ** MI Scheduling ** +# CHECK: %[[RES:[0-9]+]]:rgpr = t2MLA +# CHECK-NEXT: # preds left +# CHECK-NEXT: # succs left +# CHECK-NEXT: # rdefs left +# CHECK-NEXT: Latency : 3 +# CHECK-NEXT: Depth +# CHECK-NEXT: Height +# CHECK-NEXT: Predecessors: +# CHECK-NEXT:SU({{.*}}): Data Latency=1 Reg= +# CHECK-NEXT:SU({{.*}}): Out Latency= +# CHECK-NEXT:SU({{.*}}): Data Latency=1 Reg= +# CHECK-NEXT: Successors: +# CHECK-NEXT:SU([[SMLA_SU:[0-9]+]]): Data Latency=1 Reg=%[[RES]] +# CHECK-NEXT: Pressure Diff +# CHECK-NEXT: Single Issue : false; +# CHECK-NEXT: SU([[SMLA_SU]]): {{.*}} = t2SMLAL %{{[0-9]+}}:rgpr, %{{[0-9]+}}:rgpr, %{{[0-9]+}}:rgpr(tied-def 0), %[[RES]]:rgpr(tied-def 1), 14, $noreg + +name:test_smlal_forwarding +tracksRegLiveness: true +body: | + bb.0: +liveins: $r1, $r3, $r4, $r5, $r6 +%1:rgpr = COPY $r1 +%3:rgpr = COPY $r3 +%4:rgpr = COPY $r4 +%5:rgpr = COPY $r5 +%6:rgpr = COPY $r6 +%3:rgpr = t2MLA %4:rgpr, %1:rgpr, %4:rgpr, 14, $noreg +%6:rgpr, %5:rgpr = t2SMLAL %5:rgpr, %6:rgpr, %4:rgpr, %3:rgpr, 14, $noreg +$r0 = COPY %6:rgpr +BX_RET 14, $noreg, implicit $r0 diff --git a/llvm/utils/TableGen/CodeGenSchedule.cpp b/llvm/utils/TableGen/CodeGenSchedule.cpp index 0851c0f321b8..fa84199974ff 100644 --- a/llvm/utils/TableGen/CodeGenSchedule.cpp +++ b/llvm/utils/TableGen/CodeGenSchedule.cpp @@ -1338,8 +1338,7 @@ class PredTransitions { PredTransitions(CodeGenSchedModels &sm): SchedModels(sm) {} bool substituteVariantOperand(const SmallVectorImpl &RWSeq, -bool IsRead, bool IsForAnyCPU, -unsigned StartIdx); +bool IsRead, unsigned StartIdx); bool substituteVariants(const PredTransition &Trans); @@ -1413,29 +1412,6 @@ bool PredTransitions::mutuallyExclusive(Record *PredDef, return false; } -static bool hasAliasedVariants(const CodeGenSchedRW &RW, - CodeGenSchedModels &SchedModels) { - if (RW.HasVariants) -return true; - - for (Record *Alias : RW.Aliases) { -const CodeGenSchedRW &AliasRW = - SchedModels.getSchedRW(Alias->getValueAsDef("AliasRW")); -if (AliasRW.HasVariants) - return true; -if (AliasRW.IsSequence) { - IdxVec ExpandedRWs; - SchedModels.expandRWSequence(AliasRW.Index, ExpandedRWs, AliasRW.IsRead); - for (unsigned SI : ExpandedRWs) { -if (hasAliasedVariants(SchedModels.getSchedRW(SI, AliasRW.IsRead), - SchedModels)) - return true; - } -} - } - return false; -} - static std::vector getAllPredicates(ArrayRef Variants, ArrayRef ProcIndices) { std::vector Preds; @@ -1613,21 +1589,7 @@ pushVariant(const TransVariant &VInfo, bool IsRead) { // starts. RWSeq must be applied to all transitions between StartIdx and the end // of TransVec
[llvm-branch-commits] [llvm] d5387c0 - [ARM] Constant predicate tests. NFC
Author: David Green Date: 2020-11-30T09:18:25Z New Revision: d5387c044d96cda70701fcb7fb3ad06955957ed4 URL: https://github.com/llvm/llvm-project/commit/d5387c044d96cda70701fcb7fb3ad06955957ed4 DIFF: https://github.com/llvm/llvm-project/commit/d5387c044d96cda70701fcb7fb3ad06955957ed4.diff LOG: [ARM] Constant predicate tests. NFC Added: llvm/test/CodeGen/Thumb2/mve-pred-constfold.ll Modified: Removed: diff --git a/llvm/test/CodeGen/Thumb2/mve-pred-constfold.ll b/llvm/test/CodeGen/Thumb2/mve-pred-constfold.ll new file mode 100644 index ..afad0077bbe7 --- /dev/null +++ b/llvm/test/CodeGen/Thumb2/mve-pred-constfold.ll @@ -0,0 +1,153 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s + +define arm_aapcs_vfpcc void @reg(<8 x i16> %acc0, <8 x i16> %acc1, i32* nocapture %px, i16 signext %p0) { +; CHECK-LABEL: reg: +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT:.save {r4, r6, r7, lr} +; CHECK-NEXT:push {r4, r6, r7, lr} +; CHECK-NEXT:.pad #8 +; CHECK-NEXT:sub sp, #8 +; CHECK-NEXT:movw r1, #52428 +; CHECK-NEXT:vmsr p0, r1 +; CHECK-NEXT:movw r1, #13107 +; CHECK-NEXT:vstr p0, [sp, #4] @ 4-byte Spill +; CHECK-NEXT:vpst +; CHECK-NEXT:vaddvt.s16 r12, q1 +; CHECK-NEXT:vmsr p0, r1 +; CHECK-NEXT:vstr p0, [sp] @ 4-byte Spill +; CHECK-NEXT:vpst +; CHECK-NEXT:vaddvt.s16 r2, q1 +; CHECK-NEXT:vldr p0, [sp, #4] @ 4-byte Reload +; CHECK-NEXT:vpst +; CHECK-NEXT:vaddvt.s16 r4, q0 +; CHECK-NEXT:vldr p0, [sp] @ 4-byte Reload +; CHECK-NEXT:vpst +; CHECK-NEXT:vaddvt.s16 r6, q0 +; CHECK-NEXT:strd r6, r4, [r0] +; CHECK-NEXT:strd r2, r12, [r0, #8] +; CHECK-NEXT:add sp, #8 +; CHECK-NEXT:pop {r4, r6, r7, pc} +entry: + %0 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 13107) + %1 = tail call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> %acc0, i32 0, <8 x i1> %0) + %2 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 52428) + %3 = tail call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> %acc0, i32 0, <8 x i1> %2) + %4 = tail call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> %acc1, i32 0, <8 x i1> %0) + %5 = tail call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> %acc1, i32 0, <8 x i1> %2) + store i32 %1, i32* %px, align 4 + %arrayidx1 = getelementptr inbounds i32, i32* %px, i32 1 + store i32 %3, i32* %arrayidx1, align 4 + %arrayidx2 = getelementptr inbounds i32, i32* %px, i32 2 + store i32 %4, i32* %arrayidx2, align 4 + %arrayidx3 = getelementptr inbounds i32, i32* %px, i32 3 + store i32 %5, i32* %arrayidx3, align 4 + ret void +} + + +define arm_aapcs_vfpcc void @const(<8 x i16> %acc0, <8 x i16> %acc1, i32* nocapture %px, i16 signext %p0) { +; CHECK-LABEL: const: +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT:.save {r4, r6, r7, lr} +; CHECK-NEXT:push {r4, r6, r7, lr} +; CHECK-NEXT:uxth r2, r1 +; CHECK-NEXT:mvns r1, r1 +; CHECK-NEXT:vmsr p0, r2 +; CHECK-NEXT:uxth r1, r1 +; CHECK-NEXT:vpstt +; CHECK-NEXT:vaddvt.s16 r12, q1 +; CHECK-NEXT:vaddvt.s16 r2, q0 +; CHECK-NEXT:vmsr p0, r1 +; CHECK-NEXT:vpstt +; CHECK-NEXT:vaddvt.s16 r4, q1 +; CHECK-NEXT:vaddvt.s16 r6, q0 +; CHECK-NEXT:stm.w r0, {r2, r6, r12} +; CHECK-NEXT:str r4, [r0, #12] +; CHECK-NEXT:pop {r4, r6, r7, pc} +entry: + %0 = zext i16 %p0 to i32 + %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0) + %2 = tail call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> %acc0, i32 0, <8 x i1> %1) + %3 = xor i16 %p0, -1 + %4 = zext i16 %3 to i32 + %5 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %4) + %6 = tail call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> %acc0, i32 0, <8 x i1> %5) + %7 = tail call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> %acc1, i32 0, <8 x i1> %1) + %8 = tail call i32 @llvm.arm.mve.addv.predicated.v8i16.v8i1(<8 x i16> %acc1, i32 0, <8 x i1> %5) + store i32 %2, i32* %px, align 4 + %arrayidx1 = getelementptr inbounds i32, i32* %px, i32 1 + store i32 %6, i32* %arrayidx1, align 4 + %arrayidx2 = getelementptr inbounds i32, i32* %px, i32 2 + store i32 %7, i32* %arrayidx2, align 4 + %arrayidx3 = getelementptr inbounds i32, i32* %px, i32 3 + store i32 %8, i32* %arrayidx3, align 4 + ret void +} + + + +define arm_aapcs_vfpcc <4 x i32> @xorvpnot_i32(<4 x i32> %acc0, i16 signext %p0) { +; CHECK-LABEL: xorvpnot_i32: +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT:mvns r0, r0 +; CHECK-NEXT:vmov.i32 q1, #0x0 +; CHECK-NEXT:uxth r0, r0 +; CHECK-NEXT:vmsr p0, r0 +; CHECK-NEXT:vpsel q0, q0, q1 +; CHECK-NEXT:bx lr +entry: + %l3 = xor i16 %p0, -1 + %l4 = zext i16 %l3 to i32 + %l5 = tail call <4 x i1> @llvm.arm.mve.pred.i2v.v4i
[llvm-branch-commits] [llvm] b0e9b7c - [NFC][SimplifyCFG] Add STATISTIC() to the FoldValueComparisonIntoPredecessors() fold
Author: Roman Lebedev Date: 2020-11-30T12:27:16+03:00 New Revision: b0e9b7c59fc49559e78b58a84e45f0ea2d931761 URL: https://github.com/llvm/llvm-project/commit/b0e9b7c59fc49559e78b58a84e45f0ea2d931761 DIFF: https://github.com/llvm/llvm-project/commit/b0e9b7c59fc49559e78b58a84e45f0ea2d931761.diff LOG: [NFC][SimplifyCFG] Add STATISTIC() to the FoldValueComparisonIntoPredecessors() fold Added: Modified: llvm/lib/Transforms/Utils/SimplifyCFG.cpp Removed: diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp index 55ce05987bfd..35bef13ffaae 100644 --- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp +++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp @@ -159,6 +159,8 @@ STATISTIC( NumLookupTablesHoles, "Number of switch instructions turned into lookup tables (holes checked)"); STATISTIC(NumTableCmpReuses, "Number of reused switch table lookup compares"); +STATISTIC(NumFoldValueComparisonIntoPredecessors, + "Number of value comparisons folded into predecessor basic blocks"); STATISTIC(NumFoldBranchToCommonDest, "Number of branches folded into predecessor basic block"); STATISTIC( @@ -1046,8 +1048,14 @@ bool SimplifyCFGOpt::FoldValueComparisonIntoPredecessors(Instruction *TI, BasicBlock *BB = TI->getParent(); Value *CV = isValueEqualityComparison(TI); // CondVal assert(CV && "Not a comparison?"); + bool Changed = false; + auto _ = make_scope_exit([&]() { +if (Changed) + ++NumFoldValueComparisonIntoPredecessors; + }); + SmallVector Preds(pred_begin(BB), pred_end(BB)); while (!Preds.empty()) { BasicBlock *Pred = Preds.pop_back_val(); ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang-tools-extra] 8da7efb - [clang-tidy] add concurrency module
Author: Vasily Kulikov Date: 2020-11-30T12:27:17+03:00 New Revision: 8da7efbb0d5ec315a27b7b5286dbdd25694905ad URL: https://github.com/llvm/llvm-project/commit/8da7efbb0d5ec315a27b7b5286dbdd25694905ad DIFF: https://github.com/llvm/llvm-project/commit/8da7efbb0d5ec315a27b7b5286dbdd25694905ad.diff LOG: [clang-tidy] add concurrency module The module will contain checks related to concurrent programming (including threads, fibers, coroutines, etc.). Reviewed By: lebedev.ri Differential Revision: https://reviews.llvm.org/D91656 Added: clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt clang-tools-extra/clang-tidy/concurrency/ConcurrencyTidyModule.cpp Modified: clang-tools-extra/clang-tidy/CMakeLists.txt clang-tools-extra/clang-tidy/ClangTidyForceLinker.h clang-tools-extra/docs/ReleaseNotes.rst clang-tools-extra/docs/clang-tidy/index.rst Removed: diff --git a/clang-tools-extra/clang-tidy/CMakeLists.txt b/clang-tools-extra/clang-tidy/CMakeLists.txt index ca7a5afed6b0..455645050d93 100644 --- a/clang-tools-extra/clang-tidy/CMakeLists.txt +++ b/clang-tools-extra/clang-tidy/CMakeLists.txt @@ -55,6 +55,7 @@ add_subdirectory(altera) add_subdirectory(boost) add_subdirectory(bugprone) add_subdirectory(cert) +add_subdirectory(concurrency) add_subdirectory(cppcoreguidelines) add_subdirectory(darwin) add_subdirectory(fuchsia) @@ -81,6 +82,7 @@ set(ALL_CLANG_TIDY_CHECKS clangTidyBoostModule clangTidyBugproneModule clangTidyCERTModule + clangTidyConcurrencyModule clangTidyCppCoreGuidelinesModule clangTidyDarwinModule clangTidyFuchsiaModule diff --git a/clang-tools-extra/clang-tidy/ClangTidyForceLinker.h b/clang-tools-extra/clang-tidy/ClangTidyForceLinker.h index 3a5330c85c3b..2691d90fa521 100644 --- a/clang-tools-extra/clang-tidy/ClangTidyForceLinker.h +++ b/clang-tools-extra/clang-tidy/ClangTidyForceLinker.h @@ -45,6 +45,11 @@ extern volatile int CERTModuleAnchorSource; static int LLVM_ATTRIBUTE_UNUSED CERTModuleAnchorDestination = CERTModuleAnchorSource; +// This anchor is used to force the linker to link the ConcurrencyModule. +extern volatile int ConcurrencyModuleAnchorSource; +static int LLVM_ATTRIBUTE_UNUSED ConcurrencyModuleAnchorDestination = +ConcurrencyModuleAnchorSource; + // This anchor is used to force the linker to link the CppCoreGuidelinesModule. extern volatile int CppCoreGuidelinesModuleAnchorSource; static int LLVM_ATTRIBUTE_UNUSED CppCoreGuidelinesModuleAnchorDestination = diff --git a/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt b/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt new file mode 100644 index ..e09de74706d8 --- /dev/null +++ b/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt @@ -0,0 +1,22 @@ +set(LLVM_LINK_COMPONENTS + Support + ) + +add_clang_library(clangTidyConcurrencyModule + ConcurrencyTidyModule.cpp + + LINK_LIBS + clangTidy + clangTidyUtils + ) + +clang_target_link_libraries(clangTidyConcurrencyModule + PRIVATE + clangAnalysis + clangAST + clangASTMatchers + clangBasic + clangLex + clangSerialization + clangTooling + ) diff --git a/clang-tools-extra/clang-tidy/concurrency/ConcurrencyTidyModule.cpp b/clang-tools-extra/clang-tidy/concurrency/ConcurrencyTidyModule.cpp new file mode 100644 index ..be8fa7e8ef53 --- /dev/null +++ b/clang-tools-extra/clang-tidy/concurrency/ConcurrencyTidyModule.cpp @@ -0,0 +1,33 @@ +//===--- ConcurrencyTidyModule.cpp - clang-tidy ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===--===// + +#include "../ClangTidy.h" +#include "../ClangTidyModule.h" +#include "../ClangTidyModuleRegistry.h" + +namespace clang { +namespace tidy { +namespace concurrency { + +class ConcurrencyModule : public ClangTidyModule { +public: + void addCheckFactories(ClangTidyCheckFactories &CheckFactories) override {} +}; + +} // namespace concurrency + +// Register the ConcurrencyTidyModule using this statically initialized variable. +static ClangTidyModuleRegistry::Add +X("concurrency-module", "Adds concurrency checks."); + +// This anchor is used to force the linker to link in the generated object file +// and thus register the ConcurrencyModule. +volatile int ConcurrencyModuleAnchorSource = 0; + +} // namespace tidy +} // namespace clang diff --git a/clang-tools-extra/docs/ReleaseNotes.rst b/clang-tools-extra/docs/ReleaseNotes.rst index 46bb36c271d3..46461a2a6e8d 100644 --- a/clang-tools-extra/docs/ReleaseNotes.rst +++ b/clang-tools-extra/docs/ReleaseNotes.rst @@ -82,6 +82,11 @@ New modules `Altera SDK for OpenCL: Best Practices Guide
[llvm-branch-commits] [clang-tools-extra] cac5be4 - [clang-tidy] implement concurrency-mt-unsafe
Author: Vasily Kulikov Date: 2020-11-30T12:27:17+03:00 New Revision: cac5be495ed88b269ad7a3000305e714cce60e63 URL: https://github.com/llvm/llvm-project/commit/cac5be495ed88b269ad7a3000305e714cce60e63 DIFF: https://github.com/llvm/llvm-project/commit/cac5be495ed88b269ad7a3000305e714cce60e63.diff LOG: [clang-tidy] implement concurrency-mt-unsafe Checks for some thread-unsafe functions against a black list of known-to-be-unsafe functions. Usually they access static variables without synchronization (e.g. gmtime(3)) or utilize signals in a racy way (e.g. sleep(3)). The patch adds a check instead of auto-fix as thread-safe alternatives usually have API with an additional argument (e.g. gmtime(3) v.s. gmtime_r(3)) or have a different semantics (e.g. exit(3) v.s. __exit(3)), so it is a rather tricky or non-expected fix. An option specifies which functions in libc should be considered thread-safe, possible values are `posix`, `glibc`, or `any` (the most strict check). It defaults to 'any' as it is unknown what target libc type is - clang-tidy may be run on linux but check sources compiled for other *NIX. The check is used in Yandex Taxi backend and has caught many unpleasant bugs. A similar patch for coroutine-unsafe API is coming next. Reviewed By: lebedev.ri Differential Revision: https://reviews.llvm.org/D90944 Added: clang-tools-extra/clang-tidy/concurrency/MtUnsafeCheck.cpp clang-tools-extra/clang-tidy/concurrency/MtUnsafeCheck.h clang-tools-extra/docs/clang-tidy/checks/concurrency-mt-unsafe.rst clang-tools-extra/test/clang-tidy/checkers/concurrency-mt-unsafe-any.cpp clang-tools-extra/test/clang-tidy/checkers/concurrency-mt-unsafe-glibc.cpp clang-tools-extra/test/clang-tidy/checkers/concurrency-mt-unsafe-posix.cpp Modified: clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt clang-tools-extra/clang-tidy/concurrency/ConcurrencyTidyModule.cpp clang-tools-extra/docs/ReleaseNotes.rst clang-tools-extra/docs/clang-tidy/checks/list.rst Removed: diff --git a/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt b/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt index e09de74706d8..df329662b0df 100644 --- a/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt +++ b/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt @@ -4,6 +4,7 @@ set(LLVM_LINK_COMPONENTS add_clang_library(clangTidyConcurrencyModule ConcurrencyTidyModule.cpp + MtUnsafeCheck.cpp LINK_LIBS clangTidy diff --git a/clang-tools-extra/clang-tidy/concurrency/ConcurrencyTidyModule.cpp b/clang-tools-extra/clang-tidy/concurrency/ConcurrencyTidyModule.cpp index be8fa7e8ef53..ea4131e0ca51 100644 --- a/clang-tools-extra/clang-tidy/concurrency/ConcurrencyTidyModule.cpp +++ b/clang-tools-extra/clang-tidy/concurrency/ConcurrencyTidyModule.cpp @@ -9,6 +9,7 @@ #include "../ClangTidy.h" #include "../ClangTidyModule.h" #include "../ClangTidyModuleRegistry.h" +#include "MtUnsafeCheck.h" namespace clang { namespace tidy { @@ -16,7 +17,10 @@ namespace concurrency { class ConcurrencyModule : public ClangTidyModule { public: - void addCheckFactories(ClangTidyCheckFactories &CheckFactories) override {} + void addCheckFactories(ClangTidyCheckFactories &CheckFactories) override { +CheckFactories.registerCheck( +"concurrency-mt-unsafe"); + } }; } // namespace concurrency diff --git a/clang-tools-extra/clang-tidy/concurrency/MtUnsafeCheck.cpp b/clang-tools-extra/clang-tidy/concurrency/MtUnsafeCheck.cpp new file mode 100644 index ..bc9f7403b6e9 --- /dev/null +++ b/clang-tools-extra/clang-tidy/concurrency/MtUnsafeCheck.cpp @@ -0,0 +1,316 @@ +//===--- MtUnsafeCheck.cpp - clang-tidy ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===--===// + +#include "MtUnsafeCheck.h" +#include "clang/AST/ASTContext.h" +#include "clang/ASTMatchers/ASTMatchFinder.h" + +using namespace clang::ast_matchers; + +// Initial list was extracted from gcc documentation +static const clang::StringRef GlibcFunctions[] = { +"::argp_error", +"::argp_help", +"::argp_parse", +"::argp_state_help", +"::argp_usage", +"::asctime", +"::clearenv", +"::crypt", +"::ctime", +"::cuserid", +"::drand48", +"::ecvt", +"::encrypt", +"::endfsent", +"::endgrent", +"::endhostent", +"::endnetent", +"::endnetgrent", +"::endprotoent", +"::endpwent", +"::endservent", +"::endutent", +"::endutxent", +"::erand48", +"::error_at_line", +"::exit", +"::fcloseall", +"::fcvt", +"::fgetgrent", +"::fgetpwent", +"::gammal", +"::getchar_
[llvm-branch-commits] [llvm] 1295235 - Fix test case
Author: Evgeny Leviant Date: 2020-11-30T12:35:28+03:00 New Revision: 129523588f2715cb5d2f8852c949b3669a3c1b6b URL: https://github.com/llvm/llvm-project/commit/129523588f2715cb5d2f8852c949b3669a3c1b6b DIFF: https://github.com/llvm/llvm-project/commit/129523588f2715cb5d2f8852c949b3669a3c1b6b.diff LOG: Fix test case Added: Modified: llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir Removed: diff --git a/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir b/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir index da8df20e54d7..03241c48045d 100644 --- a/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir +++ b/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir @@ -1,4 +1,4 @@ -# RUN: llc -mcpu=cortex-a57 -mtriple=thumb -enable-misched -run-pass=machine-scheduler -debug-only=machine-scheduler %s 2>&1 | FileCheck %s +# RUN: llc -mcpu=cortex-a57 -mtriple=thumb -enable-misched -run-pass=machine-scheduler -debug-only=machine-scheduler %s -o - 2>&1 | FileCheck %s # CHECK-LABEL: ** MI Scheduling ** # CHECK: %[[RES:[0-9]+]]:rgpr = t2MLA ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] b5fbc60 - [clang-format] State where clang-format-diff.py should be run from
Author: David Spickett Date: 2020-11-30T10:00:49Z New Revision: b5fbc60e4de45f2b56331281a706b78ff52bd286 URL: https://github.com/llvm/llvm-project/commit/b5fbc60e4de45f2b56331281a706b78ff52bd286 DIFF: https://github.com/llvm/llvm-project/commit/b5fbc60e4de45f2b56331281a706b78ff52bd286.diff LOG: [clang-format] State where clang-format-diff.py should be run from At least with git, file paths in a diff will be relative to the repo root. So if you are in "llvm-project/lldb" and the diff shows "clang/foo" modified you get: No such file or directory >From clang-format-diff.py, since clang-format was asked to read: llvm-project/lldb/clang/foo Add a note to the docs to explain this. (there is `git diff --relative` but that excludes changes outside of the current dir) Reviewed By: sylvestre.ledru Differential Revision: https://reviews.llvm.org/D91799 Added: Modified: clang/docs/ClangFormat.rst Removed: diff --git a/clang/docs/ClangFormat.rst b/clang/docs/ClangFormat.rst index d396667ce10c..b746ed3453df 100644 --- a/clang/docs/ClangFormat.rst +++ b/clang/docs/ClangFormat.rst @@ -248,6 +248,9 @@ In an SVN client, you can do: The option `-U0` will create a diff without context lines (the script would format those as well). +These commands use the file paths shown in the diff output +so they will only work from the root of the repository. + Current State of Clang Format for LLVM == ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] 98e87f7 - [lldb] Error when there are no ports to launch a gdbserver on
Author: David Spickett Date: 2020-11-30T10:19:14Z New Revision: 98e87f76d0f486122d76b334232102e0d7a9254d URL: https://github.com/llvm/llvm-project/commit/98e87f76d0f486122d76b334232102e0d7a9254d DIFF: https://github.com/llvm/llvm-project/commit/98e87f76d0f486122d76b334232102e0d7a9254d.diff LOG: [lldb] Error when there are no ports to launch a gdbserver on Previously if you did: $ lldb-server platform --server <...> --min-gdbserver-port 12346 --max-gdbserver-port 12347 (meaning only use port 12346 for gdbservers) Then tried to launch two gdbservers on the same connection, the second one would return port 65535. Which is a real port number but it actually means lldb-server didn't find one it was allowed to use. send packet: $qLaunchGDBServer;<...> read packet: $pid:1919;port:12346;#c0 <...> send packet: $qLaunchGDBServer;<...> read packet: $pid:1927;port:65535;#c7 This situation should be an error even if port 65535 does happen to be available on the current machine. To fix this make PortMap it's own class within GDBRemoteCommunicationServerPlatform. This almost the same as the old typedef but for GetNextAvailablePort() returning an llvm::Expected. This means we have to handle not finding a port, by returning an error packet. Also add unit tests for this new PortMap class. Reviewed By: labath Differential Revision: https://reviews.llvm.org/D91634 Added: lldb/unittests/Process/gdb-remote/PortMapTest.cpp Modified: lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServer.h lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.h lldb/tools/lldb-server/lldb-platform.cpp lldb/unittests/Process/gdb-remote/CMakeLists.txt Removed: diff --git a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServer.h b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServer.h index 63567bb9b5de..a1cf70f9cd1a 100644 --- a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServer.h +++ b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServer.h @@ -27,7 +27,6 @@ class ProcessGDBRemote; class GDBRemoteCommunicationServer : public GDBRemoteCommunication { public: - using PortMap = std::map; using PacketHandler = std::function; diff --git a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp index 7e94afb9ec68..ae1260221e56 100644 --- a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp +++ b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp @@ -42,6 +42,69 @@ using namespace lldb; using namespace lldb_private::process_gdb_remote; using namespace lldb_private; +GDBRemoteCommunicationServerPlatform::PortMap::PortMap(uint16_t min_port, + uint16_t max_port) { + for (; min_port < max_port; ++min_port) +m_port_map[min_port] = LLDB_INVALID_PROCESS_ID; +} + +void GDBRemoteCommunicationServerPlatform::PortMap::AllowPort(uint16_t port) { + // Do not modify existing mappings + m_port_map.insert({port, LLDB_INVALID_PROCESS_ID}); +} + +llvm::Expected +GDBRemoteCommunicationServerPlatform::PortMap::GetNextAvailablePort() { + if (m_port_map.empty()) +return 0; // Bind to port zero and get a port, we didn't have any + // limitations + + for (auto &pair : m_port_map) { +if (pair.second == LLDB_INVALID_PROCESS_ID) { + pair.second = ~(lldb::pid_t)LLDB_INVALID_PROCESS_ID; + return pair.first; +} + } + return llvm::createStringError(llvm::inconvertibleErrorCode(), + "No free port found in port map"); +} + +bool GDBRemoteCommunicationServerPlatform::PortMap::AssociatePortWithProcess( +uint16_t port, lldb::pid_t pid) { + auto pos = m_port_map.find(port); + if (pos != m_port_map.end()) { +pos->second = pid; +return true; + } + return false; +} + +bool GDBRemoteCommunicationServerPlatform::PortMap::FreePort(uint16_t port) { + std::map::iterator pos = m_port_map.find(port); + if (pos != m_port_map.end()) { +pos->second = LLDB_INVALID_PROCESS_ID; +return true; + } + return false; +} + +bool GDBRemoteCommunicationServerPlatform::PortMap::FreePortForProcess( +lldb::pid_t pid) { + if (!m_port_map.empty()) { +for (auto &pair : m_port_map) { + if (pair.second == pid) { +pair.second = LLDB_INVALID_PROCESS_ID; +return true; + } +} + } + return false; +} + +bool GDBRemoteCommunicationServerPlatform::PortMap::empty() const { + return m_port_map.empty(); +} + // GDBRemoteCommunicationServerPlatform constructor GDBRemoteCommunicationServerPlatform::GDBRemoteCommunicationServerPlatform( co
[llvm-branch-commits] [clang-tools-extra] 317ca3e - [NFC][clang-tidy] Do link FrontendOpenMP into concurrency module after all
Author: Roman Lebedev Date: 2020-11-30T13:34:00+03:00 New Revision: 317ca3ecf8244cabb4ca9d45e626ad3cf0f8e4b2 URL: https://github.com/llvm/llvm-project/commit/317ca3ecf8244cabb4ca9d45e626ad3cf0f8e4b2 DIFF: https://github.com/llvm/llvm-project/commit/317ca3ecf8244cabb4ca9d45e626ad3cf0f8e4b2.diff LOG: [NFC][clang-tidy] Do link FrontendOpenMP into concurrency module after all It seems that while clangASTMatchers does add FrontendOpenMP into it's LLVM_LINK_COMPONENTS, it's still not being propagated transitively. Added: Modified: clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt Removed: diff --git a/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt b/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt index df329662b0df..b757d6a60b78 100644 --- a/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt +++ b/clang-tools-extra/clang-tidy/concurrency/CMakeLists.txt @@ -1,4 +1,5 @@ set(LLVM_LINK_COMPONENTS + FrontendOpenMP Support ) ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] e20efa3 - [LegacyPM] Simplify PMTopLevelManager::collectLastUses. NFC.
Author: Jay Foad Date: 2020-11-30T10:36:19Z New Revision: e20efa3dd5c75a79a47d40335aee0f63261f9c5b URL: https://github.com/llvm/llvm-project/commit/e20efa3dd5c75a79a47d40335aee0f63261f9c5b DIFF: https://github.com/llvm/llvm-project/commit/e20efa3dd5c75a79a47d40335aee0f63261f9c5b.diff LOG: [LegacyPM] Simplify PMTopLevelManager::collectLastUses. NFC. Added: Modified: llvm/lib/IR/LegacyPassManager.cpp Removed: diff --git a/llvm/lib/IR/LegacyPassManager.cpp b/llvm/lib/IR/LegacyPassManager.cpp index 8fd35ef975e2..544c56a789a3 100644 --- a/llvm/lib/IR/LegacyPassManager.cpp +++ b/llvm/lib/IR/LegacyPassManager.cpp @@ -685,16 +685,12 @@ PMTopLevelManager::setLastUser(ArrayRef AnalysisPasses, Pass *P) { /// Collect passes whose last user is P void PMTopLevelManager::collectLastUses(SmallVectorImpl &LastUses, Pass *P) { - DenseMap >::iterator DMI = -InversedLastUser.find(P); + auto DMI = InversedLastUser.find(P); if (DMI == InversedLastUser.end()) return; - SmallPtrSet &LU = DMI->second; - for (Pass *LUP : LU) { -LastUses.push_back(LUP); - } - + auto &LU = DMI->second; + LastUses.append(LU.begin(), LU.end()); } AnalysisUsage *PMTopLevelManager::findAnalysisUsage(Pass *P) { ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] ffaba24 - Add `using ConvertToLLVMPattern::match/matchAndRewrite` to avoid 'hiding overload' warning.
Author: Christian Sigg Date: 2020-11-30T11:40:34+01:00 New Revision: ffaba24c75edc274ec651915a0f2f500b8f6b341 URL: https://github.com/llvm/llvm-project/commit/ffaba24c75edc274ec651915a0f2f500b8f6b341 DIFF: https://github.com/llvm/llvm-project/commit/ffaba24c75edc274ec651915a0f2f500b8f6b341.diff LOG: Add `using ConvertToLLVMPattern::match/matchAndRewrite` to avoid 'hiding overload' warning. Reviewed By: ftynse Differential Revision: https://reviews.llvm.org/D92303 Added: Modified: mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h Removed: diff --git a/mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h b/mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h index 70db4c1510bf..edfd8c96eaa7 100644 --- a/mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h +++ b/mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h @@ -605,6 +605,10 @@ class ConvertOpToLLVMPattern : public ConvertToLLVMPattern { } return failure(); } + +private: + using ConvertToLLVMPattern::match; + using ConvertToLLVMPattern::matchAndRewrite; }; namespace LLVM { ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 83d79ca - [X86][AVX512] Only lower to VPALIGNR if we have BWI (PR48322)
Author: Simon Pilgrim Date: 2020-11-30T10:51:24Z New Revision: 83d79ca5bf13ca37f4ab69f24004ca83c1d03ea4 URL: https://github.com/llvm/llvm-project/commit/83d79ca5bf13ca37f4ab69f24004ca83c1d03ea4 DIFF: https://github.com/llvm/llvm-project/commit/83d79ca5bf13ca37f4ab69f24004ca83c1d03ea4.diff LOG: [X86][AVX512] Only lower to VPALIGNR if we have BWI (PR48322) Added: Modified: llvm/lib/Target/X86/X86ISelLowering.cpp llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll Removed: diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 5cbca95f45f5..6f5f198544c8 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -17590,12 +17590,14 @@ static SDValue lowerV8I64Shuffle(const SDLoc &DL, ArrayRef Mask, return Rotate; // Try to use PALIGNR. - if (SDValue Rotate = lowerShuffleAsByteRotate(DL, MVT::v8i64, V1, V2, Mask, -Subtarget, DAG)) -return Rotate; + if (Subtarget.hasBWI()) +if (SDValue Rotate = lowerShuffleAsByteRotate(DL, MVT::v8i64, V1, V2, Mask, + Subtarget, DAG)) + return Rotate; if (SDValue Unpck = lowerShuffleWithUNPCK(DL, MVT::v8i64, Mask, V1, V2, DAG)) return Unpck; + // If we have AVX512F support, we can use VEXPAND. if (SDValue V = lowerShuffleToEXPAND(DL, MVT::v8i64, Zeroable, Mask, V1, V2, DAG, Subtarget)) diff --git a/llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll b/llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll index 59f786266d35..60ae9b584053 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll @@ -167,6 +167,16 @@ define <16 x float> @shuffle_v16f32_00_17_02_19_04_21_06_23_08_25_10_27_12_29_14 ret <16 x float> %tmp2 } +; PR48322 +define <16 x float> @shuffle_v16f32_02_03_16_17_06_07_20_21_10_11_24_25_14_15_28_29(<16 x float> %a, <16 x float> %b) { +; ALL-LABEL: shuffle_v16f32_02_03_16_17_06_07_20_21_10_11_24_25_14_15_28_29: +; ALL: # %bb.0: +; ALL-NEXT:vshufpd {{.*#+}} zmm0 = zmm0[1],zmm1[0],zmm0[3],zmm1[2],zmm0[5],zmm1[4],zmm0[7],zmm1[6] +; ALL-NEXT:retq + %shuffle = shufflevector <16 x float> %a, <16 x float> %b, <16 x i32> + ret <16 x float> %shuffle +} + define <16 x i32> @shuffle_v16i32_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00(<16 x i32> %a, <16 x i32> %b) { ; ALL-LABEL: shuffle_v16i32_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00: ; ALL: # %bb.0: @@ -505,6 +515,22 @@ define <16 x i32> @shuffle_v16i32_16_16_02_03_20_20_06_07_24_24_10_11_28_28_uu_u ret <16 x i32> %shuffle } +; PR48322 +define <16 x i32> @shuffle_v16i32_02_03_16_17_06_07_20_21_10_11_24_25_14_15_28_29(<16 x i32> %a, <16 x i32> %b) { +; AVX512F-LABEL: shuffle_v16i32_02_03_16_17_06_07_20_21_10_11_24_25_14_15_28_29: +; AVX512F: # %bb.0: +; AVX512F-NEXT:vmovdqa64 {{.*#+}} zmm2 = [1,8,3,10,5,12,7,14] +; AVX512F-NEXT:vpermt2q %zmm1, %zmm2, %zmm0 +; AVX512F-NEXT:retq +; +; AVX512BW-LABEL: shuffle_v16i32_02_03_16_17_06_07_20_21_10_11_24_25_14_15_28_29: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT:vpalignr {{.*#+}} zmm0 = zmm0[8,9,10,11,12,13,14,15],zmm1[0,1,2,3,4,5,6,7],zmm0[24,25,26,27,28,29,30,31],zmm1[16,17,18,19,20,21,22,23],zmm0[40,41,42,43,44,45,46,47],zmm1[32,33,34,35,36,37,38,39],zmm0[56,57,58,59,60,61,62,63],zmm1[48,49,50,51,52,53,54,55] +; AVX512BW-NEXT:retq + %shuffle = shufflevector <16 x i32> %a, <16 x i32> %b, <16 x i32> + ret <16 x i32> %shuffle +} + define <16 x i32> @shuffle_v8i32_17_16_01_00_21_20_05_04_25_24_09_08_29_28_13_12(<16 x i32> %a, <16 x i32> %b) { ; ALL-LABEL: shuffle_v8i32_17_16_01_00_21_20_05_04_25_24_09_08_29_28_13_12: ; ALL: # %bb.0: ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] a7f8d96 - [lldb] Use llvm::Optional for port in LaunchGDBServer
Author: David Spickett Date: 2020-11-30T11:20:39Z New Revision: a7f8d96b16a394a87230d592c727906f67a4ba07 URL: https://github.com/llvm/llvm-project/commit/a7f8d96b16a394a87230d592c727906f67a4ba07 DIFF: https://github.com/llvm/llvm-project/commit/a7f8d96b16a394a87230d592c727906f67a4ba07.diff LOG: [lldb] Use llvm::Optional for port in LaunchGDBServer Previously we used UINT16_MAX to mean no port/no specifc port. This leads to confusion because 65535 is a valid port number. Instead use an optional. If you want a specific port call LaunchGDBServer as normal, otherwise pass an empty optional and it will be set to the port that gets chosen. (or left empty in the case where we fail to find a port) Reviewed By: labath Differential Revision: https://reviews.llvm.org/D92035 Added: Modified: lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.h lldb/tools/lldb-server/lldb-platform.cpp Removed: diff --git a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp index ae1260221e56..4aa153460941 100644 --- a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp +++ b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp @@ -157,8 +157,8 @@ GDBRemoteCommunicationServerPlatform::~GDBRemoteCommunicationServerPlatform() {} Status GDBRemoteCommunicationServerPlatform::LaunchGDBServer( const lldb_private::Args &args, std::string hostname, lldb::pid_t &pid, -uint16_t &port, std::string &socket_name) { - if (port == UINT16_MAX) { +llvm::Optional &port, std::string &socket_name) { + if (!port) { llvm::Expected available_port = m_port_map.GetNextAvailablePort(); if (available_port) port = *available_port; @@ -179,7 +179,7 @@ Status GDBRemoteCommunicationServerPlatform::LaunchGDBServer( Log *log(GetLogIfAnyCategoriesSet(LIBLLDB_LOG_PLATFORM)); LLDB_LOGF(log, "Launching debugserver with: %s:%u...", hostname.c_str(), -port); +*port); // Do not run in a new session so that it can not linger after the platform // closes. @@ -194,7 +194,7 @@ Status GDBRemoteCommunicationServerPlatform::LaunchGDBServer( #if !defined(__APPLE__) url << m_socket_scheme << "://"; #endif - uint16_t *port_ptr = &port; + uint16_t *port_ptr = port.getPointer(); if (m_socket_protocol == Socket::ProtocolTcp) { llvm::StringRef platform_scheme; llvm::StringRef platform_ip; @@ -205,7 +205,7 @@ Status GDBRemoteCommunicationServerPlatform::LaunchGDBServer( platform_port, platform_path); UNUSED_IF_ASSERT_DISABLED(ok); assert(ok); -url << platform_ip.str() << ":" << port; +url << platform_ip.str() << ":" << *port; } else { socket_name = GetDomainSocketPath("gdbserver").GetPath(); url << socket_name; @@ -219,11 +219,11 @@ Status GDBRemoteCommunicationServerPlatform::LaunchGDBServer( if (pid != LLDB_INVALID_PROCESS_ID) { std::lock_guard guard(m_spawned_pids_mutex); m_spawned_pids.insert(pid); -if (port > 0) - m_port_map.AssociatePortWithProcess(port, pid); +if (*port > 0) + m_port_map.AssociatePortWithProcess(*port, pid); } else { -if (port > 0) - m_port_map.FreePort(port); +if (*port > 0) + m_port_map.FreePort(*port); } return error; } @@ -243,12 +243,15 @@ GDBRemoteCommunicationServerPlatform::Handle_qLaunchGDBServer( packet.SetFilePos(::strlen("qLaunchGDBServer;")); llvm::StringRef name; llvm::StringRef value; - uint16_t port = UINT16_MAX; + llvm::Optional port; while (packet.GetNameColonValue(name, value)) { if (name.equals("host")) hostname = std::string(value); -else if (name.equals("port")) - value.getAsInteger(0, port); +else if (name.equals("port")) { + // Make the Optional valid so we can use its value + port = 0; + value.getAsInteger(0, port.getValue()); +} } lldb::pid_t debugserver_pid = LLDB_INVALID_PROCESS_ID; @@ -269,8 +272,9 @@ GDBRemoteCommunicationServerPlatform::Handle_qLaunchGDBServer( __FUNCTION__, debugserver_pid); StreamGDBRemote response; + assert(port); response.Printf("pid:%" PRIu64 ";port:%u;", debugserver_pid, - port + m_port_offset); + *port + m_port_offset); if (!socket_name.empty()) { response.PutCString("socket_name:"); response.PutStringAsRawHex8(socket_name); diff --git a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.h b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.h index 69261dd2ad64..6b964da4a279 100644 --- a/lldb/source/Plugins/Proces
[llvm-branch-commits] [llvm] 5110ff0 - [AArch64][CostModel] Fix cost for mul <2 x i64>
Author: Sjoerd Meijer Date: 2020-11-30T11:36:55Z New Revision: 5110ff08176f29eefd7638e328d65dfd1c1ad042 URL: https://github.com/llvm/llvm-project/commit/5110ff08176f29eefd7638e328d65dfd1c1ad042 DIFF: https://github.com/llvm/llvm-project/commit/5110ff08176f29eefd7638e328d65dfd1c1ad042.diff LOG: [AArch64][CostModel] Fix cost for mul <2 x i64> This was modeled to have a cost of 1, but since we do not have a MUL.2d this is scalarized into vector inserts/extracts and scalar muls. Motivating precommitted test is test/Transforms/SLPVectorizer/AArch64/mul.ll, which we don't want to SLP vectorize. Test Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll unfortunately needed changing, but the reason is documented in LoopVectorize.cpp:6855: // The cost of executing VF copies of the scalar instruction. This opcode // is unknown. Assume that it is the same as 'mul'. which I will address next as a follow up of this. Differential Revision: https://reviews.llvm.org/D92208 Added: Modified: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp llvm/test/Analysis/CostModel/AArch64/mul.ll llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll llvm/test/Transforms/SLPVectorizer/AArch64/mul.ll Removed: diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp index 37a34023b8d0..d97570755291 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -644,8 +644,20 @@ int AArch64TTIImpl::getArithmeticInstrCost( } return Cost; - case ISD::ADD: case ISD::MUL: +if (LT.second != MVT::v2i64) + return (Cost + 1) * LT.first; +// Since we do not have a MUL.2d instruction, a mul <2 x i64> is expensive +// as elements are extracted from the vectors and the muls scalarized. +// As getScalarizationOverhead is a bit too pessimistic, we estimate the +// cost for a i64 vector directly here, which is: +// - four i64 extracts, +// - two i64 inserts, and +// - two muls. +// So, for a v2i64 with LT.First = 1 the cost is 8, and for a v4i64 with +// LT.first = 2 the cost is 16. +return LT.first * 8; + case ISD::ADD: case ISD::XOR: case ISD::OR: case ISD::AND: diff --git a/llvm/test/Analysis/CostModel/AArch64/mul.ll b/llvm/test/Analysis/CostModel/AArch64/mul.ll index 6a29c6d772d4..e98463a9fcf4 100644 --- a/llvm/test/Analysis/CostModel/AArch64/mul.ll +++ b/llvm/test/Analysis/CostModel/AArch64/mul.ll @@ -113,7 +113,7 @@ define <8 x i32> @t12(<8 x i32> %a, <8 x i32> %b) { define <2 x i64> @t13(<2 x i64> %a, <2 x i64> %b) { ; THROUGHPUT-LABEL: 't13' -; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = mul nsw <2 x i64> %a, %b +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %1 = mul nsw <2 x i64> %a, %b ; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %1 ; %1 = mul nsw <2 x i64> %a, %b @@ -122,7 +122,7 @@ define <2 x i64> @t13(<2 x i64> %a, <2 x i64> %b) { define <4 x i64> @t14(<4 x i64> %a, <4 x i64> %b) { ; THROUGHPUT-LABEL: 't14' -; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = mul nsw <4 x i64> %a, %b +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %1 = mul nsw <4 x i64> %a, %b ; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1 ; %1 = mul nsw <4 x i64> %a, %b diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll b/llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll index 80d2e282176a..37c1f4eec32a 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll @@ -9,8 +9,8 @@ ; leaving cost 3 for scalarizing the result + 2 for executing the op with VF 2. ; CM: LV: Scalar loop costs: 7. -; CM: LV: Found an estimated cost of 5 for VF 2 For instruction: %a = extractvalue { i64, i64 } %sv, 0 -; CM-NEXT: LV: Found an estimated cost of 5 for VF 2 For instruction: %b = extractvalue { i64, i64 } %sv, 1 +; CM: LV: Found an estimated cost of 19 for VF 2 For instruction: %a = extractvalue { i64, i64 } %sv, 0 +; CM-NEXT: LV: Found an estimated cost of 19 for VF 2 For instruction: %b = extractvalue { i64, i64 } %sv, 1 ; Check that the extractvalue operands are actually free in vector code. diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/mul.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/mul.ll index 228a4d773f0c..7e941adc8cd5 100644 --- a/llvm/test/Transforms/SLPVectorizer/AArch64/mul.ll ++
[llvm-branch-commits] [lldb] b69c09b - Support custom expedited register set in gdb-remote
Author: Muhammad Omair Javaid Date: 2020-11-30T17:34:19+05:00 New Revision: b69c09bf43527e79a770efd9886b79e611f8fd59 URL: https://github.com/llvm/llvm-project/commit/b69c09bf43527e79a770efd9886b79e611f8fd59 DIFF: https://github.com/llvm/llvm-project/commit/b69c09bf43527e79a770efd9886b79e611f8fd59.diff LOG: Support custom expedited register set in gdb-remote This patch adds capability to introduce a custom expedited register set in gdb remote. Currently we send register set 0 as expedited register set but for the case of AArch64 SVE we intend to send additional information about SVE registers size/offset configuration which can be calculated from vg register. Therefore we will expedited Vg register in case of AArch64 is in SVE mode to speedup register configuration calculations. Reviewed By: labath Differential Revision: https://reviews.llvm.org/D82853 Added: Modified: lldb/include/lldb/Host/common/NativeRegisterContext.h lldb/source/Host/common/NativeRegisterContext.cpp lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp Removed: diff --git a/lldb/include/lldb/Host/common/NativeRegisterContext.h b/lldb/include/lldb/Host/common/NativeRegisterContext.h index 3480d5d59217..a8c74358c718 100644 --- a/lldb/include/lldb/Host/common/NativeRegisterContext.h +++ b/lldb/include/lldb/Host/common/NativeRegisterContext.h @@ -16,6 +16,8 @@ namespace lldb_private { class NativeThreadProtocol; +enum class ExpeditedRegs { Minimal, Full }; + class NativeRegisterContext : public std::enable_shared_from_this { public: @@ -116,6 +118,9 @@ class NativeRegisterContext virtual NativeThreadProtocol &GetThread() { return m_thread; } + virtual std::vector + GetExpeditedRegisters(ExpeditedRegs expType) const; + const RegisterInfo *GetRegisterInfoByName(llvm::StringRef reg_name, uint32_t start_idx = 0); diff --git a/lldb/source/Host/common/NativeRegisterContext.cpp b/lldb/source/Host/common/NativeRegisterContext.cpp index f6d16dcf2551..9bb877fff878 100644 --- a/lldb/source/Host/common/NativeRegisterContext.cpp +++ b/lldb/source/Host/common/NativeRegisterContext.cpp @@ -424,3 +424,32 @@ NativeRegisterContext::ConvertRegisterKindToRegisterNumber(uint32_t kind, return LLDB_INVALID_REGNUM; } + +std::vector +NativeRegisterContext::GetExpeditedRegisters(ExpeditedRegs expType) const { + if (expType == ExpeditedRegs::Minimal) { +// Expedite only a minimum set of important generic registers. +static const uint32_t k_expedited_registers[] = { +LLDB_REGNUM_GENERIC_PC, LLDB_REGNUM_GENERIC_SP, LLDB_REGNUM_GENERIC_FP, +LLDB_REGNUM_GENERIC_RA}; + +std::vector expedited_reg_nums; +for (uint32_t gen_reg : k_expedited_registers) { + uint32_t reg_num = + ConvertRegisterKindToRegisterNumber(eRegisterKindGeneric, gen_reg); + if (reg_num == LLDB_INVALID_REGNUM) +continue; // Target does not support the given register. + else +expedited_reg_nums.push_back(reg_num); +} + +return expedited_reg_nums; + } + + if (GetRegisterSetCount() > 0 && expType == ExpeditedRegs::Full) +return std::vector(GetRegisterSet(0)->registers, + GetRegisterSet(0)->registers + + GetRegisterSet(0)->num_registers); + + return std::vector(); +} diff --git a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp index 2cf88c0d9f70..694c88c49eba 100644 --- a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp +++ b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp @@ -503,7 +503,7 @@ static void WriteRegisterValueInHexFixedWidth( } } -static llvm::Expected +static llvm::Optional GetRegistersAsJSON(NativeThreadProtocol &thread) { Log *log(GetLogIfAnyCategoriesSet(LIBLLDB_LOG_THREAD)); @@ -512,30 +512,16 @@ GetRegistersAsJSON(NativeThreadProtocol &thread) { json::Object register_object; #ifdef LLDB_JTHREADSINFO_FULL_REGISTER_SET - // Expedite all registers in the first register set (i.e. should be GPRs) - // that are not contained in other registers. - const RegisterSet *reg_set_p = reg_ctx_sp->GetRegisterSet(0); - if (!reg_set_p) -return llvm::make_error("failed to get registers", - llvm::inconvertibleErrorCode()); - for (const uint32_t *reg_num_p = reg_set_p->registers; - *reg_num_p != LLDB_INVALID_REGNUM; ++reg_num_p) { -uint32_t reg_num = *reg_num_p; + const auto expedited_regs = + reg_ctx.GetExpeditedRegisters(ExpeditedRegs::Full); #else - // Expedite only a couple of registers until we figure out why sending - // registers is expensive. - static const uint32_t k_exped
[llvm-branch-commits] [lldb] 4e8aeb9 - Send SVE vg register in custom expedited registerset
Author: Muhammad Omair Javaid Date: 2020-11-30T17:34:19+05:00 New Revision: 4e8aeb97ca41eb202c9c90a9c640a630903c769b URL: https://github.com/llvm/llvm-project/commit/4e8aeb97ca41eb202c9c90a9c640a630903c769b DIFF: https://github.com/llvm/llvm-project/commit/4e8aeb97ca41eb202c9c90a9c640a630903c769b.diff LOG: Send SVE vg register in custom expedited registerset This patch ovverides GetExpeditedRegisterSet for NativeRegisterContextLinux_arm64 to send vector granule register in expedited register set if SVE mode is selected. Reviewed By: labath Differential Revision: https://reviews.llvm.org/D82855 Added: Modified: lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h lldb/test/API/tools/lldb-server/TestGdbRemoteExpeditedRegisters.py Removed: diff --git a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py index ce700d9403f4..a1c420d1fa03 100644 --- a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py +++ b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py @@ -992,6 +992,13 @@ def find_generic_register_with_name(self, reg_infos, generic_name): return reg_info return None +def find_register_with_name_and_dwarf_regnum(self, reg_infos, name, dwarf_num): +self.assertIsNotNone(reg_infos) +for reg_info in reg_infos: +if (reg_info["name"] == name) and (reg_info["dwarf"] == dwarf_num): +return reg_info +return None + def decode_gdbremote_binary(self, encoded_bytes): decoded_bytes = "" i = 0 diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp index 1fa87e13a0aa..49badd8ef940 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp @@ -1125,4 +1125,14 @@ void *NativeRegisterContextLinux_arm64::GetSVEBuffer() { return m_sve_ptrace_payload.data(); } +std::vector NativeRegisterContextLinux_arm64::GetExpeditedRegisters( +ExpeditedRegs expType) const { + std::vector expedited_reg_nums = + NativeRegisterContext::GetExpeditedRegisters(expType); + if (m_sve_state == SVEState::FPSIMD || m_sve_state == SVEState::Full) +expedited_reg_nums.push_back(GetRegisterInfo().GetRegNumSVEVG()); + + return expedited_reg_nums; +} + #endif // defined (__arm64__) || defined (__aarch64__) diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h index da45f1c2d2c3..3d0656dceb62 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h @@ -44,6 +44,9 @@ class NativeRegisterContextLinux_arm64 : public NativeRegisterContextLinux { void InvalidateAllRegisters() override; + std::vector + GetExpeditedRegisters(ExpeditedRegs expType) const override; + // Hardware breakpoints/watchpoint management functions uint32_t NumSupportedHardwareBreakpoints() override; diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp index 701c88c31258..515c9f44e1e2 100644 --- a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp +++ b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp @@ -342,3 +342,5 @@ uint32_t RegisterInfoPOSIX_arm64::GetRegNumSVEFFR() const { return sve_ffr; } uint32_t RegisterInfoPOSIX_arm64::GetRegNumFPCR() const { return fpu_fpcr; } uint32_t RegisterInfoPOSIX_arm64::GetRegNumFPSR() const { return fpu_fpsr; } + +uint32_t RegisterInfoPOSIX_arm64::GetRegNumSVEVG() const { return sve_vg; } diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h index d5eaf4cfbe9e..37f7c23b62c5 100644 --- a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h +++ b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h @@ -101,6 +101,7 @@ class RegisterInfoPOSIX_arm64 uint32_t GetRegNumSVEFFR() const; uint32_t GetRegNumFPCR() const; uint32_t GetRegNumFPSR() const; + uint32_t GetRegNumSVEVG() const; private: typedef std::map> diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteExpeditedRegisters.py b/lldb/test/AP
[llvm-branch-commits] [llvm] 13c42f4 - [gn build] Manually sync 8da7efb and cac5be4
Author: Hans Wennborg Date: 2020-11-30T13:37:45+01:00 New Revision: 13c42f4ca7fbe36257d192da02ec46a2c880d938 URL: https://github.com/llvm/llvm-project/commit/13c42f4ca7fbe36257d192da02ec46a2c880d938 DIFF: https://github.com/llvm/llvm-project/commit/13c42f4ca7fbe36257d192da02ec46a2c880d938.diff LOG: [gn build] Manually sync 8da7efb and cac5be4 This adds the clang-tidy concurrency module to the gn build. Added: llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/concurrency/BUILD.gn Modified: llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/BUILD.gn Removed: diff --git a/llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/BUILD.gn b/llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/BUILD.gn index 69217b702a60..cd65d60831cc 100644 --- a/llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/BUILD.gn +++ b/llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/BUILD.gn @@ -70,6 +70,7 @@ group("all-checks") { "//clang-tools-extra/clang-tidy/boost", "//clang-tools-extra/clang-tidy/bugprone", "//clang-tools-extra/clang-tidy/cert", +"//clang-tools-extra/clang-tidy/concurrency", "//clang-tools-extra/clang-tidy/cppcoreguidelines", "//clang-tools-extra/clang-tidy/darwin", "//clang-tools-extra/clang-tidy/fuchsia", diff --git a/llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/concurrency/BUILD.gn b/llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/concurrency/BUILD.gn new file mode 100644 index ..ccded31b2732 --- /dev/null +++ b/llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/concurrency/BUILD.gn @@ -0,0 +1,19 @@ +static_library("concurrency") { + output_name = "clangTidyConcurrencyModule" + configs += [ "//llvm/utils/gn/build:clang_code" ] + deps = [ +"//clang-tools-extra/clang-tidy", +"//clang-tools-extra/clang-tidy/utils", +"//clang/lib/Analysis", +"//clang/lib/AST", +"//clang/lib/ASTMatchers", +"//clang/lib/Basic", +"//clang/lib/Lex", +"//clang/lib/Serialization", +"//clang/lib/Tooling", + ] + sources = [ +"ConcurrencyTidyModule.cpp", +"MtUnsafeCheck.cpp", + ] +} ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] c2ead57 - [llvm-objdump] Document --mattr=help in --help output
Author: David Spickett Date: 2020-11-30T12:52:54Z New Revision: c2ead57ccf74900901fdda1cd0fbe9a7a0d1297a URL: https://github.com/llvm/llvm-project/commit/c2ead57ccf74900901fdda1cd0fbe9a7a0d1297a DIFF: https://github.com/llvm/llvm-project/commit/c2ead57ccf74900901fdda1cd0fbe9a7a0d1297a.diff LOG: [llvm-objdump] Document --mattr=help in --help output This does the same as `--mcpu=help` but was only documented in the user guide. * Added a test for both options. * Corrected the single dash in `-mcpu=help` text. Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D92305 Added: llvm/test/tools/llvm-objdump/mattr-mcpu-help.test Modified: llvm/docs/CommandGuide/llvm-objdump.rst llvm/tools/llvm-objdump/llvm-objdump.cpp Removed: diff --git a/llvm/docs/CommandGuide/llvm-objdump.rst b/llvm/docs/CommandGuide/llvm-objdump.rst index 4acb04833ab13..1ac7a05cbdb0a 100644 --- a/llvm/docs/CommandGuide/llvm-objdump.rst +++ b/llvm/docs/CommandGuide/llvm-objdump.rst @@ -156,7 +156,7 @@ OPTIONS .. option:: --mattr= - Enable/disable target-specific attributes. Specify ``--mcpu=help`` to display + Enable/disable target-specific attributes. Specify ``--mattr=help`` to display the available attributes. .. option:: --no-leading-addr diff --git a/llvm/test/tools/llvm-objdump/mattr-mcpu-help.test b/llvm/test/tools/llvm-objdump/mattr-mcpu-help.test new file mode 100644 index 0..4c3198b0fbfed --- /dev/null +++ b/llvm/test/tools/llvm-objdump/mattr-mcpu-help.test @@ -0,0 +1,15 @@ +# RUN: yaml2obj %s -o %t +# RUN: llvm-objdump -d %t --mattr=help 2>&1 | FileCheck %s +# RUN: llvm-objdump -d %t --mcpu=help 2>&1 | FileCheck %s + +# CHECK: Available CPUs for this target: +# CHECK: Available features for this target: +## To check we still disassemble the file: +# CHECK: file format elf64-x86-64 + +--- !ELF +FileHeader: + Class: ELFCLASS64 + Data:ELFDATA2LSB + Type:ET_EXEC + Machine: EM_X86_64 diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp index bc13b26b797d8..bb33d254370e6 100644 --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -226,13 +226,13 @@ static cl::alias MachOm("m", cl::desc("Alias for --macho"), cl::NotHidden, cl::Grouping, cl::aliasopt(MachOOpt)); cl::opt objdump::MCPU( -"mcpu", cl::desc("Target a specific cpu type (-mcpu=help for details)"), +"mcpu", cl::desc("Target a specific cpu type (--mcpu=help for details)"), cl::value_desc("cpu-name"), cl::init(""), cl::cat(ObjdumpCat)); -cl::list objdump::MAttrs("mattr", cl::CommaSeparated, - cl::desc("Target specific attributes"), - cl::value_desc("a1,+a2,-a3,..."), - cl::cat(ObjdumpCat)); +cl::list objdump::MAttrs( +"mattr", cl::CommaSeparated, +cl::desc("Target specific attributes (--mattr=help for details)"), +cl::value_desc("a1,+a2,-a3,..."), cl::cat(ObjdumpCat)); cl::opt objdump::NoShowRawInsn( "no-show-raw-insn", ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 33eac0f - [VE] Specify vector alignments
Author: Kazushi (Jam) Marukawa Date: 2020-11-30T22:09:21+09:00 New Revision: 33eac0f2830ee3f362ec0207a3d0e5f0861de8f1 URL: https://github.com/llvm/llvm-project/commit/33eac0f2830ee3f362ec0207a3d0e5f0861de8f1 DIFF: https://github.com/llvm/llvm-project/commit/33eac0f2830ee3f362ec0207a3d0e5f0861de8f1.diff LOG: [VE] Specify vector alignments Specify alignments for all vector types. Update a regression test also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D92256 Added: Modified: clang/lib/Basic/Targets/VE.h clang/test/CodeGen/target-data.c llvm/lib/Target/VE/VETargetMachine.cpp Removed: diff --git a/clang/lib/Basic/Targets/VE.h b/clang/lib/Basic/Targets/VE.h index b8143747a38d..2d9c74ac5247 100644 --- a/clang/lib/Basic/Targets/VE.h +++ b/clang/lib/Basic/Targets/VE.h @@ -45,7 +45,9 @@ class LLVM_LIBRARY_VISIBILITY VETargetInfo : public TargetInfo { WCharType = UnsignedInt; WIntType = UnsignedInt; UseZeroLengthBitfieldAlignment = true; -resetDataLayout("e-m:e-i64:64-n32:64-S128"); +resetDataLayout( +"e-m:e-i64:64-n32:64-S128-v64:64:64-v128:64:64-v256:64:64-v512:64:64-" +"v1024:64:64-v2048:64:64-v4096:64:64-v8192:64:64-v16384:64:64"); } void getTargetDefines(const LangOptions &Opts, diff --git a/clang/test/CodeGen/target-data.c b/clang/test/CodeGen/target-data.c index 82a0a867526b..1d7ed500340c 100644 --- a/clang/test/CodeGen/target-data.c +++ b/clang/test/CodeGen/target-data.c @@ -281,4 +281,4 @@ // RUN: %clang_cc1 -triple ve -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=VE -// VE: target datalayout = "e-m:e-i64:64-n32:64-S128" +// VE: target datalayout = "e-m:e-i64:64-n32:64-S128-v64:64:64-v128:64:64-v256:64:64-v512:64:64-v1024:64:64-v2048:64:64-v4096:64:64-v8192:64:64-v16384:64:64" diff --git a/llvm/lib/Target/VE/VETargetMachine.cpp b/llvm/lib/Target/VE/VETargetMachine.cpp index 12c4f4628811..1077abc54141 100644 --- a/llvm/lib/Target/VE/VETargetMachine.cpp +++ b/llvm/lib/Target/VE/VETargetMachine.cpp @@ -44,6 +44,19 @@ static std::string computeDataLayout(const Triple &T) { // Stack alignment is 128 bits Ret += "-S128"; + // Vector alignments are 64 bits + // Need to define all of them. Otherwise, each alignment becomes + // the size of each data by default. + Ret += "-v64:64:64"; // for v2f32 + Ret += "-v128:64:64"; + Ret += "-v256:64:64"; + Ret += "-v512:64:64"; + Ret += "-v1024:64:64"; + Ret += "-v2048:64:64"; + Ret += "-v4096:64:64"; + Ret += "-v8192:64:64"; + Ret += "-v16384:64:64"; // for v256f64 + return Ret; } ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] fe83adb - [VPlan] Use VPUser to manage VPPredInstPHIRecipe operand (NFC).
Author: Florian Hahn Date: 2020-11-30T13:09:58Z New Revision: fe83adb05a8a35835ccc5645fe41c4c82a439cba URL: https://github.com/llvm/llvm-project/commit/fe83adb05a8a35835ccc5645fe41c4c82a439cba DIFF: https://github.com/llvm/llvm-project/commit/fe83adb05a8a35835ccc5645fe41c4c82a439cba.diff LOG: [VPlan] Use VPUser to manage VPPredInstPHIRecipe operand (NFC). VPPredInstPHIRecipe is one of the recipes that was missed during the initial conversion. This patch adjusts the recipe to also manage its operand using VPUser. Added: Modified: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp llvm/lib/Transforms/Vectorize/VPlan.cpp llvm/lib/Transforms/Vectorize/VPlan.h llvm/lib/Transforms/Vectorize/VPlanValue.h llvm/test/Transforms/LoopVectorize/vplan-printing.ll Removed: diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp index 517d754b4ea6..ce4f57fb3945 100644 --- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp +++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp @@ -7593,8 +7593,9 @@ VPRegionBlock *VPRecipeBuilder::createReplicateRegion(Instruction *Instr, assert(Instr->getParent() && "Predicated instruction not in any basic block"); auto *BOMRecipe = new VPBranchOnMaskRecipe(BlockInMask); auto *Entry = new VPBasicBlock(Twine(RegionName) + ".entry", BOMRecipe); - auto *PHIRecipe = - Instr->getType()->isVoidTy() ? nullptr : new VPPredInstPHIRecipe(Instr); + auto *PHIRecipe = Instr->getType()->isVoidTy() +? nullptr +: new VPPredInstPHIRecipe(Plan->getOrAddVPValue(Instr)); auto *Exit = new VPBasicBlock(Twine(RegionName) + ".continue", PHIRecipe); auto *Pred = new VPBasicBlock(Twine(RegionName) + ".if", PredRecipe); VPRegionBlock *Region = new VPRegionBlock(Entry, Exit, RegionName, true); @@ -8169,8 +8170,8 @@ void VPBranchOnMaskRecipe::execute(VPTransformState &State) { void VPPredInstPHIRecipe::execute(VPTransformState &State) { assert(State.Instance && "Predicated instruction PHI works per instance."); - Instruction *ScalarPredInst = cast( - State.ValueMap.getScalarValue(PredInst, *State.Instance)); + Instruction *ScalarPredInst = + cast(State.get(getOperand(0), *State.Instance)); BasicBlock *PredicatedBB = ScalarPredInst->getParent(); BasicBlock *PredicatingBB = PredicatedBB->getSinglePredecessor(); assert(PredicatingBB && "Predicated block has no single predecessor."); @@ -8182,6 +8183,8 @@ void VPPredInstPHIRecipe::execute(VPTransformState &State) { // also do that packing, thereby "hoisting" the insert-element sequence. // Otherwise, a phi node for the scalar value is needed. unsigned Part = State.Instance->Part; + Instruction *PredInst = + cast(getOperand(0)->getUnderlyingValue()); if (State.ValueMap.hasVectorValue(PredInst, Part)) { Value *VectorValue = State.ValueMap.getVectorValue(PredInst, Part); InsertElementInst *IEI = cast(VectorValue); diff --git a/llvm/lib/Transforms/Vectorize/VPlan.cpp b/llvm/lib/Transforms/Vectorize/VPlan.cpp index c51ed5e3e7db..7cc5291a35f9 100644 --- a/llvm/lib/Transforms/Vectorize/VPlan.cpp +++ b/llvm/lib/Transforms/Vectorize/VPlan.cpp @@ -113,6 +113,8 @@ VPUser *VPRecipeBase::toVPUser() { return U; if (auto *U = dyn_cast(this)) return U; + if (auto *U = dyn_cast(this)) +return U; return nullptr; } @@ -981,7 +983,8 @@ void VPReplicateRecipe::print(raw_ostream &O, const Twine &Indent, void VPPredInstPHIRecipe::print(raw_ostream &O, const Twine &Indent, VPSlotTracker &SlotTracker) const { - O << "\"PHI-PREDICATED-INSTRUCTION " << VPlanIngredient(PredInst); + O << "\"PHI-PREDICATED-INSTRUCTION "; + printOperands(O, SlotTracker); } void VPWidenMemoryInstructionRecipe::print(raw_ostream &O, const Twine &Indent, diff --git a/llvm/lib/Transforms/Vectorize/VPlan.h b/llvm/lib/Transforms/Vectorize/VPlan.h index 4abb08809da5..1dd81fa30af3 100644 --- a/llvm/lib/Transforms/Vectorize/VPlan.h +++ b/llvm/lib/Transforms/Vectorize/VPlan.h @@ -1237,14 +1237,13 @@ class VPBranchOnMaskRecipe : public VPRecipeBase, public VPUser { /// order to merge values that are set under such a branch and feed their uses. /// The phi nodes can be scalar or vector depending on the users of the value. /// This recipe works in concert with VPBranchOnMaskRecipe. -class VPPredInstPHIRecipe : public VPRecipeBase { - Instruction *PredInst; +class VPPredInstPHIRecipe : public VPRecipeBase, public VPUser { public: /// Construct a VPPredInstPHIRecipe given \p PredInst whose value needs a phi /// nodes after merging back from a Branch-on-Mask. - VPPredInstPHIRecipe(Instruction *PredInst) - : VPRecipeBase(VPPredInstPHISC), PredInst(PredInst) {} + VPPredInstPHIRecipe(VPValue *PredV) + : VPRecipeBase(VPPredInstPHISC), V
[llvm-branch-commits] [llvm] 44a679e - [VE] Change the behaviour of truncate
Author: Kazushi (Jam) Marukawa Date: 2020-11-30T22:12:45+09:00 New Revision: 44a679eaa40cf234c79c241012607ed5f7bada77 URL: https://github.com/llvm/llvm-project/commit/44a679eaa40cf234c79c241012607ed5f7bada77 DIFF: https://github.com/llvm/llvm-project/commit/44a679eaa40cf234c79c241012607ed5f7bada77.diff LOG: [VE] Change the behaviour of truncate Change the way to truncate i64 to i32 in I64 registers. VE assumed sext values previously. Change it to zext values this time to make it match to the LLVM behaviour. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D92226 Added: Modified: llvm/lib/Target/VE/VEInstrInfo.td llvm/test/CodeGen/VE/Scalar/br_jt.ll llvm/test/CodeGen/VE/Scalar/select.ll llvm/test/CodeGen/VE/Scalar/select_cc.ll llvm/test/CodeGen/VE/VELIntrinsics/lsv.ll llvm/test/CodeGen/VE/VELIntrinsics/lvlgen.ll llvm/test/CodeGen/VE/VELIntrinsics/vbrd.ll llvm/test/CodeGen/VE/Vector/vec_add.ll llvm/test/CodeGen/VE/Vector/vec_broadcast.ll Removed: diff --git a/llvm/lib/Target/VE/VEInstrInfo.td b/llvm/lib/Target/VE/VEInstrInfo.td index 86635adf9ef2..5837267aa63b 100644 --- a/llvm/lib/Target/VE/VEInstrInfo.td +++ b/llvm/lib/Target/VE/VEInstrInfo.td @@ -1656,7 +1656,7 @@ def : Pat<(i32 (and (trunc i64:$src), 0x)), // Cast to i32 def : Pat<(i32 (trunc i64:$src)), - (ADDSWSXrm (EXTRACT_SUBREG $src, sub_i32), 0)>; + (EXTRACT_SUBREG (ANDrm $src, !add(32, 64)), sub_i32)>; def : Pat<(i32 (fp_to_sint f32:$src)), (CVTWSSXr RD_RZ, $src)>; def : Pat<(i32 (fp_to_sint f64:$src)), (CVTWDSXr RD_RZ, $src)>; def : Pat<(i32 (fp_to_sint f128:$src)), (CVTWDSXr RD_RZ, (CVTDQr $src))>; diff --git a/llvm/test/CodeGen/VE/Scalar/br_jt.ll b/llvm/test/CodeGen/VE/Scalar/br_jt.ll index d84e830299ff..88d5378830a1 100644 --- a/llvm/test/CodeGen/VE/Scalar/br_jt.ll +++ b/llvm/test/CodeGen/VE/Scalar/br_jt.ll @@ -10,7 +10,7 @@ define signext i32 @br_jt3(i32 signext %0) { ; CHECK-LABEL: br_jt3: ; CHECK: # %bb.0: -; CHECK-NEXT:adds.w.sx %s0, %s0, (0)1 +; CHECK-NEXT:and %s0, %s0, (32)0 ; CHECK-NEXT:breq.w 1, %s0, .LBB{{[0-9]+}}_1 ; CHECK-NEXT: # %bb.2: ; CHECK-NEXT:breq.w 4, %s0, .LBB{{[0-9]+}}_5 @@ -32,7 +32,7 @@ define signext i32 @br_jt3(i32 signext %0) { ; ; PIC-LABEL: br_jt3: ; PIC: # %bb.0: -; PIC-NEXT:adds.w.sx %s0, %s0, (0)1 +; PIC-NEXT:and %s0, %s0, (32)0 ; PIC-NEXT:breq.w 1, %s0, .LBB0_1 ; PIC-NEXT: # %bb.2: ; PIC-NEXT:breq.w 4, %s0, .LBB0_5 @@ -75,7 +75,7 @@ define signext i32 @br_jt3(i32 signext %0) { define signext i32 @br_jt4(i32 signext %0) { ; CHECK-LABEL: br_jt4: ; CHECK: # %bb.0: -; CHECK-NEXT:adds.w.sx %s0, %s0, (0)1 +; CHECK-NEXT:and %s0, %s0, (32)0 ; CHECK-NEXT:adds.w.sx %s1, -1, %s0 ; CHECK-NEXT:cmpu.w %s2, 3, %s1 ; CHECK-NEXT:brgt.w 0, %s2, .LBB{{[0-9]+}}_2 @@ -93,7 +93,7 @@ define signext i32 @br_jt4(i32 signext %0) { ; ; PIC-LABEL: br_jt4: ; PIC: .LBB{{[0-9]+}}_5: -; PIC-NEXT:adds.w.sx %s0, %s0, (0)1 +; PIC-NEXT:and %s0, %s0, (32)0 ; PIC-NEXT:adds.w.sx %s1, -1, %s0 ; PIC-NEXT:cmpu.w %s2, 3, %s1 ; PIC-NEXT:lea %s15, _GLOBAL_OFFSET_TABLE_@pc_lo(-24) @@ -131,7 +131,7 @@ define signext i32 @br_jt4(i32 signext %0) { define signext i32 @br_jt7(i32 signext %0) { ; CHECK-LABEL: br_jt7: ; CHECK: # %bb.0: -; CHECK-NEXT:adds.w.sx %s0, %s0, (0)1 +; CHECK-NEXT:and %s0, %s0, (32)0 ; CHECK-NEXT:adds.w.sx %s1, -1, %s0 ; CHECK-NEXT:cmpu.w %s2, 8, %s1 ; CHECK-NEXT:brgt.w 0, %s2, .LBB{{[0-9]+}}_3 @@ -156,7 +156,7 @@ define signext i32 @br_jt7(i32 signext %0) { ; ; PIC-LABEL: br_jt7: ; PIC: .LBB{{[0-9]+}}_6: -; PIC-NEXT:adds.w.sx %s0, %s0, (0)1 +; PIC-NEXT:and %s0, %s0, (32)0 ; PIC-NEXT:adds.w.sx %s1, -1, %s0 ; PIC-NEXT:cmpu.w %s2, 8, %s1 ; PIC-NEXT:lea %s15, _GLOBAL_OFFSET_TABLE_@pc_lo(-24) @@ -208,7 +208,7 @@ define signext i32 @br_jt7(i32 signext %0) { define signext i32 @br_jt8(i32 signext %0) { ; CHECK-LABEL: br_jt8: ; CHECK: # %bb.0: -; CHECK-NEXT:adds.w.sx %s0, %s0, (0)1 +; CHECK-NEXT:and %s0, %s0, (32)0 ; CHECK-NEXT:adds.w.sx %s1, -1, %s0 ; CHECK-NEXT:cmpu.w %s2, 8, %s1 ; CHECK-NEXT:brgt.w 0, %s2, .LBB{{[0-9]+}}_3 @@ -233,7 +233,7 @@ define signext i32 @br_jt8(i32 signext %0) { ; ; PIC-LABEL: br_jt8: ; PIC: .LBB{{[0-9]+}}_6: -; PIC-NEXT:adds.w.sx %s0, %s0, (0)1 +; PIC-NEXT:and %s0, %s0, (32)0 ; PIC-NEXT:adds.w.sx %s1, -1, %s0 ; PIC-NEXT:cmpu.w %s2, 8, %s1 ; PIC-NEXT:lea %s15, _GLOBAL_OFFSET_TABLE_@pc_lo(-24) @@ -285,7 +285,7 @@ define signext i32 @br_jt8(i32 signext %0) { define signext i32 @br_jt3_m(i32 signext %0, i32 signext %1) { ; CHECK-LABEL: br_jt3_m: ; CHECK: # %bb.0: -; CHECK-NEXT:adds.w.sx %s0, %s0, (0)1 +; CHECK-NEXT:and %s0, %s0, (32)0 ; CHECK-NEXT:breq.w 1, %s0,
[llvm-branch-commits] [llvm] 273641f - Try to fix bots after 112b3cb by removing cortex-a57-misched-mla.s
Author: Hans Wennborg Date: 2020-11-30T14:15:56+01:00 New Revision: 273641fedc528c3d7ea96020c104a4131e179c62 URL: https://github.com/llvm/llvm-project/commit/273641fedc528c3d7ea96020c104a4131e179c62 DIFF: https://github.com/llvm/llvm-project/commit/273641fedc528c3d7ea96020c104a4131e179c62.diff LOG: Try to fix bots after 112b3cb by removing cortex-a57-misched-mla.s Added: Modified: llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir Removed: diff --git a/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir b/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir index 03241c48045d..c7489ec204c8 100644 --- a/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir +++ b/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir @@ -1,5 +1,8 @@ # RUN: llc -mcpu=cortex-a57 -mtriple=thumb -enable-misched -run-pass=machine-scheduler -debug-only=machine-scheduler %s -o - 2>&1 | FileCheck %s +# TODO: Remove once bots have removed the output file left by 112b3cb +# RUN: rm -f cortex-a57-misched-mla.s + # CHECK-LABEL: ** MI Scheduling ** # CHECK: %[[RES:[0-9]+]]:rgpr = t2MLA # CHECK-NEXT: # preds left ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 686988a - [VE] Optimize prologue/epilogue instructions
Author: Kazushi (Jam) Marukawa Date: 2020-11-30T22:22:33+09:00 New Revision: 686988a50f5009df5a7f184b7debfe012b29bbf8 URL: https://github.com/llvm/llvm-project/commit/686988a50f5009df5a7f184b7debfe012b29bbf8 DIFF: https://github.com/llvm/llvm-project/commit/686988a50f5009df5a7f184b7debfe012b29bbf8.diff LOG: [VE] Optimize prologue/epilogue instructions Optimize eliminate FP mechanism. This time optimize a function which has no call but fixed stack objects. LLVM eliminates FP on such functions now. Also, optimize GOT/PLT registers save/restore instructions if a given function doesn't uses them. In addition, remove generating mechanism of `.cfi` instructions since those are taken from other architectures and not inspected yet. Update regression tests, also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D92251 Added: Modified: llvm/lib/Target/VE/VEFrameLowering.cpp llvm/lib/Target/VE/VEFrameLowering.h llvm/test/CodeGen/VE/Scalar/callee.ll llvm/test/CodeGen/VE/Scalar/fabs.ll llvm/test/CodeGen/VE/Scalar/fcopysign.ll llvm/test/CodeGen/VE/Scalar/fp_fneg.ll llvm/test/CodeGen/VE/Scalar/function_prologue_epilogue.ll llvm/test/CodeGen/VE/Scalar/load-align1.ll llvm/test/CodeGen/VE/Scalar/load-align2.ll llvm/test/CodeGen/VE/Scalar/load-align4.ll llvm/test/CodeGen/VE/Scalar/load-align8.ll llvm/test/CodeGen/VE/Scalar/load.ll llvm/test/CodeGen/VE/Scalar/loadrri.ll llvm/test/CodeGen/VE/Scalar/sext_zext_load.ll llvm/test/CodeGen/VE/Scalar/stackframe_align.ll llvm/test/CodeGen/VE/Scalar/stackframe_call.ll llvm/test/CodeGen/VE/Scalar/stackframe_nocall.ll llvm/test/CodeGen/VE/Scalar/stackframe_size.ll llvm/test/CodeGen/VE/Scalar/store-align1.ll llvm/test/CodeGen/VE/Scalar/store-align2.ll llvm/test/CodeGen/VE/Scalar/store-align4.ll llvm/test/CodeGen/VE/Scalar/store-align8.ll llvm/test/CodeGen/VE/Scalar/store.ll llvm/test/CodeGen/VE/Vector/fastcc_callee.ll Removed: diff --git a/llvm/lib/Target/VE/VEFrameLowering.cpp b/llvm/lib/Target/VE/VEFrameLowering.cpp index 951430be8f61..7042068f1154 100644 --- a/llvm/lib/Target/VE/VEFrameLowering.cpp +++ b/llvm/lib/Target/VE/VEFrameLowering.cpp @@ -137,45 +137,47 @@ void VEFrameLowering::emitPrologueInsns(MachineFunction &MF, MachineBasicBlock::iterator MBBI, uint64_t NumBytes, bool RequireFPUpdate) const { + const VEMachineFunctionInfo *FuncInfo = MF.getInfo(); DebugLoc DL; - const VEInstrInfo &TII = - *static_cast(MF.getSubtarget().getInstrInfo()); + const VEInstrInfo &TII = *STI.getInstrInfo(); // Insert following codes here as prologue // - //st %fp, 0(,%sp) - //st %lr, 8(,%sp) - //st %got, 24(,%sp) - //st %plt, 32(,%sp) - //st %s17, 40(,%sp) iff this function is using s17 as BP - //or %fp, 0, %sp - BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) - .addReg(VE::SX11) - .addImm(0) - .addImm(0) - .addReg(VE::SX9); - BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) - .addReg(VE::SX11) - .addImm(0) - .addImm(8) - .addReg(VE::SX10); - BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) - .addReg(VE::SX11) - .addImm(0) - .addImm(24) - .addReg(VE::SX15); - BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) - .addReg(VE::SX11) - .addImm(0) - .addImm(32) - .addReg(VE::SX16); + //st %fp, 0(, %sp) iff !isLeafProc + //st %lr, 8(, %sp) iff !isLeafProc + //st %got, 24(, %sp) iff hasGOT + //st %plt, 32(, %sp) iff hasGOT + //st %s17, 40(, %sp) iff hasBP + if (!FuncInfo->isLeafProc()) { +BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) +.addReg(VE::SX11) +.addImm(0) +.addImm(0) +.addReg(VE::SX9); +BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) +.addReg(VE::SX11) +.addImm(0) +.addImm(8) +.addReg(VE::SX10); + } + if (hasGOT(MF)) { +BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) +.addReg(VE::SX11) +.addImm(0) +.addImm(24) +.addReg(VE::SX15); +BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) +.addReg(VE::SX11) +.addImm(0) +.addImm(32) +.addReg(VE::SX16); + } if (hasBP(MF)) BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) .addReg(VE::SX11) .addImm(0) .addImm(40) .addReg(VE::SX17); - BuildMI(MBB, MBBI, DL, TII.get(VE::ORri), VE::SX9).addReg(VE::SX11).addImm(0); } void VEFrameLowering::emitEpilogueInsns(MachineFunction &MF, @@ -183,40 +185,42 @@ void VEFrameLowering::emitEpilogueInsns(MachineFunction &MF, MachineBasicBlock::iterator MBBI, uint64_t NumBytes,
[llvm-branch-commits] [lld] d20abb1 - [mac/lld] Add support for response files
Author: Nico Weber Date: 2020-11-30T08:23:58-05:00 New Revision: d20abb1ec3b6ff90cc4221e6a5865ae22fa2f5e9 URL: https://github.com/llvm/llvm-project/commit/d20abb1ec3b6ff90cc4221e6a5865ae22fa2f5e9 DIFF: https://github.com/llvm/llvm-project/commit/d20abb1ec3b6ff90cc4221e6a5865ae22fa2f5e9.diff LOG: [mac/lld] Add support for response files ld64 learned about them in Xcode 12, so we should too. Differential Revision: https://reviews.llvm.org/D92149 Added: lld/test/MachO/responsefile.test Modified: lld/MachO/DriverUtils.cpp Removed: diff --git a/lld/MachO/DriverUtils.cpp b/lld/MachO/DriverUtils.cpp index 0322c20fcb69..d17a8215f6a3 100644 --- a/lld/MachO/DriverUtils.cpp +++ b/lld/MachO/DriverUtils.cpp @@ -14,6 +14,7 @@ #include "llvm/Option/Arg.h" #include "llvm/Option/ArgList.h" #include "llvm/Option/Option.h" +#include "llvm/Support/CommandLine.h" #include "llvm/Support/Path.h" #include "llvm/TextAPI/MachO/TextAPIReader.h" @@ -68,6 +69,9 @@ opt::InputArgList MachOOptTable::parse(ArrayRef argv) { unsigned missingCount; SmallVector vec(argv.data(), argv.data() + argv.size()); + // Expand response files (arguments in the form of @) + // and then parse the argument again. + cl::ExpandResponseFiles(saver, cl::TokenizeGNUCommandLine, vec); opt::InputArgList args = ParseArgs(vec, missingIndex, missingCount); if (missingCount) diff --git a/lld/test/MachO/responsefile.test b/lld/test/MachO/responsefile.test new file mode 100644 index ..1db3ae93e720 --- /dev/null +++ b/lld/test/MachO/responsefile.test @@ -0,0 +1,4 @@ +# RUN: echo --help > %t.rsp + +# RUN: %lld @%t.rsp | FileCheck %s +CHECK: OVERVIEW: LLVM Linker ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 25d54ab - Try harder to get rid off cortex-a57-misched-mla.s
Author: Hans Wennborg Date: 2020-11-30T14:30:50+01:00 New Revision: 25d54abca59bcfb6f11e895d744240f09a344018 URL: https://github.com/llvm/llvm-project/commit/25d54abca59bcfb6f11e895d744240f09a344018 DIFF: https://github.com/llvm/llvm-project/commit/25d54abca59bcfb6f11e895d744240f09a344018.diff LOG: Try harder to get rid off cortex-a57-misched-mla.s Added: Modified: llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir Removed: diff --git a/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir b/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir index c7489ec204c8..ed6e47d4bb20 100644 --- a/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir +++ b/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir @@ -1,7 +1,7 @@ # RUN: llc -mcpu=cortex-a57 -mtriple=thumb -enable-misched -run-pass=machine-scheduler -debug-only=machine-scheduler %s -o - 2>&1 | FileCheck %s # TODO: Remove once bots have removed the output file left by 112b3cb -# RUN: rm -f cortex-a57-misched-mla.s +# RUN: rm -f %S/cortex-a57-misched-mla.s # CHECK-LABEL: ** MI Scheduling ** # CHECK: %[[RES:[0-9]+]]:rgpr = t2MLA ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] 83e60f5 - [lld/mac] Add --reproduce option
Author: Nico Weber Date: 2020-11-30T08:40:21-05:00 New Revision: 83e60f5a554d2f531b17875e835eab0cbb487211 URL: https://github.com/llvm/llvm-project/commit/83e60f5a554d2f531b17875e835eab0cbb487211 DIFF: https://github.com/llvm/llvm-project/commit/83e60f5a554d2f531b17875e835eab0cbb487211.diff LOG: [lld/mac] Add --reproduce option This adds support for ld.lld's --reproduce / lld-link's /reproduce: flag to the MachO port. This flag can be added to a link command to make the link write a tar file containing all inputs to the link and a response file containing the link command. This can be used to reproduce the link on another machine, which is useful for sharing bug report inputs or performance test loads. Since the linker is usually called through the clang driver and adding linker flags can be a bit cumbersome, setting the env var `LLD_REPRODUCE=foo.tar` triggers the feature as well. The file response.txt in the archive can be used with `ld64.lld.darwinnew $(cat response.txt)` as long as the contents are smaller than the command-line limit, or with `ld64.lld.darwinnew @response.txt` once D92149 is in. The support in this patch is sufficient to create a tar file for Chromium's base_unittests that can link after unpacking on a different machine. Differential Revision: https://reviews.llvm.org/D92274 Added: lld/test/MachO/reproduce.s Modified: lld/Common/Reproduce.cpp lld/ELF/DriverUtils.cpp lld/MachO/Driver.cpp lld/MachO/Driver.h lld/MachO/DriverUtils.cpp lld/MachO/InputFiles.cpp lld/MachO/InputFiles.h lld/MachO/Options.td Removed: diff --git a/lld/Common/Reproduce.cpp b/lld/Common/Reproduce.cpp index 00309f58b93f..017f53df05a4 100644 --- a/lld/Common/Reproduce.cpp +++ b/lld/Common/Reproduce.cpp @@ -54,7 +54,12 @@ std::string lld::toString(const opt::Arg &arg) { std::string k = std::string(arg.getSpelling()); if (arg.getNumValues() == 0) return k; - std::string v = quote(arg.getValue()); + std::string v; + for (size_t i = 0; i < arg.getNumValues(); ++i) { +if (i > 0) + v.push_back(' '); +v += quote(arg.getValue(i)); + } if (arg.getOption().getRenderStyle() == opt::Option::RenderJoinedStyle) return k + v; return k + " " + v; diff --git a/lld/ELF/DriverUtils.cpp b/lld/ELF/DriverUtils.cpp index 8ce9853c57af..2efd92a3df76 100644 --- a/lld/ELF/DriverUtils.cpp +++ b/lld/ELF/DriverUtils.cpp @@ -184,7 +184,7 @@ std::string elf::createResponseFile(const opt::InputArgList &args) { // fail because the archive we are creating doesn't contain empty // directories for the output path (-o doesn't create directories). // Strip directories to prevent the issue. - os << "-o " << quote(sys::path::filename(arg->getValue())) << "\n"; + os << "-o " << quote(path::filename(arg->getValue())) << "\n"; break; case OPT_dynamic_list: case OPT_library_path: diff --git a/lld/MachO/Driver.cpp b/lld/MachO/Driver.cpp index 0f5da218e80d..3de92f510b30 100644 --- a/lld/MachO/Driver.cpp +++ b/lld/MachO/Driver.cpp @@ -37,6 +37,7 @@ #include "llvm/Support/Host.h" #include "llvm/Support/MemoryBuffer.h" #include "llvm/Support/Path.h" +#include "llvm/Support/TarWriter.h" #include "llvm/Support/TargetSelect.h" #include @@ -548,6 +549,12 @@ static void warnIfUnimplementedOption(const opt::Option &opt) { } } +static const char *getReproduceOption(opt::InputArgList &args) { + if (auto *arg = args.getLastArg(OPT_reproduce)) +return arg->getValue(); + return getenv("LLD_REPRODUCE"); +} + bool macho::link(llvm::ArrayRef argsArr, bool canExitEarly, raw_ostream &stdoutOS, raw_ostream &stderrOS) { lld::stdoutOS = &stdoutOS; @@ -569,6 +576,20 @@ bool macho::link(llvm::ArrayRef argsArr, bool canExitEarly, return true; } + if (const char *path = getReproduceOption(args)) { +// Note that --reproduce is a debug option so you can ignore it +// if you are trying to understand the whole picture of the code. +Expected> errOrWriter = +TarWriter::create(path, path::stem(path)); +if (errOrWriter) { + tar = std::move(*errOrWriter); + tar->append("response.txt", createResponseFile(args)); + tar->append("version.txt", getLLDVersion() + "\n"); +} else { + error("--reproduce: " + toString(errOrWriter.takeError())); +} + } + config = make(); symtab = make(); target = createTargetInfo(args); diff --git a/lld/MachO/Driver.h b/lld/MachO/Driver.h index 9db628c86de2..c06d2f9d1b3d 100644 --- a/lld/MachO/Driver.h +++ b/lld/MachO/Driver.h @@ -35,6 +35,8 @@ enum { #undef OPTION }; +std::string createResponseFile(const llvm::opt::InputArgList &args); + // Check for both libfoo.dylib and libfoo.tbd (in that order). llvm::Optional resolveDylibPath(llvm::StringRef path); diff --git a/lld/MachO/DriverUtils.cpp b/lld/MachO/DriverUtils.cpp
[llvm-branch-commits] [llvm] 9c2b295 - [InstCombine][X86] Add addsub tests showing failure to simplify demandedelts (PR46277)
Author: Simon Pilgrim Date: 2020-11-30T13:40:51Z New Revision: 9c2b2952e422ba71c2afa9f6bb63ebf69fa5b702 URL: https://github.com/llvm/llvm-project/commit/9c2b2952e422ba71c2afa9f6bb63ebf69fa5b702 DIFF: https://github.com/llvm/llvm-project/commit/9c2b2952e422ba71c2afa9f6bb63ebf69fa5b702.diff LOG: [InstCombine][X86] Add addsub tests showing failure to simplify demandedelts (PR46277) Added: llvm/test/Transforms/InstCombine/X86/x86-addsub.ll Modified: Removed: diff --git a/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll b/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll new file mode 100644 index ..67657354f599 --- /dev/null +++ b/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll @@ -0,0 +1,85 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s + +declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) +declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) +declare <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double>, <4 x double>) +declare <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float>, <8 x float>) + +; +; Demanded Elts +; + + +define double @elts_addsub_v2f64(<2 x double> %0, <2 x double> %1) { +; CHECK-LABEL: @elts_addsub_v2f64( +; CHECK-NEXT:[[TMP3:%.*]] = shufflevector <2 x double> [[TMP0:%.*]], <2 x double> undef, <2 x i32> zeroinitializer +; CHECK-NEXT:[[TMP4:%.*]] = shufflevector <2 x double> [[TMP1:%.*]], <2 x double> undef, <2 x i32> zeroinitializer +; CHECK-NEXT:[[TMP5:%.*]] = tail call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> [[TMP3]], <2 x double> [[TMP4]]) +; CHECK-NEXT:[[TMP6:%.*]] = extractelement <2 x double> [[TMP5]], i32 0 +; CHECK-NEXT:ret double [[TMP6]] +; + %3 = shufflevector <2 x double> %0, <2 x double> undef, <2 x i32> + %4 = shufflevector <2 x double> %1, <2 x double> undef, <2 x i32> + %5 = tail call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %3, <2 x double> %4) + %6 = extractelement <2 x double> %5, i32 0 + ret double %6 +} + +define float @elts_addsub_v4f32(<4 x float> %0, <4 x float> %1) { +; CHECK-LABEL: @elts_addsub_v4f32( +; CHECK-NEXT:[[TMP3:%.*]] = shufflevector <4 x float> [[TMP0:%.*]], <4 x float> undef, <4 x i32> +; CHECK-NEXT:[[TMP4:%.*]] = shufflevector <4 x float> [[TMP1:%.*]], <4 x float> undef, <4 x i32> +; CHECK-NEXT:[[TMP5:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP3]], <4 x float> [[TMP4]]) +; CHECK-NEXT:[[TMP6:%.*]] = shufflevector <4 x float> [[TMP5]], <4 x float> undef, <4 x i32> +; CHECK-NEXT:[[TMP7:%.*]] = fadd <4 x float> [[TMP5]], [[TMP6]] +; CHECK-NEXT:[[TMP8:%.*]] = extractelement <4 x float> [[TMP7]], i32 0 +; CHECK-NEXT:ret float [[TMP8]] +; + %3 = shufflevector <4 x float> %0, <4 x float> undef, <4 x i32> + %4 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> + %5 = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %3, <4 x float> %4) + %6 = shufflevector <4 x float> %5, <4 x float> undef, <4 x i32> + %7 = fadd <4 x float> %5, %6 + %8 = extractelement <4 x float> %7, i32 0 + ret float %8 +} + +define double @elts_addsub_v4f64(<4 x double> %0, <4 x double> %1) { +; CHECK-LABEL: @elts_addsub_v4f64( +; CHECK-NEXT:[[TMP3:%.*]] = shufflevector <4 x double> [[TMP0:%.*]], <4 x double> undef, <4 x i32> +; CHECK-NEXT:[[TMP4:%.*]] = shufflevector <4 x double> [[TMP1:%.*]], <4 x double> undef, <4 x i32> +; CHECK-NEXT:[[TMP5:%.*]] = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> [[TMP3]], <4 x double> [[TMP4]]) +; CHECK-NEXT:[[TMP6:%.*]] = extractelement <4 x double> [[TMP5]], i32 0 +; CHECK-NEXT:[[TMP7:%.*]] = extractelement <4 x double> [[TMP5]], i32 1 +; CHECK-NEXT:[[TMP8:%.*]] = fadd double [[TMP6]], [[TMP7]] +; CHECK-NEXT:ret double [[TMP8]] +; + %3 = shufflevector <4 x double> %0, <4 x double> undef, <4 x i32> + %4 = shufflevector <4 x double> %1, <4 x double> undef, <4 x i32> + %5 = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> %3, <4 x double> %4) + %6 = extractelement <4 x double> %5, i32 0 + %7 = extractelement <4 x double> %5, i32 1 + %8 = fadd double %6, %7 + ret double %8 +} + +define float @elts_addsub_v8f32(<8 x float> %0, <8 x float> %1) { +; CHECK-LABEL: @elts_addsub_v8f32( +; CHECK-NEXT:[[TMP3:%.*]] = shufflevector <8 x float> [[TMP0:%.*]], <8 x float> undef, <8 x i32> +; CHECK-NEXT:[[TMP4:%.*]] = shufflevector <8 x float> [[TMP1:%.*]], <8 x float> undef, <8 x i32> +; CHECK-NEXT:[[TMP5:%.*]] = tail call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> [[TMP3]], <8 x float> [[TMP4]]) +; CHECK-NEXT:[[TMP6:%.*]] = extractelement <8 x float> [[TMP5]], i32 0 +; CHECK-NEXT:[[TMP7:%.*]] = extractelement <8 x float> [[TMP5]], i32 1 +; CHE
[llvm-branch-commits] [llvm] c3d4846 - [llvm-objdump] Require x86 target for mcpu/attr test
Author: David Spickett Date: 2020-11-30T13:55:31Z New Revision: c3d484673fa70bb4b2284689db76d36bbdf12f38 URL: https://github.com/llvm/llvm-project/commit/c3d484673fa70bb4b2284689db76d36bbdf12f38 DIFF: https://github.com/llvm/llvm-project/commit/c3d484673fa70bb4b2284689db76d36bbdf12f38.diff LOG: [llvm-objdump] Require x86 target for mcpu/attr test This fixes test failure on clang-cmake-armv7-quick bot with change c2ead57ccf74900901fdda1cd0fbe9a7a0d1297a. This bot only builds Arm/AArch64 targets. Added: Modified: llvm/test/tools/llvm-objdump/mattr-mcpu-help.test Removed: diff --git a/llvm/test/tools/llvm-objdump/mattr-mcpu-help.test b/llvm/test/tools/llvm-objdump/mattr-mcpu-help.test index 4c3198b0fbfe..65c426008fd6 100644 --- a/llvm/test/tools/llvm-objdump/mattr-mcpu-help.test +++ b/llvm/test/tools/llvm-objdump/mattr-mcpu-help.test @@ -1,6 +1,7 @@ # RUN: yaml2obj %s -o %t # RUN: llvm-objdump -d %t --mattr=help 2>&1 | FileCheck %s # RUN: llvm-objdump -d %t --mcpu=help 2>&1 | FileCheck %s +# REQUIRES: x86-registered-target # CHECK: Available CPUs for this target: # CHECK: Available features for this target: ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 9c49dcc - [ConstantFold] Don't fold and/or i1 poison to poison (NFC)
Author: Juneyoung Lee Date: 2020-11-30T22:58:31+09:00 New Revision: 9c49dcc356eb4c59fc1353bbbaae6d3a56a656c1 URL: https://github.com/llvm/llvm-project/commit/9c49dcc356eb4c59fc1353bbbaae6d3a56a656c1 DIFF: https://github.com/llvm/llvm-project/commit/9c49dcc356eb4c59fc1353bbbaae6d3a56a656c1.diff LOG: [ConstantFold] Don't fold and/or i1 poison to poison (NFC) .. because it causes miscompilation when combined with select i1 -> and/or. It is the select fold which is incorrect; but it is costly to disable the fold, so hack this one. D92270 Added: Modified: llvm/lib/IR/ConstantFold.cpp llvm/test/Transforms/InstSimplify/ConstProp/poison.ll Removed: diff --git a/llvm/lib/IR/ConstantFold.cpp b/llvm/lib/IR/ConstantFold.cpp index 3243ddd604ee..d9564a31b5de 100644 --- a/llvm/lib/IR/ConstantFold.cpp +++ b/llvm/lib/IR/ConstantFold.cpp @@ -1105,7 +1105,14 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode, Constant *C1, } // Binary operations propagate poison. - if (isa(C1) || isa(C2)) + // FIXME: Currently, or/and i1 poison aren't folded into poison because + // it causes miscompilation when combined with another optimization in + // InstCombine (select i1 -> and/or). The select fold is wrong, but + // fixing it requires an effort, so temporarily disable this until it is + // fixed. + bool PoisonFold = !C1->getType()->isIntegerTy(1) || +(Opcode != Instruction::Or && Opcode != Instruction::And); + if (PoisonFold && (isa(C1) || isa(C2))) return PoisonValue::get(C1->getType()); // Handle scalar UndefValue and scalable vector UndefValue. Fixed-length diff --git a/llvm/test/Transforms/InstSimplify/ConstProp/poison.ll b/llvm/test/Transforms/InstSimplify/ConstProp/poison.ll index 542823a44e2f..f3fe29ff57ba 100644 --- a/llvm/test/Transforms/InstSimplify/ConstProp/poison.ll +++ b/llvm/test/Transforms/InstSimplify/ConstProp/poison.ll @@ -114,3 +114,15 @@ define void @other_ops(i8 %x) { call void (...) @use(i1 %i1, i1 %i2, i8 %i3, i8 %i4, i8* getelementptr (i8, i8* poison, i64 1), i8* getelementptr inbounds (i8, i8* undef, i64 1)) ret void } + +; TODO: these must be folded into poison; D92270 +define void @logicalops_i1(i1 %x) { +; CHECK-LABEL: @logicalops_i1( +; CHECK-NEXT:call void (...) @use(i1 true, i1 false) +; CHECK-NEXT:ret void +; + %i1 = or i1 %x, poison + %i2 = and i1 %x, poison + call void (...) @use(i1 %i1, i1 %i2) + ret void +} ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 8e50461 - [LangRef] missing link, minor fix
Author: Juneyoung Lee Date: 2020-11-30T23:09:36+09:00 New Revision: 8e504615e9f1b27c06237a56ee786a16568851f1 URL: https://github.com/llvm/llvm-project/commit/8e504615e9f1b27c06237a56ee786a16568851f1 DIFF: https://github.com/llvm/llvm-project/commit/8e504615e9f1b27c06237a56ee786a16568851f1.diff LOG: [LangRef] missing link, minor fix Added: Modified: llvm/docs/LangRef.rst Removed: diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst index e359fc730515..1964f2416b8f 100644 --- a/llvm/docs/LangRef.rst +++ b/llvm/docs/LangRef.rst @@ -3667,12 +3667,12 @@ a poison value. Poison value behavior is defined in terms of value *dependence*: -- Values other than :ref:`phi ` nodes and :ref:`select ` - instructions depend on their operands. +- Values other than :ref:`phi ` nodes, :ref:`select `, and + :ref:`freeze ` instructions depend on their operands. - :ref:`Phi ` nodes depend on the operand corresponding to their dynamic predecessor basic block. -- Select instructions depend on their condition operand and their - selected operand. +- :ref:`Select ` instructions depend on their condition operand and + their selected operand. - Function arguments depend on the corresponding actual argument values in the dynamic callers of their functions. - :ref:`Call ` instructions depend on the :ref:`ret ` ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] a0d7406 - [LLDB/Lua] add support for one-liner breakpoint callback
Author: Pedro Tammela Date: 2020-11-30T14:12:26Z New Revision: a0d7406ae800c45dd9cb438c7ae1f55329d198e2 URL: https://github.com/llvm/llvm-project/commit/a0d7406ae800c45dd9cb438c7ae1f55329d198e2 DIFF: https://github.com/llvm/llvm-project/commit/a0d7406ae800c45dd9cb438c7ae1f55329d198e2.diff LOG: [LLDB/Lua] add support for one-liner breakpoint callback These callbacks are set using the following: breakpoint command add -s lua -o "print('hello world!')" The user supplied script is executed as: function (frame, bp_loc, ...) end So the local variables 'frame', 'bp_loc' and vararg are all accessible. Any global variables declared will persist in the Lua interpreter. A user should never hold 'frame' and 'bp_loc' in a global variable as these userdatas are context dependent. Differential Revision: https://reviews.llvm.org/D91508 Added: lldb/bindings/lua/lua-swigsafecast.swig lldb/bindings/lua/lua-wrapper.swig lldb/test/Shell/ScriptInterpreter/Lua/breakpoint_oneline_callback.test Modified: lldb/bindings/lua/lua.swig lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp lldb/source/Plugins/ScriptInterpreter/Lua/Lua.h lldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.cpp lldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.h lldb/unittests/ScriptInterpreter/Lua/LuaTests.cpp Removed: diff --git a/lldb/bindings/lua/lua-swigsafecast.swig b/lldb/bindings/lua/lua-swigsafecast.swig new file mode 100644 index ..d19308976899 --- /dev/null +++ b/lldb/bindings/lua/lua-swigsafecast.swig @@ -0,0 +1,15 @@ +template +void +PushSBClass (lua_State* L, SBClass* obj); + +void +PushSBClass (lua_State* L, lldb::SBFrame* frame_sb) +{ + SWIG_NewPointerObj(L, frame_sb, SWIGTYPE_p_lldb__SBFrame, 0); +} + +void +PushSBClass (lua_State* L, lldb::SBBreakpointLocation* breakpoint_location_sb) +{ + SWIG_NewPointerObj(L, breakpoint_location_sb, SWIGTYPE_p_lldb__SBBreakpointLocation, 0); +} diff --git a/lldb/bindings/lua/lua-wrapper.swig b/lldb/bindings/lua/lua-wrapper.swig new file mode 100644 index ..4e3df74999dc --- /dev/null +++ b/lldb/bindings/lua/lua-wrapper.swig @@ -0,0 +1,46 @@ +%header %{ + +template +void +PushSBClass(lua_State* L, T* obj); + +%} + +%wrapper %{ + +// This function is called from Lua::CallBreakpointCallback +SWIGEXPORT llvm::Expected +LLDBSwigLuaBreakpointCallbackFunction +( + lua_State *L, + lldb::StackFrameSP stop_frame_sp, + lldb::BreakpointLocationSP bp_loc_sp +) +{ + lldb::SBFrame sb_frame(stop_frame_sp); + lldb::SBBreakpointLocation sb_bp_loc(bp_loc_sp); + + // Push the Lua wrappers + PushSBClass(L, &sb_frame); + PushSBClass(L, &sb_bp_loc); + + // Call into the Lua callback passing 'sb_frame' and 'sb_bp_loc'. + // Expects a boolean return. + if (lua_pcall(L, 2, 1, 0) != LUA_OK) { + llvm::Error E = llvm::make_error( +llvm::formatv("{0}\n", lua_tostring(L, -1)), +llvm::inconvertibleErrorCode()); + // Pop error message from the stack. + lua_pop(L, 1); + return std::move(E); + } + + // Boolean return from the callback + bool stop = lua_toboolean(L, -1); + lua_pop(L, 1); + + return stop; +} + + +%} diff --git a/lldb/bindings/lua/lua.swig b/lldb/bindings/lua/lua.swig index 524d1b5a8036..c702e4964081 100644 --- a/lldb/bindings/lua/lua.swig +++ b/lldb/bindings/lua/lua.swig @@ -14,8 +14,12 @@ %include "headers.swig" %{ +#include "llvm/Support/Error.h" +#include "llvm/Support/FormatVariadic.h" +#include "../bindings/lua/lua-swigsafecast.swig" using namespace lldb_private; using namespace lldb; %} %include "interfaces.swig" +%include "lua-wrapper.swig" diff --git a/lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp b/lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp index dc3fd84a3bfb..ca1d181a6940 100644 --- a/lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp +++ b/lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp @@ -9,11 +9,34 @@ #include "Lua.h" #include "lldb/Host/FileSystem.h" #include "lldb/Utility/FileSpec.h" +#include "llvm/Support/Error.h" #include "llvm/Support/FormatVariadic.h" using namespace lldb_private; using namespace lldb; +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wreturn-type-c-linkage" + +// Disable warning C4190: 'LLDBSwigPythonBreakpointCallbackFunction' has +// C-linkage specified, but returns UDT 'llvm::Expected' which is +// incompatible with C +#if _MSC_VER +#pragma warning (push) +#pragma warning (disable : 4190) +#endif + +extern "C" llvm::Expected +LLDBSwigLuaBreakpointCallbackFunction(lua_State *L, + lldb::StackFrameSP stop_frame_sp, + lldb::BreakpointLocationSP bp_loc_sp); + +#if _MSC_VER +#pragma warning (pop) +#endif + +#pragma clang diagnostic pop + static int lldb_print(lua_State *L) { in
[llvm-branch-commits] [llvm] 234a529 - Add 'asserts' requiremnt to test/CodeGen/ARM/cortex-a57-misched-mla.mir
Author: Dmitri Gribenko Date: 2020-11-30T15:19:27+01:00 New Revision: 234a5297aa00648cba00347f24e9e9b99abde289 URL: https://github.com/llvm/llvm-project/commit/234a5297aa00648cba00347f24e9e9b99abde289 DIFF: https://github.com/llvm/llvm-project/commit/234a5297aa00648cba00347f24e9e9b99abde289.diff LOG: Add 'asserts' requiremnt to test/CodeGen/ARM/cortex-a57-misched-mla.mir '-debug-only=machine-scheduler' only works when asserts are enabled. Added: Modified: llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir Removed: diff --git a/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir b/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir index ed6e47d4bb20..ffb0c98055e3 100644 --- a/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir +++ b/llvm/test/CodeGen/ARM/cortex-a57-misched-mla.mir @@ -1,3 +1,4 @@ +# REQUIRES: asserts # RUN: llc -mcpu=cortex-a57 -mtriple=thumb -enable-misched -run-pass=machine-scheduler -debug-only=machine-scheduler %s -o - 2>&1 | FileCheck %s # TODO: Remove once bots have removed the output file left by 112b3cb ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] bfd2c21 - [IR][LoopRotate] avoid leaving phi with no operands (PR48296)
Author: Sanjay Patel Date: 2020-11-30T09:28:45-05:00 New Revision: bfd2c216ea8ef09f8fb1f755ca2b89f86f74acbb URL: https://github.com/llvm/llvm-project/commit/bfd2c216ea8ef09f8fb1f755ca2b89f86f74acbb DIFF: https://github.com/llvm/llvm-project/commit/bfd2c216ea8ef09f8fb1f755ca2b89f86f74acbb.diff LOG: [IR][LoopRotate] avoid leaving phi with no operands (PR48296) https://llvm.org/PR48296 shows an example where we delete all of the operands of a phi without actually deleting the phi, and that is currently considered invalid IR. The reduced test included here would crash for that reason. A suggested follow-up is to loosen the assert to allow 0-operand phis in unreachable blocks. Differential Revision: https://reviews.llvm.org/D92247 Added: llvm/test/Transforms/LoopRotate/phi-empty.ll Modified: llvm/include/llvm/IR/BasicBlock.h llvm/lib/IR/BasicBlock.cpp Removed: diff --git a/llvm/include/llvm/IR/BasicBlock.h b/llvm/include/llvm/IR/BasicBlock.h index 26cfdd9e51d6..149b0a26c1f3 100644 --- a/llvm/include/llvm/IR/BasicBlock.h +++ b/llvm/include/llvm/IR/BasicBlock.h @@ -387,9 +387,9 @@ class BasicBlock final : public Value, // Basic blocks are data objects also /// Update PHI nodes in this BasicBlock before removal of predecessor \p Pred. /// Note that this function does not actually remove the predecessor. /// - /// If \p KeepOneInputPHIs is true then don't remove PHIs that are left with - /// zero or one incoming values, and don't simplify PHIs with all incoming - /// values the same. + /// If \p KeepOneInputPHIs is true, then don't remove PHIs that are left with + /// one incoming value and don't simplify PHIs with all incoming values the + /// same. void removePredecessor(BasicBlock *Pred, bool KeepOneInputPHIs = false); bool canSplitPredecessors() const; diff --git a/llvm/lib/IR/BasicBlock.cpp b/llvm/lib/IR/BasicBlock.cpp index 3268641ddf19..aee769aa0fea 100644 --- a/llvm/lib/IR/BasicBlock.cpp +++ b/llvm/lib/IR/BasicBlock.cpp @@ -330,7 +330,7 @@ void BasicBlock::removePredecessor(BasicBlock *Pred, unsigned NumPreds = cast(front()).getNumIncomingValues(); for (PHINode &Phi : make_early_inc_range(phis())) { -Phi.removeIncomingValue(Pred, !KeepOneInputPHIs); +Phi.removeIncomingValue(Pred); if (KeepOneInputPHIs) continue; // If we have a single predecessor, removeIncomingValue erased the PHI diff --git a/llvm/test/Transforms/LoopRotate/phi-empty.ll b/llvm/test/Transforms/LoopRotate/phi-empty.ll new file mode 100644 index ..e246cff91b62 --- /dev/null +++ b/llvm/test/Transforms/LoopRotate/phi-empty.ll @@ -0,0 +1,34 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -S -lcssa -loop-rotate < %s | FileCheck %s + +define void @PR48296(i1 %cond) { +; CHECK-LABEL: @PR48296( +; CHECK-NEXT: entry: +; CHECK-NEXT:br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT:br i1 [[COND:%.*]], label [[INC:%.*]], label [[LOOP_BACKEDGE:%.*]] +; CHECK: loop.backedge: +; CHECK-NEXT:br label [[LOOP]] +; CHECK: dead: +; CHECK-NEXT:unreachable +; CHECK: inc: +; CHECK-NEXT:br label [[LOOP_BACKEDGE]] +; CHECK: return: +; CHECK-NEXT:ret void +; +entry: + br label %loop + +loop: + br i1 %cond, label %inc, label %loop + +dead:; No predecessors! + br i1 %cond, label %inc, label %return + +inc: + br label %loop + +return: + %r = phi i32 [ undef, %dead ] + ret void +} ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] c0e4020 - [lld-macho] Implement -fatal_warnings
Author: Nico Weber Date: 2020-11-30T09:29:21-05:00 New Revision: c0e4020c927134b1dfe4181f54147af95f482558 URL: https://github.com/llvm/llvm-project/commit/c0e4020c927134b1dfe4181f54147af95f482558 DIFF: https://github.com/llvm/llvm-project/commit/c0e4020c927134b1dfe4181f54147af95f482558.diff LOG: [lld-macho] Implement -fatal_warnings Differential Revision: https://reviews.llvm.org/D91894 Added: lld/test/MachO/fatal-warnings.s Modified: lld/MachO/DriverUtils.cpp lld/MachO/Options.td Removed: diff --git a/lld/MachO/DriverUtils.cpp b/lld/MachO/DriverUtils.cpp index 90f1dd323f02..ec57c6898129 100644 --- a/lld/MachO/DriverUtils.cpp +++ b/lld/MachO/DriverUtils.cpp @@ -76,6 +76,10 @@ opt::InputArgList MachOOptTable::parse(ArrayRef argv) { cl::ExpandResponseFiles(saver, cl::TokenizeGNUCommandLine, vec); opt::InputArgList args = ParseArgs(vec, missingIndex, missingCount); + // Handle -fatal_warnings early since it converts missing argument warnings + // to errors. + errorHandler().fatalWarnings = args.hasArg(OPT_fatal_warnings); + if (missingCount) error(Twine(args.getArgString(missingIndex)) + ": missing argument"); diff --git a/lld/MachO/Options.td b/lld/MachO/Options.td index f36820b22b17..ed3d00452bd3 100644 --- a/lld/MachO/Options.td +++ b/lld/MachO/Options.td @@ -610,8 +610,7 @@ def no_application_extension : Flag<["-"], "no_application_extension">, Flags<[HelpHidden]>, Group; def fatal_warnings : Flag<["-"], "fatal_warnings">, - HelpText<"Escalate warnings as errors">, - Flags<[HelpHidden]>, + HelpText<"Treat warnings as errors">, Group; def no_eh_labels : Flag<["-"], "no_eh_labels">, HelpText<"In -r mode, suppress .eh labels in the __eh_frame section">, diff --git a/lld/test/MachO/fatal-warnings.s b/lld/test/MachO/fatal-warnings.s new file mode 100644 index ..4ab5589cde08 --- /dev/null +++ b/lld/test/MachO/fatal-warnings.s @@ -0,0 +1,13 @@ +# REQUIRES: x86 +# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t1.o + +# RUN: %lld %t1.o -o /dev/null -single_module 2>&1 \ +# RUN: | FileCheck -check-prefix=WARNING %s +# RUN: not %lld %t1.o -fatal_warnings -o /dev/null -single_module 2>&1 \ +# RUN: | FileCheck -check-prefix=ERROR %s + +# ERROR: error: Option `-single_module' is deprecated +# WARNING: warning: Option `-single_module' is deprecated + +.globl _main +_main: ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] d5aaf60 - [windows-itanium] handle dllimport/export code paths separately and share with PS4
Author: Ben Dunbobbin Date: 2020-11-30T14:36:39Z New Revision: d5aaf6021476243de73f8eb8a7479a2288582225 URL: https://github.com/llvm/llvm-project/commit/d5aaf6021476243de73f8eb8a7479a2288582225 DIFF: https://github.com/llvm/llvm-project/commit/d5aaf6021476243de73f8eb8a7479a2288582225.diff LOG: [windows-itanium] handle dllimport/export code paths separately and share with PS4 Similar to Windows Itanium, PS4 is also an Itanium C++ ABI variant which shares the goal of semantic compatibility with Microsoft C++ code that uses dllimport/export. This change introduces a new function to determine from the triple if an environment aims for compatibility with MS C++ code w.r.t to these attributes and guards the relevant code paths using that function. Differential Revision: https://reviews.llvm.org/D90299 Added: Modified: clang/include/clang/Basic/TargetInfo.h clang/lib/Sema/SemaDecl.cpp clang/lib/Sema/SemaDeclAttr.cpp clang/lib/Sema/SemaDeclCXX.cpp clang/lib/Sema/SemaTemplate.cpp clang/test/CodeGenCXX/dllexport-vtable-thunks.cpp clang/test/CodeGenCXX/windows-implicit-dllexport-template-specialization.cpp clang/test/CodeGenCXX/windows-itanium-dllexport.cpp clang/test/Sema/dllimport.c clang/test/SemaCXX/dllexport.cpp clang/test/SemaCXX/dllimport.cpp Removed: diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h index 698964b94ee2..de91ca2ee82e 100644 --- a/clang/include/clang/Basic/TargetInfo.h +++ b/clang/include/clang/Basic/TargetInfo.h @@ -1098,6 +1098,13 @@ class TargetInfo : public virtual TransferrableTargetInfo, /// either; the entire thing is pretty badly mangled. virtual bool hasProtectedVisibility() const { return true; } + /// Does this target aim for semantic compatibility with + /// Microsoft C++ code using dllimport/export attributes? + virtual bool shouldDLLImportComdatSymbols() const { +return getTriple().isWindowsMSVCEnvironment() || + getTriple().isWindowsItaniumEnvironment() || getTriple().isPS4CPU(); + } + /// An optional hook that targets can implement to perform semantic /// checking on attribute((section("foo"))) specifiers. /// diff --git a/clang/lib/Sema/SemaDecl.cpp b/clang/lib/Sema/SemaDecl.cpp index ce7475b0d5da..9c282a73e0ed 100644 --- a/clang/lib/Sema/SemaDecl.cpp +++ b/clang/lib/Sema/SemaDecl.cpp @@ -6510,9 +6510,7 @@ static void checkDLLAttributeRedeclaration(Sema &S, NamedDecl *OldDecl, // special MSVC extension: in the last case, the declaration is treated as if // it were marked dllexport. bool IsInline = false, IsStaticDataMember = false, IsQualifiedFriend = false; - bool IsMicrosoft = - S.Context.getTargetInfo().getCXXABI().isMicrosoft() || - S.Context.getTargetInfo().getTriple().isWindowsItaniumEnvironment(); + bool IsMicrosoftABI = S.Context.getTargetInfo().shouldDLLImportComdatSymbols(); if (const auto *VD = dyn_cast(NewDecl)) { // Ignore static data because out-of-line definitions are diagnosed // separately. @@ -6526,9 +6524,9 @@ static void checkDLLAttributeRedeclaration(Sema &S, NamedDecl *OldDecl, } if (OldImportAttr && !HasNewAttr && - (!IsInline || (IsMicrosoft && IsTemplate)) && !IsStaticDataMember && + (!IsInline || (IsMicrosoftABI && IsTemplate)) && !IsStaticDataMember && !NewDecl->isLocalExternDecl() && !IsQualifiedFriend) { -if (IsMicrosoft && IsDefinition) { +if (IsMicrosoftABI && IsDefinition) { S.Diag(NewDecl->getLocation(), diag::warn_redeclaration_without_import_attribute) << NewDecl; @@ -6545,7 +6543,7 @@ static void checkDLLAttributeRedeclaration(Sema &S, NamedDecl *OldDecl, OldDecl->dropAttr(); NewDecl->dropAttr(); } - } else if (IsInline && OldImportAttr && !IsMicrosoft) { + } else if (IsInline && OldImportAttr && !IsMicrosoftABI) { // In MinGW, seeing a function declared inline drops the dllimport // attribute. OldDecl->dropAttr(); diff --git a/clang/lib/Sema/SemaDeclAttr.cpp b/clang/lib/Sema/SemaDeclAttr.cpp index a14c16229419..d31d18eac474 100644 --- a/clang/lib/Sema/SemaDeclAttr.cpp +++ b/clang/lib/Sema/SemaDeclAttr.cpp @@ -6791,16 +6791,14 @@ DLLExportAttr *Sema::mergeDLLExportAttr(Decl *D, static void handleDLLAttr(Sema &S, Decl *D, const ParsedAttr &A) { if (isa(D) && - (S.Context.getTargetInfo().getCXXABI().isMicrosoft() || - S.Context.getTargetInfo().getTriple().isWindowsItaniumEnvironment())) { + (S.Context.getTargetInfo().shouldDLLImportComdatSymbols())) { S.Diag(A.getRange().getBegin(), diag::warn_attribute_ignored) << A; return; } if (const auto *FD = dyn_cast(D)) { if (FD->isInlined() && A.getKind() == ParsedAttr::AT_DLLImport && -!(S.Context.getTargetInfo().getCXXABI().isMicrosoft() || - S.Context.getTargetInfo().g
[llvm-branch-commits] [mlir] 78c7118 - [mlir] Make mlir-cpu-runner depend on native instead of X86
Author: Nicolas Vasilache Date: 2020-11-30T15:11:34Z New Revision: 78c71187465a8e877d2e07d462b45a19363fb782 URL: https://github.com/llvm/llvm-project/commit/78c71187465a8e877d2e07d462b45a19363fb782 DIFF: https://github.com/llvm/llvm-project/commit/78c71187465a8e877d2e07d462b45a19363fb782.diff LOG: [mlir] Make mlir-cpu-runner depend on native instead of X86 Added: Modified: mlir/tools/mlir-cpu-runner/CMakeLists.txt Removed: diff --git a/mlir/tools/mlir-cpu-runner/CMakeLists.txt b/mlir/tools/mlir-cpu-runner/CMakeLists.txt index 539f9914a91a..c749b8c40b09 100644 --- a/mlir/tools/mlir-cpu-runner/CMakeLists.txt +++ b/mlir/tools/mlir-cpu-runner/CMakeLists.txt @@ -2,6 +2,7 @@ set(LLVM_LINK_COMPONENTS Core Support nativecodegen + native ) add_llvm_tool(mlir-cpu-runner @@ -11,8 +12,6 @@ llvm_update_compile_flags(mlir-cpu-runner) get_property(dialect_libs GLOBAL PROPERTY MLIR_DIALECT_LIBS) target_link_libraries(mlir-cpu-runner PRIVATE ${dialect_libs} - LLVMAsmParser - LLVMX86AsmParser MLIRAnalysis MLIREDSC MLIRExecutionEngine ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 355aee3 - Revert "[IR][LoopRotate] avoid leaving phi with no operands (PR48296)"
Author: Sanjay Patel Date: 2020-11-30T10:15:42-05:00 New Revision: 355aee3dcd441461a6da6e56c43dc1bd81c79f31 URL: https://github.com/llvm/llvm-project/commit/355aee3dcd441461a6da6e56c43dc1bd81c79f31 DIFF: https://github.com/llvm/llvm-project/commit/355aee3dcd441461a6da6e56c43dc1bd81c79f31.diff LOG: Revert "[IR][LoopRotate] avoid leaving phi with no operands (PR48296)" This reverts commit bfd2c216ea8ef09f8fb1f755ca2b89f86f74acbb. This appears to be causing stage2 msan failures on buildbots: FAIL: LLVM :: Transforms/SimplifyCFG/X86/bug-25299.ll (65872 of 71835) TEST 'LLVM :: Transforms/SimplifyCFG/X86/bug-25299.ll' FAILED Script: -- : 'RUN: at line 1'; /b/sanitizer-x86_64-linux-fast/build/llvm_build_msan/bin/opt < /b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/test/Transforms/SimplifyCFG/X86/bug-25299.ll -simplifycfg -S | /b/sanitizer-x86_64-linux-fast/build/llvm_build_msan/bin/FileCheck /b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/test/Transforms/SimplifyCFG/X86/bug-25299.ll -- Exit Code: 2 Command Output (stderr): -- ==87374==WARNING: MemorySanitizer: use-of-uninitialized-value #0 0x9de47b6 in getBasicBlockIndex /b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/include/llvm/IR/Instructions.h:2749:5 #1 0x9de47b6 in simplifyCommonResume /b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/lib/Transforms/Utils/SimplifyCFG.cpp:4112:23 #2 0x9de47b6 in simplifyResume /b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/lib/Transforms/Utils/SimplifyCFG.cpp:4039:12 #3 0x9de47b6 in (anonymous namespace)::SimplifyCFGOpt::simplifyOnce(llvm::BasicBlock*) /b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/lib/Transforms/Utils/SimplifyCFG.cpp:6330:16 #4 0x9dcca13 in run /b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/lib/Transforms/Utils/SimplifyCFG.cpp:6358:16 #5 0x9dcca13 in llvm::simplifyCFG(llvm::BasicBlock*, llvm::TargetTransformInfo const&, llvm::SimplifyCFGOptions const&, llvm::SmallPtrSetImpl*) /b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/lib/Transforms/Utils/SimplifyCFG.cpp:6369:8 #6 0x974643d in iterativelySimplifyCFG( Added: Modified: llvm/include/llvm/IR/BasicBlock.h llvm/lib/IR/BasicBlock.cpp Removed: llvm/test/Transforms/LoopRotate/phi-empty.ll diff --git a/llvm/include/llvm/IR/BasicBlock.h b/llvm/include/llvm/IR/BasicBlock.h index 149b0a26c1f3..26cfdd9e51d6 100644 --- a/llvm/include/llvm/IR/BasicBlock.h +++ b/llvm/include/llvm/IR/BasicBlock.h @@ -387,9 +387,9 @@ class BasicBlock final : public Value, // Basic blocks are data objects also /// Update PHI nodes in this BasicBlock before removal of predecessor \p Pred. /// Note that this function does not actually remove the predecessor. /// - /// If \p KeepOneInputPHIs is true, then don't remove PHIs that are left with - /// one incoming value and don't simplify PHIs with all incoming values the - /// same. + /// If \p KeepOneInputPHIs is true then don't remove PHIs that are left with + /// zero or one incoming values, and don't simplify PHIs with all incoming + /// values the same. void removePredecessor(BasicBlock *Pred, bool KeepOneInputPHIs = false); bool canSplitPredecessors() const; diff --git a/llvm/lib/IR/BasicBlock.cpp b/llvm/lib/IR/BasicBlock.cpp index aee769aa0fea..3268641ddf19 100644 --- a/llvm/lib/IR/BasicBlock.cpp +++ b/llvm/lib/IR/BasicBlock.cpp @@ -330,7 +330,7 @@ void BasicBlock::removePredecessor(BasicBlock *Pred, unsigned NumPreds = cast(front()).getNumIncomingValues(); for (PHINode &Phi : make_early_inc_range(phis())) { -Phi.removeIncomingValue(Pred); +Phi.removeIncomingValue(Pred, !KeepOneInputPHIs); if (KeepOneInputPHIs) continue; // If we have a single predecessor, removeIncomingValue erased the PHI diff --git a/llvm/test/Transforms/LoopRotate/phi-empty.ll b/llvm/test/Transforms/LoopRotate/phi-empty.ll deleted file mode 100644 index e246cff91b62.. --- a/llvm/test/Transforms/LoopRotate/phi-empty.ll +++ /dev/null @@ -1,34 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -lcssa -loop-rotate < %s | FileCheck %s - -define void @PR48296(i1 %cond) { -; CHECK-LABEL: @PR48296( -; CHECK-NEXT: entry: -; CHECK-NEXT:br label [[LOOP:%.*]] -; CHECK: loop: -; CHECK-NEXT:br i1 [[COND:%.*]], label [[INC:%.*]], label [[LOOP_BACKEDGE:%.*]] -; CHECK: loop.backedge: -; CHECK-NEXT:br label [[LOOP]] -; CHECK: dead: -; CHECK-NEXT:unreachable -; CHECK: inc: -; CHECK-NEXT:br label [[LOOP_BACKEDGE]] -; CHECK: return: -; CHECK-NEXT:ret void -; -entry: - br label %loop - -loop: - br i1 %cond, label %inc, label %loop - -dead:; No predecessors! - br i1 %cond, label %inc,
[llvm-branch-commits] [lldb] e0e7bbe - [lldb] Always include template arguments that have their default value in the internal type name
Author: Raphael Isemann Date: 2020-11-30T16:40:50+01:00 New Revision: e0e7bbeb545516c50a0354efc34d329453558c9c URL: https://github.com/llvm/llvm-project/commit/e0e7bbeb545516c50a0354efc34d329453558c9c DIFF: https://github.com/llvm/llvm-project/commit/e0e7bbeb545516c50a0354efc34d329453558c9c.diff LOG: [lldb] Always include template arguments that have their default value in the internal type name Our type formatters/summaries match on the internal type name we generate in LLDB for Clang types. These names were generated using Clang's default printing policy. However Clang's default printing policy got tweaked over the last month to make the generated type names more readable (by for example excluding inline/anonymous namespaces and removing template arguments that have their default value). This broke the formatter system where LLDB's matching logic now no longer can format certain types as the new type names generated by Clang's default printing policy no longer match the type names that LLDB/the user specified. I already introduced LLDB's own type printing policy and fixed the inline/anonymous namespaces in da121fff1184267a405f81a87f7314df2d474e1c (just to get the test suite passing again). This patch is restoring the old type printing behaviour where always include the template arguments in the internal type name (even if they match the default args). This should get template type formatters/summaries working again in the rare situation where we do know template default arguments within LLDB. This can only happen when either having a template that was parsed in the expression parser or when we get type information from a C++ module. The Clang change that removed defaulted template arguments from Clang's printing policy was e7f3e2103cdb567dda4fd52f81bf4bc07179f5a8 Reviewed By: labath Differential Revision: https://reviews.llvm.org/D92311 Added: lldb/test/API/lang/cpp/default-template-args/Makefile lldb/test/API/lang/cpp/default-template-args/TestDefaultTemplateArgs.py lldb/test/API/lang/cpp/default-template-args/main.cpp Modified: lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp Removed: diff --git a/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp b/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp index 77470486dd45..bab50a3b068c 100644 --- a/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp +++ b/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp @@ -1998,6 +1998,18 @@ PrintingPolicy TypeSystemClang::GetTypePrintingPolicy() { // and libstdc++ are diff erentiated by their inline namespaces). printing_policy.SuppressInlineNamespace = false; printing_policy.SuppressUnwrittenScope = false; + // Default arguments are also always important for type formatters. Otherwise + // we would need to always specify two type names for the setups where we do + // know the default arguments and where we don't know default arguments. + // + // For example, without this we would need to have formatters for both: + // std::basic_string + // and + // std::basic_string, std::allocator > + // to support setups where LLDB was able to reconstruct default arguments + // (and we then would have suppressed them from the type name) and also setups + // where LLDB wasn't able to reconstruct the default arguments. + printing_policy.SuppressDefaultTemplateArgs = false; return printing_policy; } diff --git a/lldb/test/API/lang/cpp/default-template-args/Makefile b/lldb/test/API/lang/cpp/default-template-args/Makefile new file mode 100644 index ..8b20bcb0 --- /dev/null +++ b/lldb/test/API/lang/cpp/default-template-args/Makefile @@ -0,0 +1,3 @@ +CXX_SOURCES := main.cpp + +include Makefile.rules diff --git a/lldb/test/API/lang/cpp/default-template-args/TestDefaultTemplateArgs.py b/lldb/test/API/lang/cpp/default-template-args/TestDefaultTemplateArgs.py new file mode 100644 index ..970c3522a175 --- /dev/null +++ b/lldb/test/API/lang/cpp/default-template-args/TestDefaultTemplateArgs.py @@ -0,0 +1,41 @@ +""" +Test default template arguments. +""" + +import lldb +from lldbsuite.test.decorators import * +from lldbsuite.test.lldbtest import * +from lldbsuite.test import lldbutil + +class TestCase(TestBase): + +mydir = TestBase.compute_mydir(__file__) + +@no_debug_info_test +def test(self): +self.build() +lldbutil.run_to_source_breakpoint(self, "// break here", lldb.SBFileSpec("main.cpp")) + +# Declare a template with a template argument that has a default argument. +self.expect("expr --top-level -- template struct $X { int v; };") + +# The type we display to the user should omit the argument with the default +# value. +result = self.expect_expr("$X<> x; x", result_type="$X<>") +# The internal name should also always show all argume
[llvm-branch-commits] [llvm] 1dc38f8 - [IR] improve code comment/logic in removePredecessor(); NFC
Author: Sanjay Patel Date: 2020-11-30T10:51:30-05:00 New Revision: 1dc38f8cfbbc4cce12f8416a1e51d38285e6872f URL: https://github.com/llvm/llvm-project/commit/1dc38f8cfbbc4cce12f8416a1e51d38285e6872f DIFF: https://github.com/llvm/llvm-project/commit/1dc38f8cfbbc4cce12f8416a1e51d38285e6872f.diff LOG: [IR] improve code comment/logic in removePredecessor(); NFC This was suggested in the post-commit review of ce134da4b1. Added: Modified: llvm/lib/IR/BasicBlock.cpp Removed: diff --git a/llvm/lib/IR/BasicBlock.cpp b/llvm/lib/IR/BasicBlock.cpp index 3268641ddf19..95b8602b9b6c 100644 --- a/llvm/lib/IR/BasicBlock.cpp +++ b/llvm/lib/IR/BasicBlock.cpp @@ -333,14 +333,16 @@ void BasicBlock::removePredecessor(BasicBlock *Pred, Phi.removeIncomingValue(Pred, !KeepOneInputPHIs); if (KeepOneInputPHIs) continue; -// If we have a single predecessor, removeIncomingValue erased the PHI -// node itself. + +// If we have a single predecessor, removeIncomingValue may have erased the +// PHI node itself. +if (NumPreds == 1) + continue; + // Try to replace the PHI node with a constant value. -if (NumPreds > 1) { - if (Value *PhiConstant = Phi.hasConstantValue()) { -Phi.replaceAllUsesWith(PhiConstant); -Phi.eraseFromParent(); - } +if (Value *PhiConstant = Phi.hasConstantValue()) { + Phi.replaceAllUsesWith(PhiConstant); + Phi.eraseFromParent(); } } } ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 4db1de3 - [ConstraintElimination] Add additional GEP decomposition tests.
Author: Florian Hahn Date: 2020-11-30T16:04:23Z New Revision: 4db1de3a77939c0ec409e4e2c01f27be639f20a3 URL: https://github.com/llvm/llvm-project/commit/4db1de3a77939c0ec409e4e2c01f27be639f20a3 DIFF: https://github.com/llvm/llvm-project/commit/4db1de3a77939c0ec409e4e2c01f27be639f20a3.diff LOG: [ConstraintElimination] Add additional GEP decomposition tests. Added: Modified: llvm/test/Transforms/ConstraintElimination/geps.ll Removed: diff --git a/llvm/test/Transforms/ConstraintElimination/geps.ll b/llvm/test/Transforms/ConstraintElimination/geps.ll index 96a8ce613d55..abd63b211ad8 100644 --- a/llvm/test/Transforms/ConstraintElimination/geps.ll +++ b/llvm/test/Transforms/ConstraintElimination/geps.ll @@ -371,5 +371,127 @@ if.end: ; preds = %entry ret void } +; Test which requires decomposing GEP %ptr, SHL(). +define void @test.ult.gep.shl(i32* readonly %src, i32* readnone %max, i32 %idx, i32 %j) { +; CHECK-LABEL: @test.ult.gep.shl( +; CHECK-NEXT: check.0.min: +; CHECK-NEXT:[[ADD_10:%.*]] = getelementptr inbounds i32, i32* [[SRC:%.*]], i32 10 +; CHECK-NEXT:[[C_ADD_10_MAX:%.*]] = icmp ugt i32* [[ADD_10]], [[MAX:%.*]] +; CHECK-NEXT:br i1 [[C_ADD_10_MAX]], label [[TRAP:%.*]], label [[CHECK_IDX:%.*]] +; CHECK: trap: +; CHECK-NEXT:ret void +; CHECK: check.idx: +; CHECK-NEXT:[[CMP:%.*]] = icmp ult i32 [[IDX:%.*]], 5 +; CHECK-NEXT:br i1 [[CMP]], label [[CHECK_MAX:%.*]], label [[TRAP]] +; CHECK: check.max: +; CHECK-NEXT:[[IDX_SHL:%.*]] = shl nuw i32 [[IDX]], 2 +; CHECK-NEXT:[[ADD_PTR_SHL:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i32 [[IDX_SHL]] +; CHECK-NEXT:[[C_MAX_0:%.*]] = icmp ult i32* [[ADD_PTR_SHL]], [[MAX]] +; CHECK-NEXT:call void @use(i1 [[C_MAX_0]]) +; CHECK-NEXT:[[IDX_SHL_NOT_NUW:%.*]] = shl i32 [[IDX]], 2 +; CHECK-NEXT:[[ADD_PTR_SHL_NOT_NUW:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i32 [[IDX_SHL_NOT_NUW]] +; CHECK-NEXT:[[C_MAX_1:%.*]] = icmp ult i32* [[ADD_PTR_SHL_NOT_NUW]], [[MAX]] +; CHECK-NEXT:call void @use(i1 [[C_MAX_1]]) +; CHECK-NEXT:[[IDX_SHL_3:%.*]] = shl nuw i32 [[IDX]], 3 +; CHECK-NEXT:[[ADD_PTR_SHL_3:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i32 [[IDX_SHL_3]] +; CHECK-NEXT:[[C_MAX_2:%.*]] = icmp ult i32* [[ADD_PTR_SHL_3]], [[MAX]] +; CHECK-NEXT:call void @use(i1 [[C_MAX_2]]) +; CHECK-NEXT:ret void +; +check.0.min: + %add.10 = getelementptr inbounds i32, i32* %src, i32 10 + %c.add.10.max = icmp ugt i32* %add.10, %max + br i1 %c.add.10.max, label %trap, label %check.idx + +trap: + ret void + +check.idx: ; preds = %check.0.min + %cmp = icmp ult i32 %idx, 5 + br i1 %cmp, label %check.max, label %trap + +check.max: ; preds = %check.0.min + %idx.shl = shl nuw i32 %idx, 2 + %add.ptr.shl = getelementptr inbounds i32, i32* %src, i32 %idx.shl + %c.max.0 = icmp ult i32* %add.ptr.shl, %max + call void @use(i1 %c.max.0) + + %idx.shl.not.nuw = shl i32 %idx, 2 + %add.ptr.shl.not.nuw = getelementptr inbounds i32, i32* %src, i32 %idx.shl.not.nuw + %c.max.1 = icmp ult i32* %add.ptr.shl.not.nuw, %max + call void @use(i1 %c.max.1) + + %idx.shl.3 = shl nuw i32 %idx, 3 + %add.ptr.shl.3 = getelementptr inbounds i32, i32* %src, i32 %idx.shl.3 + %c.max.2 = icmp ult i32* %add.ptr.shl.3, %max + call void @use(i1 %c.max.2) + + ret void +} + +; Test which requires decomposing GEP %ptr, ZEXT(SHL()). +define void @test.ult.gep.shl.zext(i32* readonly %src, i32* readnone %max, i32 %idx, i32 %j) { +; CHECK-LABEL: @test.ult.gep.shl.zext( +; CHECK-NEXT: check.0.min: +; CHECK-NEXT:[[ADD_10:%.*]] = getelementptr inbounds i32, i32* [[SRC:%.*]], i32 10 +; CHECK-NEXT:[[C_ADD_10_MAX:%.*]] = icmp ugt i32* [[ADD_10]], [[MAX:%.*]] +; CHECK-NEXT:br i1 [[C_ADD_10_MAX]], label [[TRAP:%.*]], label [[CHECK_IDX:%.*]] +; CHECK: trap: +; CHECK-NEXT:ret void +; CHECK: check.idx: +; CHECK-NEXT:[[CMP:%.*]] = icmp ult i32 [[IDX:%.*]], 5 +; CHECK-NEXT:br i1 [[CMP]], label [[CHECK_MAX:%.*]], label [[TRAP]] +; CHECK: check.max: +; CHECK-NEXT:[[IDX_SHL:%.*]] = shl nuw i32 [[IDX]], 2 +; CHECK-NEXT:[[EXT_1:%.*]] = zext i32 [[IDX_SHL]] to i64 +; CHECK-NEXT:[[ADD_PTR_SHL:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 [[EXT_1]] +; CHECK-NEXT:[[C_MAX_0:%.*]] = icmp ult i32* [[ADD_PTR_SHL]], [[MAX]] +; CHECK-NEXT:call void @use(i1 [[C_MAX_0]]) +; CHECK-NEXT:[[IDX_SHL_NOT_NUW:%.*]] = shl i32 [[IDX]], 2 +; CHECK-NEXT:[[EXT_2:%.*]] = zext i32 [[IDX_SHL_NOT_NUW]] to i64 +; CHECK-NEXT:[[ADD_PTR_SHL_NOT_NUW:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 [[EXT_2]] +; CHECK-NEXT:[[C_MAX_1:%.*]] = icmp ult i32* [[ADD_PTR_SHL_NOT_NUW]], [[MAX]] +; CHECK-NEXT:call void @use(i1 [[C_MAX_1]]) +; CHECK-NE
[llvm-branch-commits] [llvm] cbbd702 - [RISCV] Only combine (or (GREVI x, shamt), x) -> GORCI if shamt is a power of 2.
Author: Craig Topper Date: 2020-11-30T08:10:39-08:00 New Revision: cbbd7021f176d1344fb4d71d492ccc6017f98151 URL: https://github.com/llvm/llvm-project/commit/cbbd7021f176d1344fb4d71d492ccc6017f98151 DIFF: https://github.com/llvm/llvm-project/commit/cbbd7021f176d1344fb4d71d492ccc6017f98151.diff LOG: [RISCV] Only combine (or (GREVI x, shamt), x) -> GORCI if shamt is a power of 2. GORCI performs an OR between each stage. So we need to ensure only one stage is active before doing this combine. Initial attempts at finding a test case for this failed due to the order things get combined. It's most likely that we'll form one stage of GREVI then combine to GORCI before the two stages of GREVI are able to be formed and combined with each other to form a multi stage GREVI. Differential Revision: https://reviews.llvm.org/D92289 Added: Modified: llvm/lib/Target/RISCV/RISCVISelLowering.cpp Removed: diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 7a0d7979d200..380b1a7d9c42 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -1238,8 +1238,8 @@ static SDValue combineORToGREV(SDValue Op, SelectionDAG &DAG, } // Matches any the following pattern as a GORCI(W) operation -// 1. (or (GREVI x, shamt), x) -// 2. (or x, (GREVI x, shamt)) +// 1. (or (GREVI x, shamt), x) if shamt is a power of 2 +// 2. (or x, (GREVI x, shamt)) if shamt is a power of 2 // 3. (or (or (BITMANIP_SHL x), x), (BITMANIP_SRL x)) // Note that with the variant of 3., // (or (or (BITMANIP_SHL x), (BITMANIP_SRL x)), x) @@ -1258,7 +1258,8 @@ static SDValue combineORToGORC(SDValue Op, SelectionDAG &DAG, for (const auto &OpPair : {std::make_pair(Op0, Op1), std::make_pair(Op1, Op0)}) { if (OpPair.first.getOpcode() == RISCVISD::GREVI && - OpPair.first.getOperand(0) == OpPair.second) + OpPair.first.getOperand(0) == OpPair.second && + isPowerOf2_32(OpPair.first.getConstantOperandVal(1))) return DAG.getNode(RISCVISD::GORCI, DL, VT, OpPair.second, OpPair.first.getOperand(1)); } ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 25c8fbb - [X86] Don't emit R_X86_64_[REX_]GOTPCRELX for a GOT load with an offset
Author: Fangrui Song Date: 2020-11-30T08:27:31-08:00 New Revision: 25c8fbb3d92fd8321af59bb370e901f0e229b1c9 URL: https://github.com/llvm/llvm-project/commit/25c8fbb3d92fd8321af59bb370e901f0e229b1c9 DIFF: https://github.com/llvm/llvm-project/commit/25c8fbb3d92fd8321af59bb370e901f0e229b1c9.diff LOG: [X86] Don't emit R_X86_64_[REX_]GOTPCRELX for a GOT load with an offset clang may produce `movl x@GOTPCREL+4(%rip), %eax` when loading the high 32 bits of the address of a global variable in -fpic/-fpie mode. If assembled by GNU as, the fixup emits R_X86_64_GOTPCRELX with an addend != -4. The instruction loads from the GOT entry with an offset and thus it is incorrect to relax the instruction. This patch does not emit a relaxable relocation for a GOT load with an offset because R_X86_64_[REX_]GOTPCRELX do not make sense for instructions which cannot be relaxed. The result is good enough for LLD to work. GNU ld relaxes mov+GOTPCREL as well, but it suppresses the relaxation if addend != -4. Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D92114 Added: Modified: llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp llvm/test/MC/ELF/got-relaxed-rex.s llvm/test/MC/X86/gotpcrelx.s Removed: diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index 714f45c6e660..4e5e45f03925 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -397,10 +397,14 @@ void X86MCCodeEmitter::emitMemModRMByte(const MCInst &MI, unsigned Op, emitByte(modRMByte(0, RegOpcodeField, 5), OS); unsigned Opcode = MI.getOpcode(); -// movq loads are handled with a special relocation form which allows the -// linker to eliminate some loads for GOT references which end up in the -// same linkage unit. -unsigned FixupKind = [=]() { +unsigned FixupKind = [&]() { + // Enable relaxed relocation only for a MCSymbolRefExpr. We cannot use a + // relaxed relocation if an offset is present (e.g. x@GOTPCREL+4). + if (!(Disp.isExpr() && isa(Disp.getExpr( +return X86::reloc_riprel_4byte; + + // Certain loads for GOT references can be relocated against the symbol + // directly if the symbol ends up in the same linkage unit. switch (Opcode) { default: return X86::reloc_riprel_4byte; @@ -416,6 +420,9 @@ void X86MCCodeEmitter::emitMemModRMByte(const MCInst &MI, unsigned Op, case X86::XOR32rm: return X86::reloc_riprel_4byte_relax; case X86::MOV64rm: +// movq loads is a subset of reloc_riprel_4byte_relax_rex. It is a +// special case because COFF and Mach-O don't support ELF's more +// flexible R_X86_64_REX_GOTPCRELX relaxation. assert(HasREX); return X86::reloc_riprel_4byte_movq_load; case X86::CALL64m: diff --git a/llvm/test/MC/ELF/got-relaxed-rex.s b/llvm/test/MC/ELF/got-relaxed-rex.s index e694d7431ba9..1924bddc473e 100644 --- a/llvm/test/MC/ELF/got-relaxed-rex.s +++ b/llvm/test/MC/ELF/got-relaxed-rex.s @@ -13,6 +13,11 @@ sub sub@GOTPCREL(%rip), %rax xor xor@GOTPCREL(%rip), %rax +.section .norelax,"ax" +## This expression loads the GOT entry with an offset. +## Don't emit R_X86_64_REX_GOTPCRELX. +movq mov@GOTPCREL+1(%rip), %rax + // CHECK: Relocations [ // CHECK-NEXT: Section ({{.*}}) .rela.text { // CHECK-NEXT: R_X86_64_REX_GOTPCRELX mov @@ -26,4 +31,6 @@ // CHECK-NEXT: R_X86_64_REX_GOTPCRELX sub // CHECK-NEXT: R_X86_64_REX_GOTPCRELX xor // CHECK-NEXT: } -// CHECK-NEXT: ] +// CHECK-NEXT: Section ({{.*}}) .rela.norelax { +// CHECK-NEXT: R_X86_64_GOTPCREL mov +// CHECK-NEXT: } diff --git a/llvm/test/MC/X86/gotpcrelx.s b/llvm/test/MC/X86/gotpcrelx.s index 4afc76235b0d..3889835a1683 100644 --- a/llvm/test/MC/X86/gotpcrelx.s +++ b/llvm/test/MC/X86/gotpcrelx.s @@ -1,8 +1,10 @@ -# RUN: llvm-mc -filetype=obj -triple=x86_64 %s | llvm-readobj -r - | FileCheck %s -# RUN: llvm-mc -filetype=obj -triple=x86_64 -relax-relocations=false %s | llvm-readobj -r - | FileCheck --check-prefix=NORELAX %s +# RUN: llvm-mc -filetype=obj -triple=x86_64 %s -o %t.o +# RUN: llvm-readobj -r %t.o | FileCheck %s --check-prefixes=CHECK,COMMON +# RUN: llvm-mc -filetype=obj -triple=x86_64 -relax-relocations=false %s -o %t1.o +# RUN: llvm-readobj -r %t1.o | FileCheck %s --check-prefixes=NORELAX,COMMON -# CHECK: Relocations [ -# CHECK-NEXT: Section ({{.*}}) .rela.text { +# COMMON: Relocations [ +# COMMON-NEXT: Section ({{.*}}) .rela.text { # CHECK-NEXT: R_X86_64_GOTPCRELX mov # CHECK-NEXT: R_X86_64_GOTPCRELX test # CHECK-NEXT: R_X86_64_GOTPCRELX adc @@ -16,10 +18,7 @@ # CHECK-NEXT: R_X86_64_GOTPCRELX call # CHECK-NEXT: R_X86_64_GOTPCRELX jmp # CHE
[llvm-branch-commits] [lld] 589e10f - [ELF] Don't relax R_X86_64_GOTPCRELX if addend != -4
Author: Fangrui Song Date: 2020-11-30T08:30:19-08:00 New Revision: 589e10f8586e45ebe9b6409dd29d62f2f40ab52f URL: https://github.com/llvm/llvm-project/commit/589e10f8586e45ebe9b6409dd29d62f2f40ab52f DIFF: https://github.com/llvm/llvm-project/commit/589e10f8586e45ebe9b6409dd29d62f2f40ab52f.diff LOG: [ELF] Don't relax R_X86_64_GOTPCRELX if addend != -4 clang may produce `movl x@GOTPCREL+4(%rip), %eax` when loading the high 32 bits of the address of a global variable in -fpic/-fpie mode. If assembled by GNU as, the fixup emits an R_X86_64_GOTPCRELX with an addend != -4. The instruction loads from the GOT entry with an offset and thus it is incorrect to relax the instruction. If assembled by the integrated assembler, we emit R_X86_64_GOTPCREL for relocations that definitely cannot be relaxed (D92114), so this patch is not needed. This patch disables the relaxation, which is compatible with the implementation in GNU ld ("Add R_X86_64_[REX_]GOTPCRELX support to gas and ld"). Reviewed By: grimar, jhenderson Differential Revision: https://reviews.llvm.org/D91993 Added: lld/test/ELF/x86-64-gotpc-offset.s Modified: lld/ELF/Arch/X86_64.cpp Removed: diff --git a/lld/ELF/Arch/X86_64.cpp b/lld/ELF/Arch/X86_64.cpp index 618922844238..086a39f89671 100644 --- a/lld/ELF/Arch/X86_64.cpp +++ b/lld/ELF/Arch/X86_64.cpp @@ -730,7 +730,12 @@ void X86_64::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const { RelExpr X86_64::adjustGotPcExpr(RelType type, int64_t addend, const uint8_t *loc) const { - if (type != R_X86_64_GOTPCRELX && type != R_X86_64_REX_GOTPCRELX) + // Only R_X86_64_[REX_]GOTPCRELX can be relaxed. GNU as may emit GOTPCRELX + // with addend != -4. Such an instruction does not load the full GOT entry, so + // we cannot relax the relocation. E.g. movl x@GOTPCREL+4(%rip), %rax + // (addend=0) loads the high 32 bits of the GOT entry. + if ((type != R_X86_64_GOTPCRELX && type != R_X86_64_REX_GOTPCRELX) || + addend != -4) return R_GOT_PC; const uint8_t op = loc[-2]; const uint8_t modRm = loc[-1]; diff --git a/lld/test/ELF/x86-64-gotpc-offset.s b/lld/test/ELF/x86-64-gotpc-offset.s new file mode 100644 index ..60b007608b96 --- /dev/null +++ b/lld/test/ELF/x86-64-gotpc-offset.s @@ -0,0 +1,30 @@ +# REQUIRES: x86 +# RUN: llvm-mc -filetype=obj -triple=x86_64 %s -o %t.o +# RUN: ld.lld %t.o -o %t +# RUN: llvm-objdump -s -d %t | FileCheck %s + +# CHECK: Contents of section .got: +# CHECK-NEXT: {{^}} [[#%x,ADDR:]] {{.*}} + +# CHECK: leal {{.*}}(%rip), %eax # {{.*}} +# CHECK-NEXT: movl {{.*}}(%rip), %eax # [[#ADDR+4]] +# CHECK-NEXT: movq {{.*}}(%rip), %rax # [[#ADDR+1]] + +## movl foo@GOTPCREL(%rip), %eax + movl 0(%rip), %eax + .reloc .-4, R_X86_64_GOTPCRELX, foo-4 + +## The instruction has an offset (addend!=-4). It is incorrect to relax movl to leal. +## movl foo@GOTPCREL+4(%rip), %eax + movl 0(%rip), %eax + .reloc .-4, R_X86_64_GOTPCRELX, foo + +## This does not make sense because it loads one byte past the GOT entry. +## It is just to demonstrate the behavior. +## movq foo@GOTPCREL+1(%rip), %rax + movq 0(%rip), %rax + .reloc .-4, R_X86_64_REX_GOTPCRELX, foo-3 + +.globl foo +foo: + nop ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 76d1026 - [RISCV] Custom legalize bswap/bitreverse to GREVI with Zbp extension to enable them to combine with other GREVI instructions
Author: Craig Topper Date: 2020-11-30T08:30:40-08:00 New Revision: 76d1026b59bd04bd31645ab37dd82d1d89daa6d9 URL: https://github.com/llvm/llvm-project/commit/76d1026b59bd04bd31645ab37dd82d1d89daa6d9 DIFF: https://github.com/llvm/llvm-project/commit/76d1026b59bd04bd31645ab37dd82d1d89daa6d9.diff LOG: [RISCV] Custom legalize bswap/bitreverse to GREVI with Zbp extension to enable them to combine with other GREVI instructions This enables bswap/bitreverse to combine with other GREVI patterns or each other without needing to add more special cases to the DAG combine or new DAG combines. I've also enabled the existing GREVI combine for GREVIW so that it can pick up the i32 bswap/bitreverse on RV64 after they've been type legalized to GREVIW. Differential Revision: https://reviews.llvm.org/D92253 Added: Modified: llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Target/RISCV/RISCVInstrInfoB.td llvm/test/CodeGen/RISCV/rv32Zbp.ll llvm/test/CodeGen/RISCV/rv64Zbp.ll Removed: diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 380b1a7d9c42..f1c25512000e 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -162,7 +162,8 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM, } if (Subtarget.hasStdExtZbp()) { -setOperationAction(ISD::BITREVERSE, XLenVT, Legal); +setOperationAction(ISD::BITREVERSE, XLenVT, Custom); +setOperationAction(ISD::BSWAP, XLenVT, Custom); if (Subtarget.is64Bit()) { setOperationAction(ISD::BITREVERSE, MVT::i32, Custom); @@ -495,6 +496,20 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op, } case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); + case ISD::BSWAP: + case ISD::BITREVERSE: { +// Convert BSWAP/BITREVERSE to GREVI to enable GREVI combinining. +assert(Subtarget.hasStdExtZbp() && "Unexpected custom legalisation"); +MVT VT = Op.getSimpleValueType(); +SDLoc DL(Op); +// Start with the maximum immediate value which is the bitwidth - 1. +unsigned Imm = VT.getSizeInBits() - 1; +// If this is BSWAP rather than BITREVERSE, clear the lower 3 bits. +if (Op.getOpcode() == ISD::BSWAP) + Imm &= ~0x7U; +return DAG.getNode(RISCVISD::GREVI, DL, VT, Op.getOperand(0), + DAG.getTargetConstant(Imm, DL, Subtarget.getXLenVT())); + } } } @@ -1288,6 +1303,29 @@ static SDValue combineORToGORC(SDValue Op, SelectionDAG &DAG, return SDValue(); } +static SDValue combineGREVI(SDNode *N, SelectionDAG &DAG, +const RISCVSubtarget &Subtarget) { + // Combine (GREVI (GREVI x, C2), C1) -> (GREVI x, C1^C2) when C1^C2 is + // non-zero, and to x when it is. Any repeated GREVI stage undoes itself. + uint64_t ShAmt1 = N->getConstantOperandVal(1); + SDValue GREVSrc = N->getOperand(0); + + if (GREVSrc->getOpcode() != N->getOpcode()) +return SDValue(); + + uint64_t ShAmt2 = GREVSrc.getConstantOperandVal(1); + GREVSrc = GREVSrc->getOperand(0); + + uint64_t CombinedShAmt = ShAmt1 ^ ShAmt2; + if (CombinedShAmt == 0) +return GREVSrc; + + SDLoc DL(N); + return DAG.getNode( + N->getOpcode(), DL, N->getValueType(0), GREVSrc, + DAG.getTargetConstant(CombinedShAmt, DL, Subtarget.getXLenVT())); +} + SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const { SelectionDAG &DAG = DCI.DAG; @@ -1383,6 +1421,11 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N, DCI.AddToWorklist(N); return SDValue(N, 0); } + +if (N->getOpcode() == RISCVISD::GREVIW) + if (SDValue V = combineGREVI(N, DCI.DAG, Subtarget)) +return V; + break; } case RISCVISD::FMV_X_ANYEXTW_RV64: { @@ -1415,23 +1458,8 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N, return DAG.getNode(ISD::AND, DL, MVT::i64, NewFMV, DAG.getConstant(~SignBit, DL, MVT::i64)); } - case RISCVISD::GREVI: { -// Combine (GREVI (GREVI x, C2), C1) -> (GREVI x, C1^C2) when C1^C2 is -// non-zero, and to x when it is. Any repeated GREVI stage undoes itself. -SDLoc DL(N); -auto GREVSrc = N->getOperand(0); -uint64_t ShAmt1 = N->getConstantOperandVal(1); -if (GREVSrc->getOpcode() != RISCVISD::GREVI) - break; -uint64_t ShAmt2 = GREVSrc.getConstantOperandVal(1); -GREVSrc = GREVSrc->getOperand(0); -uint64_t CombinedShAmt = ShAmt1 ^ ShAmt2; -if (CombinedShAmt == 0) - return GREVSrc; -return DAG.getNode( -RISCVISD::GREVI, DL, N->getValueType(0), GREVSrc, -DAG.getTargetConstant(CombinedShAmt, DL, Subtarget.getXLenVT())); - } + case RISCVISD::GREVI: +return combineGREVI(N, DCI.DAG, Subtarget); case ISD::OR:
[llvm-branch-commits] [llvm] 9eb2c01 - [IR][LoopRotate] remove assertion that phi must have at least one operand
Author: Sanjay Patel Date: 2020-11-30T11:32:42-05:00 New Revision: 9eb2c0113dfe2c1054e524122ca0e17ad552bb01 URL: https://github.com/llvm/llvm-project/commit/9eb2c0113dfe2c1054e524122ca0e17ad552bb01 DIFF: https://github.com/llvm/llvm-project/commit/9eb2c0113dfe2c1054e524122ca0e17ad552bb01.diff LOG: [IR][LoopRotate] remove assertion that phi must have at least one operand This was suggested in D92247 - I initially committed an alternate fix ( bfd2c216ea ) to avoid the crash/assert shown in https://llvm.org/PR48296 , but that was reverted because it caused msan failures on other tests. We can try to revive that patch using the test included here, but I do not have an immediate plan to isolate that problem. Added: llvm/test/Transforms/LoopRotate/phi-empty.ll Modified: llvm/lib/IR/Verifier.cpp Removed: diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp index eda923da8df8..bc24d488d2f7 100644 --- a/llvm/lib/IR/Verifier.cpp +++ b/llvm/lib/IR/Verifier.cpp @@ -2565,11 +2565,6 @@ void Verifier::visitBasicBlock(BasicBlock &BB) { SmallVector, 8> Values; llvm::sort(Preds); for (const PHINode &PN : BB.phis()) { - // Ensure that PHI nodes have at least one entry! - Assert(PN.getNumIncomingValues() != 0, - "PHI nodes must have at least one entry. If the block is dead, " - "the PHI should be removed!", - &PN); Assert(PN.getNumIncomingValues() == Preds.size(), "PHINode should have one entry for each predecessor of its " "parent basic block!", diff --git a/llvm/test/Transforms/LoopRotate/phi-empty.ll b/llvm/test/Transforms/LoopRotate/phi-empty.ll new file mode 100644 index ..9337133f8903 --- /dev/null +++ b/llvm/test/Transforms/LoopRotate/phi-empty.ll @@ -0,0 +1,39 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -S -lcssa -loop-rotate < %s | FileCheck %s + +; After rotate, the phi has no operands because it has no predecessors. +; We might want to delete that instruction instead, but we do not +; fail/assert by assuming that the phi is invalid IR. + +define void @PR48296(i1 %cond) { +; CHECK-LABEL: @PR48296( +; CHECK-NEXT: entry: +; CHECK-NEXT:br label [[LOOP:%.*]] +; CHECK: loop: +; CHECK-NEXT:br i1 [[COND:%.*]], label [[INC:%.*]], label [[LOOP_BACKEDGE:%.*]] +; CHECK: loop.backedge: +; CHECK-NEXT:br label [[LOOP]] +; CHECK: dead: +; CHECK-NEXT:unreachable +; CHECK: inc: +; CHECK-NEXT:br label [[LOOP_BACKEDGE]] +; CHECK: return: +; CHECK-NEXT:[[R:%.*]] = phi i32 +; CHECK-NEXT:ret void +; +entry: + br label %loop + +loop: + br i1 %cond, label %inc, label %loop + +dead:; No predecessors! + br i1 %cond, label %inc, label %return + +inc: + br label %loop + +return: + %r = phi i32 [ undef, %dead ] + ret void +} ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] bfc4f29 - [RISCV] Combine (GORCI (GORCI x, C2), C1) -> (GORCI x, C1|C2).
Author: Craig Topper Date: 2020-11-30T08:42:46-08:00 New Revision: bfc4f29f46b4961c0532cf734f5d15015b4f7120 URL: https://github.com/llvm/llvm-project/commit/bfc4f29f46b4961c0532cf734f5d15015b4f7120 DIFF: https://github.com/llvm/llvm-project/commit/bfc4f29f46b4961c0532cf734f5d15015b4f7120.diff LOG: [RISCV] Combine (GORCI (GORCI x, C2), C1) -> (GORCI x, C1|C2). Unlike GREVI, GORCI stages can't be undone, but they are redundant if done more than once. Differential Revision: https://reviews.llvm.org/D92295 Added: Modified: llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/test/CodeGen/RISCV/rv32Zbp.ll llvm/test/CodeGen/RISCV/rv64Zbp.ll Removed: diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index f1c25512000e..49c81284eba7 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -1303,27 +1303,33 @@ static SDValue combineORToGORC(SDValue Op, SelectionDAG &DAG, return SDValue(); } -static SDValue combineGREVI(SDNode *N, SelectionDAG &DAG, -const RISCVSubtarget &Subtarget) { - // Combine (GREVI (GREVI x, C2), C1) -> (GREVI x, C1^C2) when C1^C2 is - // non-zero, and to x when it is. Any repeated GREVI stage undoes itself. - uint64_t ShAmt1 = N->getConstantOperandVal(1); - SDValue GREVSrc = N->getOperand(0); - - if (GREVSrc->getOpcode() != N->getOpcode()) +// Combine (GREVI (GREVI x, C2), C1) -> (GREVI x, C1^C2) when C1^C2 is +// non-zero, and to x when it is. Any repeated GREVI stage undoes itself. +// Combine (GORCI (GORCI x, C2), C1) -> (GORCI x, C1|C2). Repeated stage does +// not undo itself, but they are redundant. +static SDValue combineGREVI_GORCI(SDNode *N, SelectionDAG &DAG) { + unsigned ShAmt1 = N->getConstantOperandVal(1); + SDValue Src = N->getOperand(0); + + if (Src.getOpcode() != N->getOpcode()) return SDValue(); - uint64_t ShAmt2 = GREVSrc.getConstantOperandVal(1); - GREVSrc = GREVSrc->getOperand(0); + unsigned ShAmt2 = Src.getConstantOperandVal(1); + Src = Src.getOperand(0); + + unsigned CombinedShAmt; + if (N->getOpcode() == RISCVISD::GORCI || N->getOpcode() == RISCVISD::GORCIW) +CombinedShAmt = ShAmt1 | ShAmt2; + else +CombinedShAmt = ShAmt1 ^ ShAmt2; - uint64_t CombinedShAmt = ShAmt1 ^ ShAmt2; if (CombinedShAmt == 0) -return GREVSrc; +return Src; SDLoc DL(N); - return DAG.getNode( - N->getOpcode(), DL, N->getValueType(0), GREVSrc, - DAG.getTargetConstant(CombinedShAmt, DL, Subtarget.getXLenVT())); + return DAG.getNode(N->getOpcode(), DL, N->getValueType(0), Src, + DAG.getTargetConstant(CombinedShAmt, DL, + N->getOperand(1).getValueType())); } SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N, @@ -1422,11 +1428,7 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N, return SDValue(N, 0); } -if (N->getOpcode() == RISCVISD::GREVIW) - if (SDValue V = combineGREVI(N, DCI.DAG, Subtarget)) -return V; - -break; +return combineGREVI_GORCI(N, DCI.DAG); } case RISCVISD::FMV_X_ANYEXTW_RV64: { SDLoc DL(N); @@ -1459,7 +1461,8 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N, DAG.getConstant(~SignBit, DL, MVT::i64)); } case RISCVISD::GREVI: -return combineGREVI(N, DCI.DAG, Subtarget); + case RISCVISD::GORCI: +return combineGREVI_GORCI(N, DCI.DAG); case ISD::OR: if (auto GREV = combineORToGREV(SDValue(N, 0), DCI.DAG, Subtarget)) return GREV; diff --git a/llvm/test/CodeGen/RISCV/rv32Zbp.ll b/llvm/test/CodeGen/RISCV/rv32Zbp.ll index f1b8629f021d..6115f2217fa6 100644 --- a/llvm/test/CodeGen/RISCV/rv32Zbp.ll +++ b/llvm/test/CodeGen/RISCV/rv32Zbp.ll @@ -154,6 +154,118 @@ define i64 @gorc2_i64(i64 %a) nounwind { ret i64 %or2 } +define i32 @gorc3_i32(i32 %a) nounwind { +; RV32I-LABEL: gorc3_i32: +; RV32I: # %bb.0: +; RV32I-NEXT:slli a1, a0, 1 +; RV32I-NEXT:lui a2, 699051 +; RV32I-NEXT:addi a2, a2, -1366 +; RV32I-NEXT:and a1, a1, a2 +; RV32I-NEXT:srli a2, a0, 1 +; RV32I-NEXT:lui a3, 349525 +; RV32I-NEXT:addi a3, a3, 1365 +; RV32I-NEXT:and a2, a2, a3 +; RV32I-NEXT:or a0, a2, a0 +; RV32I-NEXT:or a0, a0, a1 +; RV32I-NEXT:slli a1, a0, 2 +; RV32I-NEXT:lui a2, 838861 +; RV32I-NEXT:addi a2, a2, -820 +; RV32I-NEXT:and a1, a1, a2 +; RV32I-NEXT:srli a2, a0, 2 +; RV32I-NEXT:lui a3, 209715 +; RV32I-NEXT:addi a3, a3, 819 +; RV32I-NEXT:and a2, a2, a3 +; RV32I-NEXT:or a0, a2, a0 +; RV32I-NEXT:or a0, a0, a1 +; RV32I-NEXT:ret +; +; RV32IB-LABEL: gorc3_i32: +; RV32IB: # %bb.0: +; RV32IB-NEXT:orc.n a0, a0 +; RV32IB-NEXT:ret +; +; RV32IBP-LABEL: gorc3_i32: +; RV32IBP: # %bb.0: +; RV32IBP-NEXT:orc.n a0, a0 +;
[llvm-branch-commits] [compiler-rt] 1b723a9 - [sanitizer] Disable use_tls_dynamic on on-Android x86 Linux.
Author: Vy Nguyen Date: 2020-11-30T11:45:36-05:00 New Revision: 1b723a955da04d5a4fc7953c86045b8ef6da2881 URL: https://github.com/llvm/llvm-project/commit/1b723a955da04d5a4fc7953c86045b8ef6da2881 DIFF: https://github.com/llvm/llvm-project/commit/1b723a955da04d5a4fc7953c86045b8ef6da2881.diff LOG: [sanitizer] Disable use_tls_dynamic on on-Android x86 Linux. https://bugs.chromium.org/p/chromium/issues/detail?id=1153421 Differential Revision: https://reviews.llvm.org/D92273 Added: Modified: compiler-rt/test/lsan/TestCases/Linux/use_tls_dynamic.cpp Removed: diff --git a/compiler-rt/test/lsan/TestCases/Linux/use_tls_dynamic.cpp b/compiler-rt/test/lsan/TestCases/Linux/use_tls_dynamic.cpp index 14368ef407beb..be1cdc943c6ab 100644 --- a/compiler-rt/test/lsan/TestCases/Linux/use_tls_dynamic.cpp +++ b/compiler-rt/test/lsan/TestCases/Linux/use_tls_dynamic.cpp @@ -10,7 +10,7 @@ // RUN: %env_lsan_opts=$LSAN_BASE:"use_tls=0" not %run %t 2>&1 | FileCheck %s // RUN: %env_lsan_opts=$LSAN_BASE:"use_tls=1" %run %t 2>&1 // RUN: %env_lsan_opts="" %run %t 2>&1 -// UNSUPPORTED: arm,powerpc +// UNSUPPORTED: arm,powerpc,i386-linux && !android #ifndef BUILD_DSO #include ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] 7a91794 - [Flang][OpenMP] Add semantic checks for OpenMP Private clause.
Author: Praveen G Date: 2020-11-30T11:46:36-05:00 New Revision: 7a91794d5b261bc87991d5acce9fa503e9a4f269 URL: https://github.com/llvm/llvm-project/commit/7a91794d5b261bc87991d5acce9fa503e9a4f269 DIFF: https://github.com/llvm/llvm-project/commit/7a91794d5b261bc87991d5acce9fa503e9a4f269.diff LOG: [Flang][OpenMP] Add semantic checks for OpenMP Private clause. Add the semantic checks for the OpenMP 4.5 - 2.15.3.3 Private clause. 1. Pointers with the INTENT(IN) attribute may not appear in a private clause. 2. Variables that appear in namelist statements may not appear in a private clause. A flag 'InNamelist' is added to the Symbol::Flag to identify the symbols in Namelist statemnts. Test cases : omp-private01.f90, omp-private02.f90 Reviewed By: kiranchandramohan Differential Revision: https://reviews.llvm.org/D90210 Added: flang/test/Semantics/omp-private01.f90 flang/test/Semantics/omp-private02.f90 Modified: flang/include/flang/Semantics/symbol.h flang/lib/Semantics/check-omp-structure.cpp flang/lib/Semantics/check-omp-structure.h flang/lib/Semantics/resolve-directives.cpp flang/lib/Semantics/resolve-names.cpp Removed: diff --git a/flang/include/flang/Semantics/symbol.h b/flang/include/flang/Semantics/symbol.h index 29b2696d82e5..246bf2d0b338 100644 --- a/flang/include/flang/Semantics/symbol.h +++ b/flang/include/flang/Semantics/symbol.h @@ -493,6 +493,7 @@ class Symbol { LocalityLocalInit, // named in LOCAL_INIT locality-spec LocalityShared, // named in SHARED locality-spec InDataStmt, // initialized in a DATA statement + InNamelist, // flag is set if the symbol is in Namelist statement // OpenACC data-sharing attribute AccPrivate, AccFirstPrivate, AccShared, // OpenACC data-mapping attribute diff --git a/flang/lib/Semantics/check-omp-structure.cpp b/flang/lib/Semantics/check-omp-structure.cpp index 636471da78d1..9ed73e65e57c 100644 --- a/flang/lib/Semantics/check-omp-structure.cpp +++ b/flang/lib/Semantics/check-omp-structure.cpp @@ -417,6 +417,7 @@ void OmpStructureChecker::Enter(const parser::OmpClause::Shared &x) { void OmpStructureChecker::Enter(const parser::OmpClause::Private &x) { CheckAllowed(llvm::omp::Clause::OMPC_private); CheckIsVarPartOfAnotherVar(x.v); + CheckIntentInPointer(x.v, llvm::omp::Clause::OMPC_private); } void OmpStructureChecker::CheckIsVarPartOfAnotherVar( @@ -693,4 +694,38 @@ void OmpStructureChecker::CheckDependArraySection( } } +void OmpStructureChecker::CheckIntentInPointer( +const parser::OmpObjectList &objectList, const llvm::omp::Clause clause) { + std::vector symbols; + GetSymbolsInObjectList(objectList, symbols); + for (const auto *symbol : symbols) { +if (IsPointer(*symbol) && IsIntentIn(*symbol)) { + context_.Say(GetContext().clauseSource, + "Pointer '%s' with the INTENT(IN) attribute may not appear " + "in a %s clause"_err_en_US, + symbol->name(), + parser::ToUpperCaseLetters(getClauseName(clause).str())); +} + } +} + +void OmpStructureChecker::GetSymbolsInObjectList( +const parser::OmpObjectList &objectList, +std::vector &symbols) { + for (const auto &ompObject : objectList.v) { +if (const auto *name{parser::Unwrap(ompObject)}) { + if (const auto *symbol{name->symbol}) { +if (const auto *commonBlockDetails{ +symbol->detailsIf()}) { + for (const auto &object : commonBlockDetails->objects()) { +symbols.emplace_back(&object->GetUltimate()); + } +} else { + symbols.emplace_back(&symbol->GetUltimate()); +} + } +} + } +} + } // namespace Fortran::semantics diff --git a/flang/lib/Semantics/check-omp-structure.h b/flang/lib/Semantics/check-omp-structure.h index 5539ca2566f2..bb1509b4bdfb 100644 --- a/flang/lib/Semantics/check-omp-structure.h +++ b/flang/lib/Semantics/check-omp-structure.h @@ -185,8 +185,11 @@ class OmpStructureChecker void CheckDependList(const parser::DataRef &); void CheckDependArraySection( const common::Indirection &, const parser::Name &); - void CheckIsVarPartOfAnotherVar(const parser::OmpObjectList &objList); + void CheckIntentInPointer( + const parser::OmpObjectList &, const llvm::omp::Clause); + void GetSymbolsInObjectList( + const parser::OmpObjectList &, std::vector &); }; } // namespace Fortran::semantics #endif // FORTRAN_SEMANTICS_CHECK_OMP_STRUCTURE_H_ diff --git a/flang/lib/Semantics/resolve-directives.cpp b/flang/lib/Semantics/resolve-directives.cpp index f34cb69beca9..56f8f8fae955 100644 --- a/flang/lib/Semantics/resolve-directives.cpp +++ b/flang/lib/Semantics/resolve-directives.cpp @@ -375,6 +375,8 @@ class OmpAttributeVisitor : DirectiveAttributeVisitor { const parser::Name &, const Symbol &, Symbol::Flag); void CheckAssocL
[llvm-branch-commits] [clang] 70eb2ce - [ASTImporter] Support import of CXXDeductionGuideDecl
Author: Gabor Marton Date: 2020-11-30T17:55:25+01:00 New Revision: 70eb2ce395be1fe39ceede6719aa667658d1e5a3 URL: https://github.com/llvm/llvm-project/commit/70eb2ce395be1fe39ceede6719aa667658d1e5a3 DIFF: https://github.com/llvm/llvm-project/commit/70eb2ce395be1fe39ceede6719aa667658d1e5a3.diff LOG: [ASTImporter] Support import of CXXDeductionGuideDecl CXXDeductionGuideDecl is a FunctionDecl, but its constructor should be called appropriately, at least to set the kind variable properly. Differential Revision: https://reviews.llvm.org/D92109 Added: Modified: clang/lib/AST/ASTImporter.cpp clang/unittests/AST/ASTImporterTest.cpp Removed: diff --git a/clang/lib/AST/ASTImporter.cpp b/clang/lib/AST/ASTImporter.cpp index 01ee8d275af1..1b014314996b 100644 --- a/clang/lib/AST/ASTImporter.cpp +++ b/clang/lib/AST/ASTImporter.cpp @@ -499,6 +499,7 @@ namespace clang { ExpectedDecl VisitCXXConstructorDecl(CXXConstructorDecl *D); ExpectedDecl VisitCXXDestructorDecl(CXXDestructorDecl *D); ExpectedDecl VisitCXXConversionDecl(CXXConversionDecl *D); +ExpectedDecl VisitCXXDeductionGuideDecl(CXXDeductionGuideDecl *D); ExpectedDecl VisitFieldDecl(FieldDecl *D); ExpectedDecl VisitIndirectFieldDecl(IndirectFieldDecl *D); ExpectedDecl VisitFriendDecl(FriendDecl *D); @@ -3328,6 +3329,17 @@ ExpectedDecl ASTNodeImporter::VisitFunctionDecl(FunctionDecl *D) { return ToPOrErr.takeError(); } + // Common code to import an explicit specifier of diff erent kind of functions. + auto ImportExplicitExpr = [this, &Err](auto *Fun) -> ExpectedExpr { +Expr *ExplicitExpr = nullptr; +if (Fun->getExplicitSpecifier().getExpr()) { + ExplicitExpr = importChecked(Err, Fun->getExplicitSpecifier().getExpr()); + if (Err) +return std::move(Err); +} +return ExplicitExpr; + }; + // Create the imported function. FunctionDecl *ToFunction = nullptr; if (auto *FromConstructor = dyn_cast(D)) { @@ -3369,17 +3381,13 @@ ExpectedDecl ASTNodeImporter::VisitFunctionDecl(FunctionDecl *D) { ToDtor->setOperatorDelete(ToOperatorDelete, ToThisArg); } else if (CXXConversionDecl *FromConversion = dyn_cast(D)) { -Expr *ExplicitExpr = nullptr; -if (FromConversion->getExplicitSpecifier().getExpr()) { - auto Imp = import(FromConversion->getExplicitSpecifier().getExpr()); - if (!Imp) -return Imp.takeError(); - ExplicitExpr = *Imp; -} +ExpectedExpr ExplicitExpr = ImportExplicitExpr(FromConversion); +if (!ExplicitExpr) + return ExplicitExpr.takeError(); if (GetImportedOrCreateDecl( ToFunction, D, Importer.getToContext(), cast(DC), ToInnerLocStart, NameInfo, T, TInfo, D->isInlineSpecified(), -ExplicitSpecifier(ExplicitExpr, +ExplicitSpecifier(*ExplicitExpr, FromConversion->getExplicitSpecifier().getKind()), D->getConstexprKind(), SourceLocation(), TrailingRequiresClause)) return ToFunction; @@ -3390,6 +3398,18 @@ ExpectedDecl ASTNodeImporter::VisitFunctionDecl(FunctionDecl *D) { Method->isInlineSpecified(), D->getConstexprKind(), SourceLocation(), TrailingRequiresClause)) return ToFunction; + } else if (auto *Guide = dyn_cast(D)) { +ExpectedExpr ExplicitExpr = ImportExplicitExpr(Guide); +if (!ExplicitExpr) + return ExplicitExpr.takeError(); +if (GetImportedOrCreateDecl( +ToFunction, D, Importer.getToContext(), DC, ToInnerLocStart, +ExplicitSpecifier(*ExplicitExpr, + Guide->getExplicitSpecifier().getKind()), +NameInfo, T, TInfo, ToEndLoc)) + return ToFunction; +cast(ToFunction) +->setIsCopyDeductionCandidate(Guide->isCopyDeductionCandidate()); } else { if (GetImportedOrCreateDecl( ToFunction, D, Importer.getToContext(), DC, ToInnerLocStart, @@ -3517,6 +3537,11 @@ ExpectedDecl ASTNodeImporter::VisitCXXConversionDecl(CXXConversionDecl *D) { return VisitCXXMethodDecl(D); } +ExpectedDecl +ASTNodeImporter::VisitCXXDeductionGuideDecl(CXXDeductionGuideDecl *D) { + return VisitFunctionDecl(D); +} + ExpectedDecl ASTNodeImporter::VisitFieldDecl(FieldDecl *D) { // Import the major distinguishing characteristics of a variable. DeclContext *DC, *LexicalDC; diff --git a/clang/unittests/AST/ASTImporterTest.cpp b/clang/unittests/AST/ASTImporterTest.cpp index 81a92a10f48d..7e56b3ed501f 100644 --- a/clang/unittests/AST/ASTImporterTest.cpp +++ b/clang/unittests/AST/ASTImporterTest.cpp @@ -5957,6 +5957,47 @@ TEST_P(ImportWithExternalSource, CompleteRecordBeforeImporting) { EXPECT_EQ(Record, CompletedTags.front()); } +TEST_P(ImportFunctions, CTADImplicit) { + Decl *FromTU = getTuDecl( + R"( + template struct A { +A(T); + };
[llvm-branch-commits] [clang] abfbc55 - [FPEnv] clang should get from the AST the metadata for constrained FP builtins
Author: Kevin P. Neal Date: 2020-11-30T11:59:37-05:00 New Revision: abfbc5579bd4507ae286d4f29f8a157de0629372 URL: https://github.com/llvm/llvm-project/commit/abfbc5579bd4507ae286d4f29f8a157de0629372 DIFF: https://github.com/llvm/llvm-project/commit/abfbc5579bd4507ae286d4f29f8a157de0629372.diff LOG: [FPEnv] clang should get from the AST the metadata for constrained FP builtins Currently clang is not correctly retrieving from the AST the metadata for constrained FP builtins. This patch fixes that for the non-target specific builtins. Differential Revision: https://reviews.llvm.org/D92122 Added: clang/test/CodeGen/strictfp_fpclassify.c Modified: clang/lib/CodeGen/CGBuiltin.cpp clang/test/CodeGen/builtin_float_strictfp.c clang/test/CodeGen/constrained-math-builtins.c Removed: diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 828d66f83de9..73897a27bd94 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -440,6 +440,7 @@ static Value *emitUnaryMaybeConstrainedFPBuiltin(CodeGenFunction &CGF, llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); if (CGF.Builder.getIsFPConstrained()) { +CodeGenFunction::CGFPOptionsRAII FPOptsRAII(CGF, E); Function *F = CGF.CGM.getIntrinsic(ConstrainedIntrinsicID, Src0->getType()); return CGF.Builder.CreateConstrainedFPCall(F, { Src0 }); } else { @@ -457,6 +458,7 @@ static Value *emitBinaryMaybeConstrainedFPBuiltin(CodeGenFunction &CGF, llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); if (CGF.Builder.getIsFPConstrained()) { +CodeGenFunction::CGFPOptionsRAII FPOptsRAII(CGF, E); Function *F = CGF.CGM.getIntrinsic(ConstrainedIntrinsicID, Src0->getType()); return CGF.Builder.CreateConstrainedFPCall(F, { Src0, Src1 }); } else { @@ -475,6 +477,7 @@ static Value *emitTernaryMaybeConstrainedFPBuiltin(CodeGenFunction &CGF, llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); if (CGF.Builder.getIsFPConstrained()) { +CodeGenFunction::CGFPOptionsRAII FPOptsRAII(CGF, E); Function *F = CGF.CGM.getIntrinsic(ConstrainedIntrinsicID, Src0->getType()); return CGF.Builder.CreateConstrainedFPCall(F, { Src0, Src1, Src2 }); } else { @@ -556,6 +559,7 @@ emitMaybeConstrainedFPToIntRoundBuiltin(CodeGenFunction &CGF, const CallExpr *E, llvm::Value *Src0 = CGF.EmitScalarExpr(E->getArg(0)); if (CGF.Builder.getIsFPConstrained()) { +CodeGenFunction::CGFPOptionsRAII FPOptsRAII(CGF, E); Function *F = CGF.CGM.getIntrinsic(ConstrainedIntrinsicID, {ResultType, Src0->getType()}); return CGF.Builder.CreateConstrainedFPCall(F, {Src0}); @@ -2218,6 +,7 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, case Builtin::BI__builtin_fmodf16: case Builtin::BI__builtin_fmodl: case Builtin::BI__builtin_fmodf128: { + CodeGenFunction::CGFPOptionsRAII FPOptsRAII(*this, E); Value *Arg1 = EmitScalarExpr(E->getArg(0)); Value *Arg2 = EmitScalarExpr(E->getArg(1)); return RValue::get(Builder.CreateFRem(Arg1, Arg2, "fmod")); @@ -2828,6 +2833,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, case Builtin::BI__builtin_isunordered: { // Ordered comparisons: we know the arguments to these are matching scalar // floating point values. +CodeGenFunction::CGFPOptionsRAII FPOptsRAII(*this, E); +// FIXME: for strictfp/IEEE-754 we need to not trap on SNaN here. Value *LHS = EmitScalarExpr(E->getArg(0)); Value *RHS = EmitScalarExpr(E->getArg(1)); @@ -2856,6 +2863,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, return RValue::get(Builder.CreateZExt(LHS, ConvertType(E->getType(; } case Builtin::BI__builtin_isnan: { +CodeGenFunction::CGFPOptionsRAII FPOptsRAII(*this, E); +// FIXME: for strictfp/IEEE-754 we need to not trap on SNaN here. Value *V = EmitScalarExpr(E->getArg(0)); V = Builder.CreateFCmpUNO(V, V, "cmp"); return RValue::get(Builder.CreateZExt(V, ConvertType(E->getType(; @@ -2919,6 +2928,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, // isinf(x)--> fabs(x) == infinity // isfinite(x) --> fabs(x) != infinity // x != NaN via the ordered compare in either case. +CodeGenFunction::CGFPOptionsRAII FPOptsRAII(*this, E); +// FIXME: for strictfp/IEEE-754 we need to not trap on SNaN here. Value *V = EmitScalarExpr(E->getArg(0)); Value *Fabs = EmitFAbs(*this, V); Constant *Infinity = ConstantFP::getInfinity(V->getType()); @@ -2931,6 +2942,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, case Builtin::BI__builtin_isinf_sign: { // isinf_sign(x) -> fabs(x) == infinity ? (sign
[llvm-branch-commits] [clang] ee073c7 - [analyzer][StdLibraryFunctionsChecker] Fix typos in summaries of mmap and mmap64
Author: Balazs Benics Date: 2020-11-30T18:06:28+01:00 New Revision: ee073c798515e56b23463391a7b40d5ee6527337 URL: https://github.com/llvm/llvm-project/commit/ee073c798515e56b23463391a7b40d5ee6527337 DIFF: https://github.com/llvm/llvm-project/commit/ee073c798515e56b23463391a7b40d5ee6527337.diff LOG: [analyzer][StdLibraryFunctionsChecker] Fix typos in summaries of mmap and mmap64 The fd parameter of ``` void *mmap(void *addr, size_t length, int prot, int flags, int fd, off_t offset) ``` should be constrained to the range [0, IntMax] as that is of type int. Constraining to the range [0, Off_tMax] would result in a crash as that is of a signed type with the value of 0xff..f (-1). The crash would happen when we try to apply the arg constraints. At line 583: assert(Min <= Max), as 0 <= -1 is not satisfied The mmap64 is fixed for the same reason. Reviewed By: martong, vsavchenko Differential Revision: https://reviews.llvm.org/D92307 Added: clang/test/Analysis/std-c-library-posix-crash.c Modified: clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp Removed: diff --git a/clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp index 10011effe039..f8eafde3218d 100644 --- a/clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp @@ -1722,7 +1722,6 @@ void StdLibraryFunctionsChecker::initFunctionSummaries( "ftello", Signature(ArgTypes{FilePtrTy}, RetType{Off_tTy}), Summary(NoEvalCall).ArgConstraint(NotNull(ArgNo(0; -Optional Off_tMax = getMaxValue(Off_tTy); // void *mmap(void *addr, size_t length, int prot, int flags, int fd, // off_t offset); addToFunctionSummaryMap( @@ -1732,10 +1731,9 @@ void StdLibraryFunctionsChecker::initFunctionSummaries( Summary(NoEvalCall) .ArgConstraint(ArgumentCondition(1, WithinRange, Range(1, SizeMax))) .ArgConstraint( -ArgumentCondition(4, WithinRange, Range(0, Off_tMax; +ArgumentCondition(4, WithinRange, Range(0, IntMax; Optional Off64_tTy = lookupTy("off64_t"); -Optional Off64_tMax = getMaxValue(Off_tTy); // void *mmap64(void *addr, size_t length, int prot, int flags, int fd, // off64_t offset); addToFunctionSummaryMap( @@ -1745,7 +1743,7 @@ void StdLibraryFunctionsChecker::initFunctionSummaries( Summary(NoEvalCall) .ArgConstraint(ArgumentCondition(1, WithinRange, Range(1, SizeMax))) .ArgConstraint( -ArgumentCondition(4, WithinRange, Range(0, Off64_tMax; +ArgumentCondition(4, WithinRange, Range(0, IntMax; // int pipe(int fildes[2]); addToFunctionSummaryMap( diff --git a/clang/test/Analysis/std-c-library-posix-crash.c b/clang/test/Analysis/std-c-library-posix-crash.c new file mode 100644 index ..23321d548d6d --- /dev/null +++ b/clang/test/Analysis/std-c-library-posix-crash.c @@ -0,0 +1,18 @@ +// RUN: %clang_analyze_cc1 \ +// RUN: -analyzer-checker=core,apiModeling.StdCLibraryFunctions \ +// RUN: -analyzer-config apiModeling.StdCLibraryFunctions:ModelPOSIX=true \ +// RUN: -verify %s +// +// expected-no-diagnostics + +typedef long off_t; +typedef long long off64_t; +typedef unsigned long size_t; + +void *mmap(void *addr, size_t length, int prot, int flags, int fd, off_t offset); +void *mmap64(void *addr, size_t length, int prot, int flags, int fd, off64_t offset); + +void test(long len) { + mmap(0, len, 2, 1, 0, 0); // no-crash + mmap64(0, len, 2, 1, 0, 0); // no-crash +} ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] bc7b268 - Add -fintegrated-as to second invocation of clang in test case.
Author: Zarko Todorovski Date: 2020-11-30T12:15:25-05:00 New Revision: bc7b2688d6762687ab4ec103d214ce5bb5d4210f URL: https://github.com/llvm/llvm-project/commit/bc7b2688d6762687ab4ec103d214ce5bb5d4210f DIFF: https://github.com/llvm/llvm-project/commit/bc7b2688d6762687ab4ec103d214ce5bb5d4210f.diff LOG: Add -fintegrated-as to second invocation of clang in test case. Added: Modified: clang/test/Driver/report-stat.c Removed: diff --git a/clang/test/Driver/report-stat.c b/clang/test/Driver/report-stat.c index 621b99384b27..3662d0df47cc 100644 --- a/clang/test/Driver/report-stat.c +++ b/clang/test/Driver/report-stat.c @@ -1,6 +1,6 @@ // RUN: %clang -c -fproc-stat-report -fintegrated-as %s | FileCheck %s // CHECK: clang{{.*}}: output={{.*}}.o, total={{[0-9.]+}} ms, user={{[0-9.]+}} ms, mem={{[0-9]+}} Kb -// RUN: %clang -c -fproc-stat-report=%t %s +// RUN: %clang -c -fintegrated-as -fproc-stat-report=%t %s // RUN: cat %t | FileCheck --check-prefix=CSV %s // CSV: clang{{.*}},"{{.*}}.o",{{[0-9]+}},{{[0-9]+}},{{[0-9]+}} ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 6fe6105 - [VE] Clean check routines of branch types
Author: Kazushi (Jam) Marukawa Date: 2020-12-01T02:19:37+09:00 New Revision: 6fe610535f4e0654766a1ace6acafc22150c951d URL: https://github.com/llvm/llvm-project/commit/6fe610535f4e0654766a1ace6acafc22150c951d DIFF: https://github.com/llvm/llvm-project/commit/6fe610535f4e0654766a1ace6acafc22150c951d.diff LOG: [VE] Clean check routines of branch types Previously, these check routines accepted non-generatble instructions. This time, I clean them and add assert for those non-generatable instructions. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D92254 Added: llvm/test/CodeGen/VE/Scalar/br_analyze.ll Modified: llvm/lib/Target/VE/VEInstrInfo.cpp Removed: diff --git a/llvm/lib/Target/VE/VEInstrInfo.cpp b/llvm/lib/Target/VE/VEInstrInfo.cpp index eb375ccca371..1dfb1d8985c4 100644 --- a/llvm/lib/Target/VE/VEInstrInfo.cpp +++ b/llvm/lib/Target/VE/VEInstrInfo.cpp @@ -92,38 +92,46 @@ static VECC::CondCode GetOppositeBranchCondition(VECC::CondCode CC) { llvm_unreachable("Invalid cond code"); } -// Treat br.l [BRCF AT] as unconditional branch +// Treat a branch relative long always instruction as unconditional branch. +// For example, br.l.t and br.l. static bool isUncondBranchOpcode(int Opc) { - return Opc == VE::BRCFLa|| Opc == VE::BRCFWa|| - Opc == VE::BRCFLa_nt || Opc == VE::BRCFWa_nt || - Opc == VE::BRCFLa_t || Opc == VE::BRCFWa_t || - Opc == VE::BRCFDa|| Opc == VE::BRCFSa|| - Opc == VE::BRCFDa_nt || Opc == VE::BRCFSa_nt || - Opc == VE::BRCFDa_t || Opc == VE::BRCFSa_t; + using namespace llvm::VE; + +#define BRKIND(NAME) (Opc == NAME##a || Opc == NAME##a_nt || Opc == NAME##a_t) + // VE has other branch relative always instructions for word/double/float, + // but we use only long branches in our lower. So, sanity check it here. + assert(!BRKIND(BRCFW) && !BRKIND(BRCFD) && !BRKIND(BRCFS) && + "Branch relative word/double/float always instructions should not be " + "used!"); + return BRKIND(BRCFL); +#undef BRKIND } +// Treat branch relative conditional as conditional branch instructions. +// For example, brgt.l.t and brle.s.nt. static bool isCondBranchOpcode(int Opc) { - return Opc == VE::BRCFLrr|| Opc == VE::BRCFLir|| - Opc == VE::BRCFLrr_nt || Opc == VE::BRCFLir_nt || - Opc == VE::BRCFLrr_t || Opc == VE::BRCFLir_t || - Opc == VE::BRCFWrr|| Opc == VE::BRCFWir|| - Opc == VE::BRCFWrr_nt || Opc == VE::BRCFWir_nt || - Opc == VE::BRCFWrr_t || Opc == VE::BRCFWir_t || - Opc == VE::BRCFDrr|| Opc == VE::BRCFDir|| - Opc == VE::BRCFDrr_nt || Opc == VE::BRCFDir_nt || - Opc == VE::BRCFDrr_t || Opc == VE::BRCFDir_t || - Opc == VE::BRCFSrr|| Opc == VE::BRCFSir|| - Opc == VE::BRCFSrr_nt || Opc == VE::BRCFSir_nt || - Opc == VE::BRCFSrr_t || Opc == VE::BRCFSir_t; + using namespace llvm::VE; + +#define BRKIND(NAME) \ + (Opc == NAME##rr || Opc == NAME##rr_nt || Opc == NAME##rr_t || \ + Opc == NAME##ir || Opc == NAME##ir_nt || Opc == NAME##ir_t) + return BRKIND(BRCFL) || BRKIND(BRCFW) || BRKIND(BRCFD) || BRKIND(BRCFS); +#undef BRKIND } +// Treat branch long always instructions as indirect branch. +// For example, b.l.t and b.l. static bool isIndirectBranchOpcode(int Opc) { - return Opc == VE::BCFLari|| Opc == VE::BCFLari|| - Opc == VE::BCFLari_nt || Opc == VE::BCFLari_nt || - Opc == VE::BCFLari_t || Opc == VE::BCFLari_t || - Opc == VE::BCFLari|| Opc == VE::BCFLari|| - Opc == VE::BCFLari_nt || Opc == VE::BCFLari_nt || - Opc == VE::BCFLari_t || Opc == VE::BCFLari_t; + using namespace llvm::VE; + +#define BRKIND(NAME) \ + (Opc == NAME##ari || Opc == NAME##ari_nt || Opc == NAME##ari_t) + // VE has other branch always instructions for word/double/float, but + // we use only long branches in our lower. So, sanity check it here. + assert(!BRKIND(BCFW) && !BRKIND(BCFD) && !BRKIND(BCFS) && + "Branch word/double/float always instructions should not be used!"); + return BRKIND(BCFL); +#undef BRKIND } static void parseCondBranch(MachineInstr *LastInst, MachineBasicBlock *&Target, diff --git a/llvm/test/CodeGen/VE/Scalar/br_analyze.ll b/llvm/test/CodeGen/VE/Scalar/br_analyze.ll new file mode 100644 index ..b983fb67c2ee --- /dev/null +++ b/llvm/test/CodeGen/VE/Scalar/br_analyze.ll @@ -0,0 +1,96 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=ve | FileCheck %s + +declare void @foo() noreturn + +;;; Check a case where a separate branch is needed and where the original +;;; order should be reversed. Copied from Syst
[llvm-branch-commits] [llvm] 6834b3d - [VE] Optimize prologue/epilogue instructions about GOT
Author: Kazushi (Jam) Marukawa Date: 2020-12-01T02:22:31+09:00 New Revision: 6834b3d6d52a4083113eea52e2afb4d2c915602c URL: https://github.com/llvm/llvm-project/commit/6834b3d6d52a4083113eea52e2afb4d2c915602c DIFF: https://github.com/llvm/llvm-project/commit/6834b3d6d52a4083113eea52e2afb4d2c915602c.diff LOG: [VE] Optimize prologue/epilogue instructions about GOT Optimize prologue/epilogue instructions if a given function use GOT but do not call other functions by eliminating FP. Previously, we had wrong implementations taken from other architectures. Update regression tests also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D92313 Added: Modified: llvm/lib/Target/VE/VEISelLowering.cpp llvm/test/CodeGen/VE/Scalar/br_jt.ll llvm/test/CodeGen/VE/Scalar/function_prologue_epilogue.ll llvm/test/CodeGen/VE/Scalar/pic_access_data.ll llvm/test/CodeGen/VE/Scalar/pic_access_static_data.ll llvm/test/CodeGen/VE/Scalar/stackframe_nocall.ll Removed: diff --git a/llvm/lib/Target/VE/VEISelLowering.cpp b/llvm/lib/Target/VE/VEISelLowering.cpp index cc7f5f6800ec..25a3910a48e4 100644 --- a/llvm/lib/Target/VE/VEISelLowering.cpp +++ b/llvm/lib/Target/VE/VEISelLowering.cpp @@ -913,10 +913,6 @@ SDValue VETargetLowering::makeAddress(SDValue Op, SelectionDAG &DAG) const { // Handle PIC mode first. VE needs a got load for every variable! if (isPositionIndependent()) { -// GLOBAL_BASE_REG codegen'ed with call. Inform MFI that this -// function has calls. -MachineFrameInfo &MFI = DAG.getMachineFunction().getFrameInfo(); -MFI.setHasCalls(true); auto GlobalN = dyn_cast(Op); if (isa(Op) || isa(Op) || diff --git a/llvm/test/CodeGen/VE/Scalar/br_jt.ll b/llvm/test/CodeGen/VE/Scalar/br_jt.ll index 88d5378830a1..3000ff27251a 100644 --- a/llvm/test/CodeGen/VE/Scalar/br_jt.ll +++ b/llvm/test/CodeGen/VE/Scalar/br_jt.ll @@ -92,7 +92,9 @@ define signext i32 @br_jt4(i32 signext %0) { ; CHECK-NEXT:b.l.t (, %s10) ; ; PIC-LABEL: br_jt4: -; PIC: .LBB{{[0-9]+}}_5: +; PIC: # %bb.0: +; PIC-NEXT:st %s15, 24(, %s11) +; PIC-NEXT:st %s16, 32(, %s11) ; PIC-NEXT:and %s0, %s0, (32)0 ; PIC-NEXT:adds.w.sx %s1, -1, %s0 ; PIC-NEXT:cmpu.w %s2, 3, %s1 @@ -112,7 +114,9 @@ define signext i32 @br_jt4(i32 signext %0) { ; PIC-NEXT: .LBB1_2: ; PIC-NEXT:adds.w.sx %s0, %s0, (0)1 ; PIC-NEXT: .LBB1_3: -; PIC-NEXT:or %s11, 0, %s9 +; PIC-NEXT:ld %s16, 32(, %s11) +; PIC-NEXT:ld %s15, 24(, %s11) +; PIC-NEXT:b.l.t (, %s10) %2 = add i32 %0, -1 %3 = icmp ult i32 %2, 4 br i1 %3, label %4, label %8 @@ -155,7 +159,9 @@ define signext i32 @br_jt7(i32 signext %0) { ; CHECK-NEXT:b.l.t (, %s10) ; ; PIC-LABEL: br_jt7: -; PIC: .LBB{{[0-9]+}}_6: +; PIC: # %bb.0: +; PIC-NEXT:st %s15, 24(, %s11) +; PIC-NEXT:st %s16, 32(, %s11) ; PIC-NEXT:and %s0, %s0, (32)0 ; PIC-NEXT:adds.w.sx %s1, -1, %s0 ; PIC-NEXT:cmpu.w %s2, 8, %s1 @@ -182,7 +188,9 @@ define signext i32 @br_jt7(i32 signext %0) { ; PIC-NEXT:lea.sl %s1, .Lswitch.table.br_jt7@gotoff_hi(%s1, %s15) ; PIC-NEXT:ldl.sx %s0, (%s0, %s1) ; PIC-NEXT: .LBB2_4: -; PIC-NEXT:or %s11, 0, %s9 +; PIC-NEXT:ld %s16, 32(, %s11) +; PIC-NEXT:ld %s15, 24(, %s11) +; PIC-NEXT:b.l.t (, %s10) %2 = add i32 %0, -1 %3 = icmp ult i32 %2, 9 br i1 %3, label %4, label %13 @@ -232,7 +240,9 @@ define signext i32 @br_jt8(i32 signext %0) { ; CHECK-NEXT:b.l.t (, %s10) ; ; PIC-LABEL: br_jt8: -; PIC: .LBB{{[0-9]+}}_6: +; PIC: # %bb.0: +; PIC-NEXT:st %s15, 24(, %s11) +; PIC-NEXT:st %s16, 32(, %s11) ; PIC-NEXT:and %s0, %s0, (32)0 ; PIC-NEXT:adds.w.sx %s1, -1, %s0 ; PIC-NEXT:cmpu.w %s2, 8, %s1 @@ -259,7 +269,9 @@ define signext i32 @br_jt8(i32 signext %0) { ; PIC-NEXT:lea.sl %s1, .Lswitch.table.br_jt8@gotoff_hi(%s1, %s15) ; PIC-NEXT:ldl.sx %s0, (%s0, %s1) ; PIC-NEXT: .LBB3_4: -; PIC-NEXT:or %s11, 0, %s9 +; PIC-NEXT:ld %s16, 32(, %s11) +; PIC-NEXT:ld %s15, 24(, %s11) +; PIC-NEXT:b.l.t (, %s10) %2 = add i32 %0, -1 %3 = icmp ult i32 %2, 9 br i1 %3, label %4, label %13 @@ -625,7 +637,9 @@ define signext i32 @br_jt8_m(i32 signext %0, i32 signext %1) { ; CHECK-NEXT:b.l.t (, %s10) ; ; PIC-LABEL: br_jt8_m: -; PIC: .LBB{{[0-9]+}}_12: +; PIC: # %bb.0: +; PIC-NEXT:st %s15, 24(, %s11) +; PIC-NEXT:st %s16, 32(, %s11) ; PIC-NEXT:and %s2, %s0, (32)0 ; PIC-NEXT:adds.w.sx %s0, -1, %s2 ; PIC-NEXT:cmpu.w %s3, 8, %s0 @@ -673,7 +687,9 @@ define signext i32 @br_jt8_m(i32 signext %0, i32 signext %1) { ; PIC-NEXT:or %s0, 10, (0)1 ; PIC-NEXT: .LBB7_10: ; PIC-NEXT:adds.w.sx %s0, %s0, (0)1 -; PIC-NEXT:or %s11, 0, %s9 +; PIC-NEXT:ld %s16, 32(, %s11) +; PIC-NEXT:ld %s15, 24(, %s11) +; PIC-NEXT:b.l.t (, %s10) switch i32 %
[llvm-branch-commits] [llvm] f6150aa - [SelectionDAGBuilder] Update signature of `getRegsAndSizes()`.
Author: Francesco Petrogalli Date: 2020-11-30T17:38:51Z New Revision: f6150aa41a48ac8b5372fe4d6ccdfff96e432431 URL: https://github.com/llvm/llvm-project/commit/f6150aa41a48ac8b5372fe4d6ccdfff96e432431 DIFF: https://github.com/llvm/llvm-project/commit/f6150aa41a48ac8b5372fe4d6ccdfff96e432431.diff LOG: [SelectionDAGBuilder] Update signature of `getRegsAndSizes()`. The mapping between registers and relative size has been updated to use TypeSize to account for the size of scalable EVTs. The patch is a NFCI, if not for the fact that with this change the function `getUnderlyingArgRegs` does not raise a warning for implicit conversion of `TypeSize` to `unsigned` when generating machine code from the test added to the patch. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D92096 Added: llvm/test/CodeGen/AArch64/sdag-no-typesize-warnings-regandsizes.ll Modified: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Removed: diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index dd5beb33ecce..9d2174f4b85a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -980,14 +980,14 @@ void RegsForValue::AddInlineAsmOperands(unsigned Code, bool HasMatching, } } -SmallVector, 4> +SmallVector, 4> RegsForValue::getRegsAndSizes() const { - SmallVector, 4> OutVec; + SmallVector, 4> OutVec; unsigned I = 0; for (auto CountAndVT : zip_first(RegCount, RegVTs)) { unsigned RegCount = std::get<0>(CountAndVT); MVT RegisterVT = std::get<1>(CountAndVT); -unsigned RegisterSize = RegisterVT.getSizeInBits(); +TypeSize RegisterSize = RegisterVT.getSizeInBits(); for (unsigned E = I + RegCount; I != E; ++I) OutVec.push_back(std::make_pair(Regs[I], RegisterSize)); } @@ -5317,7 +5317,7 @@ static SDValue expandDivFix(unsigned Opcode, const SDLoc &DL, // getUnderlyingArgRegs - Find underlying registers used for a truncated, // bitcasted, or split argument. Returns a list of static void -getUnderlyingArgRegs(SmallVectorImpl> &Regs, +getUnderlyingArgRegs(SmallVectorImpl> &Regs, const SDValue &N) { switch (N.getOpcode()) { case ISD::CopyFromReg: { @@ -5428,7 +5428,7 @@ bool SelectionDAGBuilder::EmitFuncArgumentDbgValue( if (FI != std::numeric_limits::max()) Op = MachineOperand::CreateFI(FI); - SmallVector, 8> ArgRegsAndSizes; + SmallVector, 8> ArgRegsAndSizes; if (!Op && N.getNode()) { getUnderlyingArgRegs(ArgRegsAndSizes, N); Register Reg; @@ -5458,8 +5458,8 @@ bool SelectionDAGBuilder::EmitFuncArgumentDbgValue( if (!Op) { // Create a DBG_VALUE for each decomposed value in ArgRegs to cover Reg -auto splitMultiRegDbgValue - = [&](ArrayRef> SplitRegs) { +auto splitMultiRegDbgValue = [&](ArrayRef> + SplitRegs) { unsigned Offset = 0; for (auto RegAndSize : SplitRegs) { // If the expression is already a fragment, the current register diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h index 89b5de0a9f21..bf2023674342 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h @@ -895,7 +895,7 @@ struct RegsForValue { } /// Return a list of registers and their sizes. - SmallVector, 4> getRegsAndSizes() const; + SmallVector, 4> getRegsAndSizes() const; }; } // end namespace llvm diff --git a/llvm/test/CodeGen/AArch64/sdag-no-typesize-warnings-regandsizes.ll b/llvm/test/CodeGen/AArch64/sdag-no-typesize-warnings-regandsizes.ll new file mode 100644 index ..5a519bea2a70 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/sdag-no-typesize-warnings-regandsizes.ll @@ -0,0 +1,30 @@ +; RUN: llc -mtriple=aarch64-unknown-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s +; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t + +; If this check fails please read +; clang/test/CodeGen/aarch64-sve-intrinsics/README for instructions on +; how to resolve it. + +; WARN-NOT: warning + +; CHECK-LABEL: do_something: +define @do_something( %vx) { +entry: + call void @llvm.dbg.value(metadata %vx, metadata !3, metadata !DIExpression()), !dbg !5 + %0 = tail call @f( %vx) + ret %0 +} + +declare @f() + +declare void @llvm.dbg.value(metadata, metadata, metadata) + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!2} + +!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1) +!1 = !DIFile(filename: "file.c", directory: "/") +!2 = !{i32 2, !"Debug Info Version", i32 3} +!3 = !DILocalVariable(scope: !4) +!4 = distinct !DISubprogram(unit: !0) +!5 = !DILocation(scope: !4) __
[llvm-branch-commits] [llvm] 3d872cb - [VE][NFC] Update comments
Author: Kazushi (Jam) Marukawa Date: 2020-12-01T02:56:16+09:00 New Revision: 3d872cbc2fd3d7ff43b1058da03a91bea51414c7 URL: https://github.com/llvm/llvm-project/commit/3d872cbc2fd3d7ff43b1058da03a91bea51414c7 DIFF: https://github.com/llvm/llvm-project/commit/3d872cbc2fd3d7ff43b1058da03a91bea51414c7.diff LOG: [VE][NFC] Update comments Update comments. I forgot to update it previously when I modified code. Added: Modified: llvm/lib/Target/VE/VEFrameLowering.cpp Removed: diff --git a/llvm/lib/Target/VE/VEFrameLowering.cpp b/llvm/lib/Target/VE/VEFrameLowering.cpp index 7042068f1154..9e97d0eca833 100644 --- a/llvm/lib/Target/VE/VEFrameLowering.cpp +++ b/llvm/lib/Target/VE/VEFrameLowering.cpp @@ -493,8 +493,8 @@ void VEFrameLowering::determineCalleeSaves(MachineFunction &MF, RegScavenger *RS) const { TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS); - // Functions having BP or stack objects need to emit prologue and epilogue - // to allocate local buffer on the stack. + // Functions having BP need to emit prologue and epilogue to allocate local + // buffer on the stack even if the function is a leaf function. if (isLeafProc(MF) && !hasBP(MF)) { VEMachineFunctionInfo *FuncInfo = MF.getInfo(); FuncInfo->setLeafProc(true); ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 8ca484b - [InstCombine][X86] Add addsub PR46277 test case
Author: Simon Pilgrim Date: 2020-11-30T18:11:05Z New Revision: 8ca484b94680a2b379722c6e7a62350b12c969c6 URL: https://github.com/llvm/llvm-project/commit/8ca484b94680a2b379722c6e7a62350b12c969c6 DIFF: https://github.com/llvm/llvm-project/commit/8ca484b94680a2b379722c6e7a62350b12c969c6.diff LOG: [InstCombine][X86] Add addsub PR46277 test case Also fix a copy+paste typo in the elts_addsub_v4f32 demanded elts test from the godbolt reference Added: Modified: llvm/test/Transforms/InstCombine/X86/x86-addsub.ll Removed: diff --git a/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll b/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll index 67657354f599..0c69ac83faad 100644 --- a/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll @@ -31,17 +31,17 @@ define float @elts_addsub_v4f32(<4 x float> %0, <4 x float> %1) { ; CHECK-NEXT:[[TMP3:%.*]] = shufflevector <4 x float> [[TMP0:%.*]], <4 x float> undef, <4 x i32> ; CHECK-NEXT:[[TMP4:%.*]] = shufflevector <4 x float> [[TMP1:%.*]], <4 x float> undef, <4 x i32> ; CHECK-NEXT:[[TMP5:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP3]], <4 x float> [[TMP4]]) -; CHECK-NEXT:[[TMP6:%.*]] = shufflevector <4 x float> [[TMP5]], <4 x float> undef, <4 x i32> -; CHECK-NEXT:[[TMP7:%.*]] = fadd <4 x float> [[TMP5]], [[TMP6]] -; CHECK-NEXT:[[TMP8:%.*]] = extractelement <4 x float> [[TMP7]], i32 0 +; CHECK-NEXT:[[TMP6:%.*]] = extractelement <4 x float> [[TMP5]], i32 0 +; CHECK-NEXT:[[TMP7:%.*]] = extractelement <4 x float> [[TMP5]], i32 1 +; CHECK-NEXT:[[TMP8:%.*]] = fadd float [[TMP6]], [[TMP7]] ; CHECK-NEXT:ret float [[TMP8]] ; %3 = shufflevector <4 x float> %0, <4 x float> undef, <4 x i32> %4 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> %5 = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %3, <4 x float> %4) - %6 = shufflevector <4 x float> %5, <4 x float> undef, <4 x i32> - %7 = fadd <4 x float> %5, %6 - %8 = extractelement <4 x float> %7, i32 0 + %6 = extractelement <4 x float> %5, i32 0 + %7 = extractelement <4 x float> %5, i32 1 + %8 = fadd float %6, %7 ret float %8 } @@ -83,3 +83,31 @@ define float @elts_addsub_v8f32(<8 x float> %0, <8 x float> %1) { ret float %8 } +define void @PR46277(float %0, float %1, float %2, float %3, <4 x float> %4, float* %5) { +; CHECK-LABEL: @PR46277( +; CHECK-NEXT:[[TMP7:%.*]] = insertelement <4 x float> undef, float [[TMP0:%.*]], i32 0 +; CHECK-NEXT:[[TMP8:%.*]] = insertelement <4 x float> [[TMP7]], float [[TMP1:%.*]], i32 1 +; CHECK-NEXT:[[TMP9:%.*]] = insertelement <4 x float> [[TMP8]], float [[TMP2:%.*]], i32 2 +; CHECK-NEXT:[[TMP10:%.*]] = insertelement <4 x float> [[TMP9]], float [[TMP3:%.*]], i32 3 +; CHECK-NEXT:[[TMP11:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP10]], <4 x float> [[TMP4:%.*]]) +; CHECK-NEXT:[[TMP12:%.*]] = extractelement <4 x float> [[TMP11]], i32 0 +; CHECK-NEXT:[[TMP13:%.*]] = getelementptr inbounds float, float* [[TMP5:%.*]], i64 1 +; CHECK-NEXT:store float [[TMP12]], float* [[TMP5]], align 4 +; CHECK-NEXT:[[TMP14:%.*]] = extractelement <4 x float> [[TMP11]], i32 1 +; CHECK-NEXT:store float [[TMP14]], float* [[TMP13]], align 4 +; CHECK-NEXT:ret void +; + %7 = insertelement <4 x float> undef, float %0, i32 0 + %8 = insertelement <4 x float> %7, float %1, i32 1 + %9 = insertelement <4 x float> %8, float %2, i32 2 + %10 = insertelement <4 x float> %9, float %3, i32 3 + %11 = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %10, <4 x float> %4) + %12 = extractelement <4 x float> %11, i32 0 + %13 = getelementptr inbounds float, float* %5, i64 1 + store float %12, float* %5, align 4 + %14 = extractelement <4 x float> %11, i32 1 + store float %14, float* %13, align 4 + ret void +} + + ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 7c4555f - [PowerPC] Delete remnant Darwin code in PPCAsmParser
Author: Fangrui Song Date: 2020-11-30T10:16:19-08:00 New Revision: 7c4555f60d96d8a3ed35d74dab7e591dacc24b8d URL: https://github.com/llvm/llvm-project/commit/7c4555f60d96d8a3ed35d74dab7e591dacc24b8d DIFF: https://github.com/llvm/llvm-project/commit/7c4555f60d96d8a3ed35d74dab7e591dacc24b8d.diff LOG: [PowerPC] Delete remnant Darwin code in PPCAsmParser Continue the work started at D50989. The code has been long dead since the triple has been removed (D75494). Reviewed By: nickdesaulniers, void Differential Revision: https://reviews.llvm.org/D91836 Added: Modified: llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Removed: diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index 5d87e13752dd..748716126836 100644 --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -99,12 +99,10 @@ struct PPCOperand; class PPCAsmParser : public MCTargetAsmParser { bool IsPPC64; - bool IsDarwin; void Warning(SMLoc L, const Twine &Msg) { getParser().Warning(L, Msg); } bool isPPC64() const { return IsPPC64; } - bool isDarwin() const { return IsDarwin; } bool MatchRegisterName(unsigned &RegNo, int64_t &IntVal); @@ -116,14 +114,12 @@ class PPCAsmParser : public MCTargetAsmParser { PPCMCExpr::VariantKind &Variant); const MCExpr *FixupVariantKind(const MCExpr *E); bool ParseExpression(const MCExpr *&EVal); - bool ParseDarwinExpression(const MCExpr *&EVal); bool ParseOperand(OperandVector &Operands); bool ParseDirectiveWord(unsigned Size, AsmToken ID); bool ParseDirectiveTC(unsigned Size, AsmToken ID); bool ParseDirectiveMachine(SMLoc L); - bool ParseDarwinDirectiveMachine(SMLoc L); bool ParseDirectiveAbiVersion(SMLoc L); bool ParseDirectiveLocalEntry(SMLoc L); @@ -150,7 +146,6 @@ class PPCAsmParser : public MCTargetAsmParser { // Check for 64-bit vs. 32-bit pointer mode. const Triple &TheTriple = STI.getTargetTriple(); IsPPC64 = TheTriple.isPPC64(); -IsDarwin = TheTriple.isMacOSX(); // Initialize the set of available features. setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits())); } @@ -1404,10 +1399,6 @@ FixupVariantKind(const MCExpr *E) { /// it handles modifiers. bool PPCAsmParser:: ParseExpression(const MCExpr *&EVal) { - - if (isDarwin()) -return ParseDarwinExpression(EVal); - // (ELF Platforms) // Handle \code @l/@ha \endcode if (getParser().parseExpression(EVal)) @@ -1423,53 +1414,6 @@ ParseExpression(const MCExpr *&EVal) { return false; } -/// ParseDarwinExpression. (MachO Platforms) -/// This diff ers from the default "parseExpression" in that it handles detection -/// of the \code hi16(), ha16() and lo16() \endcode modifiers. At present, -/// parseExpression() doesn't recognise the modifiers when in the Darwin/MachO -/// syntax form so it is done here. TODO: Determine if there is merit in -/// arranging for this to be done at a higher level. -bool PPCAsmParser:: -ParseDarwinExpression(const MCExpr *&EVal) { - MCAsmParser &Parser = getParser(); - PPCMCExpr::VariantKind Variant = PPCMCExpr::VK_PPC_None; - switch (getLexer().getKind()) { - default: -break; - case AsmToken::Identifier: -// Compiler-generated Darwin identifiers begin with L,l,_ or "; thus -// something starting with any other char should be part of the -// asm syntax. If handwritten asm includes an identifier like lo16, -// then all bets are off - but no-one would do that, right? -StringRef poss = Parser.getTok().getString(); -if (poss.equals_lower("lo16")) { - Variant = PPCMCExpr::VK_PPC_LO; -} else if (poss.equals_lower("hi16")) { - Variant = PPCMCExpr::VK_PPC_HI; -} else if (poss.equals_lower("ha16")) { - Variant = PPCMCExpr::VK_PPC_HA; -} -if (Variant != PPCMCExpr::VK_PPC_None) { - Parser.Lex(); // Eat the xx16 - if (getLexer().isNot(AsmToken::LParen)) -return Error(Parser.getTok().getLoc(), "expected '('"); - Parser.Lex(); // Eat the '(' -} -break; - } - - if (getParser().parseExpression(EVal)) -return true; - - if (Variant != PPCMCExpr::VK_PPC_None) { -if (getLexer().isNot(AsmToken::RParen)) - return Error(Parser.getTok().getLoc(), "expected ')'"); -Parser.Lex(); // Eat the ')' -EVal = PPCMCExpr::create(Variant, EVal, getParser().getContext()); - } - return false; -} - /// ParseOperand /// This handles registers in the form 'NN', '%rNN' for ELF platforms and /// rNN for MachO. @@ -1501,20 +1445,6 @@ bool PPCAsmParser::ParseOperand(OperandVector &Operands) { case AsmToken::Dollar: case AsmToken::Exclaim: case AsmToken::Tilde: -// Note that non-register-name identifiers
[llvm-branch-commits] [llvm] 64fa8cc - [CSSPGO] Pseudo probe instrumentation pass
Author: Hongtao Yu Date: 2020-11-30T10:16:54-08:00 New Revision: 64fa8cce225f7d8bd499e3a99caa850b764ff109 URL: https://github.com/llvm/llvm-project/commit/64fa8cce225f7d8bd499e3a99caa850b764ff109 DIFF: https://github.com/llvm/llvm-project/commit/64fa8cce225f7d8bd499e3a99caa850b764ff109.diff LOG: [CSSPGO] Pseudo probe instrumentation pass This change introduces a pseudo probe instrumentation pass for block instrumentation. Please refer to https://reviews.llvm.org/D86193 for the whole story. Given the following LLVM IR: ``` define internal void @foo2(i32 %x, void (i32)* %f) !dbg !4 { bb0: %cmp = icmp eq i32 %x, 0 br i1 %cmp, label %bb1, label %bb2 bb1: br label %bb3 bb2: br label %bb3 bb3: ret void } ``` The instrumented IR will look like below. Note that each llvm.pseudoprobe intrinsic call represents a pseudo probe at a block, of which the first parameter is the GUID of the probe’s owner function and the second parameter is the probe’s ID. ``` define internal void @foo2(i32 %x, void (i32)* %f) !dbg !4 { bb0: %cmp = icmp eq i32 %x, 0 call void @llvm.pseudoprobe(i64 837061429793323041, i64 1) br i1 %cmp, label %bb1, label %bb2 bb1: call void @llvm.pseudoprobe(i64 837061429793323041, i64 2) br label %bb3 bb2: call void @llvm.pseudoprobe(i64 837061429793323041, i64 3) br label %bb3 bb3: call void @llvm.pseudoprobe(i64 837061429793323041, i64 4) ret void } ``` Reviewed By: wmi Differential Revision: https://reviews.llvm.org/D86499 Added: llvm/include/llvm/Transforms/IPO/SampleProfileProbe.h llvm/lib/Transforms/IPO/SampleProfileProbe.cpp llvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll Modified: llvm/lib/Passes/PassBuilder.cpp llvm/lib/Passes/PassRegistry.def llvm/lib/Transforms/IPO/CMakeLists.txt Removed: diff --git a/llvm/include/llvm/Transforms/IPO/SampleProfileProbe.h b/llvm/include/llvm/Transforms/IPO/SampleProfileProbe.h new file mode 100644 index 0..d0165a1cbc71a --- /dev/null +++ b/llvm/include/llvm/Transforms/IPO/SampleProfileProbe.h @@ -0,0 +1,65 @@ +//===- Transforms/IPO/SampleProfileProbe.h --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===--===// +// +/// \file +/// This file provides the interface for the pseudo probe implementation for +/// AutoFDO. +// +//===--===// + +#ifndef LLVM_TRANSFORMS_IPO_SAMPLEPROFILEPROBE_H +#define LLVM_TRANSFORMS_IPO_SAMPLEPROFILEPROBE_H + +#include "llvm/ADT/DenseMap.h" +#include "llvm/IR/PassManager.h" +#include "llvm/Target/TargetMachine.h" +#include + +namespace llvm { + +class Module; + +using BlockIdMap = std::unordered_map; + +enum class PseudoProbeReservedId { Invalid = 0, Last = Invalid }; + +enum class PseudoProbeType { Block = 0 }; + +/// Sample profile pseudo prober. +/// +/// Insert pseudo probes for block sampling and value sampling. +class SampleProfileProber { +public: + // Give an empty module id when the prober is not used for instrumentation. + SampleProfileProber(Function &F); + void instrumentOneFunc(Function &F, TargetMachine *TM); + +private: + Function *getFunction() const { return F; } + uint32_t getBlockId(const BasicBlock *BB) const; + void computeProbeIdForBlocks(); + + Function *F; + + /// Map basic blocks to the their pseudo probe ids. + BlockIdMap BlockProbeIds; + + /// The ID of the last probe, Can be used to number a new probe. + uint32_t LastProbeId; +}; + +class SampleProfileProbePass : public PassInfoMixin { + TargetMachine *TM; + +public: + SampleProfileProbePass(TargetMachine *TM) : TM(TM) {} + PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM); +}; + +} // end namespace llvm +#endif // LLVM_TRANSFORMS_IPO_SAMPLEPROFILEPROBE_H diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp index 2a9b0c1e4f6ba..6d6ddd0012fa9 100644 --- a/llvm/lib/Passes/PassBuilder.cpp +++ b/llvm/lib/Passes/PassBuilder.cpp @@ -110,6 +110,7 @@ #include "llvm/Transforms/IPO/PartialInlining.h" #include "llvm/Transforms/IPO/SCCP.h" #include "llvm/Transforms/IPO/SampleProfile.h" +#include "llvm/Transforms/IPO/SampleProfileProbe.h" #include "llvm/Transforms/IPO/StripDeadPrototypes.h" #include "llvm/Transforms/IPO/StripSymbols.h" #include "llvm/Transforms/IPO/SyntheticCountsPropagation.h" diff --git a/llvm/lib/Passes/PassRegistry.def b/llvm/lib/Passes/PassRegistry.def index 7f0f51ad09773..2871282be639b 100644 --- a/llvm/lib/Passes/PassRegistry.def +++ b/llvm/lib/Passes/PassRegistry.def @@ -101,6 +101,7 @@ MODULE_PASS("oz-module-optimizer", buildModuleOptimizationPipeline(OptimizationLe
[llvm-branch-commits] [llvm] c083fed - [CSSPGO] A Clang switch -fpseudo-probe-for-profiling for pseudo-probe instrumentation.
Author: Hongtao Yu Date: 2020-11-30T10:16:54-08:00 New Revision: c083fededfa63df6e1a560334bdb78797da9ee57 URL: https://github.com/llvm/llvm-project/commit/c083fededfa63df6e1a560334bdb78797da9ee57 DIFF: https://github.com/llvm/llvm-project/commit/c083fededfa63df6e1a560334bdb78797da9ee57.diff LOG: [CSSPGO] A Clang switch -fpseudo-probe-for-profiling for pseudo-probe instrumentation. This change introduces a new clang switch `-fpseudo-probe-for-profiling` to enable AutoFDO with pseudo instrumentation. Please refer to https://reviews.llvm.org/D86193 for the whole story. One implication from pseudo-probe instrumentation is that the profile is now sensitive to CFG changes. We perform the pseudo instrumentation very early in the pre-LTO pipeline, before any CFG transformation. This ensures that the CFG instrumented and annotated is stable and optimization-resilient. The early instrumentation also allows the inliner to duplicate probes for inlined instances. When a probe along with the other instructions of a callee function are inlined into its caller function, the GUID of the callee function goes with the probe. This allows samples collected on inlined probes to be reported for the original callee function. Reviewed By: wmi Differential Revision: https://reviews.llvm.org/D86502 Added: clang/test/CodeGen/pseudo-probe-emit.c Modified: clang/include/clang/Basic/CodeGenOptions.def clang/include/clang/Driver/Options.td clang/lib/CodeGen/BackendUtil.cpp clang/lib/Driver/ToolChains/Clang.cpp clang/lib/Frontend/CompilerInvocation.cpp llvm/include/llvm/Passes/PassBuilder.h llvm/lib/Passes/PassBuilder.cpp Removed: diff --git a/clang/include/clang/Basic/CodeGenOptions.def b/clang/include/clang/Basic/CodeGenOptions.def index d90e403915ed3..8c4a70ba41253 100644 --- a/clang/include/clang/Basic/CodeGenOptions.def +++ b/clang/include/clang/Basic/CodeGenOptions.def @@ -380,6 +380,9 @@ CODEGENOPT(StrictReturn, 1, 1) /// Whether emit extra debug info for sample pgo profile collection. CODEGENOPT(DebugInfoForProfiling, 1, 0) +/// Whether emit pseudo probes for sample pgo profile collection. +CODEGENOPT(PseudoProbeForProfiling, 1, 0) + /// Whether 3-component vector type is preserved. CODEGENOPT(PreserveVec3Type, 1, 0) diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td index 0014ced5dca7c..ac0761ec773f7 100644 --- a/clang/include/clang/Driver/Options.td +++ b/clang/include/clang/Driver/Options.td @@ -903,6 +903,12 @@ def fprofile_exclude_files_EQ : Joined<["-"], "fprofile-exclude-files=">, def fprofile_update_EQ : Joined<["-"], "fprofile-update=">, Group, Flags<[CC1Option, CoreOption]>, Values<"atomic,prefer-atomic,single">, MetaVarName<"">, HelpText<"Set update method of profile counters (atomic,prefer-atomic,single)">; +def fpseudo_probe_for_profiling : Flag<["-"], "fpseudo-probe-for-profiling">, +Group, Flags<[NoXarchOption, CC1Option]>, +HelpText<"Emit pseudo probes for sample profiler">; +def fno_pseudo_probe_for_profiling : Flag<["-"], "fno-pseudo-probe-for-profiling">, +Group, Flags<[NoXarchOption, CC1Option]>, +HelpText<"Do not emit pseudo probes for sample profiler.">; def forder_file_instrumentation : Flag<["-"], "forder-file-instrumentation">, Group, Flags<[CC1Option, CoreOption]>, HelpText<"Generate instrumented code to collect order file into default.profraw file (overridden by '=' form of option or LLVM_PROFILE_FILE env var)">; diff --git a/clang/lib/CodeGen/BackendUtil.cpp b/clang/lib/CodeGen/BackendUtil.cpp index dbc18cc40241a..b62a66a51d26b 100644 --- a/clang/lib/CodeGen/BackendUtil.cpp +++ b/clang/lib/CodeGen/BackendUtil.cpp @@ -1094,10 +1094,15 @@ void EmitAssemblyHelper::EmitAssemblyWithNewPassManager( CSAction, CodeGenOpts.DebugInfoForProfiling); } else if (!CodeGenOpts.SampleProfileFile.empty()) // -fprofile-sample-use +PGOOpt = PGOOptions( +CodeGenOpts.SampleProfileFile, "", CodeGenOpts.ProfileRemappingFile, +PGOOptions::SampleUse, PGOOptions::NoCSAction, +CodeGenOpts.DebugInfoForProfiling, CodeGenOpts.PseudoProbeForProfiling); + else if (CodeGenOpts.PseudoProbeForProfiling) +// -fpseudo-probe-for-profiling PGOOpt = -PGOOptions(CodeGenOpts.SampleProfileFile, "", - CodeGenOpts.ProfileRemappingFile, PGOOptions::SampleUse, - PGOOptions::NoCSAction, CodeGenOpts.DebugInfoForProfiling); +PGOOptions("", "", "", PGOOptions::NoAction, PGOOptions::NoCSAction, + CodeGenOpts.DebugInfoForProfiling, true); else if (CodeGenOpts.DebugInfoForProfiling) // -fdebug-info-for-profiling PGOOpt = PGOOptions("", "", "", PGOOptions::NoAction, diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index
[llvm-branch-commits] [llvm] a4064cb - [gn build] Port 64fa8cce225
Author: LLVM GN Syncbot Date: 2020-11-30T18:20:24Z New Revision: a4064cbf32eb3f9de5f1d8cc679712c2f81937e3 URL: https://github.com/llvm/llvm-project/commit/a4064cbf32eb3f9de5f1d8cc679712c2f81937e3 DIFF: https://github.com/llvm/llvm-project/commit/a4064cbf32eb3f9de5f1d8cc679712c2f81937e3.diff LOG: [gn build] Port 64fa8cce225 Added: Modified: llvm/utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn Removed: diff --git a/llvm/utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn index 8a6bd84a856d..67755f9c7d00 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn @@ -53,6 +53,7 @@ static_library("IPO") { "PruneEH.cpp", "SCCP.cpp", "SampleProfile.cpp", +"SampleProfileProbe.cpp", "StripDeadPrototypes.cpp", "StripSymbols.cpp", "SyntheticCountsPropagation.cpp", ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] e425d0b - [InstCombine][X86] Add basic addsub intrinsic SimplifyDemandedVectorElts support (PR46277)
Author: Simon Pilgrim Date: 2020-11-30T18:40:16Z New Revision: e425d0b92a1df69e5e41e6b23801fabeaaef7937 URL: https://github.com/llvm/llvm-project/commit/e425d0b92a1df69e5e41e6b23801fabeaaef7937 DIFF: https://github.com/llvm/llvm-project/commit/e425d0b92a1df69e5e41e6b23801fabeaaef7937.diff LOG: [InstCombine][X86] Add basic addsub intrinsic SimplifyDemandedVectorElts support (PR46277) Pass through the demanded elts mask to the source operands. The next step will be to add support for folding to add/sub if we only demand odd/even elements. Added: Modified: llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp llvm/test/Transforms/InstCombine/X86/x86-addsub.ll Removed: diff --git a/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp b/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp index 10f0018a0f71..9ae2c1f2053f 100644 --- a/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp +++ b/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp @@ -1909,7 +1909,16 @@ Optional X86TTIImpl::simplifyDemandedVectorEltsIntrinsic( // Consider things like undef&0. The result is known zero, not undef. if (!UndefElts2[0] || !UndefElts3[0]) UndefElts.clearBit(0); +break; + // TODO: Add fmaddsub support? + case Intrinsic::x86_sse3_addsub_pd: + case Intrinsic::x86_sse3_addsub_ps: + case Intrinsic::x86_avx_addsub_pd_256: + case Intrinsic::x86_avx_addsub_ps_256: +simplifyAndSetOp(&II, 0, DemandedElts, UndefElts); +simplifyAndSetOp(&II, 1, DemandedElts, UndefElts2); +UndefElts &= UndefElts2; break; case Intrinsic::x86_sse2_packssdw_128: diff --git a/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll b/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll index 0c69ac83faad..8ce578db2dd6 100644 --- a/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-addsub.ll @@ -13,11 +13,9 @@ declare <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float>, <8 x float>) define double @elts_addsub_v2f64(<2 x double> %0, <2 x double> %1) { ; CHECK-LABEL: @elts_addsub_v2f64( -; CHECK-NEXT:[[TMP3:%.*]] = shufflevector <2 x double> [[TMP0:%.*]], <2 x double> undef, <2 x i32> zeroinitializer -; CHECK-NEXT:[[TMP4:%.*]] = shufflevector <2 x double> [[TMP1:%.*]], <2 x double> undef, <2 x i32> zeroinitializer -; CHECK-NEXT:[[TMP5:%.*]] = tail call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> [[TMP3]], <2 x double> [[TMP4]]) -; CHECK-NEXT:[[TMP6:%.*]] = extractelement <2 x double> [[TMP5]], i32 0 -; CHECK-NEXT:ret double [[TMP6]] +; CHECK-NEXT:[[TMP3:%.*]] = tail call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> [[TMP0:%.*]], <2 x double> [[TMP1:%.*]]) +; CHECK-NEXT:[[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0 +; CHECK-NEXT:ret double [[TMP4]] ; %3 = shufflevector <2 x double> %0, <2 x double> undef, <2 x i32> %4 = shufflevector <2 x double> %1, <2 x double> undef, <2 x i32> @@ -28,13 +26,11 @@ define double @elts_addsub_v2f64(<2 x double> %0, <2 x double> %1) { define float @elts_addsub_v4f32(<4 x float> %0, <4 x float> %1) { ; CHECK-LABEL: @elts_addsub_v4f32( -; CHECK-NEXT:[[TMP3:%.*]] = shufflevector <4 x float> [[TMP0:%.*]], <4 x float> undef, <4 x i32> -; CHECK-NEXT:[[TMP4:%.*]] = shufflevector <4 x float> [[TMP1:%.*]], <4 x float> undef, <4 x i32> -; CHECK-NEXT:[[TMP5:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP3]], <4 x float> [[TMP4]]) -; CHECK-NEXT:[[TMP6:%.*]] = extractelement <4 x float> [[TMP5]], i32 0 -; CHECK-NEXT:[[TMP7:%.*]] = extractelement <4 x float> [[TMP5]], i32 1 -; CHECK-NEXT:[[TMP8:%.*]] = fadd float [[TMP6]], [[TMP7]] -; CHECK-NEXT:ret float [[TMP8]] +; CHECK-NEXT:[[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP0:%.*]], <4 x float> [[TMP1:%.*]]) +; CHECK-NEXT:[[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0 +; CHECK-NEXT:[[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i32 1 +; CHECK-NEXT:[[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]] +; CHECK-NEXT:ret float [[TMP6]] ; %3 = shufflevector <4 x float> %0, <4 x float> undef, <4 x i32> %4 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> @@ -47,13 +43,11 @@ define float @elts_addsub_v4f32(<4 x float> %0, <4 x float> %1) { define double @elts_addsub_v4f64(<4 x double> %0, <4 x double> %1) { ; CHECK-LABEL: @elts_addsub_v4f64( -; CHECK-NEXT:[[TMP3:%.*]] = shufflevector <4 x double> [[TMP0:%.*]], <4 x double> undef, <4 x i32> -; CHECK-NEXT:[[TMP4:%.*]] = shufflevector <4 x double> [[TMP1:%.*]], <4 x double> undef, <4 x i32> -; CHECK-NEXT:[[TMP5:%.*]] = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> [[TMP3]], <4 x double> [[TMP4]]) -; CHECK-NEXT:[[TMP6:%.*]] = extractelement <4 x double> [[TMP5]], i32 0 -; CHECK-NEXT:[[TMP7:%.*]] = extract
[llvm-branch-commits] [libcxxabi] 61aec69 - [libcxxabi] Add macro for changing functions to support the relative vtables ABI
Author: Leonard Chan Date: 2020-11-30T10:50:05-08:00 New Revision: 61aec69a65dec949f3d2556c4d0efaa87869e1ee URL: https://github.com/llvm/llvm-project/commit/61aec69a65dec949f3d2556c4d0efaa87869e1ee DIFF: https://github.com/llvm/llvm-project/commit/61aec69a65dec949f3d2556c4d0efaa87869e1ee.diff LOG: [libcxxabi] Add macro for changing functions to support the relative vtables ABI Under the relative vtables ABI, __dynamic_cast will not work since it assumes the vtable pointer is 2 ptrdiff_ts away from the start of the vtable (8-byte offset to top + 8-byte pointer to typeinfo) when it is actually 8 bytes away (4-byte offset to top + 4-byte offset to typeinfo). This adjusts the logic under __dynamic_cast and other areas vtable calculations are done to support this ABI when it's used. Differential Revision: https://reviews.llvm.org/D77606 Added: Modified: libcxxabi/src/private_typeinfo.cpp Removed: diff --git a/libcxxabi/src/private_typeinfo.cpp b/libcxxabi/src/private_typeinfo.cpp index 3e8bdae32e41..c77ad669c49e 100644 --- a/libcxxabi/src/private_typeinfo.cpp +++ b/libcxxabi/src/private_typeinfo.cpp @@ -61,6 +61,16 @@ is_equal(const std::type_info* x, const std::type_info* y, bool use_strcmp) return x == y || strcmp(x->name(), y->name()) == 0; } +static inline ptr diff _t update_offset_to_base(const char* vtable, + ptr diff _t offset_to_base) { +#if __has_feature(cxx_abi_relative_vtable) + // VTable components are 32 bits in the relative vtables ABI. + return *reinterpret_cast(vtable + offset_to_base); +#else + return *reinterpret_cast(vtable + offset_to_base); +#endif +} + namespace __cxxabiv1 { @@ -297,7 +307,7 @@ __base_class_type_info::has_unambiguous_public_base(__dynamic_cast_info* info, if (__offset_flags & __virtual_mask) { const char* vtable = *static_cast(adjustedPtr); -offset_to_base = *reinterpret_cast(vtable + offset_to_base); +offset_to_base = update_offset_to_base(vtable, offset_to_base); } } __base_type->has_unambiguous_public_base( @@ -615,10 +625,26 @@ __dynamic_cast(const void *static_ptr, const __class_type_info *static_type, // Possible future optimization: Take advantage of src2dst_offset // Get (dynamic_ptr, dynamic_type) from static_ptr +#if __has_feature(cxx_abi_relative_vtable) +// The vtable address will point to the first virtual function, which is 8 +// bytes after the start of the vtable (4 for the offset from top + 4 for the typeinfo component). +const int32_t* vtable = +*reinterpret_cast(static_ptr); +int32_t offset_to_derived = vtable[-2]; +const void* dynamic_ptr = static_cast(static_ptr) + offset_to_derived; + +// The typeinfo component is now a relative offset to a proxy. +int32_t offset_to_ti_proxy = vtable[-1]; +const uint8_t* ptr_to_ti_proxy = +reinterpret_cast(vtable) + offset_to_ti_proxy; +const __class_type_info* dynamic_type = +*(reinterpret_cast(ptr_to_ti_proxy)); +#else void **vtable = *static_cast(static_ptr); ptr diff _t offset_to_derived = reinterpret_cast(vtable[-2]); const void* dynamic_ptr = static_cast(static_ptr) + offset_to_derived; const __class_type_info* dynamic_type = static_cast(vtable[-1]); +#endif // Initialize answer to nullptr. This will be changed from the search //results if a non-null answer is found. Regardless, this is what will @@ -1267,7 +1293,7 @@ __base_class_type_info::search_above_dst(__dynamic_cast_info* info, if (__offset_flags & __virtual_mask) { const char* vtable = *static_cast(current_ptr); -offset_to_base = *reinterpret_cast(vtable + offset_to_base); +offset_to_base = update_offset_to_base(vtable, offset_to_base); } __base_type->search_above_dst(info, dst_ptr, static_cast(current_ptr) + offset_to_base, @@ -1287,7 +1313,7 @@ __base_class_type_info::search_below_dst(__dynamic_cast_info* info, if (__offset_flags & __virtual_mask) { const char* vtable = *static_cast(current_ptr); -offset_to_base = *reinterpret_cast(vtable + offset_to_base); +offset_to_base = update_offset_to_base(vtable, offset_to_base); } __base_type->search_below_dst(info, static_cast(current_ptr) + offset_to_base, ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] a474657 - [FastISel] NFC: Remove obsolete -fast-isel-sink-local-values option
Author: Paul Robinson Date: 2020-11-30T10:55:49-08:00 New Revision: a474657e30edccd9e175d92bddeefcfa544751b2 URL: https://github.com/llvm/llvm-project/commit/a474657e30edccd9e175d92bddeefcfa544751b2 DIFF: https://github.com/llvm/llvm-project/commit/a474657e30edccd9e175d92bddeefcfa544751b2.diff LOG: [FastISel] NFC: Remove obsolete -fast-isel-sink-local-values option This option is not used for anything after #dc35368 (D91734). Added: Modified: llvm/lib/CodeGen/SelectionDAG/FastISel.cpp llvm/test/CodeGen/AArch64/arm64-abi_align.ll llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll llvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll llvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll llvm/test/CodeGen/AArch64/arm64-fast-isel.ll llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll llvm/test/CodeGen/AArch64/swifterror.ll llvm/test/CodeGen/ARM/fast-isel-call.ll llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll llvm/test/CodeGen/ARM/fast-isel-select.ll llvm/test/CodeGen/ARM/fast-isel-vararg.ll llvm/test/CodeGen/ARM/swifterror.ll llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll llvm/test/CodeGen/X86/fast-isel-call-cleanup.ll llvm/test/CodeGen/X86/inreg.ll llvm/test/CodeGen/X86/pr32241.ll llvm/test/CodeGen/X86/pr32284.ll llvm/test/CodeGen/X86/pr32340.ll llvm/test/CodeGen/X86/pr32345.ll llvm/test/CodeGen/X86/pr32484.ll llvm/test/CodeGen/X86/sink-local-value.ll llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll llvm/test/DebugInfo/Mips/delay-slot.ll llvm/test/DebugInfo/X86/prologue-stack.ll Removed: diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index 2d3ec0a0367f..7615861149c6 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -113,11 +113,6 @@ using namespace PatternMatch; #define DEBUG_TYPE "isel" -// FIXME: Remove this after the feature has proven reliable. -static cl::opt SinkLocalValues("fast-isel-sink-local-values", - cl::init(true), cl::Hidden, - cl::desc("Sink local values in FastISel")); - STATISTIC(NumFastIselSuccessIndependent, "Number of insts selected by " "target-independent selector"); STATISTIC(NumFastIselSuccessTarget, "Number of insts selected by " diff --git a/llvm/test/CodeGen/AArch64/arm64-abi_align.ll b/llvm/test/CodeGen/AArch64/arm64-abi_align.ll index fe0b31fb2db9..5224eca76619 100644 --- a/llvm/test/CodeGen/AArch64/arm64-abi_align.ll +++ b/llvm/test/CodeGen/AArch64/arm64-abi_align.ll @@ -1,5 +1,5 @@ -; RUN: llc -fast-isel-sink-local-values -aarch64-load-store-renaming=true < %s -mtriple=arm64-apple-darwin -mcpu=cyclone -enable-misched=false -frame-pointer=all | FileCheck %s -; RUN: llc -fast-isel-sink-local-values -aarch64-load-store-renaming=true < %s -mtriple=arm64-apple-darwin -O0 -frame-pointer=all -fast-isel | FileCheck -check-prefix=FAST %s +; RUN: llc -aarch64-load-store-renaming=true < %s -mtriple=arm64-apple-darwin -mcpu=cyclone -enable-misched=false -frame-pointer=all | FileCheck %s +; RUN: llc -aarch64-load-store-renaming=true < %s -mtriple=arm64-apple-darwin -O0 -frame-pointer=all -fast-isel | FileCheck -check-prefix=FAST %s ; rdar://12648441 ; Generated from arm64-arguments.c with -O2. diff --git a/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll b/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll index a677d4a14353..9b9eb8d29bed 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll @@ -1,6 +1,6 @@ -; RUN: llc -fast-isel-sink-local-values -O0 -fast-isel -fast-isel-abort=2 -code-model=small -verify-machineinstrs -frame-pointer=all -mtriple=arm64-apple-darwin < %s | FileCheck %s -; RUN: llc -fast-isel-sink-local-values -O0 -fast-isel -fast-isel-abort=2 -code-model=large -verify-machineinstrs -frame-pointer=all -mtriple=arm64-apple-darwin < %s | FileCheck %s --check-prefix=LARGE -; RUN: llc -fast-isel-sink-local-values -O0 -fast-isel -fast-isel-abort=2 -code-model=small -verify-machineinstrs -frame-pointer=all -mtriple=aarch64_be-linux-gnu < %s | FileCheck %s --check-prefix=CHECK-BE +; RUN: llc -O0 -fast-isel -fast-isel-abort=2 -code-model=small -verify-machineinstrs -frame-pointer=all -mtriple=arm64-apple-darwin < %s | FileCheck %s +; RUN: llc -O0 -fast-isel -fast-isel-abort=2 -code-model=large -verify-machineinstrs -frame-pointer=all -mtriple=arm64-apple-darwin < %s | FileCheck %s --check-prefix=LARGE +; RUN: llc -O0 -fast-isel -fast-isel-abort=2 -
[llvm-branch-commits] [llvm] cdac34b - [X86] Zero-extend pointers to i64 for x86_64
Author: Harald van Dijk Date: 2020-11-30T18:51:23Z New Revision: cdac34bd47a34337579e50dedc119548b379f20e URL: https://github.com/llvm/llvm-project/commit/cdac34bd47a34337579e50dedc119548b379f20e DIFF: https://github.com/llvm/llvm-project/commit/cdac34bd47a34337579e50dedc119548b379f20e.diff LOG: [X86] Zero-extend pointers to i64 for x86_64 For LP64 mode, this has no effect as pointers are already 64 bits. For ILP32 mode (x32), this extension is specified by the ABI. Reviewed By: pengfei Differential Revision: https://reviews.llvm.org/D91338 Added: Modified: llvm/lib/Target/X86/X86CallingConv.cpp llvm/lib/Target/X86/X86CallingConv.td llvm/lib/Target/X86/X86ISelLowering.cpp llvm/test/CodeGen/X86/musttail-varargs.ll llvm/test/CodeGen/X86/pr38865-2.ll llvm/test/CodeGen/X86/pr38865-3.ll llvm/test/CodeGen/X86/pr38865.ll llvm/test/CodeGen/X86/sibcall.ll llvm/test/CodeGen/X86/x32-function_pointer-2.ll llvm/test/CodeGen/X86/x86-64-sret-return.ll Removed: diff --git a/llvm/lib/Target/X86/X86CallingConv.cpp b/llvm/lib/Target/X86/X86CallingConv.cpp index c899db60e016..c80a5d5bb332 100644 --- a/llvm/lib/Target/X86/X86CallingConv.cpp +++ b/llvm/lib/Target/X86/X86CallingConv.cpp @@ -330,5 +330,15 @@ static bool CC_X86_Intr(unsigned &ValNo, MVT &ValVT, MVT &LocVT, return true; } +static bool CC_X86_64_Pointer(unsigned &ValNo, MVT &ValVT, MVT &LocVT, + CCValAssign::LocInfo &LocInfo, + ISD::ArgFlagsTy &ArgFlags, CCState &State) { + if (LocVT != MVT::i64) { +LocVT = MVT::i64; +LocInfo = CCValAssign::ZExt; + } + return false; +} + // Provides entry points of CC_X86 and RetCC_X86. #include "X86GenCallingConv.inc" diff --git a/llvm/lib/Target/X86/X86CallingConv.td b/llvm/lib/Target/X86/X86CallingConv.td index 802e694999b6..9e414ceeb781 100644 --- a/llvm/lib/Target/X86/X86CallingConv.td +++ b/llvm/lib/Target/X86/X86CallingConv.td @@ -336,6 +336,9 @@ def RetCC_X86_64_C : CallingConv<[ // MMX vector types are always returned in XMM0. CCIfType<[x86mmx], CCAssignToReg<[XMM0, XMM1]>>, + // Pointers are always returned in full 64-bit registers. + CCIfPtr>, + CCIfSwiftError>>, CCDelegateTo @@ -518,6 +521,9 @@ def CC_X86_64_C : CallingConv<[ CCIfCC<"CallingConv::Swift", CCIfSRet>>>, + // Pointers are always passed in full 64-bit registers. + CCIfPtr>, + // The first 6 integer arguments are passed in integer registers. CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>, CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>, diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 6f5f198544c8..1274582614ed 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -3067,8 +3067,9 @@ SDValue X86TargetLowering::LowerCallResult( // This truncation won't change the value. DAG.getIntPtrConstant(1, dl)); -if (VA.isExtInLoc() && (VA.getValVT().getScalarType() == MVT::i1)) { +if (VA.isExtInLoc()) { if (VA.getValVT().isVector() && + VA.getValVT().getScalarType() == MVT::i1 && ((VA.getLocVT() == MVT::i64) || (VA.getLocVT() == MVT::i32) || (VA.getLocVT() == MVT::i16) || (VA.getLocVT() == MVT::i8))) { // promoting a mask type (v*i1) into a register of type i64/i32/i16/i8 diff --git a/llvm/test/CodeGen/X86/musttail-varargs.ll b/llvm/test/CodeGen/X86/musttail-varargs.ll index 6e293935911d..f99bdeca019a 100644 --- a/llvm/test/CodeGen/X86/musttail-varargs.ll +++ b/llvm/test/CodeGen/X86/musttail-varargs.ll @@ -136,7 +136,7 @@ define void @f_thunk(i8* %this, ...) { ; LINUX-X32-NEXT:movq %rcx, %r13 ; LINUX-X32-NEXT:movq %rdx, %rbp ; LINUX-X32-NEXT:movq %rsi, %rbx -; LINUX-X32-NEXT:movl %edi, %r14d +; LINUX-X32-NEXT:movq %rdi, %r14 ; LINUX-X32-NEXT:movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill ; LINUX-X32-NEXT:testb %al, %al ; LINUX-X32-NEXT:je .LBB0_2 @@ -161,7 +161,7 @@ define void @f_thunk(i8* %this, ...) { ; LINUX-X32-NEXT:movl %eax, {{[0-9]+}}(%esp) ; LINUX-X32-NEXT:movabsq $206158430216, %rax # imm = 0x38 ; LINUX-X32-NEXT:movq %rax, {{[0-9]+}}(%esp) -; LINUX-X32-NEXT:movl %r14d, %edi +; LINUX-X32-NEXT:movq %r14, %rdi ; LINUX-X32-NEXT:movaps %xmm7, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill ; LINUX-X32-NEXT:movaps %xmm6, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill ; LINUX-X32-NEXT:movaps %xmm5, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill @@ -172,7 +172,7 @@ define void @f_thunk(i8* %this, ...) { ; LINUX-X32-NEXT:movaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) # 16-byte Spill ; LINUX-X32-NEXT:callq get_f ; LINUX-X32-NEXT:movl %eax, %r11d -; LINUX-X32-NEXT:movl %r14d, %edi +; LINUX-X3
[llvm-branch-commits] [llvm] 750049d - [CSSPGO] Disabling a pseudo probe test on non-x86 platforms.
Author: Hongtao Yu Date: 2020-11-30T11:19:45-08:00 New Revision: 750049d78b7421344882948cdf98fd233a557615 URL: https://github.com/llvm/llvm-project/commit/750049d78b7421344882948cdf98fd233a557615 DIFF: https://github.com/llvm/llvm-project/commit/750049d78b7421344882948cdf98fd233a557615.diff LOG: [CSSPGO] Disabling a pseudo probe test on non-x86 platforms. Disabling a pseudo probe test on non-x86 platforms since it's not fully tested there. Added: Modified: llvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll Removed: diff --git a/llvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll b/llvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll index 0d3579dda3bc..1094819208a6 100644 --- a/llvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll +++ b/llvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll @@ -1,3 +1,4 @@ +; REQUIRES: x86-registered-target ; RUN: opt < %s -passes=pseudo-probe -function-sections -S -o %t ; RUN: FileCheck %s < %t --check-prefix=CHECK-IL ; RUN: llc %t -stop-after=instruction-select -o - | FileCheck %s --check-prefix=CHECK-MIR ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 40dc535 - [x86] add tests for maxnum/minnum with nnan; NFC
Author: Sanjay Patel Date: 2020-11-30T14:30:28-05:00 New Revision: 40dc535b5afffb1d309e44ca636219c1b8a6873b URL: https://github.com/llvm/llvm-project/commit/40dc535b5afffb1d309e44ca636219c1b8a6873b DIFF: https://github.com/llvm/llvm-project/commit/40dc535b5afffb1d309e44ca636219c1b8a6873b.diff LOG: [x86] add tests for maxnum/minnum with nnan; NFC Added: Modified: llvm/test/Analysis/CostModel/X86/fmaxnum.ll llvm/test/Analysis/CostModel/X86/fminnum.ll Removed: diff --git a/llvm/test/Analysis/CostModel/X86/fmaxnum.ll b/llvm/test/Analysis/CostModel/X86/fmaxnum.ll index f1d8e3270298..3116e65388e8 100644 --- a/llvm/test/Analysis/CostModel/X86/fmaxnum.ll +++ b/llvm/test/Analysis/CostModel/X86/fmaxnum.ll @@ -92,6 +92,88 @@ define i32 @f64(i32 %arg) { ret i32 undef } +define i32 @f32_nnan(i32 %arg) { +; SSE-LABEL: 'f32_nnan' +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX1-LABEL: 'f32_nnan' +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX2-LABEL: 'f32_nnan' +; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'f32_nnan' +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef, <16 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; + %F32 = call nnan float @llvm.maxnum.f32(float undef, float undef) + %V2F32 = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> undef, <2 x float> undef) + %V4F32 = call nnan <4 x float> @llvm.maxnum.v4f32(<4 x float> undef, <4 x float> undef) + %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef) + %V16F32 = call nnan <16 x float> @llvm.maxnum.v16f32(<16 x float> undef,
[llvm-branch-commits] [llvm] abef659 - [ms] [llvm-ml] Implement the statement expansion operator
Author: Eric Astor Date: 2020-11-30T14:33:24-05:00 New Revision: abef659a45fff4147f8f0ffd1d0f6600185e4a4e URL: https://github.com/llvm/llvm-project/commit/abef659a45fff4147f8f0ffd1d0f6600185e4a4e DIFF: https://github.com/llvm/llvm-project/commit/abef659a45fff4147f8f0ffd1d0f6600185e4a4e.diff LOG: [ms] [llvm-ml] Implement the statement expansion operator If prefaced with a %, expand text macros and macro functions in any statement. Also, prevent expanding text macros in the message of an ECHO directive unless expanded explicitly by the statement expansion operator. Reviewed By: thakis Differential Revision: https://reviews.llvm.org/D89740 Added: llvm/test/tools/llvm-ml/expansion.test Modified: llvm/include/llvm/MC/MCAsmMacro.h llvm/lib/MC/MCParser/MasmParser.cpp Removed: diff --git a/llvm/include/llvm/MC/MCAsmMacro.h b/llvm/include/llvm/MC/MCAsmMacro.h index 1177853fec96..e3d6a858132d 100644 --- a/llvm/include/llvm/MC/MCAsmMacro.h +++ b/llvm/include/llvm/MC/MCAsmMacro.h @@ -144,13 +144,15 @@ struct MCAsmMacro { StringRef Body; MCAsmMacroParameters Parameters; std::vector Locals; + bool IsFunction = false; public: MCAsmMacro(StringRef N, StringRef B, MCAsmMacroParameters P) : Name(N), Body(B), Parameters(std::move(P)) {} MCAsmMacro(StringRef N, StringRef B, MCAsmMacroParameters P, - std::vector L) - : Name(N), Body(B), Parameters(std::move(P)), Locals(std::move(L)) {} + std::vector L, bool F) + : Name(N), Body(B), Parameters(std::move(P)), Locals(std::move(L)), +IsFunction(F) {} #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) void dump() const { dump(dbgs()); } diff --git a/llvm/lib/MC/MCParser/MasmParser.cpp b/llvm/lib/MC/MCParser/MasmParser.cpp index 8b5d4b85a58b..709f1ea1173d 100644 --- a/llvm/lib/MC/MCParser/MasmParser.cpp +++ b/llvm/lib/MC/MCParser/MasmParser.cpp @@ -579,6 +579,9 @@ class MasmParser : public MCAsmParser { AsmToken::TokenKind EndTok = AsmToken::EndOfStatement); void printMacroInstantiations(); + + bool expandStatement(SMLoc Loc); + void printMessage(SMLoc Loc, SourceMgr::DiagKind Kind, const Twine &Msg, SMRange Range = None) const { ArrayRef Ranges(Range); @@ -608,15 +611,15 @@ class MasmParser : public MCAsmParser { /// Parse up to a token of kind \p EndTok and return the contents from the /// current token up to (but not including) this token; the current token on - /// exit will be either this kind or EOF. - StringRef parseStringTo(AsmToken::TokenKind EndTok); + /// exit will be either this kind or EOF. Reads through instantiated macro + /// functions and text macros. + SmallVector parseStringRefsTo(AsmToken::TokenKind EndTok); + std::string parseStringTo(AsmToken::TokenKind EndTok); /// Parse up to the end of statement and return the contents from the current /// token until the end of the statement; the current token on exit will be /// either the EndOfStatement or EOF. - StringRef parseStringToEndOfStatement() override { -return parseStringTo(AsmToken::EndOfStatement); - } + StringRef parseStringToEndOfStatement() override; bool parseTextItem(std::string &Data); @@ -1119,8 +1122,11 @@ const AsmToken &MasmParser::Lex() { const AsmToken *tok = &Lexer.Lex(); while (tok->is(AsmToken::Identifier)) { -auto it = Variables.find(tok->getIdentifier()); +auto it = Variables.find(tok->getIdentifier().lower()); +const llvm::MCAsmMacro *M = +getContext().lookupMacro(tok->getIdentifier().lower()); if (it != Variables.end() && it->second.IsText) { + // This is a textmacro; expand it in place. std::unique_ptr Instantiation = MemoryBuffer::getMemBufferCopy(it->second.TextValue, ""); @@ -1132,6 +1138,15 @@ const AsmToken &MasmParser::Lex() { /*EndStatementAtEOF=*/false); EndStatementAtEOFStack.push_back(false); tok = &Lexer.Lex(); +} else if (M && M->IsFunction && Lexer.peekTok().is(AsmToken::LParen)) { + // This is a macro function invocation; expand it in place. + const AsmToken MacroTok = *tok; + tok = &Lexer.Lex(); + if (handleMacroInvocation(M, MacroTok.getLoc())) { +Lexer.UnLex(AsmToken(AsmToken::Error, MacroTok.getIdentifier())); +tok = &Lexer.Lex(); + } + continue; } else { break; } @@ -1221,7 +1236,12 @@ bool MasmParser::Run(bool NoInitialTextSection, bool NoFinalize) { } // While we have input, parse each statement. - while (Lexer.isNot(AsmToken::Eof)) { + while (Lexer.isNot(AsmToken::Eof) || + SrcMgr.getParentIncludeLoc(CurBuffer) != SMLoc()) { +// Skip through the EOF at the end of an inclusion. +if (Lexer.is(AsmToken::Eof)) + Lex(); + ParseStatementInfo Info(&AsmStr
[llvm-branch-commits] [llvm] fe43168 - Creating a named struct requires only a Context and a name, but looking up a struct by name requires a Module. The method on Module merely accesses the LLVMConte
Author: Nick Lewycky Date: 2020-11-30T11:34:12-08:00 New Revision: fe431683484a3041e024ab2373bb707b1ca8d1cf URL: https://github.com/llvm/llvm-project/commit/fe431683484a3041e024ab2373bb707b1ca8d1cf DIFF: https://github.com/llvm/llvm-project/commit/fe431683484a3041e024ab2373bb707b1ca8d1cf.diff LOG: Creating a named struct requires only a Context and a name, but looking up a struct by name requires a Module. The method on Module merely accesses the LLVMContextImpl and no data from the module itself, so this patch moves getTypeByName to a static method on StructType that takes a Context and a name. There's a small number of users of this function, they are all updated. This updates the C API adding a new method LLVMGetTypeByName2 that takes a context and a name. Differential Revision: https://reviews.llvm.org/D78793 Added: Modified: llvm/include/llvm-c/Core.h llvm/include/llvm/IR/DerivedTypes.h llvm/include/llvm/IR/Module.h llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp llvm/lib/IR/Core.cpp llvm/lib/IR/Type.cpp llvm/lib/Linker/IRMover.cpp llvm/tools/llvm-c-test/echo.cpp llvm/unittests/Analysis/TargetLibraryInfoTest.cpp polly/lib/CodeGen/LoopGeneratorsKMP.cpp Removed: diff --git a/llvm/include/llvm-c/Core.h b/llvm/include/llvm-c/Core.h index 1803c38b445d..86de259ea53e 100644 --- a/llvm/include/llvm-c/Core.h +++ b/llvm/include/llvm-c/Core.h @@ -626,6 +626,11 @@ const char *LLVMGetStringAttributeValue(LLVMAttributeRef A, unsigned *Length); LLVMBool LLVMIsEnumAttribute(LLVMAttributeRef A); LLVMBool LLVMIsStringAttribute(LLVMAttributeRef A); +/** + * Obtain a Type from a context by its registered name. + */ +LLVMTypeRef LLVMGetTypeByName2(LLVMContextRef C, const char *Name); + /** * @} */ @@ -867,9 +872,7 @@ LLVMValueRef LLVMGetInlineAsm(LLVMTypeRef Ty, */ LLVMContextRef LLVMGetModuleContext(LLVMModuleRef M); -/** - * Obtain a Type from a module by its registered name. - */ +/** Deprecated: Use LLVMGetTypeByName2 instead. */ LLVMTypeRef LLVMGetTypeByName(LLVMModuleRef M, const char *Name); /** diff --git a/llvm/include/llvm/IR/DerivedTypes.h b/llvm/include/llvm/IR/DerivedTypes.h index 7e9ea0e34c6b..9534edc4ea06 100644 --- a/llvm/include/llvm/IR/DerivedTypes.h +++ b/llvm/include/llvm/IR/DerivedTypes.h @@ -273,6 +273,10 @@ class StructType : public Type { return llvm::StructType::get(Ctx, StructFields); } + /// Return the type with the specified name, or null if there is none by that + /// name. + static StructType *getTypeByName(LLVMContext &C, StringRef Name); + bool isPacked() const { return (getSubclassData() & SCDB_Packed) != 0; } /// Return true if this type is uniqued by structural equivalence, false if it diff --git a/llvm/include/llvm/IR/Module.h b/llvm/include/llvm/IR/Module.h index 3f97d048f862..996daf1c9a07 100644 --- a/llvm/include/llvm/IR/Module.h +++ b/llvm/include/llvm/IR/Module.h @@ -329,10 +329,6 @@ class Module { /// \see LLVMContext::getOperandBundleTagID void getOperandBundleTags(SmallVectorImpl &Result) const; - /// Return the type with the specified name, or null if there is none by that - /// name. - StructType *getTypeByName(StringRef Name) const; - std::vector getIdentifiedStructTypes() const; /// @} diff --git a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp index 0b676cda36f5..1dd0683678fd 100644 --- a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp +++ b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp @@ -1349,7 +1349,7 @@ void OpenMPIRBuilder::initializeTypes(Module &M) { VarName = FunctionType::get(ReturnType, {__VA_ARGS__}, IsVarArg); \ VarName##Ptr = PointerType::getUnqual(VarName); #define OMP_STRUCT_TYPE(VarName, StructName, ...) \ - T = M.getTypeByName(StructName); \ + T = StructType::getTypeByName(Ctx, StructName); \ if (!T) \ T = StructType::create(Ctx, {__VA_ARGS__}, StructName); \ VarName = T; \ diff --git a/llvm/lib/IR/Core.cpp b/llvm/lib/IR/Core.cpp index ea90a33f1629..aec5eb670b91 100644 --- a/llvm/lib/IR/Core.cpp +++ b/llvm/lib/IR/Core.cpp @@ -739,7 +739,11 @@ LLVMBool LLVMIsLiteralStruct(LLVMTypeRef StructTy) { } LLVMTypeRef LLVMGetTypeByName(LLVMModuleRef M, const char *Name) { - return wrap(unwrap(M)->getTypeByName(Name)); + return wrap(StructType::getTypeByName(unwrap(M)->getContext(), Name)); +} + +LLVMTypeRef LLVMGetTypeByName2(LLVMContextRef C, const char *Name) { + return wrap(StructType::getTypeByName(*unwrap(C), Name)); } /*--.. Operations on array, pointer, and vector types (sequence types) .--*/ diff --git a/llvm/lib/IR
[llvm-branch-commits] [llvm] b5f2318 - [DL] Inline getAlignmentInfo() implementation (NFC)
Author: Nikita Popov Date: 2020-11-30T20:56:15+01:00 New Revision: b5f23189fb051e720d43f8a80c09038d4860b8a1 URL: https://github.com/llvm/llvm-project/commit/b5f23189fb051e720d43f8a80c09038d4860b8a1 DIFF: https://github.com/llvm/llvm-project/commit/b5f23189fb051e720d43f8a80c09038d4860b8a1.diff LOG: [DL] Inline getAlignmentInfo() implementation (NFC) Apart from getting the entry in the table (which is already a separate function), the remaining logic is different for all alignment types and is better combined with getAlignment(). This is a minor efficiency improvement, and should make further improvements like using separate storage for different alignment types simpler. Added: Modified: llvm/include/llvm/IR/DataLayout.h llvm/lib/IR/DataLayout.cpp Removed: diff --git a/llvm/include/llvm/IR/DataLayout.h b/llvm/include/llvm/IR/DataLayout.h index 4dbca660d07b..7ed7f37e3364 100644 --- a/llvm/include/llvm/IR/DataLayout.h +++ b/llvm/include/llvm/IR/DataLayout.h @@ -175,14 +175,14 @@ class DataLayout { Error setAlignment(AlignTypeEnum align_type, Align abi_align, Align pref_align, uint32_t bit_width); - Align getAlignmentInfo(AlignTypeEnum align_type, uint32_t bit_width, - bool ABIAlign, Type *Ty) const; - /// Attempts to set the alignment of a pointer in the given address space. /// Returns an error description on failure. Error setPointerAlignment(uint32_t AddrSpace, Align ABIAlign, Align PrefAlign, uint32_t TypeByteWidth, uint32_t IndexWidth); + /// Internal helper to get alignment for integer of given bitwidth. + Align getIntegerAlignment(uint32_t BitWidth, bool abi_or_pref) const; + /// Internal helper method that returns requested alignment for type. Align getAlignment(Type *Ty, bool abi_or_pref) const; @@ -530,7 +530,9 @@ class DataLayout { /// Returns the minimum ABI-required alignment for an integer type of /// the specified bitwidth. - Align getABIIntegerTypeAlignment(unsigned BitWidth) const; + Align getABIIntegerTypeAlignment(unsigned BitWidth) const { +return getIntegerAlignment(BitWidth, /* abi_or_pref */ true); + } /// Returns the preferred stack/global alignment for the specified /// type. diff --git a/llvm/lib/IR/DataLayout.cpp b/llvm/lib/IR/DataLayout.cpp index 3c9325a45395..eb904af1f169 100644 --- a/llvm/lib/IR/DataLayout.cpp +++ b/llvm/lib/IR/DataLayout.cpp @@ -620,47 +620,16 @@ Error DataLayout::setPointerAlignment(uint32_t AddrSpace, Align ABIAlign, return Error::success(); } -/// getAlignmentInfo - Return the alignment (either ABI if ABIInfo = true or -/// preferred if ABIInfo = false) the layout wants for the specified datatype. -Align DataLayout::getAlignmentInfo(AlignTypeEnum AlignType, uint32_t BitWidth, - bool ABIInfo, Type *Ty) const { - AlignmentsTy::const_iterator I = findAlignmentLowerBound(AlignType, BitWidth); - // See if we found an exact match. Of if we are looking for an integer type, - // but don't have an exact match take the next largest integer. This is where - // the lower_bound will point to when it fails an exact match. - if (I != Alignments.end() && I->AlignType == (unsigned)AlignType && - (I->TypeBitWidth == BitWidth || AlignType == INTEGER_ALIGN)) -return ABIInfo ? I->ABIAlign : I->PrefAlign; - - if (AlignType == INTEGER_ALIGN) { -// If we didn't have a larger value try the largest value we have. -if (I != Alignments.begin()) { - --I; // Go to the previous entry and see if its an integer. - if (I->AlignType == INTEGER_ALIGN) -return ABIInfo ? I->ABIAlign : I->PrefAlign; -} - } else if (AlignType == VECTOR_ALIGN) { -// By default, use natural alignment for vector types. This is consistent -// with what clang and llvm-gcc do. -unsigned Alignment = -getTypeAllocSize(cast(Ty)->getElementType()); -// We're only calculating a natural alignment, so it doesn't have to be -// based on the full size for scalable vectors. Using the minimum element -// count should be enough here. -Alignment *= cast(Ty)->getElementCount().getKnownMinValue(); -Alignment = PowerOf2Ceil(Alignment); -return Align(Alignment); - } - - // If we still couldn't find a reasonable default alignment, fall back - // to a simple heuristic that the alignment is the first power of two - // greater-or-equal to the store size of the type. This is a reasonable - // approximation of reality, and if the user wanted something less - // less conservative, they should have specified it explicitly in the data - // layout. - unsigned Alignment = getTypeStoreSize(Ty); - Alignment = PowerOf2Ceil(Alignment); - return Align(Alignment); +Align DataLayout::getIntegerAlignment(uint32_t BitWidth, + bool abi_or_
[llvm-branch-commits] [clang] 5fe1026 - [llvm][inliner] Reuse the inliner pass to implement 'always inliner'
Author: Mircea Trofin Date: 2020-11-30T12:03:39-08:00 New Revision: 5fe10263ab39be96e316f37272b85a72596a7928 URL: https://github.com/llvm/llvm-project/commit/5fe10263ab39be96e316f37272b85a72596a7928 DIFF: https://github.com/llvm/llvm-project/commit/5fe10263ab39be96e316f37272b85a72596a7928.diff LOG: [llvm][inliner] Reuse the inliner pass to implement 'always inliner' Enable performing mandatory inlinings upfront, by reusing the same logic as the full inliner, instead of the AlwaysInliner. This has the following benefits: - reduce code duplication - one inliner codebase - open the opportunity to help the full inliner by performing additional function passes after the mandatory inlinings, but before th full inliner. Performing the mandatory inlinings first simplifies the problem the full inliner needs to solve: less call sites, more contextualization, and, depending on the additional function optimization passes run between the 2 inliners, higher accuracy of cost models / decision policies. Note that this patch does not yet enable much in terms of post-always inline function optimization. Differential Revision: https://reviews.llvm.org/D91567 Added: Modified: clang/test/CodeGen/thinlto-distributed-newpm.ll clang/test/Frontend/optimization-remark-line-directive.c clang/test/Frontend/optimization-remark-new-pm.c clang/test/Frontend/optimization-remark-with-hotness-new-pm.c clang/test/Frontend/optimization-remark.c llvm/include/llvm/Analysis/InlineAdvisor.h llvm/include/llvm/Passes/PassBuilder.h llvm/lib/Analysis/InlineAdvisor.cpp llvm/lib/Analysis/MLInlineAdvisor.cpp llvm/lib/Passes/PassBuilder.cpp llvm/lib/Passes/PassRegistry.def llvm/lib/Transforms/IPO/Inliner.cpp llvm/test/Other/new-pm-defaults.ll llvm/test/Other/new-pm-lto-defaults.ll llvm/test/Other/new-pm-module-inliner-wrapper.ll llvm/test/Other/new-pm-thinlto-defaults.ll llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll llvm/test/Transforms/Inline/ML/bounds-checks-rewards.ll llvm/test/Transforms/Inline/ML/bounds-checks.ll llvm/test/Transforms/Inline/inline_stats.ll llvm/test/Transforms/Inline/pr46945.ll Removed: diff --git a/clang/test/CodeGen/thinlto-distributed-newpm.ll b/clang/test/CodeGen/thinlto-distributed-newpm.ll index 3056bf45877a..75ea4064d6af 100644 --- a/clang/test/CodeGen/thinlto-distributed-newpm.ll +++ b/clang/test/CodeGen/thinlto-distributed-newpm.ll @@ -63,14 +63,19 @@ ; CHECK-O: Running analysis: OuterAnalysisManagerProxy ; CHECK-O: Running pass: SimplifyCFGPass on main ; CHECK-O: Finished {{.*}}Function pass manager run. -; CHECK-O: Running pass: RequireAnalysisPass<{{.*}}GlobalsAA -; CHECK-O: Running analysis: GlobalsAA -; CHECK-O: Running analysis: CallGraphAnalysis -; CHECK-O: Running pass: RequireAnalysisPass<{{.*}}ProfileSummaryAnalysis +; CHECK-O: Running pass: ModuleInlinerWrapperPass +; CHECK-O: Running analysis: InlineAdvisorAnalysis ; CHECK-O: Running analysis: InnerAnalysisManagerProxy ; CHECK-O: Running analysis: LazyCallGraphAnalysis ; CHECK-O: Running analysis: FunctionAnalysisManagerCGSCCProxy on (main) ; CHECK-O: Running analysis: OuterAnalysisManagerProxy +; CHECK-O: Running pass: InlinerPass on (main) +; CHECK-O: Finished {{.*}}Module pass manager run +; CHECK-O: Running pass: ModuleInlinerWrapperPass +; CHECK-O: Running pass: RequireAnalysisPass<{{.*}}GlobalsAA +; CHECK-O: Running analysis: GlobalsAA +; CHECK-O: Running analysis: CallGraphAnalysis +; CHECK-O: Running pass: RequireAnalysisPass<{{.*}}ProfileSummaryAnalysis ; CHECK-O: Starting CGSCC pass manager run. ; CHECK-O: Running pass: InlinerPass on (main) ; CHECK-O: Running pass: PostOrderFunctionAttrsPass on (main) diff --git a/clang/test/Frontend/optimization-remark-line-directive.c b/clang/test/Frontend/optimization-remark-line-directive.c index 095791e505f8..5a2dc6754763 100644 --- a/clang/test/Frontend/optimization-remark-line-directive.c +++ b/clang/test/Frontend/optimization-remark-line-directive.c @@ -6,7 +6,7 @@ // The new PM inliner is not added to the default pipeline at O0, so we add // some optimizations to trigger it. -// RUN: %clang_cc1 %s -Rpass=inline -fexperimental-new-pass-manager -O1 -debug-info-kind=line-tables-only -emit-llvm-only -verify +// RUN: %clang_cc1 %s -Rpass=inline -fexperimental-new-pass-manager -O1 -debug-info-kind=line-tables-only -emit-llvm-only -verify -mllvm -mandatory-inlining-first=0 int foo(int x, int y) __attribute__((always_inline)); int foo(int x, int y) { return x + y; } diff --git a/clang/test/Frontend/optimization-remark-new-pm.c b/clang/test/Frontend/optimization-remark-new-pm.c index 885dc686dafc..79e8301
[llvm-branch-commits] [llvm] 29bd651 - SplitKit: Use Register
Author: Matt Arsenault Date: 2020-11-30T15:09:33-05:00 New Revision: 29bd6519d2e220f6a0ab27efd0adbe16ac01a7ef URL: https://github.com/llvm/llvm-project/commit/29bd6519d2e220f6a0ab27efd0adbe16ac01a7ef DIFF: https://github.com/llvm/llvm-project/commit/29bd6519d2e220f6a0ab27efd0adbe16ac01a7ef.diff LOG: SplitKit: Use Register Added: Modified: llvm/lib/CodeGen/SplitKit.cpp llvm/lib/CodeGen/SplitKit.h Removed: diff --git a/llvm/lib/CodeGen/SplitKit.cpp b/llvm/lib/CodeGen/SplitKit.cpp index 9e7d6d231e62..4be9847085b7 100644 --- a/llvm/lib/CodeGen/SplitKit.cpp +++ b/llvm/lib/CodeGen/SplitKit.cpp @@ -512,7 +512,7 @@ void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo &ParentVNI) { VFP = ValueForcePair(nullptr, true); } -SlotIndex SplitEditor::buildSingleSubRegCopy(unsigned FromReg, unsigned ToReg, +SlotIndex SplitEditor::buildSingleSubRegCopy(Register FromReg, Register ToReg, MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def) { const MCInstrDesc &Desc = TII.get(TargetOpcode::COPY); @@ -538,7 +538,7 @@ SlotIndex SplitEditor::buildSingleSubRegCopy(unsigned FromReg, unsigned ToReg, return Def; } -SlotIndex SplitEditor::buildCopy(unsigned FromReg, unsigned ToReg, +SlotIndex SplitEditor::buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask, MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, bool Late, unsigned RegIdx) { const MCInstrDesc &Desc = TII.get(TargetOpcode::COPY); @@ -644,7 +644,7 @@ VNInfo *SplitEditor::defFromParent(unsigned RegIdx, LiveInterval &OrigLI = LIS.getInterval(Original); VNInfo *OrigVNI = OrigLI.getVNInfoAt(UseIdx); - unsigned Reg = LI->reg(); + Register Reg = LI->reg(); bool DidRemat = false; if (OrigVNI) { LiveRangeEdit::Remat RM(ParentVNI); @@ -1406,7 +1406,7 @@ void SplitEditor::rewriteAssigned(bool ExtendRanges) { } } - for (unsigned R : *Edit) { + for (Register R : *Edit) { LiveInterval &LI = LIS.getInterval(R); if (!LI.hasSubRanges()) continue; @@ -1525,7 +1525,7 @@ void SplitEditor::finish(SmallVectorImpl *LRMap) { deleteRematVictims(); // Get rid of unused values and set phi-kill flags. - for (unsigned Reg : *Edit) { + for (Register Reg : *Edit) { LiveInterval &LI = LIS.getInterval(Reg); LI.removeEmptySubRanges(); LI.RenumberValues(); @@ -1542,11 +1542,11 @@ void SplitEditor::finish(SmallVectorImpl *LRMap) { ConnectedVNInfoEqClasses ConEQ(LIS); for (unsigned i = 0, e = Edit->size(); i != e; ++i) { // Don't use iterators, they are invalidated by create() below. -unsigned VReg = Edit->get(i); +Register VReg = Edit->get(i); LiveInterval &LI = LIS.getInterval(VReg); SmallVector SplitLIs; LIS.splitSeparateComponents(LI, SplitLIs); -unsigned Original = VRM.getOriginal(VReg); +Register Original = VRM.getOriginal(VReg); for (LiveInterval *SplitLI : SplitLIs) VRM.setIsSplitFromReg(SplitLI->reg(), Original); diff --git a/llvm/lib/CodeGen/SplitKit.h b/llvm/lib/CodeGen/SplitKit.h index 10399f71dad5..a94518f5a4fc 100644 --- a/llvm/lib/CodeGen/SplitKit.h +++ b/llvm/lib/CodeGen/SplitKit.h @@ -439,11 +439,11 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor { /// Add a copy instruction copying \p FromReg to \p ToReg before /// \p InsertBefore. This can be invoked with a \p LaneMask which may make it /// necessary to construct a sequence of copies to cover it exactly. - SlotIndex buildCopy(unsigned FromReg, unsigned ToReg, LaneBitmask LaneMask, + SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask, MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, bool Late, unsigned RegIdx); - SlotIndex buildSingleSubRegCopy(unsigned FromReg, unsigned ToReg, + SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg, MachineBasicBlock &MB, MachineBasicBlock::iterator InsertBefore, unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def); ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] e5c17b2 - [ms] [llvm-ml] Test macro function invocations in arbitrary positions
Author: Eric Astor Date: 2020-11-30T15:13:23-05:00 New Revision: e5c17b2deea5620dcc736a9dad5def219f86e4da URL: https://github.com/llvm/llvm-project/commit/e5c17b2deea5620dcc736a9dad5def219f86e4da DIFF: https://github.com/llvm/llvm-project/commit/e5c17b2deea5620dcc736a9dad5def219f86e4da.diff LOG: [ms] [llvm-ml] Test macro function invocations in arbitrary positions Differential Revision: https://reviews.llvm.org/D89741 Added: Modified: llvm/test/tools/llvm-ml/macro_function.test Removed: diff --git a/llvm/test/tools/llvm-ml/macro_function.test b/llvm/test/tools/llvm-ml/macro_function.test index 98b3f25aabc8..94164b5c60a3 100644 --- a/llvm/test/tools/llvm-ml/macro_function.test +++ b/llvm/test/tools/llvm-ml/macro_function.test @@ -103,4 +103,14 @@ expr_recursive_test PROC ret expr_recursive_test ENDP +custom_strcat MACRO arg1, arg2 + EXITM +ENDM + +expand_as_directive_test custom_strcat(P, ROC) +; CHECK-LABEL: expand_as_directive_test: + + ret +expand_as_directive_test ENDP + end ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] fdff677 - [libTooling] Remove deprecated Clang Transformer declarations
Author: Yitzhak Mandelbaum Date: 2020-11-30T20:15:26Z New Revision: fdff677a955730b3e85b870ff1b30d7f8ea5719c URL: https://github.com/llvm/llvm-project/commit/fdff677a955730b3e85b870ff1b30d7f8ea5719c DIFF: https://github.com/llvm/llvm-project/commit/fdff677a955730b3e85b870ff1b30d7f8ea5719c.diff LOG: [libTooling] Remove deprecated Clang Transformer declarations A number of declarations were leftover after the move from `clang::tooling` to `clang::transformer`. This patch removes those declarations and upgrades the handful of references to the deprecated declarations. Differential Revision: https://reviews.llvm.org/D92340 Added: Modified: clang-tools-extra/clang-tidy/abseil/StringFindStrContainsCheck.cpp clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp clang/include/clang/Tooling/Transformer/RangeSelector.h clang/include/clang/Tooling/Transformer/RewriteRule.h clang/lib/Tooling/Transformer/RewriteRule.cpp clang/unittests/Tooling/TransformerTest.cpp Removed: diff --git a/clang-tools-extra/clang-tidy/abseil/StringFindStrContainsCheck.cpp b/clang-tools-extra/clang-tidy/abseil/StringFindStrContainsCheck.cpp index 87af9ea6cd5a..cd890e4837e0 100644 --- a/clang-tools-extra/clang-tidy/abseil/StringFindStrContainsCheck.cpp +++ b/clang-tools-extra/clang-tidy/abseil/StringFindStrContainsCheck.cpp @@ -29,6 +29,7 @@ using ::clang::transformer::cat; using ::clang::transformer::change; using ::clang::transformer::makeRule; using ::clang::transformer::node; +using ::clang::transformer::RewriteRule; static const char DefaultStringLikeClasses[] = "::std::basic_string;" "::std::basic_string_view;" @@ -69,7 +70,7 @@ MakeRule(const LangOptions &LangOpts, hasArgument(1, cxxDefaultArgExpr())), onImplicitObjectArgument(expr().bind("string_being_searched"))); - tooling::RewriteRule rule = applyFirst( + RewriteRule rule = applyFirst( {makeRule(binaryOperator(hasOperatorName("=="), hasOperands(ignoringParenImpCasts(StringNpos), ignoringParenImpCasts(StringFind))), diff --git a/clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp b/clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp index 536d6f8ef275..e8df4bb60071 100644 --- a/clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp +++ b/clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp @@ -23,6 +23,7 @@ using namespace ::clang::ast_matchers; using transformer::cat; using transformer::change; using transformer::IncludeFormat; +using transformer::makeRule; using transformer::node; using transformer::RewriteRule; using transformer::statement; @@ -30,14 +31,14 @@ using transformer::statement; // Invert the code of an if-statement, while maintaining its semantics. RewriteRule invertIf() { StringRef C = "C", T = "T", E = "E"; - RewriteRule Rule = tooling::makeRule( - ifStmt(hasCondition(expr().bind(C)), hasThen(stmt().bind(T)), - hasElse(stmt().bind(E))), - change(statement(std::string(RewriteRule::RootID)), - cat("if(!(", node(std::string(C)), ")) ", - statement(std::string(E)), " else ", - statement(std::string(T, - cat("negate condition and reverse `then` and `else` branches")); + RewriteRule Rule = + makeRule(ifStmt(hasCondition(expr().bind(C)), hasThen(stmt().bind(T)), + hasElse(stmt().bind(E))), + change(statement(std::string(RewriteRule::RootID)), + cat("if(!(", node(std::string(C)), ")) ", + statement(std::string(E)), " else ", + statement(std::string(T, + cat("negate condition and reverse `then` and `else` branches")); return Rule; } @@ -70,10 +71,9 @@ TEST(TransformerClangTidyCheckTest, Basic) { class IntLitCheck : public TransformerClangTidyCheck { public: IntLitCheck(StringRef Name, ClangTidyContext *Context) - : TransformerClangTidyCheck(tooling::makeRule(integerLiteral(), -change(cat("LIT")), -cat("no message")), - Name, Context) {} + : TransformerClangTidyCheck( +makeRule(integerLiteral(), change(cat("LIT")), cat("no message")), +Name, Context) {} }; // Tests that two changes in a single macro expansion do not lead to conflicts @@ -95,7 +95,7 @@ class BinOpCheck : public TransformerClangTidyCheck { public: BinOpCheck(StringRef Name, ClangTidyContext *Context) : TransformerClangTidyCheck( -tooling::makeRule( +makeRule( binaryOperator(h
[llvm-branch-commits] [llvm] 6612409 - [ConstraintElimination] Expand GEP decomposition tests.
Author: Florian Hahn Date: 2020-11-30T20:33:18Z New Revision: 66124098a88a564143a36869f495708502a35c50 URL: https://github.com/llvm/llvm-project/commit/66124098a88a564143a36869f495708502a35c50 DIFF: https://github.com/llvm/llvm-project/commit/66124098a88a564143a36869f495708502a35c50.diff LOG: [ConstraintElimination] Expand GEP decomposition tests. This adjusts the tests to cover more scenarios. Added: Modified: llvm/test/Transforms/ConstraintElimination/geps.ll Removed: diff --git a/llvm/test/Transforms/ConstraintElimination/geps.ll b/llvm/test/Transforms/ConstraintElimination/geps.ll index abd63b211ad8..ed013ed2c961 100644 --- a/llvm/test/Transforms/ConstraintElimination/geps.ll +++ b/llvm/test/Transforms/ConstraintElimination/geps.ll @@ -384,18 +384,22 @@ define void @test.ult.gep.shl(i32* readonly %src, i32* readnone %max, i32 %idx, ; CHECK-NEXT:[[CMP:%.*]] = icmp ult i32 [[IDX:%.*]], 5 ; CHECK-NEXT:br i1 [[CMP]], label [[CHECK_MAX:%.*]], label [[TRAP]] ; CHECK: check.max: -; CHECK-NEXT:[[IDX_SHL:%.*]] = shl nuw i32 [[IDX]], 2 -; CHECK-NEXT:[[ADD_PTR_SHL:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i32 [[IDX_SHL]] -; CHECK-NEXT:[[C_MAX_0:%.*]] = icmp ult i32* [[ADD_PTR_SHL]], [[MAX]] +; CHECK-NEXT:[[IDX_SHL_1:%.*]] = shl nuw i32 [[IDX]], 1 +; CHECK-NEXT:[[ADD_PTR_SHL_1:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i32 [[IDX_SHL_1]] +; CHECK-NEXT:[[C_MAX_0:%.*]] = icmp ult i32* [[ADD_PTR_SHL_1]], [[MAX]] ; CHECK-NEXT:call void @use(i1 [[C_MAX_0]]) -; CHECK-NEXT:[[IDX_SHL_NOT_NUW:%.*]] = shl i32 [[IDX]], 2 -; CHECK-NEXT:[[ADD_PTR_SHL_NOT_NUW:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i32 [[IDX_SHL_NOT_NUW]] -; CHECK-NEXT:[[C_MAX_1:%.*]] = icmp ult i32* [[ADD_PTR_SHL_NOT_NUW]], [[MAX]] +; CHECK-NEXT:[[IDX_SHL_2:%.*]] = shl nuw i32 [[IDX]], 2 +; CHECK-NEXT:[[ADD_PTR_SHL_2:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i32 [[IDX_SHL_2]] +; CHECK-NEXT:[[C_MAX_1:%.*]] = icmp ult i32* [[ADD_PTR_SHL_2]], [[MAX]] ; CHECK-NEXT:call void @use(i1 [[C_MAX_1]]) +; CHECK-NEXT:[[IDX_SHL_NOT_NUW:%.*]] = shl i32 [[IDX]], 1 +; CHECK-NEXT:[[ADD_PTR_SHL_NOT_NUW:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i32 [[IDX_SHL_NOT_NUW]] +; CHECK-NEXT:[[C_MAX_2:%.*]] = icmp ult i32* [[ADD_PTR_SHL_NOT_NUW]], [[MAX]] +; CHECK-NEXT:call void @use(i1 [[C_MAX_2]]) ; CHECK-NEXT:[[IDX_SHL_3:%.*]] = shl nuw i32 [[IDX]], 3 ; CHECK-NEXT:[[ADD_PTR_SHL_3:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i32 [[IDX_SHL_3]] -; CHECK-NEXT:[[C_MAX_2:%.*]] = icmp ult i32* [[ADD_PTR_SHL_3]], [[MAX]] -; CHECK-NEXT:call void @use(i1 [[C_MAX_2]]) +; CHECK-NEXT:[[C_MAX_3:%.*]] = icmp ult i32* [[ADD_PTR_SHL_3]], [[MAX]] +; CHECK-NEXT:call void @use(i1 [[C_MAX_3]]) ; CHECK-NEXT:ret void ; check.0.min: @@ -411,20 +415,25 @@ check.idx: ; preds = %check.0.min br i1 %cmp, label %check.max, label %trap check.max: ; preds = %check.0.min - %idx.shl = shl nuw i32 %idx, 2 - %add.ptr.shl = getelementptr inbounds i32, i32* %src, i32 %idx.shl - %c.max.0 = icmp ult i32* %add.ptr.shl, %max + %idx.shl.1 = shl nuw i32 %idx, 1 + %add.ptr.shl.1 = getelementptr inbounds i32, i32* %src, i32 %idx.shl.1 + %c.max.0 = icmp ult i32* %add.ptr.shl.1, %max call void @use(i1 %c.max.0) - %idx.shl.not.nuw = shl i32 %idx, 2 - %add.ptr.shl.not.nuw = getelementptr inbounds i32, i32* %src, i32 %idx.shl.not.nuw - %c.max.1 = icmp ult i32* %add.ptr.shl.not.nuw, %max + %idx.shl.2 = shl nuw i32 %idx, 2 + %add.ptr.shl.2 = getelementptr inbounds i32, i32* %src, i32 %idx.shl.2 + %c.max.1 = icmp ult i32* %add.ptr.shl.2, %max call void @use(i1 %c.max.1) + %idx.shl.not.nuw = shl i32 %idx, 1 + %add.ptr.shl.not.nuw = getelementptr inbounds i32, i32* %src, i32 %idx.shl.not.nuw + %c.max.2 = icmp ult i32* %add.ptr.shl.not.nuw, %max + call void @use(i1 %c.max.2) + %idx.shl.3 = shl nuw i32 %idx, 3 %add.ptr.shl.3 = getelementptr inbounds i32, i32* %src, i32 %idx.shl.3 - %c.max.2 = icmp ult i32* %add.ptr.shl.3, %max - call void @use(i1 %c.max.2) + %c.max.3 = icmp ult i32* %add.ptr.shl.3, %max + call void @use(i1 %c.max.3) ret void } @@ -442,17 +451,17 @@ define void @test.ult.gep.shl.zext(i32* readonly %src, i32* readnone %max, i32 % ; CHECK-NEXT:[[CMP:%.*]] = icmp ult i32 [[IDX:%.*]], 5 ; CHECK-NEXT:br i1 [[CMP]], label [[CHECK_MAX:%.*]], label [[TRAP]] ; CHECK: check.max: -; CHECK-NEXT:[[IDX_SHL:%.*]] = shl nuw i32 [[IDX]], 2 +; CHECK-NEXT:[[IDX_SHL:%.*]] = shl nuw i32 [[IDX]], 1 ; CHECK-NEXT:[[EXT_1:%.*]] = zext i32 [[IDX_SHL]] to i64 ; CHECK-NEXT:[[ADD_PTR_SHL:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 [[EXT_1]] ; CHECK-NEXT:[[C_MAX_0:%.*]] = icmp ult i32* [[ADD_PTR_SHL]
[llvm-branch-commits] [clang] 1644103 - [CodeGen] -fno-delete-null-pointer-checks: change dereferenceable to dereferenceable_or_null
Author: Fangrui Song Date: 2020-11-30T12:44:35-08:00 New Revision: 164410324d8bf3b5a99e39f7dfe3c6d6972dab30 URL: https://github.com/llvm/llvm-project/commit/164410324d8bf3b5a99e39f7dfe3c6d6972dab30 DIFF: https://github.com/llvm/llvm-project/commit/164410324d8bf3b5a99e39f7dfe3c6d6972dab30.diff LOG: [CodeGen] -fno-delete-null-pointer-checks: change dereferenceable to dereferenceable_or_null After D17993, with -fno-delete-null-pointer-checks we add the dereferenceable attribute to the `this` pointer. We have observed that one internal target which worked before fails even with -fno-delete-null-pointer-checks. Switching to dereferenceable_or_null fixes the problem. dereferenceable currently does not always respect NullPointerIsValid and may imply nonnull and lead to aggressive optimization. The optimization may be related to `CallBase::isReturnNonNull`, `Argument::hasNonNullAttr`, or `Value::getPointerDereferenceableBytes`. See D4 and D66618 for some discussions. Reviewed By: bkramer, rsmith Differential Revision: https://reviews.llvm.org/D92297 Added: Modified: clang/lib/CodeGen/CGCall.cpp clang/test/CodeGenCXX/this-nonnull.cpp Removed: diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp index 78740018d416..2b9bfb6a6c88 100644 --- a/clang/lib/CodeGen/CGCall.cpp +++ b/clang/lib/CodeGen/CGCall.cpp @@ -2168,13 +2168,21 @@ void CodeGenModule::ConstructAttributeList( if (!CodeGenOpts.NullPointerIsValid && getContext().getTargetAddressSpace(FI.arg_begin()->type) == 0) { Attrs.addAttribute(llvm::Attribute::NonNull); + Attrs.addDereferenceableAttr( + getMinimumObjectSize( + FI.arg_begin()->type.castAs()->getPointeeType()) + .getQuantity()); +} else { + // FIXME dereferenceable should be correct here, regardless of + // NullPointerIsValid. However, dereferenceable currently does not always + // respect NullPointerIsValid and may imply nonnull and break the program. + // See https://reviews.llvm.org/D66618 for discussions. + Attrs.addDereferenceableOrNullAttr( + getMinimumObjectSize( + FI.arg_begin()->type.castAs()->getPointeeType()) + .getQuantity()); } -Attrs.addDereferenceableAttr( -getMinimumObjectSize( -FI.arg_begin()->type.castAs()->getPointeeType()) -.getQuantity()); - ArgAttrs[IRArgs.first] = llvm::AttributeSet::get(getLLVMContext(), Attrs); } diff --git a/clang/test/CodeGenCXX/this-nonnull.cpp b/clang/test/CodeGenCXX/this-nonnull.cpp index 9b074e2bdda1..63873388b070 100644 --- a/clang/test/CodeGenCXX/this-nonnull.cpp +++ b/clang/test/CodeGenCXX/this-nonnull.cpp @@ -12,8 +12,9 @@ void TestReturnsVoid(Struct &s) { s.ReturnsVoid(); // CHECK-YES: call void @_ZN6Struct11ReturnsVoidEv(%struct.Struct* nonnull dereferenceable(12) %0) - // CHECK-NO: call void @_ZN6Struct11ReturnsVoidEv(%struct.Struct* dereferenceable(12) %0) + /// FIXME Use dereferenceable after dereferenceable respects NullPointerIsValid. + // CHECK-NO: call void @_ZN6Struct11ReturnsVoidEv(%struct.Struct* dereferenceable_or_null(12) %0) } // CHECK-YES: declare void @_ZN6Struct11ReturnsVoidEv(%struct.Struct* nonnull dereferenceable(12)) -// CHECK-NO: declare void @_ZN6Struct11ReturnsVoidEv(%struct.Struct* dereferenceable(12)) +// CHECK-NO: declare void @_ZN6Struct11ReturnsVoidEv(%struct.Struct* dereferenceable_or_null(12)) ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] f89e9c8 - [HIP] Fix HIP test on windows due to lld suffix
Author: Aaron En Ye Shi Date: 2020-11-30T21:05:26Z New Revision: f89e9c8201ea5a5b63af854c92ed26bc7ab4b8db URL: https://github.com/llvm/llvm-project/commit/f89e9c8201ea5a5b63af854c92ed26bc7ab4b8db DIFF: https://github.com/llvm/llvm-project/commit/f89e9c8201ea5a5b63af854c92ed26bc7ab4b8db.diff LOG: [HIP] Fix HIP test on windows due to lld suffix On Windows, lld is instead named lld.exe, therefore a few HIP tests are failing. Instead the wildcard should be modified to .*lld.* to handle .exe. This fixes the bug: https://bugs.llvm.org/show_bug.cgi?id=48289. Differential Revision: https://reviews.llvm.org/D92342 Added: Modified: clang/test/Driver/hip-toolchain-rdc-static-lib.hip clang/test/Driver/hip-toolchain-rdc.hip Removed: diff --git a/clang/test/Driver/hip-toolchain-rdc-static-lib.hip b/clang/test/Driver/hip-toolchain-rdc-static-lib.hip index dc29b0f87e36..533d3457d5b4 100644 --- a/clang/test/Driver/hip-toolchain-rdc-static-lib.hip +++ b/clang/test/Driver/hip-toolchain-rdc-static-lib.hip @@ -47,7 +47,7 @@ // CHECK-NOT: "*.llvm-link" // CHECK-NOT: ".*opt" // CHECK-NOT: ".*llc" -// CHECK: [[LLD: ".*lld"]] {{.*}} "-o" "[[IMG_DEV1:.*out]]" [[A_BC1]] [[B_BC1]] +// CHECK: [[LLD: ".*lld.*"]] {{.*}} "-o" "[[IMG_DEV1:.*out]]" [[A_BC1]] [[B_BC1]] // generate image for device side path on gfx900 // CHECK: [[CLANG]] "-cc1" "-triple" "amdgcn-amd-amdhsa" @@ -78,6 +78,6 @@ // CHECK-SAME: "-targets={{.*}},hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900" // CHECK-SAME: "-inputs={{.*}},[[IMG_DEV1]],[[IMG_DEV2]]" "-outputs=[[BUNDLE:.*hipfb]]" -// CHECK: [[MC:".*llvm-mc"]] "-o" [[OBJBUNDLE:".*o"]] "{{.*}}.mcin" "--filetype=obj" +// CHECK: [[MC:".*llvm-mc.*"]] "-o" [[OBJBUNDLE:".*o"]] "{{.*}}.mcin" "--filetype=obj" // CHECK: [[AR:".*llvm-ar.*"]] "rcsD" "{{.*}}.out" [[A_OBJ_HOST]] [[B_OBJ_HOST]] [[OBJBUNDLE]] diff --git a/clang/test/Driver/hip-toolchain-rdc.hip b/clang/test/Driver/hip-toolchain-rdc.hip index 8d8e67514035..d6d47ec1b07e 100644 --- a/clang/test/Driver/hip-toolchain-rdc.hip +++ b/clang/test/Driver/hip-toolchain-rdc.hip @@ -95,7 +95,7 @@ // CHECK-SAME: "-targets={{.*}},hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900" // CHECK-SAME: "-inputs={{.*}},[[IMG_DEV1]],[[IMG_DEV2]]" "-outputs=[[BUNDLE:.*hipfb]]" -// CHECK: [[MC:".*llvm-mc"]] "-o" [[OBJBUNDLE:".*o"]] "{{.*}}.mcin" "--filetype=obj" +// CHECK: [[MC:".*llvm-mc.*"]] "-o" [[OBJBUNDLE:".*o"]] "{{.*}}.mcin" "--filetype=obj" // output the executable // CHECK: [[LD:".*ld.*"]] {{.*}}"-o" "a.out" {{.*}} [[A_OBJ_HOST]] [[B_OBJ_HOST]] [[OBJBUNDLE]] ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] ebac710 - [lld-macho] Don't warn on non-existent system libraries
Author: Nico Weber Date: 2020-11-30T16:07:20-05:00 New Revision: ebac7100090a914e6a4dd0fdf2a5a196423cbaec URL: https://github.com/llvm/llvm-project/commit/ebac7100090a914e6a4dd0fdf2a5a196423cbaec DIFF: https://github.com/llvm/llvm-project/commit/ebac7100090a914e6a4dd0fdf2a5a196423cbaec.diff LOG: [lld-macho] Don't warn on non-existent system libraries Now, new mach-o lld no longer warns if the isysroot has just usr/lib and System/Library/Frameworks but is missing usr/local/lib and System/Frameworks. This matches ld64 and old mach-o lld and fixes a regression from D85992. It also fixes the only test failure in `check-lld` when running it on an M1 Mac. Differential Revision: https://reviews.llvm.org/D91891 Added: Modified: lld/MachO/Driver.cpp lld/test/MachO/syslibroot.test Removed: diff --git a/lld/MachO/Driver.cpp b/lld/MachO/Driver.cpp index 3de92f510b30..58a41c2b3af1 100644 --- a/lld/MachO/Driver.cpp +++ b/lld/MachO/Driver.cpp @@ -178,7 +178,7 @@ getSearchPaths(unsigned optionCode, opt::InputArgList &args, for (auto root : roots) { SmallString<261> buffer(root); path::append(buffer, path); - if (warnIfNotDirectory(optionLetter, buffer)) + if (fs::is_directory(buffer)) paths.push_back(saver.save(buffer.str())); } } diff --git a/lld/test/MachO/syslibroot.test b/lld/test/MachO/syslibroot.test index b09156eb0d1b..ade8652820b1 100644 --- a/lld/test/MachO/syslibroot.test +++ b/lld/test/MachO/syslibroot.test @@ -6,8 +6,9 @@ CHECK-NONEXISTENT-SYSLIBROOT: Library search paths: CHECK-NONEXISTENT-SYSLIBROOT-NEXT: Framework search paths: RUN: mkdir -p %t/usr/lib -RUN: lld -flavor darwinnew -v -syslibroot %t | FileCheck %s -check-prefix CHECK-SYSLIBROOT -DROOT=%t +RUN: lld -flavor darwinnew -v -syslibroot %t 2>&1 | FileCheck %s -check-prefix CHECK-SYSLIBROOT -DROOT=%t +CHECK-SYSLIBROOT-NOT: directory not found{{.*}}usr/local/lib CHECK-SYSLIBROOT: Library search paths: CHECK-SYSLIBROOT-NEXT: [[ROOT]]/usr/lib @@ -22,14 +23,6 @@ RUN: lld -flavor darwinnew -v -syslibroot %t -L %t/Library/libxml2-development | CHECK-PATH-WITHOUT-REROOT: Library search paths: CHECK-PATH-WITHOUT-REROOT-NEXT: [[PATH]] -# NOTE: the match here is fuzzy because the default search paths exist on Linux -# and macOS, but not on Windows (that is we ignore `/var/empty`). This allows -# us to run the test uniformly on all the platforms. -RUN: lld -flavor darwinnew -v -syslibroot /var/empty -syslibroot / 2>&1 | FileCheck %s -check-prefix CHECK-SYSLIBROOT-IGNORED - -CHECK-SYSLIBROOT-IGNORED: /usr/lib -CHECK-SYSLIBROOT-IGNORED: /usr/local/lib - RUN: mkdir -p %t.2/usr/lib RUN: lld -flavor darwinnew -v -syslibroot %t -syslibroot %t.2 | FileCheck %s -check-prefix CHECK-SYSLIBROOT-MATRIX -DROOT=%t @@ -37,19 +30,18 @@ CHECK-SYSLIBROOT-MATRIX: Library search paths: CHECK-SYSLIBROOT-MATRIX: [[ROOT]]/usr/lib CHECK-SYSLIBROOT-MATRIX: [[ROOT]].2/usr/lib +RUN: lld -flavor darwinnew -v -syslibroot %t -syslibroot %t.2 -syslibroot / | FileCheck %s -check-prefix CHECK-SYSLIBROOT-IGNORED -DROOT=%t + +CHECK-SYSLIBROOT-IGNORED: Library search paths: +CHECK-SYSLIBROOT-IGNORED-NOT: [[ROOT]]/usr/lib +CHECK-SYSLIBROOT-IGNORED-NOT: [[ROOT]].2/usr/lib + RUN: mkdir -p %t/System/Library/Frameworks RUN: lld -flavor darwinnew -v -syslibroot %t | FileCheck %s -check-prefix CHECK-SYSLIBROOT-FRAMEWORK -DROOT=%t CHECK-SYSLIBROOT-FRAMEWORK: Framework search paths: CHECK-SYSLIBROOT-FRAMEWORK: [[ROOT]]/System/Library/Frameworks -# NOTE: the match here is fuzzy because the default search paths exist on Linux -# and macOS, but not on Windows (that is we ignore `/var/empty`). This allows -# us to run the test uniformly on all the platforms. -RUN: lld -flavor darwinnew -v -syslibroot /var/empty -syslibroot / 2>&1 | FileCheck %s -check-prefix CHECK-SYSLIBROOT-FRAMEWORK-IGNORED - -CHECK-SYSLIBROOT-FRAMEWORK-IGNORED: /System/Library/Framework - RUN: mkdir -p %t/Library/Frameworks RUN: mkdir -p %t.2/Library/Frameworks RUN: lld -flavor darwinnew -v -syslibroot %t -syslibroot %t.2 -F /Library/Frameworks | FileCheck %s -check-prefix CHECK-SYSLIBROOT-FRAMEWORK-MATRIX -DROOT=%t @@ -57,3 +49,9 @@ RUN: lld -flavor darwinnew -v -syslibroot %t -syslibroot %t.2 -F /Library/Framew CHECK-SYSLIBROOT-FRAMEWORK-MATRIX: Framework search paths: CHECK-SYSLIBROOT-FRAMEWORK-MATRIX: [[ROOT]]/Library/Frameworks CHECK-SYSLIBROOT-FRAMEWORK-MATRIX: [[ROOT]].2/Library/Frameworks + +RUN: lld -flavor darwinnew -v -syslibroot %t -syslibroot %t.2 -syslibroot / -F /Library/Frameworks | FileCheck %s -check-prefix CHECK-SYSLIBROOT-FRAMEWORK-IGNORED -DROOT=%t + +CHECK-SYSLIBROOT-FRAMEWORK-IGNORED: Framework search paths: +CHECK-SYSLIBROOT-FRAMEWORK-IGNORED-NOT: [[ROOT]]/Library/Frameworks +CHECK-SYSLIBROOT-FRAMEWORK-IGNORED-NOT: [[ROOT]].2/Library/Frameworks
[llvm-branch-commits] [lld] 78c04fe - [lld/mac] Don't warn on -bundle and -execute flags
Author: Nico Weber Date: 2020-11-30T16:07:58-05:00 New Revision: 78c04fe99ec0013c53cd5d16554329116c85 URL: https://github.com/llvm/llvm-project/commit/78c04fe99ec0013c53cd5d16554329116c85 DIFF: https://github.com/llvm/llvm-project/commit/78c04fe99ec0013c53cd5d16554329116c85.diff LOG: [lld/mac] Don't warn on -bundle and -execute flags They've been implemented since D87856 but since they still were HelpHidden, the driver still warned claiming they were implemented. Remove HelpHidden. Use -fatal_warnings to test that the flags now don't warn. The test depends on D91894 and D91891 to pass. Differential Revision: https://reviews.llvm.org/D91971 Added: Modified: lld/MachO/Options.td lld/test/MachO/load-commands.s Removed: diff --git a/lld/MachO/Options.td b/lld/MachO/Options.td index ed3d00452bd3..de7cbf7faf3e 100644 --- a/lld/MachO/Options.td +++ b/lld/MachO/Options.td @@ -34,14 +34,12 @@ def grp_kind : OptionGroup<"kind">, HelpText<"OUTPUT KIND">; def execute : Flag<["-"], "execute">, HelpText<"Produce a main executable (default)">, - Flags<[HelpHidden]>, Group; def dylib : Flag<["-"], "dylib">, HelpText<"Produce a shared library">, Group; def bundle : Flag<["-"], "bundle">, HelpText<"Produce a bundle">, - Flags<[HelpHidden]>, Group; def r : Flag<["-"], "r">, HelpText<"Merge multiple object files into one, retaining relocations">, diff --git a/lld/test/MachO/load-commands.s b/lld/test/MachO/load-commands.s index ec37d98408ef..abeefc4043e1 100644 --- a/lld/test/MachO/load-commands.s +++ b/lld/test/MachO/load-commands.s @@ -2,8 +2,9 @@ # RUN: rm -rf %t && mkdir -p %t # RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t/test.o # RUN: %lld -o %t/executable %t/test.o -# RUN: %lld -bundle -o %t/bundle %t/test.o -# RUN: %lld -dylib -o %t/dylib %t/test.o +# RUN: %lld -fatal_warnings -execute -o %t/explicit-executable %t/test.o +# RUN: %lld -fatal_warnings -bundle -o %t/bundle %t/test.o +# RUN: %lld -fatal_warnings -dylib -o %t/dylib %t/test.o ## These load commands should be in every final output binary. # COMMON-DAG: cmd LC_DYLD_INFO_ONLY @@ -15,6 +16,8 @@ ## executable. Also check that it has the right filetype. # RUN: llvm-objdump --macho --all-headers %t/executable | FileCheck %s --check-prefix=COMMON # RUN: llvm-objdump --macho --all-headers %t/executable | FileCheck %s --check-prefix=EXEC +# RUN: llvm-objdump --macho --all-headers %t/explicit-executable | FileCheck %s --check-prefix=COMMON +# RUN: llvm-objdump --macho --all-headers %t/explicit-executable | FileCheck %s --check-prefix=EXEC # EXEC: magiccputype cpusubtype capsfiletype # EXEC-NEXT: MH_MAGIC_64 X86_64 ALL {{.*}} EXECUTE # EXEC-DAG: cmd LC_MAIN ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [openmp] f6f28b4 - [OpenMP] libomp: fix mutexinoutset dependence for proxy tasks
Author: AndreyChurbanov Date: 2020-12-01T00:13:31+03:00 New Revision: f6f28b44ad48e35d1300693d9c34f47782b519a4 URL: https://github.com/llvm/llvm-project/commit/f6f28b44ad48e35d1300693d9c34f47782b519a4 DIFF: https://github.com/llvm/llvm-project/commit/f6f28b44ad48e35d1300693d9c34f47782b519a4.diff LOG: [OpenMP] libomp: fix mutexinoutset dependence for proxy tasks Once __kmp_task_finish is not executed for proxy tasks, move mutexinoutset dependency code to __kmp_release_deps which is executed for all task kinds. Differential Revision: https://reviews.llvm.org/D92326 Added: Modified: openmp/runtime/src/kmp_taskdeps.h openmp/runtime/src/kmp_tasking.cpp Removed: diff --git a/openmp/runtime/src/kmp_taskdeps.h b/openmp/runtime/src/kmp_taskdeps.h index 2a712b348af6..4e5f8851f6b2 100644 --- a/openmp/runtime/src/kmp_taskdeps.h +++ b/openmp/runtime/src/kmp_taskdeps.h @@ -89,6 +89,16 @@ static inline void __kmp_release_deps(kmp_int32 gtid, kmp_taskdata_t *task) { kmp_info_t *thread = __kmp_threads[gtid]; kmp_depnode_t *node = task->td_depnode; + // Check mutexinoutset dependencies, release locks + if (UNLIKELY(node && (node->dn.mtx_num_locks < 0))) { +// negative num_locks means all locks were acquired +node->dn.mtx_num_locks = -node->dn.mtx_num_locks; +for (int i = node->dn.mtx_num_locks - 1; i >= 0; --i) { + KMP_DEBUG_ASSERT(node->dn.mtx_locks[i] != NULL); + __kmp_release_lock(node->dn.mtx_locks[i], gtid); +} + } + if (task->td_dephash) { KA_TRACE( 40, ("__kmp_release_deps: T#%d freeing dependencies hash of task %p.\n", diff --git a/openmp/runtime/src/kmp_tasking.cpp b/openmp/runtime/src/kmp_tasking.cpp index 3dfc3c4030d4..283bb934cd8f 100644 --- a/openmp/runtime/src/kmp_tasking.cpp +++ b/openmp/runtime/src/kmp_tasking.cpp @@ -849,17 +849,6 @@ static void __kmp_task_finish(kmp_int32 gtid, kmp_task_t *task, } } - // Check mutexinoutset dependencies, release locks - kmp_depnode_t *node = taskdata->td_depnode; - if (node && (node->dn.mtx_num_locks < 0)) { -// negative num_locks means all locks were acquired -node->dn.mtx_num_locks = -node->dn.mtx_num_locks; -for (int i = node->dn.mtx_num_locks - 1; i >= 0; --i) { - KMP_DEBUG_ASSERT(node->dn.mtx_locks[i] != NULL); - __kmp_release_lock(node->dn.mtx_locks[i], gtid); -} - } - // bookkeeping for resuming task: // GEH - note tasking_ser => task_serial KMP_DEBUG_ASSERT( ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [openmp] 9615890 - [OpenMP] libomp: change shm name to include UID, call unregister_lib on SIGTERM
Author: Todd Erdner Date: 2020-12-01T00:40:47+03:00 New Revision: 9615890db576721fbd73ae77d81d39435e83b4b4 URL: https://github.com/llvm/llvm-project/commit/9615890db576721fbd73ae77d81d39435e83b4b4 DIFF: https://github.com/llvm/llvm-project/commit/9615890db576721fbd73ae77d81d39435e83b4b4.diff LOG: [OpenMP] libomp: change shm name to include UID, call unregister_lib on SIGTERM With the change to using shared memory, there were a few problems that need to be fixed. - The previous filename that was used for SHM only used process id. Given that process is usually based on 16bit number, this was causing some conflicts on machines. Thus we add UID to the name to prevent this. - It appears under some conditions (SIGTERM, etc) the shared memory files were not getting cleaned up. Added a call to clean up the shm files under those conditions. For this user needs to set envirable KMP_HANDLE_SIGNALS to true. Patch by Erdner, Todd Differential Revision: https://reviews.llvm.org/D91869 Added: Modified: openmp/runtime/src/kmp.h openmp/runtime/src/kmp_runtime.cpp openmp/runtime/src/z_Linux_util.cpp Removed: diff --git a/openmp/runtime/src/kmp.h b/openmp/runtime/src/kmp.h index 3acee73dde4b..4aef35989ac9 100644 --- a/openmp/runtime/src/kmp.h +++ b/openmp/runtime/src/kmp.h @@ -3132,6 +3132,7 @@ extern void __kmp_internal_end_dest(void *); extern int __kmp_register_root(int initial_thread); extern void __kmp_unregister_root(int gtid); +extern void __kmp_unregister_library(void); // called by __kmp_internal_end() extern int __kmp_ignore_mppbeg(void); extern int __kmp_ignore_mppend(void); diff --git a/openmp/runtime/src/kmp_runtime.cpp b/openmp/runtime/src/kmp_runtime.cpp index c4fb008ecb47..aaaf9de35435 100644 --- a/openmp/runtime/src/kmp_runtime.cpp +++ b/openmp/runtime/src/kmp_runtime.cpp @@ -98,7 +98,6 @@ static int __kmp_expand_threads(int nNeed); #if KMP_OS_WINDOWS static int __kmp_unregister_root_other_thread(int gtid); #endif -static void __kmp_unregister_library(void); // called by __kmp_internal_end() static void __kmp_reap_thread(kmp_info_t *thread, int is_root); kmp_info_t *__kmp_thread_pool_insert_pt = NULL; @@ -6360,7 +6359,12 @@ static inline char *__kmp_reg_status_name() { each thread. If registration and unregistration go in diff erent threads (omp_misc_other_root_exit.cpp test case), the name of registered_lib_env env var can not be found, because the name will contain diff erent pid. */ +#if KMP_OS_UNIX && KMP_DYNAMIC_LIB // shared memory is with dynamic library + return __kmp_str_format("__KMP_REGISTERED_LIB_%d_%d", (int)getpid(), + (int)getuid()); +#else return __kmp_str_format("__KMP_REGISTERED_LIB_%d", (int)getpid()); +#endif } // __kmp_reg_status_get void __kmp_register_library_startup(void) { diff --git a/openmp/runtime/src/z_Linux_util.cpp b/openmp/runtime/src/z_Linux_util.cpp index 58cc4d25f608..a3c9c3382354 100644 --- a/openmp/runtime/src/z_Linux_util.cpp +++ b/openmp/runtime/src/z_Linux_util.cpp @@ -1149,6 +1149,7 @@ static void __kmp_team_handler(int signo) { if (__kmp_debug_buf) { __kmp_dump_debug_buffer(); } + __kmp_unregister_library(); // cleanup shared memory KMP_MB(); // Flush all pending memory write invalidates. TCW_4(__kmp_global.g.g_abort, signo); KMP_MB(); // Flush all pending memory write invalidates. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] ac40a2d - Serialization: Change InputFile to use FileEntryRef and add getVirtualFileRef, NFC
Author: Duncan P. N. Exon Smith Date: 2020-11-30T14:04:48-08:00 New Revision: ac40a2d8f16b8a8c68fc811d67f647740e965cb8 URL: https://github.com/llvm/llvm-project/commit/ac40a2d8f16b8a8c68fc811d67f647740e965cb8 DIFF: https://github.com/llvm/llvm-project/commit/ac40a2d8f16b8a8c68fc811d67f647740e965cb8.diff LOG: Serialization: Change InputFile to use FileEntryRef and add getVirtualFileRef, NFC Change the `InputFile` class to store `Optional` instead of `FileEntry*`. This paged in a few API changes: - Added `FileManager::getVirtualFileRef`, and converted `getVirtualFile` to a wrapper of it. - Updated `SourceManager::bypassFileContentsOverride` to take `FileEntryRef` and return `Optional` (`ASTReader::getInputFile` is the only caller). Differential Revision: https://reviews.llvm.org/D90053 Added: Modified: clang/include/clang/Basic/FileManager.h clang/include/clang/Basic/SourceManager.h clang/include/clang/Serialization/ModuleFile.h clang/lib/Basic/FileManager.cpp clang/lib/Basic/SourceManager.cpp clang/lib/Serialization/ASTReader.cpp Removed: diff --git a/clang/include/clang/Basic/FileManager.h b/clang/include/clang/Basic/FileManager.h index d7135a4f0ac3..449aec2b3541 100644 --- a/clang/include/clang/Basic/FileManager.h +++ b/clang/include/clang/Basic/FileManager.h @@ -239,6 +239,9 @@ class FileManager : public RefCountedBase { /// if there were a file with the given name on disk. /// /// The file itself is not accessed. + FileEntryRef getVirtualFileRef(StringRef Filename, off_t Size, + time_t ModificationTime); + const FileEntry *getVirtualFile(StringRef Filename, off_t Size, time_t ModificationTime); diff --git a/clang/include/clang/Basic/SourceManager.h b/clang/include/clang/Basic/SourceManager.h index b231644330ed..459bd088f0d7 100644 --- a/clang/include/clang/Basic/SourceManager.h +++ b/clang/include/clang/Basic/SourceManager.h @@ -35,6 +35,7 @@ #define LLVM_CLANG_BASIC_SOURCEMANAGER_H #include "clang/Basic/Diagnostic.h" +#include "clang/Basic/FileEntry.h" #include "clang/Basic/SourceLocation.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/BitVector.h" @@ -60,8 +61,6 @@ namespace clang { class ASTReader; class ASTWriter; class FileManager; -class FileEntry; -class FileEntryRef; class LineTableInfo; class SourceManager; @@ -982,11 +981,11 @@ class SourceManager : public RefCountedBase { } /// Bypass the overridden contents of a file. This creates a new FileEntry - /// and initializes the content cache for it. Returns nullptr if there is no + /// and initializes the content cache for it. Returns None if there is no /// such file in the filesystem. /// /// This should be called before parsing has begun. - const FileEntry *bypassFileContentsOverride(const FileEntry &File); + Optional bypassFileContentsOverride(FileEntryRef File); /// Specify that a file is transient. void setFileIsTransient(const FileEntry *SourceFile); diff --git a/clang/include/clang/Serialization/ModuleFile.h b/clang/include/clang/Serialization/ModuleFile.h index a309c1143350..a641a26661ae 100644 --- a/clang/include/clang/Serialization/ModuleFile.h +++ b/clang/include/clang/Serialization/ModuleFile.h @@ -67,13 +67,13 @@ class InputFile { OutOfDate = 2, NotFound = 3 }; - llvm::PointerIntPair Val; + llvm::PointerIntPair Val; public: InputFile() = default; - InputFile(const FileEntry *File, -bool isOverridden = false, bool isOutOfDate = false) { + InputFile(FileEntryRef File, bool isOverridden = false, +bool isOutOfDate = false) { assert(!(isOverridden && isOutOfDate) && "an overridden cannot be out-of-date"); unsigned intVal = 0; @@ -81,7 +81,7 @@ class InputFile { intVal = Overridden; else if (isOutOfDate) intVal = OutOfDate; -Val.setPointerAndInt(File, intVal); +Val.setPointerAndInt(&File.getMapEntry(), intVal); } static InputFile getNotFound() { @@ -90,7 +90,11 @@ class InputFile { return File; } - const FileEntry *getFile() const { return Val.getPointer(); } + OptionalFileEntryRefDegradesToFileEntryPtr getFile() const { +if (auto *P = Val.getPointer()) + return FileEntryRef(*P); +return None; + } bool isOverridden() const { return Val.getInt() == Overridden; } bool isOutOfDate() const { return Val.getInt() == OutOfDate; } bool isNotFound() const { return Val.getInt() == NotFound; } diff --git a/clang/lib/Basic/FileManager.cpp b/clang/lib/Basic/FileManager.cpp index 38d9403eadb9..ef0c69ae0107 100644 --- a/clang/lib/Basic/FileManager.cpp +++ b/clang/lib/Basic/FileManager.cpp @@ -335,9 +335,13 @@ FileManager::getFileRef(StringRef Filename, bool openFile, bool CacheFailure) { return ReturnedRef; } -const FileEntry * -Fil
[llvm-branch-commits] [openmp] fd3d1b0 - [OpenMP][Tests][NFC] Use FileCheck from cmake config
Author: Joachim Protze Date: 2020-11-30T23:16:56+01:00 New Revision: fd3d1b09c12f1419292172627dbca9929f0daf39 URL: https://github.com/llvm/llvm-project/commit/fd3d1b09c12f1419292172627dbca9929f0daf39 DIFF: https://github.com/llvm/llvm-project/commit/fd3d1b09c12f1419292172627dbca9929f0daf39.diff LOG: [OpenMP][Tests][NFC] Use FileCheck from cmake config Added: Modified: openmp/runtime/test/lit.cfg Removed: diff --git a/openmp/runtime/test/lit.cfg b/openmp/runtime/test/lit.cfg index e133ef095a2a..0d4a6107ff2b 100644 --- a/openmp/runtime/test/lit.cfg +++ b/openmp/runtime/test/lit.cfg @@ -144,3 +144,5 @@ if config.has_ompt: else: config.substitutions.append(("%preload-tool", "env LD_PRELOAD=%T/tool.so")) config.substitutions.append(("%no-as-needed-flag", "-Wl,--no-as-needed")) +else: +config.substitutions.append(("FileCheck", config.test_filecheck)) ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 00bbef2 - [llvm-symbolizer] Fix native symbolization on windows for inline sites.
Author: Amy Huang Date: 2020-11-30T14:27:35-08:00 New Revision: 00bbef2bb20cf212722de282e4eb9afd09ab50db URL: https://github.com/llvm/llvm-project/commit/00bbef2bb20cf212722de282e4eb9afd09ab50db DIFF: https://github.com/llvm/llvm-project/commit/00bbef2bb20cf212722de282e4eb9afd09ab50db.diff LOG: [llvm-symbolizer] Fix native symbolization on windows for inline sites. The existing code handles this correctly and I checked that the code in NativeInlineSiteSymbol also handles this correctly, but it was wrong in the NativeFunctionSymbol code. Differential Revision: https://reviews.llvm.org/D92134 Added: Modified: lld/test/COFF/symbolizer-inline.s llvm/lib/DebugInfo/PDB/Native/NativeFunctionSymbol.cpp Removed: diff --git a/lld/test/COFF/symbolizer-inline.s b/lld/test/COFF/symbolizer-inline.s index c0db693f784c..9cf33b5d74a3 100644 --- a/lld/test/COFF/symbolizer-inline.s +++ b/lld/test/COFF/symbolizer-inline.s @@ -3,6 +3,7 @@ # RUN: lld-link -entry:main -nodefaultlib %t.obj -out:%t.exe -pdb:%t.pdb -debug # RUN: llvm-symbolizer --obj=%t.exe --use-native-pdb-reader --relative-address \ # RUN: 0x1014 0x1018 0x101c 0x1023 0x1024 | FileCheck %s +# RUN: 0x1037 0x103A 0x104B 0x104E | FileCheck %s # Compiled from this cpp code, with modifications to add extra inline line and # file changes: @@ -12,43 +13,16 @@ # return x + 1; # } # __attribute__((always_inline)) int inlinee_1(int x) { -# return inlinee_2(x) + 1; +# return inlinee_2(x) + 2; # } # int main() { -# return inlinee_1(33); +# int x = inlinee_1(33); +# int y = inlinee_2(22); +# int z = inlinee_2(11); +# return x + y + z; # } - -# CHECK: inlinee_1 -# CHECK-NEXT: C:\src\test.cpp:9:0 -# CHECK-NEXT: main -# CHECK-NEXT: C:\src\test.cpp:13:10 - -# CHECK: inlinee_1 -# CHECK-NEXT: C:\src\test.cpp:10:0 -# CHECK-NEXT: main -# CHECK-NEXT: C:\src\test.cpp:13:10 - -# CHECK: inlinee_2 -# CHECK-NEXT: C:\src\test.cpp:5:0 -# CHECK-NEXT: inlinee_1 -# CHECK-NEXT: C:\src\test.cpp:9:0 -# CHECK-NEXT: main -# CHECK-NEXT: C:\src\test.cpp:13:10 - -# CHECK: inlinee_2 -# CHECK-NEXT: C:\src\file.cpp:5:0 -# CHECK-NEXT: inlinee_1 -# CHECK-NEXT: C:\src\test.cpp:9:0 -# CHECK-NEXT: main -# CHECK-NEXT: C:\src\test.cpp:13:10 - -# CHECK: inlinee_1 -# CHECK-NEXT: C:\src\test.cpp:9:0 -# CHECK-NEXT: main -# CHECK-NEXT: C:\src\test.cpp:13:10 - - .text + .text .def @feat.00; .scl3; .type 0; @@ -65,45 +39,118 @@ main: # @main .Lfunc_begin0: .cv_func_id 0 - .cv_file1 "C:\\src\\test.cpp" "4BECA437CFE062C7D0B74B1851B65988" 1 - .cv_file 2 "C:\\src\\file.cpp" "" 1 - .cv_loc 0 1 12 0# test.cpp:12:0 + .cv_file1 "C:\\src\\test.cpp" "67680A954FC00F980188190C8D23C68E" 1 + .cv_file 2 "C:\\src\\fakefile.cpp" "" 1 + .cv_loc 0 1 9 0 # test.cpp:9:0 # %bb.0:# %entry - subq$16, %rsp - movl$0, 4(%rsp) - movl$33, 8(%rsp) + subq$32, %rsp + movl$0, 12(%rsp) + movl$33, 16(%rsp) .Ltmp0: - .cv_inline_site_id 1 within 0 inlined_at 1 13 10 - .cv_loc 1 1 9 20# test.cpp:9:20 - movl8(%rsp), %eax - .cv_loc 1 1 10 0# test.cpp:10:0 - movl%eax, 12(%rsp) + .cv_inline_site_id 1 within 0 inlined_at 1 10 11 + .cv_loc 1 1 6 20# test.cpp:6:20 + +# CHECK: inlinee_1 +# CHECK-NEXT: C:\src\test.cpp:6:0 +# CHECK-NEXT: main +# CHECK-NEXT: C:\src\test.cpp:10:11 + movl16(%rsp), %eax + +# Add a line change here. + .cv_loc 1 1 7 7 + +# CHECK: inlinee_1 +# CHECK-NEXT: C:\src\test.cpp:7:0 +# CHECK-NEXT: main +# CHECK-NEXT: C:\src\test.cpp:10:11 + movl%eax, 20(%rsp) .Ltmp1: - .cv_inline_site_id 2 within 1 inlined_at 1 9 10 - .cv_loc 2 1 5 10# test.cpp:5:10 - movl12(%rsp), %eax - .cv_loc 2 1 5 12# test.cpp:5:12 + .cv_inline_site_id 2 within 1 inlined_at 1 6 10 + .cv_loc 2 1 2 10# test.cpp:2:10 + +# CHECK: inlinee_2 +# CHECK-NEXT: C:\src\test.cpp:2:0 +# CHECK-NEXT: inlinee_1 +# CHECK-NEXT: C:\src\test.cpp:6:0 +# CHECK-NEXT: main +# CHECK-NEXT: C:\src\test.cpp:10:11 + movl20(%rsp), %eax + .cv_loc 2 1 2 12# test.cpp:2:12 addl$1, %eax - .cv_loc 2 2 5 13# file.cpp:5:13 + +# Add a file change. + .cv_loc 2 2 102 0 # fakefile.cpp:102:0 + +# CHECK: inlinee_2 +# CHECK-NEXT: C:\src\fakefile.cpp:102:0 +# CHECK-NEXT: inlinee_1 +# CHECK-NEXT: C:\src\test.cpp:6:0 +# CHECK-NEXT: main +# CHECK-NEXT: C:\src\test.cpp:10:11 nop + .Ltmp2: - .
[llvm-branch-commits] [lldb] 1b9f214 - [lldb] Give TestDefaultTemplateArgs a unique class name
Author: Jonas Devlieghere Date: 2020-11-30T14:41:35-08:00 New Revision: 1b9f214efca7d5855f4e3dd1969c4cbe77078f97 URL: https://github.com/llvm/llvm-project/commit/1b9f214efca7d5855f4e3dd1969c4cbe77078f97 DIFF: https://github.com/llvm/llvm-project/commit/1b9f214efca7d5855f4e3dd1969c4cbe77078f97.diff LOG: [lldb] Give TestDefaultTemplateArgs a unique class name Multiple tests cannot share the same test class name. Added: Modified: lldb/test/API/lang/cpp/default-template-args/TestDefaultTemplateArgs.py Removed: diff --git a/lldb/test/API/lang/cpp/default-template-args/TestDefaultTemplateArgs.py b/lldb/test/API/lang/cpp/default-template-args/TestDefaultTemplateArgs.py index 970c3522a175..e009b23d5b63 100644 --- a/lldb/test/API/lang/cpp/default-template-args/TestDefaultTemplateArgs.py +++ b/lldb/test/API/lang/cpp/default-template-args/TestDefaultTemplateArgs.py @@ -7,7 +7,7 @@ from lldbsuite.test.lldbtest import * from lldbsuite.test import lldbutil -class TestCase(TestBase): +class TestDefaultTemplateArgs(TestBase): mydir = TestBase.compute_mydir(__file__) ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 1b042de - FileManager: Add FileEntryRef::getDir, returning DirectoryEntryRef
Author: Duncan P. N. Exon Smith Date: 2020-11-30T14:50:46-08:00 New Revision: 1b042de5b29af4869a77ecbc632029fba0313dec URL: https://github.com/llvm/llvm-project/commit/1b042de5b29af4869a77ecbc632029fba0313dec DIFF: https://github.com/llvm/llvm-project/commit/1b042de5b29af4869a77ecbc632029fba0313dec.diff LOG: FileManager: Add FileEntryRef::getDir, returning DirectoryEntryRef Add `FileEntryRef::getDir`, which returns a `DirectoryEntryRef`. This includes a few changes: - Customize `OptionalStorage` so that `Optional` is pointer-sized (like the change made to `Optional`). Factored out a common class, `FileMgr::MapEntryOptionalStorage`, to reduce the code duplication. - Store an `Optional` in `FileEntryRef::MapValue`. This is set if and only if `MapValue` has a real `FileEntry`. - Change `FileManager::getFileRef` and `getVirtualFileRef` to use `getDirectoryRef` and store it in the `StringMap` for `FileEntryRef`. Differential Revision: https://reviews.llvm.org/D90484 Added: Modified: clang/include/clang/Basic/DirectoryEntry.h clang/include/clang/Basic/FileEntry.h clang/lib/Basic/FileManager.cpp clang/unittests/Basic/FileEntryTest.cpp Removed: diff --git a/clang/include/clang/Basic/DirectoryEntry.h b/clang/include/clang/Basic/DirectoryEntry.h index 7c634709ca9b..a6ec5f89aa28 100644 --- a/clang/include/clang/Basic/DirectoryEntry.h +++ b/clang/include/clang/Basic/DirectoryEntry.h @@ -20,6 +20,11 @@ #include "llvm/Support/ErrorOr.h" namespace clang { +namespace FileMgr { + +template class MapEntryOptionalStorage; + +} // end namespace FileMgr /// Cached information about one directory (either on disk or in /// the virtual file system). @@ -37,20 +42,109 @@ class DirectoryEntry { /// as it was accessed by the FileManager's client. class DirectoryEntryRef { public: - const DirectoryEntry &getDirEntry() const { return *Entry->getValue(); } + const DirectoryEntry &getDirEntry() const { return *ME->getValue(); } + + StringRef getName() const { return ME->getKey(); } + + using MapEntry = llvm::StringMapEntry>; - StringRef getName() const { return Entry->getKey(); } + const MapEntry &getMapEntry() const { return *ME; } + + DirectoryEntryRef() = delete; + DirectoryEntryRef(MapEntry &ME) : ME(&ME) {} private: - friend class FileManager; + friend class FileMgr::MapEntryOptionalStorage; + struct optional_none_tag {}; - DirectoryEntryRef( - llvm::StringMapEntry> *Entry) - : Entry(Entry) {} + // Private constructor for use by OptionalStorage. + DirectoryEntryRef(optional_none_tag) : ME(nullptr) {} + bool hasOptionalValue() const { return ME; } - const llvm::StringMapEntry> *Entry; + const MapEntry *ME; }; +namespace FileMgr { + +/// Customized storage for refs derived from map entires in FileManager, using +/// the private optional_none_tag to keep it to the size of a single pointer. +template class MapEntryOptionalStorage { + using optional_none_tag = typename RefTy::optional_none_tag; + RefTy MaybeRef; + +public: + MapEntryOptionalStorage() : MaybeRef(optional_none_tag()) {} + + template + explicit MapEntryOptionalStorage(llvm::optional_detail::in_place_t, + ArgTypes &&...Args) + : MaybeRef(std::forward(Args)...) {} + + void reset() { MaybeRef = optional_none_tag(); } + + bool hasValue() const { return MaybeRef.hasOptionalValue(); } + + RefTy &getValue() LLVM_LVALUE_FUNCTION { +assert(hasValue()); +return MaybeRef; + } + RefTy const &getValue() const LLVM_LVALUE_FUNCTION { +assert(hasValue()); +return MaybeRef; + } +#if LLVM_HAS_RVALUE_REFERENCE_THIS + RefTy &&getValue() && { +assert(hasValue()); +return std::move(MaybeRef); + } +#endif + + template void emplace(Args &&...args) { +MaybeRef = RefTy(std::forward(args)...); + } + + MapEntryOptionalStorage &operator=(RefTy Ref) { +MaybeRef = Ref; +return *this; + } +}; + +} // end namespace FileMgr } // end namespace clang +namespace llvm { +namespace optional_detail { + +/// Customize OptionalStorage to use DirectoryEntryRef and +/// its optional_none_tag to keep it the size of a single pointer. +template <> +class OptionalStorage +: public clang::FileMgr::MapEntryOptionalStorage { + using StorageImpl = + clang::FileMgr::MapEntryOptionalStorage; + +public: + OptionalStorage() = default; + + template + explicit OptionalStorage(in_place_t, ArgTypes &&...Args) + : StorageImpl(in_place_t{}, std::forward(Args)...) {} + + OptionalStorage &operator=(clang::DirectoryEntryRef Ref) { +StorageImpl::operator=(Ref); +return *this; + } +}; + +static_assert(sizeof(Optional) == + sizeof(clang::DirectoryEntryRef), + "Optional must avoid size overhead"); + +static_assert( +std::is_trivially_copyable>::value, +"Optional should be trivially copyable"); +
[llvm-branch-commits] [clang] 94f537c - Remove dead code added in ac49500cd0484e1b2dcf37fa4c0dade6f113c2c9, NFC
Author: Duncan P. N. Exon Smith Date: 2020-11-30T14:50:46-08:00 New Revision: 94f537c6b2bb55c8e058a9989d02ab0d68a0c61a URL: https://github.com/llvm/llvm-project/commit/94f537c6b2bb55c8e058a9989d02ab0d68a0c61a DIFF: https://github.com/llvm/llvm-project/commit/94f537c6b2bb55c8e058a9989d02ab0d68a0c61a.diff LOG: Remove dead code added in ac49500cd0484e1b2dcf37fa4c0dade6f113c2c9, NFC This was a copy/paste bug; `M0` is never referenced later. Added: Modified: clang/unittests/Basic/FileEntryTest.cpp Removed: diff --git a/clang/unittests/Basic/FileEntryTest.cpp b/clang/unittests/Basic/FileEntryTest.cpp index b759d3ea36d6..f2619a21def7 100644 --- a/clang/unittests/Basic/FileEntryTest.cpp +++ b/clang/unittests/Basic/FileEntryTest.cpp @@ -92,7 +92,6 @@ TEST(FileEntryTest, equals) { EXPECT_NE(&R2.getFileEntry(), R1); EXPECT_NE(R1, R2); - OptionalFileEntryRefDegradesToFileEntryPtr M0; OptionalFileEntryRefDegradesToFileEntryPtr M1 = R1; EXPECT_EQ(M1, &R1.getFileEntry()); ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] 8cdf492 - [llvm-symbolizer] Fix typo in llvm-symbolizer test from a previous commit.
Author: Amy Huang Date: 2020-11-30T15:08:11-08:00 New Revision: 8cdf4920c47ddd3d60bdc3298f525512d483ce65 URL: https://github.com/llvm/llvm-project/commit/8cdf4920c47ddd3d60bdc3298f525512d483ce65 DIFF: https://github.com/llvm/llvm-project/commit/8cdf4920c47ddd3d60bdc3298f525512d483ce65.diff LOG: [llvm-symbolizer] Fix typo in llvm-symbolizer test from a previous commit. (Commit was 00bbef2bb20cf212722de282e4eb9afd09ab50db) Added: Modified: lld/test/COFF/symbolizer-inline.s Removed: diff --git a/lld/test/COFF/symbolizer-inline.s b/lld/test/COFF/symbolizer-inline.s index 9cf33b5d74a3..7f334617fdf4 100644 --- a/lld/test/COFF/symbolizer-inline.s +++ b/lld/test/COFF/symbolizer-inline.s @@ -2,7 +2,7 @@ # RUN: llvm-mc -filetype=obj %s -o %t.obj -triple x86_64-windows-msvc # RUN: lld-link -entry:main -nodefaultlib %t.obj -out:%t.exe -pdb:%t.pdb -debug # RUN: llvm-symbolizer --obj=%t.exe --use-native-pdb-reader --relative-address \ -# RUN: 0x1014 0x1018 0x101c 0x1023 0x1024 | FileCheck %s +# RUN: 0x1014 0x1018 0x101c 0x1023 0x1024 \ # RUN: 0x1037 0x103A 0x104B 0x104E | FileCheck %s # Compiled from this cpp code, with modifications to add extra inline line and ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] cf8ff75 - [clang][RelativeVTablesABI] Use dso_local_equivalent rather than emitting stubs
Author: Leonard Chan Date: 2020-11-30T16:02:35-08:00 New Revision: cf8ff75bade763b054476321dcb82dcb2e7744c7 URL: https://github.com/llvm/llvm-project/commit/cf8ff75bade763b054476321dcb82dcb2e7744c7 DIFF: https://github.com/llvm/llvm-project/commit/cf8ff75bade763b054476321dcb82dcb2e7744c7.diff LOG: [clang][RelativeVTablesABI] Use dso_local_equivalent rather than emitting stubs Thanks to D77248, we can bypass the use of stubs altogether and use PLT relocations if they are available for the target. LLVM and LLD support the R_AARCH64_PLT32 relocation, so we can also guarantee a static PLT relocation on AArch64. Not emitting these stubs saves a lot of extra binary size. Differential Revision: https://reviews.llvm.org/D83812 Added: Modified: clang/lib/CodeGen/CGVTables.cpp clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp clang/test/CodeGenCXX/RelativeVTablesABI/child-vtable-in-comdat.cpp clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp clang/test/CodeGenCXX/RelativeVTablesABI/diamond-inheritance.cpp clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp clang/test/CodeGenCXX/RelativeVTablesABI/inheritted-virtual-function.cpp clang/test/CodeGenCXX/RelativeVTablesABI/inline-virtual-function.cpp clang/test/CodeGenCXX/RelativeVTablesABI/inlined-key-function.cpp clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp clang/test/CodeGenCXX/RelativeVTablesABI/override-pure-virtual-method.cpp clang/test/CodeGenCXX/RelativeVTablesABI/overriden-virtual-function.cpp clang/test/CodeGenCXX/RelativeVTablesABI/parent-and-child-in-comdats.cpp clang/test/CodeGenCXX/RelativeVTablesABI/parent-vtable-in-comdat.cpp clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-flag.cpp clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp Removed: clang/test/CodeGenCXX/RelativeVTablesABI/no-stub-when-dso-local.cpp clang/test/CodeGenCXX/RelativeVTablesABI/pass-byval-attributes.cpp clang/test/CodeGenCXX/RelativeVTablesABI/stub-linkages.cpp diff --git a/clang/lib/CodeGen/CGVTables.cpp b/clang/lib/CodeGen/CGVTables.cpp index 75afc860cc47..bef9a293b7ed 100644 --- a/clang/lib/CodeGen/CGVTables.cpp +++ b/clang/lib/CodeGen/CGVTables.cpp @@ -641,7 +641,7 @@ void CodeGenVTables::addRelativeComponent(ConstantArrayBuilder &builder, llvm::Constant *target; if (auto *func = dyn_cast(globalVal)) { -target = getOrCreateRelativeStub(func, stubLinkage, isCompleteDtor); +target = llvm::DSOLocalEquivalent::get(func); } else { llvm::SmallString<16> rttiProxyName(globalVal->getName()); rttiProxyName.append(".rtti_proxy"); @@ -669,74 +669,6 @@ void CodeGenVTables::addRelativeComponent(ConstantArrayBuilder &builder, /*position=*/vtableAddressPoint); } -llvm::Function *CodeGenVTables::getOrCreateRelativeStub( -llvm::Function *func, llvm::GlobalValue::LinkageTypes stubLinkage, -bool isCompleteDtor) const { - // A complete object destructor can later be substituted in the vtable for an - // appropriate base object destructor when optimizations are enabled. This can - // happen for child classes that don't have their own destructor. In the case - // where a parent virtual destructor is not guaranteed to be in the same - // linkage unit as the child vtable, it's possible for an external reference - // for this destructor to be substituted into the child vtable, preventing it - // from being in rodata. If this function is a complete virtual destructor, we - // can just force a stub to be emitted for it. - if (func->isDSOLocal() && !isCompleteDtor) -return func; - - llvm::SmallString<16> stubName(func->getName()); - stubName.append(".stub"); - - // Instead of taking the offset between the vtable and virtual function - // directly, we emit a dso_local stub that just contains a tail call to the - // original virtual function and take the offset between that and the - // vtable. We do this because there are some cases where the original - // function that would've been inserted into the vtable is not dso_local - // which may require some kind of dynamic relocation which prevents the - // vtable from being readonly. On x86_64, taking the offset between the - // function and the vtable gets lowered to the offset between the PLT entry - // for the function and the vtable which gives us a PLT32 reloc. On AArch64, - // right now only CALL26 and JUMP26 instructions generate PLT relocations, - // so we manifest them with stubs that are just jumps to the original - // function. - auto &module = CGM.getModule(); - llvm::Function *stub = module.getFunction(stubName
[llvm-branch-commits] [llvm] 91aff1d - [InlineCost] prefer range-for. NFC
Author: Nick Desaulniers Date: 2020-11-30T16:07:40-08:00 New Revision: 91aff1d8bae02fc65970b52895f05d3574cbb481 URL: https://github.com/llvm/llvm-project/commit/91aff1d8bae02fc65970b52895f05d3574cbb481 DIFF: https://github.com/llvm/llvm-project/commit/91aff1d8bae02fc65970b52895f05d3574cbb481.diff LOG: [InlineCost] prefer range-for. NFC Prefer range-for over iterators when such methods exist. Precommitted from https://reviews.llvm.org/D91816. Signed-off-by: Nick Desaulniers Reviewed By: dblaikie Differential Revision: https://reviews.llvm.org/D92350 Added: Modified: llvm/lib/Analysis/InlineCost.cpp Removed: diff --git a/llvm/lib/Analysis/InlineCost.cpp b/llvm/lib/Analysis/InlineCost.cpp index f6a1f2dc3879..cb731f6a3a66 100644 --- a/llvm/lib/Analysis/InlineCost.cpp +++ b/llvm/lib/Analysis/InlineCost.cpp @@ -841,11 +841,11 @@ bool CallAnalyzer::accumulateGEPOffset(GEPOperator &GEP, APInt &Offset) { bool CallAnalyzer::isGEPFree(GetElementPtrInst &GEP) { SmallVector Operands; Operands.push_back(GEP.getOperand(0)); - for (User::op_iterator I = GEP.idx_begin(), E = GEP.idx_end(); I != E; ++I) -if (Constant *SimpleOp = SimplifiedValues.lookup(*I)) + for (const Use &Op : GEP.indices()) +if (Constant *SimpleOp = SimplifiedValues.lookup(Op)) Operands.push_back(SimpleOp); else - Operands.push_back(*I); + Operands.push_back(Op); return TargetTransformInfo::TCC_Free == TTI.getUserCost(&GEP, Operands, TargetTransformInfo::TCK_SizeAndLatency); @@ -1017,8 +1017,8 @@ bool CallAnalyzer::visitGetElementPtr(GetElementPtrInst &I) { // Lambda to check whether a GEP's indices are all constant. auto IsGEPOffsetConstant = [&](GetElementPtrInst &GEP) { -for (User::op_iterator I = GEP.idx_begin(), E = GEP.idx_end(); I != E; ++I) - if (!isa(*I) && !SimplifiedValues.lookup(*I)) +for (const Use &Op : GEP.indices()) + if (!isa(Op) && !SimplifiedValues.lookup(Op)) return false; return true; }; @@ -1884,8 +1884,8 @@ bool CallAnalyzer::visitInstruction(Instruction &I) { // We found something we don't understand or can't handle. Mark any SROA-able // values in the operand list as no longer viable. - for (User::op_iterator OI = I.op_begin(), OE = I.op_end(); OI != OE; ++OI) -disableSROA(*OI); + for (const Use &Op : I.operands()) +disableSROA(Op); return false; } @@ -1900,7 +1900,7 @@ bool CallAnalyzer::visitInstruction(Instruction &I) { InlineResult CallAnalyzer::analyzeBlock(BasicBlock *BB, SmallPtrSetImpl &EphValues) { - for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) { + for (Instruction &I : *BB) { // FIXME: Currently, the number of instructions in a function regardless of // our ability to simplify them during inline to constants or dead code, // are actually used by the vector bonus heuristic. As long as that's true, @@ -1916,11 +1916,11 @@ CallAnalyzer::analyzeBlock(BasicBlock *BB, continue; // Skip ephemeral values. -if (EphValues.count(&*I)) +if (EphValues.count(&I)) continue; ++NumInstructions; -if (isa(I) || I->getType()->isVectorTy()) +if (isa(I) || I.getType()->isVectorTy()) ++NumVectorInstructions; // If the instruction simplified to a constant, there is no cost to this @@ -1928,14 +1928,14 @@ CallAnalyzer::analyzeBlock(BasicBlock *BB, // all of the per-instruction logic. The visit tree returns true if we // consumed the instruction in any way, and false if the instruction's base // cost should count against inlining. -onInstructionAnalysisStart(&*I); +onInstructionAnalysisStart(&I); -if (Base::visit(&*I)) +if (Base::visit(&I)) ++NumInstructionsSimplified; else onMissedSimplification(); -onInstructionAnalysisFinish(&*I); +onInstructionAnalysisFinish(&I); using namespace ore; // If the visit this instruction detected an uninlinable pattern, abort. InlineResult IR = InlineResult::success(); @@ -2096,23 +2096,23 @@ InlineResult CallAnalyzer::analyze() { // Populate our simplified values by mapping from function arguments to call // arguments with known important simplifications. auto CAI = CandidateCall.arg_begin(); - for (Function::arg_iterator FAI = F.arg_begin(), FAE = F.arg_end(); - FAI != FAE; ++FAI, ++CAI) { + for (Argument &FAI : F.args()) { assert(CAI != CandidateCall.arg_end()); if (Constant *C = dyn_cast(CAI)) - SimplifiedValues[&*FAI] = C; + SimplifiedValues[&FAI] = C; Value *PtrArg = *CAI; if (ConstantInt *C = stripAndComputeInBoundsConstantOffsets(PtrArg)) { - ConstantOffsetPtrs[&*FAI] = std::make_pair(PtrArg, C->getValue()); + ConstantOffsetPtrs[&FAI] = std::make_pair(PtrArg, C->getValue()); /
[llvm-branch-commits] [clang] 43b5b48 - Fix GCC 5.3 compile error in ASTImporter code
Author: Reid Kleckner Date: 2020-11-30T16:29:29-08:00 New Revision: 43b5b485a203f190ee4d5d3cab19c44ca865d316 URL: https://github.com/llvm/llvm-project/commit/43b5b485a203f190ee4d5d3cab19c44ca865d316 DIFF: https://github.com/llvm/llvm-project/commit/43b5b485a203f190ee4d5d3cab19c44ca865d316.diff LOG: Fix GCC 5.3 compile error in ASTImporter code Try to simplify this code a different way: use less Expected, more outparams. Added: Modified: clang/lib/AST/ASTImporter.cpp Removed: diff --git a/clang/lib/AST/ASTImporter.cpp b/clang/lib/AST/ASTImporter.cpp index 1b014314996b..7a1415b658b8 100644 --- a/clang/lib/AST/ASTImporter.cpp +++ b/clang/lib/AST/ASTImporter.cpp @@ -202,6 +202,9 @@ namespace clang { return *MaybeVal; } +ExplicitSpecifier importExplicitSpecifier(Error &Err, + ExplicitSpecifier ESpec); + // Wrapper for an overload set. template struct CallOverloadedCreateFun { template decltype(auto) operator()(Args &&... args) { @@ -3153,6 +3156,14 @@ bool ASTNodeImporter::hasAutoReturnTypeDeclaredInside(FunctionDecl *D) { return false; } +ExplicitSpecifier +ASTNodeImporter::importExplicitSpecifier(Error &Err, ExplicitSpecifier ESpec) { + Expr *ExplicitExpr = ESpec.getExpr(); + if (ExplicitExpr) +ExplicitExpr = importChecked(Err, ESpec.getExpr()); + return ExplicitSpecifier(ExplicitExpr, ESpec.getKind()); +} + ExpectedDecl ASTNodeImporter::VisitFunctionDecl(FunctionDecl *D) { SmallVector Redecls = getCanonicalForwardRedeclChain(D); @@ -3329,34 +3340,17 @@ ExpectedDecl ASTNodeImporter::VisitFunctionDecl(FunctionDecl *D) { return ToPOrErr.takeError(); } - // Common code to import an explicit specifier of diff erent kind of functions. - auto ImportExplicitExpr = [this, &Err](auto *Fun) -> ExpectedExpr { -Expr *ExplicitExpr = nullptr; -if (Fun->getExplicitSpecifier().getExpr()) { - ExplicitExpr = importChecked(Err, Fun->getExplicitSpecifier().getExpr()); - if (Err) -return std::move(Err); -} -return ExplicitExpr; - }; - // Create the imported function. FunctionDecl *ToFunction = nullptr; if (auto *FromConstructor = dyn_cast(D)) { -Expr *ExplicitExpr = nullptr; -if (FromConstructor->getExplicitSpecifier().getExpr()) { - auto Imp = import(FromConstructor->getExplicitSpecifier().getExpr()); - if (!Imp) -return Imp.takeError(); - ExplicitExpr = *Imp; -} +ExplicitSpecifier ESpec = +importExplicitSpecifier(Err, FromConstructor->getExplicitSpecifier()); +if (Err) + return std::move(Err); if (GetImportedOrCreateDecl( ToFunction, D, Importer.getToContext(), cast(DC), -ToInnerLocStart, NameInfo, T, TInfo, -ExplicitSpecifier( -ExplicitExpr, -FromConstructor->getExplicitSpecifier().getKind()), -D->isInlineSpecified(), D->isImplicit(), D->getConstexprKind(), +ToInnerLocStart, NameInfo, T, TInfo, ESpec, D->isInlineSpecified(), +D->isImplicit(), D->getConstexprKind(), InheritedConstructor(), // FIXME: Properly import inherited // constructor info TrailingRequiresClause)) @@ -3381,14 +3375,13 @@ ExpectedDecl ASTNodeImporter::VisitFunctionDecl(FunctionDecl *D) { ToDtor->setOperatorDelete(ToOperatorDelete, ToThisArg); } else if (CXXConversionDecl *FromConversion = dyn_cast(D)) { -ExpectedExpr ExplicitExpr = ImportExplicitExpr(FromConversion); -if (!ExplicitExpr) - return ExplicitExpr.takeError(); +ExplicitSpecifier ESpec = +importExplicitSpecifier(Err, FromConversion->getExplicitSpecifier()); +if (Err) + return std::move(Err); if (GetImportedOrCreateDecl( ToFunction, D, Importer.getToContext(), cast(DC), -ToInnerLocStart, NameInfo, T, TInfo, D->isInlineSpecified(), -ExplicitSpecifier(*ExplicitExpr, - FromConversion->getExplicitSpecifier().getKind()), +ToInnerLocStart, NameInfo, T, TInfo, D->isInlineSpecified(), ESpec, D->getConstexprKind(), SourceLocation(), TrailingRequiresClause)) return ToFunction; } else if (auto *Method = dyn_cast(D)) { @@ -3399,13 +3392,12 @@ ExpectedDecl ASTNodeImporter::VisitFunctionDecl(FunctionDecl *D) { SourceLocation(), TrailingRequiresClause)) return ToFunction; } else if (auto *Guide = dyn_cast(D)) { -ExpectedExpr ExplicitExpr = ImportExplicitExpr(Guide); -if (!ExplicitExpr) - return ExplicitExpr.takeError(); +ExplicitSpecifier ESpec = +importExplicitSpecifier(Err, Guide->getExplicitSpecifier()); +if (Err) + return std::move(Err); if (GetImportedOrCreateDecl( -ToFunction,
[llvm-branch-commits] [libcxx] 871f96e - [libcxx] remove checks for __STDCPP_THREADS__ as it is defined by compiler
Author: Zequan Wu Date: 2020-11-30T16:36:47-08:00 New Revision: 871f96eed3797061c8b1c82fb77d077d110a2da7 URL: https://github.com/llvm/llvm-project/commit/871f96eed3797061c8b1c82fb77d077d110a2da7 DIFF: https://github.com/llvm/llvm-project/commit/871f96eed3797061c8b1c82fb77d077d110a2da7.diff LOG: [libcxx] remove checks for __STDCPP_THREADS__ as it is defined by compiler Differential Revision: https://reviews.llvm.org/D92349 Added: Modified: libcxx/include/__config Removed: diff --git a/libcxx/include/__config b/libcxx/include/__config index de40ffc3162e..0b850f192d54 100644 --- a/libcxx/include/__config +++ b/libcxx/include/__config @@ -1152,10 +1152,6 @@ _LIBCPP_FUNC_VIS extern "C" void __sanitizer_annotate_contiguous_container( _LIBCPP_HAS_NO_THREADS is defined. #endif -#if defined(__STDCPP_THREADS__) && defined(_LIBCPP_HAS_NO_THREADS) -#error _LIBCPP_HAS_NO_THREADS cannot be set when __STDCPP_THREADS__ is set. -#endif - #if !defined(_LIBCPP_HAS_NO_THREADS) && !defined(__STDCPP_THREADS__) #define __STDCPP_THREADS__ 1 #endif ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 87ff156 - [AArch64][GlobalISel] Fix crash during legalization of a vector G_SELECT with scalar mask.
Author: Amara Emerson Date: 2020-11-30T16:37:49-08:00 New Revision: 87ff156414370043cf149e0c77513c5227b336b1 URL: https://github.com/llvm/llvm-project/commit/87ff156414370043cf149e0c77513c5227b336b1 DIFF: https://github.com/llvm/llvm-project/commit/87ff156414370043cf149e0c77513c5227b336b1.diff LOG: [AArch64][GlobalISel] Fix crash during legalization of a vector G_SELECT with scalar mask. The lowering of vector selects needs to first splat the scalar mask into a vector first. This was causing a crash when building oggenc in the test suite. Differential Revision: https://reviews.llvm.org/D91655 Added: Modified: llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir Removed: diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h index 0ce40e60e6fc..739600ead21a 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h @@ -958,6 +958,23 @@ class MachineIRBuilder { MachineInstrBuilder buildBuildVectorTrunc(const DstOp &Res, ArrayRef Ops); + /// Build and insert a vector splat of a scalar \p Src using a + /// G_INSERT_VECTOR_ELT and G_SHUFFLE_VECTOR idiom. + /// + /// \pre setBasicBlock or setMI must have been called. + /// \pre \p Src must have the same type as the element type of \p Dst + /// + /// \return a MachineInstrBuilder for the newly created instruction. + MachineInstrBuilder buildShuffleSplat(const DstOp &Res, const SrcOp &Src); + + /// Build and insert \p Res = G_SHUFFLE_VECTOR \p Src1, \p Src2, \p Mask + /// + /// \pre setBasicBlock or setMI must have been called. + /// + /// \return a MachineInstrBuilder for the newly created instruction. + MachineInstrBuilder buildShuffleVector(const DstOp &Res, const SrcOp &Src1, + const SrcOp &Src2, ArrayRef Mask); + /// Build and insert \p Res = G_CONCAT_VECTORS \p Op0, ... /// /// G_CONCAT_VECTORS creates a vector from the concatenation of 2 or more diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index 1ad6109a65be..7b346a1bbbec 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -6217,8 +6217,23 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerSelect(MachineInstr &MI) { if (!DstTy.isVector()) return UnableToLegalize; - if (MaskTy.getSizeInBits() != Op1Ty.getSizeInBits()) + // Vector selects can have a scalar predicate. If so, splat into a vector and + // finish for later legalization attempts to try again. + if (MaskTy.isScalar()) { +Register MaskElt = MaskReg; +if (MaskTy.getSizeInBits() < DstTy.getScalarSizeInBits()) + MaskElt = MIRBuilder.buildSExt(DstTy.getElementType(), MaskElt).getReg(0); +// Generate a vector splat idiom to be pattern matched later. +auto ShufSplat = MIRBuilder.buildShuffleSplat(DstTy, MaskElt); +Observer.changingInstr(MI); +MI.getOperand(1).setReg(ShufSplat.getReg(0)); +Observer.changedInstr(MI); +return Legalized; + } + + if (MaskTy.getSizeInBits() != Op1Ty.getSizeInBits()) { return UnableToLegalize; + } auto NotMask = MIRBuilder.buildNot(MaskTy, MaskReg); auto NewOp1 = MIRBuilder.buildAnd(MaskTy, Op1Reg, MaskReg); diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp index 4a0f70811057..1e39605c90be 100644 --- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp +++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp @@ -635,6 +635,33 @@ MachineIRBuilder::buildBuildVectorTrunc(const DstOp &Res, return buildInstr(TargetOpcode::G_BUILD_VECTOR_TRUNC, Res, TmpVec); } +MachineInstrBuilder MachineIRBuilder::buildShuffleSplat(const DstOp &Res, +const SrcOp &Src) { + LLT DstTy = Res.getLLTTy(*getMRI()); + LLT SrcTy = Src.getLLTTy(*getMRI()); + assert(SrcTy == DstTy.getElementType() && "Expected Src to match Dst elt ty"); + auto UndefVec = buildUndef(DstTy); + auto Zero = buildConstant(LLT::scalar(64), 0); + auto InsElt = buildInsertVectorElement(DstTy, UndefVec, Src, Zero); + SmallVector ZeroMask(DstTy.getNumElements()); + return buildShuffleVector(DstTy, InsElt, UndefVec, ZeroMask); +} + +MachineInstrBuilder MachineIRBuilder::buildShuffleVector(const DstOp &Res, + const SrcOp &Src1, + const SrcOp &Src2, +
[llvm-branch-commits] [compiler-rt] b5af578 - [WinASan] Improve exception reporting accuracy
Author: Reid Kleckner Date: 2020-11-30T16:39:22-08:00 New Revision: b5af5787b367198f8b87626431cb3f66fef460c1 URL: https://github.com/llvm/llvm-project/commit/b5af5787b367198f8b87626431cb3f66fef460c1 DIFF: https://github.com/llvm/llvm-project/commit/b5af5787b367198f8b87626431cb3f66fef460c1.diff LOG: [WinASan] Improve exception reporting accuracy Previously, ASan would produce reports like this: ERROR: AddressSanitizer: breakpoint on unknown address 0x (pc 0x7fffdd7c5e86 ...) This is unhelpful, because the developer may think this is a null pointer dereference, and not a breakpoint exception on some PC. The cause was that SignalContext::GetAddress would read the ExceptionInformation array to retreive an address for any kind of exception. That data is only available for access violation exceptions. This changes it to be conditional on the exception type, and to use the PC otherwise. I added a variety of tests for common exception types: - int div zero - breakpoint - ud2a / illegal instruction - SSE misalignment I also tightened up IsMemoryAccess and GetWriteFlag to check the ExceptionCode rather than looking at ExceptionInformation[1] directly. Differential Revision: https://reviews.llvm.org/D92344 Added: compiler-rt/test/asan/TestCases/Windows/breakpoint.cpp compiler-rt/test/asan/TestCases/Windows/illegal_instruction.cpp compiler-rt/test/asan/TestCases/Windows/integer_divide_by_zero.cpp compiler-rt/test/asan/TestCases/Windows/sse_misalignment.cpp Modified: compiler-rt/lib/sanitizer_common/sanitizer_win.cpp Removed: diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_win.cpp b/compiler-rt/lib/sanitizer_common/sanitizer_win.cpp index 85ac2633bde1..281854aff261 100644 --- a/compiler-rt/lib/sanitizer_common/sanitizer_win.cpp +++ b/compiler-rt/lib/sanitizer_common/sanitizer_win.cpp @@ -956,22 +956,27 @@ void SignalContext::InitPcSpBp() { uptr SignalContext::GetAddress() const { EXCEPTION_RECORD *exception_record = (EXCEPTION_RECORD *)siginfo; - return exception_record->ExceptionInformation[1]; + if (exception_record->ExceptionCode == EXCEPTION_ACCESS_VIOLATION) +return exception_record->ExceptionInformation[1]; + return (uptr)exception_record->ExceptionAddress; } bool SignalContext::IsMemoryAccess() const { - return GetWriteFlag() != SignalContext::UNKNOWN; + return ((EXCEPTION_RECORD *)siginfo)->ExceptionCode == + EXCEPTION_ACCESS_VIOLATION; } -bool SignalContext::IsTrueFaultingAddress() const { - // FIXME: Provide real implementation for this. See Linux and Mac variants. - return IsMemoryAccess(); -} +bool SignalContext::IsTrueFaultingAddress() const { return true; } SignalContext::WriteFlag SignalContext::GetWriteFlag() const { EXCEPTION_RECORD *exception_record = (EXCEPTION_RECORD *)siginfo; + + // The write flag is only available for access violation exceptions. + if (exception_record->ExceptionCode != EXCEPTION_ACCESS_VIOLATION) +return SignalContext::UNKNOWN; + // The contents of this array are documented at - // https://msdn.microsoft.com/en-us/library/windows/desktop/aa363082(v=vs.85).aspx + // https://docs.microsoft.com/en-us/windows/win32/api/winnt/ns-winnt-exception_record // The first element indicates read as 0, write as 1, or execute as 8. The // second element is the faulting address. switch (exception_record->ExceptionInformation[0]) { diff --git a/compiler-rt/test/asan/TestCases/Windows/breakpoint.cpp b/compiler-rt/test/asan/TestCases/Windows/breakpoint.cpp new file mode 100644 index ..1c9e8c4a9af9 --- /dev/null +++ b/compiler-rt/test/asan/TestCases/Windows/breakpoint.cpp @@ -0,0 +1,18 @@ +// RUN: %clang_cl_asan -Od %s -Fe%t +// RUN: %env_asan_opts=handle_sigill=1 not %run %t 2>&1 | FileCheck %s + +// Test the error output from a breakpoint. Assertion-like macros often end in +// int3 on Windows. + +#include + +int main() { + puts("before breakpoint"); + fflush(stdout); + __debugbreak(); + return 0; +} +// CHECK: before breakpoint +// CHECK: ERROR: AddressSanitizer: breakpoint on unknown address [[ADDR:0x[^ ]*]] +// CHECK-SAME: (pc [[ADDR]] {{.*}}) +// CHECK-NEXT: #0 {{.*}} in main {{.*}}breakpoint.cpp:{{.*}} diff --git a/compiler-rt/test/asan/TestCases/Windows/illegal_instruction.cpp b/compiler-rt/test/asan/TestCases/Windows/illegal_instruction.cpp new file mode 100644 index ..2b6b05cfc833 --- /dev/null +++ b/compiler-rt/test/asan/TestCases/Windows/illegal_instruction.cpp @@ -0,0 +1,17 @@ +// RUN: %clang_cl_asan -Od %s -Fe%t +// RUN: %env_asan_opts=handle_sigill=1 not %run %t 2>&1 | FileCheck %s + +// Test the error output from an illegal instruction. + +#include + +int main() { + puts("before ud2a"); + fflush(stdout); + __builtin_trap(); + return 0; +} +// CHECK: before ud2a +// CHECK: ERROR: AddressSanitizer: illegal-instruction on unknown address [[
[llvm-branch-commits] [clang] 61da501 - clang/test: Remove platform-linker feature
Author: Nico Weber Date: 2020-11-30T20:00:46-05:00 New Revision: 61da501b6a1bf845c3da9a7e761a3c6a3b6cf21a URL: https://github.com/llvm/llvm-project/commit/61da501b6a1bf845c3da9a7e761a3c6a3b6cf21a DIFF: https://github.com/llvm/llvm-project/commit/61da501b6a1bf845c3da9a7e761a3c6a3b6cf21a.diff LOG: clang/test: Remove platform-linker feature By explicitly requesting the system linker with `-fuse-ld=`, the tests are able to CHECK for the system linker even with CLANG_DEFAULT_LINKER=lld. Alternative to D74704. Differential Revision: https://reviews.llvm.org/D92291 Added: Modified: clang/test/Driver/riscv32-toolchain-extra.c clang/test/Driver/riscv32-toolchain.c clang/test/Driver/riscv64-toolchain-extra.c clang/test/Driver/riscv64-toolchain.c clang/test/lit.site.cfg.py.in llvm/utils/gn/secondary/clang/test/BUILD.gn Removed: diff --git a/clang/test/Driver/riscv32-toolchain-extra.c b/clang/test/Driver/riscv32-toolchain-extra.c index 64ff6a913e24..59e2560b09c7 100644 --- a/clang/test/Driver/riscv32-toolchain-extra.c +++ b/clang/test/Driver/riscv32-toolchain-extra.c @@ -11,7 +11,6 @@ // The test below checks that the driver correctly finds the linker and // runtime if and only if they exist. // -// REQUIRES: platform-linker // RUN: rm -rf %T/testroot-riscv32-baremetal-nogcc // RUN: mkdir -p %T/testroot-riscv32-baremetal-nogcc/bin // RUN: ln -s %clang %T/testroot-riscv32-baremetal-nogcc/bin/clang @@ -19,11 +18,11 @@ // RUN: ln -s %S/Inputs/basic_riscv32_nogcc_tree/riscv32-unknown-elf %T/testroot-riscv32-baremetal-nogcc/riscv32-unknown-elf // RUN: %T/testroot-riscv32-baremetal-nogcc/bin/clang %s -### -no-canonical-prefixes \ // RUN:--gcc-toolchain=%T/testroot-riscv32-baremetal-nogcc/invalid \ -// RUN:-target riscv32-unknown-elf --rtlib=platform 2>&1 \ +// RUN:-target riscv32-unknown-elf --rtlib=platform -fuse-ld= 2>&1 \ // RUN:| FileCheck -check-prefix=C-RV32-BAREMETAL-ILP32-NOGCC %s // RUN: %T/testroot-riscv32-baremetal-nogcc/bin/clang %s -### -no-canonical-prefixes \ -// RUN:-target riscv32-unknown-elf --rtlib=platform 2>&1 \ +// RUN:-target riscv32-unknown-elf --rtlib=platform -fuse-ld= 2>&1 \ // RUN:| FileCheck -check-prefix=C-RV32-BAREMETAL-ILP32-NOGCC %s // C-RV32-BAREMETAL-ILP32-NOGCC: "-internal-isystem" "{{.*}}Output/testroot-riscv32-baremetal-nogcc/bin/../riscv32-unknown-elf/include" diff --git a/clang/test/Driver/riscv32-toolchain.c b/clang/test/Driver/riscv32-toolchain.c index 59865af311ab..a5852f5f3997 100644 --- a/clang/test/Driver/riscv32-toolchain.c +++ b/clang/test/Driver/riscv32-toolchain.c @@ -1,5 +1,4 @@ // A basic clang -cc1 command-line, and simple environment check. -// REQUIRES: platform-linker // RUN: %clang %s -### -no-canonical-prefixes -target riscv32 \ // RUN: --gcc-toolchain=%S/Inputs/basic_riscv32_tree 2>&1 \ @@ -15,7 +14,7 @@ // In the below tests, --rtlib=platform is used so that the driver ignores // the configure-time CLANG_DEFAULT_RTLIB option when choosing the runtime lib -// RUN: %clang %s -### -no-canonical-prefixes \ +// RUN: %clang %s -### -no-canonical-prefixes -fuse-ld= \ // RUN: -target riscv32-unknown-elf --rtlib=platform \ // RUN: --gcc-toolchain=%S/Inputs/basic_riscv32_tree \ // RUN: --sysroot=%S/Inputs/basic_riscv32_tree/riscv32-unknown-elf 2>&1 \ @@ -30,7 +29,7 @@ // C-RV32-BAREMETAL-ILP32: "--start-group" "-lc" "-lgloss" "--end-group" "-lgcc" // C-RV32-BAREMETAL-ILP32: "{{.*}}/Inputs/basic_riscv32_tree/lib/gcc/riscv32-unknown-elf/8.0.1{{/|}}crtend.o" -// RUN: %clang %s -### -no-canonical-prefixes \ +// RUN: %clang %s -### -no-canonical-prefixes -fuse-ld= \ // RUN: -target riscv32-unknown-elf --rtlib=platform \ // RUN: --sysroot= \ // RUN: --gcc-toolchain=%S/Inputs/basic_riscv32_tree 2>&1 \ @@ -44,7 +43,7 @@ // C-RV32-BAREMETAL-NOSYSROOT-ILP32: "--start-group" "-lc" "-lgloss" "--end-group" "-lgcc" // C-RV32-BAREMETAL-NOSYSROOT-ILP32: "{{.*}}/Inputs/basic_riscv32_tree/lib/gcc/riscv32-unknown-elf/8.0.1{{/|}}crtend.o" -// RUN: %clangxx %s -### -no-canonical-prefixes \ +// RUN: %clangxx %s -### -no-canonical-prefixes -fuse-ld= \ // RUN: -target riscv32-unknown-elf -stdlib=libstdc++ --rtlib=platform \ // RUN: --gcc-toolchain=%S/Inputs/basic_riscv32_tree \ // RUN: --sysroot=%S/Inputs/basic_riscv32_tree/riscv32-unknown-elf 2>&1 \ @@ -60,7 +59,7 @@ // CXX-RV32-BAREMETAL-ILP32: "-lstdc++" "--start-group" "-lc" "-lgloss" "--end-group" "-lgcc" // CXX-RV32-BAREMETAL-ILP32: "{{.*}}/Inputs/basic_riscv32_tree/lib/gcc/riscv32-unknown-elf/8.0.1{{/|}}crtend.o" -// RUN: %clangxx %s -### -no-canonical-prefixes \ +// RUN: %clangxx %s -### -no-canonical-prefixes -fuse-ld= \ // RUN: -target riscv32-unknown-elf -stdlib=libstdc++ --rtlib=platform \ // RUN: --sysroot= \ // RUN: --gcc-toolchain=%S/Inputs/basic_riscv32_tree 2>&1 \ diff --g