[llvm-branch-commits] [llvm] release/18.x: [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83758)

[Phoebe Wang via llvm-branch-commits]

https://github.com/phoebewang closed 
https://github.com/llvm/llvm-project/pull/83758
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[llvm-branch-commits] [llvm] release/18.x: [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83758)

[Phoebe Wang via llvm-branch-commits]

phoebewang wrote:

Some change related on trunk code, I'll create a manual cherry-pick.

https://github.com/llvm/llvm-project/pull/83758
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[llvm-branch-commits] [llvm] ReleaseNotes for LLVM binary utilities (PR #83751)

[James Henderson via llvm-branch-commits]

https://github.com/jh7370 approved this pull request.

LGTM (I haven't attempted to review the list of changes to make sure you 
haven't missed any).

https://github.com/llvm/llvm-project/pull/83751
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[llvm-branch-commits] [llvm] ReleaseNotes for LLVM binary utilities (PR #83751)

[James Henderson via llvm-branch-commits]

@@ -344,21 +344,26 @@ Changes to the LLVM tools
 * Fixed big-endian support in llvm-symbolizer's DWARF location parser.
 * llvm-readelf now supports ``--extra-sym-info`` (``-X``) to display extra
   information (section name) when showing symbols.
-
-* ``llvm-nm`` now supports the ``--line-numbers`` (``-l``) option to use
-  debugging information to print symbols' filenames and line numbers.
+* ``llvm-readobj``/``llvm-readelf`` now supports ``--decompress``/``-z`` with

jh7370 wrote:

There are a number of references to tool names in other notes within this file 
without the backticks. They should probably be normalised at some point.

https://github.com/llvm/llvm-project/pull/83751
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[llvm-branch-commits] [llvm] ReleaseNotes for LLVM binary utilities (PR #83751)

[James Henderson via llvm-branch-commits]

https://github.com/jh7370 edited https://github.com/llvm/llvm-project/pull/83751
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[llvm-branch-commits] [llvm] ReleaseNotes for LLVM binary utilities (PR #83751)

[Fangrui Song via llvm-branch-commits]

https://github.com/MaskRay updated 
https://github.com/llvm/llvm-project/pull/83751

>From 5a9f6cf96b1fb4c9f16f59e6c4847b61da46c6b7 Mon Sep 17 00:00:00 2001
From: Fangrui Song 
Date: Sun, 3 Mar 2024 17:03:04 -0800
Subject: [PATCH 1/2] ReleaseNotes for LLVM binary utilities

---
 llvm/docs/ReleaseNotes.rst | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 5b3210138f2f89..b845b57b4e4af6 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -344,21 +344,26 @@ Changes to the LLVM tools
 * Fixed big-endian support in llvm-symbolizer's DWARF location parser.
 * llvm-readelf now supports ``--extra-sym-info`` (``-X``) to display extra
   information (section name) when showing symbols.
-
-* ``llvm-nm`` now supports the ``--line-numbers`` (``-l``) option to use
-  debugging information to print symbols' filenames and line numbers.
+* ``llvm-readobj``/``llvm-readelf`` now supports ``--decompress``/``-z`` with
+  string and hex dump for ELF object files.
 
 * llvm-symbolizer and llvm-addr2line now support addresses specified as symbol 
names.
 
 * llvm-objcopy now supports ``--gap-fill`` and ``--pad-to`` options, for
   ELF input and binary output files only.
+* ``llvm-objcopy`` now supports ``-O elf64-s390`` for SystemZ.
 
 * Supported parsing XCOFF auxiliary symbols in obj2yaml.
 
 * ``llvm-ranlib`` now supports ``-X`` on AIX to specify the type of object file
   ranlib should examine.
 
+* ``llvm-cxxfilt`` now supports ``--no-params``/``-p`` to skip function
+  parameters.
+
 * ``llvm-nm`` now supports ``--export-symbol`` to ignore the import symbol 
file.
+* ``llvm-nm`` now supports the ``--line-numbers`` (``-l``) option to use
+  debugging information to print symbols' filenames and line numbers.
 
 * llvm-rc and llvm-windres now accept file path references in ``.rc`` files
   concatenated from multiple string literals.

>From 8ba9bed8210bf7bce320f589b1243f19cd7e9c6c Mon Sep 17 00:00:00 2001
From: Fangrui Song 
Date: Mon, 4 Mar 2024 00:36:53 -0800
Subject: [PATCH 2/2] add more backticks

---
 llvm/docs/ReleaseNotes.rst | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index b845b57b4e4af6..bfa8e93da05cb8 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -339,21 +339,21 @@ Changes to the Debug Info
 Changes to the LLVM tools
 -
 
-* llvm-symbolizer now treats invalid input as an address for which source
+* ``llvm-symbolizer`` now treats invalid input as an address for which source
   information is not found.
-* Fixed big-endian support in llvm-symbolizer's DWARF location parser.
-* llvm-readelf now supports ``--extra-sym-info`` (``-X``) to display extra
+* Fixed big-endian support in ``llvm-symbolizer``'s DWARF location parser.
+* ``llvm-readelf`` now supports ``--extra-sym-info`` (``-X``) to display extra
   information (section name) when showing symbols.
 * ``llvm-readobj``/``llvm-readelf`` now supports ``--decompress``/``-z`` with
   string and hex dump for ELF object files.
 
-* llvm-symbolizer and llvm-addr2line now support addresses specified as symbol 
names.
+* ``llvm-symbolizer`` and ``llvm-addr2line`` now support addresses specified 
as symbol names.
 
-* llvm-objcopy now supports ``--gap-fill`` and ``--pad-to`` options, for
+* ``llvm-objcopy`` now supports ``--gap-fill`` and ``--pad-to`` options, for
   ELF input and binary output files only.
 * ``llvm-objcopy`` now supports ``-O elf64-s390`` for SystemZ.
 
-* Supported parsing XCOFF auxiliary symbols in obj2yaml.
+* Supported parsing XCOFF auxiliary symbols in ``obj2yaml``.
 
 * ``llvm-ranlib`` now supports ``-X`` on AIX to specify the type of object file
   ranlib should examine.
@@ -365,15 +365,15 @@ Changes to the LLVM tools
 * ``llvm-nm`` now supports the ``--line-numbers`` (``-l``) option to use
   debugging information to print symbols' filenames and line numbers.
 
-* llvm-rc and llvm-windres now accept file path references in ``.rc`` files
+* ``llvm-rc`` and ``llvm-windres`` now accept file path references in ``.rc`` 
files
   concatenated from multiple string literals.
 
-* The llvm-windres option ``--preprocessor`` now resolves its argument
-  in the PATH environment variable as expected, and options passed with
+* The ``llvm-windres`` option ``--preprocessor`` now resolves its argument
+  in the ``PATH`` environment variable as expected, and options passed with
   ``--preprocessor-arg`` are placed before the input file as they should
   be.
 
-* The llvm-windres option ``--preprocessor`` has been updated with the
+* The ``llvm-windres`` option ``--preprocessor`` has been updated with the
   breaking behaviour change from GNU windres from binutils 2.36, where
   the whole argument is considered as one path, not considered as a
   sequence of tool name and parameters.

__

[llvm-branch-commits] [llvm] [Inline][PGO] After inline, update profile for invoke instruction in both cloned instruction in the caller and original callee (PR #83809)

[Mingming Liu via llvm-branch-commits]

https://github.com/minglotus-6 created 
https://github.com/llvm/llvm-project/pull/83809

None

>From 9575b83ea40012ecbfbf301a24ec89de0726ffd4 Mon Sep 17 00:00:00 2001
From: mingmingl 
Date: Mon, 4 Mar 2024 00:43:55 -0800
Subject: [PATCH] update profile for invoke instruction in caller and callee
 after inline

---
 llvm/include/llvm/IR/Instructions.h   |   3 +
 llvm/lib/IR/Instructions.cpp  |  12 ++
 llvm/lib/Transforms/Utils/InlineFunction.cpp  |  11 +-
 .../Inline/update_invoke_value_profile.ll | 185 ++
 4 files changed, 209 insertions(+), 2 deletions(-)
 create mode 100644 llvm/test/Transforms/Inline/update_invoke_value_profile.ll

diff --git a/llvm/include/llvm/IR/Instructions.h 
b/llvm/include/llvm/IR/Instructions.h
index bc357074e5cb21..1146b3fa3ae244 100644
--- a/llvm/include/llvm/IR/Instructions.h
+++ b/llvm/include/llvm/IR/Instructions.h
@@ -4360,6 +4360,9 @@ class InvokeInst : public CallBase {
 
   unsigned getNumSuccessors() const { return 2; }
 
+  /// Updates profile metadata by scaling it by \p S / \p T.
+  void updateProfWeight(uint64_t S, uint64_t T);
+
   // Methods for support type inquiry through isa, cast, and dyn_cast:
   static bool classof(const Instruction *I) {
 return (I->getOpcode() == Instruction::Invoke);
diff --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp
index 9ae71acd523c36..920ce67f118991 100644
--- a/llvm/lib/IR/Instructions.cpp
+++ b/llvm/lib/IR/Instructions.cpp
@@ -918,6 +918,18 @@ LandingPadInst *InvokeInst::getLandingPadInst() const {
   return cast(getUnwindDest()->getFirstNonPHI());
 }
 
+void InvokeInst::updateProfWeight(uint64_t S, uint64_t T) {
+  if (T == 0) {
+LLVM_DEBUG(dbgs() << "Attempting to update profile weights will result in "
+ "div by 0. Ignoring. Likely the function "
+  << getParent()->getParent()->getName()
+  << " has 0 entry count, and contains call instructions "
+ "with non-zero prof info.");
+return;
+  }
+  scaleProfData(*this, S, T);
+}
+
 
//===--===//
 //CallBrInst Implementation
 
//===--===//
diff --git a/llvm/lib/Transforms/Utils/InlineFunction.cpp 
b/llvm/lib/Transforms/Utils/InlineFunction.cpp
index f68fdb26f28173..75b0d0669e9228 100644
--- a/llvm/lib/Transforms/Utils/InlineFunction.cpp
+++ b/llvm/lib/Transforms/Utils/InlineFunction.cpp
@@ -1909,10 +1909,14 @@ void llvm::updateProfileCallee(
   // During inlining ?
   if (VMap) {
 uint64_t CloneEntryCount = PriorEntryCount - NewEntryCount;
-for (auto Entry : *VMap)
+for (auto Entry : *VMap) {
   if (isa(Entry.first))
 if (auto *CI = dyn_cast_or_null(Entry.second))
   CI->updateProfWeight(CloneEntryCount, PriorEntryCount);
+  if (isa(Entry.first))
+if (auto *II = dyn_cast_or_null(Entry.second))
+  II->updateProfWeight(CloneEntryCount, PriorEntryCount);
+}
   }
 
   if (EntryDelta) {
@@ -1921,9 +1925,12 @@ void llvm::updateProfileCallee(
 for (BasicBlock &BB : *Callee)
   // No need to update the callsite if it is pruned during inlining.
   if (!VMap || VMap->count(&BB))
-for (Instruction &I : BB)
+for (Instruction &I : BB) {
   if (CallInst *CI = dyn_cast(&I))
 CI->updateProfWeight(NewEntryCount, PriorEntryCount);
+  if (InvokeInst *II = dyn_cast(&I))
+II->updateProfWeight(NewEntryCount, PriorEntryCount);
+}
   }
 }
 
diff --git a/llvm/test/Transforms/Inline/update_invoke_value_profile.ll 
b/llvm/test/Transforms/Inline/update_invoke_value_profile.ll
new file mode 100644
index 00..ac5597a41fce61
--- /dev/null
+++ b/llvm/test/Transforms/Inline/update_invoke_value_profile.ll
@@ -0,0 +1,185 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --version 4
+
+; RUN: opt < %s -passes='require,cgscc(inline)' 
-inline-threshold=1000 -S | FileCheck %s
+
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+%class.Error = type { i32 }
+@_ZTI5Error = external constant { ptr, ptr }
+
+define i32 @callee(ptr %b) personality ptr @__gxx_personality_v0 !prof !17 {
+; CHECK-LABEL: define i32 @callee(
+; CHECK-SAME: ptr [[B:%.*]]) personality ptr @__gxx_personality_v0 !prof 
[[PROF0:![0-9]+]] {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[E:%.*]] = alloca [[CLASS_ERROR:%.*]], align 8
+; CHECK-NEXT:[[VTABLE:%.*]] = load ptr, ptr [[B]], align 8
+; CHECK-NEXT:[[TMP0:%.*]] = load ptr, ptr [[VTABLE]], align 8
+; CHECK-NEXT:[[CALL:%.*]] = invoke i32 [[TMP0]](ptr [[B]])
+; CHECK-NEXT:to label [[TRY_CONT:%.*]] unwind label [[LPAD:%.*]], 
!prof [[PROF1:![0-9]+]]
+; CHECK:   lpad:
+; CHECK-NEXT:  

[llvm-branch-commits] [llvm] [Inline][PGO] After inline, update profile for invoke instruction in both cloned instruction in the caller and original callee (PR #83809)

[Mingming Liu via llvm-branch-commits]

https://github.com/minglotus-6 edited 
https://github.com/llvm/llvm-project/pull/83809
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[llvm-branch-commits] [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83811)

[Phoebe Wang via llvm-branch-commits]

https://github.com/phoebewang created 
https://github.com/llvm/llvm-project/pull/83811

None

>From 7210a98061d9f6382e8ce4ca7646ec4a5c3f96e6 Mon Sep 17 00:00:00 2001
From: Phoebe Wang 
Date: Mon, 4 Mar 2024 17:28:23 +0800
Subject: [PATCH] [X86] Add missing subvector_subreg_lowering for BF16 (#83720)

---
 llvm/lib/Target/X86/X86InstrVecCompiler.td|  3 +++
 .../CodeGen/X86/avx512bf16-vl-intrinsics.ll   | 22 +++
 2 files changed, 25 insertions(+)

diff --git a/llvm/lib/Target/X86/X86InstrVecCompiler.td 
b/llvm/lib/Target/X86/X86InstrVecCompiler.td
index 70bd77bba03ab3..00da13407bde68 100644
--- a/llvm/lib/Target/X86/X86InstrVecCompiler.td
+++ b/llvm/lib/Target/X86/X86InstrVecCompiler.td
@@ -83,6 +83,7 @@ defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
 
 // A 128-bit subvector extract from the first 512-bit vector position is a
 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
@@ -95,6 +96,7 @@ defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
 
 // A 128-bit subvector extract from the first 512-bit vector position is a
 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
@@ -107,6 +109,7 @@ defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
 
 
 // If we're inserting into an all zeros vector, just use a plain move which
diff --git a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll 
b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
index 40b512d68be816..6b07d69d2b0b1c 100644
--- a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
@@ -402,3 +402,25 @@ entry:
   %1 = shufflevector <8 x bfloat> %0, <8 x bfloat> undef, <16 x i32> 
zeroinitializer
   ret <16 x bfloat> %1
 }
+
+define <16 x i32> @pr83358() {
+; X86-LABEL: pr83358:
+; X86:   # %bb.0:
+; X86-NEXT:vcvtneps2bf16y {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # encoding: 
[0x62,0xf2,0x7e,0x28,0x72,0x05,A,A,A,A]
+; X86-NEXT:# fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: 
FK_Data_4
+; X86-NEXT:vinsertf128 $1, %xmm0, %ymm0, %ymm0 # EVEX TO VEX Compression 
encoding: [0xc4,0xe3,0x7d,0x18,0xc0,0x01]
+; X86-NEXT:vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 # encoding: 
[0x62,0xf3,0xfd,0x48,0x1a,0xc0,0x01]
+; X86-NEXT:retl # encoding: [0xc3]
+;
+; X64-LABEL: pr83358:
+; X64:   # %bb.0:
+; X64-NEXT:vcvtneps2bf16y {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # 
encoding: [0x62,0xf2,0x7e,0x28,0x72,0x05,A,A,A,A]
+; X64-NEXT:# fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: 
reloc_riprel_4byte
+; X64-NEXT:vinsertf128 $1, %xmm0, %ymm0, %ymm0 # EVEX TO VEX Compression 
encoding: [0xc4,0xe3,0x7d,0x18,0xc0,0x01]
+; X64-NEXT:vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 # encoding: 
[0x62,0xf3,0xfd,0x48,0x1a,0xc0,0x01]
+; X64-NEXT:retq # encoding: [0xc3]
+  %1 = call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> 
)
+  %2 = bitcast <8 x bfloat> %1 to <4 x i32>
+  %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <16 x i32> 
+  ret <16 x i32> %3
+}

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[llvm-branch-commits] [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83811)

[via llvm-branch-commits]

github-actions[bot] wrote:

This repository does not accept pull requests. Please follow 
http://llvm.org/docs/Contributing.html#how-to-submit-a-patch for contribution 
to LLVM.

https://github.com/llvm/llvm-project/pull/83811
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[llvm-branch-commits] [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83811)

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[llvm-branch-commits] [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83811)

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[llvm-branch-commits] [flang] a82b9c2 - Revert "[flang] disable memory-allocation-opt.fir test on windows (#83535)"

[via llvm-branch-commits]

Author: jeanPerier
Date: 2024-03-04T12:07:08+01:00
New Revision: a82b9c2c4b43559242ccc641e374f7913e0c8ce3

URL: 
https://github.com/llvm/llvm-project/commit/a82b9c2c4b43559242ccc641e374f7913e0c8ce3
DIFF: 
https://github.com/llvm/llvm-project/commit/a82b9c2c4b43559242ccc641e374f7913e0c8ce3.diff

LOG: Revert "[flang] disable memory-allocation-opt.fir test on windows (#83535)"

This reverts commit a015f591766e4e3a3a23bbab7ca5dfec8f8deb18.

Added: 


Modified: 
flang/test/Fir/memory-allocation-opt.fir

Removed: 




diff  --git a/flang/test/Fir/memory-allocation-opt.fir 
b/flang/test/Fir/memory-allocation-opt.fir
index 44fdaad4a5c204..cfbca2f83ef8ec 100644
--- a/flang/test/Fir/memory-allocation-opt.fir
+++ b/flang/test/Fir/memory-allocation-opt.fir
@@ -1,6 +1,4 @@
 // RUN: fir-opt --memory-allocation-opt="dynamic-array-on-heap=true 
maximum-array-alloc-size=1024" %s | FileCheck %s
-// FIXME: started crashing on windows 
https://github.com/llvm/llvm-project/issues/83534
-// UNSUPPORTED: system-windows
 
 // Test for size of array being too big.
 



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[llvm-branch-commits] [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83834)

[Phoebe Wang via llvm-branch-commits]

https://github.com/phoebewang created 
https://github.com/llvm/llvm-project/pull/83834

None

>From 6d03789303fe3d5c84406df29353ddf63199eb08 Mon Sep 17 00:00:00 2001
From: Phoebe Wang 
Date: Mon, 4 Mar 2024 18:09:41 +0800
Subject: [PATCH] [X86] Add missing subvector_subreg_lowering for BF16 (#83720)

---
 llvm/lib/Target/X86/X86InstrVecCompiler.td|  3 +++
 .../CodeGen/X86/avx512bf16-vl-intrinsics.ll   | 22 +++
 llvm/test/CodeGen/X86/bfloat.ll   |  1 -
 3 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/X86/X86InstrVecCompiler.td 
b/llvm/lib/Target/X86/X86InstrVecCompiler.td
index bbd19cf8d5b25e..461b2badc13134 100644
--- a/llvm/lib/Target/X86/X86InstrVecCompiler.td
+++ b/llvm/lib/Target/X86/X86InstrVecCompiler.td
@@ -83,6 +83,7 @@ defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
 
 // A 128-bit subvector extract from the first 512-bit vector position is a
 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
@@ -95,6 +96,7 @@ defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
 
 // A 128-bit subvector extract from the first 512-bit vector position is a
 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
@@ -107,6 +109,7 @@ defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
 
 
 // If we're inserting into an all zeros vector, just use a plain move which
diff --git a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll 
b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
index 0826faa1071b01..482713e12d15c7 100644
--- a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
@@ -381,3 +381,25 @@ entry:
   %1 = shufflevector <8 x bfloat> %0, <8 x bfloat> undef, <16 x i32> 
zeroinitializer
   ret <16 x bfloat> %1
 }
+
+define <16 x i32> @pr83358() {
+; X86-LABEL: pr83358:
+; X86:   # %bb.0:
+; X86-NEXT:vcvtneps2bf16y {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # encoding: 
[0x62,0xf2,0x7e,0x28,0x72,0x05,A,A,A,A]
+; X86-NEXT:# fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: 
FK_Data_4
+; X86-NEXT:vshufi64x2 $0, %zmm0, %zmm0, %zmm0 # encoding: 
[0x62,0xf3,0xfd,0x48,0x43,0xc0,0x00]
+; X86-NEXT:# zmm0 = zmm0[0,1,0,1,0,1,0,1]
+; X86-NEXT:retl # encoding: [0xc3]
+;
+; X64-LABEL: pr83358:
+; X64:   # %bb.0:
+; X64-NEXT:vcvtneps2bf16y {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # 
encoding: [0x62,0xf2,0x7e,0x28,0x72,0x05,A,A,A,A]
+; X64-NEXT:# fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: 
reloc_riprel_4byte
+; X64-NEXT:vshufi64x2 $0, %zmm0, %zmm0, %zmm0 # encoding: 
[0x62,0xf3,0xfd,0x48,0x43,0xc0,0x00]
+; X64-NEXT:# zmm0 = zmm0[0,1,0,1,0,1,0,1]
+; X64-NEXT:retq # encoding: [0xc3]
+  %1 = call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> 
)
+  %2 = bitcast <8 x bfloat> %1 to <4 x i32>
+  %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <16 x i32> 
+  ret <16 x i32> %3
+}
diff --git a/llvm/test/CodeGen/X86/bfloat.ll b/llvm/test/CodeGen/X86/bfloat.ll
index f2d3c4fb34199e..cd1dba17611628 100644
--- a/llvm/test/CodeGen/X86/bfloat.ll
+++ b/llvm/test/CodeGen/X86/bfloat.ll
@@ -2423,7 +2423,6 @@ define <16 x bfloat> @fptrunc_v16f32(<16 x float> %a) 
nounwind {
 ; AVXNC-LABEL: fptrunc_v16f32:
 ; AVXNC:   # %bb.0:
 ; AVXNC-NEXT:{vex} vcvtneps2bf16 %ymm0, %xmm0
-; AVXNC-NEXT:vinsertf128 $0, %xmm0, %ymm0, %ymm0
 ; AVXNC-NEXT:{vex} vcvtneps2bf16 %ymm1, %xmm1
 ; AVXNC-NEXT:vinsertf128 $1, %xmm1, %ymm0, %ymm0
 ; AVXNC-NEXT:retq

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[llvm-branch-commits] [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83834)

[Phoebe Wang via llvm-branch-commits]

https://github.com/phoebewang milestoned 
https://github.com/llvm/llvm-project/pull/83834
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[llvm-branch-commits] [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83834)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-x86

Author: Phoebe Wang (phoebewang)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/83834.diff


3 Files Affected:

- (modified) llvm/lib/Target/X86/X86InstrVecCompiler.td (+3) 
- (modified) llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll (+22) 
- (modified) llvm/test/CodeGen/X86/bfloat.ll (-1) 


``diff
diff --git a/llvm/lib/Target/X86/X86InstrVecCompiler.td 
b/llvm/lib/Target/X86/X86InstrVecCompiler.td
index bbd19cf8d5b25e..461b2badc13134 100644
--- a/llvm/lib/Target/X86/X86InstrVecCompiler.td
+++ b/llvm/lib/Target/X86/X86InstrVecCompiler.td
@@ -83,6 +83,7 @@ defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
 
 // A 128-bit subvector extract from the first 512-bit vector position is a
 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
@@ -95,6 +96,7 @@ defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
 
 // A 128-bit subvector extract from the first 512-bit vector position is a
 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
@@ -107,6 +109,7 @@ defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
 defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
 
 
 // If we're inserting into an all zeros vector, just use a plain move which
diff --git a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll 
b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
index 0826faa1071b01..482713e12d15c7 100644
--- a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
@@ -381,3 +381,25 @@ entry:
   %1 = shufflevector <8 x bfloat> %0, <8 x bfloat> undef, <16 x i32> 
zeroinitializer
   ret <16 x bfloat> %1
 }
+
+define <16 x i32> @pr83358() {
+; X86-LABEL: pr83358:
+; X86:   # %bb.0:
+; X86-NEXT:vcvtneps2bf16y {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # encoding: 
[0x62,0xf2,0x7e,0x28,0x72,0x05,A,A,A,A]
+; X86-NEXT:# fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: 
FK_Data_4
+; X86-NEXT:vshufi64x2 $0, %zmm0, %zmm0, %zmm0 # encoding: 
[0x62,0xf3,0xfd,0x48,0x43,0xc0,0x00]
+; X86-NEXT:# zmm0 = zmm0[0,1,0,1,0,1,0,1]
+; X86-NEXT:retl # encoding: [0xc3]
+;
+; X64-LABEL: pr83358:
+; X64:   # %bb.0:
+; X64-NEXT:vcvtneps2bf16y {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # 
encoding: [0x62,0xf2,0x7e,0x28,0x72,0x05,A,A,A,A]
+; X64-NEXT:# fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: 
reloc_riprel_4byte
+; X64-NEXT:vshufi64x2 $0, %zmm0, %zmm0, %zmm0 # encoding: 
[0x62,0xf3,0xfd,0x48,0x43,0xc0,0x00]
+; X64-NEXT:# zmm0 = zmm0[0,1,0,1,0,1,0,1]
+; X64-NEXT:retq # encoding: [0xc3]
+  %1 = call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> 
)
+  %2 = bitcast <8 x bfloat> %1 to <4 x i32>
+  %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <16 x i32> 
+  ret <16 x i32> %3
+}
diff --git a/llvm/test/CodeGen/X86/bfloat.ll b/llvm/test/CodeGen/X86/bfloat.ll
index f2d3c4fb34199e..cd1dba17611628 100644
--- a/llvm/test/CodeGen/X86/bfloat.ll
+++ b/llvm/test/CodeGen/X86/bfloat.ll
@@ -2423,7 +2423,6 @@ define <16 x bfloat> @fptrunc_v16f32(<16 x float> %a) 
nounwind {
 ; AVXNC-LABEL: fptrunc_v16f32:
 ; AVXNC:   # %bb.0:
 ; AVXNC-NEXT:{vex} vcvtneps2bf16 %ymm0, %xmm0
-; AVXNC-NEXT:vinsertf128 $0, %xmm0, %ymm0, %ymm0
 ; AVXNC-NEXT:{vex} vcvtneps2bf16 %ymm1, %xmm1
 ; AVXNC-NEXT:vinsertf128 $1, %xmm1, %ymm0, %ymm0
 ; AVXNC-NEXT:retq

``




https://github.com/llvm/llvm-project/pull/83834
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[llvm-branch-commits] [llvm] release/18.x: [SelectionDAG] Change computeAliasing signature from optional to LocationSize. (#83017) (PR #83848)

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[llvm-branch-commits] [llvm] release/18.x: [SelectionDAG] Change computeAliasing signature from optional to LocationSize. (#83017) (PR #83848)

[via llvm-branch-commits]

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/83848

Backport 6e41d60a717132fadac74abe61ac6a9b1ca98778

Requested by: @davemgreen

>From 98fdd57cd1b88b19a6ca6bece743abe05659aa26 Mon Sep 17 00:00:00 2001
From: David Green 
Date: Wed, 28 Feb 2024 09:43:05 +
Subject: [PATCH] [SelectionDAG] Change computeAliasing signature from
 optional to LocationSize. (#83017)

This is another smaller step of #70452, changing the signature of
computeAliasing() from optional to LocationSize, and follow-up
changes in DAGCombiner::mayAlias(). There are some test change due to
the previous AA->isNoAlias call incorrectly using an unknown size
(~UINT64_T(0)). This should then be improved again in #70452 when the
types are known to be scalable.

(cherry picked from commit 6e41d60a717132fadac74abe61ac6a9b1ca98778)
---
 .../CodeGen/SelectionDAGAddressAnalysis.h |  7 +-
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 37 +
 .../SelectionDAGAddressAnalysis.cpp   | 20 +++--
 .../alloca-load-store-scalable-array.ll   | 36 -
 .../alloca-load-store-scalable-struct.ll  | 12 +--
 .../rvv/alloca-load-store-scalable-array.ll   | 12 +--
 .../rvv/alloca-load-store-scalable-struct.ll  |  8 +-
 .../SelectionDAGAddressAnalysisTest.cpp   | 80 ---
 8 files changed, 102 insertions(+), 110 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h 
b/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
index 3d0f836b0c7578..29de6bd8685e06 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
@@ -9,6 +9,7 @@
 #ifndef LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
 #define LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
 
+#include "llvm/Analysis/MemoryLocation.h"
 #include "llvm/CodeGen/SelectionDAGNodes.h"
 #include 
 
@@ -81,10 +82,8 @@ class BaseIndexOffset {
 
   // Returns true `Op0` and `Op1` can be proven to alias/not alias, in
   // which case `IsAlias` is set to true/false.
-  static bool computeAliasing(const SDNode *Op0,
-  const std::optional NumBytes0,
-  const SDNode *Op1,
-  const std::optional NumBytes1,
+  static bool computeAliasing(const SDNode *Op0, const LocationSize NumBytes0,
+  const SDNode *Op1, const LocationSize NumBytes1,
   const SelectionDAG &DAG, bool &IsAlias);
 
   /// Parses tree in N for base, index, offset addresses.
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3135ec73a99e76..eb912bff4094ce 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -27849,7 +27849,7 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
 bool IsAtomic;
 SDValue BasePtr;
 int64_t Offset;
-std::optional NumBytes;
+LocationSize NumBytes;
 MachineMemOperand *MMO;
   };
 
@@ -27868,7 +27868,8 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   LSN->isAtomic(),
   LSN->getBasePtr(),
   Offset /*base offset*/,
-  std::optional(Size),
+  Size != ~UINT64_C(0) ? LocationSize::precise(Size)
+   : LocationSize::beforeOrAfterPointer(),
   LSN->getMemOperand()};
 }
 if (const auto *LN = cast(N))
@@ -27876,13 +27877,15 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   /*isAtomic*/ false,
   LN->getOperand(1),
   (LN->hasOffset()) ? LN->getOffset() : 0,
-  (LN->hasOffset()) ? std::optional(LN->getSize())
-: std::optional(),
+  (LN->hasOffset()) ? LocationSize::precise(LN->getSize())
+: LocationSize::beforeOrAfterPointer(),
   (MachineMemOperand *)nullptr};
 // Default.
 return {false /*isvolatile*/,
-/*isAtomic*/ false,  SDValue(),
-(int64_t)0 /*offset*/,   std::optional() /*size*/,
+/*isAtomic*/ false,
+SDValue(),
+(int64_t)0 /*offset*/,
+LocationSize::beforeOrAfterPointer() /*size*/,
 (MachineMemOperand *)nullptr};
   };
 
@@ -27937,18 +27940,20 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   int64_t SrcValOffset1 = MUC1.MMO->getOffset();
   Align OrigAlignment0 = MUC0.MMO->getBaseAlign();
   Align OrigAlignment1 = MUC1.MMO->getBaseAlign();
-  auto &Size0 = MUC0.NumBytes;
-  auto &Size1 = MUC1.NumBytes;
+  LocationSize Size0 = MUC0.NumBytes;
+  LocationSize Size1 = MUC1.NumBytes;
   if (OrigAlignment0 == OrigAlignment1 && SrcValOffset0 != SrcValOffset1 &&
-  Size0.has_value() && Size1.has_value() && *Size0 == *Size1 &&
-  OrigAlignment0 > *Size0 && SrcValOffset0 %

[llvm-branch-commits] [llvm] release/18.x: [SelectionDAG] Change computeAliasing signature from optional to LocationSize. (#83017) (PR #83848)

[via llvm-branch-commits]

llvmbot wrote:

@RKSimon What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/83848
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[llvm-branch-commits] [llvm] release/18.x: [SelectionDAG] Change computeAliasing signature from optional to LocationSize. (#83017) (PR #83848)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-backend-aarch64

Author: None (llvmbot)


Changes

Backport 6e41d60a717132fadac74abe61ac6a9b1ca98778

Requested by: @davemgreen

---

Patch is 24.23 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/83848.diff


8 Files Affected:

- (modified) llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h (+3-4) 
- (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+21-16) 
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp 
(+9-11) 
- (modified) llvm/test/CodeGen/AArch64/alloca-load-store-scalable-array.ll 
(+18-18) 
- (modified) llvm/test/CodeGen/AArch64/alloca-load-store-scalable-struct.ll 
(+6-6) 
- (modified) llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll 
(+6-6) 
- (modified) llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll 
(+4-4) 
- (modified) llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp 
(+35-45) 


``diff
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h 
b/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
index 3d0f836b0c7578..29de6bd8685e06 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
@@ -9,6 +9,7 @@
 #ifndef LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
 #define LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
 
+#include "llvm/Analysis/MemoryLocation.h"
 #include "llvm/CodeGen/SelectionDAGNodes.h"
 #include 
 
@@ -81,10 +82,8 @@ class BaseIndexOffset {
 
   // Returns true `Op0` and `Op1` can be proven to alias/not alias, in
   // which case `IsAlias` is set to true/false.
-  static bool computeAliasing(const SDNode *Op0,
-  const std::optional NumBytes0,
-  const SDNode *Op1,
-  const std::optional NumBytes1,
+  static bool computeAliasing(const SDNode *Op0, const LocationSize NumBytes0,
+  const SDNode *Op1, const LocationSize NumBytes1,
   const SelectionDAG &DAG, bool &IsAlias);
 
   /// Parses tree in N for base, index, offset addresses.
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3135ec73a99e76..eb912bff4094ce 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -27849,7 +27849,7 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
 bool IsAtomic;
 SDValue BasePtr;
 int64_t Offset;
-std::optional NumBytes;
+LocationSize NumBytes;
 MachineMemOperand *MMO;
   };
 
@@ -27868,7 +27868,8 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   LSN->isAtomic(),
   LSN->getBasePtr(),
   Offset /*base offset*/,
-  std::optional(Size),
+  Size != ~UINT64_C(0) ? LocationSize::precise(Size)
+   : LocationSize::beforeOrAfterPointer(),
   LSN->getMemOperand()};
 }
 if (const auto *LN = cast(N))
@@ -27876,13 +27877,15 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   /*isAtomic*/ false,
   LN->getOperand(1),
   (LN->hasOffset()) ? LN->getOffset() : 0,
-  (LN->hasOffset()) ? std::optional(LN->getSize())
-: std::optional(),
+  (LN->hasOffset()) ? LocationSize::precise(LN->getSize())
+: LocationSize::beforeOrAfterPointer(),
   (MachineMemOperand *)nullptr};
 // Default.
 return {false /*isvolatile*/,
-/*isAtomic*/ false,  SDValue(),
-(int64_t)0 /*offset*/,   std::optional() /*size*/,
+/*isAtomic*/ false,
+SDValue(),
+(int64_t)0 /*offset*/,
+LocationSize::beforeOrAfterPointer() /*size*/,
 (MachineMemOperand *)nullptr};
   };
 
@@ -27937,18 +27940,20 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   int64_t SrcValOffset1 = MUC1.MMO->getOffset();
   Align OrigAlignment0 = MUC0.MMO->getBaseAlign();
   Align OrigAlignment1 = MUC1.MMO->getBaseAlign();
-  auto &Size0 = MUC0.NumBytes;
-  auto &Size1 = MUC1.NumBytes;
+  LocationSize Size0 = MUC0.NumBytes;
+  LocationSize Size1 = MUC1.NumBytes;
   if (OrigAlignment0 == OrigAlignment1 && SrcValOffset0 != SrcValOffset1 &&
-  Size0.has_value() && Size1.has_value() && *Size0 == *Size1 &&
-  OrigAlignment0 > *Size0 && SrcValOffset0 % *Size0 == 0 &&
-  SrcValOffset1 % *Size1 == 0) {
+  Size0.hasValue() && Size1.hasValue() && Size0 == Size1 &&
+  OrigAlignment0 > Size0.getValue() &&
+  SrcValOffset0 % Size0.getValue() == 0 &&
+  SrcValOffset1 % Size1.getValue() == 0) {
 int64_t OffAlign0 = SrcValOffset0 % OrigAlignment0.value();
 int64_t OffAlign1 = SrcValOffset1 % OrigAlignment1.val

[llvm-branch-commits] [llvm] release/18.x: [SelectionDAG] Change computeAliasing signature from optional to LocationSize. (#83017) (PR #83848)

[Simon Pilgrim via llvm-branch-commits]

RKSimon wrote:

@davemgreen Are there further patches for scalable types coming or is this just 
to address the ~UINT64_T(0) bugfix?

https://github.com/llvm/llvm-project/pull/83848
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[llvm-branch-commits] [llvm] release/18.x: [SelectionDAG] Change computeAliasing signature from optional to LocationSize. (#83017) (PR #83848)

[David Green via llvm-branch-commits]

davemgreen wrote:

See https://github.com/llvm/llvm-project/pull/83017, about it fixing the bug in 
a recent RISCV issue. I think the "Requested by" comes from the git committer.

@lukel97 i'm not sure if you have already or not, but it might be good to 
include the recent test you added too.

https://github.com/llvm/llvm-project/pull/83848
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[llvm-branch-commits] [llvm] [nfc][InstrProfiling]For comdat setting helper function, move comment closer to the code (PR #83757)

[Teresa Johnson via llvm-branch-commits]

https://github.com/teresajohnson approved this pull request.


https://github.com/llvm/llvm-project/pull/83757
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[llvm-branch-commits] Address comments (PR #83854)

[Alexey Bataev via llvm-branch-commits]

https://github.com/alexey-bataev created 
https://github.com/llvm/llvm-project/pull/83854

None


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[llvm-branch-commits] Address comments (PR #83854)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-llvm-transforms

Author: Alexey Bataev (alexey-bataev)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/83854.diff


2 Files Affected:

- (modified) llvm/lib/Transforms/Vectorize/LoopVectorize.cpp (+3-3) 
- (modified) llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp (+16-13) 


``diff
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp 
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 81992883ac7049..9fe63078786571 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -1580,7 +1580,7 @@ class LoopVectorizationCostModel {
 
   /// Returns true if VP intrinsics with explicit vector length support should
   /// be generated in the tail folded loop.
-  bool useVPIWithVPEVLVectorization() const {
+  bool foldTailWithEVL() const {
 return getTailFoldingStyle() == TailFoldingStyle::DataWithEVL;
   }
 
@@ -5310,7 +5310,7 @@ 
LoopVectorizationCostModel::selectInterleaveCount(ElementCount VF,
 return 1;
 
   // Do not interleave if EVL is preferred and no User IC is specified.
-  if (useVPIWithVPEVLVectorization()) {
+  if (foldTailWithEVL()) {
 LLVM_DEBUG(dbgs() << "LV: Preference for VP intrinsics indicated. "
  "Unroll factor forced to be 1.\n");
 return 1;
@@ -8564,7 +8564,7 @@ void 
LoopVectorizationPlanner::buildVPlansWithVPRecipes(ElementCount MinVF,
 VPlanTransforms::truncateToMinimalBitwidths(
 *Plan, CM.getMinimalBitwidths(), PSE.getSE()->getContext());
   VPlanTransforms::optimize(*Plan, *PSE.getSE());
-  if (CM.useVPIWithVPEVLVectorization())
+  if (CM.foldTailWithEVL())
 VPlanTransforms::addExplicitVectorLength(*Plan);
   assert(verifyVPlanIsValid(*Plan) && "VPlan is invalid");
   VPlans.push_back(std::move(Plan));
diff --git a/llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp 
b/llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
index f549c8310fec5c..a3b8fc9db3fb72 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
@@ -93,8 +93,9 @@ static bool verifyVPBasicBlock(const VPBasicBlock *VPBB,
 RecipeNumbering[&R] = Cnt++;
 
   // Set of recipe types along with VPInstruction Opcodes of all EVL-related
-  // recipes that must appear at most once in Entry or Exiting blocks.
+  // recipes that must appear at most once in the header block.
   DenseSet EVLFound;
+  const VPRecipeBase *VPWidenMemRecipe = nullptr;
   const VPlan *Plan = VPBB->getPlan();
   bool IsHeader = Plan && Plan->getEntry()->getNumSuccessors() == 1 &&
   Plan->getVectorLoopRegion()->getEntry() == VPBB;
@@ -110,23 +111,25 @@ static bool verifyVPBasicBlock(const VPBasicBlock *VPBB,
   }
   return true;
 }
-auto *RInst = dyn_cast(R);
-if (!RInst)
-  return true;
-switch (RInst->getOpcode()) {
-case VPInstruction::ExplicitVectorLength:
+if (const auto *RInst = dyn_cast(R);
+RInst && RInst->getOpcode() == VPInstruction::ExplicitVectorLength) {
   if (!IsHeader) {
-errs() << "EVL instruction not in entry block!\n";
+errs() << "EVL instruction not in the header block!\n";
+return false;
+  }
+  if (!EVLFound.insert(RInst->getOpcode() + VPDef::VPLastPHISC).second) {
+errs() << "EVL instruction inserted more than once!\n";
+return false;
+  }
+  if (VPWidenMemRecipe) {
+errs() << "Use of EVL instruction by widen memory recipe before "
+  "definition!\n";
 return false;
   }
-  break;
-default:
   return true;
 }
-if (!EVLFound.insert(RInst->getOpcode() + VPDef::VPLastPHISC).second) {
-  errs() << "EVL instruction inserted more than once!\n";
-  return false;
-}
+if (isa(R))
+  VPWidenMemRecipe = R;
 return true;
   };
 

``




https://github.com/llvm/llvm-project/pull/83854
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[llvm-branch-commits] Address comments (PR #83854)

[Alexey Bataev via llvm-branch-commits]

https://github.com/alexey-bataev closed 
https://github.com/llvm/llvm-project/pull/83854
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[llvm-branch-commits] [llvm] release/18.x: [SelectionDAG] Change computeAliasing signature from optional to LocationSize. (#83017) (PR #83848)

[Luke Lau via llvm-branch-commits]

lukel97 wrote:

> I think the "Requested by" comes from the git committer.

There's a PR open to fix this: #82680 

> @lukel97 i'm not sure if you have already or not, but it might be good to 
> include the recent test you added too.

Sure thing, I can't see a way of editing/pushing more commits to this PR's 
branch though. I'll close this and create another PR.

https://github.com/llvm/llvm-project/pull/83848
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[llvm-branch-commits] [llvm] release/18.x: [SelectionDAG] Change computeAliasing signature from optional to LocationSize. (#83017) (PR #83848)

[Luke Lau via llvm-branch-commits]

https://github.com/lukel97 closed 
https://github.com/llvm/llvm-project/pull/83848
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[llvm-branch-commits] [llvm] release/18.x: [RISCV] Add test for aliasing miscompile fixed by #83017. NFC (PR #83856)

[via llvm-branch-commits]

https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/83856
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[llvm-branch-commits] [llvm] release/18.x: [RISCV] Add test for aliasing miscompile fixed by #83017. NFC (PR #83856)

[via llvm-branch-commits]

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/83856

Backport 6e41d60a717132fadac74abe61ac6a9b1ca98778 
63725ab1196ac50509ad382fc12c56f6d8b5d874

Requested by: @davemgreen

>From cb7eeae523e271cbc83512ed6f4c98b2161b155f Mon Sep 17 00:00:00 2001
From: David Green 
Date: Wed, 28 Feb 2024 09:43:05 +
Subject: [PATCH 1/2] [SelectionDAG] Change computeAliasing signature from
 optional to LocationSize. (#83017)

This is another smaller step of #70452, changing the signature of
computeAliasing() from optional to LocationSize, and follow-up
changes in DAGCombiner::mayAlias(). There are some test change due to
the previous AA->isNoAlias call incorrectly using an unknown size
(~UINT64_T(0)). This should then be improved again in #70452 when the
types are known to be scalable.

(cherry picked from commit 6e41d60a717132fadac74abe61ac6a9b1ca98778)
---
 .../CodeGen/SelectionDAGAddressAnalysis.h |  7 +-
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 37 +
 .../SelectionDAGAddressAnalysis.cpp   | 20 +++--
 .../alloca-load-store-scalable-array.ll   | 36 -
 .../alloca-load-store-scalable-struct.ll  | 12 +--
 .../rvv/alloca-load-store-scalable-array.ll   | 12 +--
 .../rvv/alloca-load-store-scalable-struct.ll  |  8 +-
 .../SelectionDAGAddressAnalysisTest.cpp   | 80 ---
 8 files changed, 102 insertions(+), 110 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h 
b/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
index 3d0f836b0c7578..29de6bd8685e06 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
@@ -9,6 +9,7 @@
 #ifndef LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
 #define LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
 
+#include "llvm/Analysis/MemoryLocation.h"
 #include "llvm/CodeGen/SelectionDAGNodes.h"
 #include 
 
@@ -81,10 +82,8 @@ class BaseIndexOffset {
 
   // Returns true `Op0` and `Op1` can be proven to alias/not alias, in
   // which case `IsAlias` is set to true/false.
-  static bool computeAliasing(const SDNode *Op0,
-  const std::optional NumBytes0,
-  const SDNode *Op1,
-  const std::optional NumBytes1,
+  static bool computeAliasing(const SDNode *Op0, const LocationSize NumBytes0,
+  const SDNode *Op1, const LocationSize NumBytes1,
   const SelectionDAG &DAG, bool &IsAlias);
 
   /// Parses tree in N for base, index, offset addresses.
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3135ec73a99e76..eb912bff4094ce 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -27849,7 +27849,7 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
 bool IsAtomic;
 SDValue BasePtr;
 int64_t Offset;
-std::optional NumBytes;
+LocationSize NumBytes;
 MachineMemOperand *MMO;
   };
 
@@ -27868,7 +27868,8 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   LSN->isAtomic(),
   LSN->getBasePtr(),
   Offset /*base offset*/,
-  std::optional(Size),
+  Size != ~UINT64_C(0) ? LocationSize::precise(Size)
+   : LocationSize::beforeOrAfterPointer(),
   LSN->getMemOperand()};
 }
 if (const auto *LN = cast(N))
@@ -27876,13 +27877,15 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   /*isAtomic*/ false,
   LN->getOperand(1),
   (LN->hasOffset()) ? LN->getOffset() : 0,
-  (LN->hasOffset()) ? std::optional(LN->getSize())
-: std::optional(),
+  (LN->hasOffset()) ? LocationSize::precise(LN->getSize())
+: LocationSize::beforeOrAfterPointer(),
   (MachineMemOperand *)nullptr};
 // Default.
 return {false /*isvolatile*/,
-/*isAtomic*/ false,  SDValue(),
-(int64_t)0 /*offset*/,   std::optional() /*size*/,
+/*isAtomic*/ false,
+SDValue(),
+(int64_t)0 /*offset*/,
+LocationSize::beforeOrAfterPointer() /*size*/,
 (MachineMemOperand *)nullptr};
   };
 
@@ -27937,18 +27940,20 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   int64_t SrcValOffset1 = MUC1.MMO->getOffset();
   Align OrigAlignment0 = MUC0.MMO->getBaseAlign();
   Align OrigAlignment1 = MUC1.MMO->getBaseAlign();
-  auto &Size0 = MUC0.NumBytes;
-  auto &Size1 = MUC1.NumBytes;
+  LocationSize Size0 = MUC0.NumBytes;
+  LocationSize Size1 = MUC1.NumBytes;
   if (OrigAlignment0 == OrigAlignment1 && SrcValOffset0 != SrcValOffset1 &&
-  Size0.has_value() && Size1.has_value() && *Size0 == *Size1 &&
-  

[llvm-branch-commits] [llvm] release/18.x: [RISCV] Add test for aliasing miscompile fixed by #83017. NFC (PR #83856)

[via llvm-branch-commits]

llvmbot wrote:

@RKSimon What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/83856
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[llvm-branch-commits] [llvm] release/18.x: [RISCV] Add test for aliasing miscompile fixed by #83017. NFC (PR #83856)

[via llvm-branch-commits]

llvmbot wrote:



@llvm/pr-subscribers-llvm-selectiondag

@llvm/pr-subscribers-backend-aarch64

Author: None (llvmbot)


Changes

Backport 6e41d60a717132fadac74abe61ac6a9b1ca98778 
63725ab1196ac50509ad382fc12c56f6d8b5d874

Requested by: @davemgreen

---

Patch is 26.52 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/83856.diff


9 Files Affected:

- (modified) llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h (+3-4) 
- (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+21-16) 
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp 
(+9-11) 
- (modified) llvm/test/CodeGen/AArch64/alloca-load-store-scalable-array.ll 
(+18-18) 
- (modified) llvm/test/CodeGen/AArch64/alloca-load-store-scalable-struct.ll 
(+6-6) 
- (modified) llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll 
(+6-6) 
- (modified) llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll 
(+4-4) 
- (added) llvm/test/CodeGen/RISCV/rvv/pr83017.ll (+50) 
- (modified) llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp 
(+35-45) 


``diff
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h 
b/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
index 3d0f836b0c7578..29de6bd8685e06 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
@@ -9,6 +9,7 @@
 #ifndef LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
 #define LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
 
+#include "llvm/Analysis/MemoryLocation.h"
 #include "llvm/CodeGen/SelectionDAGNodes.h"
 #include 
 
@@ -81,10 +82,8 @@ class BaseIndexOffset {
 
   // Returns true `Op0` and `Op1` can be proven to alias/not alias, in
   // which case `IsAlias` is set to true/false.
-  static bool computeAliasing(const SDNode *Op0,
-  const std::optional NumBytes0,
-  const SDNode *Op1,
-  const std::optional NumBytes1,
+  static bool computeAliasing(const SDNode *Op0, const LocationSize NumBytes0,
+  const SDNode *Op1, const LocationSize NumBytes1,
   const SelectionDAG &DAG, bool &IsAlias);
 
   /// Parses tree in N for base, index, offset addresses.
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3135ec73a99e76..eb912bff4094ce 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -27849,7 +27849,7 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
 bool IsAtomic;
 SDValue BasePtr;
 int64_t Offset;
-std::optional NumBytes;
+LocationSize NumBytes;
 MachineMemOperand *MMO;
   };
 
@@ -27868,7 +27868,8 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   LSN->isAtomic(),
   LSN->getBasePtr(),
   Offset /*base offset*/,
-  std::optional(Size),
+  Size != ~UINT64_C(0) ? LocationSize::precise(Size)
+   : LocationSize::beforeOrAfterPointer(),
   LSN->getMemOperand()};
 }
 if (const auto *LN = cast(N))
@@ -27876,13 +27877,15 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   /*isAtomic*/ false,
   LN->getOperand(1),
   (LN->hasOffset()) ? LN->getOffset() : 0,
-  (LN->hasOffset()) ? std::optional(LN->getSize())
-: std::optional(),
+  (LN->hasOffset()) ? LocationSize::precise(LN->getSize())
+: LocationSize::beforeOrAfterPointer(),
   (MachineMemOperand *)nullptr};
 // Default.
 return {false /*isvolatile*/,
-/*isAtomic*/ false,  SDValue(),
-(int64_t)0 /*offset*/,   std::optional() /*size*/,
+/*isAtomic*/ false,
+SDValue(),
+(int64_t)0 /*offset*/,
+LocationSize::beforeOrAfterPointer() /*size*/,
 (MachineMemOperand *)nullptr};
   };
 
@@ -27937,18 +27940,20 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) 
const {
   int64_t SrcValOffset1 = MUC1.MMO->getOffset();
   Align OrigAlignment0 = MUC0.MMO->getBaseAlign();
   Align OrigAlignment1 = MUC1.MMO->getBaseAlign();
-  auto &Size0 = MUC0.NumBytes;
-  auto &Size1 = MUC1.NumBytes;
+  LocationSize Size0 = MUC0.NumBytes;
+  LocationSize Size1 = MUC1.NumBytes;
   if (OrigAlignment0 == OrigAlignment1 && SrcValOffset0 != SrcValOffset1 &&
-  Size0.has_value() && Size1.has_value() && *Size0 == *Size1 &&
-  OrigAlignment0 > *Size0 && SrcValOffset0 % *Size0 == 0 &&
-  SrcValOffset1 % *Size1 == 0) {
+  Size0.hasValue() && Size1.hasValue() && Size0 == Size1 &&
+  OrigAlignment0 > Size0.getValue() &&
+  SrcValOffset0 % Size0.getValue() == 0 &&
+  SrcValOffset1 % Size1.getVal

[llvm-branch-commits] [llvm] release/18.x: [SelectionDAG] Change computeAliasing signature from optional to LocationSize. (#83017) (PR #83848)

[Luke Lau via llvm-branch-commits]

lukel97 wrote:

Superseded by #83856 

https://github.com/llvm/llvm-project/pull/83848
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[llvm-branch-commits] [llvm] release/18.x: [cmake] Add minor version to library SONAME (#79376) (PR #82409)

[Tom Stellard via llvm-branch-commits]

tstellar wrote:

@RalfJung The intention was that the change would be backwards compatible.  Is 
there a specific problem you see?  We can still fix this in the release/18.x 
branch if necessary.

https://github.com/llvm/llvm-project/pull/82409
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[llvm-branch-commits] [llvm] release/18.x: [cmake] Add minor version to library SONAME (#79376) (PR #82409)

[Ralf Jung via llvm-branch-commits]

RalfJung wrote:

Yeah, I linked to it: https://github.com/rust-lang/rust/issues/121889.

I'm not a linker expert, but it seems that now symlinks are required to link 
against the LLVM .so file, but we can't ship symlinks in our artifacts because 
of Windows. The old approach we used of just shipping the .so file and pointing 
the linker at it doesn't seem to work any more with the new sonames. I don't 
claim to understand why, I am involved solely because my tool no longer builds 
after rustc updated to LLVM 18 rc4.

https://github.com/llvm/llvm-project/pull/82409
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[llvm-branch-commits] [llvm] release/18.x: [cmake] Add minor version to library SONAME (#79376) (PR #82409)

[James Y Knight via llvm-branch-commits]

jyknight wrote:

So the problem Rust sees isn't that a ".1" was added to the version, but rather 
that the name was changed from "libLLVM-18-rust-1.78.0-nightly.so" to 
"libLLVM.so.18.1-rust-1.78.0-nightly". (that is: all the version info 
previously went into the library name which comes before ".so", and now goes 
into the library version which comes after ".so").

And issues with symlinks on Windows.

https://github.com/llvm/llvm-project/pull/82409
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[llvm-branch-commits] [llvm] release/18.x: [cmake] Add minor version to library SONAME (#79376) (PR #82409)

[Tom Stellard via llvm-branch-commits]

tstellar wrote:

@RalfJung Are you configuring LLVM with 
-DLLVM_VERSION_SUFFIX=-rust-1.78.0-nightly ?

https://github.com/llvm/llvm-project/pull/82409
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[llvm-branch-commits] [llvm] release/18.x: [cmake] Add minor version to library SONAME (#79376) (PR #82409)

[Ralf Jung via llvm-branch-commits]

RalfJung wrote:

> So the problem Rust sees isn't that a ".1" was added to the version, but 
> rather that the name was changed from "libLLVM-18-rust-1.78.0-nightly.so" to 
> "libLLVM.so.18.1-rust-1.78.0-nightly". (that is: all the version info 
> previously went into the library name which comes before ".so", and now goes 
> into the library version which comes after ".so").

Ah, I didn't catch the shifted `.so` -- sounds right.

> Are you configuring LLVM with -DLLVM_VERSION_SUFFIX=-rust-1.78.0-nightly ?

I have no idea, as I said I am working on a tool that fails to link now but 
have no direct contact with our LLVM stuff otherwise.^^ @nikic would know more.

At this point we seem to be on-track for fixing this so a revert would probably 
be extra work for us. But other users that tested rc3 may still be surprised by 
this I guess.

https://github.com/llvm/llvm-project/pull/82409
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[llvm-branch-commits] [llvm] release/18.x: [cmake] Add minor version to library SONAME (#79376) (PR #82409)

[Nikita Popov via llvm-branch-commits]

nikic wrote:

> @RalfJung Are you configuring LLVM with 
> -DLLVM_VERSION_SUFFIX=-rust-1.78.0-nightly ?

Yes.

> So the problem Rust sees isn't that a ".1" was added to the version, but 
> rather that the name was changed from "libLLVM-18-rust-1.78.0-nightly.so" to 
> "libLLVM.so.18.1-rust-1.78.0-nightly". (that is: all the version info 
> previously went into the library name which comes before ".so", and now goes 
> into the library version which comes after ".so").

Right. The new scheme requires a symlink for linking, and rustup components 
currently do not support symlinks. But thankfully we can use a linker script 
instead of a symlink to sidestep the issue.

https://github.com/llvm/llvm-project/pull/82409
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[llvm-branch-commits] [clang] Backport d23ef9e to release/18.x (PR #83911)

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https://github.com/Sirraide milestoned 
https://github.com/llvm/llvm-project/pull/83911
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[llvm-branch-commits] [clang] Backport d23ef9e to release/18.x (PR #83911)

[via llvm-branch-commits]

https://github.com/Sirraide created 
https://github.com/llvm/llvm-project/pull/83911

Manually cherry-pick and backport 
https://github.com/llvm/llvm-project/commit/d23ef9ef3685eb42ebf719bc28cfe2e4651932fc
 as discussed in https://github.com/llvm/llvm-project/pull/83103.

CC @AaronBallman, @tstellar 

>From 74fa05dead4d52eef3c33406d05dd1bbaf10d546 Mon Sep 17 00:00:00 2001
From: Sirraide 
Date: Tue, 27 Feb 2024 20:19:44 +0100
Subject: [PATCH] [Clang] [Sema] Handle placeholders in '.*' expressions
 (#83103)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

When analysing whether we should handle a binary expression as an
overloaded operator call or a builtin operator, we were calling
`checkPlaceholderForOverload()`, which takes care of any placeholders
that are not overload sets—which would usually make sense since those
need to be handled as part of overload resolution.

Unfortunately, we were also doing that for `.*`, which is not
overloadable, and then proceeding to create a builtin operator anyway,
which would crash if the RHS happened to be an unresolved overload set
(due hitting an assertion in `CreateBuiltinBinOp()`—specifically, in one
of its callees—in the `.*` case that makes sure its arguments aren’t
placeholders).

This pr instead makes it so we check for *all* placeholders early if the
operator is `.*`.

It’s worth noting that,
1. In the `.*` case, we now additionally also check for *any*
placeholders (not just non-overload-sets) in the LHS; this shouldn’t
make a difference, however—at least I couldn’t think of a way to trigger
the assertion with an overload set as the LHS of `.*`; it is worth
noting that the assertion in question would also complain if the LHS
happened to be of placeholder type, though.
2. There is another case in which we also don’t perform overload
resolution—namely `=` if the LHS is not of class or enumeration type
after handling non-overload-set placeholders—as in the `.*` case, but
similarly to 1., I first couldn’t think of a way of getting this case to
crash, and secondly, `CreateBuiltinBinOp()` doesn’t seem to care about
placeholders in the LHS or RHS in the `=` case (from what I can tell,
it, or rather one of its callees, only checks that the LHS is not a
pseudo-object type, but those will have already been handled by the call
to `checkPlaceholderForOverload()` by the time we get to this function),
so I don’t think this case suffers from the same problem.

This fixes #53815.

-

Co-authored-by: Aaron Ballman 
---
 clang/docs/ReleaseNotes.rst |  2 ++
 clang/lib/Sema/SemaOverload.cpp | 22 +-
 clang/test/SemaCXX/gh53815.cpp  | 21 +
 3 files changed, 40 insertions(+), 5 deletions(-)
 create mode 100644 clang/test/SemaCXX/gh53815.cpp

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index fc27297aea2d6c..101b3a54b9af24 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -1103,6 +1103,8 @@ Bug Fixes to C++ Support
   (`#82258 `_)
 - Correctly immediate-escalate lambda conversion functions.
   (`#82258 `_)
+- Fix a crash when an unresolved overload set is encountered on the RHS of a 
``.*`` operator.
+  (`#53815 `_)
 
 Bug Fixes to AST Handling
 ^
diff --git a/clang/lib/Sema/SemaOverload.cpp b/clang/lib/Sema/SemaOverload.cpp
index 940bcccb9e261b..b708272ebe7d87 100644
--- a/clang/lib/Sema/SemaOverload.cpp
+++ b/clang/lib/Sema/SemaOverload.cpp
@@ -14470,6 +14470,23 @@ ExprResult Sema::CreateOverloadedBinOp(SourceLocation 
OpLoc,
CurFPFeatureOverrides());
   }
 
+  // If this is the .* operator, which is not overloadable, just
+  // create a built-in binary operator.
+  if (Opc == BO_PtrMemD) {
+auto CheckPlaceholder = [&](Expr *&Arg) {
+  ExprResult Res = CheckPlaceholderExpr(Arg);
+  if (Res.isUsable())
+Arg = Res.get();
+  return !Res.isUsable();
+};
+
+// CreateBuiltinBinOp() doesn't like it if we tell it to create a '.*'
+// expression that contains placeholders (in either the LHS or RHS).
+if (CheckPlaceholder(Args[0]) || CheckPlaceholder(Args[1]))
+  return ExprError();
+return CreateBuiltinBinOp(OpLoc, Opc, Args[0], Args[1]);
+  }
+
   // Always do placeholder-like conversions on the RHS.
   if (checkPlaceholderForOverload(*this, Args[1]))
 return ExprError();
@@ -14489,11 +14506,6 @@ ExprResult Sema::CreateOverloadedBinOp(SourceLocation 
OpLoc,
   if (Opc == BO_Assign && !Args[0]->getType()->isOverloadableType())
 return CreateBuiltinBinOp(OpLoc, Opc, Args[0], Args[1]);
 
-  // If this is the .* operator, which is not overloadable, just
-  // create a built-in binary operator.
-  if (Opc == BO_PtrMemD)
-return CreateBuiltinBinOp(OpLoc, Opc, Args[0], Args[1]);

[llvm-branch-commits] [clang] Backport d23ef9e to release/18.x (PR #83911)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: None (Sirraide)


Changes

Manually cherry-pick and backport 
https://github.com/llvm/llvm-project/commit/d23ef9ef3685eb42ebf719bc28cfe2e4651932fc
 as discussed in https://github.com/llvm/llvm-project/pull/83103.

CC @AaronBallman, @tstellar 

---
Full diff: https://github.com/llvm/llvm-project/pull/83911.diff


3 Files Affected:

- (modified) clang/docs/ReleaseNotes.rst (+2) 
- (modified) clang/lib/Sema/SemaOverload.cpp (+17-5) 
- (added) clang/test/SemaCXX/gh53815.cpp (+21) 


``diff
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index fc27297aea2d6c..101b3a54b9af24 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -1103,6 +1103,8 @@ Bug Fixes to C++ Support
   (`#82258 `_)
 - Correctly immediate-escalate lambda conversion functions.
   (`#82258 `_)
+- Fix a crash when an unresolved overload set is encountered on the RHS of a 
``.*`` operator.
+  (`#53815 `_)
 
 Bug Fixes to AST Handling
 ^
diff --git a/clang/lib/Sema/SemaOverload.cpp b/clang/lib/Sema/SemaOverload.cpp
index 940bcccb9e261b..b708272ebe7d87 100644
--- a/clang/lib/Sema/SemaOverload.cpp
+++ b/clang/lib/Sema/SemaOverload.cpp
@@ -14470,6 +14470,23 @@ ExprResult Sema::CreateOverloadedBinOp(SourceLocation 
OpLoc,
CurFPFeatureOverrides());
   }
 
+  // If this is the .* operator, which is not overloadable, just
+  // create a built-in binary operator.
+  if (Opc == BO_PtrMemD) {
+auto CheckPlaceholder = [&](Expr *&Arg) {
+  ExprResult Res = CheckPlaceholderExpr(Arg);
+  if (Res.isUsable())
+Arg = Res.get();
+  return !Res.isUsable();
+};
+
+// CreateBuiltinBinOp() doesn't like it if we tell it to create a '.*'
+// expression that contains placeholders (in either the LHS or RHS).
+if (CheckPlaceholder(Args[0]) || CheckPlaceholder(Args[1]))
+  return ExprError();
+return CreateBuiltinBinOp(OpLoc, Opc, Args[0], Args[1]);
+  }
+
   // Always do placeholder-like conversions on the RHS.
   if (checkPlaceholderForOverload(*this, Args[1]))
 return ExprError();
@@ -14489,11 +14506,6 @@ ExprResult Sema::CreateOverloadedBinOp(SourceLocation 
OpLoc,
   if (Opc == BO_Assign && !Args[0]->getType()->isOverloadableType())
 return CreateBuiltinBinOp(OpLoc, Opc, Args[0], Args[1]);
 
-  // If this is the .* operator, which is not overloadable, just
-  // create a built-in binary operator.
-  if (Opc == BO_PtrMemD)
-return CreateBuiltinBinOp(OpLoc, Opc, Args[0], Args[1]);
-
   // Build the overload set.
   OverloadCandidateSet CandidateSet(OpLoc, OverloadCandidateSet::CSK_Operator,
 OverloadCandidateSet::OperatorRewriteInfo(
diff --git a/clang/test/SemaCXX/gh53815.cpp b/clang/test/SemaCXX/gh53815.cpp
new file mode 100644
index 00..326c911c7bfaf5
--- /dev/null
+++ b/clang/test/SemaCXX/gh53815.cpp
@@ -0,0 +1,21 @@
+// RUN: %clang_cc1 -fsyntax-only -verify -std=c++20 %s
+// expected-no-diagnostics
+
+// Check that we don't crash due to forgetting to check for placeholders
+// in the RHS of '.*'.
+
+template 
+static bool has_explicitly_named_overload() {
+  return requires { Fn().*&Fn::operator(); };
+}
+
+int main() {
+  has_explicitly_named_overload();
+}
+
+template 
+constexpr bool has_explicitly_named_overload_2() {
+  return requires { Fn().*&Fn::operator(); };
+}
+
+static_assert(!has_explicitly_named_overload_2());

``




https://github.com/llvm/llvm-project/pull/83911
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[llvm-branch-commits] [llvm] ReleaseNotes for LLVM binary utilities (PR #83751)

[Fangrui Song via llvm-branch-commits]

@@ -344,21 +344,26 @@ Changes to the LLVM tools
 * Fixed big-endian support in llvm-symbolizer's DWARF location parser.
 * llvm-readelf now supports ``--extra-sym-info`` (``-X``) to display extra
   information (section name) when showing symbols.
-
-* ``llvm-nm`` now supports the ``--line-numbers`` (``-l``) option to use
-  debugging information to print symbols' filenames and line numbers.
+* ``llvm-readobj``/``llvm-readelf`` now supports ``--decompress``/``-z`` with

MaskRay wrote:

[added more 
backticks](https://github.com/llvm/llvm-project/pull/83751/commits/8ba9bed8210bf7bce320f589b1243f19cd7e9c6c)

https://github.com/llvm/llvm-project/pull/83751
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[llvm-branch-commits] [flang] [flang][OpenMP] Convert DataSharingProcessor to omp::Clause (PR #81629)

[Kiran Chandramohan via llvm-branch-commits]

@@ -135,138 +133,135 @@ void DataSharingProcessor::insertBarrier() {
 void DataSharingProcessor::insertLastPrivateCompare(mlir::Operation *op) {
   bool cmpCreated = false;
   mlir::OpBuilder::InsertPoint localInsPt = firOpBuilder.saveInsertionPoint();
-  for (const Fortran::parser::OmpClause &clause : opClauseList.v) {

kiranchandramohan wrote:

Are there code changes here or is it only  the replacement of 
`parser::OmpClause` with `omp::Clause`?

https://github.com/llvm/llvm-project/pull/81629
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[llvm-branch-commits] [MSan] Pass -fsanitize-ignorelist to the instrumented libcxxabi (PR #83652)

[Vitaly Buka via llvm-branch-commits]

https://github.com/vitalybuka approved this pull request.


https://github.com/llvm/llvm-project/pull/83652
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[llvm-branch-commits] [flang] [flang][OpenMP] Convert unique clauses in ClauseProcessor (PR #81622)

[Kiran Chandramohan via llvm-branch-commits]

https://github.com/kiranchandramohan approved this pull request.

Mostly mechanical changes. LGTM. Please wait for @skatrak 

https://github.com/llvm/llvm-project/pull/81622
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[llvm-branch-commits] [mlir] [mlir][Transforms] Add listener support to dialect conversion (PR #83425)

[Matthias Springer via llvm-branch-commits]

https://github.com/matthias-springer edited 
https://github.com/llvm/llvm-project/pull/83425
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[llvm-branch-commits] [mlir] [mlir][Transforms] Add listener support to dialect conversion (PR #83425)

[Matthias Springer via llvm-branch-commits]

matthias-springer wrote:

> > _[Reviewable](https://reviewable.io/reviews/llvm/llvm-project/83425)_ 
> > status: 0 of 4 files reviewed, 1 unresolved discussion (waiting on @ftynse, 
> > @joker-eph, and @matthias-springer)
> 
> _[`mlir/lib/Transforms/Utils/DialectConversion.cpp` line 363 at 
> r1](https://reviewable.io/reviews/llvm/llvm-project/83425#-Ns3aO9h2L3R0Ul-IX4T:-Ns3aO9h2L3R0Ul-IX4U:blphauh)
>  ([raw 
> file](https://github.com/llvm/llvm-project/blob/22e8d5ea80b74d687c3e792c512f50b9de81f489/mlir/lib/Transforms/Utils/DialectConversion.cpp#L363)):_
> 
> > ```c++
> >   // notification and iterators into past IR state cannot be 
> > represented.
> >   listener->notifyBlockInserted(block, /*previous=*/region,
> > /*previousIt=*/{});
> > ```
> 
> And this is expected in the consumer that it may get not previousIt?

Yes, that's expected because the IR was already modified (possibly a long time 
ago before the notification is sent) and `Region::iterator` / `Block::iterator` 
into past IR state cannot be represented. (We could pass a `Block *before` / 
`Operation *before` in to `notifyBlockInserted` / `notifyOperationInserted` in 
the future instead, if needed.) I updated the documentation of 
`ConversionConfig::listener`.


https://github.com/llvm/llvm-project/pull/83425
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[llvm-branch-commits] [llvm] [Inline][PGO] After inline, update profile for invoke instruction in both cloned instruction in the caller and original callee (PR #83809)

[Mingming Liu via llvm-branch-commits]

https://github.com/minglotus-6 edited 
https://github.com/llvm/llvm-project/pull/83809
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[llvm-branch-commits] [llvm] [Inline][PGO] After inline, update profile for invoke instruction in both cloned instruction in the caller and original callee (PR #83809)

[Mingming Liu via llvm-branch-commits]

https://github.com/minglotus-6 ready_for_review 
https://github.com/llvm/llvm-project/pull/83809
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[llvm-branch-commits] [llvm] [Inline][PGO] After inline, update profile for invoke instruction in both cloned instruction in the caller and original callee (PR #83809)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-llvm-ir

Author: Mingming Liu (minglotus-6)


Changes

A related change is https://reviews.llvm.org/D133121,  which correctly 
preserves both branch weights and value profiles for invoke instruction.

* The parent nfc commit is https://github.com/llvm/llvm-project/pull/83780

---
Full diff: https://github.com/llvm/llvm-project/pull/83809.diff


4 Files Affected:

- (modified) llvm/include/llvm/IR/Instructions.h (+3) 
- (modified) llvm/lib/IR/Instructions.cpp (+12) 
- (modified) llvm/lib/Transforms/Utils/InlineFunction.cpp (+9-2) 
- (added) llvm/test/Transforms/Inline/update_invoke_value_profile.ll (+185) 


``diff
diff --git a/llvm/include/llvm/IR/Instructions.h 
b/llvm/include/llvm/IR/Instructions.h
index bc357074e5cb21..1146b3fa3ae244 100644
--- a/llvm/include/llvm/IR/Instructions.h
+++ b/llvm/include/llvm/IR/Instructions.h
@@ -4360,6 +4360,9 @@ class InvokeInst : public CallBase {
 
   unsigned getNumSuccessors() const { return 2; }
 
+  /// Updates profile metadata by scaling it by \p S / \p T.
+  void updateProfWeight(uint64_t S, uint64_t T);
+
   // Methods for support type inquiry through isa, cast, and dyn_cast:
   static bool classof(const Instruction *I) {
 return (I->getOpcode() == Instruction::Invoke);
diff --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp
index 9ae71acd523c36..920ce67f118991 100644
--- a/llvm/lib/IR/Instructions.cpp
+++ b/llvm/lib/IR/Instructions.cpp
@@ -918,6 +918,18 @@ LandingPadInst *InvokeInst::getLandingPadInst() const {
   return cast(getUnwindDest()->getFirstNonPHI());
 }
 
+void InvokeInst::updateProfWeight(uint64_t S, uint64_t T) {
+  if (T == 0) {
+LLVM_DEBUG(dbgs() << "Attempting to update profile weights will result in "
+ "div by 0. Ignoring. Likely the function "
+  << getParent()->getParent()->getName()
+  << " has 0 entry count, and contains call instructions "
+ "with non-zero prof info.");
+return;
+  }
+  scaleProfData(*this, S, T);
+}
+
 
//===--===//
 //CallBrInst Implementation
 
//===--===//
diff --git a/llvm/lib/Transforms/Utils/InlineFunction.cpp 
b/llvm/lib/Transforms/Utils/InlineFunction.cpp
index f68fdb26f28173..75b0d0669e9228 100644
--- a/llvm/lib/Transforms/Utils/InlineFunction.cpp
+++ b/llvm/lib/Transforms/Utils/InlineFunction.cpp
@@ -1909,10 +1909,14 @@ void llvm::updateProfileCallee(
   // During inlining ?
   if (VMap) {
 uint64_t CloneEntryCount = PriorEntryCount - NewEntryCount;
-for (auto Entry : *VMap)
+for (auto Entry : *VMap) {
   if (isa(Entry.first))
 if (auto *CI = dyn_cast_or_null(Entry.second))
   CI->updateProfWeight(CloneEntryCount, PriorEntryCount);
+  if (isa(Entry.first))
+if (auto *II = dyn_cast_or_null(Entry.second))
+  II->updateProfWeight(CloneEntryCount, PriorEntryCount);
+}
   }
 
   if (EntryDelta) {
@@ -1921,9 +1925,12 @@ void llvm::updateProfileCallee(
 for (BasicBlock &BB : *Callee)
   // No need to update the callsite if it is pruned during inlining.
   if (!VMap || VMap->count(&BB))
-for (Instruction &I : BB)
+for (Instruction &I : BB) {
   if (CallInst *CI = dyn_cast(&I))
 CI->updateProfWeight(NewEntryCount, PriorEntryCount);
+  if (InvokeInst *II = dyn_cast(&I))
+II->updateProfWeight(NewEntryCount, PriorEntryCount);
+}
   }
 }
 
diff --git a/llvm/test/Transforms/Inline/update_invoke_value_profile.ll 
b/llvm/test/Transforms/Inline/update_invoke_value_profile.ll
new file mode 100644
index 00..ac5597a41fce61
--- /dev/null
+++ b/llvm/test/Transforms/Inline/update_invoke_value_profile.ll
@@ -0,0 +1,185 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --version 4
+
+; RUN: opt < %s -passes='require,cgscc(inline)' 
-inline-threshold=1000 -S | FileCheck %s
+
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+%class.Error = type { i32 }
+@_ZTI5Error = external constant { ptr, ptr }
+
+define i32 @callee(ptr %b) personality ptr @__gxx_personality_v0 !prof !17 {
+; CHECK-LABEL: define i32 @callee(
+; CHECK-SAME: ptr [[B:%.*]]) personality ptr @__gxx_personality_v0 !prof 
[[PROF0:![0-9]+]] {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[E:%.*]] = alloca [[CLASS_ERROR:%.*]], align 8
+; CHECK-NEXT:[[VTABLE:%.*]] = load ptr, ptr [[B]], align 8
+; CHECK-NEXT:[[TMP0:%.*]] = load ptr, ptr [[VTABLE]], align 8
+; CHECK-NEXT:[[CALL:%.*]] = invoke i32 [[TMP0]](ptr [[B]])
+; CHECK-NEXT:to label [[TRY_CONT:%.*]] unwind label [[LPAD:%.*]], 
!prof [[PROF1:![0-9]+]]
+; CHECK:   lpad:
+; CHECK-NEXT:[[TMP1:%.*]] = 

[llvm-branch-commits] [llvm] [Inline][PGO] After inline, update profile for invoke instruction in both cloned instruction in the caller and original callee (PR #83809)

[Mingming Liu via llvm-branch-commits]

@@ -0,0 +1,185 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --version 4
+
+; RUN: opt < %s -passes='require,cgscc(inline)' 
-inline-threshold=1000 -S | FileCheck %s
+
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+%class.Error = type { i32 }
+@_ZTI5Error = external constant { ptr, ptr }
+
+define i32 @callee(ptr %b) personality ptr @__gxx_personality_v0 !prof !17 {

minglotus-6 wrote:

The IR is reduced from this C++ example https://gcc.godbolt.org/z/brq413zf9 

https://github.com/llvm/llvm-project/pull/83809
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[llvm-branch-commits] [llvm] [Inline][PGO] After inline, update profile for invoke instruction in both cloned instruction in the caller and original callee (PR #83809)

[David Li via llvm-branch-commits]

@@ -918,6 +918,18 @@ LandingPadInst *InvokeInst::getLandingPadInst() const {
   return cast(getUnwindDest()->getFirstNonPHI());
 }
 
+void InvokeInst::updateProfWeight(uint64_t S, uint64_t T) {

david-xl wrote:

should this be moved to CallBase?

https://github.com/llvm/llvm-project/pull/83809
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[llvm-branch-commits] [mlir] [mlir][Transform] `apply_conversion_patterns`: Update handles (PR #83950)

[Matthias Springer via llvm-branch-commits]

https://github.com/matthias-springer created 
https://github.com/llvm/llvm-project/pull/83950

Until now, `transform.apply_conversion_patterns` consumed the target handle and 
potentially invalidated handles. This commit adds tracking functionality 
similar to `transform.apply_patterns`, such that handles are no longer 
invalidated, but updated based on op replacements performed by the dialect 
conversion.

This new functionality is hidden behind a `preserve_handles` attribute for now.

>From 270ade8d830bbed2ebee448c03b82b058707f6ff Mon Sep 17 00:00:00 2001
From: Matthias Springer 
Date: Tue, 5 Mar 2024 03:01:27 +
Subject: [PATCH] [mlir][Transform] `apply_conversion_patterns`: Update handles

Until now, `transform.apply_conversion_patterns` consumed the target handle and 
potentially invalidated handles. This commit adds tracking functionality 
similar to `transform.apply_patterns`, such that handles are no longer 
invalidated, but updated based on op replacements performed by the dialect 
conversion.

This new functionality is hidden behind a `preserve_handles` attribute for now.
---
 .../Transform/IR/TransformInterfaces.h| 32 +
 .../mlir/Dialect/Transform/IR/TransformOps.td | 18 ++--
 .../Transform/IR/TransformInterfaces.cpp  | 39 
 .../lib/Dialect/Transform/IR/TransformOps.cpp | 45 ---
 .../Transform/test-pattern-application.mlir   | 30 +
 5 files changed, 129 insertions(+), 35 deletions(-)

diff --git a/mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h 
b/mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h
index 313cdc27f780a7..32724ff4b98e8e 100644
--- a/mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h
+++ b/mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h
@@ -921,20 +921,36 @@ TransformState::RegionScope 
TransformState::make_region_scope(Region ®ion) {
   return RegionScope(*this, region);
 }
 
+/// A configuration object for customizing a `TrackingListener`.
+struct TrackingListenerConfig {
+  using SkipHandleFn = std::function;
+
+  /// An optional function that returns "true" for handles that do not have to
+  /// be updated. These are typically dead or consumed handles.
+  SkipHandleFn skipHandleFn = nullptr;
+
+  /// If set to "true", the name of a replacement op must match the name of the
+  /// original op. If set to "false", the names of the payload ops tracked in a
+  /// handle may change as the tracking listener updates the transform state.
+  bool requireMatchingReplacementOpName = true;
+
+  /// If set to "true", cast ops (that implement the CastOpInterface) are
+  /// skipped and the replacement op search continues with the operands of the
+  /// cast op.
+  bool skipCastOps = true;
+};
+
 /// A listener that updates a TransformState based on IR modifications. This
 /// listener can be used during a greedy pattern rewrite to keep the transform
 /// state up-to-date.
 class TrackingListener : public RewriterBase::Listener,
  public TransformState::Extension {
 public:
-  /// A function that returns "true" for handles that do not have to be 
updated.
-  using SkipHandleFn = std::function;
-
   /// Create a new TrackingListener for usage in the specified transform op.
   /// Optionally, a function can be specified to identify handles that should
   /// do not have to be updated.
   TrackingListener(TransformState &state, TransformOpInterface op,
-   SkipHandleFn skipHandleFn = nullptr);
+   TrackingListenerConfig config = TrackingListenerConfig());
 
 protected:
   /// Return a replacement payload op for the given op, which is going to be
@@ -959,7 +975,8 @@ class TrackingListener : public RewriterBase::Listener,
   /// same computation; e.g., there may be tiled "linalg.generic" inside the
   /// loop body that represents the original computation. Therefore, the
   /// TrackingListener is conservative by default: it drops the mapping and
-  /// triggers the "payload replacement not found" notification.
+  /// triggers the "payload replacement not found" notification. This default
+  /// behavior can be customized in `TrackingListenerConfig`.
   ///
   /// If no replacement op could be found according to the rules mentioned
   /// above, this function tries to skip over cast-like ops that implement
@@ -1023,9 +1040,8 @@ class TrackingListener : public RewriterBase::Listener,
   /// The handles that are consumed by the transform op.
   DenseSet consumedHandles;
 
-  /// Handles for which this function evaluates to "true" do not have to be
-  /// updated. These are typically dead or consumed handles.
-  SkipHandleFn skipHandleFn;
+  /// Tracking listener configuration.
+  TrackingListenerConfig config;
 };
 
 /// A specialized listener that keeps track of cases in which no replacement
diff --git a/mlir/include/mlir/Dialect/Transform/IR/TransformOps.td 
b/mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
index 9f5

[llvm-branch-commits] [mlir] [mlir][Transform] `apply_conversion_patterns`: Update handles (PR #83950)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-mlir

Author: Matthias Springer (matthias-springer)


Changes

Until now, `transform.apply_conversion_patterns` consumed the target handle and 
potentially invalidated handles. This commit adds tracking functionality 
similar to `transform.apply_patterns`, such that handles are no longer 
invalidated, but updated based on op replacements performed by the dialect 
conversion.

This new functionality is hidden behind a `preserve_handles` attribute for now.

---
Full diff: https://github.com/llvm/llvm-project/pull/83950.diff


5 Files Affected:

- (modified) mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h 
(+24-8) 
- (modified) mlir/include/mlir/Dialect/Transform/IR/TransformOps.td (+14-4) 
- (modified) mlir/lib/Dialect/Transform/IR/TransformInterfaces.cpp (+21-18) 
- (modified) mlir/lib/Dialect/Transform/IR/TransformOps.cpp (+40-5) 
- (modified) mlir/test/Dialect/Transform/test-pattern-application.mlir (+30) 


``diff
diff --git a/mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h 
b/mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h
index 313cdc27f780a7..32724ff4b98e8e 100644
--- a/mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h
+++ b/mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h
@@ -921,20 +921,36 @@ TransformState::RegionScope 
TransformState::make_region_scope(Region ®ion) {
   return RegionScope(*this, region);
 }
 
+/// A configuration object for customizing a `TrackingListener`.
+struct TrackingListenerConfig {
+  using SkipHandleFn = std::function;
+
+  /// An optional function that returns "true" for handles that do not have to
+  /// be updated. These are typically dead or consumed handles.
+  SkipHandleFn skipHandleFn = nullptr;
+
+  /// If set to "true", the name of a replacement op must match the name of the
+  /// original op. If set to "false", the names of the payload ops tracked in a
+  /// handle may change as the tracking listener updates the transform state.
+  bool requireMatchingReplacementOpName = true;
+
+  /// If set to "true", cast ops (that implement the CastOpInterface) are
+  /// skipped and the replacement op search continues with the operands of the
+  /// cast op.
+  bool skipCastOps = true;
+};
+
 /// A listener that updates a TransformState based on IR modifications. This
 /// listener can be used during a greedy pattern rewrite to keep the transform
 /// state up-to-date.
 class TrackingListener : public RewriterBase::Listener,
  public TransformState::Extension {
 public:
-  /// A function that returns "true" for handles that do not have to be 
updated.
-  using SkipHandleFn = std::function;
-
   /// Create a new TrackingListener for usage in the specified transform op.
   /// Optionally, a function can be specified to identify handles that should
   /// do not have to be updated.
   TrackingListener(TransformState &state, TransformOpInterface op,
-   SkipHandleFn skipHandleFn = nullptr);
+   TrackingListenerConfig config = TrackingListenerConfig());
 
 protected:
   /// Return a replacement payload op for the given op, which is going to be
@@ -959,7 +975,8 @@ class TrackingListener : public RewriterBase::Listener,
   /// same computation; e.g., there may be tiled "linalg.generic" inside the
   /// loop body that represents the original computation. Therefore, the
   /// TrackingListener is conservative by default: it drops the mapping and
-  /// triggers the "payload replacement not found" notification.
+  /// triggers the "payload replacement not found" notification. This default
+  /// behavior can be customized in `TrackingListenerConfig`.
   ///
   /// If no replacement op could be found according to the rules mentioned
   /// above, this function tries to skip over cast-like ops that implement
@@ -1023,9 +1040,8 @@ class TrackingListener : public RewriterBase::Listener,
   /// The handles that are consumed by the transform op.
   DenseSet consumedHandles;
 
-  /// Handles for which this function evaluates to "true" do not have to be
-  /// updated. These are typically dead or consumed handles.
-  SkipHandleFn skipHandleFn;
+  /// Tracking listener configuration.
+  TrackingListenerConfig config;
 };
 
 /// A specialized listener that keeps track of cases in which no replacement
diff --git a/mlir/include/mlir/Dialect/Transform/IR/TransformOps.td 
b/mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
index 9f513822ed0a4e..0e42d12a69a400 100644
--- a/mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
+++ b/mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
@@ -190,11 +190,20 @@ def ApplyConversionPatternsOp : 
TransformDialectOp<"apply_conversion_patterns",
 The `legal_ops`, `illegal_ops`, `legal_dialects`, `illegal_dialects`
 attributes specify the conversion target.
 
-This transform consumes the `target` handle and modifies the payload. It
-does not produce any handles.
+Th

[llvm-branch-commits] [clang] [InstallAPI] Capture C++ Decls (PR #83953)

[Cyndy Ishida via llvm-branch-commits]

https://github.com/cyndyishida created 
https://github.com/llvm/llvm-project/pull/83953

This includes capturing symbols for global variables, functions, classes, and 
templated definitions. 
As pre-determining what symbols are generated from C++ declarations can be 
non-trivial, InstallAPI only parses select declarations for symbol generation 
when in C++.

For example, InstallAPI only looks at explicit template instantiations or full 
template specializations, instead of general function or class templates, for 
symbol generation.

>From ab76a4cd4fcaff0633197ab34c595f8b2eab05b3 Mon Sep 17 00:00:00 2001
From: Cyndy Ishida 
Date: Mon, 4 Mar 2024 14:44:56 -0800
Subject: [PATCH] [InstallAPI] Add support for C++ headers

This includes capturing symbols for global variables, functions, classes, and 
templated defintions.
As pre-determing what symbols are generated from C++ declarations can be
non-trivial, InstallAPI only parses select declarations for symbol
generation when parsing c++.

For example, installapi only looks at explicit template instantiations
or full template specializations, instead of general function or class 
templates, for
symbol emittion.
---
 clang/include/clang/InstallAPI/Visitor.h |  14 +
 clang/lib/InstallAPI/Frontend.cpp|   4 +-
 clang/lib/InstallAPI/Visitor.cpp | 425 +-
 clang/test/InstallAPI/cpp.test   | 530 +++
 clang/tools/clang-installapi/Options.cpp |  33 +-
 clang/tools/clang-installapi/Options.h   |   7 +
 6 files changed, 1007 insertions(+), 6 deletions(-)
 create mode 100644 clang/test/InstallAPI/cpp.test

diff --git a/clang/include/clang/InstallAPI/Visitor.h 
b/clang/include/clang/InstallAPI/Visitor.h
index 71d4d9894f4205..546a2b85cb38c5 100644
--- a/clang/include/clang/InstallAPI/Visitor.h
+++ b/clang/include/clang/InstallAPI/Visitor.h
@@ -13,6 +13,7 @@
 #ifndef LLVM_CLANG_INSTALLAPI_VISITOR_H
 #define LLVM_CLANG_INSTALLAPI_VISITOR_H
 
+#include "clang/AST/Availability.h"
 #include "clang/AST/Mangle.h"
 #include "clang/AST/RecursiveASTVisitor.h"
 #include "clang/Basic/TargetInfo.h"
@@ -33,6 +34,7 @@ class InstallAPIVisitor final : public ASTConsumer,
 MC(ItaniumMangleContext::create(ASTCtx, ASTCtx.getDiagnostics())),
 Layout(ASTCtx.getTargetInfo().getDataLayoutString()) {}
   void HandleTranslationUnit(ASTContext &ASTCtx) override;
+  bool shouldVisitTemplateInstantiations() const { return true; }
 
   /// Collect global variables.
   bool VisitVarDecl(const VarDecl *D);
@@ -51,9 +53,19 @@ class InstallAPIVisitor final : public ASTConsumer,
   /// is therefore itself not collected.
   bool VisitObjCCategoryDecl(const ObjCCategoryDecl *D);
 
+  /// Collect global c++ declarations.
+  bool VisitCXXRecordDecl(const CXXRecordDecl *D);
+
 private:
   std::string getMangledName(const NamedDecl *D) const;
   std::string getBackendMangledName(llvm::Twine Name) const;
+  std::string getMangledCXXVTableName(const CXXRecordDecl *D) const;
+  std::string getMangledCXXThunk(const GlobalDecl &D,
+ const ThunkInfo &Thunk) const;
+  std::string getMangledCXXRTTI(const CXXRecordDecl *D) const;
+  std::string getMangledCXXRTTIName(const CXXRecordDecl *D) const;
+  std::string getMangledCtorDtor(const CXXMethodDecl *D, int Type) const;
+
   std::optional getAccessForDecl(const NamedDecl *D) const;
   void recordObjCInstanceVariables(
   const ASTContext &ASTCtx, llvm::MachO::ObjCContainerRecord *Record,
@@ -61,6 +73,8 @@ class InstallAPIVisitor final : public ASTConsumer,
   const llvm::iterator_range<
   DeclContext::specific_decl_iterator>
   Ivars);
+  void emitVTableSymbols(const CXXRecordDecl *D, const AvailabilityInfo &Avail,
+ const HeaderType Access, bool EmittedVTable = false);
 
   InstallAPIContext &Ctx;
   SourceManager &SrcMgr;
diff --git a/clang/lib/InstallAPI/Frontend.cpp 
b/clang/lib/InstallAPI/Frontend.cpp
index efc634d80dd218..c0d8526dae8228 100644
--- a/clang/lib/InstallAPI/Frontend.cpp
+++ b/clang/lib/InstallAPI/Frontend.cpp
@@ -136,9 +136,9 @@ std::unique_ptr 
createInputBuffer(InstallAPIContext &Ctx) {
 else
   OS << "#import ";
 if (H.useIncludeName())
-  OS << "<" << H.getIncludeName() << ">";
+  OS << "<" << H.getIncludeName() << ">\n";
 else
-  OS << "\"" << H.getPath() << "\"";
+  OS << "\"" << H.getPath() << "\"\n";
 
 Ctx.addKnownHeader(H);
   }
diff --git a/clang/lib/InstallAPI/Visitor.cpp b/clang/lib/InstallAPI/Visitor.cpp
index 1f2ef08e5aa252..89d753f8a01706 100644
--- a/clang/lib/InstallAPI/Visitor.cpp
+++ b/clang/lib/InstallAPI/Visitor.cpp
@@ -8,6 +8,7 @@
 
 #include "clang/InstallAPI/Visitor.h"
 #include "clang/AST/ParentMapContext.h"
+#include "clang/AST/VTableBuilder.h"
 #include "clang/Basic/Linkage.h"
 #include "clang/InstallAPI/Frontend.h"
 #include "llvm/ADT/SmallString.h"
@@ -18,6 +19,15 @@
 using namespace llvm;
 using namespace llvm::MachO;
 
+namespace {
+en

[llvm-branch-commits] [clang] [InstallAPI] Capture C++ Decls (PR #83953)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Cyndy Ishida (cyndyishida)


Changes

This includes capturing symbols for global variables, functions, classes, and 
templated definitions. 
As pre-determining what symbols are generated from C++ declarations can be 
non-trivial, InstallAPI only parses select declarations for symbol generation 
when in C++.

For example, InstallAPI only looks at explicit template instantiations or full 
template specializations, instead of general function or class templates, for 
symbol generation.

---

Patch is 33.34 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/83953.diff


6 Files Affected:

- (modified) clang/include/clang/InstallAPI/Visitor.h (+14) 
- (modified) clang/lib/InstallAPI/Frontend.cpp (+2-2) 
- (modified) clang/lib/InstallAPI/Visitor.cpp (+422-3) 
- (added) clang/test/InstallAPI/cpp.test (+530) 
- (modified) clang/tools/clang-installapi/Options.cpp (+32-1) 
- (modified) clang/tools/clang-installapi/Options.h (+7) 


``diff
diff --git a/clang/include/clang/InstallAPI/Visitor.h 
b/clang/include/clang/InstallAPI/Visitor.h
index 71d4d9894f4205..546a2b85cb38c5 100644
--- a/clang/include/clang/InstallAPI/Visitor.h
+++ b/clang/include/clang/InstallAPI/Visitor.h
@@ -13,6 +13,7 @@
 #ifndef LLVM_CLANG_INSTALLAPI_VISITOR_H
 #define LLVM_CLANG_INSTALLAPI_VISITOR_H
 
+#include "clang/AST/Availability.h"
 #include "clang/AST/Mangle.h"
 #include "clang/AST/RecursiveASTVisitor.h"
 #include "clang/Basic/TargetInfo.h"
@@ -33,6 +34,7 @@ class InstallAPIVisitor final : public ASTConsumer,
 MC(ItaniumMangleContext::create(ASTCtx, ASTCtx.getDiagnostics())),
 Layout(ASTCtx.getTargetInfo().getDataLayoutString()) {}
   void HandleTranslationUnit(ASTContext &ASTCtx) override;
+  bool shouldVisitTemplateInstantiations() const { return true; }
 
   /// Collect global variables.
   bool VisitVarDecl(const VarDecl *D);
@@ -51,9 +53,19 @@ class InstallAPIVisitor final : public ASTConsumer,
   /// is therefore itself not collected.
   bool VisitObjCCategoryDecl(const ObjCCategoryDecl *D);
 
+  /// Collect global c++ declarations.
+  bool VisitCXXRecordDecl(const CXXRecordDecl *D);
+
 private:
   std::string getMangledName(const NamedDecl *D) const;
   std::string getBackendMangledName(llvm::Twine Name) const;
+  std::string getMangledCXXVTableName(const CXXRecordDecl *D) const;
+  std::string getMangledCXXThunk(const GlobalDecl &D,
+ const ThunkInfo &Thunk) const;
+  std::string getMangledCXXRTTI(const CXXRecordDecl *D) const;
+  std::string getMangledCXXRTTIName(const CXXRecordDecl *D) const;
+  std::string getMangledCtorDtor(const CXXMethodDecl *D, int Type) const;
+
   std::optional getAccessForDecl(const NamedDecl *D) const;
   void recordObjCInstanceVariables(
   const ASTContext &ASTCtx, llvm::MachO::ObjCContainerRecord *Record,
@@ -61,6 +73,8 @@ class InstallAPIVisitor final : public ASTConsumer,
   const llvm::iterator_range<
   DeclContext::specific_decl_iterator>
   Ivars);
+  void emitVTableSymbols(const CXXRecordDecl *D, const AvailabilityInfo &Avail,
+ const HeaderType Access, bool EmittedVTable = false);
 
   InstallAPIContext &Ctx;
   SourceManager &SrcMgr;
diff --git a/clang/lib/InstallAPI/Frontend.cpp 
b/clang/lib/InstallAPI/Frontend.cpp
index efc634d80dd218..c0d8526dae8228 100644
--- a/clang/lib/InstallAPI/Frontend.cpp
+++ b/clang/lib/InstallAPI/Frontend.cpp
@@ -136,9 +136,9 @@ std::unique_ptr 
createInputBuffer(InstallAPIContext &Ctx) {
 else
   OS << "#import ";
 if (H.useIncludeName())
-  OS << "<" << H.getIncludeName() << ">";
+  OS << "<" << H.getIncludeName() << ">\n";
 else
-  OS << "\"" << H.getPath() << "\"";
+  OS << "\"" << H.getPath() << "\"\n";
 
 Ctx.addKnownHeader(H);
   }
diff --git a/clang/lib/InstallAPI/Visitor.cpp b/clang/lib/InstallAPI/Visitor.cpp
index 1f2ef08e5aa252..89d753f8a01706 100644
--- a/clang/lib/InstallAPI/Visitor.cpp
+++ b/clang/lib/InstallAPI/Visitor.cpp
@@ -8,6 +8,7 @@
 
 #include "clang/InstallAPI/Visitor.h"
 #include "clang/AST/ParentMapContext.h"
+#include "clang/AST/VTableBuilder.h"
 #include "clang/Basic/Linkage.h"
 #include "clang/InstallAPI/Frontend.h"
 #include "llvm/ADT/SmallString.h"
@@ -18,6 +19,15 @@
 using namespace llvm;
 using namespace llvm::MachO;
 
+namespace {
+enum class CXXLinkage {
+  ExternalLinkage,
+  LinkOnceODRLinkage,
+  WeakODRLinkage,
+  PrivateLinkage,
+};
+}
+
 namespace clang::installapi {
 
 // Exported NamedDecl needs to have external linkage and
@@ -53,7 +63,7 @@ static bool isInlined(const FunctionDecl *D) {
   return true;
 }
 
-static SymbolFlags getFlags(bool WeakDef, bool ThreadLocal) {
+static SymbolFlags getFlags(bool WeakDef, bool ThreadLocal = false) {
   SymbolFlags Result = SymbolFlags::None;
   if (WeakDef)
 Result |= SymbolFlags::WeakDefined;
@@ -277,8 +287,417 @@ bool InstallAPIVisitor::VisitFun

[llvm-branch-commits] [clang] [Serialization] Introduce OnDiskHashTable for specializations (PR #83233)

[Chuanqi Xu via llvm-branch-commits]

https://github.com/ChuanqiXu9 updated 
https://github.com/llvm/llvm-project/pull/83233

>From 03e7d56b79531d2e964d85e5bec52ccd6c6422e7 Mon Sep 17 00:00:00 2001
From: Chuanqi Xu 
Date: Wed, 28 Feb 2024 11:41:53 +0800
Subject: [PATCH] [Serialization] Introduce OnDiskHashTable for specializations

Following up for https://github.com/llvm/llvm-project/pull/83108

This follows the suggestion literally from
https://github.com/llvm/llvm-project/pull/76774#issuecomment-1951172457

which introduces OnDiskHashTable for specializations based on D41416.

Note that I didn't polish this patch to reduce the diff from D41416 to
it easier to review. I'll make the polishing patch later. So that we can
focus what we're doing in this patch and focus on the style in the next
patch.
---
 clang/include/clang/AST/ExternalASTSource.h   |  11 +
 .../clang/Sema/MultiplexExternalSemaSource.h  |   6 +
 .../include/clang/Serialization/ASTBitCodes.h |   5 +
 clang/include/clang/Serialization/ASTReader.h |  34 ++-
 clang/include/clang/Serialization/ASTWriter.h |  13 +
 clang/lib/AST/DeclTemplate.cpp|  17 ++
 clang/lib/AST/ExternalASTSource.cpp   |   5 +
 .../lib/Sema/MultiplexExternalSemaSource.cpp  |  12 +
 clang/lib/Serialization/ASTReader.cpp | 145 +-
 clang/lib/Serialization/ASTReaderDecl.cpp |  27 ++
 clang/lib/Serialization/ASTReaderInternals.h  | 124 +
 clang/lib/Serialization/ASTWriter.cpp | 174 +++-
 clang/lib/Serialization/ASTWriterDecl.cpp |  32 ++-
 clang/unittests/Serialization/CMakeLists.txt  |   1 +
 .../Serialization/LoadSpecLazilyTest.cpp  | 260 ++
 15 files changed, 853 insertions(+), 13 deletions(-)
 create mode 100644 clang/unittests/Serialization/LoadSpecLazilyTest.cpp

diff --git a/clang/include/clang/AST/ExternalASTSource.h 
b/clang/include/clang/AST/ExternalASTSource.h
index 8e573965b0a336..af476aa8c57824 100644
--- a/clang/include/clang/AST/ExternalASTSource.h
+++ b/clang/include/clang/AST/ExternalASTSource.h
@@ -150,6 +150,17 @@ class ExternalASTSource : public 
RefCountedBase {
   virtual bool
   FindExternalVisibleDeclsByName(const DeclContext *DC, DeclarationName Name);
 
+  /// Load all the external specializations for the Decl \param D if \param
+  /// OnlyPartial is false. Otherwise, load all the external **partial**
+  /// specializations for the \param D.
+  virtual void LoadExternalSpecializations(const Decl *D, bool OnlyPartial);
+
+  /// Load all the specializations for the Decl \param D with the same template
+  /// args specified by \param TemplateArgs.
+  virtual void
+  LoadExternalSpecializations(const Decl *D,
+  ArrayRef TemplateArgs);
+
   /// Ensures that the table of all visible declarations inside this
   /// context is up to date.
   ///
diff --git a/clang/include/clang/Sema/MultiplexExternalSemaSource.h 
b/clang/include/clang/Sema/MultiplexExternalSemaSource.h
index 2bf91cb5212c5e..f09f037da0556a 100644
--- a/clang/include/clang/Sema/MultiplexExternalSemaSource.h
+++ b/clang/include/clang/Sema/MultiplexExternalSemaSource.h
@@ -97,6 +97,12 @@ class MultiplexExternalSemaSource : public 
ExternalSemaSource {
   bool FindExternalVisibleDeclsByName(const DeclContext *DC,
   DeclarationName Name) override;
 
+  void LoadExternalSpecializations(const Decl *D, bool OnlyPartial) override;
+
+  void
+  LoadExternalSpecializations(const Decl *D,
+  ArrayRef TemplateArgs) 
override;
+
   /// Ensures that the table of all visible declarations inside this
   /// context is up to date.
   void completeVisibleDeclsMap(const DeclContext *DC) override;
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h 
b/clang/include/clang/Serialization/ASTBitCodes.h
index f31efa5117f0d1..15e7aef826a52a 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -698,6 +698,8 @@ enum ASTRecordTypes {
   /// Record code for an unterminated \#pragma clang assume_nonnull begin
   /// recorded in a preamble.
   PP_ASSUME_NONNULL_LOC = 67,
+
+  UPDATE_SPECIALIZATION = 68,
 };
 
 /// Record types used within a source manager block.
@@ -1523,6 +1525,9 @@ enum DeclCode {
   /// A HLSLBufferDecl record.
   DECL_HLSL_BUFFER,
 
+  // A decls specilization record.
+  DECL_SPECIALIZATIONS,
+
   /// An ImplicitConceptSpecializationDecl record.
   DECL_IMPLICIT_CONCEPT_SPECIALIZATION,
 
diff --git a/clang/include/clang/Serialization/ASTReader.h 
b/clang/include/clang/Serialization/ASTReader.h
index 2002bf23c9595f..f1edd2fae645d4 100644
--- a/clang/include/clang/Serialization/ASTReader.h
+++ b/clang/include/clang/Serialization/ASTReader.h
@@ -340,6 +340,9 @@ class ASTIdentifierLookupTrait;
 /// The on-disk hash table(s) used for DeclContext name lookup.
 struct DeclContextLookupTable;
 
+/// The on-disk hash table(s) used for specialization decls.
+struct LazySpecializationInfoLookupTable

[llvm-branch-commits] [llvm] [Inline][PGO] After inline, update profile for invoke instruction in both cloned instruction in the caller and original callee (PR #83809)

[Mingming Liu via llvm-branch-commits]

@@ -918,6 +918,18 @@ LandingPadInst *InvokeInst::getLandingPadInst() const {
   return cast(getUnwindDest()->getFirstNonPHI());
 }
 
+void InvokeInst::updateProfWeight(uint64_t S, uint64_t T) {

minglotus-6 wrote:

It makes sense to move them to `CallBase`. Will need to construct a test case 
(possibly based on 
https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGen/asm-goto.c)
- The difference between 1) current patch and 2) moving this to 'CallBase' and 
calling `updateProfWeight` on a `CallBase` is that, branch weight of 
terminating instruction `callbr` 
([lowered](https://llvm.org/docs/LangRef.html#callbr-instruction) from inline 
assembly 
[goto](https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#GotoLabels)) will 
also be updated. 

https://github.com/llvm/llvm-project/pull/83809
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)

[Chuanqi Xu via llvm-branch-commits]

https://github.com/ChuanqiXu9 updated 
https://github.com/llvm/llvm-project/pull/83237

>From 19617bbdd5b83076140af087d3da0b46d4fe0208 Mon Sep 17 00:00:00 2001
From: Chuanqi Xu 
Date: Wed, 28 Feb 2024 11:41:53 +0800
Subject: [PATCH] [Serialization] Code cleanups and polish 83233

---
 clang/include/clang/AST/DeclTemplate.h| 34 +---
 clang/include/clang/AST/ExternalASTSource.h   |  4 +-
 .../clang/Sema/MultiplexExternalSemaSource.h  |  2 +-
 .../include/clang/Serialization/ASTBitCodes.h |  2 +-
 clang/include/clang/Serialization/ASTReader.h |  2 +-
 clang/lib/AST/DeclTemplate.cpp| 85 +--
 clang/lib/AST/ExternalASTSource.cpp   |  4 +-
 .../lib/Sema/MultiplexExternalSemaSource.cpp  |  6 +-
 clang/lib/Serialization/ASTCommon.h   |  1 -
 clang/lib/Serialization/ASTReader.cpp | 17 ++--
 clang/lib/Serialization/ASTReaderDecl.cpp | 76 +
 clang/lib/Serialization/ASTReaderInternals.h  |  1 -
 clang/lib/Serialization/ASTWriter.cpp | 26 +-
 clang/lib/Serialization/ASTWriterDecl.cpp | 52 +---
 14 files changed, 78 insertions(+), 234 deletions(-)

diff --git a/clang/include/clang/AST/DeclTemplate.h 
b/clang/include/clang/AST/DeclTemplate.h
index 51caef54baac26..537fca1ab9dd77 100644
--- a/clang/include/clang/AST/DeclTemplate.h
+++ b/clang/include/clang/AST/DeclTemplate.h
@@ -256,8 +256,8 @@ class TemplateArgumentList final
   TemplateArgumentList(const TemplateArgumentList &) = delete;
   TemplateArgumentList &operator=(const TemplateArgumentList &) = delete;
 
-  /// Create hash for the given arguments.
-  static unsigned ComputeODRHash(ArrayRef Args);
+  /// Create stable hash for the given arguments across compiler invocations.
+  static unsigned ComputeStableHash(ArrayRef Args);
 
   /// Create a new template argument list that copies the given set of
   /// template arguments.
@@ -733,25 +733,6 @@ class RedeclarableTemplateDecl : public TemplateDecl,
   }
 
   void anchor() override;
-  struct LazySpecializationInfo {
-uint32_t DeclID = ~0U;
-unsigned ODRHash = ~0U;
-bool IsPartial = false;
-LazySpecializationInfo(uint32_t ID, unsigned Hash = ~0U,
-   bool Partial = false)
-: DeclID(ID), ODRHash(Hash), IsPartial(Partial) {}
-LazySpecializationInfo() {}
-bool operator<(const LazySpecializationInfo &Other) const {
-  return DeclID < Other.DeclID;
-}
-bool operator==(const LazySpecializationInfo &Other) const {
-  assert((DeclID != Other.DeclID || ODRHash == Other.ODRHash) &&
- "Hashes differ!");
-  assert((DeclID != Other.DeclID || IsPartial == Other.IsPartial) &&
- "Both must be the same kinds!");
-  return DeclID == Other.DeclID;
-}
-  };
 
 protected:
   template  struct SpecEntryTraits {
@@ -795,11 +776,9 @@ class RedeclarableTemplateDecl : public TemplateDecl,
 
   void loadLazySpecializationsImpl(bool OnlyPartial = false) const;
 
-  void loadLazySpecializationsImpl(llvm::ArrayRef Args,
+  bool loadLazySpecializationsImpl(llvm::ArrayRef Args,
TemplateParameterList *TPL = nullptr) const;
 
-  Decl *loadLazySpecializationImpl(LazySpecializationInfo &LazySpecInfo) const;
-
   template 
   typename SpecEntryTraits::DeclType*
   findSpecializationImpl(llvm::FoldingSetVector &Specs,
@@ -820,13 +799,6 @@ class RedeclarableTemplateDecl : public TemplateDecl,
 llvm::PointerIntPair
   InstantiatedFromMember;
 
-/// If non-null, points to an array of specializations (including
-/// partial specializations) known only by their external declaration IDs.
-///
-/// The first value in the array is the number of specializations/partial
-/// specializations that follow.
-LazySpecializationInfo *LazySpecializations = nullptr;
-
 /// The set of "injected" template arguments used within this
 /// template.
 ///
diff --git a/clang/include/clang/AST/ExternalASTSource.h 
b/clang/include/clang/AST/ExternalASTSource.h
index af476aa8c57824..769abf44ecd430 100644
--- a/clang/include/clang/AST/ExternalASTSource.h
+++ b/clang/include/clang/AST/ExternalASTSource.h
@@ -157,7 +157,9 @@ class ExternalASTSource : public 
RefCountedBase {
 
   /// Load all the specializations for the Decl \param D with the same template
   /// args specified by \param TemplateArgs.
-  virtual void
+  ///
+  /// Return true if any new specializations get loaded. Return false 
otherwise.
+  virtual bool
   LoadExternalSpecializations(const Decl *D,
   ArrayRef TemplateArgs);
 
diff --git a/clang/include/clang/Sema/MultiplexExternalSemaSource.h 
b/clang/include/clang/Sema/MultiplexExternalSemaSource.h
index f09f037da0556a..2ac8f606ae9574 100644
--- a/clang/include/clang/Sema/MultiplexExternalSemaSource.h
+++ b/clang/include/clang/Sema/MultiplexExternalSemaSource.h
@@ -99,7 +99,7 @@ class MultiplexExternalSemaSource : public ExternalSemaSource