[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Don't form anyextending atomic loads. (PR #90435)
https://github.com/aemerson approved this pull request. https://github.com/llvm/llvm-project/pull/90435 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: Reland "[clang-repl] Keep the first llvm::Module empty to avoid invalid memory access. (#89031)" (PR #90544)
nikic wrote: This looks like an ABI breaking change to me. I think the libclang-cpp.so ABI test is currently broken due to the new minor version scheme. (cc @tstellar we need something like https://github.com/llvm/llvm-project/pull/85166 for the clang ABI check) https://github.com/llvm/llvm-project/pull/90544 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][OpenMP] Don't pass clauses to op-generating functions anymore (PR #90108)
https://github.com/ergawy approved this pull request. https://github.com/llvm/llvm-project/pull/90108 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 54ff88a - Revert "[alpha.webkit.UncountedCallArgsChecker] Ignore methods of WTF String …"
Author: Ryosuke Niwa
Date: 2024-04-30T21:28:03-07:00
New Revision: 54ff88ab2b46e0ba82cc59077c6d3b367eecd497
URL:
https://github.com/llvm/llvm-project/commit/54ff88ab2b46e0ba82cc59077c6d3b367eecd497
DIFF:
https://github.com/llvm/llvm-project/commit/54ff88ab2b46e0ba82cc59077c6d3b367eecd497.diff
LOG: Revert "[alpha.webkit.UncountedCallArgsChecker] Ignore methods of WTF
String …"
This reverts commit 240592a772a40b4ffa75921f7b555d2a969b3383.
Added:
Modified:
clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
clang/test/Analysis/Checkers/WebKit/call-args-wtf-containers.cpp
clang/test/Analysis/Checkers/WebKit/mock-types.h
Removed:
diff --git
a/clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
b/clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
index 0f40ecc7ba3000..ae494de58da3da 100644
--- a/clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedCallArgsChecker.cpp
@@ -227,17 +227,10 @@ class UncountedCallArgsChecker
return NamespaceName == "WTF" &&
(MethodName == "find" || MethodName == "findIf" ||
MethodName == "reverseFind" || MethodName == "reverseFindIf" ||
-MethodName == "findIgnoringASCIICase" || MethodName == "get" ||
-MethodName == "inlineGet" || MethodName == "contains" ||
-MethodName == "containsIf" ||
-MethodName == "containsIgnoringASCIICase" ||
-MethodName == "startsWith" || MethodName == "endsWith" ||
-MethodName == "startsWithIgnoringASCIICase" ||
-MethodName == "endsWithIgnoringASCIICase" ||
-MethodName == "substring") &&
+MethodName == "get" || MethodName == "inlineGet" ||
+MethodName == "contains" || MethodName == "containsIf") &&
(ClsName.ends_with("Vector") || ClsName.ends_with("Set") ||
-ClsName.ends_with("Map") || ClsName == "StringImpl" ||
-ClsName.ends_with("String"));
+ClsName.ends_with("Map"));
}
void reportBug(const Expr *CallArg, const ParmVarDecl *Param) const {
diff --git a/clang/test/Analysis/Checkers/WebKit/call-args-wtf-containers.cpp
b/clang/test/Analysis/Checkers/WebKit/call-args-wtf-containers.cpp
index 17e25d9a627039..0a63a789856127 100644
--- a/clang/test/Analysis/Checkers/WebKit/call-args-wtf-containers.cpp
+++ b/clang/test/Analysis/Checkers/WebKit/call-args-wtf-containers.cpp
@@ -4,92 +4,6 @@
namespace WTF {
- constexpr unsigned long notFound = static_cast(-1);
-
- class String;
- class StringImpl;
-
- class StringView {
- public:
-StringView(const String&);
- private:
-RefPtr m_impl;
- };
-
- class StringImpl {
- public:
-void ref() const { ++m_refCount; }
-void deref() const {
- if (!--m_refCount)
-delete this;
-}
-
-static constexpr unsigned s_flagIs8Bit = 1u << 0;
-bool is8Bit() const { return m_hashAndFlags & s_flagIs8Bit; }
-const char* characters8() const { return m_char8; }
-const short* characters16() const { return m_char16; }
-unsigned length() const { return m_length; }
-Ref substring(unsigned position, unsigned length) const;
-
-unsigned long find(char) const;
-unsigned long find(StringView) const;
-unsigned long contains(StringView) const;
-unsigned long findIgnoringASCIICase(StringView) const;
-
-bool startsWith(StringView) const;
-bool startsWithIgnoringASCIICase(StringView) const;
-bool endsWith(StringView) const;
-bool endsWithIgnoringASCIICase(StringView) const;
-
- private:
-mutable unsigned m_refCount { 0 };
-unsigned m_length { 0 };
-union {
- const char* m_char8;
- const short* m_char16;
-};
-unsigned m_hashAndFlags { 0 };
- };
-
- class String {
- public:
-String() = default;
-String(StringImpl& impl) : m_impl() { }
-String(StringImpl* impl) : m_impl(impl) { }
-String(Ref&& impl) : m_impl(impl.get()) { }
-StringImpl* impl() { return m_impl.get(); }
-unsigned length() const { return m_impl ? m_impl->length() : 0; }
-const char* characters8() const { return m_impl ? m_impl->characters8() :
nullptr; }
-const short* characters16() const { return m_impl ? m_impl->characters16()
: nullptr; }
-
-bool is8Bit() const { return !m_impl || m_impl->is8Bit(); }
-
-unsigned long find(char character) const { return m_impl ?
m_impl->find(character) : notFound; }
-unsigned long find(StringView str) const { return m_impl ?
m_impl->find(str) : notFound; }
-unsigned long findIgnoringASCIICase(StringView) const;
-
-bool contains(char character) const { return find(character) != notFound; }
-bool contains(StringView) const;
-bool containsIgnoringASCIICase(StringView) const;
-
-bool startsWith(StringView) const;
-
[llvm-branch-commits] [flang] 1d433cb - Revert "[flang][cuda] Update attribute compatibily check for unified matching…"
Author: Valentin Clement (バレンタイン クレメン)
Date: 2024-04-30T20:04:54-07:00
New Revision: 1d433cb330f33ed6f300342ea18c7852c37b81d9
URL:
https://github.com/llvm/llvm-project/commit/1d433cb330f33ed6f300342ea18c7852c37b81d9
DIFF:
https://github.com/llvm/llvm-project/commit/1d433cb330f33ed6f300342ea18c7852c37b81d9.diff
LOG: Revert "[flang][cuda] Update attribute compatibily check for unified
matching…"
This reverts commit 86e5d6f1d83279557170c0b8e8a6a1ec6e4414d2.
Added:
Modified:
flang/include/flang/Common/Fortran.h
flang/lib/Common/Fortran.cpp
flang/lib/Evaluate/characteristics.cpp
flang/lib/Semantics/check-call.cpp
flang/test/Semantics/cuf13.cuf
Removed:
diff --git a/flang/include/flang/Common/Fortran.h
b/flang/include/flang/Common/Fortran.h
index 3b965fe60c2f02..2a53452a2774ff 100644
--- a/flang/include/flang/Common/Fortran.h
+++ b/flang/include/flang/Common/Fortran.h
@@ -114,8 +114,8 @@ static constexpr IgnoreTKRSet ignoreTKRAll{IgnoreTKR::Type,
IgnoreTKR::Kind,
IgnoreTKR::Rank, IgnoreTKR::Device, IgnoreTKR::Managed};
std::string AsFortran(IgnoreTKRSet);
-bool AreCompatibleCUDADataAttrs(std::optional,
-std::optional, IgnoreTKRSet, bool allowUnifiedMatchingRule);
+bool AreCompatibleCUDADataAttrs(
+std::optional, std::optional, IgnoreTKRSet);
static constexpr char blankCommonObjectName[] = "__BLNK__";
diff --git a/flang/lib/Common/Fortran.cpp b/flang/lib/Common/Fortran.cpp
index c8efe0bb234328..8ada8fe210a30f 100644
--- a/flang/lib/Common/Fortran.cpp
+++ b/flang/lib/Common/Fortran.cpp
@@ -97,12 +97,8 @@ std::string AsFortran(IgnoreTKRSet tkr) {
return result;
}
-/// Check compatibilty of CUDA attribute.
-/// When `allowUnifiedMatchingRule` is enabled, argument `x` represents the
-/// dummy argument attribute while `y` represents the actual argument
attribute.
bool AreCompatibleCUDADataAttrs(std::optional x,
-std::optional y, IgnoreTKRSet ignoreTKR,
-bool allowUnifiedMatchingRule) {
+std::optional y, IgnoreTKRSet ignoreTKR) {
if (!x && !y) {
return true;
} else if (x && y && *x == *y) {
@@ -118,24 +114,6 @@ bool
AreCompatibleCUDADataAttrs(std::optional x,
x.value_or(CUDADataAttr::Managed) == CUDADataAttr::Managed &&
y.value_or(CUDADataAttr::Managed) == CUDADataAttr::Managed) {
return true;
- } else if (allowUnifiedMatchingRule) {
-if (!x) { // Dummy argument has no attribute -> host
- if (y && *y == CUDADataAttr::Managed || *y == CUDADataAttr::Unified) {
-return true;
- }
-} else {
- if (*x == CUDADataAttr::Device && y &&
- (*y == CUDADataAttr::Managed || *y == CUDADataAttr::Unified)) {
-return true;
- } else if (*x == CUDADataAttr::Managed && y &&
- *y == CUDADataAttr::Unified) {
-return true;
- } else if (*x == CUDADataAttr::Unified && y &&
- *y == CUDADataAttr::Managed) {
-return true;
- }
-}
-return false;
} else {
return false;
}
diff --git a/flang/lib/Evaluate/characteristics.cpp
b/flang/lib/Evaluate/characteristics.cpp
index ab03ca5ed2d5a2..20f7476425ace6 100644
--- a/flang/lib/Evaluate/characteristics.cpp
+++ b/flang/lib/Evaluate/characteristics.cpp
@@ -362,9 +362,8 @@ bool DummyDataObject::IsCompatibleWith(const
DummyDataObject ,
}
}
if (!attrs.test(Attr::Value) &&
- !common::AreCompatibleCUDADataAttrs(cudaDataAttr, actual.cudaDataAttr,
- ignoreTKR,
- /*allowUnifiedMatchingRule=*/false)) {
+ !common::AreCompatibleCUDADataAttrs(
+ cudaDataAttr, actual.cudaDataAttr, ignoreTKR)) {
if (whyNot) {
*whyNot = "incompatible CUDA data attributes";
}
@@ -1755,9 +1754,8 @@ bool DistinguishUtils::Distinguishable(
} else if (y.attrs.test(Attr::Allocatable) && x.attrs.test(Attr::Pointer) &&
x.intent != common::Intent::In) {
return true;
- } else if (!common::AreCompatibleCUDADataAttrs(x.cudaDataAttr,
y.cudaDataAttr,
- x.ignoreTKR | y.ignoreTKR,
- /*allowUnifiedMatchingRule=*/false)) {
+ } else if (!common::AreCompatibleCUDADataAttrs(
+ x.cudaDataAttr, y.cudaDataAttr, x.ignoreTKR | y.ignoreTKR)) {
return true;
} else if (features_.IsEnabled(
common::LanguageFeature::DistinguishableSpecifics) &&
diff --git a/flang/lib/Semantics/check-call.cpp
b/flang/lib/Semantics/check-call.cpp
index f0da779785142a..db0949e905a658 100644
--- a/flang/lib/Semantics/check-call.cpp
+++ b/flang/lib/Semantics/check-call.cpp
@@ -897,9 +897,8 @@ static void CheckExplicitDataArg(const
characteristics::DummyDataObject ,
actualDataAttr = common::CUDADataAttr::Device;
}
}
-if (!common::AreCompatibleCUDADataAttrs(dummyDataAttr, actualDataAttr,
-dummy.ignoreTKR,
-/*allowUnifiedMatchingRule=*/true)) {
+if
[llvm-branch-commits] [CallSiteInfo][CallGraphSection] Extract and propagate indirect call type ids (PR #87575)
@@ -488,6 +490,38 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
/// Callee type id.
ConstantInt *TypeId = nullptr;
+
+CallSiteInfo() {}
+
+/// Extracts the numeric type id from the CallBase's type operand bundle,
+/// and sets TypeId. This is used as type id for the indirect call in the
+/// call graph section.
+CallSiteInfo(const CallBase ) {
+ // Call graph section needs numeric type id only for indirect calls.
+ if (!CB.isIndirectCall())
+return;
+
+ auto Opt = CB.getOperandBundle(LLVMContext::OB_type);
+ if (!Opt.has_value()) {
+errs() << "warning: cannot find indirect call type operand bundle for
"
+ "call graph section\n";
+return;
ilovepi wrote:
If you really need a diagnostic in these cases, you'll need to use one of the
diagnostic handlers. Even if it was wrapped in `LLVM_DEBUG`, the existing
warning has no context, so it isn't actionable to the user (e.g. no ability to
know which function or call site is the problem).
https://github.com/llvm/llvm-project/blob/b1b1bfa7bea0ce489b5ea9134e17a43c695df5ec/llvm/include/llvm/IR/DiagnosticInfo.h#L1036
is an example diagnostic I've implemented in the past, but I'm not 100% sure
those are appropriate at this point in the backend. I think its probably fine,
but you can probably check some of the other files under `CodeGen` to find a
related example. I'll take a look tomorrow to see if I can point you in the
right direction.
All in all, though I'd suggest dropping for now. But if you really need it,
then you'll need to create a diagnostic type and use the `diagnose` (or is it
`Report`?) API from the context (or the closest diagnostic handler ... I'd have
to doublecheck). I'd also guard the diagnostic by checking if the call graph
section is enabled. I believe you have a codegen flag for it, so you should be
able to guard whatever you're spitting out only in cases where the message
makes sense.
https://github.com/llvm/llvm-project/pull/87575
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[llvm-branch-commits] [llvm] a96b044 - [AArch64] Remove invalid uabdl patterns. (#89272)
Author: David Green
Date: 2024-04-30T16:01:41-07:00
New Revision: a96b04442c9fc29cd884b56bf07af8615191176f
URL:
https://github.com/llvm/llvm-project/commit/a96b04442c9fc29cd884b56bf07af8615191176f
DIFF:
https://github.com/llvm/llvm-project/commit/a96b04442c9fc29cd884b56bf07af8615191176f.diff
LOG: [AArch64] Remove invalid uabdl patterns. (#89272)
These were added in https://reviews.llvm.org/D14208, which look like
they attempt to detect abs from xor+add+ashr. They do not appear to be
detecting the correct value for the src input though, which I think is
intended to be the sub(zext, zext) part of the pattern. We have pattens
from abs now, so the old invalid patterns can be removed.
Fixes #88784
(cherry picked from commit 851462fcaa7f6e3301865de84f98be7e872e64b6)
Added:
Modified:
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/test/CodeGen/AArch64/arm64-vabs.ll
Removed:
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index 03baa7497615e3..ac61dd8745d4e6 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -4885,19 +4885,9 @@ defm UABDL : SIMDLongThreeVectorBHSabdl<1, 0b0111,
"uabdl",
def : Pat<(abs (v8i16 (sub (zext (v8i8 V64:$opA)),
(zext (v8i8 V64:$opB),
(UABDLv8i8_v8i16 V64:$opA, V64:$opB)>;
-def : Pat<(xor (v8i16 (AArch64vashr v8i16:$src, (i32 15))),
- (v8i16 (add (sub (zext (v8i8 V64:$opA)),
-(zext (v8i8 V64:$opB))),
- (AArch64vashr v8i16:$src, (i32 15),
- (UABDLv8i8_v8i16 V64:$opA, V64:$opB)>;
def : Pat<(abs (v8i16 (sub (zext (extract_high_v16i8 (v16i8 V128:$opA))),
(zext (extract_high_v16i8 (v16i8 V128:$opB)),
(UABDLv16i8_v8i16 V128:$opA, V128:$opB)>;
-def : Pat<(xor (v8i16 (AArch64vashr v8i16:$src, (i32 15))),
- (v8i16 (add (sub (zext (extract_high_v16i8 (v16i8 V128:$opA))),
-(zext (extract_high_v16i8 (v16i8 V128:$opB,
- (AArch64vashr v8i16:$src, (i32 15),
- (UABDLv16i8_v8i16 V128:$opA, V128:$opB)>;
def : Pat<(abs (v4i32 (sub (zext (v4i16 V64:$opA)),
(zext (v4i16 V64:$opB),
(UABDLv4i16_v4i32 V64:$opA, V64:$opB)>;
diff --git a/llvm/test/CodeGen/AArch64/arm64-vabs.ll
b/llvm/test/CodeGen/AArch64/arm64-vabs.ll
index fe4da2e7cf36b5..89c8d540b97e04 100644
--- a/llvm/test/CodeGen/AArch64/arm64-vabs.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-vabs.ll
@@ -1848,3 +1848,51 @@ define <2 x i128> @uabd_i64(<2 x i64> %a, <2 x i64> %b) {
%absel = select <2 x i1> %abcmp, <2 x i128> %ababs, <2 x i128> %ab
diff
ret <2 x i128> %absel
}
+
+define <8 x i16> @pr88784(<8 x i8> %l0, <8 x i8> %l1, <8 x i16> %l2) {
+; CHECK-SD-LABEL: pr88784:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT:usubl.8h v0, v0, v1
+; CHECK-SD-NEXT:cmlt.8h v1, v2, #0
+; CHECK-SD-NEXT:ssra.8h v0, v2, #15
+; CHECK-SD-NEXT:eor.16b v0, v1, v0
+; CHECK-SD-NEXT:ret
+;
+; CHECK-GI-LABEL: pr88784:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT:usubl.8h v0, v0, v1
+; CHECK-GI-NEXT:sshr.8h v1, v2, #15
+; CHECK-GI-NEXT:ssra.8h v0, v2, #15
+; CHECK-GI-NEXT:eor.16b v0, v1, v0
+; CHECK-GI-NEXT:ret
+ %l4 = zext <8 x i8> %l0 to <8 x i16>
+ %l5 = ashr <8 x i16> %l2,
+ %l6 = zext <8 x i8> %l1 to <8 x i16>
+ %l7 = sub <8 x i16> %l4, %l6
+ %l8 = add <8 x i16> %l5, %l7
+ %l9 = xor <8 x i16> %l5, %l8
+ ret <8 x i16> %l9
+}
+
+define <8 x i16> @pr88784_fixed(<8 x i8> %l0, <8 x i8> %l1, <8 x i16> %l2) {
+; CHECK-SD-LABEL: pr88784_fixed:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT:uabdl.8h v0, v0, v1
+; CHECK-SD-NEXT:ret
+;
+; CHECK-GI-LABEL: pr88784_fixed:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT:usubl.8h v0, v0, v1
+; CHECK-GI-NEXT:sshr.8h v1, v0, #15
+; CHECK-GI-NEXT:ssra.8h v0, v0, #15
+; CHECK-GI-NEXT:eor.16b v0, v1, v0
+; CHECK-GI-NEXT:ret
+ %l4 = zext <8 x i8> %l0 to <8 x i16>
+ %l6 = zext <8 x i8> %l1 to <8 x i16>
+ %l7 = sub <8 x i16> %l4, %l6
+ %l5 = ashr <8 x i16> %l7,
+ %l8 = add <8 x i16> %l5, %l7
+ %l9 = xor <8 x i16> %l5, %l8
+ ret <8 x i16> %l9
+}
+
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[llvm-branch-commits] [llvm] release/18.x: [AArch64] Remove invalid uabdl patterns. (#89272) (PR #89380)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/89380 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [AArch64] Remove invalid uabdl patterns. (#89272) (PR #89380)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/89380
>From a96b04442c9fc29cd884b56bf07af8615191176f Mon Sep 17 00:00:00 2001
From: David Green
Date: Fri, 19 Apr 2024 09:30:13 +0100
Subject: [PATCH] [AArch64] Remove invalid uabdl patterns. (#89272)
These were added in https://reviews.llvm.org/D14208, which look like
they attempt to detect abs from xor+add+ashr. They do not appear to be
detecting the correct value for the src input though, which I think is
intended to be the sub(zext, zext) part of the pattern. We have pattens
from abs now, so the old invalid patterns can be removed.
Fixes #88784
(cherry picked from commit 851462fcaa7f6e3301865de84f98be7e872e64b6)
---
llvm/lib/Target/AArch64/AArch64InstrInfo.td | 10 -
llvm/test/CodeGen/AArch64/arm64-vabs.ll | 48 +
2 files changed, 48 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index 03baa7497615e3..ac61dd8745d4e6 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -4885,19 +4885,9 @@ defm UABDL : SIMDLongThreeVectorBHSabdl<1, 0b0111,
"uabdl",
def : Pat<(abs (v8i16 (sub (zext (v8i8 V64:$opA)),
(zext (v8i8 V64:$opB),
(UABDLv8i8_v8i16 V64:$opA, V64:$opB)>;
-def : Pat<(xor (v8i16 (AArch64vashr v8i16:$src, (i32 15))),
- (v8i16 (add (sub (zext (v8i8 V64:$opA)),
-(zext (v8i8 V64:$opB))),
- (AArch64vashr v8i16:$src, (i32 15),
- (UABDLv8i8_v8i16 V64:$opA, V64:$opB)>;
def : Pat<(abs (v8i16 (sub (zext (extract_high_v16i8 (v16i8 V128:$opA))),
(zext (extract_high_v16i8 (v16i8 V128:$opB)),
(UABDLv16i8_v8i16 V128:$opA, V128:$opB)>;
-def : Pat<(xor (v8i16 (AArch64vashr v8i16:$src, (i32 15))),
- (v8i16 (add (sub (zext (extract_high_v16i8 (v16i8 V128:$opA))),
-(zext (extract_high_v16i8 (v16i8 V128:$opB,
- (AArch64vashr v8i16:$src, (i32 15),
- (UABDLv16i8_v8i16 V128:$opA, V128:$opB)>;
def : Pat<(abs (v4i32 (sub (zext (v4i16 V64:$opA)),
(zext (v4i16 V64:$opB),
(UABDLv4i16_v4i32 V64:$opA, V64:$opB)>;
diff --git a/llvm/test/CodeGen/AArch64/arm64-vabs.ll
b/llvm/test/CodeGen/AArch64/arm64-vabs.ll
index fe4da2e7cf36b5..89c8d540b97e04 100644
--- a/llvm/test/CodeGen/AArch64/arm64-vabs.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-vabs.ll
@@ -1848,3 +1848,51 @@ define <2 x i128> @uabd_i64(<2 x i64> %a, <2 x i64> %b) {
%absel = select <2 x i1> %abcmp, <2 x i128> %ababs, <2 x i128> %abdiff
ret <2 x i128> %absel
}
+
+define <8 x i16> @pr88784(<8 x i8> %l0, <8 x i8> %l1, <8 x i16> %l2) {
+; CHECK-SD-LABEL: pr88784:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT:usubl.8h v0, v0, v1
+; CHECK-SD-NEXT:cmlt.8h v1, v2, #0
+; CHECK-SD-NEXT:ssra.8h v0, v2, #15
+; CHECK-SD-NEXT:eor.16b v0, v1, v0
+; CHECK-SD-NEXT:ret
+;
+; CHECK-GI-LABEL: pr88784:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT:usubl.8h v0, v0, v1
+; CHECK-GI-NEXT:sshr.8h v1, v2, #15
+; CHECK-GI-NEXT:ssra.8h v0, v2, #15
+; CHECK-GI-NEXT:eor.16b v0, v1, v0
+; CHECK-GI-NEXT:ret
+ %l4 = zext <8 x i8> %l0 to <8 x i16>
+ %l5 = ashr <8 x i16> %l2,
+ %l6 = zext <8 x i8> %l1 to <8 x i16>
+ %l7 = sub <8 x i16> %l4, %l6
+ %l8 = add <8 x i16> %l5, %l7
+ %l9 = xor <8 x i16> %l5, %l8
+ ret <8 x i16> %l9
+}
+
+define <8 x i16> @pr88784_fixed(<8 x i8> %l0, <8 x i8> %l1, <8 x i16> %l2) {
+; CHECK-SD-LABEL: pr88784_fixed:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT:uabdl.8h v0, v0, v1
+; CHECK-SD-NEXT:ret
+;
+; CHECK-GI-LABEL: pr88784_fixed:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT:usubl.8h v0, v0, v1
+; CHECK-GI-NEXT:sshr.8h v1, v0, #15
+; CHECK-GI-NEXT:ssra.8h v0, v0, #15
+; CHECK-GI-NEXT:eor.16b v0, v1, v0
+; CHECK-GI-NEXT:ret
+ %l4 = zext <8 x i8> %l0 to <8 x i16>
+ %l6 = zext <8 x i8> %l1 to <8 x i16>
+ %l7 = sub <8 x i16> %l4, %l6
+ %l5 = ashr <8 x i16> %l7,
+ %l8 = add <8 x i16> %l5, %l7
+ %l9 = xor <8 x i16> %l5, %l8
+ ret <8 x i16> %l9
+}
+
___
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[llvm-branch-commits] [llvm] release/18.x: [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659) (PR #90682)
llvmbot wrote:
@llvm/pr-subscribers-backend-risc-v
Author: None (llvmbot)
Changes
Backport 2647bd73696ae987addd0e74774a44108accb1e6
Requested by: @dtcxzyw
---
Full diff: https://github.com/llvm/llvm-project/pull/90682.diff
2 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+1-1)
- (added) llvm/test/CodeGen/RISCV/pr90652.ll (+19)
``diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index a0cec426002b6f..d46093b9e260a2 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -14559,7 +14559,7 @@ static SDValue tryFoldSelectIntoOp(SDNode *N,
SelectionDAG ,
EVT VT = N->getValueType(0);
SDLoc DL(N);
SDValue OtherOp = TrueVal.getOperand(1 - OpToFold);
- EVT OtherOpVT = OtherOp->getValueType(0);
+ EVT OtherOpVT = OtherOp.getValueType();
SDValue IdentityOperand =
DAG.getNeutralElement(Opc, DL, OtherOpVT, N->getFlags());
if (!Commutative)
diff --git a/llvm/test/CodeGen/RISCV/pr90652.ll
b/llvm/test/CodeGen/RISCV/pr90652.ll
new file mode 100644
index 00..2162395b92ac3c
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/pr90652.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=riscv64 | FileCheck %s
+
+define i1 @test(i64 %x, i1 %cond1, i1 %cond2) {
+; CHECK-LABEL: test:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT:addi a3, a0, 1
+; CHECK-NEXT:slt a0, a3, a0
+; CHECK-NEXT:not a1, a1
+; CHECK-NEXT:and a0, a1, a0
+; CHECK-NEXT:or a0, a2, a0
+; CHECK-NEXT:ret
+entry:
+ %sadd = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %x, i64 1)
+ %ov = extractvalue { i64, i1 } %sadd, 1
+ %or = or i1 %cond2, %ov
+ %sel = select i1 %cond1, i1 %cond2, i1 %or
+ ret i1 %sel
+}
``
https://github.com/llvm/llvm-project/pull/90682
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[llvm-branch-commits] [llvm] release/18.x: [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659) (PR #90682)
llvmbot wrote: @topperc What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/90682 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659) (PR #90682)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/90682
Backport 2647bd73696ae987addd0e74774a44108accb1e6
Requested by: @dtcxzyw
>From 13d1367dd801240a55c921c812369826f503f67a Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Wed, 1 May 2024 06:51:36 +0800
Subject: [PATCH] [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659)
```
SelectionDAG has 17 nodes:
t0: ch,glue = EntryToken
t6: i64,ch = CopyFromReg t0, Register:i64 %2
t8: i1 = truncate t6
t4: i64,ch = CopyFromReg t0, Register:i64 %1
t7: i1 = truncate t4
t2: i64,ch = CopyFromReg t0, Register:i64 %0
t10: i64,i1 = saddo t2, Constant:i64<1>
t11: i1 = or t8, t10:1
t12: i1 = select t7, t8, t11
t13: i64 = any_extend t12
t15: ch,glue = CopyToReg t0, Register:i64 $x10, t13
t16: ch = RISCVISD::RET_GLUE t15, Register:i64 $x10, t15:1
```
`OtherOpVT` should be i1, but `OtherOp->getValueType(0)` returns `i64`,
which ignores `ResNo` in `SDValue`.
Fix https://github.com/llvm/llvm-project/issues/90652.
(cherry picked from commit 2647bd73696ae987addd0e74774a44108accb1e6)
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 2 +-
llvm/test/CodeGen/RISCV/pr90652.ll | 19 +++
2 files changed, 20 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/CodeGen/RISCV/pr90652.ll
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index a0cec426002b6f..d46093b9e260a2 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -14559,7 +14559,7 @@ static SDValue tryFoldSelectIntoOp(SDNode *N,
SelectionDAG ,
EVT VT = N->getValueType(0);
SDLoc DL(N);
SDValue OtherOp = TrueVal.getOperand(1 - OpToFold);
- EVT OtherOpVT = OtherOp->getValueType(0);
+ EVT OtherOpVT = OtherOp.getValueType();
SDValue IdentityOperand =
DAG.getNeutralElement(Opc, DL, OtherOpVT, N->getFlags());
if (!Commutative)
diff --git a/llvm/test/CodeGen/RISCV/pr90652.ll
b/llvm/test/CodeGen/RISCV/pr90652.ll
new file mode 100644
index 00..2162395b92ac3c
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/pr90652.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=riscv64 | FileCheck %s
+
+define i1 @test(i64 %x, i1 %cond1, i1 %cond2) {
+; CHECK-LABEL: test:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT:addi a3, a0, 1
+; CHECK-NEXT:slt a0, a3, a0
+; CHECK-NEXT:not a1, a1
+; CHECK-NEXT:and a0, a1, a0
+; CHECK-NEXT:or a0, a2, a0
+; CHECK-NEXT:ret
+entry:
+ %sadd = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %x, i64 1)
+ %ov = extractvalue { i64, i1 } %sadd, 1
+ %or = or i1 %cond2, %ov
+ %sel = select i1 %cond1, i1 %cond2, i1 %or
+ ret i1 %sel
+}
___
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[llvm-branch-commits] [llvm] release/18.x: [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659) (PR #90682)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/90682 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Fix store merging incorrectly classifying an unknown index expr as 0. (#90375) (PR #90673)
https://github.com/aemerson approved this pull request. https://github.com/llvm/llvm-project/pull/90673 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Fix store merging incorrectly classifying an unknown index expr as 0. (#90375) (PR #90673)
llvmbot wrote:
@llvm/pr-subscribers-backend-aarch64
@llvm/pr-subscribers-llvm-globalisel
Author: None (llvmbot)
Changes
Backport 19f4d68252b70c81ebb1686a5a31069eda5373de
Requested by: @aemerson
---
Full diff: https://github.com/llvm/llvm-project/pull/90673.diff
4 Files Affected:
- (modified) llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h (+16-4)
- (modified) llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp (+28-20)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/store-merging.ll (+19)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/store-merging.mir (+52-10)
``diff
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
index 0f20a33f3a755c..7990997835d019 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
@@ -35,11 +35,23 @@ struct LegalityQuery;
class MachineRegisterInfo;
namespace GISelAddressing {
/// Helper struct to store a base, index and offset that forms an address
-struct BaseIndexOffset {
+class BaseIndexOffset {
+private:
Register BaseReg;
Register IndexReg;
- int64_t Offset = 0;
- bool IsIndexSignExt = false;
+ std::optional Offset;
+
+public:
+ BaseIndexOffset() = default;
+ Register getBase() { return BaseReg; }
+ Register getBase() const { return BaseReg; }
+ Register getIndex() { return IndexReg; }
+ Register getIndex() const { return IndexReg; }
+ void setBase(Register NewBase) { BaseReg = NewBase; }
+ void setIndex(Register NewIndex) { IndexReg = NewIndex; }
+ void setOffset(std::optional NewOff) { Offset = NewOff; }
+ bool hasValidOffset() const { return Offset.has_value(); }
+ int64_t getOffset() const { return *Offset; }
};
/// Returns a BaseIndexOffset which describes the pointer in \p Ptr.
@@ -89,7 +101,7 @@ class LoadStoreOpt : public MachineFunctionPass {
// order stores are writing to incremeneting consecutive addresses. So when
// we walk the block in reverse order, the next eligible store must write
to
// an offset one store width lower than CurrentLowestOffset.
-uint64_t CurrentLowestOffset;
+int64_t CurrentLowestOffset;
SmallVector Stores;
// A vector of MachineInstr/unsigned pairs to denote potential aliases that
// need to be checked before the candidate is considered safe to merge. The
diff --git a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
index 246aa88b09acf6..ee499c41c558c3 100644
--- a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
@@ -84,21 +84,20 @@ BaseIndexOffset GISelAddressing::getPointerInfo(Register
Ptr,
MachineRegisterInfo ) {
BaseIndexOffset Info;
Register PtrAddRHS;
- if (!mi_match(Ptr, MRI, m_GPtrAdd(m_Reg(Info.BaseReg), m_Reg(PtrAddRHS {
-Info.BaseReg = Ptr;
-Info.IndexReg = Register();
-Info.IsIndexSignExt = false;
+ Register BaseReg;
+ if (!mi_match(Ptr, MRI, m_GPtrAdd(m_Reg(BaseReg), m_Reg(PtrAddRHS {
+Info.setBase(Ptr);
+Info.setOffset(0);
return Info;
}
-
+ Info.setBase(BaseReg);
auto RHSCst = getIConstantVRegValWithLookThrough(PtrAddRHS, MRI);
if (RHSCst)
-Info.Offset = RHSCst->Value.getSExtValue();
+Info.setOffset(RHSCst->Value.getSExtValue());
// Just recognize a simple case for now. In future we'll need to match
// indexing patterns for base + index + constant.
- Info.IndexReg = PtrAddRHS;
- Info.IsIndexSignExt = false;
+ Info.setIndex(PtrAddRHS);
return Info;
}
@@ -114,15 +113,16 @@ bool GISelAddressing::aliasIsKnownForLoadStore(const
MachineInstr ,
BaseIndexOffset BasePtr0 = getPointerInfo(LdSt1->getPointerReg(), MRI);
BaseIndexOffset BasePtr1 = getPointerInfo(LdSt2->getPointerReg(), MRI);
- if (!BasePtr0.BaseReg.isValid() || !BasePtr1.BaseReg.isValid())
+ if (!BasePtr0.getBase().isValid() || !BasePtr1.getBase().isValid())
return false;
int64_t Size1 = LdSt1->getMemSize();
int64_t Size2 = LdSt2->getMemSize();
int64_t PtrDiff;
- if (BasePtr0.BaseReg == BasePtr1.BaseReg) {
-PtrDiff = BasePtr1.Offset - BasePtr0.Offset;
+ if (BasePtr0.getBase() == BasePtr1.getBase() && BasePtr0.hasValidOffset() &&
+ BasePtr1.hasValidOffset()) {
+PtrDiff = BasePtr1.getOffset() - BasePtr0.getOffset();
// If the size of memory access is unknown, do not use it to do analysis.
// One example of unknown size memory access is to load/store scalable
// vector objects on the stack.
@@ -151,8 +151,8 @@ bool GISelAddressing::aliasIsKnownForLoadStore(const
MachineInstr ,
// able to calculate their relative offset if at least one arises
// from an alloca. However, these allocas cannot overlap and we
// can infer there is no alias.
- auto *Base0Def = getDefIgnoringCopies(BasePtr0.BaseReg, MRI);
- auto *Base1Def = getDefIgnoringCopies(BasePtr1.BaseReg, MRI);
[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Fix store merging incorrectly classifying an unknown index expr as 0. (#90375) (PR #90673)
llvmbot wrote: @aemerson What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/90673 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Fix store merging incorrectly classifying an unknown index expr as 0. (#90375) (PR #90673)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/90673
Backport 19f4d68252b70c81ebb1686a5a31069eda5373de
Requested by: @aemerson
>From 740c8ec340a1ca74e93b5964bd3a0e5aeb0a4910 Mon Sep 17 00:00:00 2001
From: Amara Emerson
Date: Wed, 1 May 2024 05:42:14 +0800
Subject: [PATCH] [GlobalISel] Fix store merging incorrectly classifying an
unknown index expr as 0. (#90375)
During analysis, we incorrectly leave the offset part of an address info
struct
as zero, when in actual fact we failed to decompose it into base +
offset.
This results in incorrectly assuming that the address is adjacent to
another store
addr. To fix this we wrap the offset in an optional<> so we can
distinguish between
real zero and unknown.
Fixes issue #90242
(cherry picked from commit 19f4d68252b70c81ebb1686a5a31069eda5373de)
---
.../llvm/CodeGen/GlobalISel/LoadStoreOpt.h| 20 --
llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp | 48 --
.../AArch64/GlobalISel/store-merging.ll | 19 ++
.../AArch64/GlobalISel/store-merging.mir | 62 ---
4 files changed, 115 insertions(+), 34 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
index 0f20a33f3a755c..7990997835d019 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
@@ -35,11 +35,23 @@ struct LegalityQuery;
class MachineRegisterInfo;
namespace GISelAddressing {
/// Helper struct to store a base, index and offset that forms an address
-struct BaseIndexOffset {
+class BaseIndexOffset {
+private:
Register BaseReg;
Register IndexReg;
- int64_t Offset = 0;
- bool IsIndexSignExt = false;
+ std::optional Offset;
+
+public:
+ BaseIndexOffset() = default;
+ Register getBase() { return BaseReg; }
+ Register getBase() const { return BaseReg; }
+ Register getIndex() { return IndexReg; }
+ Register getIndex() const { return IndexReg; }
+ void setBase(Register NewBase) { BaseReg = NewBase; }
+ void setIndex(Register NewIndex) { IndexReg = NewIndex; }
+ void setOffset(std::optional NewOff) { Offset = NewOff; }
+ bool hasValidOffset() const { return Offset.has_value(); }
+ int64_t getOffset() const { return *Offset; }
};
/// Returns a BaseIndexOffset which describes the pointer in \p Ptr.
@@ -89,7 +101,7 @@ class LoadStoreOpt : public MachineFunctionPass {
// order stores are writing to incremeneting consecutive addresses. So when
// we walk the block in reverse order, the next eligible store must write
to
// an offset one store width lower than CurrentLowestOffset.
-uint64_t CurrentLowestOffset;
+int64_t CurrentLowestOffset;
SmallVector Stores;
// A vector of MachineInstr/unsigned pairs to denote potential aliases that
// need to be checked before the candidate is considered safe to merge. The
diff --git a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
index 246aa88b09acf6..ee499c41c558c3 100644
--- a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
@@ -84,21 +84,20 @@ BaseIndexOffset GISelAddressing::getPointerInfo(Register
Ptr,
MachineRegisterInfo ) {
BaseIndexOffset Info;
Register PtrAddRHS;
- if (!mi_match(Ptr, MRI, m_GPtrAdd(m_Reg(Info.BaseReg), m_Reg(PtrAddRHS {
-Info.BaseReg = Ptr;
-Info.IndexReg = Register();
-Info.IsIndexSignExt = false;
+ Register BaseReg;
+ if (!mi_match(Ptr, MRI, m_GPtrAdd(m_Reg(BaseReg), m_Reg(PtrAddRHS {
+Info.setBase(Ptr);
+Info.setOffset(0);
return Info;
}
-
+ Info.setBase(BaseReg);
auto RHSCst = getIConstantVRegValWithLookThrough(PtrAddRHS, MRI);
if (RHSCst)
-Info.Offset = RHSCst->Value.getSExtValue();
+Info.setOffset(RHSCst->Value.getSExtValue());
// Just recognize a simple case for now. In future we'll need to match
// indexing patterns for base + index + constant.
- Info.IndexReg = PtrAddRHS;
- Info.IsIndexSignExt = false;
+ Info.setIndex(PtrAddRHS);
return Info;
}
@@ -114,15 +113,16 @@ bool GISelAddressing::aliasIsKnownForLoadStore(const
MachineInstr ,
BaseIndexOffset BasePtr0 = getPointerInfo(LdSt1->getPointerReg(), MRI);
BaseIndexOffset BasePtr1 = getPointerInfo(LdSt2->getPointerReg(), MRI);
- if (!BasePtr0.BaseReg.isValid() || !BasePtr1.BaseReg.isValid())
+ if (!BasePtr0.getBase().isValid() || !BasePtr1.getBase().isValid())
return false;
int64_t Size1 = LdSt1->getMemSize();
int64_t Size2 = LdSt2->getMemSize();
int64_t PtrDiff;
- if (BasePtr0.BaseReg == BasePtr1.BaseReg) {
-PtrDiff = BasePtr1.Offset - BasePtr0.Offset;
+ if (BasePtr0.getBase() == BasePtr1.getBase() && BasePtr0.hasValidOffset() &&
+ BasePtr1.hasValidOffset()) {
+PtrDiff = BasePtr1.getOffset() - BasePtr0.getOffset();
// If the size of memory
[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Fix store merging incorrectly classifying an unknown index expr as 0. (#90375) (PR #90673)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/90673 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm][NFC] Document cl::opt variable and fix typo (PR #90670)
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Paul Kirth (ilovepi)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/90670.diff
1 Files Affected:
- (modified) llvm/lib/Transforms/Utils/MisExpect.cpp (+2-1)
``diff
diff --git a/llvm/lib/Transforms/Utils/MisExpect.cpp
b/llvm/lib/Transforms/Utils/MisExpect.cpp
index 9cb7c54e0c8c97..59e13795f0f247 100644
--- a/llvm/lib/Transforms/Utils/MisExpect.cpp
+++ b/llvm/lib/Transforms/Utils/MisExpect.cpp
@@ -59,9 +59,10 @@ static cl::opt PGOWarnMisExpect(
cl::desc("Use this option to turn on/off "
"warnings about incorrect usage of llvm.expect intrinsics."));
+// Command line option for setting the diagnostic tolerance threshold
static cl::opt MisExpectTolerance(
"misexpect-tolerance", cl::init(0),
-cl::desc("Prevents emiting diagnostics when profile counts are "
+cl::desc("Prevents emitting diagnostics when profile counts are "
"within N% of the threshold.."));
} // namespace llvm
``
https://github.com/llvm/llvm-project/pull/90670
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[llvm-branch-commits] [llvm][NFC] Document cl::opt variable and fix typo (PR #90670)
https://github.com/ilovepi created https://github.com/llvm/llvm-project/pull/90670 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/90146 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)
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[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/86610 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/86610 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm][IR] Extend BranchWeightMetadata to track provenance of weights (PR #86609)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/86609 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm][IR] Extend BranchWeightMetadata to track provenance of weights (PR #86609)
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/86609 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [release/18.x][COFF][Aarch64] Add _InterlockedAdd64 intrinsic (#81849) (PR #89951)
https://github.com/dpaoliello closed https://github.com/llvm/llvm-project/pull/89951 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [release/18.x][COFF][Aarch64] Add _InterlockedAdd64 intrinsic (#81849) (PR #89951)
dpaoliello wrote: Closing this since it would be an ABI break https://github.com/llvm/llvm-project/pull/89951 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [release/18.x][COFF][Aarch64] Add _InterlockedAdd64 intrinsic (#81849) (PR #89951)
tstellar wrote: > > I think BuiltinsAArch64.def is part of clang's ABI, so changing it violates > > the backport rules. > > Otherwise, I'd be inclined to accept; it's kind of late to request, but > > it's low risk. > > @tstellar can you please advise if this change is ok to backport? @efriedma-quic Is right, changing the builtin list changes the enum values which breaks the ABI. https://github.com/llvm/llvm-project/pull/89951 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] e394f6a - Revert "[GVNSink] Fix incorrect codegen with respect to GEPs #85333 (#88440)"
Author: AdityaK
Date: 2024-04-30T13:05:13-07:00
New Revision: e394f6a20a2ebbc7541f122efd70dfa0b8a95a86
URL:
https://github.com/llvm/llvm-project/commit/e394f6a20a2ebbc7541f122efd70dfa0b8a95a86
DIFF:
https://github.com/llvm/llvm-project/commit/e394f6a20a2ebbc7541f122efd70dfa0b8a95a86.diff
LOG: Revert "[GVNSink] Fix incorrect codegen with respect to GEPs #85333
(#88440)"
This reverts commit 1c979ab7e59feb03c58cac631a93143b0c776c20.
Added:
Modified:
llvm/lib/Transforms/Scalar/GVNSink.cpp
Removed:
llvm/test/Transforms/GVNSink/different-gep-types.ll
diff --git a/llvm/lib/Transforms/Scalar/GVNSink.cpp
b/llvm/lib/Transforms/Scalar/GVNSink.cpp
index 1d2577e1da3375..d4907326eb0a5a 100644
--- a/llvm/lib/Transforms/Scalar/GVNSink.cpp
+++ b/llvm/lib/Transforms/Scalar/GVNSink.cpp
@@ -719,11 +719,12 @@
GVNSink::analyzeInstructionForSinking(LockstepReverseIterator ,
// try and continue making progress.
Instruction *I0 = NewInsts[0];
- auto isNotSameOperation = [](Instruction *I) {
-return !I0->isSameOperationAs(I);
+ // If all instructions that are going to participate don't have the same
+ // number of operands, we can't do any useful PHI analysis for all operands.
+ auto hasDifferentNumOperands = [](Instruction *I) {
+return I->getNumOperands() != I0->getNumOperands();
};
-
- if (any_of(NewInsts, isNotSameOperation))
+ if (any_of(NewInsts, hasDifferentNumOperands))
return std::nullopt;
for (unsigned OpNum = 0, E = I0->getNumOperands(); OpNum != E; ++OpNum) {
diff --git a/llvm/test/Transforms/GVNSink/
diff erent-gep-types.ll b/llvm/test/Transforms/GVNSink/
diff erent-gep-types.ll
deleted file mode 100644
index 77cdc8a94f97c2..00
--- a/llvm/test/Transforms/GVNSink/
diff erent-gep-types.ll
+++ /dev/null
@@ -1,101 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 4
-; RUN: opt -passes=gvn-sink -S %s | FileCheck %s
-
-target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
-
-%"struct.std::pair" = type <{ i32, %struct.substruct, [2 x i8] }>
-%struct.substruct = type { i8, i8 }
-%"struct.std::random_access_iterator_tag" = type { i8 }
-
-; Check that gep is not sunk as they are of
diff erent types.
-define void @bar(ptr noundef nonnull align 4 dereferenceable(4) %__i, i32
noundef %__n) {
-; CHECK-LABEL: define void @bar(
-; CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[__I:%.*]], i32
noundef [[__N:%.*]]) {
-; CHECK-NEXT: entry:
-; CHECK-NEXT:[[CMP:%.*]] = icmp eq i32 [[__N]], 1
-; CHECK-NEXT:br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
-; CHECK: if.then:
-; CHECK-NEXT:[[TMP0:%.*]] = load ptr, ptr [[__I]], align 4
-; CHECK-NEXT:[[INCDEC_PTR4:%.*]] = getelementptr inbounds i8, ptr
[[TMP0]], i32 -8
-; CHECK-NEXT:br label [[IF_END6:%.*]]
-; CHECK: if.else:
-; CHECK-NEXT:[[TMP1:%.*]] = load ptr, ptr [[__I]], align 4
-; CHECK-NEXT:[[ADD_PTR:%.*]] = getelementptr inbounds %"struct.std::pair",
ptr [[TMP1]], i32 [[__N]]
-; CHECK-NEXT:br label [[IF_END6]]
-; CHECK: if.end6:
-; CHECK-NEXT:[[INCDEC_PTR_SINK:%.*]] = phi ptr [ [[INCDEC_PTR4]],
[[IF_THEN]] ], [ [[ADD_PTR]], [[IF_ELSE]] ]
-; CHECK-NEXT:store ptr [[INCDEC_PTR_SINK]], ptr [[__I]], align 4
-; CHECK-NEXT:ret void
-;
-entry:
- %cmp = icmp eq i32 %__n, 1
- br i1 %cmp, label %if.then, label %if.else
-
-if.then:
- %3 = load ptr, ptr %__i, align 4
- %incdec.ptr4 = getelementptr inbounds i8, ptr %3, i32 -8
- br label %if.end6
-
-if.else:
- %4 = load ptr, ptr %__i, align 4
- %add.ptr = getelementptr inbounds %"struct.std::pair", ptr %4, i32 %__n
- br label %if.end6
-
-if.end6:
- %incdec.ptr.sink = phi ptr [ %incdec.ptr4, %if.then ], [ %add.ptr, %if.else ]
- store ptr %incdec.ptr.sink, ptr %__i, align 4
- ret void
-}
-
-; Check that load,gep, and store are all sunk as they are safe to do.
-define void @foo(ptr noundef nonnull align 4 dereferenceable(4) %__i, i32
noundef %__n) {
-; CHECK-LABEL: define void @foo(
-; CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[__I:%.*]], i32
noundef [[__N:%.*]]) {
-; CHECK-NEXT: entry:
-; CHECK-NEXT:[[CMP:%.*]] = icmp eq i32 [[__N]], 1
-; CHECK-NEXT:br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
-; CHECK: if.then:
-; CHECK-NEXT:br label [[IF_END6:%.*]]
-; CHECK: if.else:
-; CHECK-NEXT:[[CMP2:%.*]] = icmp eq i32 [[__N]], -1
-; CHECK-NEXT:br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE5:%.*]]
-; CHECK: if.then3:
-; CHECK-NEXT:br label [[IF_END6]]
-; CHECK: if.else5:
-; CHECK-NEXT:br label [[IF_END6]]
-; CHECK: if.end6:
-; CHECK-NEXT:[[DOTSINK1:%.*]] = phi i32 [ 8, [[IF_THEN]] ], [ -8,
[[IF_THEN3]] ], [ -4, [[IF_ELSE5]] ]
-; CHECK-NEXT:[[TMP0:%.*]] = load ptr, ptr [[__I]], align 4
-; CHECK-NEXT:
[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
efriedma-quic wrote: Proposing for backport because this is high-impact for anyone using Qt on Arm64 Windows. https://github.com/llvm/llvm-project/pull/90639 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: [clang][CoverageMapping] do not emit a gap region when either end doesn't have valid source locations (#89564) (PR #90369)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/90369 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] aea091b - [clang][CoverageMapping] do not emit a gap region when either end doesn't have valid source locations (#89564)
Author: Wentao Zhang
Date: 2024-04-30T11:10:27-07:00
New Revision: aea091b70edaf5b53bdd37f5ee6351c1642b07cc
URL:
https://github.com/llvm/llvm-project/commit/aea091b70edaf5b53bdd37f5ee6351c1642b07cc
DIFF:
https://github.com/llvm/llvm-project/commit/aea091b70edaf5b53bdd37f5ee6351c1642b07cc.diff
LOG: [clang][CoverageMapping] do not emit a gap region when either end doesn't
have valid source locations (#89564)
Fixes #86998
(cherry picked from commit c1b6cca1214e7a9c14a30b81585dd8b81baeaa77)
Added:
clang/test/CoverageMapping/statement-expression.c
Modified:
clang/lib/CodeGen/CoverageMappingGen.cpp
Removed:
diff --git a/clang/lib/CodeGen/CoverageMappingGen.cpp
b/clang/lib/CodeGen/CoverageMappingGen.cpp
index 0c43317642bca4..ae4e6d4c88c02d 100644
--- a/clang/lib/CodeGen/CoverageMappingGen.cpp
+++ b/clang/lib/CodeGen/CoverageMappingGen.cpp
@@ -1207,6 +1207,12 @@ struct CounterCoverageMappingBuilder
/// Find a valid gap range between \p AfterLoc and \p BeforeLoc.
std::optional findGapAreaBetween(SourceLocation AfterLoc,
SourceLocation BeforeLoc) {
+// Some statements (like AttributedStmt and ImplicitValueInitExpr) don't
+// have valid source locations. Do not emit a gap region if this is the
case
+// in either AfterLoc end or BeforeLoc end.
+if (AfterLoc.isInvalid() || BeforeLoc.isInvalid())
+ return std::nullopt;
+
// If AfterLoc is in function-like macro, use the right parenthesis
// location.
if (AfterLoc.isMacroID()) {
@@ -1370,9 +1376,8 @@ struct CounterCoverageMappingBuilder
for (const Stmt *Child : S->children())
if (Child) {
// If last statement contains terminate statements, add a gap area
-// between the two statements. Skipping attributed statements, because
-// they don't have valid start location.
-if (LastStmt && HasTerminateStmt && !isa(Child)) {
+// between the two statements.
+if (LastStmt && HasTerminateStmt) {
auto Gap = findGapAreaBetween(getEnd(LastStmt), getStart(Child));
if (Gap)
fillGapAreaWithCount(Gap->getBegin(), Gap->getEnd(),
diff --git a/clang/test/CoverageMapping/statement-expression.c
b/clang/test/CoverageMapping/statement-expression.c
new file mode 100644
index 00..5f9ab5838af342
--- /dev/null
+++ b/clang/test/CoverageMapping/statement-expression.c
@@ -0,0 +1,36 @@
+// RUN: %clang_cc1 -mllvm -emptyline-comment-coverage=false
-fprofile-instrument=clang -fcoverage-mapping -dump-coverage-mapping
-emit-llvm-only -main-file-name statement-expression.c %s
+
+// No crash for the following examples, where GNU Statement Expression
extension
+// could introduce region terminators (break, goto etc) before implicit
+// initializers in a struct or an array.
+// See https://github.com/llvm/llvm-project/pull/89564
+
+struct Foo {
+ int field1;
+ int field2;
+};
+
+void f1(void) {
+ struct Foo foo = {
+.field1 = ({
+ switch (0) {
+ case 0:
+break; // A region terminator
+ }
+ 0;
+}),
+// ImplicitValueInitExpr introduced here for .field2
+ };
+}
+
+void f2(void) {
+ int arr[3] = {
+[0] = ({
+goto L0; // A region terminator
+L0:
+ 0;
+}),
+// ImplicitValueInitExpr introduced here for subscript [1]
+[2] = 0,
+ };
+}
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[llvm-branch-commits] [clang] release/18.x: [clang][CoverageMapping] do not emit a gap region when either end doesn't have valid source locations (#89564) (PR #90369)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/90369
>From aea091b70edaf5b53bdd37f5ee6351c1642b07cc Mon Sep 17 00:00:00 2001
From: Wentao Zhang <35722712+whentoj...@users.noreply.github.com>
Date: Mon, 22 Apr 2024 12:37:38 -0500
Subject: [PATCH] [clang][CoverageMapping] do not emit a gap region when either
end doesn't have valid source locations (#89564)
Fixes #86998
(cherry picked from commit c1b6cca1214e7a9c14a30b81585dd8b81baeaa77)
---
clang/lib/CodeGen/CoverageMappingGen.cpp | 11 --
.../CoverageMapping/statement-expression.c| 36 +++
2 files changed, 44 insertions(+), 3 deletions(-)
create mode 100644 clang/test/CoverageMapping/statement-expression.c
diff --git a/clang/lib/CodeGen/CoverageMappingGen.cpp
b/clang/lib/CodeGen/CoverageMappingGen.cpp
index 0c43317642bca4..ae4e6d4c88c02d 100644
--- a/clang/lib/CodeGen/CoverageMappingGen.cpp
+++ b/clang/lib/CodeGen/CoverageMappingGen.cpp
@@ -1207,6 +1207,12 @@ struct CounterCoverageMappingBuilder
/// Find a valid gap range between \p AfterLoc and \p BeforeLoc.
std::optional findGapAreaBetween(SourceLocation AfterLoc,
SourceLocation BeforeLoc) {
+// Some statements (like AttributedStmt and ImplicitValueInitExpr) don't
+// have valid source locations. Do not emit a gap region if this is the
case
+// in either AfterLoc end or BeforeLoc end.
+if (AfterLoc.isInvalid() || BeforeLoc.isInvalid())
+ return std::nullopt;
+
// If AfterLoc is in function-like macro, use the right parenthesis
// location.
if (AfterLoc.isMacroID()) {
@@ -1370,9 +1376,8 @@ struct CounterCoverageMappingBuilder
for (const Stmt *Child : S->children())
if (Child) {
// If last statement contains terminate statements, add a gap area
-// between the two statements. Skipping attributed statements, because
-// they don't have valid start location.
-if (LastStmt && HasTerminateStmt && !isa(Child)) {
+// between the two statements.
+if (LastStmt && HasTerminateStmt) {
auto Gap = findGapAreaBetween(getEnd(LastStmt), getStart(Child));
if (Gap)
fillGapAreaWithCount(Gap->getBegin(), Gap->getEnd(),
diff --git a/clang/test/CoverageMapping/statement-expression.c
b/clang/test/CoverageMapping/statement-expression.c
new file mode 100644
index 00..5f9ab5838af342
--- /dev/null
+++ b/clang/test/CoverageMapping/statement-expression.c
@@ -0,0 +1,36 @@
+// RUN: %clang_cc1 -mllvm -emptyline-comment-coverage=false
-fprofile-instrument=clang -fcoverage-mapping -dump-coverage-mapping
-emit-llvm-only -main-file-name statement-expression.c %s
+
+// No crash for the following examples, where GNU Statement Expression
extension
+// could introduce region terminators (break, goto etc) before implicit
+// initializers in a struct or an array.
+// See https://github.com/llvm/llvm-project/pull/89564
+
+struct Foo {
+ int field1;
+ int field2;
+};
+
+void f1(void) {
+ struct Foo foo = {
+.field1 = ({
+ switch (0) {
+ case 0:
+break; // A region terminator
+ }
+ 0;
+}),
+// ImplicitValueInitExpr introduced here for .field2
+ };
+}
+
+void f2(void) {
+ int arr[3] = {
+[0] = ({
+goto L0; // A region terminator
+L0:
+ 0;
+}),
+// ImplicitValueInitExpr introduced here for subscript [1]
+[2] = 0,
+ };
+}
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[llvm-branch-commits] [llvm] release/18.x: [X86][EVEX512] Check hasEVEX512 for canExtendTo512DQ (#90390) (PR #90422)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/90422 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 58648f3 - [X86][EVEX512] Check hasEVEX512 for canExtendTo512DQ (#90390)
Author: Phoebe Wang
Date: 2024-04-30T11:08:02-07:00
New Revision: 58648f334d62c00e22e2200746513126d4448425
URL:
https://github.com/llvm/llvm-project/commit/58648f334d62c00e22e2200746513126d4448425
DIFF:
https://github.com/llvm/llvm-project/commit/58648f334d62c00e22e2200746513126d4448425.diff
LOG: [X86][EVEX512] Check hasEVEX512 for canExtendTo512DQ (#90390)
Fixes #90356
(cherry picked from commit 35b89dda2b9734917824b1457f149192669b314c)
Added:
Modified:
llvm/lib/Target/X86/X86Subtarget.h
llvm/test/CodeGen/X86/avx512bwvl-arith.ll
Removed:
diff --git a/llvm/lib/Target/X86/X86Subtarget.h
b/llvm/lib/Target/X86/X86Subtarget.h
index a458b5f9ec8fbb..4d55a084b730e4 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -244,7 +244,8 @@ class X86Subtarget final : public X86GenSubtargetInfo {
// TODO: Currently we're always allowing widening on CPUs without VLX,
// because for many cases we don't have a better option.
bool canExtendTo512DQ() const {
-return hasAVX512() && (!hasVLX() || getPreferVectorWidth() >= 512);
+return hasAVX512() && hasEVEX512() &&
+ (!hasVLX() || getPreferVectorWidth() >= 512);
}
bool canExtendTo512BW() const {
return hasBWI() && canExtendTo512DQ();
diff --git a/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
b/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
index 4988fc35b10eef..fdc25f44b156a7 100644
--- a/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
+++ b/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl |
FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown
-mattr=+avx512bw,+avx512vl,-evex512 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl |
FileCheck %s --check-prefixes=CHECK,EVEX256
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown
-mattr=+avx512bw,+avx512vl,-evex512 | FileCheck %s
--check-prefixes=CHECK,EVEX512
; 256-bit
@@ -236,3 +236,34 @@ define <8 x i16> @vpmullw128_test(<8 x i16> %i, <8 x i16>
%j) {
ret <8 x i16> %x
}
+define i16 @PR90356(<16 x i1> %a) {
+; EVEX256-LABEL: PR90356:
+; EVEX256: # %bb.0:
+; EVEX256-NEXT:vpsllw $7, %xmm0, %xmm0
+; EVEX256-NEXT:vpmovb2m %xmm0, %k1
+; EVEX256-NEXT:vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
+; EVEX256-NEXT:movb $63, %al
+; EVEX256-NEXT:kmovd %eax, %k1
+; EVEX256-NEXT:vpexpandq %zmm0, %zmm0 {%k1} {z}
+; EVEX256-NEXT:vptestmd %zmm0, %zmm0, %k0
+; EVEX256-NEXT:kmovd %k0, %eax
+; EVEX256-NEXT:# kill: def $ax killed $ax killed $eax
+; EVEX256-NEXT:vzeroupper
+; EVEX256-NEXT:retq
+;
+; EVEX512-LABEL: PR90356:
+; EVEX512: # %bb.0:
+; EVEX512-NEXT:vpsllw $7, %xmm0, %xmm0
+; EVEX512-NEXT:vpmovb2m %xmm0, %k0
+; EVEX512-NEXT:vpmovm2w %k0, %ymm0
+; EVEX512-NEXT:vpxor %xmm1, %xmm1, %xmm1
+; EVEX512-NEXT:vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5],ymm1[6,7]
+; EVEX512-NEXT:vpmovw2m %ymm0, %k0
+; EVEX512-NEXT:kmovd %k0, %eax
+; EVEX512-NEXT:# kill: def $ax killed $ax killed $eax
+; EVEX512-NEXT:vzeroupper
+; EVEX512-NEXT:retq
+ %1 = shufflevector <16 x i1> %a, <16 x i1> zeroinitializer, <16 x i32>
+ %2 = bitcast <16 x i1> %1 to i16
+ ret i16 %2
+}
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[llvm-branch-commits] [llvm] release/18.x: [X86][EVEX512] Check hasEVEX512 for canExtendTo512DQ (#90390) (PR #90422)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/90422
>From 58648f334d62c00e22e2200746513126d4448425 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Mon, 29 Apr 2024 08:40:26 +0800
Subject: [PATCH] [X86][EVEX512] Check hasEVEX512 for canExtendTo512DQ (#90390)
Fixes #90356
(cherry picked from commit 35b89dda2b9734917824b1457f149192669b314c)
---
llvm/lib/Target/X86/X86Subtarget.h| 3 +-
llvm/test/CodeGen/X86/avx512bwvl-arith.ll | 35 +--
2 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/X86/X86Subtarget.h
b/llvm/lib/Target/X86/X86Subtarget.h
index a458b5f9ec8fbb..4d55a084b730e4 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -244,7 +244,8 @@ class X86Subtarget final : public X86GenSubtargetInfo {
// TODO: Currently we're always allowing widening on CPUs without VLX,
// because for many cases we don't have a better option.
bool canExtendTo512DQ() const {
-return hasAVX512() && (!hasVLX() || getPreferVectorWidth() >= 512);
+return hasAVX512() && hasEVEX512() &&
+ (!hasVLX() || getPreferVectorWidth() >= 512);
}
bool canExtendTo512BW() const {
return hasBWI() && canExtendTo512DQ();
diff --git a/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
b/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
index 4988fc35b10eef..fdc25f44b156a7 100644
--- a/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
+++ b/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl |
FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown
-mattr=+avx512bw,+avx512vl,-evex512 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl |
FileCheck %s --check-prefixes=CHECK,EVEX256
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown
-mattr=+avx512bw,+avx512vl,-evex512 | FileCheck %s
--check-prefixes=CHECK,EVEX512
; 256-bit
@@ -236,3 +236,34 @@ define <8 x i16> @vpmullw128_test(<8 x i16> %i, <8 x i16>
%j) {
ret <8 x i16> %x
}
+define i16 @PR90356(<16 x i1> %a) {
+; EVEX256-LABEL: PR90356:
+; EVEX256: # %bb.0:
+; EVEX256-NEXT:vpsllw $7, %xmm0, %xmm0
+; EVEX256-NEXT:vpmovb2m %xmm0, %k1
+; EVEX256-NEXT:vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
+; EVEX256-NEXT:movb $63, %al
+; EVEX256-NEXT:kmovd %eax, %k1
+; EVEX256-NEXT:vpexpandq %zmm0, %zmm0 {%k1} {z}
+; EVEX256-NEXT:vptestmd %zmm0, %zmm0, %k0
+; EVEX256-NEXT:kmovd %k0, %eax
+; EVEX256-NEXT:# kill: def $ax killed $ax killed $eax
+; EVEX256-NEXT:vzeroupper
+; EVEX256-NEXT:retq
+;
+; EVEX512-LABEL: PR90356:
+; EVEX512: # %bb.0:
+; EVEX512-NEXT:vpsllw $7, %xmm0, %xmm0
+; EVEX512-NEXT:vpmovb2m %xmm0, %k0
+; EVEX512-NEXT:vpmovm2w %k0, %ymm0
+; EVEX512-NEXT:vpxor %xmm1, %xmm1, %xmm1
+; EVEX512-NEXT:vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5],ymm1[6,7]
+; EVEX512-NEXT:vpmovw2m %ymm0, %k0
+; EVEX512-NEXT:kmovd %k0, %eax
+; EVEX512-NEXT:# kill: def $ax killed $ax killed $eax
+; EVEX512-NEXT:vzeroupper
+; EVEX512-NEXT:retq
+ %1 = shufflevector <16 x i1> %a, <16 x i1> zeroinitializer, <16 x i32>
+ %2 = bitcast <16 x i1> %1 to i16
+ ret i16 %2
+}
___
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[llvm-branch-commits] [llvm] release/18.x: [CGP] Drop poison-generating flags after hoisting (#90382) (PR #90437)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/90437 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 6350acd - [CGP] Drop poison-generating flags after hoisting (#90382)
Author: Yingwei Zheng
Date: 2024-04-30T11:06:37-07:00
New Revision: 6350acdb134d2e494c029ef2f83ccbc1a1462ba3
URL:
https://github.com/llvm/llvm-project/commit/6350acdb134d2e494c029ef2f83ccbc1a1462ba3
DIFF:
https://github.com/llvm/llvm-project/commit/6350acdb134d2e494c029ef2f83ccbc1a1462ba3.diff
LOG: [CGP] Drop poison-generating flags after hoisting (#90382)
See the following case:
```
define i8 @src1(i8 %x) {
entry:
%cmp = icmp eq i8 %x, -1
br i1 %cmp, label %exit, label %if.then
if.then:
%inc = add nuw nsw i8 %x, 1
br label %exit
exit:
%retval = phi i8 [ %inc, %if.then ], [ -1, %entry ]
ret i8 %retval
}
define i8 @tgt1(i8 %x) {
entry:
%inc = add nuw nsw i8 %x, 1
%0 = icmp eq i8 %inc, 0
br i1 %0, label %exit, label %if.then
if.then: ; preds = %entry
br label %exit
exit: ; preds = %if.then, %entry
%retval = phi i8 [ %inc, %if.then ], [ -1, %entry ]
ret i8 %retval
}
```
`optimizeBranch` converts `icmp eq X, -1` into cmp to zero on RISC-V and
hoists the add into the entry block. Poison-generating flags should be
dropped as they don't still hold.
Proof: https://alive2.llvm.org/ce/z/sP7mvK
Fixes https://github.com/llvm/llvm-project/issues/90380
(cherry picked from commit ab12bba0aad800c1805eca2ea937da958c1854c8)
Added:
llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll
Modified:
llvm/lib/CodeGen/CodeGenPrepare.cpp
llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
Removed:
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp
b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index 8ee1f19e083e4e..1cca56fc19cfd8 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -8154,6 +8154,7 @@ static bool optimizeBranch(BranchInst *Branch, const
TargetLowering ,
IRBuilder<> Builder(Branch);
if (UI->getParent() != Branch->getParent())
UI->moveBefore(Branch);
+ UI->dropPoisonGeneratingFlags();
Value *NewCmp = Builder.CreateCmp(ICmpInst::ICMP_EQ, UI,
ConstantInt::get(UI->getType(), 0));
LLVM_DEBUG(dbgs() << "Converting " << *Cmp << "\n");
@@ -8167,6 +8168,7 @@ static bool optimizeBranch(BranchInst *Branch, const
TargetLowering ,
IRBuilder<> Builder(Branch);
if (UI->getParent() != Branch->getParent())
UI->moveBefore(Branch);
+ UI->dropPoisonGeneratingFlags();
Value *NewCmp = Builder.CreateCmp(Cmp->getPredicate(), UI,
ConstantInt::get(UI->getType(), 0));
LLVM_DEBUG(dbgs() << "Converting " << *Cmp << "\n");
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
b/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
index ff5cef7e781fe6..25dfb3c53a077b 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
@@ -211,6 +211,29 @@ else:
ret i32 %l
}
+define i32 @sub10_else_drop_nuw(i32 %a) {
+; CHECK-LABEL: @sub10_else_drop_nuw(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[L:%.*]] = sub i32 [[A:%.*]], 10
+; CHECK-NEXT:[[TMP0:%.*]] = icmp eq i32 [[L]], 0
+; CHECK-NEXT:br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]]
+; CHECK: then:
+; CHECK-NEXT:ret i32 0
+; CHECK: else:
+; CHECK-NEXT:ret i32 [[L]]
+;
+entry:
+ %c = icmp eq i32 %a, 10
+ br i1 %c, label %then, label %else
+
+then:
+ ret i32 0
+
+else:
+ %l = sub nuw i32 %a, 10
+ ret i32 %l
+}
+
define i32 @subm10_then(i32 %a) {
; CHECK-LABEL: @subm10_then(
; CHECK-NEXT: entry:
diff --git a/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll
b/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll
new file mode 100644
index 00..a6909d14913494
--- /dev/null
+++ b/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll
@@ -0,0 +1,80 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 4
+; RUN: opt -codegenprepare -S -mtriple=riscv64 < %s | FileCheck %s
+
+define i8 @hoist_add(i8 %x) {
+; CHECK-LABEL: define i8 @hoist_add(
+; CHECK-SAME: i8 [[X:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[INC:%.*]] = add i8 [[X]], 1
+; CHECK-NEXT:[[TMP0:%.*]] = icmp eq i8 [[INC]], 0
+; CHECK-NEXT:br i1 [[TMP0]], label [[EXIT:%.*]], label [[IF_THEN:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT:br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT:[[RETVAL:%.*]] = phi i8 [ [[INC]], [[IF_THEN]] ], [ -1,
[[ENTRY:%.*]] ]
+; CHECK-NEXT:ret i8 [[RETVAL]]
+;
+entry:
+ %cmp = icmp eq i8 %x, -1
+ br i1 %cmp, label %exit, label %if.then
+
+if.then:
+ %inc = add nuw nsw i8 %x, 1
+ br label %exit
+
+exit:
+ %retval = phi i8 [ %inc, %if.then ], [ -1, %entry ]
+ ret i8 %retval
+}
+
+define i8 @hoist_lshr(i8 %x) {
+; CHECK-LABEL:
[llvm-branch-commits] [llvm] release/18.x: [CGP] Drop poison-generating flags after hoisting (#90382) (PR #90437)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/90437
>From 6350acdb134d2e494c029ef2f83ccbc1a1462ba3 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Mon, 29 Apr 2024 15:51:49 +0800
Subject: [PATCH] [CGP] Drop poison-generating flags after hoisting (#90382)
See the following case:
```
define i8 @src1(i8 %x) {
entry:
%cmp = icmp eq i8 %x, -1
br i1 %cmp, label %exit, label %if.then
if.then:
%inc = add nuw nsw i8 %x, 1
br label %exit
exit:
%retval = phi i8 [ %inc, %if.then ], [ -1, %entry ]
ret i8 %retval
}
define i8 @tgt1(i8 %x) {
entry:
%inc = add nuw nsw i8 %x, 1
%0 = icmp eq i8 %inc, 0
br i1 %0, label %exit, label %if.then
if.then: ; preds = %entry
br label %exit
exit: ; preds = %if.then, %entry
%retval = phi i8 [ %inc, %if.then ], [ -1, %entry ]
ret i8 %retval
}
```
`optimizeBranch` converts `icmp eq X, -1` into cmp to zero on RISC-V and
hoists the add into the entry block. Poison-generating flags should be
dropped as they don't still hold.
Proof: https://alive2.llvm.org/ce/z/sP7mvK
Fixes https://github.com/llvm/llvm-project/issues/90380
(cherry picked from commit ab12bba0aad800c1805eca2ea937da958c1854c8)
---
llvm/lib/CodeGen/CodeGenPrepare.cpp | 2 +
.../CodeGenPrepare/ARM/branch-on-zero.ll | 23 ++
.../CodeGenPrepare/RISCV/convert-to-eqz.ll| 80 +++
3 files changed, 105 insertions(+)
create mode 100644 llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp
b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index 8ee1f19e083e4e..1cca56fc19cfd8 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -8154,6 +8154,7 @@ static bool optimizeBranch(BranchInst *Branch, const
TargetLowering ,
IRBuilder<> Builder(Branch);
if (UI->getParent() != Branch->getParent())
UI->moveBefore(Branch);
+ UI->dropPoisonGeneratingFlags();
Value *NewCmp = Builder.CreateCmp(ICmpInst::ICMP_EQ, UI,
ConstantInt::get(UI->getType(), 0));
LLVM_DEBUG(dbgs() << "Converting " << *Cmp << "\n");
@@ -8167,6 +8168,7 @@ static bool optimizeBranch(BranchInst *Branch, const
TargetLowering ,
IRBuilder<> Builder(Branch);
if (UI->getParent() != Branch->getParent())
UI->moveBefore(Branch);
+ UI->dropPoisonGeneratingFlags();
Value *NewCmp = Builder.CreateCmp(Cmp->getPredicate(), UI,
ConstantInt::get(UI->getType(), 0));
LLVM_DEBUG(dbgs() << "Converting " << *Cmp << "\n");
diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
b/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
index ff5cef7e781fe6..25dfb3c53a077b 100644
--- a/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
@@ -211,6 +211,29 @@ else:
ret i32 %l
}
+define i32 @sub10_else_drop_nuw(i32 %a) {
+; CHECK-LABEL: @sub10_else_drop_nuw(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[L:%.*]] = sub i32 [[A:%.*]], 10
+; CHECK-NEXT:[[TMP0:%.*]] = icmp eq i32 [[L]], 0
+; CHECK-NEXT:br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]]
+; CHECK: then:
+; CHECK-NEXT:ret i32 0
+; CHECK: else:
+; CHECK-NEXT:ret i32 [[L]]
+;
+entry:
+ %c = icmp eq i32 %a, 10
+ br i1 %c, label %then, label %else
+
+then:
+ ret i32 0
+
+else:
+ %l = sub nuw i32 %a, 10
+ ret i32 %l
+}
+
define i32 @subm10_then(i32 %a) {
; CHECK-LABEL: @subm10_then(
; CHECK-NEXT: entry:
diff --git a/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll
b/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll
new file mode 100644
index 00..a6909d14913494
--- /dev/null
+++ b/llvm/test/Transforms/CodeGenPrepare/RISCV/convert-to-eqz.ll
@@ -0,0 +1,80 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 4
+; RUN: opt -codegenprepare -S -mtriple=riscv64 < %s | FileCheck %s
+
+define i8 @hoist_add(i8 %x) {
+; CHECK-LABEL: define i8 @hoist_add(
+; CHECK-SAME: i8 [[X:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[INC:%.*]] = add i8 [[X]], 1
+; CHECK-NEXT:[[TMP0:%.*]] = icmp eq i8 [[INC]], 0
+; CHECK-NEXT:br i1 [[TMP0]], label [[EXIT:%.*]], label [[IF_THEN:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT:br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT:[[RETVAL:%.*]] = phi i8 [ [[INC]], [[IF_THEN]] ], [ -1,
[[ENTRY:%.*]] ]
+; CHECK-NEXT:ret i8 [[RETVAL]]
+;
+entry:
+ %cmp = icmp eq i8 %x, -1
+ br i1 %cmp, label %exit, label %if.then
+
+if.then:
+ %inc = add nuw nsw i8 %x, 1
+ br label %exit
+
+exit:
+ %retval = phi i8 [ %inc, %if.then ], [ -1, %entry ]
+ ret i8 %retval
+}
+
+define i8 @hoist_lshr(i8 %x) {
+; CHECK-LABEL: define i8 @hoist_lshr(
+; CHECK-SAME: i8 [[X:%.*]]) {
+;
[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: None (llvmbot)
Changes
Backport 3ab4ae9e58c09dfd8203547ba8916f3458a0a481
Requested by: @efriedma-quic
---
Full diff: https://github.com/llvm/llvm-project/pull/90639.diff
3 Files Affected:
- (modified) clang/docs/ReleaseNotes.rst (+6)
- (modified) clang/lib/CodeGen/MicrosoftCXXABI.cpp (+9-3)
- (modified) clang/test/CodeGen/arm64-microsoft-arguments.cpp (+15)
``diff
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 1e88b58725bd95..e533ecfd5aeba5 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -149,6 +149,12 @@ ABI Changes in This Version
- Following the SystemV ABI for x86-64, ``__int128`` arguments will no longer
be split between a register and a stack slot.
+- Fixed Microsoft calling convention for returning certain classes with a
+ templated constructor. If a class has a templated constructor, it should
+ be returned indirectly even if it meets all the other requirements for
+ returning a class in a register. This affects some uses of std::pair.
+ (#GH86384).
+
AST Dumping Potentially Breaking Changes
- When dumping a sugared type, Clang will no longer print the desugared type if
diff --git a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
index 172c4c937b9728..4d0f4c63f843b8 100644
--- a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
+++ b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
@@ -1135,9 +1135,15 @@ static bool isTrivialForMSVC(const CXXRecordDecl *RD,
QualType Ty,
return false;
if (RD->hasNonTrivialCopyAssignment())
return false;
- for (const CXXConstructorDecl *Ctor : RD->ctors())
-if (Ctor->isUserProvided())
- return false;
+ for (const Decl *D : RD->decls()) {
+if (auto *Ctor = dyn_cast(D)) {
+ if (Ctor->isUserProvided())
+return false;
+} else if (auto *Template = dyn_cast(D)) {
+ if (isa(Template->getTemplatedDecl()))
+return false;
+}
+ }
if (RD->hasNonTrivialDestructor())
return false;
return true;
diff --git a/clang/test/CodeGen/arm64-microsoft-arguments.cpp
b/clang/test/CodeGen/arm64-microsoft-arguments.cpp
index e8309888dcfe21..85472645acb3b3 100644
--- a/clang/test/CodeGen/arm64-microsoft-arguments.cpp
+++ b/clang/test/CodeGen/arm64-microsoft-arguments.cpp
@@ -201,3 +201,18 @@ S11 f11() {
S11 x;
return func11(x);
}
+
+// GH86384
+// Pass and return object with template constructor (pass directly,
+// return indirectly).
+// CHECK: define dso_local void @"?f12@@YA?AUS12@@XZ"(ptr dead_on_unwind inreg
noalias writable sret(%struct.S12) align 4 {{.*}})
+// CHECK: call void @"?func12@@YA?AUS12@@U1@@Z"(ptr dead_on_unwind inreg
writable sret(%struct.S12) align 4 {{.*}}, i64 {{.*}})
+struct S12 {
+ template S12(T*) {}
+ int x;
+};
+S12 func12(S12 x);
+S12 f12() {
+ S12 x((int*)0);
+ return func12(x);
+}
``
https://github.com/llvm/llvm-project/pull/90639
___
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[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: None (llvmbot)
Changes
Backport 3ab4ae9e58c09dfd8203547ba8916f3458a0a481
Requested by: @efriedma-quic
---
Full diff: https://github.com/llvm/llvm-project/pull/90639.diff
3 Files Affected:
- (modified) clang/docs/ReleaseNotes.rst (+6)
- (modified) clang/lib/CodeGen/MicrosoftCXXABI.cpp (+9-3)
- (modified) clang/test/CodeGen/arm64-microsoft-arguments.cpp (+15)
``diff
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 1e88b58725bd95..e533ecfd5aeba5 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -149,6 +149,12 @@ ABI Changes in This Version
- Following the SystemV ABI for x86-64, ``__int128`` arguments will no longer
be split between a register and a stack slot.
+- Fixed Microsoft calling convention for returning certain classes with a
+ templated constructor. If a class has a templated constructor, it should
+ be returned indirectly even if it meets all the other requirements for
+ returning a class in a register. This affects some uses of std::pair.
+ (#GH86384).
+
AST Dumping Potentially Breaking Changes
- When dumping a sugared type, Clang will no longer print the desugared type if
diff --git a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
index 172c4c937b9728..4d0f4c63f843b8 100644
--- a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
+++ b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
@@ -1135,9 +1135,15 @@ static bool isTrivialForMSVC(const CXXRecordDecl *RD,
QualType Ty,
return false;
if (RD->hasNonTrivialCopyAssignment())
return false;
- for (const CXXConstructorDecl *Ctor : RD->ctors())
-if (Ctor->isUserProvided())
- return false;
+ for (const Decl *D : RD->decls()) {
+if (auto *Ctor = dyn_cast(D)) {
+ if (Ctor->isUserProvided())
+return false;
+} else if (auto *Template = dyn_cast(D)) {
+ if (isa(Template->getTemplatedDecl()))
+return false;
+}
+ }
if (RD->hasNonTrivialDestructor())
return false;
return true;
diff --git a/clang/test/CodeGen/arm64-microsoft-arguments.cpp
b/clang/test/CodeGen/arm64-microsoft-arguments.cpp
index e8309888dcfe21..85472645acb3b3 100644
--- a/clang/test/CodeGen/arm64-microsoft-arguments.cpp
+++ b/clang/test/CodeGen/arm64-microsoft-arguments.cpp
@@ -201,3 +201,18 @@ S11 f11() {
S11 x;
return func11(x);
}
+
+// GH86384
+// Pass and return object with template constructor (pass directly,
+// return indirectly).
+// CHECK: define dso_local void @"?f12@@YA?AUS12@@XZ"(ptr dead_on_unwind inreg
noalias writable sret(%struct.S12) align 4 {{.*}})
+// CHECK: call void @"?func12@@YA?AUS12@@U1@@Z"(ptr dead_on_unwind inreg
writable sret(%struct.S12) align 4 {{.*}}, i64 {{.*}})
+struct S12 {
+ template S12(T*) {}
+ int x;
+};
+S12 func12(S12 x);
+S12 f12() {
+ S12 x((int*)0);
+ return func12(x);
+}
``
https://github.com/llvm/llvm-project/pull/90639
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[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/90639
Backport 3ab4ae9e58c09dfd8203547ba8916f3458a0a481
Requested by: @efriedma-quic
>From ffbaa2afd157c678f4535b233519229f7e5b1ad3 Mon Sep 17 00:00:00 2001
From: Eli Friedman
Date: Mon, 29 Apr 2024 12:00:12 -0700
Subject: [PATCH] [clang codegen] Fix MS ABI detection of user-provided
constructors. (#90151)
In the context of determining whether a class counts as an "aggregate",
a constructor template counts as a user-provided constructor.
Fixes #86384
(cherry picked from commit 3ab4ae9e58c09dfd8203547ba8916f3458a0a481)
---
clang/docs/ReleaseNotes.rst | 6 ++
clang/lib/CodeGen/MicrosoftCXXABI.cpp| 12 +---
clang/test/CodeGen/arm64-microsoft-arguments.cpp | 15 +++
3 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 1e88b58725bd95..e533ecfd5aeba5 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -149,6 +149,12 @@ ABI Changes in This Version
- Following the SystemV ABI for x86-64, ``__int128`` arguments will no longer
be split between a register and a stack slot.
+- Fixed Microsoft calling convention for returning certain classes with a
+ templated constructor. If a class has a templated constructor, it should
+ be returned indirectly even if it meets all the other requirements for
+ returning a class in a register. This affects some uses of std::pair.
+ (#GH86384).
+
AST Dumping Potentially Breaking Changes
- When dumping a sugared type, Clang will no longer print the desugared type if
diff --git a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
index 172c4c937b9728..4d0f4c63f843b8 100644
--- a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
+++ b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
@@ -1135,9 +1135,15 @@ static bool isTrivialForMSVC(const CXXRecordDecl *RD,
QualType Ty,
return false;
if (RD->hasNonTrivialCopyAssignment())
return false;
- for (const CXXConstructorDecl *Ctor : RD->ctors())
-if (Ctor->isUserProvided())
- return false;
+ for (const Decl *D : RD->decls()) {
+if (auto *Ctor = dyn_cast(D)) {
+ if (Ctor->isUserProvided())
+return false;
+} else if (auto *Template = dyn_cast(D)) {
+ if (isa(Template->getTemplatedDecl()))
+return false;
+}
+ }
if (RD->hasNonTrivialDestructor())
return false;
return true;
diff --git a/clang/test/CodeGen/arm64-microsoft-arguments.cpp
b/clang/test/CodeGen/arm64-microsoft-arguments.cpp
index e8309888dcfe21..85472645acb3b3 100644
--- a/clang/test/CodeGen/arm64-microsoft-arguments.cpp
+++ b/clang/test/CodeGen/arm64-microsoft-arguments.cpp
@@ -201,3 +201,18 @@ S11 f11() {
S11 x;
return func11(x);
}
+
+// GH86384
+// Pass and return object with template constructor (pass directly,
+// return indirectly).
+// CHECK: define dso_local void @"?f12@@YA?AUS12@@XZ"(ptr dead_on_unwind inreg
noalias writable sret(%struct.S12) align 4 {{.*}})
+// CHECK: call void @"?func12@@YA?AUS12@@U1@@Z"(ptr dead_on_unwind inreg
writable sret(%struct.S12) align 4 {{.*}}, i64 {{.*}})
+struct S12 {
+ template S12(T*) {}
+ int x;
+};
+S12 func12(S12 x);
+S12 f12() {
+ S12 x((int*)0);
+ return func12(x);
+}
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[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
llvmbot wrote: @rnk What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/90639 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/90639 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][OpenMP] Don't pass clauses to op-generating functions anymore (PR #90108)
https://github.com/kparzysz updated
https://github.com/llvm/llvm-project/pull/90108
>From 9e1990638495ad205c4898f697ac6dcf2a59f9cb Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Thu, 25 Apr 2024 11:08:14 -0500
Subject: [PATCH] [flang][OpenMP] Don't pass clauses to op-generating functions
anymore
The clauses should now be accessed from the construct queue.
---
flang/lib/Lower/OpenMP/OpenMP.cpp | 242 +-
1 file changed, 107 insertions(+), 135 deletions(-)
diff --git a/flang/lib/Lower/OpenMP/OpenMP.cpp
b/flang/lib/Lower/OpenMP/OpenMP.cpp
index 7e0105e749c39e..5a4e113ffca46a 100644
--- a/flang/lib/Lower/OpenMP/OpenMP.cpp
+++ b/flang/lib/Lower/OpenMP/OpenMP.cpp
@@ -1229,8 +1229,7 @@ genCriticalOp(Fortran::lower::AbstractConverter
,
Fortran::lower::SymMap ,
Fortran::semantics::SemanticsContext ,
Fortran::lower::pft::Evaluation , mlir::Location loc,
- const List , const ConstructQueue ,
- ConstructQueue::iterator item,
+ const ConstructQueue , ConstructQueue::iterator item,
const std::optional ) {
fir::FirOpBuilder = converter.getFirOpBuilder();
mlir::FlatSymbolRefAttr nameAttr;
@@ -1241,8 +1240,8 @@ genCriticalOp(Fortran::lower::AbstractConverter
,
auto global = mod.lookupSymbol(nameStr);
if (!global) {
mlir::omp::CriticalClauseOps clauseOps;
- genCriticalDeclareClauses(converter, semaCtx, clauses, loc, clauseOps,
-nameStr);
+ genCriticalDeclareClauses(converter, semaCtx, item->clauses, loc,
+clauseOps, nameStr);
mlir::OpBuilder modBuilder(mod.getBodyRegion());
global = modBuilder.create(loc, clauseOps);
@@ -1262,8 +1261,7 @@ genDistributeOp(Fortran::lower::AbstractConverter
,
Fortran::lower::SymMap ,
Fortran::semantics::SemanticsContext ,
Fortran::lower::pft::Evaluation , mlir::Location loc,
-const List , const ConstructQueue ,
-ConstructQueue::iterator item) {
+const ConstructQueue , ConstructQueue::iterator item) {
TODO(loc, "Distribute construct");
return nullptr;
}
@@ -1273,10 +1271,11 @@ genFlushOp(Fortran::lower::AbstractConverter ,
Fortran::lower::SymMap ,
Fortran::semantics::SemanticsContext ,
Fortran::lower::pft::Evaluation , mlir::Location loc,
- const ObjectList , const List ,
- const ConstructQueue , ConstructQueue::iterator item) {
+ const ObjectList , const ConstructQueue ,
+ ConstructQueue::iterator item) {
llvm::SmallVector operandRange;
- genFlushClauses(converter, semaCtx, objects, clauses, loc, operandRange);
+ genFlushClauses(converter, semaCtx, objects, item->clauses, loc,
+ operandRange);
return converter.getFirOpBuilder().create(
converter.getCurrentLocation(), operandRange);
@@ -1287,8 +1286,7 @@ genMasterOp(Fortran::lower::AbstractConverter ,
Fortran::lower::SymMap ,
Fortran::semantics::SemanticsContext ,
Fortran::lower::pft::Evaluation , mlir::Location loc,
-const List , const ConstructQueue ,
-ConstructQueue::iterator item) {
+const ConstructQueue , ConstructQueue::iterator item) {
return genOpWithBody(
OpWithBodyGenInfo(converter, symTable, semaCtx, loc, eval,
llvm::omp::Directive::OMPD_master),
@@ -1300,8 +1298,7 @@ genOrderedOp(Fortran::lower::AbstractConverter ,
Fortran::lower::SymMap ,
Fortran::semantics::SemanticsContext ,
Fortran::lower::pft::Evaluation , mlir::Location loc,
- const List , const ConstructQueue ,
- ConstructQueue::iterator item) {
+ const ConstructQueue , ConstructQueue::iterator item) {
TODO(loc, "OMPD_ordered");
return nullptr;
}
@@ -1311,10 +1308,9 @@ genOrderedRegionOp(Fortran::lower::AbstractConverter
,
Fortran::lower::SymMap ,
Fortran::semantics::SemanticsContext ,
Fortran::lower::pft::Evaluation , mlir::Location loc,
- const List , const ConstructQueue ,
- ConstructQueue::iterator item) {
+ const ConstructQueue , ConstructQueue::iterator item)
{
mlir::omp::OrderedRegionClauseOps clauseOps;
- genOrderedRegionClauses(converter, semaCtx, clauses, loc, clauseOps);
+ genOrderedRegionClauses(converter, semaCtx, item->clauses, loc, clauseOps);
return genOpWithBody(
OpWithBodyGenInfo(converter, symTable, semaCtx, loc, eval,
@@ -1327,15 +1323,15 @@ genParallelOp(Fortran::lower::AbstractConverter
,
Fortran::lower::SymMap ,
Fortran::semantics::SemanticsContext ,
Fortran::lower::pft::Evaluation , mlir::Location loc,
-
[llvm-branch-commits] [libcxx] [libc++][chrono] implements UTC clock. (PR #90393)
@@ -0,0 +1,155 @@
+// -*- C++ -*-
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef _LIBCPP___CHRONO_UTC_CLOCK_H
+#define _LIBCPP___CHRONO_UTC_CLOCK_H
+
+#include
+// Enable the contents of the header only when libc++ was built with
experimental features enabled.
+#if !defined(_LIBCPP_HAS_NO_INCOMPLETE_TZDB)
+
+# include <__chrono/duration.h>
+# include <__chrono/system_clock.h>
+# include <__chrono/time_point.h>
+# include <__chrono/tzdb.h>
+# include <__chrono/tzdb_list.h>
+# include <__config>
+# include <__type_traits/common_type.h>
+
+# if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER)
+#pragma GCC system_header
+# endif
+
+_LIBCPP_BEGIN_NAMESPACE_STD
+
+# if _LIBCPP_STD_VER >= 20 && !defined(_LIBCPP_HAS_NO_TIME_ZONE_DATABASE) &&
!defined(_LIBCPP_HAS_NO_FILESYSTEM) && \
+ !defined(_LIBCPP_HAS_NO_LOCALIZATION)
+
+namespace chrono {
+
+class utc_clock;
+
+template
+using utc_time= time_point;
+using utc_seconds = utc_time;
+
+class utc_clock {
+public:
+ using rep = system_clock::rep;
+ using period= system_clock::period;
+ using duration = chrono::duration;
+ using time_point= chrono::time_point;
+ static constexpr bool is_steady = false; // The system_clock is not steady.
+
+ [[nodiscard]] _LIBCPP_HIDE_FROM_ABI static time_point now() { return
from_sys(system_clock::now()); }
+
+ template
+ [[nodiscard]] _LIBCPP_HIDE_FROM_ABI static sys_time>
+ to_sys(const utc_time<_Duration>& __time);
+
+ template
+ [[nodiscard]] _LIBCPP_HIDE_FROM_ABI static utc_time>
+ from_sys(const sys_time<_Duration>& __time) {
+using _Rp = utc_time>;
+// TODO TZDB investigate optimizations.
+//
+// The leap second database stores all transitions, this mean to calculate
+// the current number of leap seconds the code needs to iterate over all
+// leap seconds to accumulate the sum. Then the sum can be used to
determine
+// the sys_time. Accessing the database involves acquiring a mutex.
+//
+// The historic entries in the database are immutable. Hard-coding these
+// values in a table would allow:
+// - To store the sum, allowing a binary search on the data.
+// - Avoid acquiring a mutex.
+// The disadvantage are:
+// - A slightly larger code size.
+//
+// There are two optimization directions
+// - hard-code the database and do a linear search for future entries. This
+// search can start at the back, and should probably contain very few
+// entries. (Adding leap seconds is quite rare and new release of libc++
+// can add the new entries; they are announced half a year before they
are
+// added.)
+// - During parsing the leap seconds store an additional database in the
+// dylib with the list of the sum of the leap seconds. In that case there
+// can be a private function __get_utc_to_sys_table that returns the
+// table.
+//
+// Note for to_sys there are no optimizations to be done; it uses
+// get_leap_second_info. The function get_leap_second_info could benefit
+// from optimizations as described above; again both options apply.
+
+// Both UTC and the system clock use the same epoch. The Standard
+// specifies from 1970-01-01 even when UTC starts at
+// 1972-01-01 00:00:10 TAI. So when the sys_time is before epoch we can be
+// sure there both clocks return the same value.
+
+const tzdb& __tzdb = chrono::get_tzdb();
+_Rp __result{__time.time_since_epoch()};
+for (const auto& __leap_second : __tzdb.leap_seconds) {
+ if (__time < __leap_second)
+return __result;
+
+ __result += __leap_second.value();
+}
+return __result;
+ }
+};
+
+struct leap_second_info {
+ bool is_leap_second;
+ seconds elapsed;
+};
+
+template
+[[nodiscard]] _LIBCPP_HIDE_FROM_ABI leap_second_info
get_leap_second_info(const utc_time<_Duration>& __time) {
+ const tzdb& __tzdb = chrono::get_tzdb();
+ if (__tzdb.leap_seconds.empty())
+return {false, chrono::seconds{0}};
+
+ sys_seconds __sys{chrono::floor(__time).time_since_epoch()};
+ seconds __elapsed{0};
+ for (const auto& __leap_second : __tzdb.leap_seconds) {
+if (__sys == __leap_second.date() + __elapsed)
+ return {__leap_second.value() > 0s, // only positive leap seconds are
considered leap seconds
+ __elapsed + __leap_second.value()};
+
+if (__sys < __leap_second.date() + __elapsed)
+ return {false, __elapsed};
+
+__elapsed += __leap_second.value();
+ }
+
+ return {false, __elapsed};
+}
+
+template
[llvm-branch-commits] [libcxx] [libc++][chrono] implements UTC clock. (PR #90393)
@@ -0,0 +1,124 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+// UNSUPPORTED: c++03, c++11, c++14, c++17
+// UNSUPPORTED: no-filesystem, no-localization, no-tzdb
+
+// XFAIL: libcpp-has-no-incomplete-tzdb
+// XFAIL: availability-tzdb-missing
+
+//
+//
+// class utc_clock;
+
+// template
+// leap_second_info get_leap_second_info(const utc_time& ut);
+
+#include
+#include
+#include
+#include
+#include
+
+#include "test_macros.h"
+#include "assert_macros.h"
+#include "concat_macros.h"
+#include "filesystem_test_helper.h"
+#include "test_tzdb.h"
+
+scoped_test_env env;
+[[maybe_unused]] const std::filesystem::path dir = env.create_dir("zoneinfo");
+const std::filesystem::path tzdata =
env.create_file("zoneinfo/tzdata.zi");
+const std::filesystem::path leap_seconds =
env.create_file("zoneinfo/leap-seconds.list");
+
+std::string_view std::chrono::__libcpp_tzdb_directory() {
+ static std::string result = dir.string();
+ return result;
+}
+
+static void write(std::string_view input) {
+ static int version = 0;
+
+ std::ofstream f{tzdata};
+ f << "# version " << version++ << '\n';
+ std::ofstream{leap_seconds}.write(input.data(), input.size());
+}
+
+template
+static void test_leap_second_info(
+std::chrono::time_point time, bool
is_leap_second, std::chrono::seconds elapsed) {
+ std::chrono::leap_second_info result =
std::chrono::get_leap_second_info(time);
+ TEST_REQUIRE(
+ result.is_leap_second == is_leap_second && result.elapsed == elapsed,
+ TEST_WRITE_CONCATENATED(
+ "\nExpected output [",
+ is_leap_second,
+ ", ",
+ elapsed,
+ "]\nActual output [",
+ result.is_leap_second,
+ ", ",
+ result.elapsed,
+ "]\n"));
+}
+
+// Note at the time of writing all leap seconds are positive. This test uses
+// fake data to test the behaviour of negative leap seconds.
+int main(int, const char**) {
+ using namespace std::literals::chrono_literals;
+
+ // Use small values for simplicity. The dates are seconds since 1.1.1900.
+ write(
+ R"(
+1 10
+60 11
+120 12
+180 11
+240 12
+300 13
+360 12
+)");
+
+ // Transitions from the start of UTC.
+ auto test_transition = [](std::chrono::utc_seconds time,
std::chrono::seconds elapsed, bool positive) {
+if (positive) {
+ // Every transition has the following tests
+ // - 1ns before the start of the transition is_leap_second -> false,
elapsed -> elapsed
+ // - at the start of the transition is_leap_second -> true,
elapsed -> elapsed + 1
+ // - 1ns after the start of the transition is_leap_second -> true,
elapsed -> elapsed + 1
+ // - 1ns before the end of the transition is_leap_second -> true,
elapsed -> elapsed + 1
+ // - at the end of the transition is_leap_second -> false,
elapsed -> elapsed + 1
+
+ test_leap_second_info(time - 1ns, false, elapsed);
+ test_leap_second_info(time, true, elapsed + 1s);
+ test_leap_second_info(time + 1ns, true, elapsed + 1s);
+ test_leap_second_info(time + 1s - 1ns, true, elapsed + 1s);
+ test_leap_second_info(time + 1s, false, elapsed + 1s);
+} else {
+ // Every transition has the following tests
+ // - 1ns before the transition is_leap_second -> false, elapsed ->
elapsed
+ // - at the transition is_leap_second -> false elapsed ->
elapsed - 1
+ // - 1ns after the transition is_leap_second -> false, elapsed ->
elapsed - 1
+ test_leap_second_info(time - 1ns, false, elapsed);
+ test_leap_second_info(time, false, elapsed - 1s);
+ test_leap_second_info(time + 1ns, false, elapsed - 1s);
+}
+ };
+
+ std::chrono::utc_seconds epoch{std::chrono::sys_days{std::chrono::January /
1 / 1900}.time_since_epoch()};
+ test_leap_second_info(epoch, false, 0s);
+
+ // The UTC times are:
+ // epoch + transition time in the database + leap seconds before the
transition.
+ test_transition(epoch + 60s + 0s, 0s, true);
+ test_transition(epoch + 120s + 1s, 1s, true);
+ test_transition(epoch + 180s + 2s, 2s, false);
MattStephanson wrote:
I don't think this test is quite right. But since we don't have any historical
practice with negative leap seconds, my reasoning is based on an assumption:
the IANA db contains the earliest time after a leap second is fully inserted.
I'm basing this on the fact that positive leap seconds are inserted at 11:59:60
PM on 30 June/31 December, but the db contains 12:00:00 AM on 1 July/1 January.
For a positive leap second, the `utc_time` when insertion begins is this
`sys_time` plus
[llvm-branch-commits] [libcxx] [libc++][chrono] implements UTC clock. (PR #90393)
@@ -0,0 +1,1004 @@
+//===--===//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+// UNSUPPORTED: c++03, c++11, c++14, c++17
+// UNSUPPORTED: no-filesystem, no-localization, no-tzdb
+// UNSUPPORTED: GCC-ALWAYS_INLINE-FIXME
+
+// TODO FMT This test should not require std::to_chars(floating-point)
+// XFAIL: availability-fp_to_chars-missing
+
+// XFAIL: libcpp-has-no-incomplete-tzdb
+// XFAIL: availability-tzdb-missing
+
+// REQUIRES: locale.fr_FR.UTF-8
+// REQUIRES: locale.ja_JP.UTF-8
+
+//
+
+// template
+// struct formatter, charT>;
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "formatter_tests.h"
+#include "make_string.h"
+#include "platform_support.h" // locale name macros
+#include "test_macros.h"
+
+template
+static void test_no_chrono_specs() {
+ using namespace std::literals::chrono_literals;
+
+ std::locale::global(std::locale(LOCALE_fr_FR_UTF_8));
+
+ // Non localized output
+
+ // [time.syn]
+ // using nanoseconds = duration;
+ // using microseconds = duration;
+ // using milliseconds = duration;
+ // using seconds = duration;
+ // using minutes = duration>;
+ // using hours= duration>;
+ check(SV("1425-08-04 22:06:56"), SV("{}"),
std::chrono::utc_seconds(-17'179'869'184s)); // Minimum value for 35 bits.
+ check(SV("1901-12-13 20:45:52"), SV("{}"),
std::chrono::utc_seconds(-2'147'483'648s));
+
+ check(SV("1969-12-31 00:00:00"), SV("{}"), std::chrono::utc_seconds(-24h));
+ check(SV("1969-12-31 06:00:00"), SV("{}"), std::chrono::utc_seconds(-18h));
+ check(SV("1969-12-31 12:00:00"), SV("{}"), std::chrono::utc_seconds(-12h));
+ check(SV("1969-12-31 18:00:00"), SV("{}"), std::chrono::utc_seconds(-6h));
+ check(SV("1969-12-31 23:59:59"), SV("{}"), std::chrono::utc_seconds(-1s));
+
+ check(SV("1970-01-01 00:00:00"), SV("{}"), std::chrono::utc_seconds(0s));
+ check(SV("2000-01-01 00:00:00"), SV("{}"),
std::chrono::utc_seconds(946'684'800s + 22s));
+ check(SV("2000-01-01 01:02:03"), SV("{}"),
std::chrono::utc_seconds(946'688'523s + 22s));
+
+ check(SV("2038-01-19 03:14:07"), SV("{}"),
std::chrono::utc_seconds(2'147'483'647s + 27s));
+ check(SV("2514-05-30 01:53:03"),
+SV("{}"),
+std::chrono::utc_seconds(17'179'869'183s + 27s)); // Maximum value for
35 bits.
+
+ check(SV("2000-01-01 01:02:03.123"),
+SV("{}"),
+std::chrono::utc_time(946'688'523'123ms +
22s));
+
+ std::locale::global(std::locale::classic());
+}
+
+template
+static void test_valid_values_year() {
+ using namespace std::literals::chrono_literals;
+
+ constexpr std::basic_string_view fmt =
+
SV("{:%%C='%C'%t%%EC='%EC'%t%%y='%y'%t%%Oy='%Oy'%t%%Ey='%Ey'%t%%Y='%Y'%t%%EY='%EY'%n}");
+ constexpr std::basic_string_view lfmt =
+
SV("{:L%%C='%C'%t%%EC='%EC'%t%%y='%y'%t%%Oy='%Oy'%t%%Ey='%Ey'%t%%Y='%Y'%t%%EY='%EY'%n}");
+
+ const std::locale loc(LOCALE_ja_JP_UTF_8);
+ std::locale::global(std::locale(LOCALE_fr_FR_UTF_8));
+
+ // Non localized output using C-locale
+
check(SV("%C='19'\t%EC='19'\t%y='70'\t%Oy='70'\t%Ey='70'\t%Y='1970'\t%EY='1970'\n"),
+fmt,
+std::chrono::utc_seconds(0s)); // 00:00:00 UTC Thursday, 1 January 1970
+
+
check(SV("%C='20'\t%EC='20'\t%y='09'\t%Oy='09'\t%Ey='09'\t%Y='2009'\t%EY='2009'\n"),
+fmt,
+std::chrono::utc_seconds(1'234'567'890s)); // 23:31:30 UTC on Friday,
13 February 2009
+
+ // Use the global locale (fr_FR)
+
check(SV("%C='19'\t%EC='19'\t%y='70'\t%Oy='70'\t%Ey='70'\t%Y='1970'\t%EY='1970'\n"),
+lfmt,
+std::chrono::utc_seconds(0s)); // 00:00:00 UTC Thursday, 1 January 1970
+
+
check(SV("%C='20'\t%EC='20'\t%y='09'\t%Oy='09'\t%Ey='09'\t%Y='2009'\t%EY='2009'\n"),
+lfmt,
+std::chrono::utc_seconds(1'234'567'890s)); // 23:31:30 UTC on Friday,
13 February 2009
+
+ // Use supplied locale (ja_JP). This locale has a different alternate.
+#if defined(_WIN32) || defined(__APPLE__) || defined(_AIX) ||
defined(__FreeBSD__)
+ check(loc,
+
SV("%C='19'\t%EC='19'\t%y='70'\t%Oy='70'\t%Ey='70'\t%Y='1970'\t%EY='1970'\n"),
+lfmt,
+std::chrono::utc_seconds(0s)); // 00:00:00 UTC Thursday, 1 January 1970
+
+ check(loc,
+
SV("%C='20'\t%EC='20'\t%y='09'\t%Oy='09'\t%Ey='09'\t%Y='2009'\t%EY='2009'\n"),
+lfmt,
+std::chrono::utc_seconds(1'234'567'890s)); // 23:31:30 UTC on Friday,
13 February 2009
+#else // defined(_WIN32) || defined(__APPLE__) ||
defined(_AIX)||defined(__FreeBSD__)
+ check(loc,
+
SV("%C='19'\t%EC='昭和'\t%y='70'\t%Oy='七十'\t%Ey='45'\t%Y='1970'\t%EY='昭和45年'\n"),
+lfmt,
+
[llvm-branch-commits] [flang] [flang][cuda] Lower device/managed/unified allocation to cuda ops (PR #90526)
https://github.com/clementval closed https://github.com/llvm/llvm-project/pull/90526 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
https://github.com/jsjodin commented: Looks good, just some minor nits/comments. https://github.com/llvm/llvm-project/pull/82853 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
@@ -88,6 +91,196 @@ void gatherFuncAndVarSyms(
symbolAndClause.emplace_back(clause, *object.id());
}
+mlir::omp::MapInfoOp
+createMapInfoOp(fir::FirOpBuilder , mlir::Location loc,
+mlir::Value baseAddr, mlir::Value varPtrPtr, std::string name,
+llvm::ArrayRef bounds,
+llvm::ArrayRef members,
+mlir::DenseIntElementsAttr membersIndex, uint64_t mapType,
+mlir::omp::VariableCaptureKind mapCaptureType, mlir::Type
retTy,
+bool partialMap) {
+ if (auto boxTy = baseAddr.getType().dyn_cast()) {
+baseAddr = builder.create(loc, baseAddr);
+retTy = baseAddr.getType();
+ }
+
+ mlir::TypeAttr varType = mlir::TypeAttr::get(
+ llvm::cast(retTy).getElementType());
+
+ mlir::omp::MapInfoOp op = builder.create(
+ loc, retTy, baseAddr, varType, varPtrPtr, members, membersIndex, bounds,
+ builder.getIntegerAttr(builder.getIntegerType(64, false), mapType),
+ builder.getAttr(mapCaptureType),
+ builder.getStringAttr(name), builder.getBoolAttr(partialMap));
+
+ return op;
+}
+
+static int
+getComponentPlacementInParent(const Fortran::semantics::Symbol *componentSym) {
+ const auto *derived =
+ componentSym->owner()
+ .derivedTypeSpec()
+ ->typeSymbol()
+ .detailsIf();
+ assert(derived &&
+ "expected derived type details when processing component symbol");
+ for (auto [placement, name] : llvm::enumerate(derived->componentNames()))
+if (name == componentSym->name())
+ return placement;
+ return -1;
+}
+
+static std::optional
+getComponentObject(std::optional object,
+ Fortran::semantics::SemanticsContext ) {
+ if (!object)
+return std::nullopt;
+
+ auto ref = evaluate::ExtractDataRef(*object.value().ref());
+ if (!ref)
+return std::nullopt;
+
+ if (std::holds_alternative(ref->u))
+return object;
+
+ auto baseObj = getBaseObject(object.value(), semaCtx);
+ if (!baseObj)
+return std::nullopt;
+
+ return getComponentObject(baseObj.value(), semaCtx);
+}
+
+void generateMemberPlacementIndices(
+const Object , llvm::SmallVectorImpl ,
+Fortran::semantics::SemanticsContext ) {
+ auto compObj = getComponentObject(object, semaCtx);
+ while (compObj) {
+indices.push_back(getComponentPlacementInParent(compObj->id()));
+compObj =
+getComponentObject(getBaseObject(compObj.value(), semaCtx), semaCtx);
+ }
+
+ indices = llvm::SmallVector{llvm::reverse(indices)};
+}
+
+static void calculateShapeAndFillIndices(
+llvm::SmallVectorImpl ,
+llvm::SmallVectorImpl ) {
+ shape.push_back(memberPlacementData.size());
+ size_t largestIndicesSize =
+ std::max_element(memberPlacementData.begin(), memberPlacementData.end(),
+ [](auto a, auto b) {
+ return a.memberPlacementIndices.size() <
+b.memberPlacementIndices.size();
+ })
+ ->memberPlacementIndices.size();
+ shape.push_back(largestIndicesSize);
+
+ // DenseElementsAttr expects a rectangular shape for the data, so all
+ // index lists have to be of the same length, this emplaces -1 as filler
+ for (auto : memberPlacementData) {
+if (v.memberPlacementIndices.size() < largestIndicesSize) {
+ auto *prevEnd = v.memberPlacementIndices.end();
+ v.memberPlacementIndices.resize(largestIndicesSize);
+ std::fill(prevEnd, v.memberPlacementIndices.end(), -1);
+}
+ }
+}
+
+static mlir::DenseIntElementsAttr createDenseElementsAttrFromIndices(
+llvm::SmallVectorImpl ,
+fir::FirOpBuilder ) {
+ llvm::SmallVector shape;
+ calculateShapeAndFillIndices(shape, memberPlacementData);
+
+ llvm::SmallVector indicesFlattened = std::accumulate(
+ memberPlacementData.begin(), memberPlacementData.end(),
+ llvm::SmallVector(),
+ [](llvm::SmallVector , OmpMapMemberIndicesData y) {
+x.insert(x.end(), y.memberPlacementIndices.begin(),
+ y.memberPlacementIndices.end());
+return x;
+ });
+
+ return mlir::DenseIntElementsAttr::get(
+ mlir::VectorType::get(shape,
+mlir::IntegerType::get(builder.getContext(), 32)),
+ indicesFlattened);
+}
+
+void insertChildMapInfoIntoParent(
+Fortran::lower::AbstractConverter ,
+std::map> ,
+llvm::SmallVectorImpl ,
+llvm::SmallVectorImpl ,
+llvm::SmallVectorImpl *mapSymTypes,
+llvm::SmallVectorImpl *mapSymLocs) {
+ for (auto indices : parentMemberIndices) {
+bool parentExists = false;
+size_t parentIdx;
+for (parentIdx = 0; parentIdx < mapSyms.size(); ++parentIdx) {
+ if (mapSyms[parentIdx] == indices.first) {
+parentExists = true;
+break;
+ }
+}
+
+if (parentExists) {
+ auto mapOp = llvm::cast(
+ mapOperands[parentIdx].getDefiningOp());
+
+ // NOTE: To maintain appropriate SSA ordering, we move
[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
@@ -0,0 +1,260 @@
+//===- OMPMapInfoFinalization.cpp
+//---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+//===--===//
+/// \file
+/// An OpenMP dialect related pass for FIR/HLFIR which performs some
+/// pre-processing of MapInfoOp's after the module has been lowered to
+/// finalize them.
+///
+/// For example, it expands MapInfoOp's containing descriptor related
+/// types (fir::BoxType's) into multiple MapInfoOp's containing the parent
+/// descriptor and pointer member components for individual mapping,
+/// treating the descriptor type as a record type for later lowering in the
+/// OpenMP dialect.
+///
+/// The pass also adds MapInfoOp's that are members of a parent object but are
+/// not directly used in the body of a target region to its BlockArgument list
+/// to maintain consistency across all MapInfoOp's tied to a region directly or
+/// indirectly via an parent object.
+//===--===//
+
+#include "flang/Optimizer/Builder/FIRBuilder.h"
+#include "flang/Optimizer/Dialect/FIRType.h"
+#include "flang/Optimizer/Dialect/Support/KindMapping.h"
+#include "flang/Optimizer/Transforms/Passes.h"
+#include "mlir/Dialect/Func/IR/FuncOps.h"
+#include "mlir/Dialect/OpenMP/OpenMPDialect.h"
+#include "mlir/IR/BuiltinDialect.h"
+#include "mlir/IR/BuiltinOps.h"
+#include "mlir/IR/Operation.h"
+#include "mlir/IR/SymbolTable.h"
+#include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
+#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/Frontend/OpenMP/OMPConstants.h"
+#include
+
+namespace fir {
+#define GEN_PASS_DEF_OMPMAPINFOFINALIZATIONPASS
+#include "flang/Optimizer/Transforms/Passes.h.inc"
+} // namespace fir
+
+namespace {
+class OMPMapInfoFinalizationPass
+: public fir::impl::OMPMapInfoFinalizationPassBase<
+ OMPMapInfoFinalizationPass> {
+
+ void genDescriptorMemberMaps(mlir::omp::MapInfoOp op,
+ fir::FirOpBuilder ,
+ mlir::Operation *target) {
+mlir::Location loc = op.getLoc();
+mlir::Value descriptor = op.getVarPtr();
+
+// If we enter this function, but the mapped type itself is not the
+// descriptor, then it's likely the address of the descriptor so we
+// must retrieve the descriptor SSA.
+if (!fir::isTypeWithDescriptor(op.getVarType())) {
+ if (auto addrOp = mlir::dyn_cast_if_present(
+ op.getVarPtr().getDefiningOp())) {
+descriptor = addrOp.getVal();
+ }
+}
+
+// The fir::BoxOffsetOp only works with !fir.ref> types, as
+// allowing it to access non-reference box operations can cause some
+// problematic SSA IR. However, in the case of assumed shape's the type
+// is not a !fir.ref, in these cases to retrieve the appropriate
+// !fir.ref> to access the data we need to map we must
+// perform an alloca and then store to it and retrieve the data from the
new
+// alloca.
+if (mlir::isa(descriptor.getType())) {
+ mlir::OpBuilder::InsertPoint insPt = builder.saveInsertionPoint();
+ builder.setInsertionPointToStart(builder.getAllocaBlock());
+ auto alloca = builder.create(loc, descriptor.getType());
+ builder.restoreInsertionPoint(insPt);
+ builder.create(loc, descriptor, alloca);
+ descriptor = alloca;
+}
+
+mlir::Value baseAddrAddr = builder.create(
+loc, descriptor, fir::BoxFieldAttr::base_addr);
+
+// Member of the descriptor pointing at the allocated data
+mlir::Value baseAddr = builder.create(
+loc, baseAddrAddr.getType(), descriptor,
+mlir::TypeAttr::get(llvm::cast(
+fir::unwrapRefType(baseAddrAddr.getType()))
+.getElementType()),
+baseAddrAddr, /*members=*/mlir::SmallVector{},
+/*member_index=*/mlir::DenseIntElementsAttr{}, op.getBounds(),
+builder.getIntegerAttr(builder.getIntegerType(64, false),
+ op.getMapType().value()),
+builder.getAttr(
+mlir::omp::VariableCaptureKind::ByRef),
+/*name=*/builder.getStringAttr(""),
+/*partial_map=*/builder.getBoolAttr(false));
+
+// TODO: map the addendum segment of the descriptor, similarly to the
+// above base address/data pointer member.
+
+if (auto mapClauseOwner =
+llvm::dyn_cast(target)) {
+ llvm::SmallVector newMapOps;
+ mlir::OperandRange mapOperandsArr = mapClauseOwner.getMapOperands();
+
+ for (size_t i = 0; i < mapOperandsArr.size(); ++i) {
+if (mapOperandsArr[i] ==
[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
@@ -88,6 +91,196 @@ void gatherFuncAndVarSyms(
symbolAndClause.emplace_back(clause, *object.id());
}
+mlir::omp::MapInfoOp
+createMapInfoOp(fir::FirOpBuilder , mlir::Location loc,
+mlir::Value baseAddr, mlir::Value varPtrPtr, std::string name,
+llvm::ArrayRef bounds,
+llvm::ArrayRef members,
+mlir::DenseIntElementsAttr membersIndex, uint64_t mapType,
+mlir::omp::VariableCaptureKind mapCaptureType, mlir::Type
retTy,
+bool partialMap) {
+ if (auto boxTy = baseAddr.getType().dyn_cast()) {
+baseAddr = builder.create(loc, baseAddr);
+retTy = baseAddr.getType();
+ }
+
+ mlir::TypeAttr varType = mlir::TypeAttr::get(
+ llvm::cast(retTy).getElementType());
+
+ mlir::omp::MapInfoOp op = builder.create(
+ loc, retTy, baseAddr, varType, varPtrPtr, members, membersIndex, bounds,
+ builder.getIntegerAttr(builder.getIntegerType(64, false), mapType),
+ builder.getAttr(mapCaptureType),
+ builder.getStringAttr(name), builder.getBoolAttr(partialMap));
+
+ return op;
+}
+
+static int
+getComponentPlacementInParent(const Fortran::semantics::Symbol *componentSym) {
+ const auto *derived =
+ componentSym->owner()
+ .derivedTypeSpec()
+ ->typeSymbol()
+ .detailsIf();
+ assert(derived &&
+ "expected derived type details when processing component symbol");
+ for (auto [placement, name] : llvm::enumerate(derived->componentNames()))
+if (name == componentSym->name())
+ return placement;
+ return -1;
+}
+
+static std::optional
+getComponentObject(std::optional object,
+ Fortran::semantics::SemanticsContext ) {
+ if (!object)
+return std::nullopt;
+
+ auto ref = evaluate::ExtractDataRef(*object.value().ref());
+ if (!ref)
+return std::nullopt;
+
+ if (std::holds_alternative(ref->u))
+return object;
+
+ auto baseObj = getBaseObject(object.value(), semaCtx);
+ if (!baseObj)
+return std::nullopt;
+
+ return getComponentObject(baseObj.value(), semaCtx);
+}
+
+void generateMemberPlacementIndices(
+const Object , llvm::SmallVectorImpl ,
+Fortran::semantics::SemanticsContext ) {
+ auto compObj = getComponentObject(object, semaCtx);
+ while (compObj) {
+indices.push_back(getComponentPlacementInParent(compObj->id()));
+compObj =
+getComponentObject(getBaseObject(compObj.value(), semaCtx), semaCtx);
+ }
+
+ indices = llvm::SmallVector{llvm::reverse(indices)};
+}
+
+static void calculateShapeAndFillIndices(
+llvm::SmallVectorImpl ,
+llvm::SmallVectorImpl ) {
+ shape.push_back(memberPlacementData.size());
+ size_t largestIndicesSize =
+ std::max_element(memberPlacementData.begin(), memberPlacementData.end(),
+ [](auto a, auto b) {
+ return a.memberPlacementIndices.size() <
+b.memberPlacementIndices.size();
+ })
+ ->memberPlacementIndices.size();
+ shape.push_back(largestIndicesSize);
+
+ // DenseElementsAttr expects a rectangular shape for the data, so all
+ // index lists have to be of the same length, this emplaces -1 as filler
+ for (auto : memberPlacementData) {
+if (v.memberPlacementIndices.size() < largestIndicesSize) {
+ auto *prevEnd = v.memberPlacementIndices.end();
+ v.memberPlacementIndices.resize(largestIndicesSize);
+ std::fill(prevEnd, v.memberPlacementIndices.end(), -1);
+}
+ }
+}
+
+static mlir::DenseIntElementsAttr createDenseElementsAttrFromIndices(
+llvm::SmallVectorImpl ,
+fir::FirOpBuilder ) {
+ llvm::SmallVector shape;
+ calculateShapeAndFillIndices(shape, memberPlacementData);
+
+ llvm::SmallVector indicesFlattened = std::accumulate(
+ memberPlacementData.begin(), memberPlacementData.end(),
+ llvm::SmallVector(),
+ [](llvm::SmallVector , OmpMapMemberIndicesData y) {
+x.insert(x.end(), y.memberPlacementIndices.begin(),
+ y.memberPlacementIndices.end());
+return x;
+ });
+
+ return mlir::DenseIntElementsAttr::get(
+ mlir::VectorType::get(shape,
+mlir::IntegerType::get(builder.getContext(), 32)),
+ indicesFlattened);
+}
+
+void insertChildMapInfoIntoParent(
+Fortran::lower::AbstractConverter ,
+std::map> ,
+llvm::SmallVectorImpl ,
+llvm::SmallVectorImpl ,
+llvm::SmallVectorImpl *mapSymTypes,
+llvm::SmallVectorImpl *mapSymLocs) {
+ for (auto indices : parentMemberIndices) {
+bool parentExists = false;
+size_t parentIdx;
+for (parentIdx = 0; parentIdx < mapSyms.size(); ++parentIdx) {
+ if (mapSyms[parentIdx] == indices.first) {
+parentExists = true;
+break;
+ }
+}
+
+if (parentExists) {
+ auto mapOp = llvm::cast(
+ mapOperands[parentIdx].getDefiningOp());
+
+ // NOTE: To maintain appropriate SSA ordering, we move
[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
@@ -0,0 +1,260 @@
+//===- OMPMapInfoFinalization.cpp
+//---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+//===--===//
+/// \file
+/// An OpenMP dialect related pass for FIR/HLFIR which performs some
+/// pre-processing of MapInfoOp's after the module has been lowered to
+/// finalize them.
+///
+/// For example, it expands MapInfoOp's containing descriptor related
+/// types (fir::BoxType's) into multiple MapInfoOp's containing the parent
+/// descriptor and pointer member components for individual mapping,
+/// treating the descriptor type as a record type for later lowering in the
+/// OpenMP dialect.
+///
+/// The pass also adds MapInfoOp's that are members of a parent object but are
+/// not directly used in the body of a target region to its BlockArgument list
+/// to maintain consistency across all MapInfoOp's tied to a region directly or
+/// indirectly via an parent object.
+//===--===//
+
+#include "flang/Optimizer/Builder/FIRBuilder.h"
+#include "flang/Optimizer/Dialect/FIRType.h"
+#include "flang/Optimizer/Dialect/Support/KindMapping.h"
+#include "flang/Optimizer/Transforms/Passes.h"
+#include "mlir/Dialect/Func/IR/FuncOps.h"
+#include "mlir/Dialect/OpenMP/OpenMPDialect.h"
+#include "mlir/IR/BuiltinDialect.h"
+#include "mlir/IR/BuiltinOps.h"
+#include "mlir/IR/Operation.h"
+#include "mlir/IR/SymbolTable.h"
+#include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
+#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/Frontend/OpenMP/OMPConstants.h"
+#include
+
+namespace fir {
+#define GEN_PASS_DEF_OMPMAPINFOFINALIZATIONPASS
+#include "flang/Optimizer/Transforms/Passes.h.inc"
+} // namespace fir
+
+namespace {
+class OMPMapInfoFinalizationPass
+: public fir::impl::OMPMapInfoFinalizationPassBase<
+ OMPMapInfoFinalizationPass> {
+
+ void genDescriptorMemberMaps(mlir::omp::MapInfoOp op,
+ fir::FirOpBuilder ,
+ mlir::Operation *target) {
+mlir::Location loc = op.getLoc();
+mlir::Value descriptor = op.getVarPtr();
+
+// If we enter this function, but the mapped type itself is not the
+// descriptor, then it's likely the address of the descriptor so we
+// must retrieve the descriptor SSA.
+if (!fir::isTypeWithDescriptor(op.getVarType())) {
+ if (auto addrOp = mlir::dyn_cast_if_present(
+ op.getVarPtr().getDefiningOp())) {
+descriptor = addrOp.getVal();
+ }
+}
+
+// The fir::BoxOffsetOp only works with !fir.ref> types, as
+// allowing it to access non-reference box operations can cause some
+// problematic SSA IR. However, in the case of assumed shape's the type
+// is not a !fir.ref, in these cases to retrieve the appropriate
+// !fir.ref> to access the data we need to map we must
+// perform an alloca and then store to it and retrieve the data from the
new
+// alloca.
+if (mlir::isa(descriptor.getType())) {
+ mlir::OpBuilder::InsertPoint insPt = builder.saveInsertionPoint();
+ builder.setInsertionPointToStart(builder.getAllocaBlock());
+ auto alloca = builder.create(loc, descriptor.getType());
+ builder.restoreInsertionPoint(insPt);
+ builder.create(loc, descriptor, alloca);
+ descriptor = alloca;
+}
+
+mlir::Value baseAddrAddr = builder.create(
+loc, descriptor, fir::BoxFieldAttr::base_addr);
+
+// Member of the descriptor pointing at the allocated data
+mlir::Value baseAddr = builder.create(
+loc, baseAddrAddr.getType(), descriptor,
+mlir::TypeAttr::get(llvm::cast(
+fir::unwrapRefType(baseAddrAddr.getType()))
+.getElementType()),
+baseAddrAddr, /*members=*/mlir::SmallVector{},
+/*member_index=*/mlir::DenseIntElementsAttr{}, op.getBounds(),
+builder.getIntegerAttr(builder.getIntegerType(64, false),
+ op.getMapType().value()),
+builder.getAttr(
+mlir::omp::VariableCaptureKind::ByRef),
+/*name=*/builder.getStringAttr(""),
+/*partial_map=*/builder.getBoolAttr(false));
+
+// TODO: map the addendum segment of the descriptor, similarly to the
+// above base address/data pointer member.
+
+if (auto mapClauseOwner =
+llvm::dyn_cast(target)) {
+ llvm::SmallVector newMapOps;
+ mlir::OperandRange mapOperandsArr = mapClauseOwner.getMapOperands();
+
+ for (size_t i = 0; i < mapOperandsArr.size(); ++i) {
+if (mapOperandsArr[i] ==
[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
@@ -218,17 +224,40 @@ bool ClauseProcessor::processMotionClauses(
// Explicit map captures are captured ByRef by default,
// optimisation passes may alter this to ByCopy or other capture
// types to optimise
- mlir::Value mapOp = createMapInfoOp(
- firOpBuilder, clauseLocation, symAddr, mlir::Value{},
- asFortran.str(), bounds, {},
+ mlir::omp::MapInfoOp mapOp = createMapInfoOp(
+ firOpBuilder, clauseLocation, symAddr,
+ /*varPtrPtr=*/mlir::Value{}, asFortran.str(), bounds,
+ /*members=*/{}, /*membersIndex=*/mlir::DenseIntElementsAttr{},
static_cast<
std::underlying_type_t>(
mapTypeBits),
mlir::omp::VariableCaptureKind::ByRef, symAddr.getType());
- result.mapVars.push_back(mapOp);
+ if (object.id()->owner().IsDerivedType()) {
+std::optional dataRef =
jsjodin wrote:
Would it be possible to create a function for the code inside the 'if'? It
seems like the same code exists above.
https://github.com/llvm/llvm-project/pull/82853
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[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
@@ -0,0 +1,260 @@ +//===- OMPMapInfoFinalization.cpp +//---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===--===// + +//===--===// +/// \file +/// An OpenMP dialect related pass for FIR/HLFIR which performs some +/// pre-processing of MapInfoOp's after the module has been lowered to +/// finalize them. +/// +/// For example, it expands MapInfoOp's containing descriptor related +/// types (fir::BoxType's) into multiple MapInfoOp's containing the parent +/// descriptor and pointer member components for individual mapping, +/// treating the descriptor type as a record type for later lowering in the +/// OpenMP dialect. +/// +/// The pass also adds MapInfoOp's that are members of a parent object but are +/// not directly used in the body of a target region to its BlockArgument list +/// to maintain consistency across all MapInfoOp's tied to a region directly or +/// indirectly via an parent object. jsjodin wrote: Nit: an -> a https://github.com/llvm/llvm-project/pull/82853 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
https://github.com/jsjodin edited https://github.com/llvm/llvm-project/pull/82853 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] [compiler-rt] Revise IDE folder structure (PR #89753)
@@ -89,15 +89,15 @@ function(add_compiler_rt_object_libraries name)
"${libname}" MATCHES ".*\.osx.*")
foreach(arch ${LIB_ARCHS_${libname}})
list(APPEND target_flags
- "SHELL:-target ${arch}-apple-macos${DARWIN_osx_MIN_VER}
-darwin-target-variant ${arch}-apple-ios13.1-macabi")
+ "SHELL:-target ${arch}-apple-macos${DARWIN_osx_MIN_V357ER}
-darwin-target-variant ${arch}-apple-ios13.1-macabi")
Meinersbur wrote:
This was not intentional. It is possible that I was trying to jump to line 357
and instead typed into the edited. I always look for unnecessary changes before
pushing but seem to have missed this one.
Thanks for noticing.
https://github.com/llvm/llvm-project/pull/89753
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[llvm-branch-commits] [compiler-rt] [compiler-rt] Revise IDE folder structure (PR #89753)
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/89753
>From 19ef183fcfb44fa8b9bae34bdc8eafb8d2425722 Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Tue, 23 Apr 2024 13:15:38 +0200
Subject: [PATCH 1/2] [compiler-rt] Revise IDE folder structure
---
compiler-rt/CMakeLists.txt| 3 ++-
compiler-rt/cmake/Modules/AddCompilerRT.cmake | 21 ++-
.../cmake/Modules/CompilerRTDarwinUtils.cmake | 4 ++--
.../cmake/Modules/CompilerRTUtils.cmake | 4 ++--
compiler-rt/cmake/base-config-ix.cmake| 4 ++--
compiler-rt/include/CMakeLists.txt| 2 +-
compiler-rt/lib/asan/tests/CMakeLists.txt | 8 +++
compiler-rt/lib/builtins/CMakeLists.txt | 2 +-
compiler-rt/lib/fuzzer/tests/CMakeLists.txt | 6 +++---
compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 4 ++--
.../lib/interception/tests/CMakeLists.txt | 4 ++--
compiler-rt/lib/memprof/tests/CMakeLists.txt | 4 ++--
compiler-rt/lib/orc/tests/CMakeLists.txt | 6 +++---
.../lib/sanitizer_common/tests/CMakeLists.txt | 4 ++--
compiler-rt/lib/stats/CMakeLists.txt | 2 +-
compiler-rt/lib/tsan/CMakeLists.txt | 2 +-
compiler-rt/lib/tsan/dd/CMakeLists.txt| 2 +-
compiler-rt/lib/tsan/rtl/CMakeLists.txt | 2 +-
compiler-rt/lib/xray/tests/CMakeLists.txt | 4 ++--
compiler-rt/test/CMakeLists.txt | 1 +
compiler-rt/test/asan/CMakeLists.txt | 3 ---
compiler-rt/test/asan_abi/CMakeLists.txt | 1 -
compiler-rt/test/builtins/CMakeLists.txt | 1 -
compiler-rt/test/cfi/CMakeLists.txt | 3 ---
compiler-rt/test/dfsan/CMakeLists.txt | 1 -
compiler-rt/test/fuzzer/CMakeLists.txt| 1 -
compiler-rt/test/gwp_asan/CMakeLists.txt | 1 -
compiler-rt/test/hwasan/CMakeLists.txt| 2 --
compiler-rt/test/interception/CMakeLists.txt | 1 -
compiler-rt/test/lsan/CMakeLists.txt | 1 -
compiler-rt/test/memprof/CMakeLists.txt | 3 ---
compiler-rt/test/metadata/CMakeLists.txt | 1 -
compiler-rt/test/msan/CMakeLists.txt | 1 -
compiler-rt/test/orc/CMakeLists.txt | 1 -
compiler-rt/test/profile/CMakeLists.txt | 1 -
compiler-rt/test/safestack/CMakeLists.txt | 1 -
.../test/sanitizer_common/CMakeLists.txt | 2 --
.../test/shadowcallstack/CMakeLists.txt | 1 -
compiler-rt/test/tsan/CMakeLists.txt | 1 -
compiler-rt/test/ubsan/CMakeLists.txt | 2 --
compiler-rt/test/ubsan_minimal/CMakeLists.txt | 1 -
compiler-rt/test/xray/CMakeLists.txt | 1 -
42 files changed, 46 insertions(+), 74 deletions(-)
diff --git a/compiler-rt/CMakeLists.txt b/compiler-rt/CMakeLists.txt
index 6ce451e3cac2e3..65063e0057bbca 100644
--- a/compiler-rt/CMakeLists.txt
+++ b/compiler-rt/CMakeLists.txt
@@ -4,6 +4,7 @@
# based on the ability of the host toolchain to target various platforms.
cmake_minimum_required(VERSION 3.20.0)
+set(LLVM_SUBPROJECT_TITLE "Compiler-RT")
if(NOT DEFINED LLVM_COMMON_CMAKE_UTILS)
set(LLVM_COMMON_CMAKE_UTILS ${CMAKE_CURRENT_SOURCE_DIR}/../cmake)
@@ -90,7 +91,7 @@ if (COMPILER_RT_STANDALONE_BUILD)
if (TARGET intrinsics_gen)
# Loading the llvm config causes this target to be imported so place it
# under the appropriate folder in an IDE.
-set_target_properties(intrinsics_gen PROPERTIES FOLDER "Compiler-RT Misc")
+set_target_properties(intrinsics_gen PROPERTIES FOLDER "LLVM/Tablegenning")
endif()
find_package(Python3 COMPONENTS Interpreter)
diff --git a/compiler-rt/cmake/Modules/AddCompilerRT.cmake
b/compiler-rt/cmake/Modules/AddCompilerRT.cmake
index 6e0d9dbff65a9e..61c727b36bff30 100644
--- a/compiler-rt/cmake/Modules/AddCompilerRT.cmake
+++ b/compiler-rt/cmake/Modules/AddCompilerRT.cmake
@@ -89,7 +89,7 @@ function(add_compiler_rt_object_libraries name)
"${libname}" MATCHES ".*\.osx.*")
foreach(arch ${LIB_ARCHS_${libname}})
list(APPEND target_flags
- "SHELL:-target ${arch}-apple-macos${DARWIN_osx_MIN_VER}
-darwin-target-variant ${arch}-apple-ios13.1-macabi")
+ "SHELL:-target ${arch}-apple-macos${DARWIN_osx_MIN_V357ER}
-darwin-target-variant ${arch}-apple-ios13.1-macabi")
endforeach()
endif()
@@ -97,7 +97,7 @@ function(add_compiler_rt_object_libraries name)
${extra_cflags_${libname}} ${target_flags})
set_property(TARGET ${libname} APPEND PROPERTY
COMPILE_DEFINITIONS ${LIB_DEFS})
-set_target_properties(${libname} PROPERTIES FOLDER "Compiler-RT Libraries")
+set_target_properties(${libname} PROPERTIES FOLDER "Compiler-RT/Libraries")
if(APPLE)
set_target_properties(${libname} PROPERTIES
OSX_ARCHITECTURES "${LIB_ARCHS_${libname}}")
@@ -116,7 +116,7 @@ endmacro()
function(add_compiler_rt_component name)
add_custom_target(${name})
- set_target_properties(${name} PROPERTIES FOLDER "Compiler-RT Misc")
+
[llvm-branch-commits] [flang] [flang][OpenMP] Pass symTable to all genXYZ functions, NFC (PR #90090)
https://github.com/skatrak approved this pull request. LGTM, thanks! https://github.com/llvm/llvm-project/pull/90090 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][OpenMP] Implement getIterationVariableSymbol helper function,… (PR #90087)
https://github.com/skatrak edited https://github.com/llvm/llvm-project/pull/90087 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][OpenMP] Implement getIterationVariableSymbol helper function,… (PR #90087)
@@ -87,6 +88,27 @@ mlir::Type getLoopVarType(Fortran::lower::AbstractConverter
,
return converter.getFirOpBuilder().getIntegerType(loopVarTypeSize);
}
+Fortran::semantics::Symbol *
+getIterationVariableSymbol(const Fortran::lower::pft::Evaluation ) {
skatrak wrote:
Nit: Since it's not really OpenMP-specific, maybe
flang/include/flang/Lower/Support/Utils.h would be a better place to put it,
though that would probably require adding the corresponding .cpp file (that
header currently only has inline definitions). I'll leave it up to you to do
that, find a more suitable spot or just leave it where it is.
https://github.com/llvm/llvm-project/pull/90087
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[llvm-branch-commits] [flang] [flang][OpenMP] Implement getIterationVariableSymbol helper function,… (PR #90087)
https://github.com/skatrak approved this pull request. Thank you, LGTM. Just a small comment. https://github.com/llvm/llvm-project/pull/90087 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Fix gfx12 waitcnt type for image_msaa_load (#90201) (PR #90582)
https://github.com/jayfoad converted_to_draft https://github.com/llvm/llvm-project/pull/90582 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Fix gfx12 waitcnt type for image_msaa_load (#90201) (PR #90582)
jayfoad wrote: Let's not backport this yet since @pendingchaos has pointed out a problem with #90201. https://github.com/llvm/llvm-project/pull/90582 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Fix gfx12 waitcnt type for image_msaa_load (#90201) (PR #90582)
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Jay Foad (jayfoad)
Changes
image_msaa_load is actually encoded as a VSAMPLE instruction and
requires the appropriate waitcnt variant.
---
Full diff: https://github.com/llvm/llvm-project/pull/90582.diff
2 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp (+6-2)
- (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll (+13-13)
``diff
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 6ecb1c8bf6e1db..97c55e4d9e41c2 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -187,8 +187,12 @@ VmemType getVmemType(const MachineInstr ) {
const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(Inst.getOpcode());
const AMDGPU::MIMGBaseOpcodeInfo *BaseInfo =
AMDGPU::getMIMGBaseOpcodeInfo(Info->BaseOpcode);
- return BaseInfo->BVH ? VMEM_BVH
- : BaseInfo->Sampler ? VMEM_SAMPLER : VMEM_NOSAMPLER;
+ // The test for MSAA here is because gfx12+ image_msaa_load is actually
+ // encoded as VSAMPLE and requires the appropriate s_waitcnt variant for
that.
+ // Pre-gfx12 doesn't care since all vmem types result in the same s_waitcnt.
+ return BaseInfo->BVH ? VMEM_BVH
+ : BaseInfo->Sampler || BaseInfo->MSAA ? VMEM_SAMPLER
+ : VMEM_NOSAMPLER;
}
unsigned (AMDGPU::Waitcnt , InstCounterType T) {
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
index 1348315e72e7bc..8da48551855570 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
@@ -12,7 +12,7 @@ define amdgpu_ps <4 x float> @load_2dmsaa(<8 x i32> inreg
%rsrc, i32 %s, i32 %t,
; GFX12-LABEL: load_2dmsaa:
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:3], [v0, v1, v2], s[0:7] dmask:0x1
dim:SQ_RSRC_IMG_2D_MSAA unorm ; encoding:
[0x06,0x20,0x46,0xe4,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x00]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:; return to shader part epilog
main_body:
%v = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32(i32 1,
i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
@@ -32,7 +32,7 @@ define amdgpu_ps <4 x float> @load_2dmsaa_both(<8 x i32>
inreg %rsrc, ptr addrsp
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:4], [v0, v1, v2], s[0:7] dmask:0x2
dim:SQ_RSRC_IMG_2D_MSAA unorm tfe lwe ; encoding:
[0x0e,0x20,0x86,0xe4,0x00,0x01,0x00,0x00,0x00,0x01,0x02,0x00]
; GFX12-NEXT:v_mov_b32_e32 v5, 0 ; encoding: [0x80,0x02,0x0a,0x7e]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:global_store_b32 v5, v4, s[8:9] ; encoding:
[0x08,0x80,0x06,0xee,0x00,0x00,0x00,0x02,0x05,0x00,0x00,0x00]
; GFX12-NEXT:; return to shader part epilog
main_body:
@@ -53,7 +53,7 @@ define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32>
inreg %rsrc, i32 %s, i3
; GFX12-LABEL: load_2darraymsaa:
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:3], [v0, v1, v2, v3], s[0:7] dmask:0x4
dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm ; encoding:
[0x07,0x20,0x06,0xe5,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x03]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:; return to shader part epilog
main_body:
%v = call <4 x float> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32.i32(i32
4, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
@@ -73,7 +73,7 @@ define amdgpu_ps <4 x float> @load_2darraymsaa_tfe(<8 x i32>
inreg %rsrc, ptr ad
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:4], [v0, v1, v2, v3], s[0:7] dmask:0x8
dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm tfe ; encoding:
[0x0f,0x20,0x06,0xe6,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x03]
; GFX12-NEXT:v_mov_b32_e32 v5, 0 ; encoding: [0x80,0x02,0x0a,0x7e]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:global_store_b32 v5, v4, s[8:9] ; encoding:
[0x08,0x80,0x06,0xee,0x00,0x00,0x00,0x02,0x05,0x00,0x00,0x00]
; GFX12-NEXT:; return to shader part epilog
main_body:
@@ -94,7 +94,7 @@ define amdgpu_ps <4 x float> @load_2dmsaa_glc(<8 x i32> inreg
%rsrc, i32 %s, i32
; GFX12-LABEL: load_2dmsaa_glc:
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:3], [v0, v1, v2], s[0:7] dmask:0x1
dim:SQ_RSRC_IMG_2D_MSAA unorm th:TH_LOAD_NT ;
[llvm-branch-commits] [llvm] [AMDGPU] Fix gfx12 waitcnt type for image_msaa_load (#90201) (PR #90582)
https://github.com/jayfoad milestoned https://github.com/llvm/llvm-project/pull/90582 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Fix gfx12 waitcnt type for image_msaa_load (#90201) (PR #90582)
https://github.com/jayfoad created
https://github.com/llvm/llvm-project/pull/90582
image_msaa_load is actually encoded as a VSAMPLE instruction and
requires the appropriate waitcnt variant.
>From 17b75a9517891d662e677a357713c920bb79c43c Mon Sep 17 00:00:00 2001
From: David Stuttard
Date: Tue, 30 Apr 2024 10:41:51 +0100
Subject: [PATCH] [AMDGPU] Fix gfx12 waitcnt type for image_msaa_load (#90201)
image_msaa_load is actually encoded as a VSAMPLE instruction and
requires the appropriate waitcnt variant.
---
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 8 --
.../AMDGPU/llvm.amdgcn.image.msaa.load.ll | 26 +--
2 files changed, 19 insertions(+), 15 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 6ecb1c8bf6e1db..97c55e4d9e41c2 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -187,8 +187,12 @@ VmemType getVmemType(const MachineInstr ) {
const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(Inst.getOpcode());
const AMDGPU::MIMGBaseOpcodeInfo *BaseInfo =
AMDGPU::getMIMGBaseOpcodeInfo(Info->BaseOpcode);
- return BaseInfo->BVH ? VMEM_BVH
- : BaseInfo->Sampler ? VMEM_SAMPLER : VMEM_NOSAMPLER;
+ // The test for MSAA here is because gfx12+ image_msaa_load is actually
+ // encoded as VSAMPLE and requires the appropriate s_waitcnt variant for
that.
+ // Pre-gfx12 doesn't care since all vmem types result in the same s_waitcnt.
+ return BaseInfo->BVH ? VMEM_BVH
+ : BaseInfo->Sampler || BaseInfo->MSAA ? VMEM_SAMPLER
+ : VMEM_NOSAMPLER;
}
unsigned (AMDGPU::Waitcnt , InstCounterType T) {
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
index 1348315e72e7bc..8da48551855570 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
@@ -12,7 +12,7 @@ define amdgpu_ps <4 x float> @load_2dmsaa(<8 x i32> inreg
%rsrc, i32 %s, i32 %t,
; GFX12-LABEL: load_2dmsaa:
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:3], [v0, v1, v2], s[0:7] dmask:0x1
dim:SQ_RSRC_IMG_2D_MSAA unorm ; encoding:
[0x06,0x20,0x46,0xe4,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x00]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:; return to shader part epilog
main_body:
%v = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32(i32 1,
i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
@@ -32,7 +32,7 @@ define amdgpu_ps <4 x float> @load_2dmsaa_both(<8 x i32>
inreg %rsrc, ptr addrsp
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:4], [v0, v1, v2], s[0:7] dmask:0x2
dim:SQ_RSRC_IMG_2D_MSAA unorm tfe lwe ; encoding:
[0x0e,0x20,0x86,0xe4,0x00,0x01,0x00,0x00,0x00,0x01,0x02,0x00]
; GFX12-NEXT:v_mov_b32_e32 v5, 0 ; encoding: [0x80,0x02,0x0a,0x7e]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:global_store_b32 v5, v4, s[8:9] ; encoding:
[0x08,0x80,0x06,0xee,0x00,0x00,0x00,0x02,0x05,0x00,0x00,0x00]
; GFX12-NEXT:; return to shader part epilog
main_body:
@@ -53,7 +53,7 @@ define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32>
inreg %rsrc, i32 %s, i3
; GFX12-LABEL: load_2darraymsaa:
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:3], [v0, v1, v2, v3], s[0:7] dmask:0x4
dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm ; encoding:
[0x07,0x20,0x06,0xe5,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x03]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:; return to shader part epilog
main_body:
%v = call <4 x float> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32.i32(i32
4, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
@@ -73,7 +73,7 @@ define amdgpu_ps <4 x float> @load_2darraymsaa_tfe(<8 x i32>
inreg %rsrc, ptr ad
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:4], [v0, v1, v2, v3], s[0:7] dmask:0x8
dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm tfe ; encoding:
[0x0f,0x20,0x06,0xe6,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x03]
; GFX12-NEXT:v_mov_b32_e32 v5, 0 ; encoding: [0x80,0x02,0x0a,0x7e]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:global_store_b32 v5, v4, s[8:9] ; encoding:
[0x08,0x80,0x06,0xee,0x00,0x00,0x00,0x02,0x05,0x00,0x00,0x00]
; GFX12-NEXT:; return to shader part epilog
main_body:
@@ -94,7 +94,7 @@ define amdgpu_ps <4 x float>
[llvm-branch-commits] [clang] [LoongArch][Codegen] Add support for TLSDESC (PR #90159)
https://github.com/wangleiat updated
https://github.com/llvm/llvm-project/pull/90159
>From cd57d28d88e2ccd85ff2c96c07d13c7654265209 Mon Sep 17 00:00:00 2001
From: wanglei
Date: Tue, 30 Apr 2024 14:29:08 +0800
Subject: [PATCH] Add test to clang/test/Driver/tls-dialect.c
Created using spr 1.3.4
---
clang/test/Driver/tls-dialect.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c
index a808dd81531ce7..3471b55b0ebae9 100644
--- a/clang/test/Driver/tls-dialect.c
+++ b/clang/test/Driver/tls-dialect.c
@@ -1,3 +1,5 @@
+// RUN: %clang -### --target=loongarch64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
+// RUN: %clang -### --target=loongarch64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-freebsd -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=DESC %s
// RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
@@ -9,6 +11,8 @@
// RUN: %clang -### --target=riscv64-android %s 2>&1 | FileCheck
--check-prefix=DESC %s
/// LTO
+// RUN: %clang -### --target=loongarch64-linux -flto -mtls-dialect=desc %s
2>&1 | FileCheck --check-prefix=LTO-DESC %s
+// RUN: %clang -### --target=loongarch64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
// RUN: %clang -### --target=riscv64-linux -flto -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=LTO-DESC %s
// RUN: %clang -### --target=riscv64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
@@ -18,6 +22,7 @@
// RUN: not %clang --target=x86_64-apple-macos -mtls-dialect=desc -flto %s
2>&1 | FileCheck -check-prefix=UNSUPPORTED-TARGET %s
/// Unsupported argument
+// RUN: not %clang -### --target=loongarch64-linux -mtls-dialect=gnu2 %s 2>&1
| FileCheck --check-prefix=UNSUPPORTED-ARG %s
// RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 |
FileCheck --check-prefix=UNSUPPORTED-ARG %s
// DESC: "-cc1" {{.*}}"-enable-tlsdesc"
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [LoongArch][Codegen] Add support for TLSDESC (PR #90159)
https://github.com/wangleiat updated
https://github.com/llvm/llvm-project/pull/90159
>From cd57d28d88e2ccd85ff2c96c07d13c7654265209 Mon Sep 17 00:00:00 2001
From: wanglei
Date: Tue, 30 Apr 2024 14:29:08 +0800
Subject: [PATCH] Add test to clang/test/Driver/tls-dialect.c
Created using spr 1.3.4
---
clang/test/Driver/tls-dialect.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c
index a808dd81531ce7..3471b55b0ebae9 100644
--- a/clang/test/Driver/tls-dialect.c
+++ b/clang/test/Driver/tls-dialect.c
@@ -1,3 +1,5 @@
+// RUN: %clang -### --target=loongarch64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
+// RUN: %clang -### --target=loongarch64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-freebsd -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=DESC %s
// RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
@@ -9,6 +11,8 @@
// RUN: %clang -### --target=riscv64-android %s 2>&1 | FileCheck
--check-prefix=DESC %s
/// LTO
+// RUN: %clang -### --target=loongarch64-linux -flto -mtls-dialect=desc %s
2>&1 | FileCheck --check-prefix=LTO-DESC %s
+// RUN: %clang -### --target=loongarch64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
// RUN: %clang -### --target=riscv64-linux -flto -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=LTO-DESC %s
// RUN: %clang -### --target=riscv64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
@@ -18,6 +22,7 @@
// RUN: not %clang --target=x86_64-apple-macos -mtls-dialect=desc -flto %s
2>&1 | FileCheck -check-prefix=UNSUPPORTED-TARGET %s
/// Unsupported argument
+// RUN: not %clang -### --target=loongarch64-linux -mtls-dialect=gnu2 %s 2>&1
| FileCheck --check-prefix=UNSUPPORTED-ARG %s
// RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 |
FileCheck --check-prefix=UNSUPPORTED-ARG %s
// DESC: "-cc1" {{.*}}"-enable-tlsdesc"
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [LoongArch][Codegen] Add support for TLSDESC (PR #90159)
https://github.com/wangleiat updated
https://github.com/llvm/llvm-project/pull/90159
>From cd57d28d88e2ccd85ff2c96c07d13c7654265209 Mon Sep 17 00:00:00 2001
From: wanglei
Date: Tue, 30 Apr 2024 14:29:08 +0800
Subject: [PATCH] Add test to clang/test/Driver/tls-dialect.c
Created using spr 1.3.4
---
clang/test/Driver/tls-dialect.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c
index a808dd81531ce7..3471b55b0ebae9 100644
--- a/clang/test/Driver/tls-dialect.c
+++ b/clang/test/Driver/tls-dialect.c
@@ -1,3 +1,5 @@
+// RUN: %clang -### --target=loongarch64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
+// RUN: %clang -### --target=loongarch64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-freebsd -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=DESC %s
// RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
@@ -9,6 +11,8 @@
// RUN: %clang -### --target=riscv64-android %s 2>&1 | FileCheck
--check-prefix=DESC %s
/// LTO
+// RUN: %clang -### --target=loongarch64-linux -flto -mtls-dialect=desc %s
2>&1 | FileCheck --check-prefix=LTO-DESC %s
+// RUN: %clang -### --target=loongarch64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
// RUN: %clang -### --target=riscv64-linux -flto -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=LTO-DESC %s
// RUN: %clang -### --target=riscv64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
@@ -18,6 +22,7 @@
// RUN: not %clang --target=x86_64-apple-macos -mtls-dialect=desc -flto %s
2>&1 | FileCheck -check-prefix=UNSUPPORTED-TARGET %s
/// Unsupported argument
+// RUN: not %clang -### --target=loongarch64-linux -mtls-dialect=gnu2 %s 2>&1
| FileCheck --check-prefix=UNSUPPORTED-ARG %s
// RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 |
FileCheck --check-prefix=UNSUPPORTED-ARG %s
// DESC: "-cc1" {{.*}}"-enable-tlsdesc"
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [LoongArch][Codegen] Add support for TLSDESC (PR #90159)
https://github.com/wangleiat updated
https://github.com/llvm/llvm-project/pull/90159
>From cd57d28d88e2ccd85ff2c96c07d13c7654265209 Mon Sep 17 00:00:00 2001
From: wanglei
Date: Tue, 30 Apr 2024 14:29:08 +0800
Subject: [PATCH] Add test to clang/test/Driver/tls-dialect.c
Created using spr 1.3.4
---
clang/test/Driver/tls-dialect.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c
index a808dd81531ce7..3471b55b0ebae9 100644
--- a/clang/test/Driver/tls-dialect.c
+++ b/clang/test/Driver/tls-dialect.c
@@ -1,3 +1,5 @@
+// RUN: %clang -### --target=loongarch64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
+// RUN: %clang -### --target=loongarch64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-freebsd -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=DESC %s
// RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
@@ -9,6 +11,8 @@
// RUN: %clang -### --target=riscv64-android %s 2>&1 | FileCheck
--check-prefix=DESC %s
/// LTO
+// RUN: %clang -### --target=loongarch64-linux -flto -mtls-dialect=desc %s
2>&1 | FileCheck --check-prefix=LTO-DESC %s
+// RUN: %clang -### --target=loongarch64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
// RUN: %clang -### --target=riscv64-linux -flto -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=LTO-DESC %s
// RUN: %clang -### --target=riscv64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
@@ -18,6 +22,7 @@
// RUN: not %clang --target=x86_64-apple-macos -mtls-dialect=desc -flto %s
2>&1 | FileCheck -check-prefix=UNSUPPORTED-TARGET %s
/// Unsupported argument
+// RUN: not %clang -### --target=loongarch64-linux -mtls-dialect=gnu2 %s 2>&1
| FileCheck --check-prefix=UNSUPPORTED-ARG %s
// RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 |
FileCheck --check-prefix=UNSUPPORTED-ARG %s
// DESC: "-cc1" {{.*}}"-enable-tlsdesc"
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [LoongArch][Codegen] Add support for TLSDESC (PR #90159)
https://github.com/wangleiat updated
https://github.com/llvm/llvm-project/pull/90159
>From cd57d28d88e2ccd85ff2c96c07d13c7654265209 Mon Sep 17 00:00:00 2001
From: wanglei
Date: Tue, 30 Apr 2024 14:29:08 +0800
Subject: [PATCH] Add test to clang/test/Driver/tls-dialect.c
Created using spr 1.3.4
---
clang/test/Driver/tls-dialect.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c
index a808dd81531ce7..3471b55b0ebae9 100644
--- a/clang/test/Driver/tls-dialect.c
+++ b/clang/test/Driver/tls-dialect.c
@@ -1,3 +1,5 @@
+// RUN: %clang -### --target=loongarch64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
+// RUN: %clang -### --target=loongarch64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-freebsd -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=DESC %s
// RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
@@ -9,6 +11,8 @@
// RUN: %clang -### --target=riscv64-android %s 2>&1 | FileCheck
--check-prefix=DESC %s
/// LTO
+// RUN: %clang -### --target=loongarch64-linux -flto -mtls-dialect=desc %s
2>&1 | FileCheck --check-prefix=LTO-DESC %s
+// RUN: %clang -### --target=loongarch64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
// RUN: %clang -### --target=riscv64-linux -flto -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=LTO-DESC %s
// RUN: %clang -### --target=riscv64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
@@ -18,6 +22,7 @@
// RUN: not %clang --target=x86_64-apple-macos -mtls-dialect=desc -flto %s
2>&1 | FileCheck -check-prefix=UNSUPPORTED-TARGET %s
/// Unsupported argument
+// RUN: not %clang -### --target=loongarch64-linux -mtls-dialect=gnu2 %s 2>&1
| FileCheck --check-prefix=UNSUPPORTED-ARG %s
// RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 |
FileCheck --check-prefix=UNSUPPORTED-ARG %s
// DESC: "-cc1" {{.*}}"-enable-tlsdesc"
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [LoongArch][Codegen] Add support for TLSDESC (PR #90159)
https://github.com/wangleiat updated
https://github.com/llvm/llvm-project/pull/90159
>From cd57d28d88e2ccd85ff2c96c07d13c7654265209 Mon Sep 17 00:00:00 2001
From: wanglei
Date: Tue, 30 Apr 2024 14:29:08 +0800
Subject: [PATCH] Add test to clang/test/Driver/tls-dialect.c
Created using spr 1.3.4
---
clang/test/Driver/tls-dialect.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c
index a808dd81531ce7..3471b55b0ebae9 100644
--- a/clang/test/Driver/tls-dialect.c
+++ b/clang/test/Driver/tls-dialect.c
@@ -1,3 +1,5 @@
+// RUN: %clang -### --target=loongarch64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
+// RUN: %clang -### --target=loongarch64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-freebsd -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=DESC %s
// RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
@@ -9,6 +11,8 @@
// RUN: %clang -### --target=riscv64-android %s 2>&1 | FileCheck
--check-prefix=DESC %s
/// LTO
+// RUN: %clang -### --target=loongarch64-linux -flto -mtls-dialect=desc %s
2>&1 | FileCheck --check-prefix=LTO-DESC %s
+// RUN: %clang -### --target=loongarch64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
// RUN: %clang -### --target=riscv64-linux -flto -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=LTO-DESC %s
// RUN: %clang -### --target=riscv64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
@@ -18,6 +22,7 @@
// RUN: not %clang --target=x86_64-apple-macos -mtls-dialect=desc -flto %s
2>&1 | FileCheck -check-prefix=UNSUPPORTED-TARGET %s
/// Unsupported argument
+// RUN: not %clang -### --target=loongarch64-linux -mtls-dialect=gnu2 %s 2>&1
| FileCheck --check-prefix=UNSUPPORTED-ARG %s
// RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 |
FileCheck --check-prefix=UNSUPPORTED-ARG %s
// DESC: "-cc1" {{.*}}"-enable-tlsdesc"
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [LoongArch][Codegen] Add support for TLSDESC (PR #90159)
https://github.com/wangleiat updated
https://github.com/llvm/llvm-project/pull/90159
>From cd57d28d88e2ccd85ff2c96c07d13c7654265209 Mon Sep 17 00:00:00 2001
From: wanglei
Date: Tue, 30 Apr 2024 14:29:08 +0800
Subject: [PATCH] Add test to clang/test/Driver/tls-dialect.c
Created using spr 1.3.4
---
clang/test/Driver/tls-dialect.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/clang/test/Driver/tls-dialect.c b/clang/test/Driver/tls-dialect.c
index a808dd81531ce7..3471b55b0ebae9 100644
--- a/clang/test/Driver/tls-dialect.c
+++ b/clang/test/Driver/tls-dialect.c
@@ -1,3 +1,5 @@
+// RUN: %clang -### --target=loongarch64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
+// RUN: %clang -### --target=loongarch64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-freebsd -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=DESC %s
// RUN: %clang -### --target=riscv64-linux -mtls-dialect=trad %s 2>&1 |
FileCheck --check-prefix=NODESC %s
// RUN: %clang -### --target=riscv64-linux %s 2>&1 | FileCheck
--check-prefix=NODESC %s
@@ -9,6 +11,8 @@
// RUN: %clang -### --target=riscv64-android %s 2>&1 | FileCheck
--check-prefix=DESC %s
/// LTO
+// RUN: %clang -### --target=loongarch64-linux -flto -mtls-dialect=desc %s
2>&1 | FileCheck --check-prefix=LTO-DESC %s
+// RUN: %clang -### --target=loongarch64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
// RUN: %clang -### --target=riscv64-linux -flto -mtls-dialect=desc %s 2>&1 |
FileCheck --check-prefix=LTO-DESC %s
// RUN: %clang -### --target=riscv64-linux -flto %s 2>&1 | FileCheck
--check-prefix=LTO-NODESC %s
@@ -18,6 +22,7 @@
// RUN: not %clang --target=x86_64-apple-macos -mtls-dialect=desc -flto %s
2>&1 | FileCheck -check-prefix=UNSUPPORTED-TARGET %s
/// Unsupported argument
+// RUN: not %clang -### --target=loongarch64-linux -mtls-dialect=gnu2 %s 2>&1
| FileCheck --check-prefix=UNSUPPORTED-ARG %s
// RUN: not %clang -### --target=riscv64-linux -mtls-dialect=gnu2 %s 2>&1 |
FileCheck --check-prefix=UNSUPPORTED-ARG %s
// DESC: "-cc1" {{.*}}"-enable-tlsdesc"
___
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https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
