[llvm-branch-commits] [clang] 4c77a0f - [PowerPC] NFC: Apply minor clang-format fix
Author: Brandon Bergren Date: 2021-01-02T12:21:28-06:00 New Revision: 4c77a0f1ce6f950805f567ff6505f7c18e62e288 URL: https://github.com/llvm/llvm-project/commit/4c77a0f1ce6f950805f567ff6505f7c18e62e288 DIFF: https://github.com/llvm/llvm-project/commit/4c77a0f1ce6f950805f567ff6505f7c18e62e288.diff LOG: [PowerPC] NFC: Apply minor clang-format fix Added: Modified: clang/lib/Driver/ToolChains/Linux.cpp Removed: diff --git a/clang/lib/Driver/ToolChains/Linux.cpp b/clang/lib/Driver/ToolChains/Linux.cpp index 74d4c245aa74..9663a7390ada 100644 --- a/clang/lib/Driver/ToolChains/Linux.cpp +++ b/clang/lib/Driver/ToolChains/Linux.cpp @@ -198,8 +198,7 @@ static StringRef getOSLibDir(const llvm::Triple &Triple, const ArgList &Args) { // FIXME: This is a bit of a hack. We should really unify this code for // reasoning about oslibdir spellings with the lib dir spellings in the // GCCInstallationDetector, but that is a more significant refactoring. - if (Triple.getArch() == llvm::Triple::x86 || - Triple.isPPC32() || + if (Triple.getArch() == llvm::Triple::x86 || Triple.isPPC32() || Triple.getArch() == llvm::Triple::sparc) return "lib32"; ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 2288319 - [PowerPC] Enable OpenMP for powerpcle target. [5/5]
Author: Brandon Bergren Date: 2021-01-02T12:18:07-06:00 New Revision: 2288319733cd5f525bf7e24dece08bfcf9d0ff9e URL: https://github.com/llvm/llvm-project/commit/2288319733cd5f525bf7e24dece08bfcf9d0ff9e DIFF: https://github.com/llvm/llvm-project/commit/2288319733cd5f525bf7e24dece08bfcf9d0ff9e.diff LOG: [PowerPC] Enable OpenMP for powerpcle target. [5/5] Enable OpenMP for powerpcle to match the rest of powerpc*. Update tests. Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D92445 Added: Modified: clang/test/Driver/ppc-features.cpp llvm/include/llvm/Frontend/OpenMP/OMPKinds.def llvm/lib/Frontend/OpenMP/OMPContext.cpp Removed: diff --git a/clang/test/Driver/ppc-features.cpp b/clang/test/Driver/ppc-features.cpp index df0b6c6ddc13..05d71b95dba7 100644 --- a/clang/test/Driver/ppc-features.cpp +++ b/clang/test/Driver/ppc-features.cpp @@ -167,6 +167,7 @@ // OpenMP features // RUN: %clang -target powerpc-unknown-linux-gnu %s -### -fopenmp=libomp -o %t.o 2>&1 | FileCheck -check-prefix=CHECK_OPENMP_TLS %s +// RUN: %clang -target powerpcle-unknown-linux-gnu %s -### -fopenmp=libomp -o %t.o 2>&1 | FileCheck -check-prefix=CHECK_OPENMP_TLS %s // RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -fopenmp=libomp -o %t.o 2>&1 | FileCheck -check-prefix=CHECK_OPENMP_TLS %s // RUN: %clang -target powerpc64le-unknown-linux-gnu %s -### -fopenmp=libomp -o %t.o 2>&1 | FileCheck -check-prefix=CHECK_OPENMP_TLS %s // CHECK_OPENMP_TLS-NOT: "-fnoopenmp-use-tls" diff --git a/llvm/include/llvm/Frontend/OpenMP/OMPKinds.def b/llvm/include/llvm/Frontend/OpenMP/OMPKinds.def index 6d0db8f5f57f..0cb29b245c97 100644 --- a/llvm/include/llvm/Frontend/OpenMP/OMPKinds.def +++ b/llvm/include/llvm/Frontend/OpenMP/OMPKinds.def @@ -1033,6 +1033,7 @@ __OMP_TRAIT_PROPERTY(device, arch, aarch64) __OMP_TRAIT_PROPERTY(device, arch, aarch64_be) __OMP_TRAIT_PROPERTY(device, arch, aarch64_32) __OMP_TRAIT_PROPERTY(device, arch, ppc) +__OMP_TRAIT_PROPERTY(device, arch, ppcle) __OMP_TRAIT_PROPERTY(device, arch, ppc64) __OMP_TRAIT_PROPERTY(device, arch, ppc64le) __OMP_TRAIT_PROPERTY(device, arch, x86) diff --git a/llvm/lib/Frontend/OpenMP/OMPContext.cpp b/llvm/lib/Frontend/OpenMP/OMPContext.cpp index 56a6e2b08bd9..e252c964e647 100644 --- a/llvm/lib/Frontend/OpenMP/OMPContext.cpp +++ b/llvm/lib/Frontend/OpenMP/OMPContext.cpp @@ -40,6 +40,7 @@ OMPContext::OMPContext(bool IsDeviceCompilation, Triple TargetTriple) { case Triple::mips64: case Triple::mips64el: case Triple::ppc: + case Triple::ppcle: case Triple::ppc64: case Triple::ppc64le: case Triple::x86: ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] 275eb82 - [PowerPC] Support powerpcle target in LLD [4/5]
Author: Brandon Bergren Date: 2021-01-02T12:18:05-06:00 New Revision: 275eb8289c43665bc4ce873535f9960322d16c07 URL: https://github.com/llvm/llvm-project/commit/275eb8289c43665bc4ce873535f9960322d16c07 DIFF: https://github.com/llvm/llvm-project/commit/275eb8289c43665bc4ce873535f9960322d16c07.diff LOG: [PowerPC] Support powerpcle target in LLD [4/5] Add support for linking powerpcle code in LLD. Rewrite lld/test/ELF/emulation-ppc.s to use a shared check block and add powerpcle tests. Update tests. Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D93917 Added: Modified: lld/ELF/Driver.cpp lld/ELF/InputFiles.cpp lld/ELF/ScriptParser.cpp lld/test/ELF/emulation-ppc.s lld/test/ELF/ppc32-gnu-ifunc.s lld/test/ELF/ppc32-reloc-rel.s Removed: diff --git a/lld/ELF/Driver.cpp b/lld/ELF/Driver.cpp index 3eaa893a3ff5..5cc32f81c2ec 100644 --- a/lld/ELF/Driver.cpp +++ b/lld/ELF/Driver.cpp @@ -152,6 +152,7 @@ static std::tuple parseEmulation(StringRef emul) { .Cases("elf32ltsmip", "elf32ltsmipn32", {ELF32LEKind, EM_MIPS}) .Case("elf32lriscv", {ELF32LEKind, EM_RISCV}) .Cases("elf32ppc", "elf32ppclinux", {ELF32BEKind, EM_PPC}) + .Cases("elf32lppc", "elf32lppclinux", {ELF32LEKind, EM_PPC}) .Case("elf64btsmip", {ELF64BEKind, EM_MIPS}) .Case("elf64ltsmip", {ELF64LEKind, EM_MIPS}) .Case("elf64lriscv", {ELF64LEKind, EM_RISCV}) diff --git a/lld/ELF/InputFiles.cpp b/lld/ELF/InputFiles.cpp index 3ff93c85617c..a23491d62dc8 100644 --- a/lld/ELF/InputFiles.cpp +++ b/lld/ELF/InputFiles.cpp @@ -1621,6 +1621,7 @@ static uint16_t getBitcodeMachineKind(StringRef path, const Triple &t) { case Triple::msp430: return EM_MSP430; case Triple::ppc: + case Triple::ppcle: return EM_PPC; case Triple::ppc64: case Triple::ppc64le: diff --git a/lld/ELF/ScriptParser.cpp b/lld/ELF/ScriptParser.cpp index 82b98e5ddebe..b81812d11821 100644 --- a/lld/ELF/ScriptParser.cpp +++ b/lld/ELF/ScriptParser.cpp @@ -413,6 +413,7 @@ static std::pair parseBfdName(StringRef s) { .Case("elf64-aarch64", {ELF64LEKind, EM_AARCH64}) .Case("elf64-littleaarch64", {ELF64LEKind, EM_AARCH64}) .Case("elf32-powerpc", {ELF32BEKind, EM_PPC}) + .Case("elf32-powerpcle", {ELF32LEKind, EM_PPC}) .Case("elf64-powerpc", {ELF64BEKind, EM_PPC64}) .Case("elf64-powerpcle", {ELF64LEKind, EM_PPC64}) .Case("elf64-x86-64", {ELF64LEKind, EM_X86_64}) diff --git a/lld/test/ELF/emulation-ppc.s b/lld/test/ELF/emulation-ppc.s index def78a521b20..004eb23b9c66 100644 --- a/lld/test/ELF/emulation-ppc.s +++ b/lld/test/ELF/emulation-ppc.s @@ -1,144 +1,106 @@ # REQUIRES: ppc # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %tppc64 # RUN: ld.lld -m elf64ppc %tppc64 -o %t2ppc64 -# RUN: llvm-readobj --file-headers %t2ppc64 | FileCheck --check-prefix=PPC64 %s +# RUN: llvm-readobj --file-headers %t2ppc64 | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCBE %s # RUN: ld.lld %tppc64 -o %t3ppc64 -# RUN: llvm-readobj --file-headers %t3ppc64 | FileCheck --check-prefix=PPC64 %s +# RUN: llvm-readobj --file-headers %t3ppc64 | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCBE %s # RUN: echo 'OUTPUT_FORMAT(elf64-powerpc)' > %tppc64.script # RUN: ld.lld %tppc64.script %tppc64 -o %t4ppc64 -# RUN: llvm-readobj --file-headers %t4ppc64 | FileCheck --check-prefix=PPC64 %s - -# PPC64: ElfHeader { -# PPC64-NEXT: Ident { -# PPC64-NEXT: Magic: (7F 45 4C 46) -# PPC64-NEXT: Class: 64-bit (0x2) -# PPC64-NEXT: DataEncoding: BigEndian (0x2) -# PPC64-NEXT: FileVersion: 1 -# PPC64-NEXT: OS/ABI: SystemV (0x0) -# PPC64-NEXT: ABIVersion: 0 -# PPC64-NEXT: Unused: (00 00 00 00 00 00 00) -# PPC64-NEXT: } -# PPC64-NEXT: Type: Executable (0x2) -# PPC64-NEXT: Machine: EM_PPC64 (0x15) -# PPC64-NEXT: Version: 1 -# PPC64-NEXT: Entry: -# PPC64-NEXT: ProgramHeaderOffset: 0x40 -# PPC64-NEXT: SectionHeaderOffset: -# PPC64-NEXT: Flags [ (0x2) -# PPC64-NEXT: 0x2 -# PPC64-NEXT: ] -# PPC64-NEXT: HeaderSize: 64 -# PPC64-NEXT: ProgramHeaderEntrySize: 56 -# PPC64-NEXT: ProgramHeaderCount: -# PPC64-NEXT: SectionHeaderEntrySize: 64 -# PPC64-NEXT: SectionHeaderCount: -# PPC64-NEXT: StringTableSectionIndex: -# PPC64-NEXT: } - -# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-freebsd %s -o %tppc64fbsd -# RUN: echo 'OUTPUT_FORMAT(elf64-powerpc-freebsd)' > %tppc64fbsd.script -# RUN: ld.lld %tppc64fbsd.script %tppc64fbsd -o %t2ppc64fbsd -# RUN: llvm-readobj --file-headers %t2ppc64fbsd | FileCheck --check-prefix=PPC64-FBSD %s - -# PPC64-FBSD: ElfHeader { -# PPC64-FBSD-NEXT: Ident { -# PPC64-FBSD-NEXT: Magic: (7F 45 4C 46) -# PPC64-FBSD-NEXT: Class: 64-bit (0x2) -# PPC64-FBSD-NEXT: DataEncoding: BigEndian (0x2) -# PPC64-FBSD-NEXT: FileVersion: 1 -#
[llvm-branch-commits] [clang] 6cee9d0 - [PowerPC] Support powerpcle target in Clang [3/5]
Author: Brandon Bergren Date: 2021-01-02T12:17:58-06:00 New Revision: 6cee9d0cf896d83fa8f87b7f8d67ae2dfdbc1bf9 URL: https://github.com/llvm/llvm-project/commit/6cee9d0cf896d83fa8f87b7f8d67ae2dfdbc1bf9 DIFF: https://github.com/llvm/llvm-project/commit/6cee9d0cf896d83fa8f87b7f8d67ae2dfdbc1bf9.diff LOG: [PowerPC] Support powerpcle target in Clang [3/5] Add powerpcle support to clang. For FreeBSD, assume a freestanding environment for now, as we only need it in the first place to build loader, which runs in the OpenFirmware environment instead of the FreeBSD environment. For Linux, recognize glibc and musl environments to match current usage in Void Linux PPC. Adjust driver to match current binutils behavior regarding machine naming. Adjust and expand tests. Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D93919 Added: Modified: clang/lib/Basic/Targets.cpp clang/lib/Basic/Targets/OSTargets.h clang/lib/Basic/Targets/PPC.cpp clang/lib/Basic/Targets/PPC.h clang/lib/CodeGen/CGBuiltin.cpp clang/lib/CodeGen/TargetInfo.cpp clang/lib/Driver/Driver.cpp clang/lib/Driver/ToolChain.cpp clang/lib/Driver/ToolChains/Clang.cpp clang/lib/Driver/ToolChains/CommonArgs.cpp clang/lib/Driver/ToolChains/FreeBSD.cpp clang/lib/Driver/ToolChains/Gnu.cpp clang/lib/Driver/ToolChains/Linux.cpp clang/lib/Frontend/CompilerInvocation.cpp clang/lib/Sema/SemaChecking.cpp clang/test/CodeGen/altivec.c clang/test/CodeGen/builtins-ppc-altivec.c clang/test/CodeGen/ppc32-and-aix-struct-return.c clang/test/CodeGen/target-data.c clang/test/Driver/linux-header-search.cpp clang/test/Driver/ppc-endian.c clang/test/Driver/ppc-features.cpp Removed: diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 1126b647e37b..e88d90a98395 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -334,6 +334,16 @@ TargetInfo *AllocateTarget(const llvm::Triple &Triple, return new PPC32TargetInfo(Triple, Opts); } + case llvm::Triple::ppcle: +switch (os) { +case llvm::Triple::Linux: + return new LinuxTargetInfo(Triple, Opts); +case llvm::Triple::FreeBSD: + return new FreeBSDTargetInfo(Triple, Opts); +default: + return new PPC32TargetInfo(Triple, Opts); +} + case llvm::Triple::ppc64: if (Triple.isOSDarwin()) return new DarwinPPC64TargetInfo(Triple, Opts); diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h index 0d5d6f553093..67fa1a537fea 100644 --- a/clang/lib/Basic/Targets/OSTargets.h +++ b/clang/lib/Basic/Targets/OSTargets.h @@ -253,6 +253,7 @@ class LLVM_LIBRARY_VISIBILITY FreeBSDTargetInfo : public OSTargetInfo { case llvm::Triple::mips: case llvm::Triple::mipsel: case llvm::Triple::ppc: +case llvm::Triple::ppcle: case llvm::Triple::ppc64: case llvm::Triple::ppc64le: this->MCountName = "_mcount"; @@ -413,6 +414,7 @@ class LLVM_LIBRARY_VISIBILITY LinuxTargetInfo : public OSTargetInfo { case llvm::Triple::mips64: case llvm::Triple::mips64el: case llvm::Triple::ppc: +case llvm::Triple::ppcle: case llvm::Triple::ppc64: case llvm::Triple::ppc64le: this->MCountName = "_mcount"; diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index a6997324acf9..2be7555102f8 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -92,7 +92,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, } // Target properties. - if (getTriple().getArch() == llvm::Triple::ppc64le) { + if (getTriple().getArch() == llvm::Triple::ppc64le || + getTriple().getArch() == llvm::Triple::ppcle) { Builder.defineMacro("_LITTLE_ENDIAN"); } else { if (!getTriple().isOSNetBSD() && diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h index a4677cd067f7..56c8f33ef221 100644 --- a/clang/lib/Basic/Targets/PPC.h +++ b/clang/lib/Basic/Targets/PPC.h @@ -355,6 +355,8 @@ class LLVM_LIBRARY_VISIBILITY PPC32TargetInfo : public PPCTargetInfo { : PPCTargetInfo(Triple, Opts) { if (Triple.isOSAIX()) resetDataLayout("E-m:a-p:32:32-i64:64-n32"); +else if (Triple.getArch() == llvm::Triple::ppcle) + resetDataLayout("e-m:e-p:32:32-i64:64-n32"); else resetDataLayout("E-m:e-p:32:32-i64:64-n32"); diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 6e4c31be84c1..6e98af407a9a 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -5041,6 +5041,7 @@ static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, case llvm::Triple::x86_64: return CGF->EmitX86BuiltinExpr(BuiltinID, E); case llvm::Triple::ppc: + case llvm::Triple::ppcle: case llvm::Triple::ppc64:
[llvm-branch-commits] [llvm] 696bd30 - [PowerPC] Support powerpcle target in LLVMObject [2/5]
Author: Brandon Bergren Date: 2021-01-02T12:17:39-06:00 New Revision: 696bd3073fd2fb5b01b88115bddff394c4b44ad5 URL: https://github.com/llvm/llvm-project/commit/696bd3073fd2fb5b01b88115bddff394c4b44ad5 DIFF: https://github.com/llvm/llvm-project/commit/696bd3073fd2fb5b01b88115bddff394c4b44ad5.diff LOG: [PowerPC] Support powerpcle target in LLVMObject [2/5] Add object file handling for powerpcle-*-*. Adjust tests. Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D93916 Added: Modified: llvm/include/llvm/Object/ELFObjectFile.h llvm/lib/Object/RelocationResolver.cpp llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test llvm/test/tools/llvm-objcopy/ELF/cross-arch-headers.test llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s llvm/unittests/Object/ELFObjectFileTest.cpp Removed: diff --git a/llvm/include/llvm/Object/ELFObjectFile.h b/llvm/include/llvm/Object/ELFObjectFile.h index 33b4c28db951..fed53eef68c3 100644 --- a/llvm/include/llvm/Object/ELFObjectFile.h +++ b/llvm/include/llvm/Object/ELFObjectFile.h @@ -1160,7 +1160,7 @@ StringRef ELFObjectFile::getFileFormatName() const { case ELF::EM_MSP430: return "elf32-msp430"; case ELF::EM_PPC: - return "elf32-powerpc"; + return (IsLittleEndian ? "elf32-powerpcle" : "elf32-powerpc"); case ELF::EM_RISCV: return "elf32-littleriscv"; case ELF::EM_CSKY: @@ -1236,7 +1236,7 @@ template Triple::ArchType ELFObjectFile::getArch() const { case ELF::EM_MSP430: return Triple::msp430; case ELF::EM_PPC: -return Triple::ppc; +return IsLittleEndian ? Triple::ppcle : Triple::ppc; case ELF::EM_PPC64: return IsLittleEndian ? Triple::ppc64le : Triple::ppc64; case ELF::EM_RISCV: diff --git a/llvm/lib/Object/RelocationResolver.cpp b/llvm/lib/Object/RelocationResolver.cpp index 52c4979c93f6..204577af7239 100644 --- a/llvm/lib/Object/RelocationResolver.cpp +++ b/llvm/lib/Object/RelocationResolver.cpp @@ -687,6 +687,7 @@ getRelocationResolver(const ObjectFile &Obj) { switch (Obj.getArch()) { case Triple::x86: return {supportsX86, resolveX86}; +case Triple::ppcle: case Triple::ppc: return {supportsPPC32, resolvePPC32}; case Triple::arm: diff --git a/llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test b/llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test index f7073f07911c..78fc1435518c 100644 --- a/llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test +++ b/llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test @@ -15,8 +15,17 @@ # RUN: llvm-objcopy -I binary -O elf32-bigmips %t.txt %t.mips.o # RUN: llvm-readobj --file-headers %t.mips.o | FileCheck %s --check-prefixes=CHECK,BE,MIPS,32 +# RUN: llvm-objcopy -I binary -O elf32-powerpc %t.txt %t.ppc32be.o +# RUN: llvm-readobj --file-headers %t.ppc32be.o | FileCheck %s --check-prefixes=CHECK,BE,PPC32,PPC32BE,32 + +# RUN: llvm-objcopy -I binary -O elf32-powerpcle %t.txt %t.ppc32le.o +# RUN: llvm-readobj --file-headers %t.ppc32le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC32,PPC32LE,32 + +# RUN: llvm-objcopy -I binary -O elf64-powerpc %t.txt %t.ppc64be.o +# RUN: llvm-readobj --file-headers %t.ppc64be.o | FileCheck %s --check-prefixes=CHECK,BE,PPC64,PPC64BE,64 + # RUN: llvm-objcopy -I binary -O elf64-powerpcle %t.txt %t.ppc64le.o -# RUN: llvm-readobj --file-headers %t.ppc64le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,64 +# RUN: llvm-readobj --file-headers %t.ppc64le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,PPC64LE,64 # RUN: llvm-objcopy -I binary -O elf32-littleriscv %t.txt %t.rv32.o # RUN: llvm-readobj --file-headers %t.rv32.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32 @@ -43,8 +52,8 @@ # MIPS-SAME:mips{{$}} # RISCV32-SAME: riscv{{$}} # RISCV64-SAME: riscv{{$}} -# PPC-SAME: powerpc{{$}} -# PPC64le-SAME: powerpc{{$}} +# PPCBE-SAME: powerpc{{$}} +# PPCLE-SAME: powerpcle{{$}} # SPARC-SAME: sparc # SPARCEL-SAME: sparc # X86-64-SAME: x86-64 @@ -54,8 +63,10 @@ # HEXAGON-NEXT: Arch: hexagon # I386-NEXT:Arch: i386 # MIPS-NEXT:Arch: mips{{$}} -# PPC-NEXT: Arch: powerpc{{$}} -# PPC64-NEXT: Arch: powerpc64le +# PPC32BE-NEXT: Arch: powerpc{{$}} +# PPC32LE-NEXT: Arch: powerpcle{{$}} +# PPC64BE-NEXT: Arch: powerpc64{{$}} +# PPC64LE-NEXT: Arch: powerpc64le{{$}} # RISCV32-NEXT: Arch: riscv32 # RISCV64-NEXT: Arch: riscv64 # SPARC-NEXT: Arch: sparc{{$}} @@ -87,7 +98,7 @@ # HEXAGON-NEXT: Machine: EM_HEXAGON (0xA4) # I386-NEXT: Machine: EM_386 (0x3) # MIPS-NEXT: Machine: EM_MIPS (0x8) -# PPC-NEXT: Machine: EM_PPC (0x14) +# PPC32-NEXT: Machine: EM_PPC (0x14) # PPC64-NEXT: Machine: EM_PPC64 (0x15) # RISCV32-NEXT: Machine: EM_RISCV (0xF3) # RISCV64-NEXT: Machine: EM_RISCV (0xF3) diff --git a/llvm/test/tools/llvm-objcopy/ELF/cross-arch-headers.test
[llvm-branch-commits] [llvm] 8f00447 - [PowerPC] Add the LLVM triple for powerpcle [1/5]
Author: Brandon Bergren Date: 2021-01-02T12:17:22-06:00 New Revision: 8f004471c2a50f0bc03731ebec32aa30de68b61f URL: https://github.com/llvm/llvm-project/commit/8f004471c2a50f0bc03731ebec32aa30de68b61f DIFF: https://github.com/llvm/llvm-project/commit/8f004471c2a50f0bc03731ebec32aa30de68b61f.diff LOG: [PowerPC] Add the LLVM triple for powerpcle [1/5] Add a triple for powerpcle-*-*. This is a little-endian encoding of the 32-bit PowerPC ABI, useful in certain niche situations: 1) A loader such as the FreeBSD loader which will be loading a little endian kernel. This is required for PowerPC64LE to load properly in pseries VMs. Such a loader is implemented as a freestanding ELF32 LSB binary. 2) Userspace emulation of a 32-bit LE architecture such as x86 on 64-bit hosts such as PowerPC64LE with tools like box86 requires having a 32-bit LE toolchain and library set, as they operate by translating only the main binary and switching to native code when making library calls. 3) The Void Linux for PowerPC project is experimenting with running an entire powerpcle userland. Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D93918 Added: Modified: llvm/cmake/config.guess llvm/include/llvm/ADT/Triple.h llvm/lib/CodeGen/TargetLoweringBase.cpp llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp llvm/lib/Support/Triple.cpp llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp llvm/lib/Target/PowerPC/PPCSubtarget.cpp llvm/lib/Target/PowerPC/PPCTargetMachine.cpp llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.h llvm/unittests/ADT/TripleTest.cpp Removed: diff --git a/llvm/cmake/config.guess b/llvm/cmake/config.guess index 9fdfcce8d033..60d3f588d6f7 100644 --- a/llvm/cmake/config.guess +++ b/llvm/cmake/config.guess @@ -973,6 +973,9 @@ EOF ppc:Linux:*:*) echo powerpc-unknown-linux-gnu exit ;; +ppcle:Linux:*:*) + echo powerpcle-unknown-linux-gnu + exit ;; riscv32:Linux:*:* | riscv64:Linux:*:*) LIBC=gnu eval $set_cc_for_build diff --git a/llvm/include/llvm/ADT/Triple.h b/llvm/include/llvm/ADT/Triple.h index 6e2957f3c32b..f6f015577351 100644 --- a/llvm/include/llvm/ADT/Triple.h +++ b/llvm/include/llvm/ADT/Triple.h @@ -64,6 +64,7 @@ class Triple { mips64el, // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el msp430, // MSP430: msp430 ppc,// PPC: powerpc +ppcle, // PPCLE: powerpc (little endian) ppc64, // PPC64: powerpc64, ppu ppc64le,// PPC64LE: powerpc64le r600, // R600: AMD GPUs HD2XXX - HD6XXX @@ -745,6 +746,17 @@ class Triple { return isMIPS32() || isMIPS64(); } + /// Tests whether the target is PowerPC (32- or 64-bit LE or BE). + bool isPPC() const { +return getArch() == Triple::ppc || getArch() == Triple::ppc64 || + getArch() == Triple::ppcle || getArch() == Triple::ppc64le; + } + + /// Tests whether the target is 32-bit PowerPC (little and big endian). + bool isPPC32() const { +return getArch() == Triple::ppc || getArch() == Triple::ppcle; + } + /// Tests whether the target is 64-bit PowerPC (little and big endian). bool isPPC64() const { return getArch() == Triple::ppc64 || getArch() == Triple::ppc64le; diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp index 5797006c76fb..6cacb10ab79f 100644 --- a/llvm/lib/CodeGen/TargetLoweringBase.cpp +++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp @@ -135,7 +135,7 @@ void TargetLoweringBase::InitLibcalls(const Triple &TT) { setLibcallCallingConv((RTLIB::Libcall)LC, CallingConv::C); // For IEEE quad-precision libcall names, PPC uses "kf" instead of "tf". - if (TT.getArch() == Triple::ppc || TT.isPPC64()) { + if (TT.isPPC()) { setLibcallName(RTLIB::ADD_F128, "__addkf3"); setLibcallName(RTLIB::SUB_F128, "__subkf3"); setLibcallName(RTLIB::MUL_F128, "__mulkf3"); diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp index 65673d82..7bc5c98b89bc 100644 --- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp +++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp @@ -128,6 +128,7 @@ void TargetLoweringObjectFileELF::Initialize(MCContext &Ctx, // Fallthrough if not using EHABI LLVM_FALLTHROUGH; case Triple::ppc: + case Triple::ppcle: case Triple::x86: PersonalityEncoding = isPositionIndependent()
[llvm-branch-commits] [llvm] f07b95e - [PowerPC] Add addtional test that retroactively catches PR47259
Author: Brandon Bergren Date: 2020-12-30T15:23:48-06:00 New Revision: f07b95e8bcd1584167eaa8bd41ef8ee96422df65 URL: https://github.com/llvm/llvm-project/commit/f07b95e8bcd1584167eaa8bd41ef8ee96422df65 DIFF: https://github.com/llvm/llvm-project/commit/f07b95e8bcd1584167eaa8bd41ef8ee96422df65.diff LOG: [PowerPC] Add addtional test that retroactively catches PR47259 Due to the unfortunate way the bug could only be triggered when reading SPRG[0-3] into a register lower than %r4 with the "mfsprg %rX, 0" syntax, the tests did not detect it. (It could not be triggered for "mfsprg0, %r2" because that pattern was already in the table, so the earlier "correct" match took effect) As a canary, add an intentionally ambiguous "mfsprg 2, 2" and "mtsprg 2, 2" check that would have caught the problem. Reviewed By: ZhangKang Differential Revision: https://reviews.llvm.org/D86489 Added: Modified: llvm/test/MC/PowerPC/ppc64-encoding-ext.s Removed: diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s index 6284ca0efb09..6edad4c31bed 100644 --- a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s +++ b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s @@ -3571,6 +3571,11 @@ # CHECK-LE: mfspr 4, 275# encoding: [0xa6,0x42,0x93,0x7c] mfsprg %r4, 3 +# Bug PR47259 +# CHECK-BE: mfspr 2, 274# encoding: [0x7c,0x52,0x42,0xa6] +# CHECK-LE: mfspr 2, 274# encoding: [0xa6,0x42,0x52,0x7c] +mfsprg 2, 2 + # CHECK-BE: mfspr 2, 272# encoding: [0x7c,0x50,0x42,0xa6] # CHECK-LE: mfspr 2, 272# encoding: [0xa6,0x42,0x50,0x7c] mfsprg0 %r2 @@ -3600,6 +3605,11 @@ # CHECK-LE: mtspr 275, 4# encoding: [0xa6,0x43,0x93,0x7c] mtsprg 3, %r4 +# Bug PR47259 +# CHECK-BE: mtspr 274, 2# encoding: [0x7c,0x52,0x43,0xa6] +# CHECK-LE: mtspr 274, 2# encoding: [0xa6,0x43,0x52,0x7c] +mtsprg 2, 2 + # CHECK-BE: mtspr 272, 4# encoding: [0x7c,0x90,0x43,0xa6] # CHECK-LE: mtspr 272, 4# encoding: [0xa6,0x43,0x90,0x7c] mtsprg0 %r4 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits