[llvm-branch-commits] [compiler-rt] f00a996 - [Sanitizer][RISCV][AArch64][Android] Adjust allocator tests

2021-03-30 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2021-03-30T15:07:49+01:00
New Revision: f00a996acf21d2d253c568a6bf3a5b123c301f56

URL: 
https://github.com/llvm/llvm-project/commit/f00a996acf21d2d253c568a6bf3a5b123c301f56
DIFF: 
https://github.com/llvm/llvm-project/commit/f00a996acf21d2d253c568a6bf3a5b123c301f56.diff

LOG: [Sanitizer][RISCV][AArch64][Android] Adjust allocator tests

On 64-bit systems with small VMAs (e.g. 39-bit) we can't use
SizeClassAllocator64 parameterized with size class maps containing a large
number of classes, as that will make the allocator region size too small
(< 2^32). Several tests were already disabled for Android because of this.

This patch provides the correct allocator configuration for RISC-V
(riscv64), generalizes the gating condition for tests that can't be enabled
for small VMA systems, and tweaks the tests that can be made compatible with
those systems to enable them.

I think the previous gating on Android should instead be AArch64+Android, so
the patch reflects that.

Added: 


Modified: 
compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp

Removed: 




diff  --git 
a/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp 
b/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
index 38da7f0184c0..58f1ef404ba6 100644
--- a/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
+++ b/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
@@ -36,6 +36,17 @@ using namespace __sanitizer;
 #define SKIP_ON_SOLARIS_SPARCV9(x) x
 #endif
 
+// On 64-bit systems with small virtual address spaces (e.g. 39-bit) we can't
+// use size class maps with a large number of classes, as that will make the
+// SizeClassAllocator64 region size too small (< 2^32).
+#if SANITIZER_ANDROID && defined(__aarch64__)
+#define ALLOCATOR64_SMALL_SIZE 1
+#elif SANITIZER_RISCV64
+#define ALLOCATOR64_SMALL_SIZE 1
+#else
+#define ALLOCATOR64_SMALL_SIZE 0
+#endif
+
 // Too slow for debug build
 #if !SANITIZER_DEBUG
 
@@ -53,6 +64,11 @@ static const uptr kAllocatorSpace = 0x30ULL;
 static const uptr kAllocatorSize  = 0x20ULL;
 static const u64 kAddressSpaceSize = 1ULL << 39;
 typedef VeryCompactSizeClassMap SizeClassMap;
+#elif SANITIZER_RISCV64
+const uptr kAllocatorSpace = ~(uptr)0;
+const uptr kAllocatorSize = 0x20ULL;  // 128G.
+static const u64 kAddressSpaceSize = 1ULL << 38;
+typedef VeryDenseSizeClassMap SizeClassMap;
 #else
 static const uptr kAllocatorSpace = 0x7000ULL;
 static const uptr kAllocatorSize  = 0x0100ULL;  // 1T.
@@ -295,7 +311,7 @@ TEST(SanitizerCommon, SizeClassAllocator64Dynamic) {
   TestSizeClassAllocator();
 }
 
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 // Android only has 39-bit address space, so mapping 2 * kAllocatorSize
 // sometimes fails.
 TEST(SanitizerCommon, SizeClassAllocator64DynamicPremapped) {
@@ -303,7 +319,6 @@ TEST(SanitizerCommon, SizeClassAllocator64DynamicPremapped) 
{
   TestSizeClassAllocator(h.Addr());
 }
 
-//FIXME(kostyak): find values so that those work on Android as well.
 TEST(SanitizerCommon, SizeClassAllocator64Compact) {
   TestSizeClassAllocator();
 }
@@ -387,7 +402,7 @@ TEST(SanitizerCommon, 
SizeClassAllocator64DynamicMetadataStress) {
   SizeClassAllocatorMetadataStress();
 }
 
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 TEST(SanitizerCommon, SizeClassAllocator64DynamicPremappedMetadataStress) {
   ScopedPremappedHeap h;
   SizeClassAllocatorMetadataStress(h.Addr());
@@ -440,7 +455,7 @@ TEST(SanitizerCommon, 
SizeClassAllocator64DynamicGetBlockBegin) {
   SizeClassAllocatorGetBlockBeginStress(
   1ULL << (SANITIZER_ANDROID ? 31 : 33));
 }
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 TEST(SanitizerCommon, SizeClassAllocator64DynamicPremappedGetBlockBegin) {
   ScopedPremappedHeap h;
   SizeClassAllocatorGetBlockBeginStress(
@@ -557,7 +572,7 @@ TEST(SanitizerCommon, LargeMmapAllocatorMapUnmapCallback) {
 
 // Don't test OOM conditions on Win64 because it causes other tests on the same
 // machine to OOM.
-#if SANITIZER_CAN_USE_ALLOCATOR64 && !SANITIZER_WINDOWS64 && !SANITIZER_ANDROID
+#if SANITIZER_CAN_USE_ALLOCATOR64 && !SANITIZER_WINDOWS64
 TEST(SanitizerCommon, SizeClassAllocator64Overflow) {
   Allocator64 a;
   a.Init(kReleaseToOSIntervalNever);
@@ -571,7 +586,8 @@ TEST(SanitizerCommon, SizeClassAllocator64Overflow) {
   uint32_t chunks[kNumChunks];
   bool allocation_failed = false;
   for (int i = 0; i < 100; i++) {
-if (!a.GetFromAllocator(&stats, 52, chunks, kNumChunks)) {
+uptr class_id = a.kNumClasses - 1;
+if (!a.GetFromAllocator(&stats, class_id, chunks, kNumChunks)) {
   allocation_failed = true;
   break;
 }
@@ -735,7 +751,7 @@ TEST(SanitizerCommon, CombinedAllocator64Dynamic) {
   TestCombinedAllocator();
 }
 
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 #if !SANITIZER_WINDOWS
 // 

[llvm-branch-commits] [compiler-rt] f00a996 - [Sanitizer][RISCV][AArch64][Android] Adjust allocator tests

2021-03-30 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2021-03-30T15:07:49+01:00
New Revision: f00a996acf21d2d253c568a6bf3a5b123c301f56

URL: 
https://github.com/llvm/llvm-project/commit/f00a996acf21d2d253c568a6bf3a5b123c301f56
DIFF: 
https://github.com/llvm/llvm-project/commit/f00a996acf21d2d253c568a6bf3a5b123c301f56.diff

LOG: [Sanitizer][RISCV][AArch64][Android] Adjust allocator tests

On 64-bit systems with small VMAs (e.g. 39-bit) we can't use
SizeClassAllocator64 parameterized with size class maps containing a large
number of classes, as that will make the allocator region size too small
(< 2^32). Several tests were already disabled for Android because of this.

This patch provides the correct allocator configuration for RISC-V
(riscv64), generalizes the gating condition for tests that can't be enabled
for small VMA systems, and tweaks the tests that can be made compatible with
those systems to enable them.

I think the previous gating on Android should instead be AArch64+Android, so
the patch reflects that.

Added: 


Modified: 
compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp

Removed: 




diff  --git 
a/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp 
b/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
index 38da7f0184c0..58f1ef404ba6 100644
--- a/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
+++ b/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
@@ -36,6 +36,17 @@ using namespace __sanitizer;
 #define SKIP_ON_SOLARIS_SPARCV9(x) x
 #endif
 
+// On 64-bit systems with small virtual address spaces (e.g. 39-bit) we can't
+// use size class maps with a large number of classes, as that will make the
+// SizeClassAllocator64 region size too small (< 2^32).
+#if SANITIZER_ANDROID && defined(__aarch64__)
+#define ALLOCATOR64_SMALL_SIZE 1
+#elif SANITIZER_RISCV64
+#define ALLOCATOR64_SMALL_SIZE 1
+#else
+#define ALLOCATOR64_SMALL_SIZE 0
+#endif
+
 // Too slow for debug build
 #if !SANITIZER_DEBUG
 
@@ -53,6 +64,11 @@ static const uptr kAllocatorSpace = 0x30ULL;
 static const uptr kAllocatorSize  = 0x20ULL;
 static const u64 kAddressSpaceSize = 1ULL << 39;
 typedef VeryCompactSizeClassMap SizeClassMap;
+#elif SANITIZER_RISCV64
+const uptr kAllocatorSpace = ~(uptr)0;
+const uptr kAllocatorSize = 0x20ULL;  // 128G.
+static const u64 kAddressSpaceSize = 1ULL << 38;
+typedef VeryDenseSizeClassMap SizeClassMap;
 #else
 static const uptr kAllocatorSpace = 0x7000ULL;
 static const uptr kAllocatorSize  = 0x0100ULL;  // 1T.
@@ -295,7 +311,7 @@ TEST(SanitizerCommon, SizeClassAllocator64Dynamic) {
   TestSizeClassAllocator();
 }
 
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 // Android only has 39-bit address space, so mapping 2 * kAllocatorSize
 // sometimes fails.
 TEST(SanitizerCommon, SizeClassAllocator64DynamicPremapped) {
@@ -303,7 +319,6 @@ TEST(SanitizerCommon, SizeClassAllocator64DynamicPremapped) 
{
   TestSizeClassAllocator(h.Addr());
 }
 
-//FIXME(kostyak): find values so that those work on Android as well.
 TEST(SanitizerCommon, SizeClassAllocator64Compact) {
   TestSizeClassAllocator();
 }
@@ -387,7 +402,7 @@ TEST(SanitizerCommon, 
SizeClassAllocator64DynamicMetadataStress) {
   SizeClassAllocatorMetadataStress();
 }
 
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 TEST(SanitizerCommon, SizeClassAllocator64DynamicPremappedMetadataStress) {
   ScopedPremappedHeap h;
   SizeClassAllocatorMetadataStress(h.Addr());
@@ -440,7 +455,7 @@ TEST(SanitizerCommon, 
SizeClassAllocator64DynamicGetBlockBegin) {
   SizeClassAllocatorGetBlockBeginStress(
   1ULL << (SANITIZER_ANDROID ? 31 : 33));
 }
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 TEST(SanitizerCommon, SizeClassAllocator64DynamicPremappedGetBlockBegin) {
   ScopedPremappedHeap h;
   SizeClassAllocatorGetBlockBeginStress(
@@ -557,7 +572,7 @@ TEST(SanitizerCommon, LargeMmapAllocatorMapUnmapCallback) {
 
 // Don't test OOM conditions on Win64 because it causes other tests on the same
 // machine to OOM.
-#if SANITIZER_CAN_USE_ALLOCATOR64 && !SANITIZER_WINDOWS64 && !SANITIZER_ANDROID
+#if SANITIZER_CAN_USE_ALLOCATOR64 && !SANITIZER_WINDOWS64
 TEST(SanitizerCommon, SizeClassAllocator64Overflow) {
   Allocator64 a;
   a.Init(kReleaseToOSIntervalNever);
@@ -571,7 +586,8 @@ TEST(SanitizerCommon, SizeClassAllocator64Overflow) {
   uint32_t chunks[kNumChunks];
   bool allocation_failed = false;
   for (int i = 0; i < 100; i++) {
-if (!a.GetFromAllocator(&stats, 52, chunks, kNumChunks)) {
+uptr class_id = a.kNumClasses - 1;
+if (!a.GetFromAllocator(&stats, class_id, chunks, kNumChunks)) {
   allocation_failed = true;
   break;
 }
@@ -735,7 +751,7 @@ TEST(SanitizerCommon, CombinedAllocator64Dynamic) {
   TestCombinedAllocator();
 }
 
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 #if !SANITIZER_WINDOWS
 // 

[llvm-branch-commits] [compiler-rt] f00a996 - [Sanitizer][RISCV][AArch64][Android] Adjust allocator tests

2021-03-30 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2021-03-30T15:07:49+01:00
New Revision: f00a996acf21d2d253c568a6bf3a5b123c301f56

URL: 
https://github.com/llvm/llvm-project/commit/f00a996acf21d2d253c568a6bf3a5b123c301f56
DIFF: 
https://github.com/llvm/llvm-project/commit/f00a996acf21d2d253c568a6bf3a5b123c301f56.diff

LOG: [Sanitizer][RISCV][AArch64][Android] Adjust allocator tests

On 64-bit systems with small VMAs (e.g. 39-bit) we can't use
SizeClassAllocator64 parameterized with size class maps containing a large
number of classes, as that will make the allocator region size too small
(< 2^32). Several tests were already disabled for Android because of this.

This patch provides the correct allocator configuration for RISC-V
(riscv64), generalizes the gating condition for tests that can't be enabled
for small VMA systems, and tweaks the tests that can be made compatible with
those systems to enable them.

I think the previous gating on Android should instead be AArch64+Android, so
the patch reflects that.

Added: 


Modified: 
compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp

Removed: 




diff  --git 
a/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp 
b/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
index 38da7f0184c06..58f1ef404ba69 100644
--- a/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
+++ b/compiler-rt/lib/sanitizer_common/tests/sanitizer_allocator_test.cpp
@@ -36,6 +36,17 @@ using namespace __sanitizer;
 #define SKIP_ON_SOLARIS_SPARCV9(x) x
 #endif
 
+// On 64-bit systems with small virtual address spaces (e.g. 39-bit) we can't
+// use size class maps with a large number of classes, as that will make the
+// SizeClassAllocator64 region size too small (< 2^32).
+#if SANITIZER_ANDROID && defined(__aarch64__)
+#define ALLOCATOR64_SMALL_SIZE 1
+#elif SANITIZER_RISCV64
+#define ALLOCATOR64_SMALL_SIZE 1
+#else
+#define ALLOCATOR64_SMALL_SIZE 0
+#endif
+
 // Too slow for debug build
 #if !SANITIZER_DEBUG
 
@@ -53,6 +64,11 @@ static const uptr kAllocatorSpace = 0x30ULL;
 static const uptr kAllocatorSize  = 0x20ULL;
 static const u64 kAddressSpaceSize = 1ULL << 39;
 typedef VeryCompactSizeClassMap SizeClassMap;
+#elif SANITIZER_RISCV64
+const uptr kAllocatorSpace = ~(uptr)0;
+const uptr kAllocatorSize = 0x20ULL;  // 128G.
+static const u64 kAddressSpaceSize = 1ULL << 38;
+typedef VeryDenseSizeClassMap SizeClassMap;
 #else
 static const uptr kAllocatorSpace = 0x7000ULL;
 static const uptr kAllocatorSize  = 0x0100ULL;  // 1T.
@@ -295,7 +311,7 @@ TEST(SanitizerCommon, SizeClassAllocator64Dynamic) {
   TestSizeClassAllocator();
 }
 
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 // Android only has 39-bit address space, so mapping 2 * kAllocatorSize
 // sometimes fails.
 TEST(SanitizerCommon, SizeClassAllocator64DynamicPremapped) {
@@ -303,7 +319,6 @@ TEST(SanitizerCommon, SizeClassAllocator64DynamicPremapped) 
{
   TestSizeClassAllocator(h.Addr());
 }
 
-//FIXME(kostyak): find values so that those work on Android as well.
 TEST(SanitizerCommon, SizeClassAllocator64Compact) {
   TestSizeClassAllocator();
 }
@@ -387,7 +402,7 @@ TEST(SanitizerCommon, 
SizeClassAllocator64DynamicMetadataStress) {
   SizeClassAllocatorMetadataStress();
 }
 
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 TEST(SanitizerCommon, SizeClassAllocator64DynamicPremappedMetadataStress) {
   ScopedPremappedHeap h;
   SizeClassAllocatorMetadataStress(h.Addr());
@@ -440,7 +455,7 @@ TEST(SanitizerCommon, 
SizeClassAllocator64DynamicGetBlockBegin) {
   SizeClassAllocatorGetBlockBeginStress(
   1ULL << (SANITIZER_ANDROID ? 31 : 33));
 }
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 TEST(SanitizerCommon, SizeClassAllocator64DynamicPremappedGetBlockBegin) {
   ScopedPremappedHeap h;
   SizeClassAllocatorGetBlockBeginStress(
@@ -557,7 +572,7 @@ TEST(SanitizerCommon, LargeMmapAllocatorMapUnmapCallback) {
 
 // Don't test OOM conditions on Win64 because it causes other tests on the same
 // machine to OOM.
-#if SANITIZER_CAN_USE_ALLOCATOR64 && !SANITIZER_WINDOWS64 && !SANITIZER_ANDROID
+#if SANITIZER_CAN_USE_ALLOCATOR64 && !SANITIZER_WINDOWS64
 TEST(SanitizerCommon, SizeClassAllocator64Overflow) {
   Allocator64 a;
   a.Init(kReleaseToOSIntervalNever);
@@ -571,7 +586,8 @@ TEST(SanitizerCommon, SizeClassAllocator64Overflow) {
   uint32_t chunks[kNumChunks];
   bool allocation_failed = false;
   for (int i = 0; i < 100; i++) {
-if (!a.GetFromAllocator(&stats, 52, chunks, kNumChunks)) {
+uptr class_id = a.kNumClasses - 1;
+if (!a.GetFromAllocator(&stats, class_id, chunks, kNumChunks)) {
   allocation_failed = true;
   break;
 }
@@ -735,7 +751,7 @@ TEST(SanitizerCommon, CombinedAllocator64Dynamic) {
   TestCombinedAllocator();
 }
 
-#if !SANITIZER_ANDROID
+#if !ALLOCATOR64_SMALL_SIZE
 #if !SANITIZER_WINDOWS
 /

[llvm-branch-commits] [compiler-rt] 1bc85cb - [Sanitizer][RISCV] Fix redefinition of REG_SP

2020-11-24 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2020-11-25T00:04:47Z
New Revision: 1bc85cbbb80397cbc165500cc336fe8325bed07d

URL: 
https://github.com/llvm/llvm-project/commit/1bc85cbbb80397cbc165500cc336fe8325bed07d
DIFF: 
https://github.com/llvm/llvm-project/commit/1bc85cbbb80397cbc165500cc336fe8325bed07d.diff

LOG: [Sanitizer][RISCV] Fix redefinition of REG_SP

The include header sys/ucontext.h already defines REG_SP as 2, causing
redefinition warnings during compilation. This patch fixes that issue.
(We also can't just use the numerical definition provided by the header,
as REG_SP is used in this file this refers to a struct field.)

Differential Revision: https://reviews.llvm.org/D90934

Added: 


Modified: 
compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp

Removed: 




diff  --git 
a/compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp 
b/compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp
index 0f1cadfeae39..2ecf87b096a1 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp
@@ -513,6 +513,8 @@ static constexpr uptr kExtraRegs[] = {0};
 
 #elif SANITIZER_RISCV64
 typedef struct user_regs_struct regs_struct;
+// sys/ucontext.h already defines REG_SP as 2. Undefine it first.
+#undef REG_SP
 #define REG_SP sp
 static constexpr uptr kExtraRegs[] = {0};
 #define ARCH_IOVEC_FOR_GETREGSET



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[llvm-branch-commits] [clang] ca93f9a - [Clang][CodeGen][RISCV] Add hard float ABI tests with empty struct

2020-12-08 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2020-12-08T09:19:05Z
New Revision: ca93f9abdc0abc96ca8fb7999549a50aadd95caf

URL: 
https://github.com/llvm/llvm-project/commit/ca93f9abdc0abc96ca8fb7999549a50aadd95caf
DIFF: 
https://github.com/llvm/llvm-project/commit/ca93f9abdc0abc96ca8fb7999549a50aadd95caf.diff

LOG: [Clang][CodeGen][RISCV] Add hard float ABI tests with empty struct

This patch adds tests that showcase a behavior that is currently buggy.
Fix in a follow-up patch.

Differential Revision: https://reviews.llvm.org/D91269

Added: 
clang/test/CodeGen/riscv32-ilp32d-abi.cpp

Modified: 


Removed: 




diff  --git a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp 
b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
new file mode 100644
index ..ffebb057e230
--- /dev/null
+++ b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
@@ -0,0 +1,37 @@
+// RUN: %clang_cc1 -triple riscv32 -target-feature +d -target-abi ilp32d \
+// RUN: -Wno-missing-declarations -emit-llvm %s -o - | FileCheck %s
+
+struct empty_float2 { struct {}; float f; float g; };
+
+// CHECK: define float @_Z14f_empty_float212empty_float2(float %0, float %1)
+// FIXME: Extraneous padding before the second float
+// CHECK: { [4 x i8], float, [4 x i8], float }
+float f_empty_float2(empty_float2 a) {
+return a.g;
+}
+
+struct empty_double2 { struct {}; double f; double g; };
+
+// CHECK: define double @_Z15f_empty_double213empty_double2(double %0, double 
%1)
+// FIXME: Extraneous padding before the second double
+// CHECK: { [8 x i8], double, [8 x i8], double }
+double f_empty_double2(empty_double2 a) {
+return a.g;
+}
+
+struct empty_float_double { struct {}; float f; double g; };
+
+// CHECK: define double @_Z20f_empty_float_double18empty_float_double(float 
%0, double %1)
+// CHECK: { [4 x i8], float, double }
+double f_empty_float_double(empty_float_double a) {
+return a.g;
+}
+
+struct empty_double_float { struct {}; double f; float g; };
+
+// CHECK: define double @_Z20f_empty_double_float18empty_double_float(double 
%0, float %1)
+// FIXME: Extraneous padding before the float
+// CHECK: { [8 x i8], double, [8 x i8], float }
+double f_empty_double_float(empty_double_float a) {
+return a.g;
+}



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[llvm-branch-commits] [clang] fa8f5bf - [Clang][CodeGen][RISCV] Fix hard float ABI test cases with empty struct

2020-12-08 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2020-12-08T09:19:05Z
New Revision: fa8f5bfa4e8cff042c9730320c74e97fab152ae1

URL: 
https://github.com/llvm/llvm-project/commit/fa8f5bfa4e8cff042c9730320c74e97fab152ae1
DIFF: 
https://github.com/llvm/llvm-project/commit/fa8f5bfa4e8cff042c9730320c74e97fab152ae1.diff

LOG: [Clang][CodeGen][RISCV] Fix hard float ABI test cases with empty struct

The code seemed not to account for the field 1 offset.

Differential Revision: https://reviews.llvm.org/D91270

Added: 


Modified: 
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGen/riscv32-ilp32d-abi.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 7213f7864d43..05c12dfe0458 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -10520,7 +10520,7 @@ bool RISCVABIInfo::detectFPCCEligibleStruct(QualType 
Ty, llvm::Type *&Field1Ty,
 NeededArgFPRs++;
   else if (Field2Ty)
 NeededArgGPRs++;
-  return IsCandidate;
+  return true;
 }
 
 // Call getCoerceAndExpand for the two-element flattened struct described by
@@ -10546,15 +10546,15 @@ ABIArgInfo 
RISCVABIInfo::coerceAndExpandFPCCEligibleStruct(
 
   CharUnits Field2Align =
   CharUnits::fromQuantity(getDataLayout().getABITypeAlignment(Field2Ty));
-  CharUnits Field1Size =
+  CharUnits Field1End = Field1Off +
   CharUnits::fromQuantity(getDataLayout().getTypeStoreSize(Field1Ty));
-  CharUnits Field2OffNoPadNoPack = Field1Size.alignTo(Field2Align);
+  CharUnits Field2OffNoPadNoPack = Field1End.alignTo(Field2Align);
 
   CharUnits Padding = CharUnits::Zero();
   if (Field2Off > Field2OffNoPadNoPack)
 Padding = Field2Off - Field2OffNoPadNoPack;
-  else if (Field2Off != Field2Align && Field2Off > Field1Size)
-Padding = Field2Off - Field1Size;
+  else if (Field2Off != Field2Align && Field2Off > Field1End)
+Padding = Field2Off - Field1End;
 
   bool IsPacked = !Field2Off.isMultipleOf(Field2Align);
 

diff  --git a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp 
b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
index ffebb057e230..1018c78e168b 100644
--- a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
+++ b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
@@ -4,8 +4,7 @@
 struct empty_float2 { struct {}; float f; float g; };
 
 // CHECK: define float @_Z14f_empty_float212empty_float2(float %0, float %1)
-// FIXME: Extraneous padding before the second float
-// CHECK: { [4 x i8], float, [4 x i8], float }
+// CHECK: { [4 x i8], float, float }
 float f_empty_float2(empty_float2 a) {
 return a.g;
 }
@@ -13,8 +12,7 @@ float f_empty_float2(empty_float2 a) {
 struct empty_double2 { struct {}; double f; double g; };
 
 // CHECK: define double @_Z15f_empty_double213empty_double2(double %0, double 
%1)
-// FIXME: Extraneous padding before the second double
-// CHECK: { [8 x i8], double, [8 x i8], double }
+// CHECK: { [8 x i8], double, double }
 double f_empty_double2(empty_double2 a) {
 return a.g;
 }
@@ -30,8 +28,7 @@ double f_empty_float_double(empty_float_double a) {
 struct empty_double_float { struct {}; double f; float g; };
 
 // CHECK: define double @_Z20f_empty_double_float18empty_double_float(double 
%0, float %1)
-// FIXME: Extraneous padding before the float
-// CHECK: { [8 x i8], double, [8 x i8], float }
+// CHECK: { [8 x i8], double, float }
 double f_empty_double_float(empty_double_float a) {
 return a.g;
 }



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[llvm-branch-commits] [clang] 3af354e - [Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct and complex

2020-12-08 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2020-12-08T09:19:05Z
New Revision: 3af354e863f553ef727967dfc091a64a11500aa5

URL: 
https://github.com/llvm/llvm-project/commit/3af354e863f553ef727967dfc091a64a11500aa5
DIFF: 
https://github.com/llvm/llvm-project/commit/3af354e863f553ef727967dfc091a64a11500aa5.diff

LOG: [Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct 
and complex

Fixes bug 44904.

Differential Revision: https://reviews.llvm.org/D91278

Added: 


Modified: 
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGen/riscv32-ilp32d-abi.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 05c12dfe0458..d4191b943ef5 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -10425,7 +10425,6 @@ bool 
RISCVABIInfo::detectFPCCEligibleStructHelper(QualType Ty, CharUnits CurOff,
   return false;
 Field1Ty = CGT.ConvertType(EltTy);
 Field1Off = CurOff;
-assert(CurOff.isZero() && "Unexpected offset for first field");
 Field2Ty = Field1Ty;
 Field2Off = Field1Off + getContext().getTypeSizeInChars(EltTy);
 return true;

diff  --git a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp 
b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
index 1018c78e168b..26d968be97df 100644
--- a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
+++ b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
@@ -32,3 +32,19 @@ struct empty_double_float { struct {}; double f; float g; };
 double f_empty_double_float(empty_double_float a) {
 return a.g;
 }
+
+struct empty_complex_f { struct {}; float _Complex fc; };
+
+// CHECK: define float @_Z17f_empty_complex_f15empty_complex_f(float %0, float 
%1)
+// CHECK: { [4 x i8], float, float }
+float f_empty_complex_f(empty_complex_f a) {
+return __imag__ a.fc;
+}
+
+struct empty_complex_d { struct {}; double _Complex fc; };
+
+// CHECK: define double @_Z17f_empty_complex_d15empty_complex_d(double %0, 
double %1)
+// CHECK: { [8 x i8], double, double }
+double f_empty_complex_d(empty_complex_d a) {
+return __imag__ a.fc;
+}



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[llvm-branch-commits] [clang] ca93f9a - [Clang][CodeGen][RISCV] Add hard float ABI tests with empty struct

2020-12-08 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2020-12-08T09:19:05Z
New Revision: ca93f9abdc0abc96ca8fb7999549a50aadd95caf

URL: 
https://github.com/llvm/llvm-project/commit/ca93f9abdc0abc96ca8fb7999549a50aadd95caf
DIFF: 
https://github.com/llvm/llvm-project/commit/ca93f9abdc0abc96ca8fb7999549a50aadd95caf.diff

LOG: [Clang][CodeGen][RISCV] Add hard float ABI tests with empty struct

This patch adds tests that showcase a behavior that is currently buggy.
Fix in a follow-up patch.

Differential Revision: https://reviews.llvm.org/D91269

Added: 
clang/test/CodeGen/riscv32-ilp32d-abi.cpp

Modified: 


Removed: 




diff  --git a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp 
b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
new file mode 100644
index ..ffebb057e230
--- /dev/null
+++ b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
@@ -0,0 +1,37 @@
+// RUN: %clang_cc1 -triple riscv32 -target-feature +d -target-abi ilp32d \
+// RUN: -Wno-missing-declarations -emit-llvm %s -o - | FileCheck %s
+
+struct empty_float2 { struct {}; float f; float g; };
+
+// CHECK: define float @_Z14f_empty_float212empty_float2(float %0, float %1)
+// FIXME: Extraneous padding before the second float
+// CHECK: { [4 x i8], float, [4 x i8], float }
+float f_empty_float2(empty_float2 a) {
+return a.g;
+}
+
+struct empty_double2 { struct {}; double f; double g; };
+
+// CHECK: define double @_Z15f_empty_double213empty_double2(double %0, double 
%1)
+// FIXME: Extraneous padding before the second double
+// CHECK: { [8 x i8], double, [8 x i8], double }
+double f_empty_double2(empty_double2 a) {
+return a.g;
+}
+
+struct empty_float_double { struct {}; float f; double g; };
+
+// CHECK: define double @_Z20f_empty_float_double18empty_float_double(float 
%0, double %1)
+// CHECK: { [4 x i8], float, double }
+double f_empty_float_double(empty_float_double a) {
+return a.g;
+}
+
+struct empty_double_float { struct {}; double f; float g; };
+
+// CHECK: define double @_Z20f_empty_double_float18empty_double_float(double 
%0, float %1)
+// FIXME: Extraneous padding before the float
+// CHECK: { [8 x i8], double, [8 x i8], float }
+double f_empty_double_float(empty_double_float a) {
+return a.g;
+}



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[llvm-branch-commits] [clang] 3af354e - [Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct and complex

2020-12-08 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2020-12-08T09:19:05Z
New Revision: 3af354e863f553ef727967dfc091a64a11500aa5

URL: 
https://github.com/llvm/llvm-project/commit/3af354e863f553ef727967dfc091a64a11500aa5
DIFF: 
https://github.com/llvm/llvm-project/commit/3af354e863f553ef727967dfc091a64a11500aa5.diff

LOG: [Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct 
and complex

Fixes bug 44904.

Differential Revision: https://reviews.llvm.org/D91278

Added: 


Modified: 
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGen/riscv32-ilp32d-abi.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 05c12dfe0458..d4191b943ef5 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -10425,7 +10425,6 @@ bool 
RISCVABIInfo::detectFPCCEligibleStructHelper(QualType Ty, CharUnits CurOff,
   return false;
 Field1Ty = CGT.ConvertType(EltTy);
 Field1Off = CurOff;
-assert(CurOff.isZero() && "Unexpected offset for first field");
 Field2Ty = Field1Ty;
 Field2Off = Field1Off + getContext().getTypeSizeInChars(EltTy);
 return true;

diff  --git a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp 
b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
index 1018c78e168b..26d968be97df 100644
--- a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
+++ b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
@@ -32,3 +32,19 @@ struct empty_double_float { struct {}; double f; float g; };
 double f_empty_double_float(empty_double_float a) {
 return a.g;
 }
+
+struct empty_complex_f { struct {}; float _Complex fc; };
+
+// CHECK: define float @_Z17f_empty_complex_f15empty_complex_f(float %0, float 
%1)
+// CHECK: { [4 x i8], float, float }
+float f_empty_complex_f(empty_complex_f a) {
+return __imag__ a.fc;
+}
+
+struct empty_complex_d { struct {}; double _Complex fc; };
+
+// CHECK: define double @_Z17f_empty_complex_d15empty_complex_d(double %0, 
double %1)
+// CHECK: { [8 x i8], double, double }
+double f_empty_complex_d(empty_complex_d a) {
+return __imag__ a.fc;
+}



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[llvm-branch-commits] [clang] fa8f5bf - [Clang][CodeGen][RISCV] Fix hard float ABI test cases with empty struct

2020-12-08 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2020-12-08T09:19:05Z
New Revision: fa8f5bfa4e8cff042c9730320c74e97fab152ae1

URL: 
https://github.com/llvm/llvm-project/commit/fa8f5bfa4e8cff042c9730320c74e97fab152ae1
DIFF: 
https://github.com/llvm/llvm-project/commit/fa8f5bfa4e8cff042c9730320c74e97fab152ae1.diff

LOG: [Clang][CodeGen][RISCV] Fix hard float ABI test cases with empty struct

The code seemed not to account for the field 1 offset.

Differential Revision: https://reviews.llvm.org/D91270

Added: 


Modified: 
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGen/riscv32-ilp32d-abi.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 7213f7864d43..05c12dfe0458 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -10520,7 +10520,7 @@ bool RISCVABIInfo::detectFPCCEligibleStruct(QualType 
Ty, llvm::Type *&Field1Ty,
 NeededArgFPRs++;
   else if (Field2Ty)
 NeededArgGPRs++;
-  return IsCandidate;
+  return true;
 }
 
 // Call getCoerceAndExpand for the two-element flattened struct described by
@@ -10546,15 +10546,15 @@ ABIArgInfo 
RISCVABIInfo::coerceAndExpandFPCCEligibleStruct(
 
   CharUnits Field2Align =
   CharUnits::fromQuantity(getDataLayout().getABITypeAlignment(Field2Ty));
-  CharUnits Field1Size =
+  CharUnits Field1End = Field1Off +
   CharUnits::fromQuantity(getDataLayout().getTypeStoreSize(Field1Ty));
-  CharUnits Field2OffNoPadNoPack = Field1Size.alignTo(Field2Align);
+  CharUnits Field2OffNoPadNoPack = Field1End.alignTo(Field2Align);
 
   CharUnits Padding = CharUnits::Zero();
   if (Field2Off > Field2OffNoPadNoPack)
 Padding = Field2Off - Field2OffNoPadNoPack;
-  else if (Field2Off != Field2Align && Field2Off > Field1Size)
-Padding = Field2Off - Field1Size;
+  else if (Field2Off != Field2Align && Field2Off > Field1End)
+Padding = Field2Off - Field1End;
 
   bool IsPacked = !Field2Off.isMultipleOf(Field2Align);
 

diff  --git a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp 
b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
index ffebb057e230..1018c78e168b 100644
--- a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
+++ b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
@@ -4,8 +4,7 @@
 struct empty_float2 { struct {}; float f; float g; };
 
 // CHECK: define float @_Z14f_empty_float212empty_float2(float %0, float %1)
-// FIXME: Extraneous padding before the second float
-// CHECK: { [4 x i8], float, [4 x i8], float }
+// CHECK: { [4 x i8], float, float }
 float f_empty_float2(empty_float2 a) {
 return a.g;
 }
@@ -13,8 +12,7 @@ float f_empty_float2(empty_float2 a) {
 struct empty_double2 { struct {}; double f; double g; };
 
 // CHECK: define double @_Z15f_empty_double213empty_double2(double %0, double 
%1)
-// FIXME: Extraneous padding before the second double
-// CHECK: { [8 x i8], double, [8 x i8], double }
+// CHECK: { [8 x i8], double, double }
 double f_empty_double2(empty_double2 a) {
 return a.g;
 }
@@ -30,8 +28,7 @@ double f_empty_float_double(empty_float_double a) {
 struct empty_double_float { struct {}; double f; float g; };
 
 // CHECK: define double @_Z20f_empty_double_float18empty_double_float(double 
%0, float %1)
-// FIXME: Extraneous padding before the float
-// CHECK: { [8 x i8], double, [8 x i8], float }
+// CHECK: { [8 x i8], double, float }
 double f_empty_double_float(empty_double_float a) {
 return a.g;
 }



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[llvm-branch-commits] [lldb] 15f5971 - [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection

2021-01-07 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2021-01-07T23:02:55Z
New Revision: 15f5971150684b656005cfd5b744c1a34477ff60

URL: 
https://github.com/llvm/llvm-project/commit/15f5971150684b656005cfd5b744c1a34477ff60
DIFF: 
https://github.com/llvm/llvm-project/commit/15f5971150684b656005cfd5b744c1a34477ff60.diff

LOG: [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection

Adds the RISC-V ArchSpec bits contributed by @simoncook as part of D62732,
plus logic to distinguish between riscv32 and riscv64 based on ELF class.

The patch follows the implementation approach previously used for MIPS.
It defines RISC-V architecture subtypes and inspects the ELF header,
namely the ELF class, to detect the right subtype.

Differential Revision: https://reviews.llvm.org/D86292

Added: 
lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml

Modified: 
lldb/include/lldb/Utility/ArchSpec.h
lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
lldb/source/Utility/ArchSpec.cpp

Removed: 




diff  --git a/lldb/include/lldb/Utility/ArchSpec.h 
b/lldb/include/lldb/Utility/ArchSpec.h
index a727d5ca4f79..b35766d3d9cf 100644
--- a/lldb/include/lldb/Utility/ArchSpec.h
+++ b/lldb/include/lldb/Utility/ArchSpec.h
@@ -92,6 +92,12 @@ class ArchSpec {
 eARM_abi_hard_float = 0x0400
   };
 
+  enum RISCVSubType {
+eRISCVSubType_unknown,
+eRISCVSubType_riscv32,
+eRISCVSubType_riscv64,
+  };
+
   enum Core {
 eCore_arm_generic,
 eCore_arm_armv4,
@@ -184,6 +190,9 @@ class ArchSpec {
 eCore_hexagon_hexagonv4,
 eCore_hexagon_hexagonv5,
 
+eCore_riscv32,
+eCore_riscv64,
+
 eCore_uknownMach32,
 eCore_uknownMach64,
 

diff  --git a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp 
b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
index 82a08a235084..cad9ce218b10 100644
--- a/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ b/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -296,9 +296,23 @@ static uint32_t mipsVariantFromElfFlags (const 
elf::ELFHeader &header) {
   return arch_variant;
 }
 
+static uint32_t riscvVariantFromElfFlags(const elf::ELFHeader &header) {
+  uint32_t fileclass = header.e_ident[EI_CLASS];
+  switch (fileclass) {
+  case llvm::ELF::ELFCLASS32:
+return ArchSpec::eRISCVSubType_riscv32;
+  case llvm::ELF::ELFCLASS64:
+return ArchSpec::eRISCVSubType_riscv64;
+  default:
+return ArchSpec::eRISCVSubType_unknown;
+  }
+}
+
 static uint32_t subTypeFromElfHeader(const elf::ELFHeader &header) {
   if (header.e_machine == llvm::ELF::EM_MIPS)
 return mipsVariantFromElfFlags(header);
+  else if (header.e_machine == llvm::ELF::EM_RISCV)
+return riscvVariantFromElfFlags(header);
 
   return LLDB_INVALID_CPUTYPE;
 }

diff  --git a/lldb/source/Utility/ArchSpec.cpp 
b/lldb/source/Utility/ArchSpec.cpp
index b0cbb269b18b..8025f37c4b38 100644
--- a/lldb/source/Utility/ArchSpec.cpp
+++ b/lldb/source/Utility/ArchSpec.cpp
@@ -212,6 +212,11 @@ static const CoreDefinition g_core_definitions[] = {
 {eByteOrderLittle, 4, 4, 4, llvm::Triple::hexagon,
  ArchSpec::eCore_hexagon_hexagonv5, "hexagonv5"},
 
+{eByteOrderLittle, 4, 2, 4, llvm::Triple::riscv32, ArchSpec::eCore_riscv32,
+ "riscv32"},
+{eByteOrderLittle, 8, 2, 4, llvm::Triple::riscv64, ArchSpec::eCore_riscv64,
+ "riscv64"},
+
 {eByteOrderLittle, 4, 4, 4, llvm::Triple::UnknownArch,
  ArchSpec::eCore_uknownMach32, "unknown-mach-32"},
 {eByteOrderLittle, 8, 4, 4, llvm::Triple::UnknownArch,
@@ -395,6 +400,10 @@ static const ArchDefinitionEntry g_elf_arch_entries[] = {
  0xu, 0xu}, // ARC
 {ArchSpec::eCore_avr, llvm::ELF::EM_AVR, LLDB_INVALID_CPUTYPE,
  0xu, 0xu}, // AVR
+{ArchSpec::eCore_riscv32, llvm::ELF::EM_RISCV,
+ ArchSpec::eRISCVSubType_riscv32, 0xu, 0xu}, // riscv32
+{ArchSpec::eCore_riscv64, llvm::ELF::EM_RISCV,
+ ArchSpec::eRISCVSubType_riscv64, 0xu, 0xu}, // riscv64
 };
 
 static const ArchDefinition g_elf_arch_def = {

diff  --git a/lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml 
b/lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml
new file mode 100644
index ..7fbf2059c74e
--- /dev/null
+++ b/lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml
@@ -0,0 +1,24 @@
+# RUN: yaml2obj --docnum=1 %s > %t32
+# RUN: yaml2obj --docnum=2 %s > %t64
+# RUN: lldb-test object-file %t32 | FileCheck --check-prefix=CHECK-RV32 %s
+# RUN: lldb-test object-file %t64 | FileCheck --check-prefix=CHECK-RV64 %s
+
+# CHECK-RV32: Architecture: riscv32--
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS32
+  Data:ELFDATA2LSB
+  Type:ET_EXEC
+  Machine: EM_RISCV
+...
+
+# CHECK-RV64: Architecture: riscv64--
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS64
+  Data:ELFDATA2LSB
+  Type:ET_EXEC
+  Machine: EM_RISCV
+...



___

[llvm-branch-commits] [llvm] cf033ed - [CMake] Fix setting result of libatomic check for MSVC

2020-02-17 Thread Luís Marques via llvm-branch-commits

Author: Luís Marques
Date: 2020-02-17T15:30:57Z
New Revision: cf033ed461001efd8160cdc54b58c71abd46c868

URL: 
https://github.com/llvm/llvm-project/commit/cf033ed461001efd8160cdc54b58c71abd46c868
DIFF: 
https://github.com/llvm/llvm-project/commit/cf033ed461001efd8160cdc54b58c71abd46c868.diff

LOG: [CMake] Fix setting result of libatomic check for MSVC

We were skipping the libatomic requirement check for MSVC, but not setting
the corresponding variable, HAVE_CXX_ATOMICS_WITHOUT_LIB. D69869 seems to
have to failed to build on ARM MSVC because of that, and was reverted. This
should probably fix the issue. The plan is to check the result of the build
bots and then submit a more thoroughly refactored version for review.

Added: 


Modified: 
llvm/cmake/modules/CheckAtomic.cmake

Removed: 




diff  --git a/llvm/cmake/modules/CheckAtomic.cmake 
b/llvm/cmake/modules/CheckAtomic.cmake
index 29f3bdd57f03..af925f5bf9ec 100644
--- a/llvm/cmake/modules/CheckAtomic.cmake
+++ b/llvm/cmake/modules/CheckAtomic.cmake
@@ -53,6 +53,8 @@ if (LLVM_COMPILER_IS_GCC_COMPATIBLE)
   message(FATAL_ERROR "Host compiler appears to require libatomic, but 
cannot find it.")
 endif()
   endif()
+elseif(MSVC)
+  set(HAVE_CXX_ATOMICS_WITHOUT_LIB True)
 endif()
 
 # Check for 64 bit atomic operations.



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