llvmbot wrote:
@llvm/pr-subscribers-clang
@llvm/pr-subscribers-backend-aarch64
Author: None (llvmbot)
Changes
Backport a52eea66795018550e95c4b060165a7250899298
fbba818a78f591d89f25768ba31783714d526532
dd1897c6cb028bda7d4d541d1bb33965eccf0a68
3369e341288b3d9bb59827f9a2911ebf3d36408d
Requested by: @ptomsich
---
Patch is 631.69 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/81857.diff
40 Files Affected:
- (modified) clang/lib/Basic/Targets/AArch64.cpp (-1)
- (modified) clang/test/CodeGen/aarch64-targetattr.c (+5-5)
- (modified) clang/test/Driver/aarch64-cssc.c (+1)
- (modified) clang/test/Misc/target-invalid-cpu-note.c (+2-2)
- (modified) clang/test/Preprocessor/aarch64-target-features.c (+21-14)
- (modified) llvm/include/llvm/TargetParser/AArch64TargetParser.h (+7-1)
- (modified) llvm/lib/Target/AArch64/AArch64.td (+27)
- (modified) llvm/lib/Target/AArch64/AArch64SchedA53.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedA57.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedA64FX.td (+2-1)
- (added) llvm/lib/Target/AArch64/AArch64SchedAmpere1B.td (+1149)
- (modified) llvm/lib/Target/AArch64/AArch64SchedCyclone.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedExynosM3.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedExynosM4.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedExynosM5.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedFalkor.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedKryo.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedNeoverseN1.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td (+2-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td (+2-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedTSV110.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedThunderX.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedThunderX2T99.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64SchedThunderX3T110.td (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64Subtarget.cpp (+1)
- (modified) llvm/lib/Target/AArch64/AArch64Subtarget.h (+1)
- (modified) llvm/lib/TargetParser/Host.cpp (+1)
- (modified) llvm/test/CodeGen/AArch64/cpus.ll (+1)
- (modified) llvm/test/CodeGen/AArch64/neon-dot-product.ll (+1)
- (modified) llvm/test/CodeGen/AArch64/remat.ll (+1)
- (modified) llvm/test/MC/AArch64/armv8.2a-dotprod.s (+3)
- (modified) llvm/test/MC/Disassembler/AArch64/armv8.3a-rcpc.txt (+1)
- (added) llvm/test/tools/llvm-mca/AArch64/Ampere/Ampere1B/basic-instructions.s
(+3724)
- (added) llvm/test/tools/llvm-mca/AArch64/Ampere/Ampere1B/cssc-instructions.s
(+76)
- (added) llvm/test/tools/llvm-mca/AArch64/Ampere/Ampere1B/mte-instructions.s
(+349)
- (added) llvm/test/tools/llvm-mca/AArch64/Ampere/Ampere1B/neon-instructions.s
(+3235)
- (added) llvm/test/tools/llvm-mca/AArch64/Ampere/Ampere1B/shifted-register.s
(+31)
- (modified) llvm/unittests/TargetParser/Host.cpp (+3)
- (modified) llvm/unittests/TargetParser/TargetParserTest.cpp (+46-22)
``diff
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index 336b7a5e3d727d..72270167118390 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -258,7 +258,6 @@ void AArch64TargetInfo::getTargetDefinesARMV83A(const
LangOptions ,
MacroBuilder ) const {
Builder.defineMacro("__ARM_FEATURE_COMPLEX", "1");
Builder.defineMacro("__ARM_FEATURE_JCVT", "1");
- Builder.defineMacro("__ARM_FEATURE_PAUTH", "1");
// Also include the Armv8.2 defines
getTargetDefinesARMV82A(Opts, Builder);
}
diff --git a/clang/test/CodeGen/aarch64-targetattr.c
b/clang/test/CodeGen/aarch64-targetattr.c
index 02da18264da0a3..1a3a84a73dbad1 100644
--- a/clang/test/CodeGen/aarch64-targetattr.c
+++ b/clang/test/CodeGen/aarch64-targetattr.c
@@ -97,19 +97,19 @@ void minusarch() {}
// CHECK: attributes #0 = { {{.*}}
"target-features"="+crc,+fp-armv8,+lse,+neon,+ras,+rdm,+v8.1a,+v8.2a,+v8a" }
// CHECK: attributes #1 = { {{.*}}
"target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+v8.1a,+v8.2a,+v8a"
}
// CHECK: attributes #2 = { {{.*}}
"target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8a"
}
-// CHECK: attributes #3 = { {{.*}}
"target-features"="+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+jsconv,+lse,+neon,+ras,+rcpc,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a"
}
+// CHECK: attributes #3 = { {{.*}}
"target-features"="+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+ras,+rcpc,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a"
}
// CHECK: attributes #4 = { {{.*}} "target-cpu"="cortex-a710"