[llvm-branch-commits] [mlir] f6c7ebe - [MLIR][SPIRVToLLVM] Updated documentation on entry points and not supported ops

[George Mitenkov via llvm-branch-commits]

Author: George Mitenkov
Date: 2020-12-21T11:20:40+03:00
New Revision: f6c7ebe76ac5df175050a558e767a68abee07425

URL: 
https://github.com/llvm/llvm-project/commit/f6c7ebe76ac5df175050a558e767a68abee07425
DIFF: 
https://github.com/llvm/llvm-project/commit/f6c7ebe76ac5df175050a558e767a68abee07425.diff

LOG: [MLIR][SPIRVToLLVM] Updated documentation on entry points and not 
supported ops

This patch addresses two issues:
1. Not supported ops are updated to pick up the changes in the
SPIR-V dialect.

2. Conversion on `spv.ExecutionMode` is updated.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D91881

Added: 


Modified: 
mlir/docs/SPIRVToLLVMDialectConversion.md

Removed: 




diff  --git a/mlir/docs/SPIRVToLLVMDialectConversion.md 
b/mlir/docs/SPIRVToLLVMDialectConversion.md
index c42a529beed1..3aa4d0fa43a1 100644
--- a/mlir/docs/SPIRVToLLVMDialectConversion.md
+++ b/mlir/docs/SPIRVToLLVMDialectConversion.md
@@ -368,18 +368,37 @@ non-vector  | `spv.CompositeInsert`  | 
`llvm.insertvalue`
 
 ### `spv.EntryPoint` and `spv.ExecutionMode`
 
-**Note: these conversions are likely to be changed in the future**
-
 First of all, it is important to note that there is no direct representation of
-entry points in LLVM. At the moment, we choose to **remove these ops**, 
assuming
-that the module generated from SPIR-V has no other internal functions (This
-assumption is actually made in 
[`mlir-spirv-cpu-runner`](#`mlir-spirv-cpu-runner`)).
+entry points in LLVM. At the moment, we use the following approach:
+
+* `spv.EntryPoint` is simply removed.
+
+* In contrast, `spv.ExecutionMode` may contain important information about the
+  entry point. For example, `LocalSize` provides information about the
+  work-group size that can be reused.
 
-However, these ops can be used to see which functions in the module are entry
-point functions. `spv.ExecutionMode` also carries the metadata associated with
-the entry point such as `LocalSize`, which indicates the workgroup size in the
-x, y, and z dimensions. It will be useful to represent this on the LLVM side
-(TODO).
+  In order to preserve this inforamtion, `spv.ExecutionMode` is converted to
+  a struct global variable that stores the execution mode id and any variables
+  associated with it. In C, the struct has the structure shown below.
+
+  ```C
+  // No values are associated  // There are values that are associated
+  // with this entry point.// with this entry point.
+  struct { struct {
+int32_t executionMode; int32_t executionMode;
+  };   int32_t values[];
+   };
+  ```
+
+  ```mlir
+  // spv.ExecutionMode @empty "ContractionOff"
+  llvm.mlir.global external constant @{{.*}}() : !llvm.struct<(i32)> {
+%0   = llvm.mlir.undef : !llvm.struct<(i32)>
+%1   = llvm.mlir.constant(31 : i32) : !llvm.i32
+%ret = llvm.insertvalue %1, %0[0 : i32] : !llvm.struct<(i32)>
+llvm.return %ret : !llvm.struct<(i32)>
+  }
+  ```
 
 ### Logical ops
 
@@ -604,9 +623,10 @@ cover all possible corner cases.
 
 There is no support of the following ops:
 
-*   All Atomic ops
+*   All atomic ops
+*   All group ops
 *   All matrix ops
-*   All GroupNonUniform ops
+*   All OCL ops
 
 As well as:
 
@@ -614,15 +634,20 @@ As well as:
 *   spv.ControlBarrier
 *   spv.CopyMemory
 *   spv.FMod
+*   spv.GLSL.Acos
+*   spv.GLSL.Asin
+*   spv.GLSL.Atan
+*   spv.GLSL.Cosh
+*   spv.GLSL.FSign
 *   spv.GLSL.SAbs
+*   spv.GLSL.Sinh
 *   spv.GLSL.SSign
-*   spv.GLSL.FSign
 *   spv.MemoryBarrier
 *   spv.mlir.referenceof
 *   spv.SMod
 *   spv.specConstant
-*   spv.SubgroupBallotKHR
 *   spv.Unreachable
+*   spv.VectorExtractDynamic
 
 ## Control flow conversion
 



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[llvm-branch-commits] [llvm] 3bf7d47 - [NFC][InstructionCost] Remove isValid() asserts in SLPVectorizer.cpp

[David Sherwood via llvm-branch-commits]

Author: David Sherwood
Date: 2020-12-21T09:12:28Z
New Revision: 3bf7d47a977d463940f558259d24d43d76d50e6f

URL: 
https://github.com/llvm/llvm-project/commit/3bf7d47a977d463940f558259d24d43d76d50e6f
DIFF: 
https://github.com/llvm/llvm-project/commit/3bf7d47a977d463940f558259d24d43d76d50e6f.diff

LOG: [NFC][InstructionCost] Remove isValid() asserts in SLPVectorizer.cpp

An earlier patch introduced asserts that the InstructionCost is
valid because at that time the ReuseShuffleCost variable was an
unsigned. However, now that the variable is an InstructionCost
instance the asserts can be removed.

See this thread for context:
http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

See this patch for the introduction of the type:
https://reviews.llvm.org/D91174

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 80d510185470..b03fb203c6d7 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -3806,23 +3806,17 @@ InstructionCost BoUpSLP::getEntryCost(TreeEntry *E) {
   if (NeedToShuffleReuses) {
 for (unsigned Idx : E->ReuseShuffleIndices) {
   Instruction *I = cast(VL[Idx]);
-  InstructionCost Cost = TTI->getInstructionCost(I, CostKind);
-  assert(Cost.isValid() && "Invalid instruction cost");
-  ReuseShuffleCost -= *(Cost.getValue());
+  ReuseShuffleCost -= TTI->getInstructionCost(I, CostKind);
 }
 for (Value *V : VL) {
   Instruction *I = cast(V);
-  InstructionCost Cost = TTI->getInstructionCost(I, CostKind);
-  assert(Cost.isValid() && "Invalid instruction cost");
-  ReuseShuffleCost += *(Cost.getValue());
+  ReuseShuffleCost += TTI->getInstructionCost(I, CostKind);
 }
   }
   for (Value *V : VL) {
 Instruction *I = cast(V);
 assert(E->isOpcodeOrAlt(I) && "Unexpected main/alternate opcode");
-InstructionCost Cost = TTI->getInstructionCost(I, CostKind);
-assert(Cost.isValid() && "Invalid instruction cost");
-ScalarCost += *(Cost.getValue());
+ScalarCost += TTI->getInstructionCost(I, CostKind);
   }
   // VecCost is equal to sum of the cost of creating 2 vectors
   // and the cost of creating shuffle.



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[llvm-branch-commits] [clang] 27b7d64 - [clang][cli] Streamline MarshallingInfoFlag description

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2020-12-21T11:32:46+01:00
New Revision: 27b7d646886d499c70dec3481dfc3c82dfc43dd7

URL: 
https://github.com/llvm/llvm-project/commit/27b7d646886d499c70dec3481dfc3c82dfc43dd7
DIFF: 
https://github.com/llvm/llvm-project/commit/27b7d646886d499c70dec3481dfc3c82dfc43dd7.diff

LOG: [clang][cli] Streamline MarshallingInfoFlag description

This replaces the existing `MarshallingInfoFlag<...>, IsNegative` with simpler 
`MarshallingInfoNegativeFlag`.

Reviewed By: dexonsmith

Original patch by Daniel Grumberg.

Differential Revision: https://reviews.llvm.org/D84675

Added: 


Modified: 
clang/include/clang/Driver/Options.td
llvm/include/llvm/Option/OptParser.td

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 63a5b5484f0f..29ee948f1849 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -696,7 +696,7 @@ def O_flag : Flag<["-"], "O">, Flags<[CC1Option]>, 
Alias, AliasArgs<["1"]>;
 def Ofast : Joined<["-"], "Ofast">, Group, Flags<[CC1Option]>;
 def P : Flag<["-"], "P">, Flags<[CC1Option]>, Group,
   HelpText<"Disable linemarker output in -E mode">,
-  MarshallingInfoFlag<"PreprocessorOutputOpts.ShowLineMarkers", "true">, 
IsNegative;
+  MarshallingInfoNegativeFlag<"PreprocessorOutputOpts.ShowLineMarkers">;
 def Qy : Flag<["-"], "Qy">, Flags<[CC1Option]>,
   HelpText<"Emit metadata containing compiler name and version">;
 def Qn : Flag<["-"], "Qn">, Flags<[CC1Option]>,
@@ -1212,7 +1212,7 @@ def : Flag<["-"], "frecord-gcc-switches">, 
Alias;
 def : Flag<["-"], "fno-record-gcc-switches">, Alias;
 def fcommon : Flag<["-"], "fcommon">, Group,
   Flags<[CoreOption, CC1Option]>, HelpText<"Place uninitialized global 
variables in a common block">,
-  MarshallingInfoFlag<"CodeGenOpts.NoCommon", "true">, IsNegative;
+  MarshallingInfoNegativeFlag<"CodeGenOpts.NoCommon">;
 def fcompile_resource_EQ : Joined<["-"], "fcompile-resource=">, Group;
 defm complete_member_pointers : BoolOption<"complete-member-pointers",
   "LangOpts->CompleteMemberPointers", DefaultsToFalse,
@@ -1856,7 +1856,7 @@ def fmodules_validate_once_per_build_session : 
Flag<["-"], "fmodules-validate-on
 def fmodules_disable_diagnostic_validation : Flag<["-"], 
"fmodules-disable-diagnostic-validation">,
   Group, Flags<[CC1Option]>,
   HelpText<"Disable validation of the diagnostic options when loading the 
module">,
-  MarshallingInfoFlag<"HeaderSearchOpts->ModulesValidateDiagnosticOptions", 
"true">, IsNegative;
+  
MarshallingInfoNegativeFlag<"HeaderSearchOpts->ModulesValidateDiagnosticOptions">;
 defm modules_validate_system_headers : 
BoolOption<"modules-validate-system-headers",
   "HeaderSearchOpts->ModulesValidateSystemHeaders", DefaultsToFalse,
   ChangedBy,
@@ -1944,7 +1944,7 @@ def fno_asm : Flag<["-"], "fno-asm">, Group;
 def fno_asynchronous_unwind_tables : Flag<["-"], 
"fno-asynchronous-unwind-tables">, Group;
 def fno_assume_sane_operator_new : Flag<["-"], 
"fno-assume-sane-operator-new">, Group,
   HelpText<"Don't assume that C++'s global operator new can't alias any 
pointer">,
-  Flags<[CC1Option]>, MarshallingInfoFlag<"CodeGenOpts.AssumeSaneOperatorNew", 
"true">, IsNegative;
+  Flags<[CC1Option]>, 
MarshallingInfoNegativeFlag<"CodeGenOpts.AssumeSaneOperatorNew">;
 def fno_builtin : Flag<["-"], "fno-builtin">, Group, 
Flags<[CC1Option, CoreOption]>,
   HelpText<"Disable implicit builtin knowledge of functions">;
 def fno_builtin_ : Joined<["-"], "fno-builtin-">, Group, 
Flags<[CC1Option, CoreOption]>,
@@ -2022,7 +2022,7 @@ def fno_strict_overflow : Flag<["-"], 
"fno-strict-overflow">, Group;
 def fno_temp_file : Flag<["-"], "fno-temp-file">, Group,
   Flags<[CC1Option, CoreOption]>, HelpText<
   "Directly create compilation output files. This may lead to incorrect 
incremental builds if the compiler crashes">,
-  MarshallingInfoFlag<"FrontendOpts.UseTemporary", "true">, IsNegative;
+  MarshallingInfoNegativeFlag<"FrontendOpts.UseTemporary">;
 defm use_cxa_atexit : BoolFOption<"use-cxa-atexit",
   "CodeGenOpts.CXAAtExit", DefaultsToTrue,
   ChangedBy,
@@ -2030,7 +2030,7 @@ defm use_cxa_atexit : BoolFOption<"use-cxa-atexit",
 def fno_unit_at_a_time : Flag<["-"], "fno-unit-at-a-time">, Group;
 def fno_unwind_tables : Flag<["-"], "fno-unwind-tables">, Group;
 def fno_verbose_asm : Flag<["-"], "fno-verbose-asm">, Group, 
Flags<[CC1Option]>,
-  MarshallingInfoFlag<"CodeGenOpts.AsmVerbose", "true">, IsNegative;
+  MarshallingInfoNegativeFlag<"CodeGenOpts.AsmVerbose">;
 def fno_working_directory : Flag<["-"], "fno-working-directory">, 
Group;
 def fno_wrapv : Flag<["-"], "fno-wrapv">, Group;
 def fobjc_arc : Flag<["-"], "fobjc-arc">, Group, Flags<[CC1Option]>,
@@ -3313,7 +3313,7 @@ def no_pedantic : Flag<["-", "--"], "no-pedantic">, 
Group;
 def no__dead__strip__inits__and__terms : Flag<["-"], 
"no_dead_strip_inits_and_ter

[llvm-branch-commits] [clang] 70410a2 - [clang][cli] Let denormalizer decide how to render the option based on the option class

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2020-12-21T11:32:47+01:00
New Revision: 70410a264949101ced3ce3458f37dd4cc2f5af85

URL: 
https://github.com/llvm/llvm-project/commit/70410a264949101ced3ce3458f37dd4cc2f5af85
DIFF: 
https://github.com/llvm/llvm-project/commit/70410a264949101ced3ce3458f37dd4cc2f5af85.diff

LOG: [clang][cli] Let denormalizer decide how to render the option based on the 
option class

Before this patch, you needed to use `AutoNormalizeEnumJoined` whenever you 
wanted to **de**normalize joined enum.
Besides the naming confusion, this means the fact the option is joined is 
specified in two places: in the normalization multiclass and in the 
`Joined<["-"], ...>` multiclass.
This patch makes this work automatically, taking into account the `OptionClass` 
of options.

Also, the enum denormalizer now just looks up the spelling of the present enum 
case in a table and forwards it to the string denormalizer.

I also added more tests that exercise this.

Reviewed By: dexonsmith

Original patch by Daniel Grumberg.

Differential Revision: https://reviews.llvm.org/D84189

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Frontend/CompilerInvocation.cpp
clang/unittests/Frontend/CompilerInvocationTest.cpp
llvm/include/llvm/Option/OptParser.td

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 29ee948f1849..82c4e9399d9d 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -4882,7 +4882,7 @@ def arcmt_action_EQ : Joined<["-"], "arcmt-action=">, 
Flags<[CC1Option, NoDriver
   NormalizedValuesScope<"FrontendOptions">,
   NormalizedValues<["ARCMT_Check", "ARCMT_Modify", "ARCMT_Migrate"]>,
   MarshallingInfoString<"FrontendOpts.ARCMTAction", "ARCMT_None">,
-  AutoNormalizeEnumJoined;
+  AutoNormalizeEnum;
 
 def opt_record_file : Separate<["-"], "opt-record-file">,
   HelpText<"File name to use for YAML optimization record output">,

diff  --git a/clang/lib/Frontend/CompilerInvocation.cpp 
b/clang/lib/Frontend/CompilerInvocation.cpp
index 00615a70d730..f71b14eabc49 100644
--- a/clang/lib/Frontend/CompilerInvocation.cpp
+++ b/clang/lib/Frontend/CompilerInvocation.cpp
@@ -152,8 +152,8 @@ static Optional 
normalizeSimpleNegativeFlag(OptSpecifier Opt, unsigned,
 /// argument.
 static void denormalizeSimpleFlag(SmallVectorImpl &Args,
   const char *Spelling,
-  CompilerInvocation::StringAllocator, 
unsigned,
-  /*T*/...) {
+  CompilerInvocation::StringAllocator,
+  Option::OptionClass, unsigned, /*T*/...) {
   Args.push_back(Spelling);
 }
 
@@ -200,12 +200,41 @@ static auto makeBooleanOptionNormalizer(bool Value, bool 
OtherValue,
 
 static auto makeBooleanOptionDenormalizer(bool Value) {
   return [Value](SmallVectorImpl &Args, const char *Spelling,
- CompilerInvocation::StringAllocator, unsigned, bool KeyPath) {
+ CompilerInvocation::StringAllocator, Option::OptionClass,
+ unsigned, bool KeyPath) {
 if (KeyPath == Value)
   Args.push_back(Spelling);
   };
 }
 
+static void denormalizeStringImpl(SmallVectorImpl &Args,
+  const char *Spelling,
+  CompilerInvocation::StringAllocator SA,
+  Option::OptionClass OptClass, unsigned,
+  Twine Value) {
+  switch (OptClass) {
+  case Option::SeparateClass:
+  case Option::JoinedOrSeparateClass:
+Args.push_back(Spelling);
+Args.push_back(SA(Value));
+break;
+  case Option::JoinedClass:
+Args.push_back(SA(Twine(Spelling) + Value));
+break;
+  default:
+llvm_unreachable("Cannot denormalize an option with option class "
+ "incompatible with string denormalization.");
+  }
+}
+
+template 
+static void
+denormalizeString(SmallVectorImpl &Args, const char *Spelling,
+  CompilerInvocation::StringAllocator SA,
+  Option::OptionClass OptClass, unsigned TableIndex, T Value) {
+  denormalizeStringImpl(Args, Spelling, SA, OptClass, TableIndex, 
Twine(Value));
+}
+
 static Optional
 findValueTableByName(const SimpleEnumValueTable &Table, StringRef Name) {
   for (int I = 0, E = Table.Size; I != E; ++I)
@@ -247,12 +276,13 @@ static llvm::Optional 
normalizeSimpleEnum(OptSpecifier Opt,
 static void denormalizeSimpleEnumImpl(SmallVectorImpl &Args,
   const char *Spelling,
   CompilerInvocation::StringAllocator SA,
+  Option::OptionClass OptClass,
   unsigned TableIndex, unsigned Value) {
   assert(TableIndex < SimpleEnu

[llvm-branch-commits] [clang] 5a85526 - [clang] Use enum for LangOptions::SYCLVersion instead of unsigned

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2020-12-21T11:32:47+01:00
New Revision: 5a85526728c9e57efe26f322e4718fffd2634d23

URL: 
https://github.com/llvm/llvm-project/commit/5a85526728c9e57efe26f322e4718fffd2634d23
DIFF: 
https://github.com/llvm/llvm-project/commit/5a85526728c9e57efe26f322e4718fffd2634d23.diff

LOG: [clang] Use enum for LangOptions::SYCLVersion instead of unsigned

`LangOptions::SYCLVersion` can only have two values. This patch introduces an 
enum that allows us to reduce the member size from 32 bits to 1 bit.

Consequently, this also makes marshalling of this option fit into our model for 
enums: D84674.

Reviewed By: bader

Differential Revision: https://reviews.llvm.org/D93540

Added: 


Modified: 
clang/include/clang/Basic/LangOptions.def
clang/include/clang/Basic/LangOptions.h
clang/lib/Frontend/CompilerInvocation.cpp
clang/lib/Frontend/InitPreprocessor.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/LangOptions.def 
b/clang/include/clang/Basic/LangOptions.def
index 251fd68f4df8..cc5eb939dbd2 100644
--- a/clang/include/clang/Basic/LangOptions.def
+++ b/clang/include/clang/Basic/LangOptions.def
@@ -246,7 +246,7 @@ LANGOPT(GPUExcludeWrongSideOverloads, 1, 0, "always exclude 
wrong side overloads
 
 LANGOPT(SYCL  , 1, 0, "SYCL")
 LANGOPT(SYCLIsDevice  , 1, 0, "Generate code for SYCL device")
-LANGOPT(SYCLVersion   , 32, 0, "Version of the SYCL standard used")
+ENUM_LANGOPT(SYCLVersion  , SYCLMajorVersion, 1, SYCL_None, "Version of the 
SYCL standard used")
 
 LANGOPT(HIPUseNewLaunchAPI, 1, 0, "Use new kernel launching API for HIP")
 

diff  --git a/clang/include/clang/Basic/LangOptions.h 
b/clang/include/clang/Basic/LangOptions.h
index ed9f729417af..8b3fb562561f 100644
--- a/clang/include/clang/Basic/LangOptions.h
+++ b/clang/include/clang/Basic/LangOptions.h
@@ -125,6 +125,11 @@ class LangOptions : public LangOptionsBase {
 MSVC2019 = 1920,
   };
 
+  enum SYCLMajorVersion {
+SYCL_None,
+SYCL_2017,
+  };
+
   /// Clang versions with 
diff erent platform ABI conformance.
   enum class ClangABI {
 /// Attempt to be ABI-compatible with code generated by Clang 3.8.x

diff  --git a/clang/lib/Frontend/CompilerInvocation.cpp 
b/clang/lib/Frontend/CompilerInvocation.cpp
index f71b14eabc49..fc5fd1547599 100644
--- a/clang/lib/Frontend/CompilerInvocation.cpp
+++ b/clang/lib/Frontend/CompilerInvocation.cpp
@@ -2277,11 +2277,13 @@ static void ParseLangArgs(LangOptions &Opts, ArgList 
&Args, InputKind IK,
 // -sycl-std applies to any SYCL source, not only those containing kernels,
 // but also those using the SYCL API
 if (const Arg *A = Args.getLastArg(OPT_sycl_std_EQ)) {
-  Opts.SYCLVersion = llvm::StringSwitch(A->getValue())
- .Cases("2017", "1.2.1", "121", "sycl-1.2.1", 2017)
- .Default(0U);
+  Opts.setSYCLVersion(
+  llvm::StringSwitch(A->getValue())
+  .Cases("2017", "1.2.1", "121", "sycl-1.2.1",
+ LangOptions::SYCL_2017)
+  .Default(LangOptions::SYCL_None));
 
-  if (Opts.SYCLVersion == 0U) {
+  if (Opts.getSYCLVersion() == LangOptions::SYCL_None) {
 // User has passed an invalid value to the flag, this is an error
 Diags.Report(diag::err_drv_invalid_value)
 << A->getAsString(Args) << A->getValue();

diff  --git a/clang/lib/Frontend/InitPreprocessor.cpp 
b/clang/lib/Frontend/InitPreprocessor.cpp
index d4b77a65aa63..87af9247b91c 100644
--- a/clang/lib/Frontend/InitPreprocessor.cpp
+++ b/clang/lib/Frontend/InitPreprocessor.cpp
@@ -476,7 +476,7 @@ static void InitializeStandardPredefinedMacros(const 
TargetInfo &TI,
 
   if (LangOpts.SYCL) {
 // SYCL Version is set to a value when building SYCL applications
-if (LangOpts.SYCLVersion == 2017)
+if (LangOpts.getSYCLVersion() == LangOptions::SYCL_2017)
   Builder.defineMacro("CL_SYCL_LANGUAGE_VERSION", "121");
   }
 



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[llvm-branch-commits] [llvm] 93da221 - [VP][NFC] ISD::VP_Sub -> ISD::VP_SUB

[Simon Moll via llvm-branch-commits]

Author: Simon Moll
Date: 2020-12-21T11:43:07+01:00
New Revision: 93da221eaf7ab6ed8afa57f13e5155e6e2286337

URL: 
https://github.com/llvm/llvm-project/commit/93da221eaf7ab6ed8afa57f13e5155e6e2286337
DIFF: 
https://github.com/llvm/llvm-project/commit/93da221eaf7ab6ed8afa57f13e5155e6e2286337.diff

LOG: [VP][NFC] ISD::VP_Sub -> ISD::VP_SUB

Added: 


Modified: 
llvm/include/llvm/IR/VPIntrinsics.def

Removed: 




diff  --git a/llvm/include/llvm/IR/VPIntrinsics.def 
b/llvm/include/llvm/IR/VPIntrinsics.def
index 3073866da4c9..981548c6dde9 100644
--- a/llvm/include/llvm/IR/VPIntrinsics.def
+++ b/llvm/include/llvm/IR/VPIntrinsics.def
@@ -131,7 +131,7 @@ HELPER_REGISTER_BINARY_INT_VP(vp_shl, VP_SHL, Shl)
 HELPER_REGISTER_BINARY_INT_VP(vp_srem, VP_SREM, SRem)
 
 // llvm.vp.sub(x,y,mask,vlen)
-HELPER_REGISTER_BINARY_INT_VP(vp_sub, VP_Sub, Sub)
+HELPER_REGISTER_BINARY_INT_VP(vp_sub, VP_SUB, Sub)
 
 // llvm.vp.udiv(x,y,mask,vlen)
 HELPER_REGISTER_BINARY_INT_VP(vp_udiv, VP_UDIV, UDiv)



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[llvm-branch-commits] [llvm] cd608dc - [VPlan] Use VPDef for VPInterleaveRecipe.

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2020-12-21T10:56:53Z
New Revision: cd608dc8d3e975fa3c57327d2146b5c223bcf83a

URL: 
https://github.com/llvm/llvm-project/commit/cd608dc8d3e975fa3c57327d2146b5c223bcf83a
DIFF: 
https://github.com/llvm/llvm-project/commit/cd608dc8d3e975fa3c57327d2146b5c223bcf83a.diff

LOG: [VPlan] Use VPDef for VPInterleaveRecipe.

This patch turns updates VPInterleaveRecipe to manage the values it defines
using VPDef. The VPValue is used  during VPlan construction and
codegeneration instead of the plain IR reference where possible.

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D90562

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
llvm/lib/Transforms/Vectorize/VPlan.cpp
llvm/lib/Transforms/Vectorize/VPlan.h
llvm/unittests/Transforms/Vectorize/VPlanTest.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp 
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index e486f7110295..25deab6d2b35 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -569,6 +569,7 @@ class InnerLoopVectorizer {
   /// BlockInMask is non-null. Use \p State to translate given VPValues to IR
   /// values in the vectorized loop.
   void vectorizeInterleaveGroup(const InterleaveGroup *Group,
+ArrayRef VPDefs,
 VPTransformState &State, VPValue *Addr,
 ArrayRef StoredValues,
 VPValue *BlockInMask = nullptr);
@@ -2514,8 +2515,9 @@ static bool useMaskedInterleavedAccesses(const 
TargetTransformInfo &TTI) {
 //<0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>; Interleave R,G,B elements
 //   store <12 x i32> %interleaved.vec  ; Write 4 tuples of R,G,B
 void InnerLoopVectorizer::vectorizeInterleaveGroup(
-const InterleaveGroup *Group, VPTransformState &State,
-VPValue *Addr, ArrayRef StoredValues, VPValue *BlockInMask) {
+const InterleaveGroup *Group, ArrayRef VPDefs,
+VPTransformState &State, VPValue *Addr, ArrayRef StoredValues,
+VPValue *BlockInMask) {
   Instruction *Instr = Group->getInsertPos();
   const DataLayout &DL = Instr->getModule()->getDataLayout();
 
@@ -2617,6 +2619,7 @@ void InnerLoopVectorizer::vectorizeInterleaveGroup(
 
 // For each member in the group, shuffle out the appropriate data from the
 // wide loads.
+unsigned J = 0;
 for (unsigned I = 0; I < InterleaveFactor; ++I) {
   Instruction *Member = Group->getMember(I);
 
@@ -2641,8 +2644,9 @@ void InnerLoopVectorizer::vectorizeInterleaveGroup(
 if (Group->isReverse())
   StridedVec = reverseVector(StridedVec);
 
-VectorLoopValueMap.setVectorValue(Member, Part, StridedVec);
+State.set(VPDefs[J], Member, StridedVec, Part);
   }
+  ++J;
 }
 return;
   }
@@ -7980,9 +7984,8 @@ VPValue *VPRecipeBuilder::createBlockInMask(BasicBlock 
*BB, VPlanPtr &Plan) {
   return BlockMaskCache[BB] = BlockMask;
 }
 
-VPWidenMemoryInstructionRecipe *
-VPRecipeBuilder::tryToWidenMemory(Instruction *I, VFRange &Range,
-  VPlanPtr &Plan) {
+VPRecipeBase *VPRecipeBuilder::tryToWidenMemory(Instruction *I, VFRange &Range,
+VPlanPtr &Plan) {
   assert((isa(I) || isa(I)) &&
  "Must be called with either a load or store");
 
@@ -8472,16 +8475,17 @@ VPlanPtr 
LoopVectorizationPlanner::buildVPlanWithVPRecipes(
   if (auto *SI = dyn_cast_or_null(IG->getMember(i)))
 StoredValues.push_back(Plan->getOrAddVPValue(SI->getOperand(0)));
 
-(new VPInterleaveRecipe(IG, Recipe->getAddr(), StoredValues,
-Recipe->getMask()))
-->insertBefore(Recipe);
-
+auto *VPIG = new VPInterleaveRecipe(IG, Recipe->getAddr(), StoredValues,
+Recipe->getMask());
+VPIG->insertBefore(Recipe);
+unsigned J = 0;
 for (unsigned i = 0; i < IG->getFactor(); ++i)
   if (Instruction *Member = IG->getMember(i)) {
 if (!Member->getType()->isVoidTy()) {
   VPValue *OriginalV = Plan->getVPValue(Member);
   Plan->removeVPValueFor(Member);
-  OriginalV->replaceAllUsesWith(Plan->getOrAddVPValue(Member));
+  OriginalV->replaceAllUsesWith(VPIG->getVPValue(J));
+  J++;
 }
 RecipeBuilder.getRecipe(Member)->eraseFromParent();
   }
@@ -8713,8 +8717,8 @@ void VPBlendRecipe::execute(VPTransformState &State) {
 
 void VPInterleaveRecipe::execute(VPTransformState &State) {
   assert(!State.Instance && "Interleave group being replicated.");
-  State.ILV->vectorizeInterleaveGroup(IG, State, getAddr(), getStoredValues(),
-  getMask());
+  State.

[llvm-branch-commits] [llvm] d99e4a4 - [VE] Support RETURNADDR

[Kazushi Marukawa via llvm-branch-commits]

Author: Kazushi (Jam) Marukawa
Date: 2020-12-21T20:06:03+09:00
New Revision: d99e4a4840d833c6e381c2ab76b15451dffb56b2

URL: 
https://github.com/llvm/llvm-project/commit/d99e4a4840d833c6e381c2ab76b15451dffb56b2
DIFF: 
https://github.com/llvm/llvm-project/commit/d99e4a4840d833c6e381c2ab76b15451dffb56b2.diff

LOG: [VE] Support RETURNADDR

Implement RETURNADDR for VE.  Add a regression test also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93545

Added: 
llvm/test/CodeGen/VE/Scalar/returnaddr.ll

Modified: 
llvm/lib/Target/VE/VEISelLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/VE/VEISelLowering.cpp 
b/llvm/lib/Target/VE/VEISelLowering.cpp
index 408c28205aa2..da5b6422f53d 100644
--- a/llvm/lib/Target/VE/VEISelLowering.cpp
+++ b/llvm/lib/Target/VE/VEISelLowering.cpp
@@ -1510,6 +1510,26 @@ static SDValue lowerFRAMEADDR(SDValue Op, SelectionDAG 
&DAG,
   return FrameAddr;
 }
 
+static SDValue lowerRETURNADDR(SDValue Op, SelectionDAG &DAG,
+   const VETargetLowering &TLI,
+   const VESubtarget *Subtarget) {
+  MachineFunction &MF = DAG.getMachineFunction();
+  MachineFrameInfo &MFI = MF.getFrameInfo();
+  MFI.setReturnAddressIsTaken(true);
+
+  if (TLI.verifyReturnAddressArgumentIsConstant(Op, DAG))
+return SDValue();
+
+  SDValue FrameAddr = lowerFRAMEADDR(Op, DAG, TLI, Subtarget);
+
+  SDLoc DL(Op);
+  EVT VT = Op.getValueType();
+  SDValue Offset = DAG.getConstant(8, DL, VT);
+  return DAG.getLoad(VT, DL, DAG.getEntryNode(),
+ DAG.getNode(ISD::ADD, DL, VT, FrameAddr, Offset),
+ MachinePointerInfo());
+}
+
 static SDValue getSplatValue(SDNode *N) {
   if (auto *BuildVec = dyn_cast(N)) {
 return BuildVec->getSplatValue();
@@ -1560,6 +1580,8 @@ SDValue VETargetLowering::LowerOperation(SDValue Op, 
SelectionDAG &DAG) const {
 return lowerJumpTable(Op, DAG);
   case ISD::LOAD:
 return lowerLOAD(Op, DAG);
+  case ISD::RETURNADDR:
+return lowerRETURNADDR(Op, DAG, *this, Subtarget);
   case ISD::BUILD_VECTOR:
 return lowerBUILD_VECTOR(Op, DAG);
   case ISD::STORE:

diff  --git a/llvm/test/CodeGen/VE/Scalar/returnaddr.ll 
b/llvm/test/CodeGen/VE/Scalar/returnaddr.ll
new file mode 100644
index ..ea1b5f687c9d
--- /dev/null
+++ b/llvm/test/CodeGen/VE/Scalar/returnaddr.ll
@@ -0,0 +1,91 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=ve-- | FileCheck %s
+
+define i8* @h() nounwind readnone optsize {
+; CHECK-LABEL: h:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:st %s9, (, %s11)
+; CHECK-NEXT:st %s10, 8(, %s11)
+; CHECK-NEXT:or %s9, 0, %s11
+; CHECK-NEXT:lea %s11, -176(, %s11)
+; CHECK-NEXT:brge.l.t %s11, %s8, .LBB0_2
+; CHECK-NEXT:  # %bb.1: # %entry
+; CHECK-NEXT:ld %s61, 24(, %s14)
+; CHECK-NEXT:or %s62, 0, %s0
+; CHECK-NEXT:lea %s63, 315
+; CHECK-NEXT:shm.l %s63, (%s61)
+; CHECK-NEXT:shm.l %s8, 8(%s61)
+; CHECK-NEXT:shm.l %s11, 16(%s61)
+; CHECK-NEXT:monc
+; CHECK-NEXT:or %s0, 0, %s62
+; CHECK-NEXT:  .LBB0_2: # %entry
+; CHECK-NEXT:ld %s0, (, %s9)
+; CHECK-NEXT:ld %s0, (, %s0)
+; CHECK-NEXT:ld %s0, 8(, %s0)
+; CHECK-NEXT:or %s11, 0, %s9
+; CHECK-NEXT:ld %s10, 8(, %s11)
+; CHECK-NEXT:ld %s9, (, %s11)
+; CHECK-NEXT:b.l.t (, %s10)
+entry:
+  %ret = tail call i8* @llvm.returnaddress(i32 2)
+  ret i8* %ret
+}
+
+declare i8* @llvm.returnaddress(i32) nounwind readnone
+
+define i8* @g() nounwind readnone optsize {
+; CHECK-LABEL: g:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:st %s9, (, %s11)
+; CHECK-NEXT:st %s10, 8(, %s11)
+; CHECK-NEXT:or %s9, 0, %s11
+; CHECK-NEXT:lea %s11, -176(, %s11)
+; CHECK-NEXT:brge.l.t %s11, %s8, .LBB1_2
+; CHECK-NEXT:  # %bb.1: # %entry
+; CHECK-NEXT:ld %s61, 24(, %s14)
+; CHECK-NEXT:or %s62, 0, %s0
+; CHECK-NEXT:lea %s63, 315
+; CHECK-NEXT:shm.l %s63, (%s61)
+; CHECK-NEXT:shm.l %s8, 8(%s61)
+; CHECK-NEXT:shm.l %s11, 16(%s61)
+; CHECK-NEXT:monc
+; CHECK-NEXT:or %s0, 0, %s62
+; CHECK-NEXT:  .LBB1_2: # %entry
+; CHECK-NEXT:ld %s0, (, %s9)
+; CHECK-NEXT:ld %s0, 8(, %s0)
+; CHECK-NEXT:or %s11, 0, %s9
+; CHECK-NEXT:ld %s10, 8(, %s11)
+; CHECK-NEXT:ld %s9, (, %s11)
+; CHECK-NEXT:b.l.t (, %s10)
+entry:
+  %ret = tail call i8* @llvm.returnaddress(i32 1)
+  ret i8* %ret
+}
+
+define i8* @f() nounwind readnone optsize {
+; CHECK-LABEL: f:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:st %s9, (, %s11)
+; CHECK-NEXT:st %s10, 8(, %s11)
+; CHECK-NEXT:or %s9, 0, %s11
+; CHECK-NEXT:lea %s11, -176(, %s11)
+; CHECK-NEXT:brge.l.t %s11, %s8, .LBB2_2
+; CHECK-NEXT:  # %bb.1: # %entry
+; CHECK-NEXT:ld %s61, 24(, %s14)
+; CHECK-NEXT:or %s62, 0, %s0
+; CHECK-NEXT:lea %s63, 315
+; CHECK-NEXT:shm.l %s63, (%s61)

[llvm-branch-commits] [llvm] 5e273b8 - [VE] Support STACKSAVE and STACKRESTORE

[Kazushi Marukawa via llvm-branch-commits]

Author: Kazushi (Jam) Marukawa
Date: 2020-12-21T20:15:50+09:00
New Revision: 5e273b845bc4411c23f5da0ebbf5d4dfd6b91f13

URL: 
https://github.com/llvm/llvm-project/commit/5e273b845bc4411c23f5da0ebbf5d4dfd6b91f13
DIFF: 
https://github.com/llvm/llvm-project/commit/5e273b845bc4411c23f5da0ebbf5d4dfd6b91f13.diff

LOG: [VE] Support STACKSAVE and STACKRESTORE

Change to use default expanded code.  Add regression tests also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93539

Added: 
llvm/test/CodeGen/VE/Scalar/stacksave.ll

Modified: 
llvm/lib/Target/VE/VEISelLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/VE/VEISelLowering.cpp 
b/llvm/lib/Target/VE/VEISelLowering.cpp
index da5b6422f53d..ea9281a00502 100644
--- a/llvm/lib/Target/VE/VEISelLowering.cpp
+++ b/llvm/lib/Target/VE/VEISelLowering.cpp
@@ -135,6 +135,10 @@ void VETargetLowering::initSPUActions() {
   /// Stack {
   setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
   setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Custom);
+
+  // Use the default implementation.
+  setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
+  setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
   /// } Stack
 
   /// Branch {

diff  --git a/llvm/test/CodeGen/VE/Scalar/stacksave.ll 
b/llvm/test/CodeGen/VE/Scalar/stacksave.ll
new file mode 100644
index ..336f9b83455f
--- /dev/null
+++ b/llvm/test/CodeGen/VE/Scalar/stacksave.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -mtriple=ve | FileCheck %s
+
+; Function Attrs: noinline nounwind optnone
+define i8* @stacksave() {
+; CHECK-LABEL: stacksave:
+; CHECK:   .LBB{{[0-9]+}}_2:
+; CHECK-NEXT:or %s0, 0, %s11
+; CHECK-NEXT:or %s11, 0, %s9
+  %ret = call i8* @llvm.stacksave()
+  ret i8* %ret
+}
+
+; Function Attrs: noinline nounwind optnone
+define void @stackrestore(i8* %ptr) {
+; CHECK-LABEL: stackrestore:
+; CHECK:   .LBB{{[0-9]+}}_2:
+; CHECK-NEXT:or %s11, 0, %s0
+; CHECK-NEXT:or %s11, 0, %s9
+  call void @llvm.stackrestore(i8* %ptr)
+  ret void
+}
+
+; Function Attrs: nounwind
+declare i8* @llvm.stacksave()
+; Function Attrs: nounwind
+declare void @llvm.stackrestore(i8*)



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[llvm-branch-commits] [flang] d6abd73 - [flang][driver] Make the names of files created in unit tests unique (nfc)

[Andrzej Warzynski via llvm-branch-commits]

Author: Andrzej Warzynski
Date: 2020-12-21T11:20:06Z
New Revision: d6abd7317a269dc7d0204edb8e98f8fcc1a18a2f

URL: 
https://github.com/llvm/llvm-project/commit/d6abd7317a269dc7d0204edb8e98f8fcc1a18a2f
DIFF: 
https://github.com/llvm/llvm-project/commit/d6abd7317a269dc7d0204edb8e98f8fcc1a18a2f.diff

LOG: [flang][driver] Make the names of files created in unit tests unique (nfc)

Using files with identical names leads to unexpected failures when tests
are run in parallel. This is tricky to reproduce, but has been happening
on some buildbots since merging https://reviews.llvm.org/D92854. In that
patch I added a unit test with a non-unique test file. This patch fixes
that.

Added: 


Modified: 
flang/unittests/Frontend/FrontendActionTest.cpp

Removed: 




diff  --git a/flang/unittests/Frontend/FrontendActionTest.cpp 
b/flang/unittests/Frontend/FrontendActionTest.cpp
index 78161f691eff..b49b7312525a 100644
--- a/flang/unittests/Frontend/FrontendActionTest.cpp
+++ b/flang/unittests/Frontend/FrontendActionTest.cpp
@@ -18,7 +18,7 @@ using namespace Fortran::frontend;
 namespace {
 
 TEST(FrontendAction, PrintPreprocessedInput) {
-  std::string inputFile = "test-file.f";
+  std::string inputFile = "pp-test-file.f";
   std::error_code ec;
 
   // 1. Create the input file for the file manager
@@ -78,7 +78,7 @@ TEST(FrontendAction, PrintPreprocessedInput) {
 }
 
 TEST(FrontendAction, ParseSyntaxOnly) {
-  std::string inputFile = "test-file.f";
+  std::string inputFile = "syntax-only-test-file.f";
   std::error_code ec;
 
   // 1. Create the input file for the file manager



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[llvm-branch-commits] [llvm] 06b83fd - [TableGen] NFC: Switch to range-based for loops in OptParserEmitter

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2020-12-21T12:36:46+01:00
New Revision: 06b83fd6c75b48a6a93dc580fb4409e13608a045

URL: 
https://github.com/llvm/llvm-project/commit/06b83fd6c75b48a6a93dc580fb4409e13608a045
DIFF: 
https://github.com/llvm/llvm-project/commit/06b83fd6c75b48a6a93dc580fb4409e13608a045.diff

LOG: [TableGen] NFC: Switch to range-based for loops in OptParserEmitter

This simplifies the code a bit. No functionality change.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D93526

Added: 


Modified: 
llvm/utils/TableGen/OptParserEmitter.cpp

Removed: 




diff  --git a/llvm/utils/TableGen/OptParserEmitter.cpp 
b/llvm/utils/TableGen/OptParserEmitter.cpp
index b3fe9d7a91d1..794485256d50 100644
--- a/llvm/utils/TableGen/OptParserEmitter.cpp
+++ b/llvm/utils/TableGen/OptParserEmitter.cpp
@@ -219,8 +219,7 @@ void EmitOptParser(RecordKeeper &Records, raw_ostream &OS) {
   PrefixesT Prefixes;
   Prefixes.insert(std::make_pair(PrefixKeyT(), "prefix_0"));
   unsigned CurPrefix = 0;
-  for (unsigned i = 0, e = Opts.size(); i != e; ++i) {
-const Record &R = *Opts[i];
+  for (const Record &R : llvm::make_pointee_range(Opts)) {
 std::vector prf = R.getValueAsListOfStrings("Prefixes");
 PrefixKeyT prfkey(prf.begin(), prf.end());
 unsigned NewPrefix = CurPrefix + 1;
@@ -235,19 +234,16 @@ void EmitOptParser(RecordKeeper &Records, raw_ostream 
&OS) {
   OS << "// Prefixes\n\n";
   OS << "#ifdef PREFIX\n";
   OS << "#define COMMA ,\n";
-  for (PrefixesT::const_iterator I = Prefixes.begin(), E = Prefixes.end();
-  I != E; ++I) {
+  for (const auto &Prefix : Prefixes) {
 OS << "PREFIX(";
 
 // Prefix name.
-OS << I->second;
+OS << Prefix.second;
 
 // Prefix values.
 OS << ", {";
-for (PrefixKeyT::const_iterator PI = I->first.begin(),
-PE = I->first.end(); PI != PE; ++PI) {
-  OS << "\"" << *PI << "\" COMMA ";
-}
+for (StringRef PrefixKey : Prefix.first)
+  OS << "\"" << PrefixKey << "\" COMMA ";
 OS << "nullptr})\n";
   }
   OS << "#undef COMMA\n";
@@ -256,9 +252,7 @@ void EmitOptParser(RecordKeeper &Records, raw_ostream &OS) {
   OS << "/\n";
   OS << "// Groups\n\n";
   OS << "#ifdef OPTION\n";
-  for (unsigned i = 0, e = Groups.size(); i != e; ++i) {
-const Record &R = *Groups[i];
-
+  for (const Record &R : llvm::make_pointee_range(Groups)) {
 // Start a single option entry.
 OS << "OPTION(";
 
@@ -343,8 +337,8 @@ void EmitOptParser(RecordKeeper &Records, raw_ostream &OS) {
   OS << "nullptr";
 } else {
   OS << "\"";
-  for (size_t i = 0, e = AliasArgs.size(); i != e; ++i)
-OS << AliasArgs[i] << "\\0";
+  for (StringRef AliasArg : AliasArgs)
+OS << AliasArg << "\\0";
   OS << "\"";
 }
 
@@ -394,9 +388,7 @@ void EmitOptParser(RecordKeeper &Records, raw_ostream &OS) {
   };
 
   std::vector OptsWithMarshalling;
-  for (unsigned I = 0, E = Opts.size(); I != E; ++I) {
-const Record &R = *Opts[I];
-
+  for (const Record &R : llvm::make_pointee_range(Opts)) {
 // Start a single option entry.
 OS << "OPTION(";
 WriteOptRecordFields(OS, R);
@@ -462,8 +454,7 @@ void EmitOptParser(RecordKeeper &Records, raw_ostream &OS) {
   OS << "#ifdef OPTTABLE_ARG_INIT\n";
   OS << "//\n";
   OS << "// Option Values\n\n";
-  for (unsigned I = 0, E = Opts.size(); I != E; ++I) {
-const Record &R = *Opts[I];
+  for (const Record &R : llvm::make_pointee_range(Opts)) {
 if (isa(R.getValueInit("ValuesCode")))
   continue;
 OS << "{\n";



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[llvm-branch-commits] [llvm] 164bcbd - [TableGen] NFC: Rename variables in OptParserEmitter

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2020-12-21T12:36:46+01:00
New Revision: 164bcbd40e6d10cd8a01477e2e9029b955fea93b

URL: 
https://github.com/llvm/llvm-project/commit/164bcbd40e6d10cd8a01477e2e9029b955fea93b
DIFF: 
https://github.com/llvm/llvm-project/commit/164bcbd40e6d10cd8a01477e2e9029b955fea93b.diff

LOG: [TableGen] NFC: Rename variables in OptParserEmitter

Switch to the LLVM naming convention.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D93527

Added: 


Modified: 
llvm/utils/TableGen/OptParserEmitter.cpp

Removed: 




diff  --git a/llvm/utils/TableGen/OptParserEmitter.cpp 
b/llvm/utils/TableGen/OptParserEmitter.cpp
index 794485256d50..a08a837e5e70 100644
--- a/llvm/utils/TableGen/OptParserEmitter.cpp
+++ b/llvm/utils/TableGen/OptParserEmitter.cpp
@@ -220,11 +220,11 @@ void EmitOptParser(RecordKeeper &Records, raw_ostream 
&OS) {
   Prefixes.insert(std::make_pair(PrefixKeyT(), "prefix_0"));
   unsigned CurPrefix = 0;
   for (const Record &R : llvm::make_pointee_range(Opts)) {
-std::vector prf = R.getValueAsListOfStrings("Prefixes");
-PrefixKeyT prfkey(prf.begin(), prf.end());
+std::vector RPrefixes = R.getValueAsListOfStrings("Prefixes");
+PrefixKeyT PrefixKey(RPrefixes.begin(), RPrefixes.end());
 unsigned NewPrefix = CurPrefix + 1;
-if (Prefixes.insert(std::make_pair(prfkey, (Twine("prefix_") +
-  Twine(NewPrefix)).str())).second)
+std::string Prefix = (Twine("prefix_") + Twine(NewPrefix)).str();
+if (Prefixes.insert(std::make_pair(PrefixKey, Prefix)).second)
   CurPrefix = NewPrefix;
   }
 
@@ -299,8 +299,8 @@ void EmitOptParser(RecordKeeper &Records, raw_ostream &OS) {
 
   auto WriteOptRecordFields = [&](raw_ostream &OS, const Record &R) {
 // The option prefix;
-std::vector prf = R.getValueAsListOfStrings("Prefixes");
-OS << Prefixes[PrefixKeyT(prf.begin(), prf.end())] << ", ";
+std::vector RPrefixes = R.getValueAsListOfStrings("Prefixes");
+OS << Prefixes[PrefixKeyT(RPrefixes.begin(), RPrefixes.end())] << ", ";
 
 // The option string.
 emitNameUsingSpelling(OS, R);



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[llvm-branch-commits] [llvm] a3a896d - [VE] Optimize LEA combinations

[Kazushi Marukawa via llvm-branch-commits]

Author: Kazushi (Jam) Marukawa
Date: 2020-12-21T22:21:10+09:00
New Revision: a3a896d1cdc0fd2f87de4787120eaac08e69eb5f

URL: 
https://github.com/llvm/llvm-project/commit/a3a896d1cdc0fd2f87de4787120eaac08e69eb5f
DIFF: 
https://github.com/llvm/llvm-project/commit/a3a896d1cdc0fd2f87de4787120eaac08e69eb5f.diff

LOG: [VE] Optimize LEA combinations

Change to optimize references of elements of aggregate data.  Also
add regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93627

Added: 
llvm/test/CodeGen/VE/Scalar/lea-opt.ll

Modified: 
llvm/lib/Target/VE/VEInstrInfo.td

Removed: 




diff  --git a/llvm/lib/Target/VE/VEInstrInfo.td 
b/llvm/lib/Target/VE/VEInstrInfo.td
index fce3bf06b9d3..debd00ff6f96 100644
--- a/llvm/lib/Target/VE/VEInstrInfo.td
+++ b/llvm/lib/Target/VE/VEInstrInfo.td
@@ -1608,6 +1608,8 @@ def vehi_only : OutPatFrag<(ops node:$hi),
(LEASLzii 0, 0, $hi)>;
 def vehi_lo : OutPatFrag<(ops node:$hi, node:$lo),
  (LEASLrii $lo, 0, $hi)>;
+def vehi_lo_imm : OutPatFrag<(ops node:$hi, node:$lo, node:$idx),
+ (LEASLrii $lo, $idx, $hi)>;
 def vehi_baselo : OutPatFrag<(ops node:$base, node:$hi, node:$lo),
  (LEASLrri $base, $lo, $hi)>;
 foreach type = [ "tblockaddress", "tconstpool", "texternalsym", "tglobaladdr",
@@ -1615,6 +1617,8 @@ foreach type = [ "tblockaddress", "tconstpool", 
"texternalsym", "tglobaladdr",
   def : Pat<(VElo !cast(type):$lo), (velo_only $lo)>;
   def : Pat<(VEhi !cast(type):$hi), (vehi_only $hi)>;
   def : Pat<(add (VEhi !cast(type):$hi), I64:$lo), (vehi_lo $hi, $lo)>;
+  def : Pat<(add (add (VEhi !cast(type):$hi), I64:$lo), simm7:$val),
+(vehi_lo_imm $hi, $lo, (LO7 $val))>;
   def : Pat<(add I64:$base, (add (VEhi !cast(type):$hi), I64:$lo)),
 (vehi_baselo $base, $hi, $lo)>;
 }

diff  --git a/llvm/test/CodeGen/VE/Scalar/lea-opt.ll 
b/llvm/test/CodeGen/VE/Scalar/lea-opt.ll
new file mode 100644
index ..356b27653f4f
--- /dev/null
+++ b/llvm/test/CodeGen/VE/Scalar/lea-opt.ll
@@ -0,0 +1,63 @@
+; RUN: llc < %s -mtriple=ve | FileCheck %s
+; RUN: llc < %s -mtriple=ve -relocation-model=pic \
+; RUN: | FileCheck %s --check-prefix=PIC
+
+;;; Tests for lea instruction and its optimizations
+
+%struct.buffer = type { i64, [1 x i8] }
+
+@data = internal global i8 0, align 1
+@buf = internal global %struct.buffer zeroinitializer, align 8
+
+; Function Attrs: norecurse nounwind readnone
+define nonnull i8* @lea_basic() {
+; CHECK-LABEL: lea_basic:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:lea %s0, data@lo
+; CHECK-NEXT:and %s0, %s0, (32)0
+; CHECK-NEXT:lea.sl %s0, data@hi(, %s0)
+; CHECK-NEXT:b.l.t (, %s10)
+;
+; PIC-LABEL: lea_basic:
+; PIC:   # %bb.0:
+; PIC-NEXT:st %s15, 24(, %s11)
+; PIC-NEXT:st %s16, 32(, %s11)
+; PIC-NEXT:lea %s15, _GLOBAL_OFFSET_TABLE_@pc_lo(-24)
+; PIC-NEXT:and %s15, %s15, (32)0
+; PIC-NEXT:sic %s16
+; PIC-NEXT:lea.sl %s15, _GLOBAL_OFFSET_TABLE_@pc_hi(%s16, %s15)
+; PIC-NEXT:lea %s0, data@gotoff_lo
+; PIC-NEXT:and %s0, %s0, (32)0
+; PIC-NEXT:lea.sl %s0, data@gotoff_hi(%s0, %s15)
+; PIC-NEXT:ld %s16, 32(, %s11)
+; PIC-NEXT:ld %s15, 24(, %s11)
+; PIC-NEXT:b.l.t (, %s10)
+  ret i8* @data
+}
+
+; Function Attrs: norecurse nounwind readnone
+define i8* @lea_offset() {
+; CHECK-LABEL: lea_offset:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:lea %s0, buf@lo
+; CHECK-NEXT:and %s0, %s0, (32)0
+; CHECK-NEXT:lea.sl %s0, buf@hi(8, %s0)
+; CHECK-NEXT:b.l.t (, %s10)
+;
+; PIC-LABEL: lea_offset:
+; PIC:   # %bb.0:
+; PIC-NEXT:st %s15, 24(, %s11)
+; PIC-NEXT:st %s16, 32(, %s11)
+; PIC-NEXT:lea %s15, _GLOBAL_OFFSET_TABLE_@pc_lo(-24)
+; PIC-NEXT:and %s15, %s15, (32)0
+; PIC-NEXT:sic %s16
+; PIC-NEXT:lea.sl %s15, _GLOBAL_OFFSET_TABLE_@pc_hi(%s16, %s15)
+; PIC-NEXT:lea %s0, buf@gotoff_lo
+; PIC-NEXT:and %s0, %s0, (32)0
+; PIC-NEXT:lea.sl %s0, buf@gotoff_hi(, %s0)
+; PIC-NEXT:lea %s0, 8(%s0, %s15)
+; PIC-NEXT:ld %s16, 32(, %s11)
+; PIC-NEXT:ld %s15, 24(, %s11)
+; PIC-NEXT:b.l.t (, %s10)
+  ret i8* getelementptr inbounds (%struct.buffer, %struct.buffer* @buf, i64 0, 
i32 1, i64 0)
+}



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[llvm-branch-commits] [clang] b2ba686 - Refactoring the attribute plugin example to fit the new API

[Aaron Ballman via llvm-branch-commits]

Author: Yafei Liu
Date: 2020-12-21T08:24:09-05:00
New Revision: b2ba6867eac10874bd279c739639bdb9e60c1996

URL: 
https://github.com/llvm/llvm-project/commit/b2ba6867eac10874bd279c739639bdb9e60c1996
DIFF: 
https://github.com/llvm/llvm-project/commit/b2ba6867eac10874bd279c739639bdb9e60c1996.diff

LOG: Refactoring the attribute plugin example to fit the new API

Make the example compile and the test case pass.

Added: 


Modified: 
clang/examples/Attribute/Attribute.cpp
clang/test/Frontend/plugin-attribute.cpp

Removed: 




diff  --git a/clang/examples/Attribute/Attribute.cpp 
b/clang/examples/Attribute/Attribute.cpp
index 998f175dae54..159b09e4b154 100644
--- a/clang/examples/Attribute/Attribute.cpp
+++ b/clang/examples/Attribute/Attribute.cpp
@@ -23,9 +23,10 @@ namespace {
 
 struct ExampleAttrInfo : public ParsedAttrInfo {
   ExampleAttrInfo() {
-// Can take an optional string argument (the check that the argument
-// actually is a string happens in handleDeclAttribute).
-OptArgs = 1;
+// Can take up to 15 optional arguments, to emulate accepting a variadic
+// number of arguments. This just illustrates how many arguments a
+// `ParsedAttrInfo` can hold, we will not use that much in this example.
+OptArgs = 15;
 // GNU-style __attribute__(("example")) and C++-style [[example]] and
 // [[plugin::example]] supported.
 static constexpr Spelling S[] = {{ParsedAttr::AS_GNU, "example"},
@@ -39,7 +40,7 @@ struct ExampleAttrInfo : public ParsedAttrInfo {
 // This attribute appertains to functions only.
 if (!isa(D)) {
   S.Diag(Attr.getLoc(), diag::warn_attribute_wrong_decl_type_str)
-<< Attr << "functions";
+  << Attr << "functions";
   return false;
 }
 return true;
@@ -55,23 +56,39 @@ struct ExampleAttrInfo : public ParsedAttrInfo {
   S.Diag(Attr.getLoc(), ID);
   return AttributeNotApplied;
 }
-// Check if we have an optional string argument.
-StringRef Str = "";
+// We make some rules here:
+// 1. Only accept at most 3 arguments here.
+// 2. The first argument must be a string literal if it exists.
+if (Attr.getNumArgs() > 3) {
+  unsigned ID = S.getDiagnostics().getCustomDiagID(
+  DiagnosticsEngine::Error,
+  "'example' attribute only accepts at most three arguments");
+  S.Diag(Attr.getLoc(), ID);
+  return AttributeNotApplied;
+}
+// If there are arguments, the first argument should be a string literal.
 if (Attr.getNumArgs() > 0) {
-  Expr *ArgExpr = Attr.getArgAsExpr(0);
+  auto *Arg0 = Attr.getArgAsExpr(0);
   StringLiteral *Literal =
-  dyn_cast(ArgExpr->IgnoreParenCasts());
-  if (Literal) {
-Str = Literal->getString();
-  } else {
-S.Diag(ArgExpr->getExprLoc(), diag::err_attribute_argument_type)
-<< Attr.getAttrName() << AANT_ArgumentString;
+  dyn_cast(Arg0->IgnoreParenCasts());
+  if (!Literal) {
+unsigned ID = S.getDiagnostics().getCustomDiagID(
+DiagnosticsEngine::Error, "first argument to the 'example' "
+  "attribute must be a string literal");
+S.Diag(Attr.getLoc(), ID);
 return AttributeNotApplied;
   }
+  SmallVector ArgsBuf;
+  for (unsigned i = 0; i < Attr.getNumArgs(); i++) {
+ArgsBuf.push_back(Attr.getArgAsExpr(i));
+  }
+  D->addAttr(AnnotateAttr::Create(S.Context, "example", ArgsBuf.data(),
+  ArgsBuf.size(), Attr.getRange()));
+} else {
+  // Attach an annotate attribute to the Decl.
+  D->addAttr(AnnotateAttr::Create(S.Context, "example", nullptr, 0,
+  Attr.getRange()));
 }
-// Attach an annotate attribute to the Decl.
-D->addAttr(AnnotateAttr::Create(S.Context, "example(" + Str.str() + ")",
-Attr.getRange()));
 return AttributeApplied;
   }
 };

diff  --git a/clang/test/Frontend/plugin-attribute.cpp 
b/clang/test/Frontend/plugin-attribute.cpp
index 571ede3dc0b1..969105927be5 100644
--- a/clang/test/Frontend/plugin-attribute.cpp
+++ b/clang/test/Frontend/plugin-attribute.cpp
@@ -1,25 +1,22 @@
-// RUN: %clang -fplugin=%llvmshlibdir/Attribute%pluginext -emit-llvm -S %s -o 
- 2>&1 | FileCheck %s --check-prefix=ATTRIBUTE
-// RUN: not %clang -fplugin=%llvmshlibdir/Attribute%pluginext -emit-llvm 
-DBAD_ATTRIBUTE -S %s -o - 2>&1 | FileCheck %s --check-prefix=BADATTRIBUTE
+// RUN: split-file %s %t
+// RUN: %clang -cc1 -load %llvmshlibdir/Attribute%pluginext -fsyntax-only 
-ast-dump -verify %t/good_attr.cpp | FileCheck %s
+// RUN: %clang -fplugin=%llvmshlibdir/Attribute%pluginext -fsyntax-only 
-Xclang -verify %t/bad_attr.cpp
 // REQUIRES: plugins, examples
+//--- good_attr.cpp
+// expected-no-diagnostics
+void fn1a() __attribute__((example)) 

[llvm-branch-commits] [llvm] 6f45049 - [Statepoints] Disable VReg lowering for values used on exception path of invoke.

[Denis Antrushin via llvm-branch-commits]

Author: Denis Antrushin
Date: 2020-12-21T20:27:05+07:00
New Revision: 6f45049fb6e5c6d573ef5bae338da822f6cbaa53

URL: 
https://github.com/llvm/llvm-project/commit/6f45049fb6e5c6d573ef5bae338da822f6cbaa53
DIFF: 
https://github.com/llvm/llvm-project/commit/6f45049fb6e5c6d573ef5bae338da822f6cbaa53.diff

LOG: [Statepoints] Disable VReg lowering for values used on exception path of 
invoke.

Currently we lower invokes the same way as usual calls, e.g.:

V1 = STATEPOINT ... V (tied-def 0)

But this is incorrect is V1 is used on exceptional path.
By LLVM rules V1 neither dominates its uses in landing pad, nor
its live range is live on entry to landing pad. So compiler is
allowed to do various weird transformations like splitting live
range after statepoint and use split LR in catch block.

Until (and if) we find better solution to this problem, let's
use old lowering (spilling) for those values which are used on
exceptional path and allow VReg lowering for values used only
on normal path.

Differential Revision: https://reviews.llvm.org/D93449

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
index 2d2eb252e4e2..65ad5b0b5d8f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
@@ -546,6 +546,18 @@ lowerStatepointMetaArgs(SmallVectorImpl &Ops,
   // Decide which deriver pointers will go on VRegs
   unsigned MaxVRegPtrs = MaxRegistersForGCPointers.getValue();
 
+  // Pointers used on exceptional path of invoke statepoint.
+  // We cannot assing them to VRegs.
+  SmallSet LPadPointers;
+  if (auto *StInvoke = dyn_cast_or_null(SI.StatepointInstr)) {
+LandingPadInst *LPI = StInvoke->getLandingPadInst();
+for (auto *Relocate : SI.GCRelocates)
+  if (Relocate->getOperand(0) == LPI) {
+LPadPointers.insert(Builder.getValue(Relocate->getBasePtr()));
+LPadPointers.insert(Builder.getValue(Relocate->getDerivedPtr()));
+  }
+  }
+
   LLVM_DEBUG(dbgs() << "Deciding how to lower GC Pointers:\n");
 
   // List of unique lowered GC Pointer values.
@@ -555,6 +567,14 @@ lowerStatepointMetaArgs(SmallVectorImpl &Ops,
 
   unsigned CurNumVRegs = 0;
 
+  auto canPassGCPtrOnVReg = [&](SDValue SD) {
+if (SD.getValueType().isVector())
+  return false;
+if (LPadPointers.count(SD))
+  return false;
+return !willLowerDirectly(SD);
+  };
+
   auto processGCPtr = [&](const Value *V) {
 SDValue PtrSD = Builder.getValue(V);
 if (!LoweredGCPtrs.insert(PtrSD))
@@ -564,7 +584,9 @@ lowerStatepointMetaArgs(SmallVectorImpl &Ops,
 assert(!LowerAsVReg.count(PtrSD) && "must not have been seen");
 if (LowerAsVReg.size() == MaxVRegPtrs)
   return;
-if (willLowerDirectly(PtrSD) || V->getType()->isVectorTy()) {
+assert(V->getType()->isVectorTy() == PtrSD.getValueType().isVector() &&
+   "IR and SD types disagree");
+if (!canPassGCPtrOnVReg(PtrSD)) {
   LLVM_DEBUG(dbgs() << "direct/spill "; PtrSD.dump(&Builder.DAG));
   return;
 }

diff  --git a/llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll 
b/llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
index b734dca622ae..7c5a734acd6a 100644
--- a/llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
+++ b/llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
@@ -10,14 +10,16 @@ declare dso_local i32* @personality_function()
 define i64 addrspace(1)* @test_basic_invoke(i64 addrspace(1)* %obj, i64 
addrspace(1)* %obj1)
 ; CHECK-LABEL:name: test_basic_invoke
 ; CHECK:  bb.0.entry:
-; CHECK:  renamable $r14, renamable $rbx = STATEPOINT 0, 0, 1, 
@some_call, $rdi, 2, 0, 2, 0, 2, 5, 2, 0, 2, -1, 2, 0, 2, 0, 2, 0, 2, 2, killed 
renamable $r14(tied-def 0), killed renamable $rbx(tied-def 1), 2, 0, 2, 2, 0, 
0, 1, 1, csr_64, implicit-def $rsp, implicit-def $ssp
+; CHECK:  MOV64mr %stack.1, 1, $noreg, 0, $noreg, renamable $rdi :: 
(store 8 into %stack.1)
+; CHECK:  MOV64mr %stack.0, 1, $noreg, 0, $noreg, killed renamable 
$rsi :: (store 8 into %stack.0)
+; CHECK:  STATEPOINT 0, 0, 1, @some_call, $rdi, 2, 0, 2, 0, 2, 5, 2, 
0, 2, -1, 2, 0, 2, 0, 2, 0, 2, 2, 1, 8, %stack.0, 0, 1, 8, %stack.1, 0, 2, 0, 
2, 2, 0, 0, 1, 1, csr_64, implicit-def $rsp, implicit-def $ssp :: (volatile 
load store 8 on %stack.0), (volatile load store 8 on %stack.1)
 ; CHECK:  JMP_1 %bb.1
 ; CHECK:  bb.1.safepoint_normal_dest:
+; CHECK:  renamable $rax = MOV64rm %stack.1, 1, $noreg, 0, $noreg :: 
(load 8 from %stack.1)
 ; CHECK:  bb.2.normal_return:
-; CHECK:  $rax = COPY killed renamable $rbx
 ; CHECK:  RET 0, $rax
 ; CHECK:  bb.3.exceptional_return (landing-pad):
-; CHECK:  $rax = COPY ki

[llvm-branch-commits] [llvm] f250892 - [VPlan] Make VPRecipeBase inherit from VPDef.

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2020-12-21T13:34:00Z
New Revision: f25089237376dd43c8c37a18ea9d132f0845eda4

URL: 
https://github.com/llvm/llvm-project/commit/f25089237376dd43c8c37a18ea9d132f0845eda4
DIFF: 
https://github.com/llvm/llvm-project/commit/f25089237376dd43c8c37a18ea9d132f0845eda4.diff

LOG: [VPlan] Make VPRecipeBase inherit from VPDef.

This patch makes VPRecipeBase a direct subclass of VPDef, moving the
SubclassID to VPDef.

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D90564

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/VPlan.cpp
llvm/lib/Transforms/Vectorize/VPlan.h
llvm/lib/Transforms/Vectorize/VPlanValue.h
llvm/unittests/Transforms/Vectorize/VPlanTest.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/VPlan.cpp 
b/llvm/lib/Transforms/Vectorize/VPlan.cpp
index e58b49a64737..601c406290b2 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlan.cpp
@@ -120,50 +120,18 @@ VPUser *VPRecipeBase::toVPUser() {
 }
 
 VPValue *VPRecipeBase::toVPValue() {
+  if (getNumDefinedValues() == 1)
+return getVPValue();
   if (auto *V = dyn_cast(this))
 return V;
-  if (auto *V = dyn_cast(this))
-return V;
-  if (auto *V = dyn_cast(this)) {
-if (!V->isStore())
-  return V->getVPValue();
-else
-  return nullptr;
-  }
-  if (auto *V = dyn_cast(this))
-return V;
-  if (auto *V = dyn_cast(this))
-return V;
-  if (auto *V = dyn_cast(this))
-return V;
-  if (auto *V = dyn_cast(this))
-return V;
-  if (auto *V = dyn_cast(this))
-return V;
   return nullptr;
 }
 
 const VPValue *VPRecipeBase::toVPValue() const {
+  if (getNumDefinedValues() == 1)
+return getVPValue();
   if (auto *V = dyn_cast(this))
 return V;
-  if (auto *V = dyn_cast(this))
-return V;
-  if (auto *V = dyn_cast(this)) {
-if (!V->isStore())
-  return V->getVPValue();
-else
-  return nullptr;
-  }
-  if (auto *V = dyn_cast(this))
-return V;
-  if (auto *V = dyn_cast(this))
-return V;
-  if (auto *V = dyn_cast(this))
-return V;
-  if (auto *V = dyn_cast(this))
-return V;
-  if (auto *V = dyn_cast(this))
-return V;
   return nullptr;
 }
 

diff  --git a/llvm/lib/Transforms/Vectorize/VPlan.h 
b/llvm/lib/Transforms/Vectorize/VPlan.h
index 37f1e9e73c39..ecb7004121a2 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.h
+++ b/llvm/lib/Transforms/Vectorize/VPlan.h
@@ -620,47 +620,23 @@ class VPBlockBase {
 };
 
 /// VPRecipeBase is a base class modeling a sequence of one or more output IR
-/// instructions.
-class VPRecipeBase : public ilist_node_with_parent 
{
+/// instructions. VPRecipeBase owns the the VPValues it defines through VPDef
+/// and is responsible for deleting its defined values. Single-value
+/// VPRecipeBases that also inherit from VPValue must make sure to inherit from
+/// VPRecipeBase before VPValue.
+class VPRecipeBase : public ilist_node_with_parent,
+ public VPDef {
   friend VPBasicBlock;
   friend class VPBlockUtils;
 
-  const unsigned char SubclassID; ///< Subclass identifier (for isa/dyn_cast).
 
   /// Each VPRecipe belongs to a single VPBasicBlock.
   VPBasicBlock *Parent = nullptr;
 
 public:
-  /// An enumeration for keeping track of the concrete subclass of VPRecipeBase
-  /// that is actually instantiated. Values of this enumeration are kept in the
-  /// SubclassID field of the VPRecipeBase objects. They are used for concrete
-  /// type identification.
-  using VPRecipeTy = enum {
-VPBlendSC,
-VPBranchOnMaskSC,
-VPInstructionSC,
-VPInterleaveSC,
-VPPredInstPHISC,
-VPReductionSC,
-VPReplicateSC,
-VPWidenCallSC,
-VPWidenCanonicalIVSC,
-VPWidenGEPSC,
-VPWidenIntOrFpInductionSC,
-VPWidenMemoryInstructionSC,
-VPWidenPHISC,
-VPWidenSC,
-VPWidenSelectSC
-  };
-
-  VPRecipeBase(const unsigned char SC) : SubclassID(SC) {}
+  VPRecipeBase(const unsigned char SC) : VPDef(SC) {}
   virtual ~VPRecipeBase() = default;
 
-  /// \return an ID for the concrete type of this object.
-  /// This is used to implement the classof checks. This should not be used
-  /// for any other purpose, as the values may change as LLVM evolves.
-  unsigned getVPRecipeID() const { return SubclassID; }
-
   /// \return the VPBasicBlock which this VPRecipe belongs to.
   VPBasicBlock *getParent() { return Parent; }
   const VPBasicBlock *getParent() const { return Parent; }
@@ -718,27 +694,33 @@ class VPRecipeBase : public 
ilist_node_with_parent {
   return cast_or_null(VPV->getUnderlyingValue());
 return nullptr;
   }
+
+  /// Method to support type inquiry through isa, cast, and dyn_cast.
+  static inline bool classof(const VPDef *D) {
+// All VPDefs are also VPRecipeBases.
+return true;
+  }
 };
 
-inline bool VPUser::classof(const VPRecipeBase *Recipe) {
-  return Recipe->getVPRecipeID() == VPRec

[llvm-branch-commits] [llvm] 8c2ad9e - [VE] Correct VMP allocation in calling conv

[Kazushi Marukawa via llvm-branch-commits]

Author: Kazushi (Jam) Marukawa
Date: 2020-12-21T22:42:24+09:00
New Revision: 8c2ad9e85f677546021880dc88e24f633ccacd93

URL: 
https://github.com/llvm/llvm-project/commit/8c2ad9e85f677546021880dc88e24f633ccacd93
DIFF: 
https://github.com/llvm/llvm-project/commit/8c2ad9e85f677546021880dc88e24f633ccacd93.diff

LOG: [VE] Correct VMP allocation in calling conv

VE used to allocate VM1, VM2, VMP2 (VM4+VM5), and VM3.  This patch
corrects to allocate VM1, VM2, VMP2 (VM4+VM5), and VM6.  Also add
a regression test.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93570

Added: 


Modified: 
llvm/lib/Target/VE/VECallingConv.td
llvm/test/CodeGen/VE/Vector/fastcc_callee.ll

Removed: 




diff  --git a/llvm/lib/Target/VE/VECallingConv.td 
b/llvm/lib/Target/VE/VECallingConv.td
index 6741d1cc8eaf..93899c2cae3d 100644
--- a/llvm/lib/Target/VE/VECallingConv.td
+++ b/llvm/lib/Target/VE/VECallingConv.td
@@ -116,7 +116,7 @@ def CC_VE_Fast : CallingConv<[
   // pair of vector mask --> generic vector mask registers
   CCIfType<[v512i1],
CCAssignToRegWithShadow<[VMP1, VMP2, VMP3],
-   [VM1, VM1, VM3]>>,
+   [VM1, VM3, VM5]>>,
 
   // Follow the standard C CC for scalars.
   CCDelegateTo
@@ -137,7 +137,7 @@ def RetCC_VE_Fast : CallingConv<[
   // pair of vector mask --> generic vector mask registers
   CCIfType<[v512i1],
CCAssignToRegWithShadow<[VMP1, VMP2, VMP3],
-   [VM1, VM1, VM3]>>,
+   [VM1, VM3, VM5]>>,
 
   // Follow the standard C CC for scalars.
   CCDelegateTo

diff  --git a/llvm/test/CodeGen/VE/Vector/fastcc_callee.ll 
b/llvm/test/CodeGen/VE/Vector/fastcc_callee.ll
index c0ad247d0e74..aa7b4944e7e4 100644
--- a/llvm/test/CodeGen/VE/Vector/fastcc_callee.ll
+++ b/llvm/test/CodeGen/VE/Vector/fastcc_callee.ll
@@ -137,3 +137,11 @@ define fastcc <512 x i1> @vreg_arg_v512i1_vmp3(<512 x i1> 
%vmp1, <512 x i1> %vmp
 ; CHECK-NEXT:b.l.t (, %s10)
   ret <512 x i1> %vmp3
 }
+
+define fastcc <256 x i1> @vmp_cc_bug(<256 x i1> %vm1, <256 x i1> %vm2, <512 x 
i1> %vmp2, <256 x i1> %vm6) {
+; CHECK-LABEL: vmp_cc_bug:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:andm %vm1, %vm0, %vm6
+; CHECK-NEXT:b.l.t (, %s10)
+  ret <256 x i1> %vm6
+}



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[llvm-branch-commits] [llvm] d611875 - [InstSimplify] add tests for inverted logic operands; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2020-12-21T08:51:42-05:00
New Revision: d6118759f30e343a05aab053f66e5049ea149175

URL: 
https://github.com/llvm/llvm-project/commit/d6118759f30e343a05aab053f66e5049ea149175
DIFF: 
https://github.com/llvm/llvm-project/commit/d6118759f30e343a05aab053f66e5049ea149175.diff

LOG: [InstSimplify] add tests for inverted logic operands; NFC

Added: 


Modified: 
llvm/test/Transforms/InstSimplify/AndOrXor.ll

Removed: 




diff  --git a/llvm/test/Transforms/InstSimplify/AndOrXor.ll 
b/llvm/test/Transforms/InstSimplify/AndOrXor.ll
index 8952acc2feb6..9e549ebefc6b 100644
--- a/llvm/test/Transforms/InstSimplify/AndOrXor.ll
+++ b/llvm/test/Transforms/InstSimplify/AndOrXor.ll
@@ -885,168 +885,286 @@ define i32 @reversed_not(i32 %a) {
 
 define i64 @shl_or_and1(i32 %a, i1 %b) {
 ; CHECK-LABEL: @shl_or_and1(
-; CHECK-NEXT:[[TMP2:%.*]] = zext i1 [[B:%.*]] to i64
-; CHECK-NEXT:ret i64 [[TMP2]]
+; CHECK-NEXT:[[T2:%.*]] = zext i1 [[B:%.*]] to i64
+; CHECK-NEXT:ret i64 [[T2]]
 ;
-  %tmp1 = zext i32 %a to i64
-  %tmp2 = zext i1 %b to i64
-  %tmp3 = shl nuw i64 %tmp1, 32
-  %tmp4 = or i64 %tmp2, %tmp3
-  %tmp5 = and i64 %tmp4, 1
-  ret i64 %tmp5
+  %t1 = zext i32 %a to i64
+  %t2 = zext i1 %b to i64
+  %t3 = shl nuw i64 %t1, 32
+  %t4 = or i64 %t2, %t3
+  %t5 = and i64 %t4, 1
+  ret i64 %t5
 }
 
 define i64 @shl_or_and2(i32 %a, i1 %b) {
 ; CHECK-LABEL: @shl_or_and2(
-; CHECK-NEXT:[[TMP1:%.*]] = zext i1 [[B:%.*]] to i64
-; CHECK-NEXT:[[TMP3:%.*]] = shl nuw i64 [[TMP1]], 32
-; CHECK-NEXT:ret i64 [[TMP3]]
+; CHECK-NEXT:[[T1:%.*]] = zext i1 [[B:%.*]] to i64
+; CHECK-NEXT:[[T3:%.*]] = shl nuw i64 [[T1]], 32
+; CHECK-NEXT:ret i64 [[T3]]
 ;
-  %tmp1 = zext i1 %b to i64
-  %tmp2 = zext i32 %a to i64
-  %tmp3 = shl nuw i64 %tmp1, 32
-  %tmp4 = or i64 %tmp2, %tmp3
-  %tmp5 = and i64 %tmp4, 4294967296
-  ret i64 %tmp5
+  %t1 = zext i1 %b to i64
+  %t2 = zext i32 %a to i64
+  %t3 = shl nuw i64 %t1, 32
+  %t4 = or i64 %t2, %t3
+  %t5 = and i64 %t4, 4294967296
+  ret i64 %t5
 }
 
 ; concatenate two 32-bit integers and extract lower 32-bit
 define i64 @shl_or_and3(i32 %a, i32 %b) {
 ; CHECK-LABEL: @shl_or_and3(
-; CHECK-NEXT:[[TMP2:%.*]] = zext i32 [[B:%.*]] to i64
-; CHECK-NEXT:ret i64 [[TMP2]]
+; CHECK-NEXT:[[T2:%.*]] = zext i32 [[B:%.*]] to i64
+; CHECK-NEXT:ret i64 [[T2]]
 ;
-  %tmp1 = zext i32 %a to i64
-  %tmp2 = zext i32 %b to i64
-  %tmp3 = shl nuw i64 %tmp1, 32
-  %tmp4 = or i64 %tmp2, %tmp3
-  %tmp5 = and i64 %tmp4, 4294967295
-  ret i64 %tmp5
+  %t1 = zext i32 %a to i64
+  %t2 = zext i32 %b to i64
+  %t3 = shl nuw i64 %t1, 32
+  %t4 = or i64 %t2, %t3
+  %t5 = and i64 %t4, 4294967295
+  ret i64 %t5
 }
 
 ; concatenate two 16-bit integers and extract higher 16-bit
 define i32 @shl_or_and4(i16 %a, i16 %b) {
 ; CHECK-LABEL: @shl_or_and4(
-; CHECK-NEXT:[[TMP1:%.*]] = zext i16 [[A:%.*]] to i32
-; CHECK-NEXT:[[TMP3:%.*]] = shl nuw i32 [[TMP1]], 16
-; CHECK-NEXT:ret i32 [[TMP3]]
+; CHECK-NEXT:[[T1:%.*]] = zext i16 [[A:%.*]] to i32
+; CHECK-NEXT:[[T3:%.*]] = shl nuw i32 [[T1]], 16
+; CHECK-NEXT:ret i32 [[T3]]
 ;
-  %tmp1 = zext i16 %a to i32
-  %tmp2 = zext i16 %b to i32
-  %tmp3 = shl nuw i32 %tmp1, 16
-  %tmp4 = or i32 %tmp2, %tmp3
-  %tmp5 = and i32 %tmp4, 4294901760 ; mask with 0x
-  ret i32 %tmp5
+  %t1 = zext i16 %a to i32
+  %t2 = zext i16 %b to i32
+  %t3 = shl nuw i32 %t1, 16
+  %t4 = or i32 %t2, %t3
+  %t5 = and i32 %t4, 4294901760 ; mask with 0x
+  ret i32 %t5
 }
 
 define i128 @shl_or_and5(i64 %a, i1 %b) {
 ; CHECK-LABEL: @shl_or_and5(
-; CHECK-NEXT:[[TMP2:%.*]] = zext i1 [[B:%.*]] to i128
-; CHECK-NEXT:ret i128 [[TMP2]]
+; CHECK-NEXT:[[T2:%.*]] = zext i1 [[B:%.*]] to i128
+; CHECK-NEXT:ret i128 [[T2]]
 ;
-  %tmp1 = zext i64 %a to i128
-  %tmp2 = zext i1 %b to i128
-  %tmp3 = shl nuw i128 %tmp1, 64
-  %tmp4 = or i128 %tmp2, %tmp3
-  %tmp5 = and i128 %tmp4, 1
-  ret i128 %tmp5
+  %t1 = zext i64 %a to i128
+  %t2 = zext i1 %b to i128
+  %t3 = shl nuw i128 %t1, 64
+  %t4 = or i128 %t2, %t3
+  %t5 = and i128 %t4, 1
+  ret i128 %t5
 }
 
 ; A variation of above test cases; it fails due to the mask value
 define i32 @shl_or_and6(i16 %a, i16 %b) {
 ; CHECK-LABEL: @shl_or_and6(
-; CHECK-NEXT:[[TMP1:%.*]] = zext i16 [[A:%.*]] to i32
-; CHECK-NEXT:[[TMP2:%.*]] = zext i16 [[B:%.*]] to i32
-; CHECK-NEXT:[[TMP3:%.*]] = shl nuw i32 [[TMP1]], 16
-; CHECK-NEXT:[[TMP4:%.*]] = or i32 [[TMP2]], [[TMP3]]
-; CHECK-NEXT:[[TMP5:%.*]] = and i32 [[TMP4]], -65535
-; CHECK-NEXT:ret i32 [[TMP5]]
+; CHECK-NEXT:[[T1:%.*]] = zext i16 [[A:%.*]] to i32
+; CHECK-NEXT:[[T2:%.*]] = zext i16 [[B:%.*]] to i32
+; CHECK-NEXT:[[T3:%.*]] = shl nuw i32 [[T1]], 16
+; CHECK-NEXT:[[T4:%.*]] = or i32 [[T2]], [[T3]]
+; CHECK-NEXT:[[T5:%.*]] = and i32 [[T4]], -65535
+; CHECK-NEXT:ret i32 [[T5]]
 ;
-  %tmp

[llvm-branch-commits] [llvm] 38ca7fa - [InstSimplify] reduce logic with inverted add/sub ops

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2020-12-21T08:51:43-05:00
New Revision: 38ca7face67e8488d482b66a999d0a685806879f

URL: 
https://github.com/llvm/llvm-project/commit/38ca7face67e8488d482b66a999d0a685806879f
DIFF: 
https://github.com/llvm/llvm-project/commit/38ca7face67e8488d482b66a999d0a685806879f.diff

LOG: [InstSimplify] reduce logic with inverted add/sub ops

https://llvm.org/PR48559
This could be part of a larger ValueTracking API,
but I don't see that currently.

https://rise4fun.com/Alive/gR0

  Name: and
  Pre: C1 == ~C2
  %sub = add i8 %x, C1
  %sub1 = sub i8 C2, %x
  %r = and i8 %sub, %sub1
  =>
  %r = 0

  Name: or
  Pre: C1 == ~C2
  %sub = add i8 %x, C1
  %sub1 = sub i8 C2, %x
  %r = or i8 %sub, %sub1
  =>
  %r = -1

  Name: xor
  Pre: C1 == ~C2
  %sub = add i8 %x, C1
  %sub1 = sub i8 C2, %x
  %r = xor i8 %sub, %sub1
  =>
  %r = -1

Added: 


Modified: 
llvm/lib/Analysis/InstructionSimplify.cpp
llvm/test/Transforms/InstSimplify/AndOrXor.ll

Removed: 




diff  --git a/llvm/lib/Analysis/InstructionSimplify.cpp 
b/llvm/lib/Analysis/InstructionSimplify.cpp
index 55f3bc4f2923..27b73a5a8236 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -1999,6 +1999,30 @@ static Value 
*omitCheckForZeroBeforeInvertedMulWithOverflow(Value *Op0,
   return NotOp1;
 }
 
+/// Given a bitwise logic op, check if the operands are add/sub with a common
+/// source value and inverted constant (identity: C - X -> ~(X + ~C)).
+static Value *simplifyLogicOfAddSub(Value *Op0, Value *Op1,
+Instruction::BinaryOps Opcode) {
+  assert(Op0->getType() == Op1->getType() && "Mismatched binop types");
+  assert(BinaryOperator::isBitwiseLogicOp(Opcode) && "Expected logic op");
+  Value *X;
+  Constant *C1, *C2;
+  if ((match(Op0, m_Add(m_Value(X), m_Constant(C1))) &&
+   match(Op1, m_Sub(m_Constant(C2), m_Specific(X ||
+  (match(Op1, m_Add(m_Value(X), m_Constant(C1))) &&
+   match(Op0, m_Sub(m_Constant(C2), m_Specific(X) {
+if (ConstantExpr::getNot(C1) == C2) {
+  // (X + C) & (~C - X) --> (X + C) & ~(X + C) --> 0
+  // (X + C) | (~C - X) --> (X + C) | ~(X + C) --> -1
+  // (X + C) ^ (~C - X) --> (X + C) ^ ~(X + C) --> -1
+  Type *Ty = Op0->getType();
+  return Opcode == Instruction::And ? ConstantInt::getNullValue(Ty)
+: ConstantInt::getAllOnesValue(Ty);
+}
+  }
+  return nullptr;
+}
+
 /// Given operands for an And, see if we can fold the result.
 /// If not, this returns null.
 static Value *SimplifyAndInst(Value *Op0, Value *Op1, const SimplifyQuery &Q,
@@ -2035,6 +2059,9 @@ static Value *SimplifyAndInst(Value *Op0, Value *Op1, 
const SimplifyQuery &Q,
   if (match(Op1, m_c_Or(m_Specific(Op0), m_Value(
 return Op0;
 
+  if (Value *V = simplifyLogicOfAddSub(Op0, Op1, Instruction::And))
+return V;
+
   // A mask that only clears known zeros of a shifted value is a no-op.
   Value *X;
   const APInt *Mask;
@@ -2194,6 +2221,9 @@ static Value *SimplifyOrInst(Value *Op0, Value *Op1, 
const SimplifyQuery &Q,
   if (match(Op1, m_Not(m_c_And(m_Specific(Op0), m_Value()
 return Constant::getAllOnesValue(Op0->getType());
 
+  if (Value *V = simplifyLogicOfAddSub(Op0, Op1, Instruction::Or))
+return V;
+
   Value *A, *B;
   // (A & ~B) | (A ^ B) -> (A ^ B)
   // (~B & A) | (A ^ B) -> (A ^ B)
@@ -2323,6 +2353,9 @@ static Value *SimplifyXorInst(Value *Op0, Value *Op1, 
const SimplifyQuery &Q,
   match(Op1, m_Not(m_Specific(Op0
 return Constant::getAllOnesValue(Op0->getType());
 
+  if (Value *V = simplifyLogicOfAddSub(Op0, Op1, Instruction::Xor))
+return V;
+
   // Try some generic simplifications for associative operations.
   if (Value *V = SimplifyAssociativeBinOp(Instruction::Xor, Op0, Op1, Q,
   MaxRecurse))

diff  --git a/llvm/test/Transforms/InstSimplify/AndOrXor.ll 
b/llvm/test/Transforms/InstSimplify/AndOrXor.ll
index 9e549ebefc6b..e23262835c3c 100644
--- a/llvm/test/Transforms/InstSimplify/AndOrXor.ll
+++ b/llvm/test/Transforms/InstSimplify/AndOrXor.ll
@@ -1053,10 +1053,7 @@ define <2 x i32> @shl_or_and3v(<2 x i16> %a, <2 x i16> 
%b) {
 
 define i8 @and_add_sub(i8 %x) {
 ; CHECK-LABEL: @and_add_sub(
-; CHECK-NEXT:[[A:%.*]] = add i8 [[X:%.*]], -1
-; CHECK-NEXT:[[S:%.*]] = sub i8 0, [[X]]
-; CHECK-NEXT:[[R:%.*]] = and i8 [[A]], [[S]]
-; CHECK-NEXT:ret i8 [[R]]
+; CHECK-NEXT:ret i8 0
 ;
   %a = add i8 %x, -1
   %s = sub i8 0, %x
@@ -1066,10 +1063,7 @@ define i8 @and_add_sub(i8 %x) {
 
 define <2 x i8> @and_sub_add(<2 x i8> %x) {
 ; CHECK-LABEL: @and_sub_add(
-; CHECK-NEXT:[[A:%.*]] = add <2 x i8> [[X:%.*]], 
-; CHECK-NEXT:[[S:%.*]] = sub <2 x i8> , [[X]]
-; CHECK-NEXT:[[R:%.*]] = and <2 x i8> [[S]], [[A]]
-; CHECK-NEXT:ret <2 x i8> [[R]]
+; CHECK-NEXT:ret <2 

[llvm-branch-commits] [llvm] 3a675c7 - [TableGen] Add the !substr() bang operator

[Paul C. Anagnostopoulos via llvm-branch-commits]

Author: Paul C. Anagnostopoulos
Date: 2020-12-21T09:41:59-05:00
New Revision: 3a675c777dd5788e2313cb06fb27b01f8a2e7573

URL: 
https://github.com/llvm/llvm-project/commit/3a675c777dd5788e2313cb06fb27b01f8a2e7573
DIFF: 
https://github.com/llvm/llvm-project/commit/3a675c777dd5788e2313cb06fb27b01f8a2e7573.diff

LOG: [TableGen] Add the !substr() bang operator

Update the documentation and add a test.

Differential Revision: https://reviews.llvm.org/D93419

Added: 
llvm/test/TableGen/substr.td

Modified: 
llvm/docs/TableGen/ProgRef.rst
llvm/include/llvm/TableGen/Record.h
llvm/lib/TableGen/Record.cpp
llvm/lib/TableGen/TGLexer.cpp
llvm/lib/TableGen/TGLexer.h
llvm/lib/TableGen/TGParser.cpp
llvm/lib/TableGen/TGParser.h

Removed: 




diff  --git a/llvm/docs/TableGen/ProgRef.rst b/llvm/docs/TableGen/ProgRef.rst
index 342b91a0c437..f2ee7a7e549a 100644
--- a/llvm/docs/TableGen/ProgRef.rst
+++ b/llvm/docs/TableGen/ProgRef.rst
@@ -216,7 +216,8 @@ TableGen provides "bang operators" that have a wide variety 
of uses:
: !interleave !isa !le  !listconcat  !listsplat
: !lt !mul !ne  !not !or
: !setdagop   !shl !size!sra !srl
-   : !strconcat  !sub !subst   !tail!xor
+   : !strconcat  !sub !subst   !substr  !tail
+   : !xor
 
 The ``!cond`` operator has a slightly 
diff erent
 syntax compared to other bang operators, so it is defined separately:
@@ -1723,6 +1724,13 @@ and non-0 as true.
 record if the *target* record name equals the *value* record name; 
otherwise it
 produces the *value*.
 
+``!substr(``\ *string*\ ``,`` *start*\ [``,`` *length*]\ ``)``
+This operator extracts a substring of the given *string*. The starting
+position of the substring is specified by *start*, which can range
+between 0 and the length of the string. The length of the substring
+is specified by *length*; if not specified, the rest of the string is
+extracted. The *start* and *length* arguments must be integers.
+
 ``!tail(``\ *a*\ ``)``
 This operator produces a new list with all the elements
 of the list *a* except for the zeroth one. (See also ``!head``.)

diff  --git a/llvm/include/llvm/TableGen/Record.h 
b/llvm/include/llvm/TableGen/Record.h
index 3010b4dad09a..a0c5b2778547 100644
--- a/llvm/include/llvm/TableGen/Record.h
+++ b/llvm/include/llvm/TableGen/Record.h
@@ -829,7 +829,7 @@ class BinOpInit : public OpInit, public FoldingSetNode {
 /// !op (X, Y, Z) - Combine two inits.
 class TernOpInit : public OpInit, public FoldingSetNode {
 public:
-  enum TernaryOp : uint8_t { SUBST, FOREACH, FILTER, IF, DAG };
+  enum TernaryOp : uint8_t { SUBST, FOREACH, FILTER, IF, DAG, SUBSTR };
 
 private:
   Init *LHS, *MHS, *RHS;

diff  --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp
index cbdce04494f3..9c0464d4e1bf 100644
--- a/llvm/lib/TableGen/Record.cpp
+++ b/llvm/lib/TableGen/Record.cpp
@@ -1325,6 +1325,27 @@ Init *TernOpInit::Fold(Record *CurRec) const {
 }
 break;
   }
+
+  case SUBSTR: {
+StringInit *LHSs = dyn_cast(LHS);
+IntInit *MHSi = dyn_cast(MHS);
+IntInit *RHSi = dyn_cast(RHS);
+if (LHSs && MHSi && RHSi) {
+  int64_t StringSize = LHSs->getValue().size();
+  int64_t Start = MHSi->getValue();
+  int64_t Length = RHSi->getValue();
+  if (Start < 0 || Start > StringSize)
+PrintError(CurRec->getLoc(),
+   Twine("!substr start position is out of range 0...") +
+   std::to_string(StringSize) + ": " +
+   std::to_string(Start));
+  if (Length < 0)
+PrintError(CurRec->getLoc(), "!substr length must be nonnegative");
+  return StringInit::get(LHSs->getValue().substr(Start, Length),
+ LHSs->getFormat());
+}
+break;
+  }
   }
 
   return const_cast(this);
@@ -1364,11 +1385,12 @@ std::string TernOpInit::getAsString() const {
   std::string Result;
   bool UnquotedLHS = false;
   switch (getOpcode()) {
-  case SUBST: Result = "!subst"; break;
-  case FOREACH: Result = "!foreach"; UnquotedLHS = true; break;
+  case DAG: Result = "!dag"; break;
   case FILTER: Result = "!filter"; UnquotedLHS = true; break;
+  case FOREACH: Result = "!foreach"; UnquotedLHS = true; break;
   case IF: Result = "!if"; break;
-  case DAG: Result = "!dag"; break;
+  case SUBST: Result = "!subst"; break;
+  case SUBSTR: Result = "!substr"; break;
   }
   return (Result + "(" +
   (UnquotedLHS ? LHS->getAsUnquotedString() : LHS->getAsString()) +

diff  --git a/llvm/lib/TableGen/TGLexer.cpp b/llvm/lib/TableGen/TGLexer.cpp
index df0df96f40eb..a45ef6dc10c1 100644
--- a/llvm/lib/TableGen/TGLexer.cpp
+++ b/llvm/lib/TableGen/TGLexer.cpp
@@ -589,6 +589,7 @@ tgtok::Tok

[llvm-branch-commits] [llvm] 88c5b50 - [AggressiveInstCombine] Generalize foldGuardedRotateToFunnelShift to generic funnel shifts (REAPPLIED)

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2020-12-21T15:22:27Z
New Revision: 88c5b5006064d62cae4592e66f5bc8b7a7326ef2

URL: 
https://github.com/llvm/llvm-project/commit/88c5b5006064d62cae4592e66f5bc8b7a7326ef2
DIFF: 
https://github.com/llvm/llvm-project/commit/88c5b5006064d62cae4592e66f5bc8b7a7326ef2.diff

LOG: [AggressiveInstCombine] Generalize foldGuardedRotateToFunnelShift to 
generic funnel shifts (REAPPLIED)

The fold currently only handles rotation patterns, but with the maturation of 
backend funnel shift handling we can now realistically handle all funnel shift 
patterns.

This should allow us to begin resolving PR46896 et al.

Ensure we block poison in a funnel shift value - similar to 
rG0fe91ad463fea9d08cbcd640a62aa9ca2d8d05e0

Reapplied with fix for PR48068 - we weren't checking that the shift values 
could be hoisted from their basicblocks.

Differential Revision: https://reviews.llvm.org/D90625

Added: 


Modified: 
llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
llvm/test/Transforms/AggressiveInstCombine/funnel.ll
llvm/test/Transforms/AggressiveInstCombine/rotate.ll

Removed: 




diff  --git 
a/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp 
b/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
index e7fb699d9fda..a7ae10d156d5 100644
--- a/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
+++ b/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
@@ -21,6 +21,7 @@
 #include "llvm/Analysis/BasicAliasAnalysis.h"
 #include "llvm/Analysis/GlobalsModRef.h"
 #include "llvm/Analysis/TargetLibraryInfo.h"
+#include "llvm/Analysis/ValueTracking.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/IR/Dominators.h"
 #include "llvm/IR/Function.h"
@@ -39,6 +40,8 @@ using namespace PatternMatch;
 STATISTIC(NumAnyOrAllBitsSet, "Number of any/all-bits-set patterns folded");
 STATISTIC(NumGuardedRotates,
   "Number of guarded rotates transformed into funnel shifts");
+STATISTIC(NumGuardedFunnelShifts,
+  "Number of guarded funnel shifts transformed into funnel shifts");
 STATISTIC(NumPopCountRecognized, "Number of popcount idioms recognized");
 
 namespace {
@@ -67,17 +70,17 @@ class AggressiveInstCombinerLegacyPass : public 
FunctionPass {
 };
 } // namespace
 
-/// Match a pattern for a bitwise rotate operation that partially guards
-/// against undefined behavior by branching around the rotation when the shift
-/// amount is 0.
-static bool foldGuardedRotateToFunnelShift(Instruction &I) {
+/// Match a pattern for a bitwise funnel/rotate operation that partially guards
+/// against undefined behavior by branching around the funnel-shift/rotation
+/// when the shift amount is 0.
+static bool foldGuardedFunnelShift(Instruction &I, const DominatorTree &DT) {
   if (I.getOpcode() != Instruction::PHI || I.getNumOperands() != 2)
 return false;
 
   // As with the one-use checks below, this is not strictly necessary, but we
   // are being cautious to avoid potential perf regressions on targets that
-  // do not actually have a rotate instruction (where the funnel shift would be
-  // expanded back into math/shift/logic ops).
+  // do not actually have a funnel/rotate instruction (where the funnel shift
+  // would be expanded back into math/shift/logic ops).
   if (!isPowerOf2_32(I.getType()->getScalarSizeInBits()))
 return false;
 
@@ -111,30 +114,41 @@ static bool foldGuardedRotateToFunnelShift(Instruction 
&I) {
 return Intrinsic::not_intrinsic;
   };
 
-  // One phi operand must be a rotate operation, and the other phi operand must
-  // be the source value of that rotate operation:
+  // One phi operand must be a funnel/rotate operation, and the other phi
+  // operand must be the source value of that funnel/rotate operation:
   // phi [ rotate(RotSrc, ShAmt), FunnelBB ], [ RotSrc, GuardBB ]
+  // phi [ fshl(ShVal0, ShVal1, ShAmt), FunnelBB ], [ ShVal0, GuardBB ]
+  // phi [ fshr(ShVal0, ShVal1, ShAmt), FunnelBB ], [ ShVal1, GuardBB ]
   PHINode &Phi = cast(I);
   unsigned FunnelOp = 0, GuardOp = 1;
   Value *P0 = Phi.getOperand(0), *P1 = Phi.getOperand(1);
   Value *ShVal0, *ShVal1, *ShAmt;
   Intrinsic::ID IID = matchFunnelShift(P0, ShVal0, ShVal1, ShAmt);
-  if (IID == Intrinsic::not_intrinsic || ShVal0 != ShVal1 || ShVal0 != P1) {
+  if (IID == Intrinsic::not_intrinsic ||
+  (IID == Intrinsic::fshl && ShVal0 != P1) ||
+  (IID == Intrinsic::fshr && ShVal1 != P1)) {
 IID = matchFunnelShift(P1, ShVal0, ShVal1, ShAmt);
-if (IID == Intrinsic::not_intrinsic || ShVal0 != ShVal1 || ShVal0 != P0)
+if (IID == Intrinsic::not_intrinsic ||
+(IID == Intrinsic::fshl && ShVal0 != P0) ||
+(IID == Intrinsic::fshr && ShVal1 != P0))
   return false;
 assert((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
"Pattern must match funnel shift left or right");
 std

[llvm-branch-commits] [llvm] d56982b - Remove unused variables.

[Tres Popp via llvm-branch-commits]

Author: Michael Forster
Date: 2020-12-21T16:24:43+01:00
New Revision: d56982b6f5fb17fb1fa50b31ab4b67b8d3a76c24

URL: 
https://github.com/llvm/llvm-project/commit/d56982b6f5fb17fb1fa50b31ab4b67b8d3a76c24
DIFF: 
https://github.com/llvm/llvm-project/commit/d56982b6f5fb17fb1fa50b31ab4b67b8d3a76c24.diff

LOG: Remove unused variables.

Differential Revision: https://reviews.llvm.org/D93635

Added: 


Modified: 
llvm/lib/Transforms/IPO/IROutliner.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/IPO/IROutliner.cpp 
b/llvm/lib/Transforms/IPO/IROutliner.cpp
index 4031eedced7c..c879031faf5a 100644
--- a/llvm/lib/Transforms/IPO/IROutliner.cpp
+++ b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -429,8 +429,7 @@ findExtractedInputToOverallInputMapping(OutlinableRegion 
&Region,
 // It is not a constant, check if it is a sunken alloca.  If it is not,
 // create the mapping from extracted to overall.  If it is, create the
 // mapping of the index to the value.
-unsigned Found = ArgInputs.count(Input);
-assert(Found && "Input cannot be found!");
+assert(ArgInputs.count(Input) && "Input cannot be found!");
 
 Region.ExtractedArgToAgg.insert(std::make_pair(OriginalIndex, TypeIndex));
 Region.AggArgToExtracted.insert(std::make_pair(TypeIndex, OriginalIndex));
@@ -475,7 +474,6 @@ void IROutliner::findAddInputsOutputs(Module &M, 
OutlinableRegion &Region) {
 /// \returns a call instruction with the replaced function.
 CallInst *replaceCalledFunction(Module &M, OutlinableRegion &Region) {
   std::vector NewCallArgs;
-  DenseMap::iterator ArgPair;
 
   OutlinableGroup &Group = *Region.Parent;
   CallInst *Call = Region.Call;



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[llvm-branch-commits] [llvm] 554eb1f - Revert "[TableGen] Add the !substr() bang operator"

[Paul C. Anagnostopoulos via llvm-branch-commits]

Author: Paul C. Anagnostopoulos
Date: 2020-12-21T10:46:25-05:00
New Revision: 554eb1f6dc49e616b70254a7976699b3eff84366

URL: 
https://github.com/llvm/llvm-project/commit/554eb1f6dc49e616b70254a7976699b3eff84366
DIFF: 
https://github.com/llvm/llvm-project/commit/554eb1f6dc49e616b70254a7976699b3eff84366.diff

LOG: Revert "[TableGen] Add the !substr() bang operator"

This reverts commit 3a675c777dd5788e2313cb06fb27b01f8a2e7573.

Added: 


Modified: 
llvm/docs/TableGen/ProgRef.rst
llvm/include/llvm/TableGen/Record.h
llvm/lib/TableGen/Record.cpp
llvm/lib/TableGen/TGLexer.cpp
llvm/lib/TableGen/TGLexer.h
llvm/lib/TableGen/TGParser.cpp
llvm/lib/TableGen/TGParser.h

Removed: 
llvm/test/TableGen/substr.td



diff  --git a/llvm/docs/TableGen/ProgRef.rst b/llvm/docs/TableGen/ProgRef.rst
index f2ee7a7e549a..342b91a0c437 100644
--- a/llvm/docs/TableGen/ProgRef.rst
+++ b/llvm/docs/TableGen/ProgRef.rst
@@ -216,8 +216,7 @@ TableGen provides "bang operators" that have a wide variety 
of uses:
: !interleave !isa !le  !listconcat  !listsplat
: !lt !mul !ne  !not !or
: !setdagop   !shl !size!sra !srl
-   : !strconcat  !sub !subst   !substr  !tail
-   : !xor
+   : !strconcat  !sub !subst   !tail!xor
 
 The ``!cond`` operator has a slightly 
diff erent
 syntax compared to other bang operators, so it is defined separately:
@@ -1724,13 +1723,6 @@ and non-0 as true.
 record if the *target* record name equals the *value* record name; 
otherwise it
 produces the *value*.
 
-``!substr(``\ *string*\ ``,`` *start*\ [``,`` *length*]\ ``)``
-This operator extracts a substring of the given *string*. The starting
-position of the substring is specified by *start*, which can range
-between 0 and the length of the string. The length of the substring
-is specified by *length*; if not specified, the rest of the string is
-extracted. The *start* and *length* arguments must be integers.
-
 ``!tail(``\ *a*\ ``)``
 This operator produces a new list with all the elements
 of the list *a* except for the zeroth one. (See also ``!head``.)

diff  --git a/llvm/include/llvm/TableGen/Record.h 
b/llvm/include/llvm/TableGen/Record.h
index a0c5b2778547..3010b4dad09a 100644
--- a/llvm/include/llvm/TableGen/Record.h
+++ b/llvm/include/llvm/TableGen/Record.h
@@ -829,7 +829,7 @@ class BinOpInit : public OpInit, public FoldingSetNode {
 /// !op (X, Y, Z) - Combine two inits.
 class TernOpInit : public OpInit, public FoldingSetNode {
 public:
-  enum TernaryOp : uint8_t { SUBST, FOREACH, FILTER, IF, DAG, SUBSTR };
+  enum TernaryOp : uint8_t { SUBST, FOREACH, FILTER, IF, DAG };
 
 private:
   Init *LHS, *MHS, *RHS;

diff  --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp
index 9c0464d4e1bf..cbdce04494f3 100644
--- a/llvm/lib/TableGen/Record.cpp
+++ b/llvm/lib/TableGen/Record.cpp
@@ -1325,27 +1325,6 @@ Init *TernOpInit::Fold(Record *CurRec) const {
 }
 break;
   }
-
-  case SUBSTR: {
-StringInit *LHSs = dyn_cast(LHS);
-IntInit *MHSi = dyn_cast(MHS);
-IntInit *RHSi = dyn_cast(RHS);
-if (LHSs && MHSi && RHSi) {
-  int64_t StringSize = LHSs->getValue().size();
-  int64_t Start = MHSi->getValue();
-  int64_t Length = RHSi->getValue();
-  if (Start < 0 || Start > StringSize)
-PrintError(CurRec->getLoc(),
-   Twine("!substr start position is out of range 0...") +
-   std::to_string(StringSize) + ": " +
-   std::to_string(Start));
-  if (Length < 0)
-PrintError(CurRec->getLoc(), "!substr length must be nonnegative");
-  return StringInit::get(LHSs->getValue().substr(Start, Length),
- LHSs->getFormat());
-}
-break;
-  }
   }
 
   return const_cast(this);
@@ -1385,12 +1364,11 @@ std::string TernOpInit::getAsString() const {
   std::string Result;
   bool UnquotedLHS = false;
   switch (getOpcode()) {
-  case DAG: Result = "!dag"; break;
-  case FILTER: Result = "!filter"; UnquotedLHS = true; break;
+  case SUBST: Result = "!subst"; break;
   case FOREACH: Result = "!foreach"; UnquotedLHS = true; break;
+  case FILTER: Result = "!filter"; UnquotedLHS = true; break;
   case IF: Result = "!if"; break;
-  case SUBST: Result = "!subst"; break;
-  case SUBSTR: Result = "!substr"; break;
+  case DAG: Result = "!dag"; break;
   }
   return (Result + "(" +
   (UnquotedLHS ? LHS->getAsUnquotedString() : LHS->getAsString()) +

diff  --git a/llvm/lib/TableGen/TGLexer.cpp b/llvm/lib/TableGen/TGLexer.cpp
index a45ef6dc10c1..df0df96f40eb 100644
--- a/llvm/lib/TableGen/TGLexer.cpp
+++ b/llvm/lib/TableGen/TGLexer.cpp
@@ -589,7 +589,6 @@ tgtok::TokKind TGLexer::LexExclaim() {

[llvm-branch-commits] [lld] e25afcf - [ELF][PPC64] Detect missing R_PPC64_TLSGD/R_PPC64_TLSLD and disable TLS relaxation

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-21T08:45:41-08:00
New Revision: e25afcfa51abbd63ddbe943913af1ba61161ab28

URL: 
https://github.com/llvm/llvm-project/commit/e25afcfa51abbd63ddbe943913af1ba61161ab28
DIFF: 
https://github.com/llvm/llvm-project/commit/e25afcfa51abbd63ddbe943913af1ba61161ab28.diff

LOG: [ELF][PPC64] Detect missing R_PPC64_TLSGD/R_PPC64_TLSLD and disable TLS 
relaxation

Alternative to D91611.

The TLS General Dynamic/Local Dynamic code sequences need to mark
`__tls_get_addr` with R_PPC64_TLSGD or R_PPC64_TLSLD, e.g.

```
addis r3, r2, x@got@tlsgd@ha # R_PPC64_GOT_TLSGD16_HA
addi r3, r3, x@got@tlsgd@l   # R_PPC64_GOT_TLSGD16_LO
bl __tls_get_addr(x@tlsgd)   # R_PPC64_TLSGD followed by R_PPC64_REL24
nop
```

However, there are two deviations form the above:

1. direct call to `__tls_get_addr`. This is essential to implement ld.so in 
glibc/musl/FreeBSD.

```
bl __tls_get_addr
nop
```

This is only used in a -shared link, and thus not subject to the GD/LD to IE/LE
relaxation issue below.

2. Missing R_PPC64_TLSGD/R_PPC64_TLSGD for compiler generated TLS references

According to Stefan Pintille, "In the early days of the transition from the
ELFv1 ABI that is used for big endian PowerPC Linux distributions to the ELFv2
ABI that is used for little endian PowerPC Linux distributions, there was some
ambiguity in the specification of the relocations for TLS. The GNU linker has
implemented support for correct handling of calls to __tls_get_addr with a
missing relocation.  Unfortunately, we didn't notice that the IBM XL compiler
did not handle TLS according to the updated ABI until we tried linking XL
compiled libraries with LLD."

In short, LLD needs to work around the old IBM XL compiler issue.
Otherwise, if the object file is linked in -no-pie or -pie mode,
the result will be incorrect because the 4 instructions are partially
rewritten (the latter 2 are not changed).

Work around the compiler bug by disable General Dynamic/Local Dynamic to
Initial Exec/Local Exec relaxation. Note, we also disable Initial Exec
to Local Exec relaxation for implementation simplicity, though technically it 
can be kept.

ppc64-tls-missing-gdld.s demonstrates the updated behavior.

Reviewed By: #powerpc, stefanp, grimar

Differential Revision: https://reviews.llvm.org/D92959

Added: 


Modified: 
lld/ELF/InputFiles.h
lld/ELF/Relocations.cpp
lld/test/ELF/ppc64-tls-missing-gdld.s

Removed: 




diff  --git a/lld/ELF/InputFiles.h b/lld/ELF/InputFiles.h
index 8c898280b85c4..7ffe4c29cb878 100644
--- a/lld/ELF/InputFiles.h
+++ b/lld/ELF/InputFiles.h
@@ -130,6 +130,10 @@ class InputFile {
   // [.got, .got + 0xFFFC].
   bool ppc64SmallCodeModelTocRelocs = false;
 
+  // True if the file has TLSGD/TLSLD GOT relocations without R_PPC64_TLSGD or
+  // R_PPC64_TLSLD. Disable TLS relaxation to avoid bad code generation.
+  bool ppc64DisableTLSRelax = false;
+
   // groupId is used for --warn-backrefs which is an optional error
   // checking feature. All files within the same --{start,end}-group or
   // --{start,end}-lib get the same group ID. Otherwise, each file gets a new

diff  --git a/lld/ELF/Relocations.cpp b/lld/ELF/Relocations.cpp
index 18151c064c355..a9f627a080570 100644
--- a/lld/ELF/Relocations.cpp
+++ b/lld/ELF/Relocations.cpp
@@ -208,9 +208,13 @@ handleTlsRelocation(RelType type, Symbol &sym, 
InputSectionBase &c,
 return 1;
   }
 
+  // ARM, Hexagon and RISC-V do not support GD/LD to IE/LE relaxation.  For
+  // PPC64, if the file has missing R_PPC64_TLSGD/R_PPC64_TLSLD, disable
+  // relaxation as well.
   bool toExecRelax = !config->shared && config->emachine != EM_ARM &&
  config->emachine != EM_HEXAGON &&
- config->emachine != EM_RISCV;
+ config->emachine != EM_RISCV &&
+ !c.file->ppc64DisableTLSRelax;
 
   // If we are producing an executable and the symbol is non-preemptable, it
   // must be defined and the code sequence can be relaxed to use Local-Exec.
@@ -1527,6 +1531,43 @@ static void scanReloc(InputSectionBase &sec, 
OffsetGetter &getOffset, RelTy *&i,
   processRelocAux(sec, expr, type, offset, sym, rel, addend);
 }
 
+// R_PPC64_TLSGD/R_PPC64_TLSLD is required to mark `bl __tls_get_addr` for
+// General Dynamic/Local Dynamic code sequences. If a GD/LD GOT relocation is
+// found but no R_PPC64_TLSGD/R_PPC64_TLSLD is seen, we assume that the
+// instructions are generated by very old IBM XL compilers. Work around the
+// issue by disabling GD/LD to IE/LE relaxation.
+template 
+static void checkPPC64TLSRelax(InputSectionBase &sec, ArrayRef rels) {
+  // Skip if sec is synthetic (sec.file is null) or if sec has been marked.
+  if (!sec.file || sec.file->ppc64DisableTLSRelax)
+return;
+  bool hasGDLD = false;
+  for (const RelTy &rel : rels) {
+RelType type = rel.getType(false);
+switch (type) {
+case R_PPC64_T

[llvm-branch-commits] [lld] fb3c1b3 - [ELF] Reject local-exec TLS relocations for -shared

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-21T08:47:04-08:00
New Revision: fb3c1b3de5ce7342438d7451f01a14f9c52323cd

URL: 
https://github.com/llvm/llvm-project/commit/fb3c1b3de5ce7342438d7451f01a14f9c52323cd
DIFF: 
https://github.com/llvm/llvm-project/commit/fb3c1b3de5ce7342438d7451f01a14f9c52323cd.diff

LOG: [ELF] Reject local-exec TLS relocations for -shared

For x86-64, D33100 added a diagnostic for local-exec TLS relocations 
referencing a preemptible symbol.

This patch generalizes it to non-preemptible symbols (see `-Bsymbolic` in 
`tls.s`)
on all targets.

Local-exec TLS relocations resolve to offsets relative to a fixed point within
the static TLS block, which are only meaningful for the executable.

With this change, `clang -fpic -shared -fuse-ld=bfd a.c` on the following 
example will be flagged for AArch64/ARM/i386/x86-64/RISC-V

```
static __attribute__((tls_model("local-exec"))) __thread long TlsVar = 42;
long bump() { return ++TlsVar; }
```

Note, in GNU ld, at least arm, riscv and x86's ports have the similar
diagnostics, but aarch64 and ppc64 do not error.

Differential Revision: https://reviews.llvm.org/D93331

Added: 


Modified: 
lld/ELF/Relocations.cpp
lld/test/ELF/aarch64-tls-le.s
lld/test/ELF/arm-tls-le32.s
lld/test/ELF/i386-static-tls-model.s
lld/test/ELF/i386-tls-le.s
lld/test/ELF/i386-zrel-zrela.s
lld/test/ELF/mips-tls-hilo.s
lld/test/ELF/ppc64-local-exec-tls.s
lld/test/ELF/riscv-tls-le.s
lld/test/ELF/tls.s

Removed: 
lld/test/ELF/Inputs/i386-static-tls-model4.s
lld/test/ELF/x86-64-reloc-tpoff32-fpic.s



diff  --git a/lld/ELF/Relocations.cpp b/lld/ELF/Relocations.cpp
index a9f627a08057..875ecf78ca2c 100644
--- a/lld/ELF/Relocations.cpp
+++ b/lld/ELF/Relocations.cpp
@@ -1400,10 +1400,17 @@ static void scanReloc(InputSectionBase &sec, 
OffsetGetter &getOffset, RelTy *&i,
 in.got->hasGotOffRel = true;
   }
 
-  // Process some TLS relocations, including relaxing TLS relocations.
-  // Note that this function does not handle all TLS relocations.
-  if (unsigned processed =
-  handleTlsRelocation(type, sym, sec, offset, addend, expr)) {
+  // Process TLS relocations, including relaxing TLS relocations. Note that
+  // R_TPREL and R_TPREL_NEG relocations are resolved in processRelocAux.
+  if (expr == R_TPREL || expr == R_TPREL_NEG) {
+if (config->shared) {
+  errorOrWarn("relocation " + toString(type) + " against " + toString(sym) 
+
+  " cannot be used with -shared" +
+  getLocation(sec, sym, offset));
+  return;
+}
+  } else if (unsigned processed = handleTlsRelocation(
+ type, sym, sec, offset, addend, expr)) {
 i += (processed - 1);
 return;
   }

diff  --git a/lld/test/ELF/Inputs/i386-static-tls-model4.s 
b/lld/test/ELF/Inputs/i386-static-tls-model4.s
deleted file mode 100644
index 6006518bfd7c..
--- a/lld/test/ELF/Inputs/i386-static-tls-model4.s
+++ /dev/null
@@ -1,9 +0,0 @@
-.section ".tdata", "awT", @progbits
-.globl var
-var:
-
-.section .foo, "aw"
-.global _start
-_start:
- movl %gs:0, %eax
- leal var@ntpoff(%eax), %eax # R_386_TLS_LE

diff  --git a/lld/test/ELF/aarch64-tls-le.s b/lld/test/ELF/aarch64-tls-le.s
index e63a379fcc45..c43345e8e254 100644
--- a/lld/test/ELF/aarch64-tls-le.s
+++ b/lld/test/ELF/aarch64-tls-le.s
@@ -8,6 +8,14 @@
 #RELOC:  Relocations [
 #RELOC-NEXT: ]
 
+## Reject local-exec TLS relocations for -shared.
+# RUN: not ld.lld -shared %tmain.o -o /dev/null 2>&1 | FileCheck %s 
--check-prefix=ERR --implicit-check-not=error:
+
+# ERR: error: relocation R_AARCH64_TLSLE_ADD_TPREL_HI12 against v1 cannot be 
used with -shared
+# ERR: error: relocation R_AARCH64_TLSLE_ADD_TPREL_LO12_NC against v1 cannot 
be used with -shared
+# ERR: error: relocation R_AARCH64_TLSLE_ADD_TPREL_HI12 against v2 cannot be 
used with -shared
+# ERR: error: relocation R_AARCH64_TLSLE_ADD_TPREL_LO12_NC against v2 cannot 
be used with -shared
+
 .globl _start
 _start:
  mrs x0, TPIDR_EL0

diff  --git a/lld/test/ELF/arm-tls-le32.s b/lld/test/ELF/arm-tls-le32.s
index 739752209db4..49469c2b6bfa 100644
--- a/lld/test/ELF/arm-tls-le32.s
+++ b/lld/test/ELF/arm-tls-le32.s
@@ -8,6 +8,13 @@
 /// statically for an application. The code sequences assume a thread pointer
 /// in r9
 
+/// Reject local-exec TLS relocations for -shared.
+// RUN: not ld.lld -shared %t.o -o /dev/null 2>&1 | FileCheck %s 
--check-prefix=ERR --implicit-check-not=error:
+
+// ERR: error: relocation R_ARM_TLS_LE32 against x cannot be used with -shared
+// ERR: error: relocation R_ARM_TLS_LE32 against y cannot be used with -shared
+// ERR: error: relocation R_ARM_TLS_LE32 against z cannot be used with -shared
+
  .text
  .syntax unified
  .globl  _start

diff  --git a/lld/test/ELF/i386-static-tls-model.s 
b/lld/test/ELF/i386-static-tls-model.s
index cfd7cf6ba972..dfbbed25ef22 100644
--- a/lld/test/ELF/i3

[llvm-branch-commits] [clang] 9a93f95 - [clang] Fix expected errors in plugin attribute example

[David Spickett via llvm-branch-commits]

Author: David Spickett
Date: 2020-12-21T16:47:23Z
New Revision: 9a93f95fce91fb4616cee0f307b564b253789282

URL: 
https://github.com/llvm/llvm-project/commit/9a93f95fce91fb4616cee0f307b564b253789282
DIFF: 
https://github.com/llvm/llvm-project/commit/9a93f95fce91fb4616cee0f307b564b253789282.diff

LOG: [clang] Fix expected errors in plugin attribute example

b2ba6867eac10874bd279c739639bdb9e60c1996 was landed
with updated error messages in the example file
but not in the test file.

Added: 


Modified: 
clang/test/Frontend/plugin-attribute.cpp

Removed: 




diff  --git a/clang/test/Frontend/plugin-attribute.cpp 
b/clang/test/Frontend/plugin-attribute.cpp
index 969105927be5..f02932d56c68 100644
--- a/clang/test/Frontend/plugin-attribute.cpp
+++ b/clang/test/Frontend/plugin-attribute.cpp
@@ -18,5 +18,5 @@ int var1 __attribute__((example("otherstring"))) = 1; // 
expected-warning {{'exa
 class Example {
   void __attribute__((example)) fn3(); // expected-error {{'example' attribute 
only allowed at file scope}}
 };
-void fn4() __attribute__((example(123))) { } // expected-error {{'example's 
first argument should be a string literal}}
-void fn5() __attribute__((example("a","b", 3, 4.0))) { } // expected-error 
{{'example' attribute only allowed at most three arguments}}
+void fn4() __attribute__((example(123))) { } // expected-error {{first 
argument to the 'example' attribute must be a string literal}}
+void fn5() __attribute__((example("a","b", 3, 4.0))) { } // expected-error 
{{'example' attribute only accepts at most three arguments}}



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[llvm-branch-commits] [mlir] 26c8f90 - [mlir[[vector] Extend Transfer read/write ops to support tensor types.

[Thomas Raoux via llvm-branch-commits]

Author: Thomas Raoux
Date: 2020-12-21T08:55:04-08:00
New Revision: 26c8f9081b6b1ca9358ac2ca38e8e603fb6f7d64

URL: 
https://github.com/llvm/llvm-project/commit/26c8f9081b6b1ca9358ac2ca38e8e603fb6f7d64
DIFF: 
https://github.com/llvm/llvm-project/commit/26c8f9081b6b1ca9358ac2ca38e8e603fb6f7d64.diff

LOG: [mlir[[vector] Extend Transfer read/write ops to support tensor types.

Transfer_ops can now work on both buffers and tensor. Right now, lowering of
the tensor case is not supported yet.

Differential Revision: https://reviews.llvm.org/D93500

Added: 


Modified: 
mlir/include/mlir/Dialect/Vector/VectorOps.h
mlir/include/mlir/Dialect/Vector/VectorOps.td
mlir/include/mlir/Dialect/Vector/VectorUtils.h
mlir/include/mlir/Interfaces/VectorInterfaces.td
mlir/lib/Conversion/StandardToSPIRV/LegalizeStandardForSPIRV.cpp
mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
mlir/lib/Conversion/VectorToROCDL/VectorToROCDL.cpp
mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
mlir/lib/Dialect/Vector/VectorOps.cpp
mlir/lib/Dialect/Vector/VectorTransferOpTransforms.cpp
mlir/lib/Dialect/Vector/VectorTransforms.cpp
mlir/lib/Dialect/Vector/VectorUtils.cpp
mlir/test/Dialect/Vector/invalid.mlir
mlir/test/Dialect/Vector/ops.mlir

Removed: 




diff  --git a/mlir/include/mlir/Dialect/Vector/VectorOps.h 
b/mlir/include/mlir/Dialect/Vector/VectorOps.h
index 95964665ced6..5540a56a4043 100644
--- a/mlir/include/mlir/Dialect/Vector/VectorOps.h
+++ b/mlir/include/mlir/Dialect/Vector/VectorOps.h
@@ -126,7 +126,7 @@ namespace impl {
 /// Build the default minor identity map suitable for a vector transfer. This
 /// also handles the case memref<... x vector<...>> -> vector<...> in which the
 /// rank of the identity map must take the vector element type into account.
-AffineMap getTransferMinorIdentityMap(MemRefType memRefType,
+AffineMap getTransferMinorIdentityMap(ShapedType shapedType,
   VectorType vectorType);
 } // namespace impl
 } // end namespace vector

diff  --git a/mlir/include/mlir/Dialect/Vector/VectorOps.td 
b/mlir/include/mlir/Dialect/Vector/VectorOps.td
index de77e3b03483..13aba2076ee9 100644
--- a/mlir/include/mlir/Dialect/Vector/VectorOps.td
+++ b/mlir/include/mlir/Dialect/Vector/VectorOps.td
@@ -1056,7 +1056,7 @@ def Vector_TransferReadOp :
   DeclareOpInterfaceMethods,
   DeclareOpInterfaceMethods
 ]>,
-Arguments<(ins AnyMemRef:$memref, Variadic:$indices,
+Arguments<(ins AnyShaped:$source, Variadic:$indices,
AffineMapAttr:$permutation_map, AnyType:$padding,
OptionalAttr:$masked)>,
 Results<(outs AnyVector:$vector)> {
@@ -1065,15 +1065,16 @@ def Vector_TransferReadOp :
 
   let description = [{
 The `vector.transfer_read` op performs a read from a slice within a
-[MemRef](../LangRef.md#memref-type) supplied as its first operand
-into a [vector](../LangRef.md#vector-type) of the same base elemental type.
+[MemRef](../LangRef.md#memref-type) or a Ranked
+[Tensor](../LangRef.md#tensor-type) supplied as its first operand into a
+[vector](../LangRef.md#vector-type) of the same base elemental type.
 
-A memref operand with vector element type, must have its vector element
-type match a suffix (shape and element type) of the vector (e.g.
+A memref/tensor operand with vector element type, must have its vector
+element type match a suffix (shape and element type) of the vector (e.g.
 memref<3x2x6x4x3xf32>, vector<1x1x4x3xf32>).
 
-The slice is further defined by a full-rank index within the MemRef,
-supplied as the operands `2 .. 1 + rank(memref)`.
+The slice is further defined by a full-rank index within the MemRef/Tensor,
+supplied as the operands `2 .. 1 + rank(memref/tensor)`.
 
 The permutation_map [attribute](../LangRef.md#attributes) is an
 [affine-map](Affine.md#affine-maps) which specifies the transposition on 
the
@@ -1084,8 +1085,9 @@ def Vector_TransferReadOp :
 The size of the slice is specified by the size of the vector, given as the
 return type.
 
-An `ssa-value` of the same elemental type as the MemRef is provided as the
-last operand to specify padding in the case of out-of-bounds accesses.
+An `ssa-value` of the same elemental type as the MemRef/Tensor is provided
+as the last operand to specify padding in the case of out-of-bounds
+accesses.
 
 An optional boolean array attribute is provided to specify which dimensions
 of the transfer need masking. When a dimension is specified as not 
requiring
@@ -1196,17 +1198,22 @@ def Vector_TransferReadOp :
 %4 = vector.transfer_read %arg1[%c3, %c3], %vf0
   {permutation_map = (d0, d1)->(d0, d1)}
 : memref>, v

[llvm-branch-commits] [llvm] a323682 - [AMDGPU][MC][NFC] Lit tests cleanup

[Dmitry Preobrazhensky via llvm-branch-commits]

Author: Dmitry Preobrazhensky
Date: 2020-12-21T20:04:02+03:00
New Revision: a323682dcbfdce5860fa5f0fd87adf04360a

URL: 
https://github.com/llvm/llvm-project/commit/a323682dcbfdce5860fa5f0fd87adf04360a
DIFF: 
https://github.com/llvm/llvm-project/commit/a323682dcbfdce5860fa5f0fd87adf04360a.diff

LOG: [AMDGPU][MC][NFC] Lit tests cleanup

See bug 48513

Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D93550

Added: 


Modified: 
llvm/test/MC/AMDGPU/flat-gfx9.s
llvm/test/MC/AMDGPU/flat-global.s
llvm/test/MC/AMDGPU/flat.s
llvm/test/MC/AMDGPU/fma-mix.s
llvm/test/MC/AMDGPU/literal16.s
llvm/test/MC/AMDGPU/mad-mix.s
llvm/test/MC/AMDGPU/smem.s
llvm/test/MC/AMDGPU/vop1-gfx9-err.s
llvm/test/MC/AMDGPU/vop1.s
llvm/test/MC/Disassembler/AMDGPU/vop3_gfx9.txt
llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt

Removed: 




diff  --git a/llvm/test/MC/AMDGPU/flat-gfx9.s b/llvm/test/MC/AMDGPU/flat-gfx9.s
index 858907ce436e..da1ec062dece 100644
--- a/llvm/test/MC/AMDGPU/flat-gfx9.s
+++ b/llvm/test/MC/AMDGPU/flat-gfx9.s
@@ -12,7 +12,6 @@ flat_load_dword v1, v[3:4] offset:-1
 // VI-ERR: :28: error: flat offset modifier is not supported on this GPU
 // GFX9-ERR: :28: error: expected a 12-bit unsigned offset
 
-// FIXME: Error on VI in wrong column
 flat_load_dword v1, v[3:4] offset:4095
 // GFX9: flat_load_dword v1, v[3:4] offset:4095 ; encoding: 
[0xff,0x0f,0x50,0xdc,0x03,0x00,0x00,0x01]
 // VI-ERR: :28: error: flat offset modifier is not supported on this GPU

diff  --git a/llvm/test/MC/AMDGPU/flat-global.s 
b/llvm/test/MC/AMDGPU/flat-global.s
index 91c10ae13723..77092e0b3493 100644
--- a/llvm/test/MC/AMDGPU/flat-global.s
+++ b/llvm/test/MC/AMDGPU/flat-global.s
@@ -85,7 +85,6 @@ global_load_dwordx4 v[1:4], v[3:4], off dlc
 // GFX9-ERR: error: failed parsing operand
 // VI-ERR: error: instruction not supported on this GPU
 
-// FIXME: VI error should be instruction nto supported
 global_load_dword v1, v[3:4], off offset:0
 // GFX10: encoding: [0x00,0x80,0x30,0xdc,0x03,0x00,0x7d,0x01]
 // GFX9: global_load_dword v1, v[3:4], off; encoding: 
[0x00,0x80,0x50,0xdc,0x03,0x00,0x7f,0x01]

diff  --git a/llvm/test/MC/AMDGPU/flat.s b/llvm/test/MC/AMDGPU/flat.s
index 31dd4f0500f1..f307ae30a759 100644
--- a/llvm/test/MC/AMDGPU/flat.s
+++ b/llvm/test/MC/AMDGPU/flat.s
@@ -1,12 +1,6 @@
 // RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s 
--check-prefix=CIVI --check-prefix=CI
 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s 
--check-prefix=CIVI --check-prefix=VI
 
-// FIXME: For missing instruction the error message is:
-//  error: too few operands for instruction
-// It should be:
-//  error: instruction not supported on this GPU
-//
-
 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s 
--check-prefix=NOVI --implicit-check-not=error:
 // RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI 
--implicit-check-not=error:
 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s 
--check-prefix=NOSI --implicit-check-not=error:

diff  --git a/llvm/test/MC/AMDGPU/fma-mix.s b/llvm/test/MC/AMDGPU/fma-mix.s
index 6bd293e467f9..f062664bf8c1 100644
--- a/llvm/test/MC/AMDGPU/fma-mix.s
+++ b/llvm/test/MC/AMDGPU/fma-mix.s
@@ -22,8 +22,6 @@ v_fma_mix_f32 v0, abs(v1), v2, v3
 // GFX9-FMAMIX: v_fma_mix_f32 v0, |v1|, v2, v3 ; encoding: 
[0x00,0x01,0xa0,0xd3,0x01,0x05,0x0e,0x04]
 // GFX9-MADMIX-ERR: error: instruction not supported on this GPU
 
-// FIXME: Improve error messages
-
 v_fma_mix_f32 v0, v1, abs(v2), v3
 // GFX9-FMAMIX: v_fma_mix_f32 v0, v1, |v2|, v3 ; encoding: 
[0x00,0x02,0xa0,0xd3,0x01,0x05,0x0e,0x04]
 // GFX9-MADMIX-ERR: error: instruction not supported on this GPU
@@ -80,8 +78,6 @@ v_fma_mix_f32 v0, v1, v2, v3 op_sel:[0,0,0]
 // GFX9-FMAMIX: v_fma_mix_f32 v0, v1, v2, v3 ; encoding: 
[0x00,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
 // GFX9-MADMIX-ERR: error: instruction not supported on this GPU
 
-// FIXME: Improve error messages
-
 v_fma_mix_f32 v0, v1, v2, v3 op_sel:[1,0,0]
 // GFX9-FMAMIX: v_fma_mix_f32 v0, v1, v2, v3 op_sel:[1,0,0] ; encoding: 
[0x00,0x08,0xa0,0xd3,0x01,0x05,0x0e,0x04]
 // GFX9-MADMIX-ERR: error: instruction not supported on this GPU

diff  --git a/llvm/test/MC/AMDGPU/literal16.s b/llvm/test/MC/AMDGPU/literal16.s
index 97d16c374285..2a641d53a9b6 100644
--- a/llvm/test/MC/AMDGPU/literal16.s
+++ b/llvm/test/MC/AMDGPU/literal16.s
@@ -146,3 +146,4 @@ v_madmk_f16 v1, v2, 64.0, v3
 
 
 v_add_f16_e32 v1, 64.0, v2
+// VI: v_add_f16_e32 v1, 0x5400, v2 ; encoding: 
[0xff,0x04,0x02,0x3e,0x00,0x54,0x00,0x00]

diff  --git a/llvm/test/MC/AMDGPU/mad-mix.s b/llvm/test/MC/AMDGPU/mad-mix.s
index f1de62b5a548..4b28d03bb828 100644
--- a/llvm/test/MC/AMDGPU/mad-mix.s
+++ b/llvm/test/MC/AMDGPU/mad-mix.s
@@ -22,8 +22,6 @@ v_mad_mix_f32 v0, abs(v1), v2, v3
 // GFX9-MADMIX: v_mad_mix_f32 v0, |

[llvm-branch-commits] [llvm] 8ab5770 - [AMDGPU][MC][NFC] Parser refactoring

[Dmitry Preobrazhensky via llvm-branch-commits]

Author: Dmitry Preobrazhensky
Date: 2020-12-21T20:21:07+03:00
New Revision: 8ab5770a17fee4c39e23fc52a30057eb689fa578

URL: 
https://github.com/llvm/llvm-project/commit/8ab5770a17fee4c39e23fc52a30057eb689fa578
DIFF: 
https://github.com/llvm/llvm-project/commit/8ab5770a17fee4c39e23fc52a30057eb689fa578.diff

LOG: [AMDGPU][MC][NFC] Parser refactoring

See bug 48515 (https://bugs.llvm.org/show_bug.cgi?id=48515)

Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D93548

Added: 


Modified: 
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 
b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 6597b627f0ef..f472e4d7eace 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -1434,7 +1434,7 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
   bool trySkipToken(const AsmToken::TokenKind Kind);
   bool skipToken(const AsmToken::TokenKind Kind, const StringRef ErrMsg);
   bool parseString(StringRef &Val, const StringRef ErrMsg = "expected a 
string");
-  bool parseId(StringRef &Val, const StringRef ErrMsg);
+  bool parseId(StringRef &Val, const StringRef ErrMsg = "");
 
   void peekTokens(MutableArrayRef Tokens);
   AsmToken::TokenKind getTokenKind() const;
@@ -4073,9 +4073,8 @@ bool AMDGPUAsmParser::ParseDirectiveMajorMinor(uint32_t 
&Major,
   if (ParseAsAbsoluteExpression(Major))
 return TokError("invalid major version");
 
-  if (getLexer().isNot(AsmToken::Comma))
+  if (!trySkipToken(AsmToken::Comma))
 return TokError("minor version number required, comma expected");
-  Lex();
 
   if (ParseAsAbsoluteExpression(Minor))
 return TokError("invalid minor version");
@@ -4178,15 +4177,12 @@ bool AMDGPUAsmParser::ParseDirectiveAMDHSAKernel() {
   Optional EnableWavefrontSize32;
 
   while (true) {
-while (getLexer().is(AsmToken::EndOfStatement))
-  Lex();
-
-if (getLexer().isNot(AsmToken::Identifier))
-  return TokError("expected .amdhsa_ directive or .end_amdhsa_kernel");
+while (trySkipToken(AsmToken::EndOfStatement));
 
-StringRef ID = getTok().getIdentifier();
+StringRef ID;
 SMRange IDRange = getTok().getLocRange();
-Lex();
+if (!parseId(ID, "expected .amdhsa_ directive or .end_amdhsa_kernel"))
+  return true;
 
 if (ID == ".end_amdhsa_kernel")
   break;
@@ -4469,32 +4465,23 @@ bool AMDGPUAsmParser::ParseDirectiveHSACodeObjectISA() {
   if (ParseDirectiveMajorMinor(Major, Minor))
 return true;
 
-  if (getLexer().isNot(AsmToken::Comma))
+  if (!trySkipToken(AsmToken::Comma))
 return TokError("stepping version number required, comma expected");
-  Lex();
 
   if (ParseAsAbsoluteExpression(Stepping))
 return TokError("invalid stepping version");
 
-  if (getLexer().isNot(AsmToken::Comma))
+  if (!trySkipToken(AsmToken::Comma))
 return TokError("vendor name required, comma expected");
-  Lex();
-
-  if (getLexer().isNot(AsmToken::String))
-return TokError("invalid vendor name");
 
-  VendorName = getLexer().getTok().getStringContents();
-  Lex();
+  if (!parseString(VendorName, "invalid vendor name"))
+return true;
 
-  if (getLexer().isNot(AsmToken::Comma))
+  if (!trySkipToken(AsmToken::Comma))
 return TokError("arch name required, comma expected");
-  Lex();
-
-  if (getLexer().isNot(AsmToken::String))
-return TokError("invalid arch name");
 
-  ArchName = getLexer().getTok().getStringContents();
-  Lex();
+  if (!parseString(ArchName, "invalid arch name"))
+return true;
 
   getTargetStreamer().EmitDirectiveHSACodeObjectISA(Major, Minor, Stepping,
 VendorName, ArchName);
@@ -4569,14 +4556,11 @@ bool AMDGPUAsmParser::ParseDirectiveAMDKernelCodeT() {
   while (true) {
 // Lex EndOfStatement.  This is in a while loop, because lexing a comment
 // will set the current token to EndOfStatement.
-while(getLexer().is(AsmToken::EndOfStatement))
-  Lex();
-
-if (getLexer().isNot(AsmToken::Identifier))
-  return TokError("expected value identifier or .end_amd_kernel_code_t");
+while(trySkipToken(AsmToken::EndOfStatement));
 
-StringRef ID = getLexer().getTok().getIdentifier();
-Lex();
+StringRef ID;
+if (!parseId(ID, "expected value identifier or .end_amd_kernel_code_t"))
+  return true;
 
 if (ID == ".end_amd_kernel_code_t")
   break;
@@ -4678,13 +4662,9 @@ bool AMDGPUAsmParser::ParseToEndDirective(const char 
*AssemblerDirectiveBegin,
   Lex();
 }
 
-if (getLexer().is(AsmToken::Identifier)) {
-  StringRef ID = getLexer().getTok().getIdentifier();
-  if (ID == AssemblerDirectiveEnd) {
-Lex();
-FoundEnd = true;
-break;
-  }
+if (trySkipId(AssemblerDirectiveEnd)) {
+  FoundEnd = true;
+   

[llvm-branch-commits] [llvm] f4f49d9 - [AMDGPU][MC][NFC] Fix for sanitizer error in 8ab5770

[Dmitry Preobrazhensky via llvm-branch-commits]

Author: Dmitry Preobrazhensky
Date: 2020-12-21T20:42:35+03:00
New Revision: f4f49d9d0d699f3ac32c1037516c9ab17551991e

URL: 
https://github.com/llvm/llvm-project/commit/f4f49d9d0d699f3ac32c1037516c9ab17551991e
DIFF: 
https://github.com/llvm/llvm-project/commit/f4f49d9d0d699f3ac32c1037516c9ab17551991e.diff

LOG: [AMDGPU][MC][NFC] Fix for sanitizer error in 8ab5770

Corrected to fix sanitizer error introduced by 8ab5770

Added: 


Modified: 
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 
b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index f472e4d7eace..f6b204f2415f 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -7285,7 +7285,6 @@ OperandMatchResultTy 
AMDGPUAsmParser::parseDim(OperandVector &Operands) {
 
 OperandMatchResultTy AMDGPUAsmParser::parseDPP8(OperandVector &Operands) {
   SMLoc S = Parser.getTok().getLoc();
-  StringRef Prefix;
 
   if (!isGFX10Plus() || !trySkipId("dpp8", AsmToken::Colon))
 return MatchOperand_NoMatch;



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[llvm-branch-commits] [clang] bb8d20d - [cuda][hip] Fix typoes in header wrappers.

[Michael Liao via llvm-branch-commits]

Author: Michael Liao
Date: 2020-12-21T13:02:47-05:00
New Revision: bb8d20d9f3bb955ae6f6143d24749faf61d573a9

URL: 
https://github.com/llvm/llvm-project/commit/bb8d20d9f3bb955ae6f6143d24749faf61d573a9
DIFF: 
https://github.com/llvm/llvm-project/commit/bb8d20d9f3bb955ae6f6143d24749faf61d573a9.diff

LOG: [cuda][hip] Fix typoes in header wrappers.

Added: 


Modified: 
clang/lib/Headers/cuda_wrappers/algorithm
clang/lib/Headers/cuda_wrappers/new

Removed: 




diff  --git a/clang/lib/Headers/cuda_wrappers/algorithm 
b/clang/lib/Headers/cuda_wrappers/algorithm
index 01af18360d8d..f14a0b00bb04 100644
--- a/clang/lib/Headers/cuda_wrappers/algorithm
+++ b/clang/lib/Headers/cuda_wrappers/algorithm
@@ -1,4 +1,4 @@
-/*=== complex - CUDA wrapper for  
===
+/*=== algorithm - CUDA wrapper for  -===
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to 
deal

diff  --git a/clang/lib/Headers/cuda_wrappers/new 
b/clang/lib/Headers/cuda_wrappers/new
index 7f255314056a..d5fb3b7011de 100644
--- a/clang/lib/Headers/cuda_wrappers/new
+++ b/clang/lib/Headers/cuda_wrappers/new
@@ -1,4 +1,4 @@
-/*=== complex - CUDA wrapper for  --===
+/*=== new - CUDA wrapper for  -===
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to 
deal



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[llvm-branch-commits] [compiler-rt] dfa4084 - scudo: Remove ANDROID_EXPERIMENTAL_MTE macro.

[Peter Collingbourne via llvm-branch-commits]

Author: Peter Collingbourne
Date: 2020-12-21T10:53:24-08:00
New Revision: dfa40840e0e2fa094c5d3f441affe0785cdc8d09

URL: 
https://github.com/llvm/llvm-project/commit/dfa40840e0e2fa094c5d3f441affe0785cdc8d09
DIFF: 
https://github.com/llvm/llvm-project/commit/dfa40840e0e2fa094c5d3f441affe0785cdc8d09.diff

LOG: scudo: Remove ANDROID_EXPERIMENTAL_MTE macro.

Kernel support for MTE has been released in Linux 5.10. This means
that it is a stable API and we no longer need to make the support
conditional on a macro. We do need to provide conditional definitions
of the new macros though in order to avoid a dependency on new
kernel headers.

Differential Revision: https://reviews.llvm.org/D93513

Added: 


Modified: 
compiler-rt/lib/scudo/standalone/linux.cpp
compiler-rt/lib/scudo/standalone/memtag.h

Removed: 




diff  --git a/compiler-rt/lib/scudo/standalone/linux.cpp 
b/compiler-rt/lib/scudo/standalone/linux.cpp
index 12f3da620e12..d2464677b279 100644
--- a/compiler-rt/lib/scudo/standalone/linux.cpp
+++ b/compiler-rt/lib/scudo/standalone/linux.cpp
@@ -35,10 +35,6 @@
 #define ANDROID_PR_SET_VMA_ANON_NAME 0
 #endif
 
-#ifdef ANDROID_EXPERIMENTAL_MTE
-#include 
-#endif
-
 namespace scudo {
 
 uptr getPageSize() { return static_cast(sysconf(_SC_PAGESIZE)); }
@@ -54,7 +50,10 @@ void *map(void *Addr, uptr Size, UNUSED const char *Name, 
uptr Flags,
 MmapProt = PROT_NONE;
   } else {
 MmapProt = PROT_READ | PROT_WRITE;
-#if defined(__aarch64__) && defined(ANDROID_EXPERIMENTAL_MTE)
+#if defined(__aarch64__)
+#ifndef PROT_MTE
+#define PROT_MTE 0x20
+#endif
 if (Flags & MAP_MEMTAG)
   MmapProt |= PROT_MTE;
 #endif

diff  --git a/compiler-rt/lib/scudo/standalone/memtag.h 
b/compiler-rt/lib/scudo/standalone/memtag.h
index 4b22c727849d..c3c4f574b4fc 100644
--- a/compiler-rt/lib/scudo/standalone/memtag.h
+++ b/compiler-rt/lib/scudo/standalone/memtag.h
@@ -14,9 +14,6 @@
 #if SCUDO_LINUX
 #include 
 #include 
-#if defined(ANDROID_EXPERIMENTAL_MTE)
-#include 
-#endif
 #endif
 
 namespace scudo {
@@ -56,20 +53,28 @@ inline uint8_t extractTag(uptr Ptr) {
 #if defined(__aarch64__)
 
 inline bool systemSupportsMemoryTagging() {
-#if defined(ANDROID_EXPERIMENTAL_MTE)
-  return getauxval(AT_HWCAP2) & HWCAP2_MTE;
-#else
-  return false;
+#ifndef HWCAP2_MTE
+#define HWCAP2_MTE (1 << 18)
 #endif
+  return getauxval(AT_HWCAP2) & HWCAP2_MTE;
 }
 
 inline bool systemDetectsMemoryTagFaultsTestOnly() {
-#if defined(ANDROID_EXPERIMENTAL_MTE)
-  return (prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0) & PR_MTE_TCF_MASK) !=
- PR_MTE_TCF_NONE;
-#else
-  return false;
+#ifndef PR_GET_TAGGED_ADDR_CTRL
+#define PR_GET_TAGGED_ADDR_CTRL 56
+#endif
+#ifndef PR_MTE_TCF_SHIFT
+#define PR_MTE_TCF_SHIFT 1
+#endif
+#ifndef PR_MTE_TCF_NONE
+#define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
+#endif
+#ifndef PR_MTE_TCF_MASK
+#define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT)
 #endif
+  return (static_cast(
+  prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0)) &
+  PR_MTE_TCF_MASK) != PR_MTE_TCF_NONE;
 }
 
 inline void disableMemoryTagChecksTestOnly() {



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[llvm-branch-commits] [llvm] 43def79 - Update references to 'master' branch.

[Hafiz Abid Qadeer via llvm-branch-commits]

Author: Hafiz Abid Qadeer
Date: 2020-12-21T19:10:34Z
New Revision: 43def795aacd6794f93b91fc76e59953fd67e138

URL: 
https://github.com/llvm/llvm-project/commit/43def795aacd6794f93b91fc76e59953fd67e138
DIFF: 
https://github.com/llvm/llvm-project/commit/43def795aacd6794f93b91fc76e59953fd67e138.diff

LOG: Update references to 'master' branch.

This commit replace 'master' with 'main' in llvm/docs.

Reviewed By: sammccall, kristof.beyls

Differential Revision: https://reviews.llvm.org/D92831

Added: 


Modified: 
llvm/docs/CodingStandards.rst
llvm/docs/DeveloperPolicy.rst
llvm/docs/FAQ.rst
llvm/docs/GettingStarted.rst
llvm/docs/GitBisecting.rst
llvm/docs/GlobalISel/IRTranslator.rst
llvm/docs/LibFuzzer.rst
llvm/docs/TestingGuide.rst
llvm/docs/TypeMetadata.rst

Removed: 




diff  --git a/llvm/docs/CodingStandards.rst b/llvm/docs/CodingStandards.rst
index a5798bd73cb1..57d148df89f8 100644
--- a/llvm/docs/CodingStandards.rst
+++ b/llvm/docs/CodingStandards.rst
@@ -77,7 +77,7 @@ on the standard library facilities and the LLVM support 
libraries as much as
 possible.
 
 LLVM support libraries (for example, `ADT
-`_)
+`_)
 implement specialized data structures or functionality missing in the standard
 library. Such libraries are usually implemented in the ``llvm`` namespace and
 follow the expected standard interface, when there is one.

diff  --git a/llvm/docs/DeveloperPolicy.rst b/llvm/docs/DeveloperPolicy.rst
index 3fa629965318..7bcb5664540a 100644
--- a/llvm/docs/DeveloperPolicy.rst
+++ b/llvm/docs/DeveloperPolicy.rst
@@ -80,7 +80,7 @@ Making and Submitting a Patch
 When making a patch for review, the goal is to make it as easy for the reviewer
 to read it as possible.  As such, we recommend that you:
 
-#. Make your patch against git master, not a branch, and not an old version
+#. Make your patch against git main, not a branch, and not an old version
of LLVM.  This makes it easy to apply the patch.  For information on how to
clone from git, please see the :ref:`Getting Started Guide
`.
@@ -146,7 +146,7 @@ problem, we have a notion of an 'owner' for a piece of the 
code.  The sole
 responsibility of a code owner is to ensure that a commit to their area of the
 code is appropriately reviewed, either by themself or by someone else.  The 
list
 of current code owners can be found in the file `CODE_OWNERS.TXT
-`_ in 
the
+`_ in the
 root of the LLVM source tree.
 
 Note that code ownership is completely 
diff erent than reviewers: anyone can

diff  --git a/llvm/docs/FAQ.rst b/llvm/docs/FAQ.rst
index aef15d6dc711..229ac99f703c 100644
--- a/llvm/docs/FAQ.rst
+++ b/llvm/docs/FAQ.rst
@@ -13,7 +13,7 @@ Can I modify LLVM source code and redistribute the modified 
source?
 ---
 Yes.  The modified source distribution must retain the copyright notice and
 follow the conditions listed in the `Apache License v2.0 with LLVM Exceptions
-`_.
+`_.
 
 
 Can I modify the LLVM source code and redistribute binaries or other tools 
based on it, without redistributing the source?

diff  --git a/llvm/docs/GettingStarted.rst b/llvm/docs/GettingStarted.rst
index d4e4a3b03928..a2274f80fc1f 100644
--- a/llvm/docs/GettingStarted.rst
+++ b/llvm/docs/GettingStarted.rst
@@ -457,7 +457,7 @@ either via emailing to llvm-commits, or, preferably, via 
:ref:`Phabricator
 
 You'll generally want to make sure your branch has a single commit,
 corresponding to the review you wish to send, up-to-date with the upstream
-``origin/master`` branch, and doesn't contain merges. Once you have that, you
+``origin/main`` branch, and doesn't contain merges. Once you have that, you
 can start `a Phabricator review `_ (or use ``git show`` or
 ``git format-patch`` to output the 
diff , and attach it to an email message).
 
@@ -501,7 +501,7 @@ For developers to commit changes from Git
 ^
 
 Once a patch is reviewed, you should rebase it, re-test locally, and commit the
-changes to LLVM's master branch. This is done using `git push` if you have the
+changes to LLVM's main branch. This is done using `git push` if you have the
 required access rights. See `committing a change
 `_ for Phabricator based commits or
 `obtaining commit access `_
@@ -515,13 +515,13 @@ accepted commit on the branch named `branch-with-change`.
   # Go to the branch with your accepted commit.
   % git checkout branch-with-change
   # Rebase your change on

[llvm-branch-commits] [llvm] 82bd64f - [AA] byval argument is identified function local

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2020-12-21T20:18:23+01:00
New Revision: 82bd64fff63272c92b91a951ffde678fb9af4899

URL: 
https://github.com/llvm/llvm-project/commit/82bd64fff63272c92b91a951ffde678fb9af4899
DIFF: 
https://github.com/llvm/llvm-project/commit/82bd64fff63272c92b91a951ffde678fb9af4899.diff

LOG: [AA] byval argument is identified function local

byval arguments should mostly get the same treatment as noalias
arguments in alias analysis. This was not the case for the
isIdentifiedFunctionLocal() function.

Marking byval arguments as identified function local means that
they cannot alias with other arguments, which I believe is correct.

Differential Revision: https://reviews.llvm.org/D93602

Added: 


Modified: 
llvm/include/llvm/Analysis/AliasAnalysis.h
llvm/lib/Analysis/AliasAnalysis.cpp
llvm/test/Analysis/BasicAA/noalias-param.ll

Removed: 




diff  --git a/llvm/include/llvm/Analysis/AliasAnalysis.h 
b/llvm/include/llvm/Analysis/AliasAnalysis.h
index b84febaeeeaa..98a2a7fb075a 100644
--- a/llvm/include/llvm/Analysis/AliasAnalysis.h
+++ b/llvm/include/llvm/Analysis/AliasAnalysis.h
@@ -1097,9 +1097,6 @@ template  class AAResultBase {
 /// Return true if this pointer is returned by a noalias function.
 bool isNoAliasCall(const Value *V);
 
-/// Return true if this is an argument with the noalias attribute.
-bool isNoAliasArgument(const Value *V);
-
 /// Return true if this pointer refers to a distinct and identifiable object.
 /// This returns true for:
 ///Global Variables and Functions (but not Global Aliases)

diff  --git a/llvm/lib/Analysis/AliasAnalysis.cpp 
b/llvm/lib/Analysis/AliasAnalysis.cpp
index 7d4969cc24c4..f5b62ef06a23 100644
--- a/llvm/lib/Analysis/AliasAnalysis.cpp
+++ b/llvm/lib/Analysis/AliasAnalysis.cpp
@@ -943,9 +943,9 @@ bool llvm::isNoAliasCall(const Value *V) {
   return false;
 }
 
-bool llvm::isNoAliasArgument(const Value *V) {
+static bool isNoAliasOrByValArgument(const Value *V) {
   if (const Argument *A = dyn_cast(V))
-return A->hasNoAliasAttr();
+return A->hasNoAliasAttr() || A->hasByValAttr();
   return false;
 }
 
@@ -956,13 +956,13 @@ bool llvm::isIdentifiedObject(const Value *V) {
 return true;
   if (isNoAliasCall(V))
 return true;
-  if (const Argument *A = dyn_cast(V))
-return A->hasNoAliasAttr() || A->hasByValAttr();
+  if (isNoAliasOrByValArgument(V))
+return true;
   return false;
 }
 
 bool llvm::isIdentifiedFunctionLocal(const Value *V) {
-  return isa(V) || isNoAliasCall(V) || isNoAliasArgument(V);
+  return isa(V) || isNoAliasCall(V) || isNoAliasOrByValArgument(V);
 }
 
 void llvm::getAAResultsAnalysisUsage(AnalysisUsage &AU) {

diff  --git a/llvm/test/Analysis/BasicAA/noalias-param.ll 
b/llvm/test/Analysis/BasicAA/noalias-param.ll
index aab55595da2a..81c89feaabb4 100644
--- a/llvm/test/Analysis/BasicAA/noalias-param.ll
+++ b/llvm/test/Analysis/BasicAA/noalias-param.ll
@@ -22,9 +22,9 @@ entry:
   ret void
 }
 
-; TODO: Result should be the same for byval instead of noalias.
+; Result should be the same for byval instead of noalias.
 ; CHECK-LABEL: byval
-; CHECK: MayAlias: i32* %a, i32* %b
+; CHECK: NoAlias: i32* %a, i32* %b
 define void @byval(i32* byval(i32) %a, i32* %b) nounwind {
 entry:
   store i32 1, i32* %a



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[llvm-branch-commits] [clang-tools-extra] 3fa2d37 - [clangd][NFC] Improve clangd status messages

[Sam McCall via llvm-branch-commits]

Author: Quentin Chateau
Date: 2020-12-21T20:19:25+01:00
New Revision: 3fa2d37eb3f8acddcfde749ca822f2cc7d900cbb

URL: 
https://github.com/llvm/llvm-project/commit/3fa2d37eb3f8acddcfde749ca822f2cc7d900cbb
DIFF: 
https://github.com/llvm/llvm-project/commit/3fa2d37eb3f8acddcfde749ca822f2cc7d900cbb.diff

LOG: [clangd][NFC] Improve clangd status messages

clangd actions have various naming schemes, the most
common being PascalCase. This commit applies PascalCase
to all clangd actions, and fix the status rendering
in `renderTUAction` to look more consistent.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D93546

Added: 


Modified: 
clang-tools-extra/clangd/ClangdServer.cpp
clang-tools-extra/clangd/TUScheduler.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/ClangdServer.cpp 
b/clang-tools-extra/clangd/ClangdServer.cpp
index 8b0d0591abe7..b760b31c0b87 100644
--- a/clang-tools-extra/clangd/ClangdServer.cpp
+++ b/clang-tools-extra/clangd/ClangdServer.cpp
@@ -621,7 +621,7 @@ void ClangdServer::typeHierarchy(PathRef File, Position 
Pos, int Resolve,
 File));
   };
 
-  WorkScheduler.runWithAST("Type Hierarchy", File, std::move(Action));
+  WorkScheduler.runWithAST("TypeHierarchy", File, std::move(Action));
 }
 
 void ClangdServer::resolveTypeHierarchy(
@@ -642,7 +642,7 @@ void ClangdServer::prepareCallHierarchy(
   return CB(InpAST.takeError());
 CB(clangd::prepareCallHierarchy(InpAST->AST, Pos, File));
   };
-  WorkScheduler.runWithAST("Call Hierarchy", File, std::move(Action));
+  WorkScheduler.runWithAST("CallHierarchy", File, std::move(Action));
 }
 
 void ClangdServer::incomingCalls(
@@ -678,7 +678,7 @@ void ClangdServer::documentSymbols(llvm::StringRef File,
   return CB(InpAST.takeError());
 CB(clangd::getDocumentSymbols(InpAST->AST));
   };
-  WorkScheduler.runWithAST("documentSymbols", File, std::move(Action),
+  WorkScheduler.runWithAST("DocumentSymbols", File, std::move(Action),
TUScheduler::InvalidateOnUpdate);
 }
 
@@ -690,7 +690,7 @@ void ClangdServer::foldingRanges(llvm::StringRef File,
   return CB(InpAST.takeError());
 CB(clangd::getFoldingRanges(InpAST->AST));
   };
-  WorkScheduler.runWithAST("foldingRanges", File, std::move(Action),
+  WorkScheduler.runWithAST("FoldingRanges", File, std::move(Action),
TUScheduler::InvalidateOnUpdate);
 }
 

diff  --git a/clang-tools-extra/clangd/TUScheduler.cpp 
b/clang-tools-extra/clangd/TUScheduler.cpp
index 813a000b41a5..7a858664faa5 100644
--- a/clang-tools-extra/clangd/TUScheduler.cpp
+++ b/clang-tools-extra/clangd/TUScheduler.cpp
@@ -1220,7 +1220,7 @@ std::string renderTUAction(const PreambleAction PA, const 
ASTAction &AA) {
   }
   if (Result.empty())
 return "idle";
-  return llvm::join(Result, ",");
+  return llvm::join(Result, ", ");
 }
 
 } // namespace



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[llvm-branch-commits] [lldb] 3f3ab03 - [lldb] Remove anonymous namespace from NativeRegisterContextLinux_x86_64

[Pavel Labath via llvm-branch-commits]

Author: Pavel Labath
Date: 2020-12-21T20:39:05+01:00
New Revision: 3f3ab03ab7bbaf13329b0ff07c5d3de40970bfcd

URL: 
https://github.com/llvm/llvm-project/commit/3f3ab03ab7bbaf13329b0ff07c5d3de40970bfcd
DIFF: 
https://github.com/llvm/llvm-project/commit/3f3ab03ab7bbaf13329b0ff07c5d3de40970bfcd.diff

LOG: [lldb] Remove anonymous namespace from NativeRegisterContextLinux_x86_64

Use "static" instead.

Added: 


Modified: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

Removed: 




diff  --git 
a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp 
b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp
index 6462441249c0..c6aa320c0c14 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp
@@ -41,11 +41,8 @@ static inline int get_cpuid_count(unsigned int __leaf,
 using namespace lldb_private;
 using namespace lldb_private::process_linux;
 
-// Private namespace.
-
-namespace {
 // x86 32-bit general purpose registers.
-const uint32_t g_gpr_regnums_i386[] = {
+static const uint32_t g_gpr_regnums_i386[] = {
 lldb_eax_i386,  lldb_ebx_i386,lldb_ecx_i386, lldb_edx_i386,
 lldb_edi_i386,  lldb_esi_i386,lldb_ebp_i386, lldb_esp_i386,
 lldb_eip_i386,  lldb_eflags_i386, lldb_cs_i386,  lldb_fs_i386,
@@ -62,7 +59,7 @@ static_assert((sizeof(g_gpr_regnums_i386) / 
sizeof(g_gpr_regnums_i386[0])) -
   "g_gpr_regnums_i386 has wrong number of register infos");
 
 // x86 32-bit floating point registers.
-const uint32_t g_fpu_regnums_i386[] = {
+static const uint32_t g_fpu_regnums_i386[] = {
 lldb_fctrl_i386,lldb_fstat_i386, lldb_ftag_i386,  lldb_fop_i386,
 lldb_fiseg_i386,lldb_fioff_i386, lldb_foseg_i386, lldb_fooff_i386,
 lldb_mxcsr_i386,lldb_mxcsrmask_i386, lldb_st0_i386,   lldb_st1_i386,
@@ -80,7 +77,7 @@ static_assert((sizeof(g_fpu_regnums_i386) / 
sizeof(g_fpu_regnums_i386[0])) -
   "g_fpu_regnums_i386 has wrong number of register infos");
 
 // x86 32-bit AVX registers.
-const uint32_t g_avx_regnums_i386[] = {
+static const uint32_t g_avx_regnums_i386[] = {
 lldb_ymm0_i386, lldb_ymm1_i386, lldb_ymm2_i386, lldb_ymm3_i386,
 lldb_ymm4_i386, lldb_ymm5_i386, lldb_ymm6_i386, lldb_ymm7_i386,
 LLDB_INVALID_REGNUM // register sets need to end with this flag
@@ -196,7 +193,7 @@ static_assert((sizeof(g_mpx_regnums_x86_64) / 
sizeof(g_mpx_regnums_x86_64[0])) -
   "g_mpx_regnums_x86_64 has wrong number of register infos");
 
 // Number of register sets provided by this context.
-enum { k_num_extended_register_sets = 2, k_num_register_sets = 4 };
+constexpr unsigned k_num_extended_register_sets = 2, k_num_register_sets = 4;
 
 // Register sets for x86 32-bit.
 static const RegisterSet g_reg_sets_i386[k_num_register_sets] = {
@@ -219,7 +216,6 @@ static const RegisterSet 
g_reg_sets_x86_64[k_num_register_sets] = {
  g_avx_regnums_x86_64},
 { "Memory Protection Extensions", "mpx", k_num_mpx_registers_x86_64,
  g_mpx_regnums_x86_64}};
-}
 
 #define REG_CONTEXT_SIZE (GetRegisterInfoInterface().GetGPRSize() + 
sizeof(FPR))
 



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[llvm-branch-commits] [lld] a817594 - [lld-macho][nfc] Clean up tests

[Jez Ng via llvm-branch-commits]

Author: Jez Ng
Date: 2020-12-21T14:44:08-05:00
New Revision: a817594de9269b9ac8055a2ff2a22ab824cf143d

URL: 
https://github.com/llvm/llvm-project/commit/a817594de9269b9ac8055a2ff2a22ab824cf143d
DIFF: 
https://github.com/llvm/llvm-project/commit/a817594de9269b9ac8055a2ff2a22ab824cf143d.diff

LOG: [lld-macho][nfc] Clean up tests

* Migrate most of our tests to use `split-file` instead of `echo`
* Remove individual `rm -f %t/libfoo.a` commands in favor of a top-level `rm 
-rf %t`
* Remove unused `Inputs/libfunction.s`

Reviewed By: #lld-macho, compnerd

Differential Revision: https://reviews.llvm.org/D93604

Added: 


Modified: 
lld/test/MachO/archive.s
lld/test/MachO/common-symbol-resolution.s
lld/test/MachO/filelist.s
lld/test/MachO/force-load.s
lld/test/MachO/framework.s
lld/test/MachO/invalid/archive-no-index.s
lld/test/MachO/invalid/bad-archive-member.s
lld/test/MachO/lto-archive.ll
lld/test/MachO/objc.s
lld/test/MachO/order-file.s
lld/test/MachO/resolution.s
lld/test/MachO/section-merge.s
lld/test/MachO/stabs.s
lld/test/MachO/subsections-section-relocs.s
lld/test/MachO/subsections-symbol-relocs.s
lld/test/MachO/symbol-order.s
lld/test/MachO/weak-definition-direct-fetch.s
lld/test/MachO/weak-definition-indirect-fetch.s
lld/test/MachO/weak-definition-order.s
lld/test/MachO/weak-definition-over-dysym.s

Removed: 
lld/test/MachO/Inputs/libfunction.s



diff  --git a/lld/test/MachO/Inputs/libfunction.s 
b/lld/test/MachO/Inputs/libfunction.s
deleted file mode 100644
index fe0b3879a41a..
--- a/lld/test/MachO/Inputs/libfunction.s
+++ /dev/null
@@ -1,6 +0,0 @@
-.section __TEXT,__text
-.globl _some_function
-
-_some_function:
-  mov $1, %rax
-  ret

diff  --git a/lld/test/MachO/archive.s b/lld/test/MachO/archive.s
index abde623b07f4..2ac2d302b88d 100644
--- a/lld/test/MachO/archive.s
+++ b/lld/test/MachO/archive.s
@@ -1,11 +1,10 @@
 # REQUIRES: x86
-# RUN: mkdir -p %t
-# RUN: echo ".global _boo; _boo: ret"   | llvm-mc 
-filetype=obj -triple=x86_64-apple-darwin -o %t/2.o
-# RUN: echo ".global _bar; _bar: ret"   | llvm-mc 
-filetype=obj -triple=x86_64-apple-darwin -o %t/3.o
-# RUN: echo ".global _undefined; .global _unused; _unused: ret" | llvm-mc 
-filetype=obj -triple=x86_64-apple-darwin -o %t/4.o
-# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t/main.o
+# RUN: rm -rf %t; split-file %s %t
+# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %t/2.s -o %t/2.o
+# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %t/3.s -o %t/3.o
+# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %t/4.s -o %t/4.o
+# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %t/main.s -o %t/main.o
 
-# RUN: rm -f %t/test.a
 # RUN: llvm-ar rcs %t/test.a %t/2.o %t/3.o %t/4.o
 # RUN: %lld %t/main.o %t/test.a -o %t/test.out
 
@@ -33,9 +32,24 @@
 # ALL-LOAD: T _main
 # ALL-LOAD: T _unused
 
-.global _main
+#--- 2.s
+.globl _boo
+_boo:
+  ret
+
+#--- 3.s
+.globl _bar
+_bar:
+  ret
+
+#--- 4.s
+.globl _undefined, _unused
+_unused:
+  ret
+
+#--- main.s
+.globl _main
 _main:
   callq _boo
   callq _bar
-  mov $0, %rax
   ret

diff  --git a/lld/test/MachO/common-symbol-resolution.s 
b/lld/test/MachO/common-symbol-resolution.s
index 2a88ef51e460..1dc015816da4 100644
--- a/lld/test/MachO/common-symbol-resolution.s
+++ b/lld/test/MachO/common-symbol-resolution.s
@@ -1,5 +1,5 @@
 # REQUIRES: x86
-# RUN: split-file %s %t
+# RUN: rm -rf %t; split-file %s %t
 
 # RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %t/common.s -o 
%t/common.o
 # RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %t/weak-common.s -o 
%t/weak-common.o
@@ -11,7 +11,6 @@
 
 # RUN: %lld -lSystem -order_file %t/order -dylib %t/libfoo.o -o %t/libfoo.dylib
 
-# RUN: rm -f %t/defined.a %t/weak-defined-and-common.a
 # RUN: llvm-ar rcs %t/defined.a %t/defined.o
 # RUN: llvm-ar rcs %t/weak-defined-and-common.a %t/weak-defined.o %t/common.o
 

diff  --git a/lld/test/MachO/filelist.s b/lld/test/MachO/filelist.s
index 32be332aa507..3d4846c4505a 100644
--- a/lld/test/MachO/filelist.s
+++ b/lld/test/MachO/filelist.s
@@ -3,10 +3,10 @@
 ## This test verifies that the paths in -filelist get processed in command-line
 ## order.
 
-# RUN: mkdir -p %t
-# RUN: echo ".globl _foo; .weak_definition _foo; .section __TEXT,first; _foo:" 
| llvm-mc -filetype=obj -triple=x86_64-apple-darwin -o %t/first.o
-# RUN: echo ".globl _foo; .weak_definition _foo; .section __TEXT,second; 
_foo:" | llvm-mc -filetype=obj -triple=x86_64-apple-darwin -o %t/second.o
-# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t/test.o
+# RUN: rm -rf %t; split-file %s %t
+# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %t/first.s -o 
%t/first.o
+# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %t/second.s -o 
%t/second.o
+# RUN: llvm-

[llvm-branch-commits] [lld] 0f8224c - [lld-macho][nfc] Remove %T from headerpad.s

[Jez Ng via llvm-branch-commits]

Author: Jez Ng
Date: 2020-12-21T14:44:08-05:00
New Revision: 0f8224c2104b7246b36b9f92ffe87aad4d8dd3ac

URL: 
https://github.com/llvm/llvm-project/commit/0f8224c2104b7246b36b9f92ffe87aad4d8dd3ac
DIFF: 
https://github.com/llvm/llvm-project/commit/0f8224c2104b7246b36b9f92ffe87aad4d8dd3ac.diff

LOG: [lld-macho][nfc] Remove %T from headerpad.s

The llvm-lit docs indicate that it is deprecated.

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D93605

Added: 


Modified: 
lld/test/MachO/headerpad.s

Removed: 




diff  --git a/lld/test/MachO/headerpad.s b/lld/test/MachO/headerpad.s
index 0f4f19ce9d62..750919438cb0 100644
--- a/lld/test/MachO/headerpad.s
+++ b/lld/test/MachO/headerpad.s
@@ -8,10 +8,12 @@
 ## just enforces a lower bound. We should consider implementing the same
 ## alignment behavior.
 
+# RUN: rm -rf %t; mkdir -p %t
+
  Check default behavior
-# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t.o
-# RUN: %lld -o %t %t.o
-# RUN: llvm-objdump --macho --all-headers %t | FileCheck %s --check-prefix=PADx
+# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t/test.o
+# RUN: %lld -o %t/test %t/test.o
+# RUN: llvm-objdump --macho --all-headers %t/test | FileCheck %s 
--check-prefix=PADx
 #
 # PADx:  magic{{.+}}  ncmds  sizeofcmds flags
 # PADx-NEXT: MH_MAGIC_64  {{.+}}  [[#]]  [[#%u, CMDSIZE:]]  {{.*}}
@@ -22,10 +24,10 @@
 # PADx-NEXT: offset [[#%u, CMDSIZE + 0x20 + 0x20]]
 
  Zero pad, no LCDylibs
-# RUN: %lld -o %t %t.o -headerpad 0
-# RUN: llvm-objdump --macho --all-headers %t | FileCheck %s --check-prefix=PAD0
-# RUN: %lld -o %t %t.o -headerpad 0 -headerpad_max_install_names
-# RUN: llvm-objdump --macho --all-headers %t | FileCheck %s --check-prefix=PAD0
+# RUN: %lld -o %t/test %t/test.o -headerpad 0
+# RUN: llvm-objdump --macho --all-headers %t/test | FileCheck %s 
--check-prefix=PAD0
+# RUN: %lld -o %t/test %t/test.o -headerpad 0 -headerpad_max_install_names
+# RUN: llvm-objdump --macho --all-headers %t/test | FileCheck %s 
--check-prefix=PAD0
 #
 # PAD0:  magic{{.+}}  ncmds  sizeofcmds flags
 # PAD0-NEXT: MH_MAGIC_64  {{.+}}  [[#]]  [[#%u, CMDSIZE:]]  {{.*}}
@@ -36,12 +38,12 @@
 # PAD0-NEXT: offset [[#%u, CMDSIZE + 0x20 + 0]]
 
  Each lexical form of a hex number, no LCDylibs
-# RUN: %lld -o %t %t.o -headerpad 11
-# RUN: llvm-objdump --macho --all-headers %t | FileCheck %s 
--check-prefix=PAD11
-# RUN: %lld -o %t %t.o -headerpad 0x11
-# RUN: llvm-objdump --macho --all-headers %t | FileCheck %s 
--check-prefix=PAD11
-# RUN: %lld -o %t %t.o -headerpad 0X11 -headerpad_max_install_names
-# RUN: llvm-objdump --macho --all-headers %t | FileCheck %s 
--check-prefix=PAD11
+# RUN: %lld -o %t/test %t/test.o -headerpad 11
+# RUN: llvm-objdump --macho --all-headers %t/test | FileCheck %s 
--check-prefix=PAD11
+# RUN: %lld -o %t/test %t/test.o -headerpad 0x11
+# RUN: llvm-objdump --macho --all-headers %t/test | FileCheck %s 
--check-prefix=PAD11
+# RUN: %lld -o %t/test %t/test.o -headerpad 0X11 -headerpad_max_install_names
+# RUN: llvm-objdump --macho --all-headers %t/test | FileCheck %s 
--check-prefix=PAD11
 #
 # PAD11:  magic{{.+}}  ncmds  sizeofcmds flags
 # PAD11-NEXT: MH_MAGIC_64  {{.+}}  [[#]]  [[#%u, CMDSIZE:]]  {{.*}}
@@ -52,17 +54,17 @@
 # PAD11-NEXT: offset [[#%u, CMDSIZE + 0x20 + 0x11]]
 
  Each & all 3 kinds of LCDylib
-# RUN: echo "" | llvm-mc -filetype=obj -triple=x86_64-apple-darwin -o %T/null.o
-# RUN: %lld -o %T/libnull.dylib %T/null.o -dylib \
+# RUN: echo "" | llvm-mc -filetype=obj -triple=x86_64-apple-darwin -o %t/null.o
+# RUN: %lld -o %t/libnull.dylib %t/null.o -dylib \
 # RUN: -headerpad_max_install_names
-# RUN: llvm-objdump --macho --all-headers %T/libnull.dylib | FileCheck %s 
--check-prefix=PADMAX
-# RUN: %lld -o %T/libnull.dylib %T/null.o -dylib \
+# RUN: llvm-objdump --macho --all-headers %t/libnull.dylib | FileCheck %s 
--check-prefix=PADMAX
+# RUN: %lld -o %t/libnull.dylib %t/null.o -dylib \
 # RUN: -headerpad_max_install_names -lSystem
-# RUN: llvm-objdump --macho --all-headers %T/libnull.dylib | FileCheck %s 
--check-prefix=PADMAX
-# RUN: %lld -o %T/libnull.dylib %T/null.o -dylib \
+# RUN: llvm-objdump --macho --all-headers %t/libnull.dylib | FileCheck %s 
--check-prefix=PADMAX
+# RUN: %lld -o %t/libnull.dylib %t/null.o -dylib \
 # RUN: -headerpad_max_install_names \
 # RUN: -lSystem -sub_library libSystem
-# RUN: llvm-objdump --macho --all-headers %T/libnull.dylib | FileCheck %s 
--check-prefix=PADMAX
+# RUN: llvm-objdump --macho --all-headers %t/libnull.dylib | FileCheck %s 
--check-prefix=PADMAX
 #
 # PADMAX:  magic{{.+}}  ncmdssizeofcmds flags
 # PADMAX-NEXT: MH_MAGIC_64  {{.+}}  [[#%u, N:]]  [[#%u, CMDSIZE:]]  {{.*}}
@@ -73,10 +75,10 @@
 # PADMAX-NEXT: offset

[llvm-branch-commits] [llvm] 8f933a4 - [openacc] Use TableGen enum for default clause value

[via llvm-branch-commits]

Author: Valentin Clement
Date: 2020-12-21T15:07:27-05:00
New Revision: 8f933a4e931dd1a66f19a81b33399cf7b407308f

URL: 
https://github.com/llvm/llvm-project/commit/8f933a4e931dd1a66f19a81b33399cf7b407308f
DIFF: 
https://github.com/llvm/llvm-project/commit/8f933a4e931dd1a66f19a81b33399cf7b407308f.diff

LOG: [openacc] Use TableGen enum for default clause value

Use the TableGen feature to have enum values for clauses.
Next step will be to extend the MLIR part used currently by OpenMP
to use the same enum on the dialect side.

This patch also add function that convert the enum to StringRef to be
used on the dump-parse-tree from flang.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D93576

Added: 


Modified: 
flang/include/flang/Parser/dump-parse-tree.h
flang/include/flang/Parser/parse-tree.h
flang/lib/Parser/openacc-parsers.cpp
flang/lib/Parser/unparse.cpp
flang/lib/Semantics/resolve-directives.cpp
llvm/include/llvm/Frontend/OpenACC/ACC.td
llvm/test/TableGen/directive1.td
llvm/utils/TableGen/DirectiveEmitter.cpp

Removed: 




diff  --git a/flang/include/flang/Parser/dump-parse-tree.h 
b/flang/include/flang/Parser/dump-parse-tree.h
index 7e2d713c127f..f69dd149e0a3 100644
--- a/flang/include/flang/Parser/dump-parse-tree.h
+++ b/flang/include/flang/Parser/dump-parse-tree.h
@@ -68,7 +68,11 @@ class ParseTreeDumper {
 #include "llvm/Frontend/OpenACC/ACC.cpp.inc"
   NODE(parser, AccBindClause)
   NODE(parser, AccDefaultClause)
-  NODE_ENUM(parser::AccDefaultClause, Arg)
+  static std::string GetNodeName(const llvm::acc::DefaultValue &x) {
+return llvm::Twine(
+"llvm::acc::DefaultValue = ", llvm::acc::getOpenACCDefaultValueName(x))
+.str();
+  }
   NODE(parser, AccClauseList)
   NODE(parser, AccCombinedDirective)
   NODE(parser, AccDataModifier)

diff  --git a/flang/include/flang/Parser/parse-tree.h 
b/flang/include/flang/Parser/parse-tree.h
index b9d88f6c66f8..59fa278e0029 100644
--- a/flang/include/flang/Parser/parse-tree.h
+++ b/flang/include/flang/Parser/parse-tree.h
@@ -3859,8 +3859,7 @@ struct AccBindClause {
 };
 
 struct AccDefaultClause {
-  ENUM_CLASS(Arg, None, Present)
-  WRAPPER_CLASS_BOILERPLATE(AccDefaultClause, Arg);
+  WRAPPER_CLASS_BOILERPLATE(AccDefaultClause, llvm::acc::DefaultValue);
   CharBlock source;
 };
 

diff  --git a/flang/lib/Parser/openacc-parsers.cpp 
b/flang/lib/Parser/openacc-parsers.cpp
index 2447ed70b1a1..26cacc9135c8 100644
--- a/flang/lib/Parser/openacc-parsers.cpp
+++ b/flang/lib/Parser/openacc-parsers.cpp
@@ -171,9 +171,9 @@ 
TYPE_PARSER(sourced(construct(parenthesized(name))) ||
 sourced(construct(parenthesized(scalarDefaultCharExpr
 
 // 2.5.14 Default clause
-TYPE_PARSER(construct(
-parenthesized(first("NONE" >> pure(AccDefaultClause::Arg::None),
-"PRESENT" >> pure(AccDefaultClause::Arg::Present)
+TYPE_PARSER(construct(parenthesized(
+first("NONE" >> pure(llvm::acc::DefaultValue::ACC_Default_none),
+"PRESENT" >> pure(llvm::acc::DefaultValue::ACC_Default_present)
 
 // SELF clause is either a simple optional condition for compute construct
 // or a synonym of the HOST clause for the update directive 2.14.4 holding

diff  --git a/flang/lib/Parser/unparse.cpp b/flang/lib/Parser/unparse.cpp
index b42b09ae723b..a027c8fc9af6 100644
--- a/flang/lib/Parser/unparse.cpp
+++ b/flang/lib/Parser/unparse.cpp
@@ -1850,10 +1850,10 @@ class UnparseVisitor {
   }
   void Unparse(const AccDefaultClause &x) {
 switch (x.v) {
-case AccDefaultClause::Arg::None:
+case llvm::acc::DefaultValue::ACC_Default_none:
   Put("NONE");
   break;
-case AccDefaultClause::Arg::Present:
+case llvm::acc::DefaultValue::ACC_Default_present:
   Put("PRESENT");
   break;
 }

diff  --git a/flang/lib/Semantics/resolve-directives.cpp 
b/flang/lib/Semantics/resolve-directives.cpp
index 7ca42bac569a..a4297ab42540 100644
--- a/flang/lib/Semantics/resolve-directives.cpp
+++ b/flang/lib/Semantics/resolve-directives.cpp
@@ -638,10 +638,10 @@ void AccAttributeVisitor::PrivatizeAssociatedLoopIndex(
 void AccAttributeVisitor::Post(const parser::AccDefaultClause &x) {
   if (!dirContext_.empty()) {
 switch (x.v) {
-case parser::AccDefaultClause::Arg::Present:
+case llvm::acc::DefaultValue::ACC_Default_present:
   SetContextDefaultDSA(Symbol::Flag::AccPresent);
   break;
-case parser::AccDefaultClause::Arg::None:
+case llvm::acc::DefaultValue::ACC_Default_none:
   SetContextDefaultDSA(Symbol::Flag::AccNone);
   break;
 }

diff  --git a/llvm/include/llvm/Frontend/OpenACC/ACC.td 
b/llvm/include/llvm/Frontend/OpenACC/ACC.td
index d5998845a839..d53d3132c969 100644
--- a/llvm/include/llvm/Frontend/OpenACC/ACC.td
+++ b/llvm/include/llvm/Frontend/OpenACC/ACC.td
@@ -80,8 +80,16 @@ def ACCC_Create : Clause<"create"> {
 }
 
 // 2.5.15
+def ACC_Default_none

[llvm-branch-commits] [lldb] bd2e833 - [lldb] [Process/FreeBSDRemote] Remove anonymous namespace

[Michał Górny via llvm-branch-commits]

Author: Michał Górny
Date: 2020-12-21T22:26:54+01:00
New Revision: bd2e8ece6afa8a6c1975d19d403d63349414

URL: 
https://github.com/llvm/llvm-project/commit/bd2e8ece6afa8a6c1975d19d403d63349414
DIFF: 
https://github.com/llvm/llvm-project/commit/bd2e8ece6afa8a6c1975d19d403d63349414.diff

LOG: [lldb] [Process/FreeBSDRemote] Remove anonymous namespace

Added: 


Modified: 

lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp

Removed: 




diff  --git 
a/lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
 
b/lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
index b3b4a6cb0578..d5052e7d1b3a 100644
--- 
a/lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
+++ 
b/lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
@@ -29,9 +29,6 @@
 using namespace lldb_private;
 using namespace lldb_private::process_freebsd;
 
-// Private namespace.
-
-namespace {
 // x86 64-bit general purpose registers.
 static const uint32_t g_gpr_regnums_x86_64[] = {
 lldb_rax_x86_64,lldb_rbx_x86_64,lldb_rcx_x86_64, lldb_rdx_x86_64,
@@ -138,7 +135,7 @@ static_assert((sizeof(g_dbr_regnums_x86_64) / 
sizeof(g_dbr_regnums_x86_64[0])) -
   "g_dbr_regnums_x86_64 has wrong number of register infos");
 
 // x86 32-bit general purpose registers.
-const uint32_t g_gpr_regnums_i386[] = {
+static const uint32_t g_gpr_regnums_i386[] = {
 lldb_eax_i386,  lldb_ebx_i386,lldb_ecx_i386, lldb_edx_i386,
 lldb_edi_i386,  lldb_esi_i386,lldb_ebp_i386, lldb_esp_i386,
 lldb_eip_i386,  lldb_eflags_i386, lldb_cs_i386,  lldb_fs_i386,
@@ -155,7 +152,7 @@ static_assert((sizeof(g_gpr_regnums_i386) / 
sizeof(g_gpr_regnums_i386[0])) -
   "g_gpr_regnums_i386 has wrong number of register infos");
 
 // x86 32-bit floating point registers.
-const uint32_t g_fpu_regnums_i386[] = {
+static const uint32_t g_fpu_regnums_i386[] = {
 lldb_fctrl_i386,lldb_fstat_i386, lldb_ftag_i386,  lldb_fop_i386,
 lldb_fiseg_i386,lldb_fioff_i386, lldb_foseg_i386, lldb_fooff_i386,
 lldb_mxcsr_i386,lldb_mxcsrmask_i386, lldb_st0_i386,   lldb_st1_i386,
@@ -236,7 +233,6 @@ static const RegisterSet 
g_reg_sets_x86_64[k_num_register_sets] = {
 };
 
 #define REG_CONTEXT_SIZE (GetRegisterInfoInterface().GetGPRSize())
-} // namespace
 
 NativeRegisterContextFreeBSD *
 NativeRegisterContextFreeBSD::CreateHostNativeRegisterContextFreeBSD(



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[llvm-branch-commits] [mlir] 9d2529a - [MLIR][Docs] Fix a small typo in documentation.

[via llvm-branch-commits]

Author: ergawy
Date: 2020-12-21T22:30:22+01:00
New Revision: 9d2529a38b34d06dbe17020b98db1ee21d9a628c

URL: 
https://github.com/llvm/llvm-project/commit/9d2529a38b34d06dbe17020b98db1ee21d9a628c
DIFF: 
https://github.com/llvm/llvm-project/commit/9d2529a38b34d06dbe17020b98db1ee21d9a628c.diff

LOG: [MLIR][Docs] Fix a small typo in documentation.

Just fixes a tiny typo in a link between 2 pages.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D93616

Added: 


Modified: 
mlir/docs/PatternRewriter.md

Removed: 




diff  --git a/mlir/docs/PatternRewriter.md b/mlir/docs/PatternRewriter.md
index ab93245395a3..fba5a9b8eac1 100644
--- a/mlir/docs/PatternRewriter.md
+++ b/mlir/docs/PatternRewriter.md
@@ -238,7 +238,7 @@ between, and within dialects using a concept of "legality". 
This framework
 allows for transforming illegal operations to those supported by a provided
 conversion target, via a set of pattern-based operation rewriting patterns. 
This
 framework also provides support for type conversions. More information on this
-driver can be found [here](DialectConversion.nd).
+driver can be found [here](DialectConversion.md).
 
 ### Greedy Pattern Rewrite Driver
 



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[llvm-branch-commits] [mlir] 7c7b55b - [mlir][vector] Extend vector unroll to all element-wise ops

[Thomas Raoux via llvm-branch-commits]

Author: Thomas Raoux
Date: 2020-12-21T13:31:22-08:00
New Revision: 7c7b55b985136a975223a9cefccd8fa1a5df7765

URL: 
https://github.com/llvm/llvm-project/commit/7c7b55b985136a975223a9cefccd8fa1a5df7765
DIFF: 
https://github.com/llvm/llvm-project/commit/7c7b55b985136a975223a9cefccd8fa1a5df7765.diff

LOG: [mlir][vector] Extend vector unroll to all element-wise ops

Extend unroll to support all element-wise ops and allow unrolling for ops with
vector operands of with the same shape as the destination but different element
type (like Cmp or Select).

Differential Revision: https://reviews.llvm.org/D93121

Added: 


Modified: 
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
mlir/lib/Dialect/Vector/VectorTransforms.cpp
mlir/test/Dialect/Vector/vector-transforms.mlir
mlir/test/lib/Transforms/TestVectorTransforms.cpp

Removed: 




diff  --git a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td 
b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
index 7af44f8435ff..ba78db68214f 100644
--- a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
+++ b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
@@ -69,7 +69,9 @@ class CastOp traits = []> :
 
 // Base class for arithmetic cast operations.
 class ArithmeticCastOp traits = []> :
-CastOp {
+CastOp])> 
{
 }
 
 // Base class for unary ops. Requires single operand and result. Individual
@@ -104,6 +106,7 @@ class ArithmeticOp traits = 
[]> :
 Op,
 ElementwiseMappable])> {
 
   let results = (outs AnyType:$result);
@@ -992,6 +995,7 @@ def CmpFPredicateAttr : I64EnumAttr<
 
 def CmpFOp : Std_Op<"cmpf",
 [NoSideEffect, SameTypeOperands, ElementwiseMappable,
+ DeclareOpInterfaceMethods,
  TypesMatchWith<
"result type has i1 element type and same shape as operands",
"lhs", "result", "getI1SameShape($_self)">]> {
@@ -1076,6 +1080,7 @@ def CmpIPredicateAttr : I64EnumAttr<
 
 def CmpIOp : Std_Op<"cmpi",
 [NoSideEffect, SameTypeOperands, ElementwiseMappable,
+ DeclareOpInterfaceMethods,
  TypesMatchWith<
"result type has i1 element type and same shape as operands",
"lhs", "result", "getI1SameShape($_self)">]> {
@@ -2548,7 +2553,7 @@ def RsqrtOp : FloatUnaryOp<"rsqrt"> {
 
 def SelectOp : Std_Op<"select", [NoSideEffect,
  AllTypesMatch<["true_value", "false_value", "result"]>,
- ElementwiseMappable]> {
+ ElementwiseMappable, DeclareOpInterfaceMethods]> 
{
   let summary = "select operation";
   let description = [{
 The `select` operation chooses one value based on a binary condition
@@ -2779,7 +2784,8 @@ def SignedShiftRightOp : 
IntArithmeticOp<"shift_right_signed"> {
 
//===--===//
 
 def SignExtendIOp : Std_Op<"sexti",
-[NoSideEffect, ElementwiseMappable]> {
+[NoSideEffect, ElementwiseMappable,
+DeclareOpInterfaceMethods]> {
   let summary = "integer sign extension operation";
   let description = [{
 The integer sign extension operation takes an integer input of
@@ -3595,7 +3601,9 @@ def TransposeOp : Std_Op<"transpose", [NoSideEffect]>,
 // TruncateIOp
 
//===--===//
 
-def TruncateIOp : Std_Op<"trunci", [NoSideEffect, ElementwiseMappable]> {
+def TruncateIOp : Std_Op<"trunci",
+  [NoSideEffect, ElementwiseMappable,
+   DeclareOpInterfaceMethods,]> {
   let summary = "integer truncation operation";
   let description = [{
 The integer truncation operation takes an integer input of
@@ -3862,7 +3870,9 @@ def XOrOp : IntArithmeticOp<"xor", [Commutative]> {
 // ZeroExtendIOp
 
//===--===//
 
-def ZeroExtendIOp : Std_Op<"zexti", [NoSideEffect, ElementwiseMappable]> {
+def ZeroExtendIOp : Std_Op<"zexti",
+  [NoSideEffect, ElementwiseMappable,
+   DeclareOpInterfaceMethods,]> {
   let summary = "integer zero extension operation";
   let description = [{
 The integer zero extension operation takes an integer input of

diff  --git a/mlir/lib/Dialect/Vector/VectorTransforms.cpp 
b/mlir/lib/Dialect/Vector/VectorTransforms.cpp
index 1e58a759d305..5ba82b39a5a6 100644
--- a/mlir/lib/Dialect/Vector/VectorTransforms.cpp
+++ b/mlir/lib/Dialect/Vector/VectorTransforms.cpp
@@ -492,8 +492,9 @@ static void getVectorElementwiseOpUnrollState(Operation *op,
   assert(resultType && "Expected op with vector result type");
   auto resultShape = resultType.getShape();
   // Verify that all operands have the same vector type as result.
-  assert(llvm::all_of(op->getOperandTypes(),
-  [=](Type type) { return type == resultType; }));
+  assert(llvm::all_of(op->getOperandTypes(), [=](Type type) {
+return type.cast().getShape() == resultShape;
+  }));
 
   // Create trivial elementwise identity index map based on 'resultShape'.
   DenseMap indexMap;
@@ -504

[llvm-branch-commits] [clang] ffba47d - Revert "[AMDGPU][HIP] Switch default DWARF version to 5"

[Scott Linder via llvm-branch-commits]

Author: Scott Linder
Date: 2020-12-21T21:43:51Z
New Revision: ffba47df76460905965df4b54cf6ba945d2eb1ce

URL: 
https://github.com/llvm/llvm-project/commit/ffba47df76460905965df4b54cf6ba945d2eb1ce
DIFF: 
https://github.com/llvm/llvm-project/commit/ffba47df76460905965df4b54cf6ba945d2eb1ce.diff

LOG: Revert "[AMDGPU][HIP] Switch default DWARF version to 5"

This reverts commit c4d10e7e9bb47b77fad43d8ddcfa328298f36c88.

Differential Revision: https://reviews.llvm.org/D93648

Added: 


Modified: 
clang/lib/Driver/ToolChains/AMDGPU.h
clang/lib/Driver/ToolChains/HIP.h
clang/test/Driver/amdgpu-toolchain.c
clang/test/Driver/hip-toolchain-dwarf.hip

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/AMDGPU.h 
b/clang/lib/Driver/ToolChains/AMDGPU.h
index f5448b76aee5..55ef6e01967e 100644
--- a/clang/lib/Driver/ToolChains/AMDGPU.h
+++ b/clang/lib/Driver/ToolChains/AMDGPU.h
@@ -60,7 +60,7 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUToolChain : public 
Generic_ELF {
 public:
   AMDGPUToolChain(const Driver &D, const llvm::Triple &Triple,
   const llvm::opt::ArgList &Args);
-  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  unsigned GetDefaultDwarfVersion() const override { return 4; }
   bool IsIntegratedAssemblerDefault() const override { return true; }
   bool IsMathErrnoDefault() const override { return false; }
 

diff  --git a/clang/lib/Driver/ToolChains/HIP.h 
b/clang/lib/Driver/ToolChains/HIP.h
index ff58c5451b0b..5e2be7138579 100644
--- a/clang/lib/Driver/ToolChains/HIP.h
+++ b/clang/lib/Driver/ToolChains/HIP.h
@@ -99,7 +99,7 @@ class LLVM_LIBRARY_VISIBILITY HIPToolChain final : public 
ROCMToolChain {
   computeMSVCVersion(const Driver *D,
  const llvm::opt::ArgList &Args) const override;
 
-  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  unsigned GetDefaultDwarfVersion() const override { return 4; }
 
   const ToolChain &HostTC;
 

diff  --git a/clang/test/Driver/amdgpu-toolchain.c 
b/clang/test/Driver/amdgpu-toolchain.c
index cb92744eee6a..ac558e0e26eb 100644
--- a/clang/test/Driver/amdgpu-toolchain.c
+++ b/clang/test/Driver/amdgpu-toolchain.c
@@ -8,7 +8,7 @@
 // AS_LINK: clang{{.*}} "-cc1as"
 // AS_LINK: ld.lld{{.*}} "-shared"
 
-// DWARF_VER: "-dwarf-version=5"
+// DWARF_VER: "-dwarf-version=4"
 
 // RUN: %clang -### -target amdgcn-amd-amdhsa -mcpu=gfx906 -nogpulib \
 // RUN:   -flto %s 2>&1 | FileCheck -check-prefix=LTO %s

diff  --git a/clang/test/Driver/hip-toolchain-dwarf.hip 
b/clang/test/Driver/hip-toolchain-dwarf.hip
index c853d5cf07cf..44d66fe52e04 100644
--- a/clang/test/Driver/hip-toolchain-dwarf.hip
+++ b/clang/test/Driver/hip-toolchain-dwarf.hip
@@ -6,4 +6,4 @@
 // RUN:   -x hip --cuda-gpu-arch=gfx803 %s \
 // RUN:   -Xarch_gfx803 -g 2>&1 | FileCheck %s -check-prefix=DWARF_VER
 
-// DWARF_VER: "-dwarf-version=5"
+// DWARF_VER: "-dwarf-version=4"



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[llvm-branch-commits] [llvm] 76f4f42 - [NewPM] Add TargetMachine method to add alias analyses

[Arthur Eubanks via llvm-branch-commits]

Author: Arthur Eubanks
Date: 2020-12-21T13:46:07-08:00
New Revision: 76f4f42ebaf9146da3603943bea7c52ca58ae692

URL: 
https://github.com/llvm/llvm-project/commit/76f4f42ebaf9146da3603943bea7c52ca58ae692
DIFF: 
https://github.com/llvm/llvm-project/commit/76f4f42ebaf9146da3603943bea7c52ca58ae692.diff

LOG: [NewPM] Add TargetMachine method to add alias analyses

AMDGPUTargetMachine::adjustPassManager() adds some alias analyses to the
legacy PM. We need a way to do the same for the new PM in order to port
AMDGPUTargetMachine::adjustPassManager() to the new PM.

Currently the new PM adds alias analyses by creating an AAManager via
PassBuilder and overriding the AAManager a PassManager uses via
FunctionAnalysisManager::registerPass().

We will continue to respect a custom AA pipeline that specifies an exact
AA pipeline to use, but for "default" we will now add alias analyses
that backends specify. Most uses of PassManager use the "default"
AAManager created by PassBuilder::buildDefaultAAPipeline(). Backends can
override the newly added TargetMachine::registerAliasAnalyses() to add custom
alias analyses.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D93261

Added: 


Modified: 
llvm/include/llvm/Passes/PassBuilder.h
llvm/include/llvm/Target/TargetMachine.h
llvm/lib/Passes/PassBuilder.cpp

Removed: 




diff  --git a/llvm/include/llvm/Passes/PassBuilder.h 
b/llvm/include/llvm/Passes/PassBuilder.h
index e2d22031dd5e..5a13df5b0c86 100644
--- a/llvm/include/llvm/Passes/PassBuilder.h
+++ b/llvm/include/llvm/Passes/PassBuilder.h
@@ -460,6 +460,9 @@ class PassBuilder {
 
   /// Build the default `AAManager` with the default alias analysis pipeline
   /// registered.
+  ///
+  /// This also adds target-specific alias analyses registered via
+  /// TargetMachine::registerAliasAnalyses().
   AAManager buildDefaultAAPipeline();
 
   /// Parse a textual pass pipeline description into a \c

diff  --git a/llvm/include/llvm/Target/TargetMachine.h 
b/llvm/include/llvm/Target/TargetMachine.h
index d4fc2d8f0887..55b35d9c0d07 100644
--- a/llvm/include/llvm/Target/TargetMachine.h
+++ b/llvm/include/llvm/Target/TargetMachine.h
@@ -23,6 +23,7 @@
 
 namespace llvm {
 
+class AAManager;
 class Function;
 class GlobalValue;
 class MachineModuleInfoWrapperPass;
@@ -322,6 +323,10 @@ class TargetMachine {
   virtual void registerPassBuilderCallbacks(PassBuilder &,
 bool DebugPassManager) {}
 
+  /// Allow the target to register alias analyses with the AAManager for use
+  /// with the new pass manager. Only affects the "default" AAManager.
+  virtual void registerAliasAnalyses(AAManager &) {}
+
   /// Add passes to the specified pass manager to get the specified file
   /// emitted.  Typically this will involve several steps of code generation.
   /// This method should return true if emission of this file type is not

diff  --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 4e8062c6a789..635e7bab1a7a 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -1882,6 +1882,10 @@ AAManager PassBuilder::buildDefaultAAPipeline() {
   // results from `GlobalsAA` through a readonly proxy.
   AA.registerModuleAnalysis();
 
+  // Add target-specific alias analyses.
+  if (TM)
+TM->registerAliasAnalyses(AA);
+
   return AA;
 }
 



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[llvm-branch-commits] [llvm] d33abc3 - Migrate MCContext::createTempSymbol call sites to AlwaysAddSuffix=true

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-21T14:04:13-08:00
New Revision: d33abc337c74d03d4e49b8d81a2dba7f23594a1a

URL: 
https://github.com/llvm/llvm-project/commit/d33abc337c74d03d4e49b8d81a2dba7f23594a1a
DIFF: 
https://github.com/llvm/llvm-project/commit/d33abc337c74d03d4e49b8d81a2dba7f23594a1a.diff

LOG: Migrate MCContext::createTempSymbol call sites to AlwaysAddSuffix=true

Most call sites set AlwaysAddSuffix to true. The two use cases do not really
need false and can be more consistent with other temporary symbol usage.

Added: 


Modified: 
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll
llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll
llvm/test/CodeGen/PowerPC/pcrel-linkeropt-option.ll
llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll
llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll
llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll
llvm/test/CodeGen/PowerPC/pcrel.ll

Removed: 




diff  --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp 
b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
index dd22e5dfe6e1..4ab2ff12d319 100644
--- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -1897,7 +1897,7 @@ void ARMAsmPrinter::emitInstruction(const MachineInstr 
*MI) {
 // LSJLJEH:
 Register SrcReg = MI->getOperand(0).getReg();
 Register ValReg = MI->getOperand(1).getReg();
-MCSymbol *Label = OutContext.createTempSymbol("SJLJEH", false, true);
+MCSymbol *Label = OutContext.createTempSymbol("SJLJEH", true, true);
 OutStreamer->AddComment("eh_setjmp begin");
 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tMOVr)
   .addReg(ValReg)

diff  --git a/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp 
b/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
index 1ae73bc8de43..a39489d353a2 100644
--- a/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
+++ b/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
@@ -339,7 +339,7 @@ static bool hasPCRelativeForm(MachineInstr &Use) {
 // Create the symbol.
 MCContext &Context = MF->getContext();
 MCSymbol *Symbol =
-Context.createTempSymbol(Twine("pcrel"), false, false);
+Context.createTempSymbol(Twine("pcrel"), true, false);
 MachineOperand PCRelLabel =
 MachineOperand::CreateMCSymbol(Symbol, PPCII::MO_PCREL_OPT_FLAG);
 Pair->DefInst->addOperand(*MF, PCRelLabel);

diff  --git a/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll 
b/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
index 04f63a302c34..12a8a76c85e6 100644
--- a/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
+++ b/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
@@ -105,8 +105,8 @@ define dso_local void @P10_Spill_CR_UN(%2* %arg, %1* %arg1, 
i32 %arg2) local_unn
 ; CHECK-NEXT:paddi r4, 0, global_4@PCREL, 1
 ; CHECK-NEXT:stw r3, 176(r1)
 ; CHECK-NEXT:pld r3, global_3@got@pcrel(0), 1
-; CHECK-NEXT:  .Lpcrel:
-; CHECK-NEXT:.reloc .Lpcrel-8,R_PPC64_PCREL_OPT,.-(.Lpcrel-8)
+; CHECK-NEXT:  .Lpcrel0:
+; CHECK-NEXT:.reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
 ; CHECK-NEXT:ld r12, 0(r3)
 ; CHECK-NEXT:mtctr r12
 ; CHECK-NEXT:bctrl

diff  --git a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll 
b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll
index 8fa86ef50ea5..1eb48991db70 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll
@@ -67,8 +67,8 @@ define dso_local signext i32 @DirectCallLocal2(i32 signext 
%a, i32 signext %b) l
 ; CHECK-S-NEXT:extsw r3, r3
 ; CHECK-S-NEXT:bl localCall@notoc
 ; CHECK-S-NEXT:pld r4, externGlobalVar@got@pcrel(0), 1
-; CHECK-S-NEXT: .Lpcrel:
-; CHECK-S-NEXT:.reloc .Lpcrel-8,R_PPC64_PCREL_OPT,.-(.Lpcrel-8)
+; CHECK-S-NEXT: .Lpcrel0:
+; CHECK-S-NEXT:.reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
 ; CHECK-S-NEXT:lwz r4, 0(r4)
 ; CHECK-S-NEXT:mullw r3, r4, r3
 ; CHECK-S-NEXT:extsw r3, r3
@@ -152,8 +152,8 @@ define dso_local signext i32 @DirectCallExtern2(i32 signext 
%a, i32 signext %b)
 ; CHECK-S-NEXT:extsw r3, r3
 ; CHECK-S-NEXT:bl externCall@notoc
 ; CHECK-S-NEXT:pld r4, externGlobalVar@got@pcrel(0), 1
-; CHECK-S-NEXT:  .Lpcrel0:
-; CHECK-S-NEXT:.reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8)
+; CHECK-S-NEXT:  .Lpcrel1:
+; CHECK-S-NEXT:.reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8)
 ; CHECK-S-NEXT:lwz r4, 0(r4)
 ; CHECK-S-NEXT:mullw r3, r4, r3
 ; CHECK-S-NEXT:extsw r3, r3
@@ -216,8 +216,8 @@ define dso_local signext i32 @TailCallLocal2(i32 signext 
%a) local_unnamed_addr
 ; CHECK-S: .localentry TailCallLocal2
 ; CHECK-S:   # %bb.0: # %entry
 ; CHECK-S: pld r4, externGlobalVar@got@pcrel(0), 1
-; CHECK-S-NEXT:

[llvm-branch-commits] [llvm] d9a0c40 - [MC] Split MCContext::createTempSymbol, default AlwaysAddSuffix to true, and add comments

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-21T14:04:13-08:00
New Revision: d9a0c40bce5f0b1325b89c36785d82fa146547aa

URL: 
https://github.com/llvm/llvm-project/commit/d9a0c40bce5f0b1325b89c36785d82fa146547aa
DIFF: 
https://github.com/llvm/llvm-project/commit/d9a0c40bce5f0b1325b89c36785d82fa146547aa.diff

LOG: [MC] Split MCContext::createTempSymbol, default AlwaysAddSuffix to true, 
and add comments

CanBeUnnamed is rarely false. Splitting to a createNamedTempSymbol makes the
intention clearer and matches the direction of reverted r240130 (to drop the
unneeded parameters).

No behavior change.

Added: 


Modified: 
llvm/include/llvm/MC/MCContext.h
llvm/lib/CodeGen/MachineModuleInfo.cpp
llvm/lib/MC/MCContext.cpp
llvm/lib/MC/MCDwarf.cpp
llvm/lib/MC/MCObjectStreamer.cpp
llvm/lib/MC/MCSection.cpp
llvm/lib/MC/MCStreamer.cpp
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

Removed: 




diff  --git a/llvm/include/llvm/MC/MCContext.h 
b/llvm/include/llvm/MC/MCContext.h
index 75e6dbe069e2..49ab0ce8d6fd 100644
--- a/llvm/include/llvm/MC/MCContext.h
+++ b/llvm/include/llvm/MC/MCContext.h
@@ -397,12 +397,16 @@ namespace llvm {
 /// unspecified name.
 MCSymbol *createLinkerPrivateTempSymbol();
 
-/// Create and return a new assembler temporary symbol with a unique but
-/// unspecified name.
-MCSymbol *createTempSymbol(bool CanBeUnnamed = true);
-
-MCSymbol *createTempSymbol(const Twine &Name, bool AlwaysAddSuffix,
-   bool CanBeUnnamed = true);
+/// Create a temporary symbol with a unique name. The name will be omitted
+/// in the symbol table if UseNamesOnTempLabels is false (default except
+/// MCAsmStreamer). The overload without Name uses an unspecified name.
+MCSymbol *createTempSymbol();
+MCSymbol *createTempSymbol(const Twine &Name, bool AlwaysAddSuffix = true);
+
+/// Create a temporary symbol with a unique name whose name cannot be
+/// omitted in the symbol table. This is rarely used.
+MCSymbol *createNamedTempSymbol();
+MCSymbol *createNamedTempSymbol(const Twine &Name);
 
 /// Create the definition of a directional local symbol for numbered label
 /// (used for "1:" definitions).

diff  --git a/llvm/lib/CodeGen/MachineModuleInfo.cpp 
b/llvm/lib/CodeGen/MachineModuleInfo.cpp
index f75acbb2494b..5c2e2fb16b69 100644
--- a/llvm/lib/CodeGen/MachineModuleInfo.cpp
+++ b/llvm/lib/CodeGen/MachineModuleInfo.cpp
@@ -104,7 +104,8 @@ ArrayRef 
MMIAddrLabelMap::getAddrLabelSymbolToEmit(BasicBlock *BB) {
   BBCallbacks.back().setMap(this);
   Entry.Index = BBCallbacks.size() - 1;
   Entry.Fn = BB->getParent();
-  MCSymbol *Sym = Context.createTempSymbol(!BB->hasAddressTaken());
+  MCSymbol *Sym = BB->hasAddressTaken() ? Context.createNamedTempSymbol()
+: Context.createTempSymbol();
   Entry.Symbols.push_back(Sym);
   return Entry.Symbols;
 }

diff  --git a/llvm/lib/MC/MCContext.cpp b/llvm/lib/MC/MCContext.cpp
index d054c93e37f4..9dab8a6c0910 100644
--- a/llvm/lib/MC/MCContext.cpp
+++ b/llvm/lib/MC/MCContext.cpp
@@ -232,11 +232,16 @@ MCSymbol *MCContext::createSymbol(StringRef Name, bool 
AlwaysAddSuffix,
   llvm_unreachable("Infinite loop");
 }
 
-MCSymbol *MCContext::createTempSymbol(const Twine &Name, bool AlwaysAddSuffix,
-  bool CanBeUnnamed) {
+MCSymbol *MCContext::createTempSymbol(const Twine &Name, bool AlwaysAddSuffix) 
{
   SmallString<128> NameSV;
   raw_svector_ostream(NameSV) << MAI->getPrivateGlobalPrefix() << Name;
-  return createSymbol(NameSV, AlwaysAddSuffix, CanBeUnnamed);
+  return createSymbol(NameSV, AlwaysAddSuffix, true);
+}
+
+MCSymbol *MCContext::createNamedTempSymbol(const Twine &Name) {
+  SmallString<128> NameSV;
+  raw_svector_ostream(NameSV) << MAI->getPrivateGlobalPrefix() << Name;
+  return createSymbol(NameSV, true, false);
 }
 
 MCSymbol *MCContext::createLinkerPrivateTempSymbol() {
@@ -245,8 +250,10 @@ MCSymbol *MCContext::createLinkerPrivateTempSymbol() {
   return createSymbol(NameSV, true, false);
 }
 
-MCSymbol *MCContext::createTempSymbol(bool CanBeUnnamed) {
-  return createTempSymbol("tmp", true, CanBeUnnamed);
+MCSymbol *MCContext::createTempSymbol() { return createTempSymbol("tmp"); }
+
+MCSymbol *MCContext::createNamedTempSymbol() {
+  return createNamedTempSymbol("tmp");
 }
 
 unsigned MCContext::NextInstance(unsigned LocalLabelVal) {
@@ -267,7 +274,7 @@ MCSymbol 
*MCContext::getOrCreateDirectionalLocalSymbol(unsigned LocalLabelVal,
unsigned Instance) {
   MCSymbol *&Sym = LocalSymbols[std::make_pair(LocalLabelVal, Instance)];
   if (!Sym)
-Sym = createTempSymbol(false);
+Sym = createNamedTempSymbol();
   return Sym;
 }
 

diff  --git a/llv

[llvm-branch-commits] [mlir] 9a8cab8 - [mlir][sparse] adjust output tensor to synthetic tensor

[Aart Bik via llvm-branch-commits]

Author: Aart Bik
Date: 2020-12-21T14:13:54-08:00
New Revision: 9a8cab8bacc12d48d74249d868082effe132029e

URL: 
https://github.com/llvm/llvm-project/commit/9a8cab8bacc12d48d74249d868082effe132029e
DIFF: 
https://github.com/llvm/llvm-project/commit/9a8cab8bacc12d48d74249d868082effe132029e.diff

LOG: [mlir][sparse] adjust output tensor to synthetic tensor

Fixes a merge conflict with previous two CLs.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D93664

Added: 


Modified: 
mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp

Removed: 




diff  --git a/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp 
b/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
index eb940d0f769b..a6b7277e47e3 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
@@ -466,8 +466,8 @@ static unsigned buildLattices(Merger &merger, 
linalg::GenericOp op,
 // set to the undefined index in that dimension. An invariant expression
 // is set to a synthetic tensor with undefined indices only.
 unsigned s = merger.addSet();
-unsigned t = kind == Kind::kTensor ? merger.exp(exp).e0
-   : op.getNumShapedOperands() - 1;
+unsigned t =
+kind == Kind::kTensor ? merger.exp(exp).e0 : op.getNumShapedOperands();
 merger.set(s).push_back(merger.addLat(t, idx, exp));
 return s;
   }



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[llvm-branch-commits] [llvm] 0935b0c - [NFC] Remove unused function

[Arthur Eubanks via llvm-branch-commits]

Author: Arthur Eubanks
Date: 2020-12-21T14:39:35-08:00
New Revision: 0935b0c8695dcc203918d417b27642cb95d1cb8f

URL: 
https://github.com/llvm/llvm-project/commit/0935b0c8695dcc203918d417b27642cb95d1cb8f
DIFF: 
https://github.com/llvm/llvm-project/commit/0935b0c8695dcc203918d417b27642cb95d1cb8f.diff

LOG: [NFC] Remove unused function

Added: 


Modified: 
llvm/include/llvm/Analysis/LazyCallGraph.h

Removed: 




diff  --git a/llvm/include/llvm/Analysis/LazyCallGraph.h 
b/llvm/include/llvm/Analysis/LazyCallGraph.h
index f356aec9e0a1..7478e1726366 100644
--- a/llvm/include/llvm/Analysis/LazyCallGraph.h
+++ b/llvm/include/llvm/Analysis/LazyCallGraph.h
@@ -258,7 +258,6 @@ class LazyCallGraph {
 iterator begin() { return iterator(Edges.begin(), Edges.end()); }
 iterator end() { return iterator(Edges.end(), Edges.end()); }
 
-Edge &operator[](int i) { return Edges[i]; }
 Edge &operator[](Node &N) {
   assert(EdgeIndexMap.find(&N) != EdgeIndexMap.end() && "No such edge!");
   auto &E = Edges[EdgeIndexMap.find(&N)->second];



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[llvm-branch-commits] [mlir] be96137 - [MLIR][SPIRVToLLVM] Updated documentation on spirv-cpu-runner

[George Mitenkov via llvm-branch-commits]

Author: George Mitenkov
Date: 2020-12-22T01:47:43+03:00
New Revision: be961374611a4be1b042cce7e6cc4cd12a1b4fd7

URL: 
https://github.com/llvm/llvm-project/commit/be961374611a4be1b042cce7e6cc4cd12a1b4fd7
DIFF: 
https://github.com/llvm/llvm-project/commit/be961374611a4be1b042cce7e6cc4cd12a1b4fd7.diff

LOG: [MLIR][SPIRVToLLVM] Updated documentation on spirv-cpu-runner

This patch adds documentation for the `mlir-spirv-cpu-runner`.
It provides an overview of applied transformations and passes, as
well as an example walk-through.

Some typos in the documentation have been fixed as well.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D93620

Added: 


Modified: 
mlir/docs/SPIRVToLLVMDialectConversion.md

Removed: 




diff  --git a/mlir/docs/SPIRVToLLVMDialectConversion.md 
b/mlir/docs/SPIRVToLLVMDialectConversion.md
index 3aa4d0fa43a1..bdae08c1e230 100644
--- a/mlir/docs/SPIRVToLLVMDialectConversion.md
+++ b/mlir/docs/SPIRVToLLVMDialectConversion.md
@@ -377,7 +377,7 @@ entry points in LLVM. At the moment, we use the following 
approach:
   entry point. For example, `LocalSize` provides information about the
   work-group size that can be reused.
 
-  In order to preserve this inforamtion, `spv.ExecutionMode` is converted to
+  In order to preserve this information, `spv.ExecutionMode` is converted to
   a struct global variable that stores the execution mode id and any variables
   associated with it. In C, the struct has the structure shown below.
 
@@ -816,7 +816,140 @@ to LLVM ops. At the moment, SPIR-V module attributes are 
ignored.
 
 ## `mlir-spirv-cpu-runner`
 
-**Note: this is a section in progress, more information will appear soon**
+`mlir-spirv-cpu-runner` allows to execute `gpu` dialect kernel on the CPU via
+SPIR-V to LLVM dialect conversion. Currently, only single-threaded kernel is
+supported.
+
+To build the runner, add the following option to `cmake`:
+```bash
+-DMLIR_SPIRV_CPU_RUNNER_ENABLED=1
+```
+
+### Pipeline
+
+The `gpu` module with the kernel and the host code undergo the following
+transformations:
+
+*   Convert the `gpu` module into SPIR-V dialect, lower ABI attributes and
+update version, capability and extension.
+
+*   Emulate the kernel call by converting the launching operation into a normal
+function call. The data from the host side to the device is passed via
+copying to global variables. These are created in both the host and the
+kernel code and later linked when nested modules are folded.
+
+*   Convert SPIR-V dialect kernel to LLVM dialect via the new conversion path.
+
+After these passes, the IR transforms into a nested LLVM module - a main module
+representing the host code and a kernel module. These modules are linked and
+executed using `ExecutionEngine`.
+
+### Walk-through
+
+This section gives a detailed overview of the IR changes while running
+`mlir-spirv-cpu-runner`. First, consider that we have the following IR. (For
+simplicity some type annotations and function implementations have been
+omitted).
+
+```mlir
+gpu.module @foo {
+  gpu.func @bar(%arg: memref<8xi32>) {
+// Kernel code.
+gpu.return
+  }
+}
+
+func @main() {
+  // Fill the buffer with some data
+  %buffer = alloc : memref<8xi32>
+  %data = ...
+  call fillBuffer(%buffer, %data)
+
+  "gpu.launch_func"(/*grid dimensions*/, %buffer) {
+kernel = @foo::bar
+  }
+}
+```
+
+Lowering `gpu` dialect to SPIR-V dialect results in
+
+```mlir
+spv.module @__spv__foo /*VCE triple and other metadata here*/ {
+  spv.globalVariable @__spv__foo_arg bind(0,0) : ...
+  spv.func @bar() {
+// Kernel code.
+  }
+  spv.EntryPoint @bar, ...
+}
+
+func @main() {
+  // Fill the buffer with some data.
+  %buffer = alloc : memref<8xi32>
+  %data = ...
+  call fillBuffer(%buffer, %data)
+
+  "gpu.launch_func"(/*grid dimensions*/, %buffer) {
+kernel = @foo::bar
+  }
+}
+```
+
+Then, the lowering from standard dialect to LLVM dialect is applied to the host
+code.
+
+```mlir
+spv.module @__spv__foo /*VCE triple and other metadata here*/ {
+  spv.globalVariable @__spv__foo_arg bind(0,0) : ...
+  spv.func @bar() {
+// Kernel code.
+  }
+  spv.EntryPoint @bar, ...
+}
+
+// Kernel function declaration.
+llvm.func @__spv__foo_bar() : ...
+
+llvm.func @main() {
+  // Fill the buffer with some data.
+  llvm.call fillBuffer(%buffer, %data)
+
+  // Copy data to the global variable, call kernel, and copy the data back.
+  %addr = llvm.mlir.addressof @__spv__foo_arg_descriptor_set0_binding0 : ...
+  "llvm.intr.memcpy"(%addr, %buffer) : ...
+  llvm.call @__spv__foo_bar()
+  "llvm.intr.memcpy"(%buffer, %addr) : ...
+
+  llvm.return
+}
+```
+
+Finally, SPIR-V module is converted to LLVM and the symbol names are resolved
+for the linkage.
+
+```mlir
+module @__spv__foo {
+  llvm.mlir.global @__spv__foo_arg_descriptor_set0_binding0 : ...
+  llvm.func @__spv__foo_bar() {
+// Kernel 

[llvm-branch-commits] [llvm] 4ad0cfd - llvm-profgen: Parse command line arguments after initializing targets

[Tom Stellard via llvm-branch-commits]

Author: Tom Stellard
Date: 2020-12-21T15:13:10-08:00
New Revision: 4ad0cfd4de414f9bedf48ec1034e663fe59efee4

URL: 
https://github.com/llvm/llvm-project/commit/4ad0cfd4de414f9bedf48ec1034e663fe59efee4
DIFF: 
https://github.com/llvm/llvm-project/commit/4ad0cfd4de414f9bedf48ec1034e663fe59efee4.diff

LOG: llvm-profgen: Parse command line arguments after initializing targets

I am experimenting with turning backends into loadable modules and in
that scenario, target specific command line arguments won't be available
until after the targets are initialized.

Also, most other tools initialize targets before parsing arguments.

Reviewed By: wlei

Differential Revision: https://reviews.llvm.org/D93348

Added: 


Modified: 
llvm/tools/llvm-profgen/llvm-profgen.cpp

Removed: 




diff  --git a/llvm/tools/llvm-profgen/llvm-profgen.cpp 
b/llvm/tools/llvm-profgen/llvm-profgen.cpp
index 665ee7c791a7..0f4d8f015439 100644
--- a/llvm/tools/llvm-profgen/llvm-profgen.cpp
+++ b/llvm/tools/llvm-profgen/llvm-profgen.cpp
@@ -35,13 +35,13 @@ using namespace sampleprof;
 int main(int argc, const char *argv[]) {
   InitLLVM X(argc, argv);
 
-  cl::ParseCommandLineOptions(argc, argv, "llvm SPGO profile generator\n");
-
   // Initialize targets and assembly printers/parsers.
   InitializeAllTargetInfos();
   InitializeAllTargetMCs();
   InitializeAllDisassemblers();
 
+  cl::ParseCommandLineOptions(argc, argv, "llvm SPGO profile generator\n");
+
   // Load binaries and parse perf events and samples
   PerfReader Reader(BinaryFilenames);
   Reader.parsePerfTraces(PerfTraceFilenames);



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[llvm-branch-commits] [llvm] 7f40bb3 - HowToReleaseLLVM: Update document to match the current release process

[Tom Stellard via llvm-branch-commits]

Author: Tom Stellard
Date: 2020-12-21T15:16:11-08:00
New Revision: 7f40bb3b044fa673772f4d68351f7bd7c38294d4

URL: 
https://github.com/llvm/llvm-project/commit/7f40bb3b044fa673772f4d68351f7bd7c38294d4
DIFF: 
https://github.com/llvm/llvm-project/commit/7f40bb3b044fa673772f4d68351f7bd7c38294d4.diff

LOG: HowToReleaseLLVM: Update document to match the current release process

Change Summary:

* Clarify that release manager can commit without code owner approval
  (but are still highly encouraged to get approval).

* Clarify that there is no official release criteria.

* Document what types of changes are allowed in each release phase.

This is update is based on the RFC submitted here:
http://lists.llvm.org/pipermail/llvm-dev/2020-May/141730.html

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D93493

Added: 


Modified: 
llvm/docs/HowToReleaseLLVM.rst

Removed: 




diff  --git a/llvm/docs/HowToReleaseLLVM.rst b/llvm/docs/HowToReleaseLLVM.rst
index b0308a184194..2fce4777175e 100644
--- a/llvm/docs/HowToReleaseLLVM.rst
+++ b/llvm/docs/HowToReleaseLLVM.rst
@@ -50,9 +50,16 @@ The release process is roughly as follows:
 
 * Finally, release!
 
-The release process will be accelerated for dot releases.  If the first round
-of testing finds no critical bugs and no regressions since the last major 
release,
-then additional rounds of testing will not be required.
+* Announce bug fix release schedule to the LLVM community and update the 
website.
+
+* Tag bug fix -rc1 after 4 weeks have passed.
+
+* Tag bug fix -rc2 4 weeks after -rc1.
+
+* Tag additional -rc candidates, if needed, to fix critical issues in
+  previous -rc releases.
+
+* Tag final release.
 
 Release Process
 ===
@@ -119,7 +126,7 @@ Tag release candidates:
 
   $ git tag -a llvmorg-X.Y.Z-rcN
 
-The Release Manager may supply pre-packaged source tarballs for users.  This 
can
+The Release Manager must supply pre-packaged source tarballs for users.  This 
can
 be done with the export.sh script in utils/release.
 
 Tarballs, release binaries,  or any other release artifacts must be uploaded to
@@ -153,23 +160,16 @@ The minimum required version of the tools you'll need are 
:doc:`here https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] 6bbb04a - [Driver] Default Generic_GCC ppc/ppc64/ppc64le to -fasynchronous-unwind-tables

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-21T15:32:35-08:00
New Revision: 6bbb04a732cdf203282f93b95d5a89cfc6fed8f4

URL: 
https://github.com/llvm/llvm-project/commit/6bbb04a732cdf203282f93b95d5a89cfc6fed8f4
DIFF: 
https://github.com/llvm/llvm-project/commit/6bbb04a732cdf203282f93b95d5a89cfc6fed8f4.diff

LOG: [Driver] Default Generic_GCC ppc/ppc64/ppc64le to 
-fasynchronous-unwind-tables

GCC made the switch on 2018-04-10 ("rs6000: Enable -fasynchronous-unwind-tables 
by default").
In Clang, FreeBSD/NetBSD powerpc have already defaulted to 
-fasynchronous-unwind-tables.

This patch defaults Generic_GCC powerpc (which affects Linux) to use 
-fasynchronous-unwind-tables.

Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D92054

Added: 


Modified: 
clang/docs/ReleaseNotes.rst
clang/lib/Driver/ToolChains/Gnu.cpp
clang/test/Driver/ppc-features.cpp

Removed: 




diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index a3038aa03cde..dd4de2d2015f 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -118,6 +118,10 @@ Modified Compiler Flags
   `-fno-delete-null-pointer-checks` has gained the power to remove the
   `nonnull` attribute on `this` for configurations that need it to be nullable.
 - ``-gsplit-dwarf`` no longer implies ``-g2``.
+- ``-fasynchronous-unwind-tables`` is now the default on Linux AArch64/PowerPC.
+  This behavior matches newer GCC.
+  (`D91760 `_)
+  (`D92054 `_)
 
 Removed Compiler Flags
 -

diff  --git a/clang/lib/Driver/ToolChains/Gnu.cpp 
b/clang/lib/Driver/ToolChains/Gnu.cpp
index 08158ba4bae8..9da6d8e35594 100644
--- a/clang/lib/Driver/ToolChains/Gnu.cpp
+++ b/clang/lib/Driver/ToolChains/Gnu.cpp
@@ -2674,6 +2674,9 @@ void Generic_GCC::printVerboseInfo(raw_ostream &OS) const 
{
 bool Generic_GCC::IsUnwindTablesDefault(const ArgList &Args) const {
   switch (getArch()) {
   case llvm::Triple::aarch64:
+  case llvm::Triple::ppc:
+  case llvm::Triple::ppc64:
+  case llvm::Triple::ppc64le:
   case llvm::Triple::x86_64:
 return true;
   default:

diff  --git a/clang/test/Driver/ppc-features.cpp 
b/clang/test/Driver/ppc-features.cpp
index 91ec459ce181..fceda63f5a23 100644
--- a/clang/test/Driver/ppc-features.cpp
+++ b/clang/test/Driver/ppc-features.cpp
@@ -1,6 +1,7 @@
 /// Check default CC1 and linker options for ppc32.
 // RUN: %clang -### -target powerpc-unknown-linux-gnu %s 2>&1 | FileCheck 
--check-prefix=PPC32 %s
-// PPC32: "-mfloat-abi" "hard"
+// PPC32:  "-munwind-tables"
+// PPC32-SAME: "-mfloat-abi" "hard"
 
 // PPC32: "-m" "elf32ppclinux"
 
@@ -38,11 +39,12 @@
 
 
 /// Check default CC1 and linker options for ppc64.
-// RUN: %clang -### -target powerpc64le-unknown-linux-gnu %s 2>&1 | FileCheck 
--check-prefix=PPC64 %s
-// RUN: %clang -### -target powerpc64-unknown-linux-gnu %s 2>&1 | FileCheck 
-check-prefix=PPC64BE %s
-// PPC64: "-mfloat-abi" "hard"
+// RUN: %clang -### -target powerpc64le-unknown-linux-gnu %s 2>&1 | FileCheck 
--check-prefixes=PPC64,PPC64LE %s
+// RUN: %clang -### -target powerpc64-unknown-linux-gnu %s 2>&1 | FileCheck 
--check-prefixes=PPC64,PPC64BE %s
+// PPC64:  "-munwind-tables"
+// PPC64-SAME: "-mfloat-abi" "hard"
 
-// PPC64: "-m" "elf64lppc"
+// PPC64LE: "-m" "elf64lppc"
 // PPC64BE: "-m" "elf64ppc"
 
 // check -msoft-float option for ppc64



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[llvm-branch-commits] [llvm] c60a58f - [InstCombine] Add check of i1 types in select-to-zext/sext transformation

[via llvm-branch-commits]

Author: Congzhe Cao
Date: 2020-12-21T18:46:24-05:00
New Revision: c60a58f8d4354ca1a6915045774bf98cfada8ef4

URL: 
https://github.com/llvm/llvm-project/commit/c60a58f8d4354ca1a6915045774bf98cfada8ef4
DIFF: 
https://github.com/llvm/llvm-project/commit/c60a58f8d4354ca1a6915045774bf98cfada8ef4.diff

LOG: [InstCombine] Add check of i1 types in select-to-zext/sext transformation

When doing select-to-zext/sext transformations, we should
not handle TrueVal and FalseVal of i1 type otherwise it
would result in zext/sext i1 to i1.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D93272

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index e05fa4ffa403..fe21f300a417 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -2606,7 +2606,10 @@ Instruction 
*InstCombinerImpl::visitSelectInst(SelectInst &SI) {
   // select i1 %c, <2 x i8> <1, 1>, <2 x i8> <0, 0>
   // because that may need 3 instructions to splat the condition value:
   // extend, insertelement, shufflevector.
-  if (SelType->isIntOrIntVectorTy() &&
+  //
+  // Do not handle i1 TrueVal and FalseVal otherwise would result in
+  // zext/sext i1 to i1.
+  if (SelType->isIntOrIntVectorTy() && !SelType->isIntOrIntVectorTy(1) &&
   CondVal->getType()->isVectorTy() == SelType->isVectorTy()) {
 // select C, 1, 0 -> zext C to int
 if (match(TrueVal, m_One()) && match(FalseVal, m_Zero()))



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[llvm-branch-commits] [mlir] 83274a0 - [mlir] Add SmallVector sizes

[Tres Popp via llvm-branch-commits]

Author: Tres Popp
Date: 2020-12-22T00:48:41+01:00
New Revision: 83274a0773f6a20abdc848b448009e0195c42166

URL: 
https://github.com/llvm/llvm-project/commit/83274a0773f6a20abdc848b448009e0195c42166
DIFF: 
https://github.com/llvm/llvm-project/commit/83274a0773f6a20abdc848b448009e0195c42166.diff

LOG: [mlir] Add SmallVector sizes

This is a temporary fix until figuring out how to correct the forward
declare in mlir/include/mlir/Support/LLVM.h

Differential Revision: https://reviews.llvm.org/D93666

Added: 


Modified: 
mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp

Removed: 




diff  --git a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp 
b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
index 7b1300da1783..09c662c74477 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
@@ -198,8 +198,8 @@ void SwitchOp::build(OpBuilder &builder, OperationState 
&result, Value value,
  ArrayRef caseValues, BlockRange caseDestinations,
  ArrayRef caseOperands,
  ArrayRef branchWeights) {
-  SmallVector flattenedCaseOperands;
-  SmallVector caseOperandOffsets;
+  SmallVector flattenedCaseOperands;
+  SmallVector caseOperandOffsets;
   int32_t offset = 0;
   for (ValueRange operands : caseOperands) {
 flattenedCaseOperands.append(operands.begin(), operands.end());
@@ -230,8 +230,8 @@ parseSwitchOpCases(OpAsmParser &parser, ElementsAttr 
&caseValues,
SmallVectorImpl &caseOperands,
SmallVectorImpl &caseOperandTypes,
ElementsAttr &caseOperandOffsets) {
-  SmallVector values;
-  SmallVector offsets;
+  SmallVector values;
+  SmallVector offsets;
   int32_t value, offset = 0;
   do {
 OptionalParseResult integerParseResult = 
parser.parseOptionalInteger(value);
@@ -243,7 +243,7 @@ parseSwitchOpCases(OpAsmParser &parser, ElementsAttr 
&caseValues,
 values.push_back(value);
 
 Block *destination;
-SmallVector operands;
+SmallVector operands;
 if (parser.parseColon() || parser.parseSuccessor(destination))
   return failure();
 if (!parser.parseOptionalLParen()) {



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[llvm-branch-commits] [llvm] e18734f - [RISCV] Use more precise type constraints for the vmv.v.v and vmv.v.x intrinsics.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2020-12-21T16:27:09-08:00
New Revision: e18734f87a6eb8d2fbd2d9c6690b99b057953935

URL: 
https://github.com/llvm/llvm-project/commit/e18734f87a6eb8d2fbd2d9c6690b99b057953935
DIFF: 
https://github.com/llvm/llvm-project/commit/e18734f87a6eb8d2fbd2d9c6690b99b057953935.diff

LOG: [RISCV] Use more precise type constraints for the vmv.v.v and vmv.v.x 
intrinsics.

We can infer the input type from the result type. For vmv.v.v its
the same. For vmv.v.x its the element type.

Added: 


Modified: 
llvm/include/llvm/IR/IntrinsicsRISCV.td

Removed: 




diff  --git a/llvm/include/llvm/IR/IntrinsicsRISCV.td 
b/llvm/include/llvm/IR/IntrinsicsRISCV.td
index f65f8e6ab779..560f16afcc52 100644
--- a/llvm/include/llvm/IR/IntrinsicsRISCV.td
+++ b/llvm/include/llvm/IR/IntrinsicsRISCV.td
@@ -294,14 +294,6 @@ let TargetPrefix = "riscv" in {
 let ExtendOperand = 3;
   }
 
-  // For vmv.v.v, vmv.v.x, vmv.v.i
-  // Input: (vector_in/scalar_in, vl)
-  class RISCVUnary : Intrinsic<[llvm_anyvector_ty],
-   [llvm_any_ty, llvm_anyint_ty],
-   [IntrNoMem] >, RISCVVIntrinsic {
-let ExtendOperand = 1;
-  }
-
   class RISCVTernaryAAAXNoMask
 : Intrinsic<[llvm_anyvector_ty],
 [LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyint_ty,
@@ -440,8 +432,14 @@ let TargetPrefix = "riscv" in {
   defm vssubu : RISCVSaturatingBinaryAAX;
   defm vssub : RISCVSaturatingBinaryAAX;
 
-  def int_riscv_vmv_v_v : RISCVUnary;
-  def int_riscv_vmv_v_x : RISCVUnary;
+  def int_riscv_vmv_v_v : Intrinsic<[llvm_anyvector_ty],
+[LLVMMatchType<0>, llvm_anyint_ty],
+[IntrNoMem]>, RISCVVIntrinsic;
+  def int_riscv_vmv_v_x : Intrinsic<[llvm_anyint_ty],
+[LLVMVectorElementType<0>, llvm_anyint_ty],
+[IntrNoMem]>, RISCVVIntrinsic {
+let ExtendOperand = 1;
+  }
 
   def int_riscv_vmv_x_s : Intrinsic<[LLVMVectorElementType<0>],
 [llvm_anyint_ty],



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[llvm-branch-commits] [llvm] 704981b - [RISCV] Update vmv.v.v-rv32.ll and vmv.v.v-rv64.ll to test the correct intrinsics.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2020-12-21T16:27:09-08:00
New Revision: 704981b43736b2b9788cff0cf493d8b77ce380f5

URL: 
https://github.com/llvm/llvm-project/commit/704981b43736b2b9788cff0cf493d8b77ce380f5
DIFF: 
https://github.com/llvm/llvm-project/commit/704981b43736b2b9788cff0cf493d8b77ce380f5.diff

LOG: [RISCV] Update vmv.v.v-rv32.ll and vmv.v.v-rv64.ll to test the correct 
intrinsics.

These were accidentally identical to the vmv.v.x tests. I must
have fumbled when I copied them from our downstream repo.

Added: 


Modified: 
llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll

Removed: 




diff  --git a/llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll 
b/llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll
index d22ac605a20b..2fff963c5d19 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll
@@ -1,505 +1,593 @@
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -verify-machineinstrs \
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-v,+d,+experimental-zfh 
-verify-machineinstrs \
 ; RUN:   --riscv-no-aliases < %s | FileCheck %s
-declare  @llvm.riscv.vmv.v.x.nxv1i8.i8(
-  i8,
+declare  @llvm.riscv.vmv.v.v.nxv1i8(
+  ,
   i32);
 
-define  @intrinsic_vmv.v.x_x_nxv1i8_i8(i8 %0, i32 %1) 
nounwind {
+define  @intrinsic_vmv.v.v_v_nxv1i8_nxv1i8( 
%0, i32 %1) nounwind {
 entry:
-; CHECK-LABEL: intrinsic_vmv.v.x_x_nxv1i8_i8
-; CHECK:   vsetvli {{.*}}, a1, e8,mf8
-; CHECK:   vmv.v.x {{v[0-9]+}}, a0
-  %a = call  @llvm.riscv.vmv.v.x.nxv1i8.i8(
-i8 %0,
+; CHECK-LABEL: intrinsic_vmv.v.v_v_nxv1i8_nxv1i8
+; CHECK:   vsetvli {{.*}}, a0, e8,mf8
+; CHECK:   vmv.v.v {{v[0-9]+}}, {{v[0-9]+}}
+  %a = call  @llvm.riscv.vmv.v.v.nxv1i8(
+ %0,
 i32 %1)
 
   ret  %a
 }
 
-declare  @llvm.riscv.vmv.v.x.nxv2i8.i8(
-  i8,
+declare  @llvm.riscv.vmv.v.v.nxv2i8(
+  ,
   i32);
 
-define  @intrinsic_vmv.v.x_x_nxv2i8_i8(i8 %0, i32 %1) 
nounwind {
+define  @intrinsic_vmv.v.v_v_nxv2i8_nxv2i8( 
%0, i32 %1) nounwind {
 entry:
-; CHECK-LABEL: intrinsic_vmv.v.x_x_nxv2i8_i8
-; CHECK:   vsetvli {{.*}}, a1, e8,mf4
-; CHECK:   vmv.v.x {{v[0-9]+}}, a0
-  %a = call  @llvm.riscv.vmv.v.x.nxv2i8.i8(
-i8 %0,
+; CHECK-LABEL: intrinsic_vmv.v.v_v_nxv2i8_nxv2i8
+; CHECK:   vsetvli {{.*}}, a0, e8,mf4
+; CHECK:   vmv.v.v {{v[0-9]+}}, {{v[0-9]+}}
+  %a = call  @llvm.riscv.vmv.v.v.nxv2i8(
+ %0,
 i32 %1)
 
   ret  %a
 }
 
-declare  @llvm.riscv.vmv.v.x.nxv4i8.i8(
-  i8,
+declare  @llvm.riscv.vmv.v.v.nxv4i8(
+  ,
   i32);
 
-define  @intrinsic_vmv.v.x_x_nxv4i8_i8(i8 %0, i32 %1) 
nounwind {
+define  @intrinsic_vmv.v.v_v_nxv4i8_nxv4i8( 
%0, i32 %1) nounwind {
 entry:
-; CHECK-LABEL: intrinsic_vmv.v.x_x_nxv4i8_i8
-; CHECK:   vsetvli {{.*}}, a1, e8,mf2
-; CHECK:   vmv.v.x {{v[0-9]+}}, a0
-  %a = call  @llvm.riscv.vmv.v.x.nxv4i8.i8(
-i8 %0,
+; CHECK-LABEL: intrinsic_vmv.v.v_v_nxv4i8_nxv4i8
+; CHECK:   vsetvli {{.*}}, a0, e8,mf2
+; CHECK:   vmv.v.v {{v[0-9]+}}, {{v[0-9]+}}
+  %a = call  @llvm.riscv.vmv.v.v.nxv4i8(
+ %0,
 i32 %1)
 
   ret  %a
 }
 
-declare  @llvm.riscv.vmv.v.x.nxv8i8.i8(
-  i8,
+declare  @llvm.riscv.vmv.v.v.nxv8i8(
+  ,
   i32);
 
-define  @intrinsic_vmv.v.x_x_nxv8i8_i8(i8 %0, i32 %1) 
nounwind {
+define  @intrinsic_vmv.v.v_v_nxv8i8_nxv8i8( 
%0, i32 %1) nounwind {
 entry:
-; CHECK-LABEL: intrinsic_vmv.v.x_x_nxv8i8_i8
-; CHECK:   vsetvli {{.*}}, a1, e8,m1
-; CHECK:   vmv.v.x {{v[0-9]+}}, a0
-  %a = call  @llvm.riscv.vmv.v.x.nxv8i8.i8(
-i8 %0,
+; CHECK-LABEL: intrinsic_vmv.v.v_v_nxv8i8_nxv8i8
+; CHECK:   vsetvli {{.*}}, a0, e8,m1
+; CHECK:   vmv.v.v {{v[0-9]+}}, {{v[0-9]+}}
+  %a = call  @llvm.riscv.vmv.v.v.nxv8i8(
+ %0,
 i32 %1)
 
   ret  %a
 }
 
-declare  @llvm.riscv.vmv.v.x.nxv16i8.i8(
-  i8,
+declare  @llvm.riscv.vmv.v.v.nxv16i8(
+  ,
   i32);
 
-define  @intrinsic_vmv.v.x_x_nxv16i8_i8(i8 %0, i32 %1) 
nounwind {
+define  @intrinsic_vmv.v.v_v_nxv16i8_nxv16i8( %0, i32 %1) nounwind {
 entry:
-; CHECK-LABEL: intrinsic_vmv.v.x_x_nxv16i8_i8
-; CHECK:   vsetvli {{.*}}, a1, e8,m2
-; CHECK:   vmv.v.x {{v[0-9]+}}, a0
-  %a = call  @llvm.riscv.vmv.v.x.nxv16i8.i8(
-i8 %0,
+; CHECK-LABEL: intrinsic_vmv.v.v_v_nxv16i8_nxv16i8
+; CHECK:   vsetvli {{.*}}, a0, e8,m2
+; CHECK:   vmv.v.v {{v[0-9]+}}, {{v[0-9]+}}
+  %a = call  @llvm.riscv.vmv.v.v.nxv16i8(
+ %0,
 i32 %1)
 
   ret  %a
 }
 
-declare  @llvm.riscv.vmv.v.x.nxv32i8.i8(
-  i8,
+declare  @llvm.riscv.vmv.v.v.nxv32i8(
+  ,
   i32);
 
-define  @intrinsic_vmv.v.x_x_nxv32i8_i8(i8 %0, i32 %1) 
nounwind {
+define  @intrinsic_vmv.v.v_v_nxv32i8_nxv32i8( %0, i32 %1) nounwind {
 entry:
-; CHECK-LABEL: intrinsic_vmv.v.x_x_nxv32i8_i8
-; CHECK:   vsetvli {{.*}}, a1, e8,m4
-; CHECK:   vmv.v.x {{v[0-9]+}}, a0
-  %a = call  @llvm.riscv.vmv.v.x.nxv32i8.i8(
-i8 %0,
+; CHECK-LABEL: intrinsic_vmv.v.v_v_nxv32i8_nxv32i8
+

[llvm-branch-commits] [llvm] d7a6f3a - [LoopNest] Extend `LPMUpdater` and adaptor to handle loop-nest passes

[Ta-Wei Tu via llvm-branch-commits]

Author: Ta-Wei Tu
Date: 2020-12-22T08:47:38+08:00
New Revision: d7a6f3a1056a5f5212fa561a909fcfa502126074

URL: 
https://github.com/llvm/llvm-project/commit/d7a6f3a1056a5f5212fa561a909fcfa502126074
DIFF: 
https://github.com/llvm/llvm-project/commit/d7a6f3a1056a5f5212fa561a909fcfa502126074.diff

LOG: [LoopNest] Extend `LPMUpdater` and adaptor to handle loop-nest passes

This is a follow-up patch of D87045.

The patch implements "loop-nest mode" for `LPMUpdater` and 
`FunctionToLoopPassAdaptor` in which only top-level loops are operated.

`createFunctionToLoopPassAdaptor` decides whether the returned adaptor is in 
loop-nest mode or not based on the given pass. If the pass is a loop-nest pass 
or the pass is a `LoopPassManager` which contains only loop-nest passes, the 
loop-nest version of adaptor is returned; otherwise, the normal (loop) version 
of adaptor is returned.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D87531

Added: 


Modified: 
llvm/include/llvm/Transforms/Scalar/LoopPassManager.h
llvm/lib/Transforms/Scalar/LoopPassManager.cpp
llvm/unittests/Transforms/Scalar/LoopPassManagerTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/Transforms/Scalar/LoopPassManager.h 
b/llvm/include/llvm/Transforms/Scalar/LoopPassManager.h
index a0bef89b36cf..2a342fcda3c2 100644
--- a/llvm/include/llvm/Transforms/Scalar/LoopPassManager.h
+++ b/llvm/include/llvm/Transforms/Scalar/LoopPassManager.h
@@ -53,6 +53,16 @@ namespace llvm {
 // Forward declarations of an update tracking API used in the pass manager.
 class LPMUpdater;
 
+namespace {
+
+template 
+using HasRunOnLoopT = decltype(std::declval().run(
+std::declval(), std::declval(),
+std::declval(),
+std::declval()));
+
+} // namespace
+
 // Explicit specialization and instantiation declarations for the pass manager.
 // See the comments on the definition of the specialization for details on how
 // it 
diff ers from the primary template.
@@ -62,13 +72,6 @@ class PassManager> {
-private:
-  template 
-  using HasRunOnLoopT = decltype(std::declval().run(
-  std::declval(), std::declval(),
-  std::declval(),
-  std::declval()));
-
 public:
   /// Construct a pass manager.
   ///
@@ -154,6 +157,9 @@ class PassManagercontains(&L)) &&
"Cannot delete a loop outside of the "
@@ -263,6 +278,8 @@ class LPMUpdater {
   /// loops within them will be visited in postorder as usual for the loop pass
   /// manager.
   void addChildLoops(ArrayRef NewChildLoops) {
+assert(!LoopNestMode &&
+   "Child loops should not be pushed in loop-nest mode.");
 // Insert ourselves back into the worklist first, as this loop should be
 // revisited after all the children have been processed.
 Worklist.insert(CurrentL);
@@ -294,7 +311,10 @@ class LPMUpdater {
  "All of the new loops must be siblings of the current loop!");
 #endif
 
-appendLoopsToWorklist(NewSibLoops, Worklist);
+if (LoopNestMode)
+  Worklist.insert(NewSibLoops);
+else
+  appendLoopsToWorklist(NewSibLoops, Worklist);
 
 // No need to skip the current loop or revisit it, as sibling loops
 // shouldn't impact anything.
@@ -324,6 +344,7 @@ class LPMUpdater {
 
   Loop *CurrentL;
   bool SkipCurrentLoop;
+  const bool LoopNestMode;
 
 #ifndef NDEBUG
   // In debug builds we also track the parent loop to implement asserts even in
@@ -332,8 +353,8 @@ class LPMUpdater {
 #endif
 
   LPMUpdater(SmallPriorityWorklist &Worklist,
- LoopAnalysisManager &LAM)
-  : Worklist(Worklist), LAM(LAM) {}
+ LoopAnalysisManager &LAM, bool LoopNestMode = false)
+  : Worklist(Worklist), LAM(LAM), LoopNestMode(LoopNestMode) {}
 };
 
 template 
@@ -366,6 +387,15 @@ Optional LoopPassManager::runSinglePass(
 /// FunctionAnalysisManager it will run the \c LoopAnalysisManagerFunctionProxy
 /// analysis prior to running the loop passes over the function to enable a \c
 /// LoopAnalysisManager to be used within this run safely.
+///
+/// The adaptor comes with two modes: the loop mode and the loop-nest mode, and
+/// the worklist updater lived inside will be in the same mode as the adaptor
+/// (refer to the documentation of \c LPMUpdater for more detailed 
explanation).
+/// Specifically, in loop mode, all loops in the funciton will be pushed into
+/// the worklist and processed by \p Pass, while only top-level loops are
+/// processed in loop-nest mode. Please refer to the various specializations of
+/// \fn createLoopFunctionToLoopPassAdaptor to see when loop mode and loop-nest
+/// mode are used.
 class FunctionToLoopPassAdaptor
 : public PassInfoMixin {
 public:
@@ -376,10 +406,12 @@ class FunctionToLoopPassAdaptor
   explicit FunctionToLoopPassAdaptor(std::unique_ptr Pass,
  bool UseMemorySSA = false,
  bool UseBlockFrequ

[llvm-branch-commits] [llvm] 8c85aae - [MC][test] Reorganize .cfi_* tests

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-21T17:18:28-08:00
New Revision: 8c85aae6c5b282eee1f58e67334e809016f04776

URL: 
https://github.com/llvm/llvm-project/commit/8c85aae6c5b282eee1f58e67334e809016f04776
DIFF: 
https://github.com/llvm/llvm-project/commit/8c85aae6c5b282eee1f58e67334e809016f04776.diff

LOG: [MC][test] Reorganize .cfi_* tests

Delete tests which are covered by others.

Added: 
llvm/test/MC/ELF/cfi-fde-encoding.s
llvm/test/MC/ELF/cfi-return-column.s
llvm/test/MC/ELF/cfi-scope-errors.s
llvm/test/MC/ELF/cfi-scope-errors2.s
llvm/test/MC/ELF/expand-var.s
llvm/test/MC/X86/cfi_offset-eip.s
llvm/test/MC/X86/compact-unwind-cfi_def_cfa.s

Modified: 


Removed: 
llvm/test/MC/ELF/fde.s
llvm/test/MC/X86/cfi-open-within-another-crash.s
llvm/test/MC/X86/cfi-scope-errors.s
llvm/test/MC/X86/cfi_def_cfa-crash.s
llvm/test/MC/X86/expand-var.s
llvm/test/MC/X86/fde-reloc.s
llvm/test/MC/X86/pr38826.s
llvm/test/MC/X86/return-column.s



diff  --git a/llvm/test/MC/ELF/fde.s b/llvm/test/MC/ELF/cfi-fde-encoding.s
similarity index 100%
rename from llvm/test/MC/ELF/fde.s
rename to llvm/test/MC/ELF/cfi-fde-encoding.s

diff  --git a/llvm/test/MC/X86/return-column.s 
b/llvm/test/MC/ELF/cfi-return-column.s
similarity index 100%
rename from llvm/test/MC/X86/return-column.s
rename to llvm/test/MC/ELF/cfi-return-column.s

diff  --git a/llvm/test/MC/X86/cfi-scope-errors.s 
b/llvm/test/MC/ELF/cfi-scope-errors.s
similarity index 100%
rename from llvm/test/MC/X86/cfi-scope-errors.s
rename to llvm/test/MC/ELF/cfi-scope-errors.s

diff  --git a/llvm/test/MC/X86/cfi-open-within-another-crash.s 
b/llvm/test/MC/ELF/cfi-scope-errors2.s
similarity index 87%
rename from llvm/test/MC/X86/cfi-open-within-another-crash.s
rename to llvm/test/MC/ELF/cfi-scope-errors2.s
index 6ec5338f54b4..d29c05636d0d 100644
--- a/llvm/test/MC/X86/cfi-open-within-another-crash.s
+++ b/llvm/test/MC/ELF/cfi-scope-errors2.s
@@ -4,15 +4,10 @@
 # RUN: not llvm-mc %s -filetype=obj -triple=x86_64-unknown-linux -o /dev/null 
2>&1 | FileCheck %s
 
 .text
-.globl proc_one
-proc_one:
  .cfi_startproc
- 
+
 .text
-.globl proc_two
-proc_two:
  .cfi_startproc
 # CHECK: [[#@LINE]]:1: error: starting new .cfi frame before finishing the 
previous one
 
  .cfi_endproc
-

diff  --git a/llvm/test/MC/X86/expand-var.s b/llvm/test/MC/ELF/expand-var.s
similarity index 100%
rename from llvm/test/MC/X86/expand-var.s
rename to llvm/test/MC/ELF/expand-var.s

diff  --git a/llvm/test/MC/X86/pr38826.s b/llvm/test/MC/X86/cfi_offset-eip.s
similarity index 100%
rename from llvm/test/MC/X86/pr38826.s
rename to llvm/test/MC/X86/cfi_offset-eip.s

diff  --git a/llvm/test/MC/X86/cfi_def_cfa-crash.s 
b/llvm/test/MC/X86/compact-unwind-cfi_def_cfa.s
similarity index 100%
rename from llvm/test/MC/X86/cfi_def_cfa-crash.s
rename to llvm/test/MC/X86/compact-unwind-cfi_def_cfa.s

diff  --git a/llvm/test/MC/X86/fde-reloc.s b/llvm/test/MC/X86/fde-reloc.s
deleted file mode 100644
index 63ac97662188..
--- a/llvm/test/MC/X86/fde-reloc.s
+++ /dev/null
@@ -1,11 +0,0 @@
-// RUN: llvm-mc -filetype=obj %s -o - -triple x86_64-pc-linux | llvm-objdump 
-r - | FileCheck --check-prefix=X86-64 %s
-// RUN: llvm-mc -filetype=obj %s -o - -triple i686-pc-linux | llvm-objdump -r 
- | FileCheck --check-prefix=I686 %s
-
-// PR15448
-
-func:
-   .cfi_startproc
-   .cfi_endproc
-
-// X86-64: R_X86_64_PC32
-// I686: R_386_PC32



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[llvm-branch-commits] [mlir] 6e2af4d - Revert "[mlir] Add SmallVector sizes"

[Tres Popp via llvm-branch-commits]

Author: Tres Popp
Date: 2020-12-22T02:33:14+01:00
New Revision: 6e2af4d6046995abf1003ebacfce95415010d574

URL: 
https://github.com/llvm/llvm-project/commit/6e2af4d6046995abf1003ebacfce95415010d574
DIFF: 
https://github.com/llvm/llvm-project/commit/6e2af4d6046995abf1003ebacfce95415010d574.diff

LOG: Revert "[mlir] Add SmallVector sizes"

This reverts commit 83274a0773f6a20abdc848b448009e0195c42166.

Fixed in a555ca8b3d67

Added: 


Modified: 
mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp

Removed: 




diff  --git a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp 
b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
index 09c662c74477..7b1300da1783 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
@@ -198,8 +198,8 @@ void SwitchOp::build(OpBuilder &builder, OperationState 
&result, Value value,
  ArrayRef caseValues, BlockRange caseDestinations,
  ArrayRef caseOperands,
  ArrayRef branchWeights) {
-  SmallVector flattenedCaseOperands;
-  SmallVector caseOperandOffsets;
+  SmallVector flattenedCaseOperands;
+  SmallVector caseOperandOffsets;
   int32_t offset = 0;
   for (ValueRange operands : caseOperands) {
 flattenedCaseOperands.append(operands.begin(), operands.end());
@@ -230,8 +230,8 @@ parseSwitchOpCases(OpAsmParser &parser, ElementsAttr 
&caseValues,
SmallVectorImpl &caseOperands,
SmallVectorImpl &caseOperandTypes,
ElementsAttr &caseOperandOffsets) {
-  SmallVector values;
-  SmallVector offsets;
+  SmallVector values;
+  SmallVector offsets;
   int32_t value, offset = 0;
   do {
 OptionalParseResult integerParseResult = 
parser.parseOptionalInteger(value);
@@ -243,7 +243,7 @@ parseSwitchOpCases(OpAsmParser &parser, ElementsAttr 
&caseValues,
 values.push_back(value);
 
 Block *destination;
-SmallVector operands;
+SmallVector operands;
 if (parser.parseColon() || parser.parseSuccessor(destination))
   return failure();
 if (!parser.parseOptionalLParen()) {



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[llvm-branch-commits] [lld] 13f439a - [lld/mac] Implement support for private extern symbols

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-21T21:23:33-05:00
New Revision: 13f439a1872b559d72ee2b5951395310ce4393cc

URL: 
https://github.com/llvm/llvm-project/commit/13f439a1872b559d72ee2b5951395310ce4393cc
DIFF: 
https://github.com/llvm/llvm-project/commit/13f439a1872b559d72ee2b5951395310ce4393cc.diff

LOG: [lld/mac] Implement support for private extern symbols

Private extern symbols are used for things scoped to the linkage unit.
They cause duplicate symbol errors (so they're in the symbol table,
unlike TU-scoped truly local symbols), but they don't make it into the
export trie. They are created e.g. by compiling with
-fvisibility=hidden.

If two weak symbols have differing privateness, the combined symbol is
non-private external. (Example: inline functions and some TUs that
include the header defining it were built with
-fvisibility-inlines-hidden and some weren't).

A weak private external symbol implicitly has its "weak" dropped and
behaves like a regular strong private external symbol: Weak is an export
trie concept, and private symbols are not in the export trie.

If a weak and a strong symbol have different privateness, the strong
symbol wins.

If two common symbols have differing privateness, the larger symbol
wins. If they have the same size, the privateness of the symbol seen
later during the link wins (!) -- this is a bit lame, but it matches
ld64 and this behavior takes 2 lines less to implement than the less
surprising "result is non-private external), so match ld64.
(Example: `int a` in two .c files, both built with -fcommon,
one built with -fvisibility=hidden and one without.)

This also makes `__dyld_private` a true TU-local symbol, matching ld64.
To make this work, make the `const char*` StringRefZ ctor to correctly
set `size` (without this, writing the string table crashed when calling
getName() on the __dyld_private symbol).

Mention in CommonSymbol's comment that common symbols are now disabled
by default in clang.

Mention in -keep_private_externs's HelpText that the flag only has an
effect with `-r` (which we don't implement yet -- so this patch here
doesn't regress any behavior around -r + -keep_private_externs)). ld64
doesn't explicitly document it, but the commit text of
http://reviews.llvm.org/rL216146 does, and ld64's
OutputFile::buildSymbolTable() checks `_options.outputKind() ==
Options::kObjectFile` before calling `_options.keepPrivateExterns()`
(the only reference to that function).

Fixes PR48536.

Differential Revision: https://reviews.llvm.org/D93609

Added: 
lld/test/MachO/private-extern.s
lld/test/MachO/weak-private-extern.s

Modified: 
lld/MachO/Driver.cpp
lld/MachO/InputFiles.cpp
lld/MachO/Options.td
lld/MachO/SymbolTable.cpp
lld/MachO/SymbolTable.h
lld/MachO/Symbols.h
lld/MachO/SyntheticSections.cpp
lld/MachO/SyntheticSections.h
lld/test/MachO/dylink-lazy.s
lld/test/MachO/symtab.s

Removed: 




diff  --git a/lld/MachO/Driver.cpp b/lld/MachO/Driver.cpp
index 9838e67cd4a2..82ddcf084dc0 100644
--- a/lld/MachO/Driver.cpp
+++ b/lld/MachO/Driver.cpp
@@ -524,7 +524,7 @@ static void replaceCommonSymbols() {
 
 replaceSymbol(sym, sym->getName(), isec, /*value=*/0,
/*isWeakDef=*/false,
-   /*isExternal=*/true);
+   /*isExternal=*/true, common->privateExtern);
   }
 }
 

diff  --git a/lld/MachO/InputFiles.cpp b/lld/MachO/InputFiles.cpp
index 3a4466dd123a..e2282f1fb2bb 100644
--- a/lld/MachO/InputFiles.cpp
+++ b/lld/MachO/InputFiles.cpp
@@ -280,22 +280,33 @@ void ObjFile::parseRelocations(const section_64 &sec,
 static macho::Symbol *createDefined(const structs::nlist_64 &sym,
 StringRef name, InputSection *isec,
 uint32_t value) {
-  if (sym.n_type & N_EXT)
-// Global defined symbol
-return symtab->addDefined(name, isec, value, sym.n_desc & N_WEAK_DEF);
-  // Local defined symbol
+  // Symbol scope is determined by sym.n_type & (N_EXT | N_PEXT):
+  // N_EXT: Global symbols
+  // N_EXT | N_PEXT: Linkage unit (think: dylib) scoped
+  // N_PEXT: Does not occur in input files in practice,
+  // a private extern must be external.
+  // 0: Translation-unit scoped. These are not in the symbol table.
+
+  if (sym.n_type & (N_EXT | N_PEXT)) {
+assert((sym.n_type & N_EXT) && "invalid input");
+return symtab->addDefined(name, isec, value, sym.n_desc & N_WEAK_DEF,
+  sym.n_type & N_PEXT);
+  }
   return make(name, isec, value, sym.n_desc & N_WEAK_DEF,
-   /*isExternal=*/false);
+   /*isExternal=*/false, /*isPrivateExtern=*/false);
 }
 
 // Absolute symbols are defined symbols that do not have an associated
 // InputSection. They cannot be weak.
 static macho::Symbol *createAbsolute(const structs::nlist_64 &sym,
   

[llvm-branch-commits] [clang] dbb0153 - scan-view: Remove Reporter.py and associated AppleScript files

[Tom Stellard via llvm-branch-commits]

Author: Tom Stellard
Date: 2020-12-21T19:24:35-08:00
New Revision: dbb01536f6f49fa428f170e34466072ef439b3e9

URL: 
https://github.com/llvm/llvm-project/commit/dbb01536f6f49fa428f170e34466072ef439b3e9
DIFF: 
https://github.com/llvm/llvm-project/commit/dbb01536f6f49fa428f170e34466072ef439b3e9.diff

LOG: scan-view: Remove Reporter.py and associated AppleScript files

I'm not exactly sure what this is, but it appears to be a tool for reporting
internal issues at Apple.  These files haven't been meaningfully updated in
12 years, and it doesn't seem like there is any reason to keep them in tree.

Reviewed By: NoQ

Differential Revision: https://reviews.llvm.org/D93565

Added: 


Modified: 
clang/tools/scan-view/CMakeLists.txt

Removed: 
clang/tools/scan-view/share/FileRadar.scpt
clang/tools/scan-view/share/GetRadarVersion.scpt
clang/tools/scan-view/share/Reporter.py



diff  --git a/clang/tools/scan-view/CMakeLists.txt 
b/clang/tools/scan-view/CMakeLists.txt
index 22edb974bac7..dd3d33439299 100644
--- a/clang/tools/scan-view/CMakeLists.txt
+++ b/clang/tools/scan-view/CMakeLists.txt
@@ -5,10 +5,7 @@ set(BinFiles
 
 set(ShareFiles
   ScanView.py
-  Reporter.py
   startfile.py
-  FileRadar.scpt
-  GetRadarVersion.scpt
   bugcatcher.ico)
 
 if(CLANG_INSTALL_SCANVIEW)

diff  --git a/clang/tools/scan-view/share/FileRadar.scpt 
b/clang/tools/scan-view/share/FileRadar.scpt
deleted file mode 100644
index 1c7455285ccb..
Binary files a/clang/tools/scan-view/share/FileRadar.scpt and /dev/null 
diff er

diff  --git a/clang/tools/scan-view/share/GetRadarVersion.scpt 
b/clang/tools/scan-view/share/GetRadarVersion.scpt
deleted file mode 100644
index e69de29bb2d1..

diff  --git a/clang/tools/scan-view/share/Reporter.py 
b/clang/tools/scan-view/share/Reporter.py
deleted file mode 100644
index b1ff16142e27..
--- a/clang/tools/scan-view/share/Reporter.py
+++ /dev/null
@@ -1,251 +0,0 @@
-#!/usr/bin/env python
-# -*- coding: utf-8 -*-
-
-"""Methods for reporting bugs."""
-
-import subprocess, sys, os
-
-__all__ = ['ReportFailure', 'BugReport', 'getReporters']
-
-#
-
-class ReportFailure(Exception):
-"""Generic exception for failures in bug reporting."""
-def __init__(self, value):
-self.value = value
-
-# Collect information about a bug.
-
-class BugReport(object):
-def __init__(self, title, description, files):
-self.title = title
-self.description = description
-self.files = files
-
-# Reporter interfaces.
-
-import os
-
-import email, mimetypes, smtplib
-from email import encoders
-from email.message import Message
-from email.mime.base import MIMEBase
-from email.mime.multipart import MIMEMultipart
-from email.mime.text import MIMEText
-
-#======#
-# ReporterParameter
-#======#
-
-class ReporterParameter(object):
-  def __init__(self, n):
-self.name = n
-  def getName(self):
-return self.name
-  def getValue(self,r,bugtype,getConfigOption):
- return getConfigOption(r.getName(),self.getName())
-  def saveConfigValue(self):
-return True
-
-class TextParameter (ReporterParameter):
-  def getHTML(self,r,bugtype,getConfigOption):
-return """\
-
-%s:
-
-"""%(self.getName(),r.getName(),self.getName(),self.getValue(r,bugtype,getConfigOption))
-
-class SelectionParameter (ReporterParameter):
-  def __init__(self, n, values):
-ReporterParameter.__init__(self,n)
-self.values = values
-
-  def getHTML(self,r,bugtype,getConfigOption):
-default = self.getValue(r,bugtype,getConfigOption)
-return """\
-
-%s:
-%s
-"""%(self.getName(),r.getName(),self.getName(),'\n'.join(["""\
-%s"""%(o[0],
- o[0] == default and ' 
selected="selected"' or '',
- o[1]) for o in self.values]))
-
-#======#
-# Reporters
-#======#
-
-class EmailReporter(object):
-def getName(self):
-return 'Email'
-
-def getParameters(self):
-return [TextParameter(x) for x in ['To', 'From', 'SMTP Server', 'SMTP 
Port']]
-
-# Lifted from python email module examples.
-def attachFile(self, outer, path):
-# Guess the content type based on the file's extension.  Encoding
-# will be ignored, although we should check for simple things like
-# gzip'd or compressed files.
-ctype, encoding = mimetypes.guess_type(path)
-if ctype is None or encoding is not None:
-# No guess could be made, or the file is encoded (compressed), so
-# use a generic bag-of-bits type.
-ctype = 'application/octet-

[llvm-branch-commits] [llvm] ec17c4f - [CSKY 3/n] Add bare-bones C-SKY MCTargetDesc

[Zi Xuan Wu via llvm-branch-commits]

Author: Zi Xuan Wu
Date: 2020-12-22T11:32:39+08:00
New Revision: ec17c4f0755bdc37e6788113909368a63d0a3b97

URL: 
https://github.com/llvm/llvm-project/commit/ec17c4f0755bdc37e6788113909368a63d0a3b97
DIFF: 
https://github.com/llvm/llvm-project/commit/ec17c4f0755bdc37e6788113909368a63d0a3b97.diff

LOG: [CSKY 3/n] Add bare-bones C-SKY MCTargetDesc

Add basis of CSKY MCTargetDesc and it's enough to compile and link but doesn't 
yet do anything particularly useful.
Once an ASM parser and printer are added in the next two patches, the whole 
thing can be usefully tested.

Differential Revision: https://reviews.llvm.org/D93372

Added: 
llvm/lib/Target/CSKY/MCTargetDesc/CMakeLists.txt
llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFObjectWriter.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.h
llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCCodeEmitter.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCCodeEmitter.h
llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.h

Modified: 
llvm/lib/Target/CSKY/CMakeLists.txt
llvm/lib/Target/CSKY/CSKYInstrInfo.td
llvm/lib/Target/CSKY/TargetInfo/CSKYTargetInfo.cpp

Removed: 




diff  --git a/llvm/lib/Target/CSKY/CMakeLists.txt 
b/llvm/lib/Target/CSKY/CMakeLists.txt
index 390b8ea4c8ce..ec487ed34bbf 100644
--- a/llvm/lib/Target/CSKY/CMakeLists.txt
+++ b/llvm/lib/Target/CSKY/CMakeLists.txt
@@ -4,6 +4,7 @@ set(LLVM_TARGET_DEFINITIONS CSKY.td)
 
 tablegen(LLVM CSKYGenRegisterInfo.inc -gen-register-info)
 tablegen(LLVM CSKYGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM CSKYGenMCCodeEmitter.inc -gen-emitter)
 
 add_public_tablegen_target(CSKYCommonTableGen)
 
@@ -22,3 +23,4 @@ add_llvm_target(CSKYCodeGen
   )
 
 add_subdirectory(TargetInfo)
+add_subdirectory(MCTargetDesc)

diff  --git a/llvm/lib/Target/CSKY/CSKYInstrInfo.td 
b/llvm/lib/Target/CSKY/CSKYInstrInfo.td
index afc82437e649..7add217530e1 100644
--- a/llvm/lib/Target/CSKY/CSKYInstrInfo.td
+++ b/llvm/lib/Target/CSKY/CSKYInstrInfo.td
@@ -24,17 +24,17 @@ include "CSKYInstrFormats.td"
 
 class oimm : Operand,
   ImmLeaf(Imm - 1);"> {
-  let EncoderMethod = "getOImmOpValue<"#num#">";
+  let EncoderMethod = "getOImmOpValue";
 }
 
 class uimm : Operand,
   ImmLeaf(Imm);"> {
-  let EncoderMethod = "getImmOpValue<"#num#", "#shift#">";
+  let EncoderMethod = "getImmOpValue<"#shift#">";
 }
 
 class simm : Operand,
   ImmLeaf(Imm);"> {
-  let EncoderMethod = "getImmOpValue<"#num#", "#shift#">";
+  let EncoderMethod = "getImmOpValue<"#shift#">";
 }
 
 def nimm_XFORM : SDNodeXFormhttps://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "CSKYAsmBackend.h"
+#include "MCTargetDesc/CSKYMCTargetDesc.h"
+#include "llvm/MC/MCAsmLayout.h"
+#include "llvm/MC/MCAssembler.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCFixupKindInfo.h"
+#include "llvm/MC/MCObjectWriter.h"
+#include "llvm/Support/Debug.h"
+
+#define DEBUG_TYPE "csky-asmbackend"
+
+using namespace llvm;
+
+std::unique_ptr
+CSKYAsmBackend::createObjectTargetWriter() const {
+  return createCSKYELFObjectWriter();
+}
+
+unsigned int CSKYAsmBackend::getNumFixupKinds() const { return 1; }
+
+void CSKYAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
+const MCValue &Target,
+MutableArrayRef Data, uint64_t Value,
+bool IsResolved,
+const MCSubtargetInfo *STI) const {
+  return;
+}
+
+bool CSKYAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
+  const MCRelaxableFragment *DF,
+  const MCAsmLayout &Layout) const {
+  return false;
+}
+
+void CSKYAsmBackend::relaxInstruction(MCInst &Inst,
+  const MCSubtargetInfo &STI) const {
+  llvm_unreachable("CSKYAsmBackend::relaxInstruction() unimplemented");
+}
+
+bool CSKYAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const {
+  if (Count % 2)
+return false;
+
+  // MOV32 r0, r0
+  while (Count >= 4) {
+OS.write("\xc4\x00\x48\x20", 4);
+Count -= 4;
+  }
+  // MOV16 r0, r0
+  if (Count)
+OS.write("\x6c\x03", 2);
+
+  return true;
+}
+
+MCAsmBackend *llvm::createCSKYAsmBackend(const Target &T,
+ const MCSubtargetInfo &STI,
+ const MCRegisterInfo &MRI,
+ const MCTargetOptions &Options) {
+  return new CSKYAsmBackend(STI, Options);
+}

diff  --git a

[llvm-branch-commits] [llvm] e8ade45 - [LegalizeType] When LegalizeType procedure widens a masked_gather, set MemoryType's EltNum equal to Result's EltNum

[Bing1 Yu via llvm-branch-commits]

Author: Bing1 Yu
Date: 2020-12-22T13:27:38+08:00
New Revision: e8ade4569b7b5343ae8d4d7c9d83706eca0e8e90

URL: 
https://github.com/llvm/llvm-project/commit/e8ade4569b7b5343ae8d4d7c9d83706eca0e8e90
DIFF: 
https://github.com/llvm/llvm-project/commit/e8ade4569b7b5343ae8d4d7c9d83706eca0e8e90.diff

LOG: [LegalizeType] When LegalizeType procedure widens a masked_gather, set 
MemoryType's EltNum equal to Result's EltNum

When LegalizeType procedure widens a masked_gather, set MemoryType's EltNum 
equal to Result's EltNum.

As I mentioned in https://reviews.llvm.org/D91092, in previous code, If we have 
a v17i32's masked_gather in avx512, we widen it to a v32i32's masked_gather 
with a v17i32's MemoryType. When the SplitVecRes_MGATHER process this v32i32's 
masked_gather, GetSplitDestVTs will assert fail since what you are going to 
split is v17i32.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D93610

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 
b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index f21ec1dbdfe5..57cb364f1939 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -4044,10 +4044,13 @@ SDValue 
DAGTypeLegalizer::WidenVecRes_MGATHER(MaskedGatherSDNode *N) {
   Index = ModifyToType(Index, WideIndexVT);
   SDValue Ops[] = { N->getChain(), PassThru, Mask, N->getBasePtr(), Index,
 Scale };
+
+  // Widen the MemoryType
+  EVT WideMemVT = EVT::getVectorVT(*DAG.getContext(),
+   N->getMemoryVT().getScalarType(), NumElts);
   SDValue Res = DAG.getMaskedGather(DAG.getVTList(WideVT, MVT::Other),
-N->getMemoryVT(), dl, Ops,
-N->getMemOperand(), N->getIndexType(),
-N->getExtensionType());
+WideMemVT, dl, Ops, N->getMemOperand(),
+N->getIndexType(), N->getExtensionType());
 
   // Legalize the chain result - switch anything that used the old chain to
   // use the new one.
@@ -4881,6 +4884,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_MSCATTER(SDNode *N, 
unsigned OpNo) {
   SDValue Mask = MSC->getMask();
   SDValue Index = MSC->getIndex();
   SDValue Scale = MSC->getScale();
+  EVT WideMemVT = MSC->getMemoryVT();
 
   if (OpNo == 1) {
 DataOp = GetWidenedVector(DataOp);
@@ -4897,6 +4901,10 @@ SDValue DAGTypeLegalizer::WidenVecOp_MSCATTER(SDNode *N, 
unsigned OpNo) {
 EVT WideMaskVT = EVT::getVectorVT(*DAG.getContext(),
   MaskVT.getVectorElementType(), NumElts);
 Mask = ModifyToType(Mask, WideMaskVT, true);
+
+// Widen the MemoryType
+WideMemVT = EVT::getVectorVT(*DAG.getContext(),
+ MSC->getMemoryVT().getScalarType(), NumElts);
   } else if (OpNo == 4) {
 // Just widen the index. It's allowed to have extra elements.
 Index = GetWidenedVector(Index);
@@ -4905,9 +4913,8 @@ SDValue DAGTypeLegalizer::WidenVecOp_MSCATTER(SDNode *N, 
unsigned OpNo) {
 
   SDValue Ops[] = {MSC->getChain(), DataOp, Mask, MSC->getBasePtr(), Index,
Scale};
-  return DAG.getMaskedScatter(DAG.getVTList(MVT::Other),
-  MSC->getMemoryVT(), SDLoc(N), Ops,
-  MSC->getMemOperand(), MSC->getIndexType(),
+  return DAG.getMaskedScatter(DAG.getVTList(MVT::Other), WideMemVT, SDLoc(N),
+  Ops, MSC->getMemOperand(), MSC->getIndexType(),
   MSC->isTruncatingStore());
 }
 

diff  --git a/llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll 
b/llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll
index ab62c3b92692..517553d455ae 100644
--- a/llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll
+++ b/llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll
@@ -247,6 +247,303 @@ define void @test_scatter_v2i32_data_index(<2 x i32> %a1, 
i32* %base, <2 x i32>
   ret void
 }
 
+define void @test_mscatter_v17f32(float* %base, <17 x i32> %index, <17 x 
float> %val)
+; WIDEN_SKX-LABEL: test_mscatter_v17f32:
+; WIDEN_SKX:   # %bb.0:
+; WIDEN_SKX-NEXT:vinsertps {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[2,3]
+; WIDEN_SKX-NEXT:vinsertps {{.*#+}} xmm4 = xmm4[0,1],xmm6[0],xmm4[3]
+; WIDEN_SKX-NEXT:vinsertps {{.*#+}} xmm4 = xmm4[0,1,2],xmm7[0]
+; WIDEN_SKX-NEXT:vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
+; WIDEN_SKX-NEXT:vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
+; WIDEN_SKX-NEXT:vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm3[0]
+; WIDEN_SKX-NEXT:vinsertf128 $1, %xmm4, %ymm0, %ymm0
+; WIDEN_SKX-NEXT:vmovss {{.*#

[llvm-branch-commits] [llvm] 7a2c8be - [RISCV] Define vleff intrinsics.

[Zakk Chen via llvm-branch-commits]

Author: Zakk Chen
Date: 2020-12-21T22:05:38-08:00
New Revision: 7a2c8be641ded68b3424b46dbf47f2879a9eaa2e

URL: 
https://github.com/llvm/llvm-project/commit/7a2c8be641ded68b3424b46dbf47f2879a9eaa2e
DIFF: 
https://github.com/llvm/llvm-project/commit/7a2c8be641ded68b3424b46dbf47f2879a9eaa2e.diff

LOG: [RISCV] Define vleff intrinsics.

Define vleff intrinsics and lower to V instructions.

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez 
Co-Authored-by: Zakk Chen 

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D93516

Added: 
llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll

Modified: 
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

Removed: 




diff  --git a/llvm/include/llvm/IR/IntrinsicsRISCV.td 
b/llvm/include/llvm/IR/IntrinsicsRISCV.td
index dc1d56322191..d3ccd2eaf186 100644
--- a/llvm/include/llvm/IR/IntrinsicsRISCV.td
+++ b/llvm/include/llvm/IR/IntrinsicsRISCV.td
@@ -378,6 +378,7 @@ let TargetPrefix = "riscv" in {
   }
 
   defm vle : RISCVUSLoad;
+  defm vleff : RISCVUSLoad;
   defm vse : RISCVUSStore;
   defm vlse: RISCVSLoad;
   defm vsse: RISCVSStore;

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index a5c5c04542e1..68c656a049ae 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -1599,6 +1599,16 @@ foreach eew = EEWList in {
   defm PseudoVSUXEI # eew : VPseudoIStore;
 }
 
+//===--===//
+// 7.7. Unit-stride Fault-Only-First Loads
+//===--===//
+
+// vleff may update VL register
+let hasSideEffects = 1, Defs = [VL] in
+foreach eew = EEWList in {
+  defm PseudoVLE # eew # FF : VPseudoUSLoad;
+}
+
 
//===--===//
 // Pseudo Instructions
 
//===--===//
@@ -1866,6 +1876,9 @@ foreach vti = AllVectors in
   defm : VPatUSLoad<"int_riscv_vle",
 "PseudoVLE" # vti.SEW,
 vti.Vector, vti.Mask, vti.SEW, vti.LMul, vti.RegClass>;
+  defm : VPatUSLoad<"int_riscv_vleff",
+"PseudoVLE" # vti.SEW # "FF",
+vti.Vector, vti.Mask, vti.SEW, vti.LMul, vti.RegClass>;
   defm : VPatUSStore<"int_riscv_vse",
  "PseudoVSE" # vti.SEW,
  vti.Vector, vti.Mask, vti.SEW, vti.LMul, vti.RegClass>;

diff  --git a/llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll 
b/llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
new file mode 100644
index ..ea882a5bf587
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
@@ -0,0 +1,1045 @@
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-v,+f,+experimental-zfh,+f,+d 
-verify-machineinstrs \
+; RUN:   --riscv-no-aliases < %s | FileCheck %s
+declare  @llvm.riscv.vleff.nxv1i32(
+  *,
+  i32);
+
+define  @intrinsic_vleff_v_nxv1i32_nxv1i32(* %0, i32 %1) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vleff_v_nxv1i32_nxv1i32
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e32,mf2,ta,mu
+; CHECK:   vle32ff.v {{v[0-9]+}}, (a0)
+  %a = call  @llvm.riscv.vleff.nxv1i32(
+* %0,
+i32 %1)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vleff.mask.nxv1i32(
+  ,
+  *,
+  ,
+  i32);
+
+define  @intrinsic_vleff_mask_v_nxv1i32_nxv1i32( %0, * %1,  %2, i32 %3) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vleff_mask_v_nxv1i32_nxv1i32
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e32,mf2,ta,mu
+; CHECK:   vle32ff.v {{v[0-9]+}}, (a0), v0.t
+  %a = call  @llvm.riscv.vleff.mask.nxv1i32(
+ %0,
+* %1,
+ %2,
+i32 %3)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vleff.nxv2i32(
+  *,
+  i32);
+
+define  @intrinsic_vleff_v_nxv2i32_nxv2i32(* %0, i32 %1) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vleff_v_nxv2i32_nxv2i32
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e32,m1,ta,mu
+; CHECK:   vle32ff.v {{v[0-9]+}}, (a0)
+  %a = call  @llvm.riscv.vleff.nxv2i32(
+* %0,
+i32 %1)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vleff.mask.nxv2i32(
+  ,
+  *,
+  ,
+  i32);
+
+define  @intrinsic_vleff_mask_v_nxv2i32_nxv2i32( %0, * %1,  %2, i32 %3) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vleff_mask_v_nxv2i32_nxv2i32
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e32,m1,ta,mu
+; CHECK:   vle32ff.v {{v[0-9]+}}, (a0), v0.t
+  %a = call  @llvm.riscv.vleff.mask.nxv2i32(
+ %0,
+* %1,
+ %2,
+i32 %3)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vleff.nxv4i32(
+  *,
+  i32);
+
+define  @intrinsic_vleff_v_nxv4i32_nxv4i32(* %0, i32 %1) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vleff_v_nxv4i32_nxv4i32
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e32,m2,ta,

[llvm-branch-commits] [flang] 442aac5 - [Flang][openmp][1/5] Make Allocate clause part of OmpClause

[Sameeran joshi via llvm-branch-commits]

Author: sameeran joshi
Date: 2020-12-22T12:53:34+05:30
New Revision: 442aac5da68c467563dc6fedf37892ee3d2b688b

URL: 
https://github.com/llvm/llvm-project/commit/442aac5da68c467563dc6fedf37892ee3d2b688b
DIFF: 
https://github.com/llvm/llvm-project/commit/442aac5da68c467563dc6fedf37892ee3d2b688b.diff

LOG: [Flang][openmp][1/5] Make Allocate clause part of OmpClause

After discussion in `D93482` we found that the some of the clauses were not
following the common OmpClause convention.

The benefits of using OmpClause:
- Functionalities from structure checker are mostly aligned to work with
  `llvm::omp::Clause`.
- The unparsing as well can take advantage.
- Homogeneity with OpenACC and rest of the clauses in OpenMP.
- Could even generate the parser with TableGen, when there is homogeneity.
- It becomes confusing when to use `flangClass` and `flangClassValue` inside
  TableGen, if incase we generate parser using TableGen we could have only a
  single `let expression`.

This patch makes `allocate` clause part of `OmpClause`.The unparse function for
`OmpAllocateClause` is adapted since the keyword and parenthesis are issued by
the corresponding unparse function for `parser::OmpClause::Allocate`.

Reviewed By: clementval

Differential Revision: https://reviews.llvm.org/D93640

Added: 


Modified: 
flang/lib/Parser/openmp-parsers.cpp
flang/lib/Parser/unparse.cpp
flang/lib/Semantics/check-omp-structure.cpp
flang/lib/Semantics/check-omp-structure.h
llvm/include/llvm/Frontend/OpenMP/OMP.td

Removed: 




diff  --git a/flang/lib/Parser/openmp-parsers.cpp 
b/flang/lib/Parser/openmp-parsers.cpp
index 67c377e798ca..ff8ba774a6ce 100644
--- a/flang/lib/Parser/openmp-parsers.cpp
+++ b/flang/lib/Parser/openmp-parsers.cpp
@@ -157,8 +157,8 @@ TYPE_PARSER(
 "ACQ_REL" >> construct(construct()) ||
 "ALIGNED" >>
 construct(parenthesized(Parser{})) ||
-"ALLOCATE" >>
-construct(parenthesized(Parser{})) ||
+"ALLOCATE" >> construct(construct(
+  parenthesized(Parser{}))) ||
 "ALLOCATOR" >> construct(construct(
parenthesized(scalarIntExpr))) ||
 "COLLAPSE" >> construct(construct(

diff  --git a/flang/lib/Parser/unparse.cpp b/flang/lib/Parser/unparse.cpp
index a027c8fc9af6..ed17bac92965 100644
--- a/flang/lib/Parser/unparse.cpp
+++ b/flang/lib/Parser/unparse.cpp
@@ -2020,10 +2020,9 @@ class UnparseVisitor {
 Put(")");
   }
   void Unparse(const OmpAllocateClause &x) {
-Word("ALLOCATE(");
-Walk(std::get>(x.t), ":");
+Walk(std::get>(x.t));
+Put(":");
 Walk(std::get(x.t));
-Put(")");
   }
   void Unparse(const OmpDependSinkVecLength &x) {
 Walk(std::get(x.t));

diff  --git a/flang/lib/Semantics/check-omp-structure.cpp 
b/flang/lib/Semantics/check-omp-structure.cpp
index 978e1c7962a4..58db75459318 100644
--- a/flang/lib/Semantics/check-omp-structure.cpp
+++ b/flang/lib/Semantics/check-omp-structure.cpp
@@ -403,6 +403,7 @@ void OmpStructureChecker::Enter(const parser::OmpClause &x) 
{
 
 // Following clauses do not have a seperate node in parse-tree.h.
 // They fall under 'struct OmpClause' in parse-tree.h.
+CHECK_SIMPLE_CLAUSE(Allocate, OMPC_allocate)
 CHECK_SIMPLE_CLAUSE(Copyin, OMPC_copyin)
 CHECK_SIMPLE_CLAUSE(Copyprivate, OMPC_copyprivate)
 CHECK_SIMPLE_CLAUSE(Device, OMPC_device)
@@ -489,7 +490,6 @@ void OmpStructureChecker::CheckIsVarPartOfAnotherVar(
   }
 }
 // Following clauses have a seperate node in parse-tree.h.
-CHECK_SIMPLE_PARSER_CLAUSE(OmpAllocateClause, OMPC_allocate)
 CHECK_SIMPLE_PARSER_CLAUSE(OmpDefaultClause, OMPC_default)
 CHECK_SIMPLE_PARSER_CLAUSE(OmpDistScheduleClause, OMPC_dist_schedule)
 CHECK_SIMPLE_PARSER_CLAUSE(OmpNowait, OMPC_nowait)

diff  --git a/flang/lib/Semantics/check-omp-structure.h 
b/flang/lib/Semantics/check-omp-structure.h
index 2949568f6044..32da0fb00954 100644
--- a/flang/lib/Semantics/check-omp-structure.h
+++ b/flang/lib/Semantics/check-omp-structure.h
@@ -127,6 +127,7 @@ class OmpStructureChecker
   void Leave(const parser::OmpClauseList &);
   void Enter(const parser::OmpClause &);
   void Enter(const parser::OmpNowait &);
+  void Enter(const parser::OmpClause::Allocate &);
   void Enter(const parser::OmpClause::Allocator &);
   void Enter(const parser::OmpClause::Inbranch &);
   void Enter(const parser::OmpClause::Mergeable &);
@@ -174,7 +175,6 @@ class OmpStructureChecker
   void Enter(const parser::OmpAtomicCapture &);
   void Leave(const parser::OmpAtomic &);
   void Enter(const parser::OmpAlignedClause &);
-  void Enter(const parser::OmpAllocateClause &);
   void Enter(const parser::OmpDefaultClause &);
   void Enter(const parser::OmpDefaultmapClause &);
   void Enter(const parser::OmpDependClause &);

diff  --git a/llvm/include/llvm/Frontend/OpenMP/OMP.td 
b/llvm/include/llvm/Frontend/OpenMP/OMP.td
index 58aa1bf23b68..6ad8fa92084b 100644
--- a/llvm/include/llvm/Fronten

[llvm-branch-commits] [flang] f72c384 - [Flang][openmp][2/5] Make Default clause part of OmpClause

[Sameeran joshi via llvm-branch-commits]

Author: sameeran joshi
Date: 2020-12-22T13:17:44+05:30
New Revision: f72c384b5ba943c92fadcbe77f9d7661728905ab

URL: 
https://github.com/llvm/llvm-project/commit/f72c384b5ba943c92fadcbe77f9d7661728905ab
DIFF: 
https://github.com/llvm/llvm-project/commit/f72c384b5ba943c92fadcbe77f9d7661728905ab.diff

LOG: [Flang][openmp][2/5] Make Default clause part of OmpClause

After discussion in `D93482` we found that the some of the clauses were not
following the common OmpClause convention.

The benefits of using OmpClause:
- Functionalities from structure checker are mostly aligned to work with
  `llvm::omp::Clause`.
- The unparsing as well can take advantage.
- Homogeneity with OpenACC and rest of the clauses in OpenMP.
- Could even generate the parser with TableGen, when there is homogeneity.
- It becomes confusing when to use `flangClass` and `flangClassValue` inside
  TableGen, if incase we generate parser using TableGen we could have only a
  single `let expression`.

This patch makes `OmpDefaultClause` clause part of `OmpClause`.
The unparse function is dropped as the unparsing is done by `WALK_NESTED_ENUM`
for `OmpDefaultClause`.

Reviewed By: clementval, kiranktp

Differential Revision: https://reviews.llvm.org/D93641

Added: 


Modified: 
flang/lib/Lower/OpenMP.cpp
flang/lib/Parser/openmp-parsers.cpp
flang/lib/Parser/unparse.cpp
flang/lib/Semantics/check-omp-structure.cpp
flang/lib/Semantics/check-omp-structure.h
llvm/include/llvm/Frontend/OpenMP/OMP.td

Removed: 




diff  --git a/flang/lib/Lower/OpenMP.cpp b/flang/lib/Lower/OpenMP.cpp
index 97946caa68a0..f73dd09fbe68 100644
--- a/flang/lib/Lower/OpenMP.cpp
+++ b/flang/lib/Lower/OpenMP.cpp
@@ -191,8 +191,9 @@ genOMP(Fortran::lower::AbstractConverter &converter,
 // Handle attribute based clauses.
 for (const auto &clause : parallelOpClauseList.v) {
   if (const auto &defaultClause =
-  std::get_if(&clause.u)) {
-switch (defaultClause->v) {
+  std::get_if(&clause.u)) {
+const auto &ompDefaultClause{defaultClause->v};
+switch (ompDefaultClause.v) {
 case Fortran::parser::OmpDefaultClause::Type::Private:
   parallelOp.default_valAttr(firOpBuilder.getStringAttr(
   omp::stringifyClauseDefault(omp::ClauseDefault::defprivate)));

diff  --git a/flang/lib/Parser/openmp-parsers.cpp 
b/flang/lib/Parser/openmp-parsers.cpp
index ff8ba774a6ce..e982dd19e498 100644
--- a/flang/lib/Parser/openmp-parsers.cpp
+++ b/flang/lib/Parser/openmp-parsers.cpp
@@ -167,8 +167,8 @@ TYPE_PARSER(
 parenthesized(Parser{}))) ||
 "COPYPRIVATE" >> construct(construct(
  (parenthesized(Parser{} ||
-"DEFAULT"_id >>
-construct(parenthesized(Parser{})) ||
+"DEFAULT"_id >> construct(construct(
+parenthesized(Parser{}))) ||
 "DEFAULTMAP" >>
 construct(parenthesized(Parser{})) ||
 "DEPEND" >>

diff  --git a/flang/lib/Parser/unparse.cpp b/flang/lib/Parser/unparse.cpp
index ed17bac92965..a4b0c64011fc 100644
--- a/flang/lib/Parser/unparse.cpp
+++ b/flang/lib/Parser/unparse.cpp
@@ -2058,11 +2058,6 @@ class UnparseVisitor {
   },
 x.u);
   }
-  bool Pre(const OmpDefaultClause &) {
-Word("DEFAULT(");
-return true;
-  }
-  void Post(const OmpDefaultClause &) { Put(")"); }
   bool Pre(const OmpProcBindClause &) {
 Word("PROC_BIND(");
 return true;

diff  --git a/flang/lib/Semantics/check-omp-structure.cpp 
b/flang/lib/Semantics/check-omp-structure.cpp
index 58db75459318..6ed7106bb9f4 100644
--- a/flang/lib/Semantics/check-omp-structure.cpp
+++ b/flang/lib/Semantics/check-omp-structure.cpp
@@ -406,6 +406,7 @@ void OmpStructureChecker::Enter(const parser::OmpClause &x) 
{
 CHECK_SIMPLE_CLAUSE(Allocate, OMPC_allocate)
 CHECK_SIMPLE_CLAUSE(Copyin, OMPC_copyin)
 CHECK_SIMPLE_CLAUSE(Copyprivate, OMPC_copyprivate)
+CHECK_SIMPLE_CLAUSE(Default, OMPC_default)
 CHECK_SIMPLE_CLAUSE(Device, OMPC_device)
 CHECK_SIMPLE_CLAUSE(Final, OMPC_final)
 CHECK_SIMPLE_CLAUSE(Firstprivate, OMPC_firstprivate)
@@ -490,7 +491,6 @@ void OmpStructureChecker::CheckIsVarPartOfAnotherVar(
   }
 }
 // Following clauses have a seperate node in parse-tree.h.
-CHECK_SIMPLE_PARSER_CLAUSE(OmpDefaultClause, OMPC_default)
 CHECK_SIMPLE_PARSER_CLAUSE(OmpDistScheduleClause, OMPC_dist_schedule)
 CHECK_SIMPLE_PARSER_CLAUSE(OmpNowait, OMPC_nowait)
 CHECK_SIMPLE_PARSER_CLAUSE(OmpProcBindClause, OMPC_proc_bind)

diff  --git a/flang/lib/Semantics/check-omp-structure.h 
b/flang/lib/Semantics/check-omp-structure.h
index 32da0fb00954..dcc2deeb348c 100644
--- a/flang/lib/Semantics/check-omp-structure.h
+++ b/flang/lib/Semantics/check-omp-structure.h
@@ -137,6 +137,7 @@ class OmpStructureChecker
   void Enter(const parser::OmpClause::Collapse &);
   void Enter(const parser::OmpClause::Copyin &);
   void Enter(cons

[llvm-branch-commits] [clang-tools-extra] b8c3715 - [clangd] Trim memory periodically when using glibc malloc

[Sam McCall via llvm-branch-commits]

Author: Quentin Chateau
Date: 2020-12-22T08:54:28+01:00
New Revision: b8c37153d5393aad96feefe0b4689b7b62bc160d

URL: 
https://github.com/llvm/llvm-project/commit/b8c37153d5393aad96feefe0b4689b7b62bc160d
DIFF: 
https://github.com/llvm/llvm-project/commit/b8c37153d5393aad96feefe0b4689b7b62bc160d.diff

LOG: [clangd] Trim memory periodically when using glibc malloc

This diff addresses the issue of the ever increasing memory usage of clangd. 
The key to understand what happens is to use `malloc_stats()`: malloc arenas 
keep getting bigger, although the actual memory used does not. It seems some 
operations while bulding the indices (both dynamic and background) create this 
problem. Specifically, 'FileSymbols::update' and 'FileSymbols::buildIndex' seem 
especially affected.

This diff adds a call to `malloc_trim()` periodically in
ClangdLSPServer.

Fixes: https://github.com/clangd/clangd/issues/251
Fixes: https://github.com/clangd/clangd/issues/115

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D93452

Added: 


Modified: 
clang-tools-extra/clangd/CMakeLists.txt
clang-tools-extra/clangd/ClangdLSPServer.cpp
clang-tools-extra/clangd/ClangdLSPServer.h
clang-tools-extra/clangd/Features.inc.in
clang-tools-extra/clangd/tool/ClangdMain.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/CMakeLists.txt 
b/clang-tools-extra/clangd/CMakeLists.txt
index 919457f216c1..9e62e0948027 100644
--- a/clang-tools-extra/clangd/CMakeLists.txt
+++ b/clang-tools-extra/clangd/CMakeLists.txt
@@ -14,9 +14,12 @@ if (NOT DEFINED CLANGD_BUILD_XPC)
   unset(CLANGD_BUILD_XPC_DEFAULT)
 endif ()
 
+option(CLANGD_MALLOC_TRIM "Call malloc_trim(3) periodically in Clangd. (only 
takes effect when using glibc)" ON)
+
 llvm_canonicalize_cmake_booleans(
   CLANGD_BUILD_XPC
   CLANGD_ENABLE_REMOTE
+  CLANGD_MALLOC_TRIM
   LLVM_ENABLE_ZLIB
 )
 

diff  --git a/clang-tools-extra/clangd/ClangdLSPServer.cpp 
b/clang-tools-extra/clangd/ClangdLSPServer.cpp
index b32c9e13973b..0c42f95fb594 100644
--- a/clang-tools-extra/clangd/ClangdLSPServer.cpp
+++ b/clang-tools-extra/clangd/ClangdLSPServer.cpp
@@ -178,6 +178,7 @@ class ClangdLSPServer::MessageHandler : public 
Transport::MessageHandler {
 } else if (auto Handler = Notifications.lookup(Method)) {
   Handler(std::move(Params));
   Server.maybeExportMemoryProfile();
+  Server.maybeCleanupMemory();
 } else {
   log("unhandled notification {0}", Method);
 }
@@ -453,6 +454,7 @@ void ClangdLSPServer::callRaw(StringRef Method, 
llvm::json::Value Params,
 
 void ClangdLSPServer::notify(llvm::StringRef Method, llvm::json::Value Params) 
{
   log("--> {0}", Method);
+  maybeCleanupMemory();
   std::lock_guard Lock(TranspWriter);
   Transp.notify(Method, std::move(Params));
 }
@@ -1301,6 +1303,27 @@ void ClangdLSPServer::maybeExportMemoryProfile() {
   NextProfileTime = Now + ProfileInterval;
 }
 
+void ClangdLSPServer::maybeCleanupMemory() {
+  // Memory cleanup is probably expensive, throttle it
+  static constexpr auto MemoryCleanupInterval = std::chrono::minutes(1);
+
+  if (!Opts.MemoryCleanup)
+return;
+
+  // FIXME: this can probably be done without a mutex
+  // and the logic could be shared with maybeExportMemoryProfile
+  {
+auto Now = std::chrono::steady_clock::now();
+std::lock_guard Lock(NextMemoryCleanupTimeMutex);
+if (Now < NextMemoryCleanupTime)
+  return;
+NextMemoryCleanupTime = Now + MemoryCleanupInterval;
+  }
+
+  vlog("Calling memory cleanup callback");
+  Opts.MemoryCleanup();
+}
+
 // FIXME: This function needs to be properly tested.
 void ClangdLSPServer::onChangeConfiguration(
 const DidChangeConfigurationParams &Params) {
@@ -1507,8 +1530,9 @@ ClangdLSPServer::ClangdLSPServer(class Transport &Transp,
 MsgHandler->bind("textDocument/foldingRange", 
&ClangdLSPServer::onFoldingRange);
   // clang-format on
 
-  // Delay first profile until we've finished warming up.
-  NextProfileTime = std::chrono::steady_clock::now() + std::chrono::minutes(1);
+  // Delay first profile and memory cleanup until we've finished warming up.
+  NextMemoryCleanupTime = NextProfileTime =
+  std::chrono::steady_clock::now() + std::chrono::minutes(1);
 }
 
 ClangdLSPServer::~ClangdLSPServer() {
@@ -1621,6 +1645,10 @@ void ClangdLSPServer::onDiagnosticsReady(PathRef File, 
llvm::StringRef Version,
 void ClangdLSPServer::onBackgroundIndexProgress(
 const BackgroundQueue::Stats &Stats) {
   static const char ProgressToken[] = "backgroundIndexProgress";
+
+  // The background index did some work, maybe we need to cleanup
+  maybeCleanupMemory();
+
   std::lock_guard Lock(BackgroundIndexProgressMutex);
 
   auto NotifyProgress = [this](const BackgroundQueue::Stats &Stats) {

diff  --git a/clang-tools-extra/clangd/ClangdLSPServer.h 
b/clang-tools-extra/clangd/ClangdLSPServer.h
index e65fc0e8a006..b5f9d2c9d766 100644
-