[llvm-branch-commits] [lldb] release/21.x: [lldb][DataFormatter] Allow std::string formatters to match against custom allocators (#156050) (PR #157048)
https://github.com/labath approved this pull request. :ship: https://github.com/llvm/llvm-project/pull/157048 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [AllocToken, Clang] Implement __builtin_alloc_token_infer() and llvm.alloc.token.id (PR #156842)
https://github.com/melver updated https://github.com/llvm/llvm-project/pull/156842 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Add more tests for flat/global atomicrmw with agprs (PR #156874)
https://github.com/cdevadas commented: The contents of the test files are huge and I'm unable to view the changes in the testcase llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll. There is a suggestion to use a local Git Client to view the changes. Do others see a similar recommendation? https://github.com/llvm/llvm-project/pull/156874 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 24f6f18 - Revert "[clang][dataflow] Transfer more cast expressions. (#153066)"
Author: Samira Bakon
Date: 2025-09-05T13:40:11-04:00
New Revision: 24f6f18e9cfbd4705340cfdf36311afc22fb3544
URL:
https://github.com/llvm/llvm-project/commit/24f6f18e9cfbd4705340cfdf36311afc22fb3544
DIFF:
https://github.com/llvm/llvm-project/commit/24f6f18e9cfbd4705340cfdf36311afc22fb3544.diff
LOG: Revert "[clang][dataflow] Transfer more cast expressions. (#153066)"
This reverts commit ffe21f1cd7ddc0a8f5e8f1a4ed137398d3bf0d83.
Added:
Modified:
clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
clang/lib/Analysis/FlowSensitive/Transfer.cpp
clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Removed:
diff --git a/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
b/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
index 534b9a017d8f0..8fcc6a44027a0 100644
--- a/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
+++ b/clang/include/clang/Analysis/FlowSensitive/StorageLocation.h
@@ -17,7 +17,6 @@
#include "clang/AST/Decl.h"
#include "clang/AST/Type.h"
#include "llvm/ADT/DenseMap.h"
-#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Debug.h"
#include
@@ -153,11 +152,6 @@ class RecordStorageLocation final : public StorageLocation
{
return {SyntheticFields.begin(), SyntheticFields.end()};
}
- /// Add a synthetic field, if none by that name is already present.
- void addSyntheticField(llvm::StringRef Name, StorageLocation &Loc) {
-SyntheticFields.insert({Name, &Loc});
- }
-
/// Changes the child storage location for a field `D` of reference type.
/// All other fields cannot change their storage location and always retain
/// the storage location passed to the `RecordStorageLocation` constructor.
@@ -170,11 +164,6 @@ class RecordStorageLocation final : public StorageLocation
{
Children[&D] = Loc;
}
- /// Add a child storage location for a field `D`, if not already present.
- void addChild(const ValueDecl &D, StorageLocation *Loc) {
-Children.insert({&D, Loc});
- }
-
llvm::iterator_range children() const {
return {Children.begin(), Children.end()};
}
diff --git a/clang/lib/Analysis/FlowSensitive/Transfer.cpp
b/clang/lib/Analysis/FlowSensitive/Transfer.cpp
index 23a6de45e18b1..86a816e2e406c 100644
--- a/clang/lib/Analysis/FlowSensitive/Transfer.cpp
+++ b/clang/lib/Analysis/FlowSensitive/Transfer.cpp
@@ -20,17 +20,14 @@
#include "clang/AST/OperationKinds.h"
#include "clang/AST/Stmt.h"
#include "clang/AST/StmtVisitor.h"
-#include "clang/AST/Type.h"
#include "clang/Analysis/FlowSensitive/ASTOps.h"
#include "clang/Analysis/FlowSensitive/AdornedCFG.h"
#include "clang/Analysis/FlowSensitive/DataflowAnalysisContext.h"
#include "clang/Analysis/FlowSensitive/DataflowEnvironment.h"
#include "clang/Analysis/FlowSensitive/NoopAnalysis.h"
#include "clang/Analysis/FlowSensitive/RecordOps.h"
-#include "clang/Analysis/FlowSensitive/StorageLocation.h"
#include "clang/Analysis/FlowSensitive/Value.h"
#include "clang/Basic/Builtins.h"
-#include "clang/Basic/LLVM.h"
#include "clang/Basic/OperatorKinds.h"
#include "llvm/Support/Casting.h"
#include
@@ -290,7 +287,7 @@ class TransferVisitor : public
ConstStmtVisitor {
}
}
- void VisitCastExpr(const CastExpr *S) {
+ void VisitImplicitCastExpr(const ImplicitCastExpr *S) {
const Expr *SubExpr = S->getSubExpr();
assert(SubExpr != nullptr);
@@ -320,60 +317,6 @@ class TransferVisitor : public
ConstStmtVisitor {
break;
}
-case CK_BaseToDerived: {
- // This is a cast of (single-layer) pointer or reference to a record
type.
- // We should now model the fields for the derived type.
-
- // Get the RecordStorageLocation for the record object underneath.
- RecordStorageLocation *Loc = nullptr;
- if (S->getType()->isPointerType()) {
-auto *PV = Env.get(*SubExpr);
-assert(PV != nullptr);
-if (PV == nullptr)
- break;
-Loc = cast(&PV->getPointeeLoc());
- } else {
-assert(S->getType()->isRecordType());
-if (SubExpr->isGLValue()) {
- Loc = Env.get(*SubExpr);
-} else {
- Loc = &Env.getResultObjectLocation(*SubExpr);
-}
- }
- if (!Loc) {
-// Nowhere to add children or propagate from, so we're done.
-break;
- }
-
- // Get the derived record type underneath the reference or pointer.
- QualType Derived = S->getType().getNonReferenceType();
- if (Derived->isPointerType()) {
-Derived = Derived->getPointeeType();
- }
-
- // Add children to the storage location for fields (including synthetic
- // fields) of the derived type and initialize their values.
- for (const FieldDecl *Field :
- Env.getDataflowAnalysisContext().getModeledFields(Derived)) {
-assert(Field != nullptr);
-QualType FieldType = Field->getType()
[llvm-branch-commits] [AllocToken, Clang] Infer type hints from sizeof expressions and casts (PR #156841)
https://github.com/melver updated https://github.com/llvm/llvm-project/pull/156841 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [LifetimeSafety] Associate origins to all l-valued expressions (PR #156896)
https://github.com/Xazax-hun approved this pull request. https://github.com/llvm/llvm-project/pull/156896 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Fix definitions of DS ret atomics with AGPRs (PR #156655)
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/156655
>From 61b4ecaf9130602ed184ed505be6ed76d7e13f2e Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 3 Sep 2025 20:08:48 +0900
Subject: [PATCH] AMDGPU: Fix definitions of DS ret atomics with AGPRs
These are 2-data operations that need to use all-AGPR or all-VGPR
inputs. Stop defining them with AVLdSt data operands, and add _agpr
variants.
---
llvm/lib/Target/AMDGPU/DSInstructions.td | 249 +++--
llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s| 448 +++
2 files changed, 352 insertions(+), 345 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/DSInstructions.td
b/llvm/lib/Target/AMDGPU/DSInstructions.td
index 960f3282fb6f6..23dd660c3e57e 100644
--- a/llvm/lib/Target/AMDGPU/DSInstructions.td
+++ b/llvm/lib/Target/AMDGPU/DSInstructions.td
@@ -253,17 +253,22 @@ class DS_1A1D_RET
let IsAtomicRet = 1;
}
-multiclass DS_1A1D_RET_mc {
+multiclass DS_1A1D_RET_mc {
+ assert OperandIsVGPR.ret,
+ "DS with 2 data operands should be declared with VGPRs";
+
def "" : DS_1A1D_RET;
let has_m0_read = 0 in {
def _gfx9 : DS_1A1D_RET;
+def _agpr : DS_1A1D_RET.ret>;
}
}
-multiclass DS_1A1D_RET_mc_gfx9
{
+multiclass DS_1A1D_RET_mc_gfx9
{
let has_m0_read = 0 in {
def "" : DS_1A1D_RET;
+def _agpr : DS_1A1D_RET.ret>;
}
}
@@ -617,7 +622,7 @@ def DS_WRITE_ADDTID_B32 :
DS_0A1D_NORET<"ds_write_addtid_b32">;
let SubtargetPredicate = HasLdsAtomicAddF64 in {
defm DS_ADD_F64 : DS_1A1D_NORET_mc_gfx9<"ds_add_f64", AVLdSt_64>;
- defm DS_ADD_RTN_F64 : DS_1A1D_RET_mc_gfx9<"ds_add_rtn_f64", AVLdSt_64>;
+ defm DS_ADD_RTN_F64 : DS_1A1D_RET_mc_gfx9<"ds_add_rtn_f64", VGPROp_64>;
} // End SubtargetPredicate = HasLdsAtomicAddF64
let SubtargetPredicate = HasAtomicDsPkAdd16Insts in {
@@ -689,25 +694,25 @@ defm DS_WRXCHG_RTN_B32 :
DS_1A1D_RET_mc<"ds_wrxchg_rtn_b32">;
defm DS_WRXCHG2_RTN_B32 : DS_1A2D_Off8_RET_mc<"ds_wrxchg2_rtn_b32", VGPROp_64,
VGPROp_32>;
defm DS_WRXCHG2ST64_RTN_B32 : DS_1A2D_Off8_RET_mc<"ds_wrxchg2st64_rtn_b32",
VGPROp_64, VGPROp_32>;
-defm DS_ADD_RTN_U64 : DS_1A1D_RET_mc<"ds_add_rtn_u64", AVLdSt_64>;
-defm DS_SUB_RTN_U64 : DS_1A1D_RET_mc<"ds_sub_rtn_u64", AVLdSt_64>;
-defm DS_RSUB_RTN_U64 : DS_1A1D_RET_mc<"ds_rsub_rtn_u64", AVLdSt_64>;
-defm DS_INC_RTN_U64 : DS_1A1D_RET_mc<"ds_inc_rtn_u64", AVLdSt_64>;
-defm DS_DEC_RTN_U64 : DS_1A1D_RET_mc<"ds_dec_rtn_u64", AVLdSt_64>;
-defm DS_MIN_RTN_I64: DS_1A1D_RET_mc<"ds_min_rtn_i64", AVLdSt_64>;
-defm DS_MAX_RTN_I64: DS_1A1D_RET_mc<"ds_max_rtn_i64", AVLdSt_64>;
-defm DS_MIN_RTN_U64 : DS_1A1D_RET_mc<"ds_min_rtn_u64", AVLdSt_64>;
-defm DS_MAX_RTN_U64 : DS_1A1D_RET_mc<"ds_max_rtn_u64", AVLdSt_64>;
-defm DS_AND_RTN_B64: DS_1A1D_RET_mc<"ds_and_rtn_b64", AVLdSt_64>;
-defm DS_OR_RTN_B64 : DS_1A1D_RET_mc<"ds_or_rtn_b64", AVLdSt_64>;
-defm DS_XOR_RTN_B64: DS_1A1D_RET_mc<"ds_xor_rtn_b64", AVLdSt_64>;
+defm DS_ADD_RTN_U64 : DS_1A1D_RET_mc<"ds_add_rtn_u64", VGPROp_64>;
+defm DS_SUB_RTN_U64 : DS_1A1D_RET_mc<"ds_sub_rtn_u64", VGPROp_64>;
+defm DS_RSUB_RTN_U64 : DS_1A1D_RET_mc<"ds_rsub_rtn_u64", VGPROp_64>;
+defm DS_INC_RTN_U64 : DS_1A1D_RET_mc<"ds_inc_rtn_u64", VGPROp_64>;
+defm DS_DEC_RTN_U64 : DS_1A1D_RET_mc<"ds_dec_rtn_u64", VGPROp_64>;
+defm DS_MIN_RTN_I64: DS_1A1D_RET_mc<"ds_min_rtn_i64", VGPROp_64>;
+defm DS_MAX_RTN_I64: DS_1A1D_RET_mc<"ds_max_rtn_i64", VGPROp_64>;
+defm DS_MIN_RTN_U64 : DS_1A1D_RET_mc<"ds_min_rtn_u64", VGPROp_64>;
+defm DS_MAX_RTN_U64 : DS_1A1D_RET_mc<"ds_max_rtn_u64", VGPROp_64>;
+defm DS_AND_RTN_B64: DS_1A1D_RET_mc<"ds_and_rtn_b64", VGPROp_64>;
+defm DS_OR_RTN_B64 : DS_1A1D_RET_mc<"ds_or_rtn_b64", VGPROp_64>;
+defm DS_XOR_RTN_B64: DS_1A1D_RET_mc<"ds_xor_rtn_b64", VGPROp_64>;
defm DS_MSKOR_RTN_B64 : DS_1A2D_RET_mc<"ds_mskor_rtn_b64", VGPROp_64>;
defm DS_CMPST_RTN_B64 : DS_1A2D_RET_mc<"ds_cmpst_rtn_b64", VGPROp_64>;
defm DS_CMPST_RTN_F64 : DS_1A2D_RET_mc<"ds_cmpst_rtn_f64", VGPROp_64>;
-defm DS_MIN_RTN_F64: DS_1A1D_RET_mc<"ds_min_rtn_f64", AVLdSt_64>;
-defm DS_MAX_RTN_F64: DS_1A1D_RET_mc<"ds_max_rtn_f64", AVLdSt_64>;
+defm DS_MIN_RTN_F64: DS_1A1D_RET_mc<"ds_min_rtn_f64", VGPROp_64>;
+defm DS_MAX_RTN_F64: DS_1A1D_RET_mc<"ds_max_rtn_f64", VGPROp_64>;
-defm DS_WRXCHG_RTN_B64 : DS_1A1D_RET_mc<"ds_wrxchg_rtn_b64", AVLdSt_64>;
+defm DS_WRXCHG_RTN_B64 : DS_1A1D_RET_mc<"ds_wrxchg_rtn_b64", VGPROp_64>;
defm DS_WRXCHG2_RTN_B64 : DS_1A2D_Off8_RET_mc<"ds_wrxchg2_rtn_b64",
VGPROp_128, VGPROp_64>;
defm DS_WRXCHG2ST64_RTN_B64 : DS_1A2D_Off8_RET_mc<"ds_wrxchg2st64_rtn_b64",
VGPROp_128, VGPROp_64>;
@@ -805,7 +810,7 @@ def DS_ORDERED_COUNT : DS_1A_RET_GDS<"ds_ordered_count">;
let SubtargetPredicate = isGFX7Plus in {
defm DS_WRAP_RTN_B32 : DS_1A2D_RET_mc<"ds_wrap_rtn_b32", VGPROp_32>;
-defm DS_CONDXCHG32_RTN_B64 : DS_1A1D_RET_mc<"ds_condxchg32_rtn_b64",
AVLdSt_64>;
+defm DS_CONDXCHG32_RTN_B64 : DS_1A1D_RET_mc<"ds_c
[llvm-branch-commits] [llvm] [DA] Add test where ExactSIV misses dependency due to overflow (NFC) (PR #157085)
https://github.com/kasuga-fj created
https://github.com/llvm/llvm-project/pull/157085
None
>From 5aec6d19e65bf335469ba53e9d0d62c3842771b7 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Fri, 5 Sep 2025 11:32:54 +
Subject: [PATCH] [DA] Add test where ExactSIV misses dependency due to
overflow (NFC)
---
.../Analysis/DependenceAnalysis/ExactSIV.ll | 113 ++
1 file changed, 113 insertions(+)
diff --git a/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
b/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
index 0fe62991fede9..97b58c06303e6 100644
--- a/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
+++ b/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
@@ -807,3 +807,116 @@ for.body: ; preds
= %entry, %for.body
for.end: ; preds = %for.body
ret void
}
+
+;; FIXME: There is a loop-carried dependency between
+;; `A[-6*i + INT64_MAX]` and `A[3*i - 2]`. For example,
+;;
+;; - 1 = -6*max_i + INT64_MAX = 3*1 - 2
+;; - 4611686018427387901 = -6*768614336404564651 + INT64_MAX = 3*max_i - 2
+;;
+;; max_i = INT64_MAX/6 // 1537228672809129301
+;; for (long long i = 0; i <= max_i; i++) {
+;; A[-6*i + INT64_MAX] = 0;
+;; if (i)
+;; A[3*i - 2] = 1;
+;; }
+
+define void @exact14(ptr %A) {
+; CHECK-LABEL: 'exact14'
+; CHECK-NEXT: Src: store i8 0, ptr %idx.0, align 1 --> Dst: store i8 0, ptr
%idx.0, align 1
+; CHECK-NEXT:da analyze - none!
+; CHECK-NEXT: Src: store i8 0, ptr %idx.0, align 1 --> Dst: store i8 1, ptr
%idx.1, align 1
+; CHECK-NEXT:da analyze - none!
+; CHECK-NEXT: Src: store i8 1, ptr %idx.1, align 1 --> Dst: store i8 1, ptr
%idx.1, align 1
+; CHECK-NEXT:da analyze - none!
+;
+; CHECK-SIV-ONLY-LABEL: 'exact14'
+; CHECK-SIV-ONLY-NEXT: Src: store i8 0, ptr %idx.0, align 1 --> Dst: store i8
0, ptr %idx.0, align 1
+; CHECK-SIV-ONLY-NEXT:da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i8 0, ptr %idx.0, align 1 --> Dst: store i8
1, ptr %idx.1, align 1
+; CHECK-SIV-ONLY-NEXT:da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i8 1, ptr %idx.1, align 1 --> Dst: store i8
1, ptr %idx.1, align 1
+; CHECK-SIV-ONLY-NEXT:da analyze - none!
+;
+entry:
+ br label %loop.header
+
+loop.header:
+ %i = phi i64 [ 0, %entry ], [ %i.inc, %loop.latch ]
+ %subscript.0 = phi i64 [ 9223372036854775807, %entry ], [ %subscript.0.next,
%loop.latch ]
+ %subscript.1 = phi i64 [ -2, %entry ], [ %subscript.1.next, %loop.latch ]
+ %idx.0 = getelementptr inbounds i8, ptr %A, i64 %subscript.0
+ store i8 0, ptr %idx.0
+ %cond.store = icmp ne i64 %i, 0
+ br i1 %cond.store, label %if.store, label %loop.latch
+
+if.store:
+ %idx.1 = getelementptr inbounds i8, ptr %A, i64 %subscript.1
+ store i8 1, ptr %idx.1
+ br label %loop.latch
+
+loop.latch:
+ %i.inc = add nuw nsw i64 %i, 1
+ %subscript.0.next = add nuw nsw i64 %subscript.0, -6
+ %subscript.1.next = add nuw nsw i64 %subscript.1, 3
+ %exitcond = icmp sgt i64 %i.inc, 1537228672809129301
+ br i1 %exitcond, label %exit, label %loop.header
+
+exit:
+ ret void
+}
+
+;; A generalized version of @exact14.
+;;
+;; for (long long i = 0; i <= n / 6; i++) {
+;; A[-6*i + n] = 0;
+;; if (i)
+;; A[3*i - 2] = 1;
+;; }
+
+define void @exact15(ptr %A, i64 %n) {
+; CHECK-LABEL: 'exact15'
+; CHECK-NEXT: Src: store i8 0, ptr %idx.0, align 1 --> Dst: store i8 0, ptr
%idx.0, align 1
+; CHECK-NEXT:da analyze - none!
+; CHECK-NEXT: Src: store i8 0, ptr %idx.0, align 1 --> Dst: store i8 1, ptr
%idx.1, align 1
+; CHECK-NEXT:da analyze - output [*|<]!
+; CHECK-NEXT: Src: store i8 1, ptr %idx.1, align 1 --> Dst: store i8 1, ptr
%idx.1, align 1
+; CHECK-NEXT:da analyze - none!
+;
+; CHECK-SIV-ONLY-LABEL: 'exact15'
+; CHECK-SIV-ONLY-NEXT: Src: store i8 0, ptr %idx.0, align 1 --> Dst: store i8
0, ptr %idx.0, align 1
+; CHECK-SIV-ONLY-NEXT:da analyze - none!
+; CHECK-SIV-ONLY-NEXT: Src: store i8 0, ptr %idx.0, align 1 --> Dst: store i8
1, ptr %idx.1, align 1
+; CHECK-SIV-ONLY-NEXT:da analyze - output [*|<]!
+; CHECK-SIV-ONLY-NEXT: Src: store i8 1, ptr %idx.1, align 1 --> Dst: store i8
1, ptr %idx.1, align 1
+; CHECK-SIV-ONLY-NEXT:da analyze - none!
+;
+entry:
+ %bound = sdiv i64 %n, 6
+ %guard = icmp sgt i64 %n, 0
+ br i1 %guard, label %loop.header, label %exit
+
+loop.header:
+ %i = phi i64 [ 0, %entry ], [ %i.inc, %loop.latch ]
+ %subscript.0 = phi i64 [ %n, %entry ], [ %subscript.0.next, %loop.latch ]
+ %subscript.1 = phi i64 [ -2, %entry ], [ %subscript.1.next, %loop.latch ]
+ %idx.0 = getelementptr inbounds i8, ptr %A, i64 %subscript.0
+ store i8 0, ptr %idx.0
+ %cond.store = icmp ne i64 %i, 0
+ br i1 %cond.store, label %if.store, label %loop.latch
+
+if.store:
+ %idx.1 = getelementptr inbounds i8, ptr %A, i64 %subscript.1
+ store i8 1, ptr %idx.1
+ br label %loop.latch
+
+loop.latch:
+ %i.inc = add nuw nsw i64 %i, 1
+ %subscript.0.next = add
[llvm-branch-commits] [CGData] Rewrite tests to not use subshells (PR #157234)
https://github.com/boomanaiden154 created https://github.com/llvm/llvm-project/pull/157234 Subshells are not supported by lit's internal shell, which we want to enable by default for the LLVM test suite. Rewrite the tests in llvm/test/tools/llvm-cgdata to not use subshells so we can achieve this without losing any test coverage. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AArch64] Correctly disassemble TSB instruction (PR #156362)
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156362
>From 4789335841ea689bf447d427a971df6c4ba6325d Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:22:53 +0300
Subject: [PATCH] [AArch64] Correctly disassemble TSB instruction
TSB instruction has one operand, but the generated disassembler didn't
decode this operand. AArch64InstPrinter had a workaround for this.
This instruction can now be disassembled correctly.
---
llvm/lib/Target/AArch64/AArch64SystemOperands.td | 2 +-
llvm/lib/Target/AArch64/CMakeLists.txt | 3 +--
.../lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp | 7 ---
3 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
index 1b0e90b0e0dc3..65b752ed40c90 100644
--- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
+++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
@@ -362,7 +362,7 @@ def lookupTSBByName : SearchIndex {
let Key = ["Name"];
}
-def : TSB<"csync", 0>;
+def : TSB<"csync", 2>;
//===--===//
// PRFM (prefetch) instruction options.
diff --git a/llvm/lib/Target/AArch64/CMakeLists.txt
b/llvm/lib/Target/AArch64/CMakeLists.txt
index 833ce48ea1d7a..79b56ea9cf850 100644
--- a/llvm/lib/Target/AArch64/CMakeLists.txt
+++ b/llvm/lib/Target/AArch64/CMakeLists.txt
@@ -8,8 +8,7 @@ tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer
-asmwriternum=1)
tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler
- -ignore-non-decodable-operands
- -ignore-fully-defined-operands)
+ -ignore-non-decodable-operands)
tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
index 54b58e948daf2..2552ee3009338 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
@@ -365,13 +365,6 @@ void AArch64InstPrinter::printInst(const MCInst *MI,
uint64_t Address,
return;
}
- // Instruction TSB is specified as a one operand instruction, but 'csync' is
- // not encoded, so for printing it is treated as a special case here:
- if (Opcode == AArch64::TSB) {
-O << "\ttsb\tcsync";
-return;
- }
-
if (!PrintAliases || !printAliasInstr(MI, Address, STI, O))
printInstruction(MI, Address, STI, O);
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [AllocToken, Clang] Implement TypeHashPointerSplit mode (PR #156840)
https://github.com/melver updated https://github.com/llvm/llvm-project/pull/156840 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] release/21.x: [lldb][DWARFASTParserClang] Don't complete conflicting Objective-C++ types (#156681) (PR #156764)
Michael137 wrote: > @Michael137 we are waiting for someone to approve the PR, then it moves to > "needs merge". We usually want someone else than the requester to approve the > PR. In this case @labath was suggested above. Oh whoops, I thought @labath hit the review button. Makes sense! https://github.com/llvm/llvm-project/pull/156764 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [HLSL] Remove resource constructors with binding (PR #157008)
https://github.com/hekota created
https://github.com/llvm/llvm-project/pull/157008
The constructors are replaced by static `__createFromBinding` and
`__createFromImplicitBinding` methods on the resource class.
Depends on #157005
Part 4 of #154221
>From 65064e8915fdec0f216a7383ac589b5b72fad740 Mon Sep 17 00:00:00 2001
From: Helena Kotas
Date: Thu, 4 Sep 2025 20:54:20 -0700
Subject: [PATCH] [HLSL] Remove resource constructors with binding
Depends on #157005
Part 4 of #154221
---
clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp | 43 -
clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h | 2 -
clang/lib/Sema/HLSLExternalSemaSource.cpp | 4 +-
.../test/AST/HLSL/ByteAddressBuffers-AST.hlsl | 48 ---
.../test/AST/HLSL/StructuredBuffers-AST.hlsl | 48 ---
clang/test/AST/HLSL/TypedBuffers-AST.hlsl | 48 ---
6 files changed, 1 insertion(+), 192 deletions(-)
diff --git a/clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
b/clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
index a4d75155d8511..f1fdf84800fea 100644
--- a/clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
+++ b/clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
@@ -731,49 +731,6 @@ BuiltinTypeDeclBuilder
&BuiltinTypeDeclBuilder::addDefaultHandleConstructor() {
.finalize();
}
-BuiltinTypeDeclBuilder &
-BuiltinTypeDeclBuilder::addHandleConstructorFromBinding() {
- if (Record->isCompleteDefinition())
-return *this;
-
- using PH = BuiltinTypeMethodBuilder::PlaceHolder;
- ASTContext &AST = SemaRef.getASTContext();
- QualType HandleType = getResourceHandleField()->getType();
-
- return BuiltinTypeMethodBuilder(*this, "", AST.VoidTy, false, true)
- .addParam("registerNo", AST.UnsignedIntTy)
- .addParam("spaceNo", AST.UnsignedIntTy)
- .addParam("range", AST.IntTy)
- .addParam("index", AST.UnsignedIntTy)
- .addParam("name", AST.getPointerType(AST.CharTy.withConst()))
- .callBuiltin("__builtin_hlsl_resource_handlefrombinding", HandleType,
- PH::Handle, PH::_0, PH::_1, PH::_2, PH::_3, PH::_4)
- .assign(PH::Handle, PH::LastStmt)
- .finalize();
-}
-
-BuiltinTypeDeclBuilder &
-BuiltinTypeDeclBuilder::addHandleConstructorFromImplicitBinding() {
- if (Record->isCompleteDefinition())
-return *this;
-
- using PH = BuiltinTypeMethodBuilder::PlaceHolder;
- ASTContext &AST = SemaRef.getASTContext();
- QualType HandleType = getResourceHandleField()->getType();
-
- return BuiltinTypeMethodBuilder(*this, "", AST.VoidTy, false, true)
- .addParam("spaceNo", AST.UnsignedIntTy)
- .addParam("range", AST.IntTy)
- .addParam("index", AST.UnsignedIntTy)
- .addParam("orderId", AST.UnsignedIntTy)
- .addParam("name", AST.getPointerType(AST.CharTy.withConst()))
- .callBuiltin("__builtin_hlsl_resource_handlefromimplicitbinding",
- HandleType, PH::Handle, PH::_3, PH::_0, PH::_1, PH::_2,
- PH::_4)
- .assign(PH::Handle, PH::LastStmt)
- .finalize();
-}
-
BuiltinTypeDeclBuilder &BuiltinTypeDeclBuilder::addCreateFromBinding() {
if (Record->isCompleteDefinition())
return *this;
diff --git a/clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
b/clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
index ba860a9080cea..674a750d905fa 100644
--- a/clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
+++ b/clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
@@ -78,8 +78,6 @@ class BuiltinTypeDeclBuilder {
// Builtin types constructors
BuiltinTypeDeclBuilder &addDefaultHandleConstructor();
- BuiltinTypeDeclBuilder &addHandleConstructorFromBinding();
- BuiltinTypeDeclBuilder &addHandleConstructorFromImplicitBinding();
// Static create methods
BuiltinTypeDeclBuilder &addCreateFromBinding();
diff --git a/clang/lib/Sema/HLSLExternalSemaSource.cpp
b/clang/lib/Sema/HLSLExternalSemaSource.cpp
index a5d51ca7d35be..e3d5e8f1b6b52 100644
--- a/clang/lib/Sema/HLSLExternalSemaSource.cpp
+++ b/clang/lib/Sema/HLSLExternalSemaSource.cpp
@@ -133,9 +133,7 @@ static BuiltinTypeDeclBuilder setupBufferType(CXXRecordDecl
*Decl, Sema &S,
.addHandleMember(RC, IsROV, RawBuffer)
.addDefaultHandleConstructor()
.addCreateFromBinding()
- .addCreateFromImplicitBinding()
- .addHandleConstructorFromBinding()
- .addHandleConstructorFromImplicitBinding();
+ .addCreateFromImplicitBinding();
}
// This function is responsible for constructing the constraint expression for
diff --git a/clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
b/clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
index 93418e4877465..3aebb528ce126 100644
--- a/clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
+++ b/clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
@@ -112,53 +112,5 @@ RESOURCE Buffer;
// CHECK-NEXT: DeclRefExpr {{.*}} 'hlsl::[[RESOURCE]]' lvalue Var {{.*}} 'tmp'
'hlsl::[[RESOURCE]]'
// CHECK-NEXT: AlwaysInlineAttr {{.*}} Implicit always_inline
-// Constructor from binding
-
-// CHECK: CXXConstr
[llvm-branch-commits] [clang] release/21.x: [clang] Followup for constexpr-unknown potential constant expressions. (#151053) (PR #157098)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: None (llvmbot)
Changes
Backport c62284c43d519317979e3028f7c37f42eed6ac8e
Requested by: @frederick-vs-ja
---
Full diff: https://github.com/llvm/llvm-project/pull/157098.diff
3 Files Affected:
- (modified) clang/lib/AST/ByteCode/Pointer.cpp (-3)
- (modified) clang/lib/AST/ExprConstant.cpp (+81-60)
- (modified) clang/test/SemaCXX/constant-expression-p2280r4.cpp (+36-2)
``diff
diff --git a/clang/lib/AST/ByteCode/Pointer.cpp
b/clang/lib/AST/ByteCode/Pointer.cpp
index 159b4238a6a04..1e693f149f5b4 100644
--- a/clang/lib/AST/ByteCode/Pointer.cpp
+++ b/clang/lib/AST/ByteCode/Pointer.cpp
@@ -554,9 +554,6 @@ bool Pointer::hasSameBase(const Pointer &A, const Pointer
&B) {
if (A.isTypeidPointer() && B.isTypeidPointer())
return true;
- if (A.isIntegralPointer() || B.isIntegralPointer())
-return A.getSource() == B.getSource();
-
if (A.StorageKind != B.StorageKind)
return false;
diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp
index bfecae972940b..933be51b945df 100644
--- a/clang/lib/AST/ExprConstant.cpp
+++ b/clang/lib/AST/ExprConstant.cpp
@@ -465,49 +465,7 @@ namespace {
void diagnosePointerArithmetic(EvalInfo &Info, const Expr *E,
const APSInt &N);
/// Add N to the address of this subobject.
-void adjustIndex(EvalInfo &Info, const Expr *E, APSInt N) {
- if (Invalid || !N) return;
- uint64_t TruncatedN = N.extOrTrunc(64).getZExtValue();
- if (isMostDerivedAnUnsizedArray()) {
-diagnoseUnsizedArrayPointerArithmetic(Info, E);
-// Can't verify -- trust that the user is doing the right thing (or if
-// not, trust that the caller will catch the bad behavior).
-// FIXME: Should we reject if this overflows, at least?
-Entries.back() = PathEntry::ArrayIndex(
-Entries.back().getAsArrayIndex() + TruncatedN);
-return;
- }
-
- // [expr.add]p4: For the purposes of these operators, a pointer to a
- // nonarray object behaves the same as a pointer to the first element of
- // an array of length one with the type of the object as its element
type.
- bool IsArray = MostDerivedPathLength == Entries.size() &&
- MostDerivedIsArrayElement;
- uint64_t ArrayIndex = IsArray ? Entries.back().getAsArrayIndex()
-: (uint64_t)IsOnePastTheEnd;
- uint64_t ArraySize =
- IsArray ? getMostDerivedArraySize() : (uint64_t)1;
-
- if (N < -(int64_t)ArrayIndex || N > ArraySize - ArrayIndex) {
-// Calculate the actual index in a wide enough type, so we can include
-// it in the note.
-N = N.extend(std::max(N.getBitWidth() + 1, 65));
-(llvm::APInt&)N += ArrayIndex;
-assert(N.ugt(ArraySize) && "bounds check failed for in-bounds index");
-diagnosePointerArithmetic(Info, E, N);
-setInvalid();
-return;
- }
-
- ArrayIndex += TruncatedN;
- assert(ArrayIndex <= ArraySize &&
- "bounds check succeeded for out-of-bounds index");
-
- if (IsArray)
-Entries.back() = PathEntry::ArrayIndex(ArrayIndex);
- else
-IsOnePastTheEnd = (ArrayIndex != 0);
-}
+void adjustIndex(EvalInfo &Info, const Expr *E, APSInt N, const LValue
&LV);
};
/// A scope at the end of which an object can need to be destroyed.
@@ -1794,7 +1752,7 @@ namespace {
Offset = CharUnits::fromQuantity(Offset64 + ElemSize64 * Index64);
if (checkNullPointer(Info, E, CSK_ArrayIndex))
-Designator.adjustIndex(Info, E, Index);
+Designator.adjustIndex(Info, E, Index, *this);
clearIsNullPointer();
}
void adjustOffset(CharUnits N) {
@@ -1902,6 +1860,54 @@ namespace {
}
}
+void SubobjectDesignator::adjustIndex(EvalInfo &Info, const Expr *E, APSInt N,
+ const LValue &LV) {
+ if (Invalid || !N)
+return;
+ uint64_t TruncatedN = N.extOrTrunc(64).getZExtValue();
+ if (isMostDerivedAnUnsizedArray()) {
+diagnoseUnsizedArrayPointerArithmetic(Info, E);
+// Can't verify -- trust that the user is doing the right thing (or if
+// not, trust that the caller will catch the bad behavior).
+// FIXME: Should we reject if this overflows, at least?
+Entries.back() =
+PathEntry::ArrayIndex(Entries.back().getAsArrayIndex() + TruncatedN);
+return;
+ }
+
+ // [expr.add]p4: For the purposes of these operators, a pointer to a
+ // nonarray object behaves the same as a pointer to the first element of
+ // an array of length one with the type of the object as its element type.
+ bool IsArray =
+ MostDerivedPathLength == Entries.size() && MostDerivedIsArrayElement;
+ uint64_t ArrayIndex =
+ IsArray ? Entries.back().getAsArrayIndex() : (uint64_t)IsOnePastTheEnd;
+ uint64_t ArraySize = IsArray ? getMostDerivedArraySize() :
[llvm-branch-commits] [clang] release/21.x: [clang] Followup for constexpr-unknown potential constant expressions. (#151053) (PR #157098)
llvmbot wrote: @efriedma-quic What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/157098 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Clang] Introduce -fsanitize=alloc-token (PR #156839)
https://github.com/melver edited https://github.com/llvm/llvm-project/pull/156839 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Remove tablegen bz30254 workarounds from BUF instructions (PR #157054)
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/157054?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#157054** https://app.graphite.dev/github/pr/llvm/llvm-project/157054?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/157054?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#157053** https://app.graphite.dev/github/pr/llvm/llvm-project/157053?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/157054 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [Hexagon] Remove post-decoding instruction adjustments (PR #156359)
llvmbot wrote:
@llvm/pr-subscribers-backend-hexagon
Author: Sergei Barannikov (s-barannikov)
Changes
These instructions can now be fully decoded automatically.
---
Full diff: https://github.com/llvm/llvm-project/pull/156359.diff
4 Files Affected:
- (modified) llvm/lib/Target/Hexagon/CMakeLists.txt (+1-2)
- (modified) llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
(+13-52)
- (modified) llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td (+27-102)
- (modified) llvm/lib/Target/Hexagon/HexagonOperands.td (+8-2)
``diff
diff --git a/llvm/lib/Target/Hexagon/CMakeLists.txt
b/llvm/lib/Target/Hexagon/CMakeLists.txt
index b615536af03be..d758260a8ab5d 100644
--- a/llvm/lib/Target/Hexagon/CMakeLists.txt
+++ b/llvm/lib/Target/Hexagon/CMakeLists.txt
@@ -7,8 +7,7 @@ tablegen(LLVM HexagonGenAsmWriter.inc -gen-asm-writer)
tablegen(LLVM HexagonGenCallingConv.inc -gen-callingconv)
tablegen(LLVM HexagonGenDAGISel.inc -gen-dag-isel)
tablegen(LLVM HexagonGenDFAPacketizer.inc -gen-dfa-packetizer)
-tablegen(LLVM HexagonGenDisassemblerTables.inc -gen-disassembler
- -ignore-non-decodable-operands)
+tablegen(LLVM HexagonGenDisassemblerTables.inc -gen-disassembler)
tablegen(LLVM HexagonGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM HexagonGenMCCodeEmitter.inc -gen-emitter)
tablegen(LLVM HexagonGenRegisterInfo.inc -gen-register-info)
diff --git a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
index de10092cbe3c8..0639878c1256f 100644
--- a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
+++ b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
@@ -173,6 +173,19 @@ static DecodeStatus s32_0ImmDecoder(MCInst &MI, unsigned
tmp,
const MCDisassembler *Decoder);
static DecodeStatus brtargetDecoder(MCInst &MI, unsigned tmp, uint64_t Address,
const MCDisassembler *Decoder);
+
+static DecodeStatus n1ConstDecoder(MCInst &MI, const MCDisassembler *Decoder) {
+ MCContext &Ctx = Decoder->getContext();
+ MI.addOperand(MCOperand::createExpr(MCConstantExpr::create(-1, Ctx)));
+ return DecodeStatus::Success;
+}
+
+static DecodeStatus sgp10ConstDecoder(MCInst &MI,
+ const MCDisassembler *Decoder) {
+ MI.addOperand(MCOperand::createReg(Hexagon::SGP1_0));
+ return DecodeStatus::Success;
+}
+
#include "HexagonDepDecoders.inc"
#include "HexagonGenDisassemblerTables.inc"
@@ -349,21 +362,6 @@ void HexagonDisassembler::remapInstruction(MCInst &Instr)
const {
}
}
-static void adjustDuplex(MCInst &MI, MCContext &Context) {
- switch (MI.getOpcode()) {
- case Hexagon::SA1_setin1:
-MI.insert(MI.begin() + 1,
- MCOperand::createExpr(MCConstantExpr::create(-1, Context)));
-break;
- case Hexagon::SA1_dec:
-MI.insert(MI.begin() + 2,
- MCOperand::createExpr(MCConstantExpr::create(-1, Context)));
-break;
- default:
-break;
- }
-}
-
DecodeStatus HexagonDisassembler::getSingleInstruction(MCInst &MI, MCInst &MCB,
ArrayRef Bytes,
uint64_t Address,
@@ -468,12 +466,10 @@ DecodeStatus
HexagonDisassembler::getSingleInstruction(MCInst &MI, MCInst &MCB,
CurrentExtender = TmpExtender;
if (Result != DecodeStatus::Success)
return DecodeStatus::Fail;
-adjustDuplex(*MILow, getContext());
Result = decodeInstruction(
DecodeHigh, *MIHigh, (Instruction >> 16) & 0x1fff, Address, this, STI);
if (Result != DecodeStatus::Success)
return DecodeStatus::Fail;
-adjustDuplex(*MIHigh, getContext());
MCOperand OPLow = MCOperand::createInst(MILow);
MCOperand OPHigh = MCOperand::createInst(MIHigh);
MI.addOperand(OPLow);
@@ -499,41 +495,6 @@ DecodeStatus
HexagonDisassembler::getSingleInstruction(MCInst &MI, MCInst &MCB,
}
- switch (MI.getOpcode()) {
- case Hexagon::J4_cmpeqn1_f_jumpnv_nt:
- case Hexagon::J4_cmpeqn1_f_jumpnv_t:
- case Hexagon::J4_cmpeqn1_fp0_jump_nt:
- case Hexagon::J4_cmpeqn1_fp0_jump_t:
- case Hexagon::J4_cmpeqn1_fp1_jump_nt:
- case Hexagon::J4_cmpeqn1_fp1_jump_t:
- case Hexagon::J4_cmpeqn1_t_jumpnv_nt:
- case Hexagon::J4_cmpeqn1_t_jumpnv_t:
- case Hexagon::J4_cmpeqn1_tp0_jump_nt:
- case Hexagon::J4_cmpeqn1_tp0_jump_t:
- case Hexagon::J4_cmpeqn1_tp1_jump_nt:
- case Hexagon::J4_cmpeqn1_tp1_jump_t:
- case Hexagon::J4_cmpgtn1_f_jumpnv_nt:
- case Hexagon::J4_cmpgtn1_f_jumpnv_t:
- case Hexagon::J4_cmpgtn1_fp0_jump_nt:
- case Hexagon::J4_cmpgtn1_fp0_jump_t:
- case Hexagon::J4_cmpgtn1_fp1_jump_nt:
- case Hexagon::J4_cmpgtn1_fp1_jump_t:
- case Hexagon::J4_cmpgtn1_t_jumpnv_nt:
- case Hexagon::J4_cmpgtn1_t_jumpnv_t:
- case Hexagon::J4_cmpgtn1_tp0_jump_nt:
- case Hexagon::J4_cmpgtn1_tp0_jump_t:
- case Hexagon::J4_cmpgtn1_tp1_jump_nt:
- case Hexagon::J4_c
[llvm-branch-commits] [Clang] Introduce -fsanitize=alloc-token (PR #156844)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Marco Elver (melver)
Changes
Introduce the `-fsanitize=alloc-token` command-line option, hooking up
the AllocToken pass -- it provides allocation tokens to compatible
runtime allocators, enabling different heap organization strategies,
e.g. hardening schemes based on heap partitioning.
The instrumentation rewrites standard allocation calls into variants
that accept an additional `uint64_t token_id` argument. For example,
calls to `malloc(size)` become `__alloc_token_malloc(size, token_id)`,
and a C++ `new MyType` expression will call `__alloc_token_Znwm(size,
token_id)`.
Currently untyped allocation calls do not yet have `!alloc_token_hint`
metadata, and therefore receive the fallback token only. This will be
fixed in subsequent changes through best-effort type-inference.
One benefit of the instrumentation approach is that it can be applied
transparently to large codebases, and scales in deployment as other
sanitizers.
Similarly to other sanitizers, instrumentation can selectively be
controlled using `__attribute__((no_sanitize("alloc-token")))`. Support
for sanitizer ignorelists to disable instrumentation for specific
functions or source files is implemented.
See clang/docs/AllocToken.rst for more usage instructions.
Link:
https://discourse.llvm.org/t/rfc-a-framework-for-allocator-partitioning-hints/87434
---
Patch is 40.74 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/156844.diff
25 Files Affected:
- (added) clang/docs/AllocToken.rst (+172)
- (modified) clang/docs/ReleaseNotes.rst (+4)
- (modified) clang/docs/UsersManual.rst (+2)
- (modified) clang/docs/index.rst (+1)
- (modified) clang/include/clang/Basic/CodeGenOptions.def (+2)
- (modified) clang/include/clang/Basic/CodeGenOptions.h (+3)
- (modified) clang/include/clang/Basic/Sanitizers.def (+3)
- (modified) clang/include/clang/Driver/Options.td (+17)
- (modified) clang/include/clang/Driver/SanitizerArgs.h (+3-1)
- (modified) clang/lib/CodeGen/BackendUtil.cpp (+20)
- (modified) clang/lib/CodeGen/CGExpr.cpp (+16)
- (modified) clang/lib/CodeGen/CGExprCXX.cpp (+10-5)
- (modified) clang/lib/CodeGen/CodeGenFunction.cpp (+2)
- (modified) clang/lib/CodeGen/CodeGenFunction.h (+3)
- (modified) clang/lib/Driver/SanitizerArgs.cpp (+27-4)
- (modified) clang/lib/Driver/ToolChains/BareMetal.cpp (+1)
- (modified) clang/lib/Driver/ToolChains/Clang.cpp (+2)
- (modified) clang/lib/Driver/ToolChains/Linux.cpp (+1)
- (modified) clang/lib/Frontend/CompilerInvocation.cpp (+14)
- (modified) clang/lib/Frontend/InitPreprocessor.cpp (+2)
- (added) clang/test/CodeGen/alloc-token-ignorelist.c (+27)
- (added) clang/test/CodeGen/alloc-token.c (+45)
- (added) clang/test/CodeGenCXX/alloc-token.cpp (+157)
- (added) clang/test/Driver/fsanitize-alloc-token.c (+43)
- (added) clang/test/Preprocessor/alloc_token.cpp (+10)
``diff
diff --git a/clang/docs/AllocToken.rst b/clang/docs/AllocToken.rst
new file mode 100644
index 0..a7bb8877f371b
--- /dev/null
+++ b/clang/docs/AllocToken.rst
@@ -0,0 +1,172 @@
+=
+Allocation Tokens
+=
+
+.. contents::
+ :local:
+
+Introduction
+
+
+Clang provides support for allocation tokens to enable allocator-level heap
+organization strategies. Clang assigns mode-dependent token IDs to allocation
+calls; the runtime behavior depends entirely on the implementation of a
+compatible memory allocator.
+
+Possible allocator strategies include:
+
+* **Security Hardening**: Placing allocations into separate, isolated heap
+ partitions. For example, separating pointer-containing types from raw data
+ can mitigate exploits that rely on overflowing a primitive buffer to corrupt
+ object metadata.
+
+* **Memory Layout Optimization**: Grouping related allocations to improve data
+ locality and cache utilization.
+
+* **Custom Allocation Policies**: Applying different management strategies to
+ different partitions.
+
+Token Assignment Mode
+=
+
+The default mode to calculate tokens is:
+
+* *TypeHash* (mode=2): This mode assigns a token ID based on the hash of
+ the allocated type's name.
+
+Other token ID assignment modes are supported, but they may be subject to
+change or removal. These may (experimentally) be selected with ``-mllvm
+-alloc-token-mode=``:
+
+* *Random* (mode=1): This mode assigns a statically-determined random token ID
+ to each allocation site.
+
+* *Increment* (mode=0): This mode assigns a simple, incrementally increasing
+ token ID to each allocation site.
+
+Allocation Token Instrumentation
+
+
+To enable instrumentation of allocation functions, code can be compiled with
+the ``-fsanitize=alloc-token`` flag:
+
+.. code-block:: console
+
+% clang++ -fsanitize=alloc-token example.cc
+
+The instrumentation transforms allocation calls to include a token ID. For
+example:
+
+.. code-bl
[llvm-branch-commits] [clang] [HLSL] Use static create methods to initialize resources in arrays (PR #157005)
https://github.com/hekota created
https://github.com/llvm/llvm-project/pull/157005
Use static methods __createFromBinding and __createFromImplicitBinding to
initialize resources in resource arrays.
Depends on #156544
Part 3 of #154221
>From 7e9d4c5d6757062b53c5fe99cf01636441af93af Mon Sep 17 00:00:00 2001
From: Helena Kotas
Date: Thu, 4 Sep 2025 10:12:01 -0700
Subject: [PATCH 1/2] [HLSL] Use static create methods to initialize resources
in arrays
Use static methods __createFromBinding and __createFromImplicitBinding to
initialize
resources in resource arrays.
Depends on #156544
Part 3 of #154221
---
clang/include/clang/Sema/SemaHLSL.h | 5 -
clang/lib/CodeGen/CGHLSLRuntime.cpp | 126 ++
clang/lib/Sema/SemaHLSL.cpp | 92 -
.../resources/res-array-global-dyn-index.hlsl | 9 +-
.../resources/res-array-global-multi-dim.hlsl | 28 ++--
.../res-array-global-subarray-many.hlsl | 47 ---
.../res-array-global-subarray-one.hlsl| 23 ++--
.../resources/res-array-global.hlsl | 43 +++---
.../hlsl_resource_handle_attrs.hlsl | 4 +-
9 files changed, 183 insertions(+), 194 deletions(-)
diff --git a/clang/include/clang/Sema/SemaHLSL.h
b/clang/include/clang/Sema/SemaHLSL.h
index 5cbe1b658f5cd..86265a51fb252 100644
--- a/clang/include/clang/Sema/SemaHLSL.h
+++ b/clang/include/clang/Sema/SemaHLSL.h
@@ -241,11 +241,6 @@ class SemaHLSL : public SemaBase {
bool initGlobalResourceDecl(VarDecl *VD);
bool initGlobalResourceArrayDecl(VarDecl *VD);
- void createResourceRecordCtorArgs(const Type *ResourceTy, StringRef VarName,
-HLSLResourceBindingAttr *RBA,
-HLSLVkBindingAttr *VkBinding,
-uint32_t ArrayIndex,
-llvm::SmallVectorImpl &Args);
};
} // namespace clang
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index d27f3781c69a3..fa365f419cdb1 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -13,6 +13,7 @@
//===--===//
#include "CGHLSLRuntime.h"
+#include "Address.h"
#include "CGDebugInfo.h"
#include "CodeGenFunction.h"
#include "CodeGenModule.h"
@@ -38,6 +39,7 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormatVariadic.h"
#include
+#include
using namespace clang;
using namespace CodeGen;
@@ -148,14 +150,22 @@ static Value *buildNameForResource(llvm::StringRef
BaseName,
.getPointer();
}
-static void createResourceCtorArgs(CodeGenModule &CGM, CXXConstructorDecl *CD,
- llvm::Value *ThisPtr, llvm::Value *Range,
- llvm::Value *Index, StringRef Name,
- HLSLResourceBindingAttr *RBA,
- HLSLVkBindingAttr *VkBinding,
- CallArgList &Args) {
+static CXXMethodDecl *lookupMethod(CXXRecordDecl *Record, StringRef Name,
+ StorageClass SC = SC_None) {
+ for (auto *Method : Record->methods()) {
+if (Method->getStorageClass() == SC && Method->getName() == Name)
+ return Method;
+ }
+ return nullptr;
+}
+
+static CXXMethodDecl *lookupResourceInitMethodAndSetupArgs(
+CodeGenModule &CGM, CXXRecordDecl *ResourceDecl, llvm::Value *Range,
+llvm::Value *Index, StringRef Name, HLSLResourceBindingAttr *RBA,
+HLSLVkBindingAttr *VkBinding, CallArgList &Args) {
assert((VkBinding || RBA) && "at least one a binding attribute expected");
+ ASTContext &AST = CGM.getContext();
std::optional RegisterSlot;
uint32_t SpaceNo = 0;
if (VkBinding) {
@@ -167,44 +177,57 @@ static void createResourceCtorArgs(CodeGenModule &CGM,
CXXConstructorDecl *CD,
SpaceNo = RBA->getSpaceNumber();
}
- ASTContext &AST = CD->getASTContext();
+ CXXMethodDecl *CreateMethod = nullptr;
Value *NameStr = buildNameForResource(Name, CGM);
Value *Space = llvm::ConstantInt::get(CGM.IntTy, SpaceNo);
- Args.add(RValue::get(ThisPtr), CD->getThisType());
if (RegisterSlot.has_value()) {
// explicit binding
auto *RegSlot = llvm::ConstantInt::get(CGM.IntTy, RegisterSlot.value());
Args.add(RValue::get(RegSlot), AST.UnsignedIntTy);
-Args.add(RValue::get(Space), AST.UnsignedIntTy);
-Args.add(RValue::get(Range), AST.IntTy);
-Args.add(RValue::get(Index), AST.UnsignedIntTy);
-
+CreateMethod = lookupMethod(ResourceDecl, "__createFromBinding",
SC_Static);
} else {
// implicit binding
-assert(RBA && "missing implicit binding attribute");
auto *OrderID =
llvm::ConstantInt::get(CGM.IntTy, RBA->getImplicitBindingOrderID());
-Args.add(RValue::get(Space), AST.UnsignedIntTy);
-Args.add(RValue::get(Range), AST.IntTy);
[llvm-branch-commits] [clang] [HLSL] Use static create methods to initialize resources in arrays (PR #157005)
https://github.com/hekota ready_for_review https://github.com/llvm/llvm-project/pull/157005 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MC] Invoke run line in stdin.s using bash (PR #157232)
https://github.com/boomanaiden154 created https://github.com/llvm/llvm-project/pull/157232 This test needs to use subshells so that the file descriptor offset gets moved before llvm-mc starts writing output. I cannot get this to trigger the assertion (after reverting the code fixes that fixed this behavior) without using subshells. Various other forms of redirection leave the offset at zero. All systems used for testing LLVM will have a bash binary given that's what is used by llvm-lit currently. This does not address the problem of test coverage on more esoteric platforms like Fuchsia, but running this one test on more esoteric platforms probably does not matter much. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [IR] Add `MD_prof` to the `Keep` list of `dropUBImplyingAttrsAndMetadata` (PR #154635)
https://github.com/mtrofin updated
https://github.com/llvm/llvm-project/pull/154635
>From 6f1eaf036babb9f8a8f555aa6b930f60ef977ec6 Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Wed, 20 Aug 2025 15:04:49 -0700
Subject: [PATCH] [Local] preserve `MD_prof` in `hoistAllInstructionsInto`
---
llvm/lib/IR/Instruction.cpp | 7 ---
llvm/lib/Transforms/Scalar/LICM.cpp | 5 +
.../Transforms/SimplifyCFG/PhiBlockMerge.ll | 21 ---
3 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/llvm/lib/IR/Instruction.cpp b/llvm/lib/IR/Instruction.cpp
index 5e87b5ff941ad..c1fafd759b5ab 100644
--- a/llvm/lib/IR/Instruction.cpp
+++ b/llvm/lib/IR/Instruction.cpp
@@ -553,16 +553,17 @@ void Instruction::dropUBImplyingAttrsAndUnknownMetadata(
}
void Instruction::dropUBImplyingAttrsAndMetadata(ArrayRef Keep) {
- // !annotation metadata does not impact semantics.
+ // !annotation and !prof metadata does not impact semantics.
// !range, !nonnull and !align produce poison, so they are safe to speculate.
// !noundef and various AA metadata must be dropped, as it generally produces
// immediate undefined behavior.
static const unsigned KnownIDs[] = {
LLVMContext::MD_annotation, LLVMContext::MD_range,
- LLVMContext::MD_nonnull, LLVMContext::MD_align};
+ LLVMContext::MD_nonnull, LLVMContext::MD_align, LLVMContext::MD_prof};
SmallVector KeepIDs;
KeepIDs.reserve(Keep.size() + std::size(KnownIDs));
- append_range(KeepIDs, KnownIDs);
+ append_range(KeepIDs, (!ProfcheckDisableMetadataFixes ? KnownIDs
+: drop_end(KnownIDs)));
append_range(KeepIDs, Keep);
dropUBImplyingAttrsAndUnknownMetadata(KeepIDs);
}
diff --git a/llvm/lib/Transforms/Scalar/LICM.cpp
b/llvm/lib/Transforms/Scalar/LICM.cpp
index e157cc9212769..973a8aa0002c2 100644
--- a/llvm/lib/Transforms/Scalar/LICM.cpp
+++ b/llvm/lib/Transforms/Scalar/LICM.cpp
@@ -1705,10 +1705,7 @@ static void hoist(Instruction &I, const DominatorTree
*DT, const Loop *CurLoop,
// time in isGuaranteedToExecute if we don't actually have anything to
// drop. It is a compile time optimization, not required for
correctness.
!SafetyInfo->isGuaranteedToExecute(I, DT, CurLoop)) {
-if (ProfcheckDisableMetadataFixes)
- I.dropUBImplyingAttrsAndMetadata();
-else
- I.dropUBImplyingAttrsAndMetadata({LLVMContext::MD_prof});
+I.dropUBImplyingAttrsAndMetadata();
}
if (isa(I))
diff --git a/llvm/test/Transforms/SimplifyCFG/PhiBlockMerge.ll
b/llvm/test/Transforms/SimplifyCFG/PhiBlockMerge.ll
index 2c5889a981db2..08397b5755a3f 100644
--- a/llvm/test/Transforms/SimplifyCFG/PhiBlockMerge.ll
+++ b/llvm/test/Transforms/SimplifyCFG/PhiBlockMerge.ll
@@ -1,20 +1,21 @@
-; NOTE: Assertions have been autogenerated by update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --check-globals all --version 5
; Test merging of blocks that only have PHI nodes in them
;
; RUN: opt < %s -passes=simplifycfg
-simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
;
define i32 @test(i1 %a, i1 %b) {
-; CHECK-LABEL: @test(
-; CHECK: M:
-; CHECK-NEXT:[[DOT:%.*]] = select i1 %b, i32 0, i32 1
-; CHECK-NEXT:[[W:%.*]] = select i1 %a, i32 2, i32 [[DOT]]
+; CHECK-LABEL: define i32 @test(
+; CHECK-SAME: i1 [[A:%.*]], i1 [[B:%.*]]) {
+; CHECK-NEXT: [[M:.*:]]
+; CHECK-NEXT:[[SPEC_SELECT:%.*]] = select i1 [[B]], i32 0, i32 1, !prof
[[PROF0:![0-9]+]]
+; CHECK-NEXT:[[W:%.*]] = select i1 [[A]], i32 2, i32 [[SPEC_SELECT]],
!prof [[PROF1:![0-9]+]]
; CHECK-NEXT:[[R:%.*]] = add i32 [[W]], 1
; CHECK-NEXT:ret i32 [[R]]
;
- br i1 %a, label %M, label %O
+ br i1 %a, label %M, label %O, !prof !0
O: ; preds = %0
- br i1 %b, label %N, label %Q
+ br i1 %b, label %N, label %Q, !prof !1
Q: ; preds = %O
br label %N
N: ; preds = %Q, %O
@@ -27,3 +28,9 @@ M: ; preds = %N, %0
ret i32 %R
}
+!0 = !{!"branch_weights", i32 11, i32 7}
+!1 = !{!"branch_weights", i32 3, i32 5}
+;.
+; CHECK: [[PROF0]] = !{!"branch_weights", i32 3, i32 5}
+; CHECK: [[PROF1]] = !{!"branch_weights", i32 11, i32 7}
+;.
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[llvm-branch-commits] [llvm] release/21.x: [X86] Only fold AND/ANDNP back to VSELECT if we know the predicated mask select is legal (#156663) (PR #157047)
llvmbot wrote:
@llvm/pr-subscribers-backend-x86
Author: None (llvmbot)
Changes
Backport 86879d46f6476386dc07772ede83cd43b6ddd739
Requested by: @RKSimon
---
Full diff: https://github.com/llvm/llvm-project/pull/157047.diff
2 Files Affected:
- (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+4)
- (added) llvm/test/CodeGen/X86/pr156256.ll (+25)
``diff
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 578519b1cc3c9..86877be48eca8 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -51775,6 +51775,8 @@ static SDValue combineAnd(SDNode *N, SelectionDAG &DAG,
SDValue X, Y;
EVT CondVT = VT.changeVectorElementType(MVT::i1);
if (TLI.isTypeLegal(VT) && TLI.isTypeLegal(CondVT) &&
+(VT.is512BitVector() || Subtarget.hasVLX()) &&
+(VT.getScalarSizeInBits() >= 32 || Subtarget.hasBWI()) &&
sd_match(N, m_And(m_Value(X),
m_OneUse(m_SExt(m_AllOf(
m_Value(Y), m_SpecificVT(CondVT),
@@ -55329,6 +55331,8 @@ static SDValue combineAndnp(SDNode *N, SelectionDAG
&DAG,
SDValue Src = N0.getOperand(0);
EVT SrcVT = Src.getValueType();
if (Src.getOpcode() == ISD::SETCC && SrcVT.getScalarType() == MVT::i1 &&
+(VT.is512BitVector() || Subtarget.hasVLX()) &&
+(VT.getScalarSizeInBits() >= 32 || Subtarget.hasBWI()) &&
TLI.isTypeLegal(SrcVT) && N0.hasOneUse() && Src.hasOneUse())
return DAG.getSelect(DL, VT, DAG.getNOT(DL, Src, SrcVT), N1,
getZeroVector(VT, Subtarget, DAG, DL));
diff --git a/llvm/test/CodeGen/X86/pr156256.ll
b/llvm/test/CodeGen/X86/pr156256.ll
new file mode 100644
index 0..13caa6fee5878
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr156256.ll
@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512dq | FileCheck %s
--check-prefix=AVX512
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512dq,+avx512vl |
FileCheck %s --check-prefix=AVX512VL
+
+define <16 x i16> @PR156256(<16 x i32> %a, <16 x i32> %b) {
+; AVX512-LABEL: PR156256:
+; AVX512: # %bb.0:
+; AVX512-NEXT:vpcmpnleud %zmm1, %zmm0, %k0
+; AVX512-NEXT:vpmovm2d %k0, %zmm0
+; AVX512-NEXT:vpmovdw %zmm0, %ymm0
+; AVX512-NEXT:vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
+; AVX512-NEXT:retq
+;
+; AVX512VL-LABEL: PR156256:
+; AVX512VL: # %bb.0:
+; AVX512VL-NEXT:vpcmpnleud %zmm1, %zmm0, %k0
+; AVX512VL-NEXT:vpmovm2d %k0, %zmm0
+; AVX512VL-NEXT:vpmovdw %zmm0, %ymm0
+; AVX512VL-NEXT:vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0
+; AVX512VL-NEXT:retq
+ %icmp = icmp ugt <16 x i32> %a, %b
+ %sext = sext <16 x i1> %icmp to <16 x i16>
+ %and = and <16 x i16> %sext, splat (i16 16256)
+ ret <16 x i16> %and
+}
``
https://github.com/llvm/llvm-project/pull/157047
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[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)
@@ -1716,6 +1727,7 @@ bool DependenceInfo::exactSIVtest(const SCEV *SrcCoeff, const SCEV *DstCoeff, // explore directions unsigned NewDirection = Dependence::DVEntry::NONE; APInt LowerDistance, UpperDistance; + // TODO: Overflow check may be needed. kasuga-fj wrote: I suspect this part could cause overflows, but not entirely sure... https://github.com/llvm/llvm-project/pull/157086 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Use lit internal shell by default (PR #157237)
github-actions[bot] wrote: :warning: Python code formatter, darker found issues in your code. :warning: You can test this locally with the following command: ``bash darker --check --diff -r origin/main...HEAD llvm/test/lit.cfg.py `` :warning: The reproduction instructions above might return results for more than one PR in a stack if you are using a stacked PR workflow. You can limit the results by changing `origin/main` to the base branch/commit you want to compare against. :warning: View the diff from darker here. ``diff --- lit.cfg.py 2025-09-06 06:54:45.00 + +++ lit.cfg.py 2025-09-06 06:57:27.455419 + @@ -35,13 +35,11 @@ (r"not FileCheck .*", "cat > /dev/null"), ] if config.enable_profcheck else [] ) -config.test_format = lit.formats.ShTest( -not use_lit_shell, extra_substitutions -) +config.test_format = lit.formats.ShTest(not use_lit_shell, extra_substitutions) # suffixes: A list of file extensions to treat as test files. This is overriden # by individual lit.local.cfg files in the test subdirectories. config.suffixes = [".ll", ".c", ".test", ".txt", ".s", ".mir", ".yaml", ".spv"] `` https://github.com/llvm/llvm-project/pull/157237 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [NFC] Leave a comment in `Local.cpp` about debug info & sample profiling (PR #155296)
https://github.com/mtrofin updated https://github.com/llvm/llvm-project/pull/155296 >From d8edb04b381fa8d955d23bfee0d3b322d359bf8a Mon Sep 17 00:00:00 2001 From: Mircea Trofin Date: Mon, 25 Aug 2025 21:04:05 + Subject: [PATCH] [NFC] Leave a comment in `Local.cpp` about debug info & sample profiling --- llvm/lib/Transforms/Utils/Local.cpp | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Transforms/Utils/Local.cpp b/llvm/lib/Transforms/Utils/Local.cpp index 2cfd70a1746c8..57dc1b38b8ec3 100644 --- a/llvm/lib/Transforms/Utils/Local.cpp +++ b/llvm/lib/Transforms/Utils/Local.cpp @@ -3342,8 +3342,11 @@ void llvm::hoistAllInstructionsInto(BasicBlock *DomBlock, Instruction *InsertPt, // retain their original debug locations (DILocations) and debug intrinsic // instructions. // - // Doing so would degrade the debugging experience and adversely affect the - // accuracy of profiling information. + // Doing so would degrade the debugging experience. + // + // FIXME: Issue #152767: debug info should also be the same as the + // original branch, **if** the user explicitly indicated that (for sampling + // PGO) // // Currently, when hoisting the instructions, we take the following actions: // - Remove their debug intrinsic instructions. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/21.x: [clang] Followup for constexpr-unknown potential constant expressions. (#151053) (PR #157098)
frederick-vs-ja wrote: > Buildbot is failing. Looks like > clang/test/SemaCXX/constant-expression-p2280r4.cpp may need to be adjusted? > Not sure. I guess we should cherry-pick another change first, which reduced warning for `-Winvalid-constexpr`. https://github.com/llvm/llvm-project/pull/157098 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] release/21.x: [libc++] Fix broken precondition of __bit_log2 (#155476) (PR #155932)
https://github.com/philnik777 approved this pull request. > > I'd really like to know what the "fallout" here is before we merge > > something into a release branch that has perfectly defined behaviour. > > The fallout is that some people are running with > `-fsanitize=unsigned-integer-overflow` and that started breaking. In our > case, some folks were even running with that sanitizer in production and that > caused runtime issues. > > I disagree that this has perfectly well defined behavior. That's a pedantic > way to view things. Sure, it is, but that doesn't make it not be the case. > We all agree that `log(0)` is undefined, and in fact our call to `log(0)` > returned something that made no sense. The code only happened to work because > we were then ignoring that invalid result due to other conditions (`first == > last` inside `__introsort`). I would agree that what we returned was not intentional, but that doesn't make it wrong or undefined. Anyways, my real objection here was that the underlying issue isn't addressed - namely that we have no coverage for the integer sanitizer. Since there is a party willing to fix that now I'm happy with merging this. https://github.com/llvm/llvm-project/pull/155932 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/21.x: [X86] Only fold AND/ANDNP back to VSELECT if we know the predicated mask select is legal (#156663) (PR #157047)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/157047 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [LifetimeSafety] Add support for GSL Pointer types (PR #154009)
@@ -570,6 +625,31 @@ class FactGenerator : public
ConstStmtVisitor {
return isPointerType(VD->getType());
}
+ /// Checks if a call-like expression creates a borrow by passing a value to a
+ /// reference parameter, creating an IssueFact if it does.
+ void handleFucntionCall(const Expr *Call, const FunctionDecl *FD,
+ ArrayRef Args) {
+if (!FD)
+ return;
+auto isCXXThisIdx = [&](int ArgIdx) {
+ return FD->isCXXClassMember() && ArgIdx == 0;
+};
ymand wrote:
nit: Why define a lambda here? It's not passed to anything and it's only called
once, so unclear why it's not inline.
https://github.com/llvm/llvm-project/pull/154009
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[llvm-branch-commits] [llvm] [AArch64][SME] Propagate desired ZA states in the MachineSMEABIPass (PR #149510)
https://github.com/MacDue updated
https://github.com/llvm/llvm-project/pull/149510
>From d07322bddea4f6286eef5cd29e8e06b0939f8b2e Mon Sep 17 00:00:00 2001
From: Benjamin Maxwell
Date: Tue, 15 Jul 2025 17:00:04 +
Subject: [PATCH] [AArch64][SME] Propagate desired ZA states in the
MachineSMEABIPass
This patch adds a propagation step to the MachineSMEABIPass that
propagates desired ZA states forwards/backwards (from predecessors to
successors, or vice versa).
The aim of this is to pick better ZA states for edge bundles, as when
many (or all) blocks in a bundle do not have a preferred ZA state, the
ZA state assigned to a bundle can be less than ideal.
An important case is nested loops, where only the inner loop has a
preferred ZA state. Here we'd like to propagate the ZA state up from the
inner loop to the outer loops (to avoid saves/restores in any loop).
Change-Id: I39f9c7d7608e2fa070be2fb88351b4d1d0079041
---
llvm/lib/Target/AArch64/MachineSMEABIPass.cpp | 101 +---
llvm/test/CodeGen/AArch64/sme-agnostic-za.ll | 9 +-
.../CodeGen/AArch64/sme-za-control-flow.ll| 85 +-
.../test/CodeGen/AArch64/sme-za-exceptions.ll | 36 +++---
.../AArch64/sme-za-lazy-save-buffer.ll| 110 ++
5 files changed, 163 insertions(+), 178 deletions(-)
diff --git a/llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
b/llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
index a96edf523ab1b..9aa43eea3d977 100644
--- a/llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
+++ b/llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
@@ -213,6 +213,11 @@ struct MachineSMEABI : public MachineFunctionPass {
/// E.g., ACTIVE -> LOCAL_SAVED will insert code required to save ZA.
void insertStateChanges();
+ /// Propagates desired states forwards (from predecessors -> successors) if
+ /// \p Forwards, otherwise, propagates backwards (from successors ->
+ /// predecessors).
+ void propagateDesiredStates(bool Forwards = true);
+
// Emission routines for private and shared ZA functions (using lazy saves).
void emitNewZAPrologue(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI);
@@ -287,8 +292,10 @@ struct MachineSMEABI : public MachineFunctionPass {
/// Contains the needed ZA state for each instruction in a block.
/// Instructions that do not require a ZA state are not recorded.
struct BlockInfo {
-ZAState FixedEntryState{ZAState::ANY};
SmallVector Insts;
+ZAState FixedEntryState{ZAState::ANY};
+ZAState DesiredIncomingState{ZAState::ANY};
+ZAState DesiredOutgoingState{ZAState::ANY};
LiveRegs PhysLiveRegsAtEntry = LiveRegs::None;
LiveRegs PhysLiveRegsAtExit = LiveRegs::None;
};
@@ -381,28 +388,80 @@ void MachineSMEABI::collectNeededZAStates(SMEAttrs
SMEFnAttrs) {
// Reverse vector (as we had to iterate backwards for liveness).
std::reverse(Block.Insts.begin(), Block.Insts.end());
+
+// Record the desired states on entry/exit of this block. These are the
+// states that would not incur a state transition.
+if (!Block.Insts.empty()) {
+ Block.DesiredIncomingState = Block.Insts.front().NeededState;
+ Block.DesiredOutgoingState = Block.Insts.back().NeededState;
+}
+ }
+}
+
+void MachineSMEABI::propagateDesiredStates(bool Forwards) {
+ // If `Forwards`, this propagates desired states from predecessors to
+ // successors, otherwise, this propagates states from successors to
+ // predecessors.
+ auto GetBlockState = [](BlockInfo &Block, bool Incoming) -> ZAState & {
+return Incoming ? Block.DesiredIncomingState : Block.DesiredOutgoingState;
+ };
+
+ SmallVector Worklist;
+ for (auto [BlockID, BlockInfo] : enumerate(State.Blocks)) {
+if (!isLegalEdgeBundleZAState(GetBlockState(BlockInfo, Forwards)))
+ Worklist.push_back(MF->getBlockNumbered(BlockID));
+ }
+
+ while (!Worklist.empty()) {
+MachineBasicBlock *MBB = Worklist.pop_back_val();
+auto &BlockInfo = State.Blocks[MBB->getNumber()];
+
+// Pick a legal edge bundle state that matches the majority of
+// predecessors/successors.
+int StateCounts[ZAState::NUM_ZA_STATE] = {0};
+for (MachineBasicBlock *PredOrSucc :
+ Forwards ? predecessors(MBB) : successors(MBB)) {
+ auto &PredOrSuccBlockInfo = State.Blocks[PredOrSucc->getNumber()];
+ auto ZAState = GetBlockState(PredOrSuccBlockInfo, !Forwards);
+ if (isLegalEdgeBundleZAState(ZAState))
+StateCounts[ZAState]++;
+}
+
+ZAState PropagatedState = ZAState(max_element(StateCounts) - StateCounts);
+auto &CurrentState = GetBlockState(BlockInfo, Forwards);
+if (PropagatedState != CurrentState) {
+ CurrentState = PropagatedState;
+ auto &OtherState = GetBlockState(BlockInfo, !Forwards);
+ // Propagate to the incoming/outgoing state if that is also "ANY".
+ if (OtherState == ZAState::ANY)
+OtherState = PropagatedState;
+ // Push any successors/predecessors that may need u
[llvm-branch-commits] [llvm] [AArch64] Correctly disassemble TSB instruction (PR #156362)
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156362
>From 4789335841ea689bf447d427a971df6c4ba6325d Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:22:53 +0300
Subject: [PATCH] [AArch64] Correctly disassemble TSB instruction
TSB instruction has one operand, but the generated disassembler didn't
decode this operand. AArch64InstPrinter had a workaround for this.
This instruction can now be disassembled correctly.
---
llvm/lib/Target/AArch64/AArch64SystemOperands.td | 2 +-
llvm/lib/Target/AArch64/CMakeLists.txt | 3 +--
.../lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp | 7 ---
3 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
index 1b0e90b0e0dc3..65b752ed40c90 100644
--- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
+++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
@@ -362,7 +362,7 @@ def lookupTSBByName : SearchIndex {
let Key = ["Name"];
}
-def : TSB<"csync", 0>;
+def : TSB<"csync", 2>;
//===--===//
// PRFM (prefetch) instruction options.
diff --git a/llvm/lib/Target/AArch64/CMakeLists.txt
b/llvm/lib/Target/AArch64/CMakeLists.txt
index 833ce48ea1d7a..79b56ea9cf850 100644
--- a/llvm/lib/Target/AArch64/CMakeLists.txt
+++ b/llvm/lib/Target/AArch64/CMakeLists.txt
@@ -8,8 +8,7 @@ tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer
-asmwriternum=1)
tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler
- -ignore-non-decodable-operands
- -ignore-fully-defined-operands)
+ -ignore-non-decodable-operands)
tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
index 54b58e948daf2..2552ee3009338 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
@@ -365,13 +365,6 @@ void AArch64InstPrinter::printInst(const MCInst *MI,
uint64_t Address,
return;
}
- // Instruction TSB is specified as a one operand instruction, but 'csync' is
- // not encoded, so for printing it is treated as a special case here:
- if (Opcode == AArch64::TSB) {
-O << "\ttsb\tcsync";
-return;
- }
-
if (!PrintAliases || !printAliasInstr(MI, Address, STI, O))
printInstruction(MI, Address, STI, O);
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
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[llvm-branch-commits] [llvm] AMDGPU: Remove tablegen bz30254 workarounds from BUF instructions (PR #157054)
https://github.com/jayfoad approved this pull request. This is great if it works, but I am surprised. I didn't work when I tried a few months ago. And bz30254 (#29602) is still open. https://github.com/llvm/llvm-project/pull/157054 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] release/21.x: [lldb][DataFormatter] Allow std::string formatters to match against custom allocators (#156050) (PR #157048)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/157048
Backport 4b362f152e58abd6aeed5d603a6dfc10115ed1ab
Requested by: @Michael137
>From 3217d4447fd2a605c0166dcb11e9d3b2b7d0f9ac Mon Sep 17 00:00:00 2001
From: Michael Buch
Date: Fri, 5 Sep 2025 09:24:50 +0100
Subject: [PATCH] [lldb][DataFormatter] Allow std::string formatters to match
against custom allocators (#156050)
This came up in https://github.com/llvm/llvm-project/issues/155691.
For `std::basic_string` our formatter matching logic required the
allocator template parameter to be a `std::allocator`. There is no
compelling reason (that I know of) why this would be required for us to
apply the existing formatter to the string. We don't check the
`allocator` parameter for other STL containers either. This meant that
`std::string` that used custom allocators wouldn't be formatted. This
patch relaxes the regex for `basic_string`.
(cherry picked from commit 4b362f152e58abd6aeed5d603a6dfc10115ed1ab)
---
.../Language/CPlusPlus/CPlusPlusLanguage.cpp | 50 +++
.../string/TestDataFormatterStdString.py | 6 +++
.../generic/string/main.cpp | 35 +
3 files changed, 58 insertions(+), 33 deletions(-)
diff --git a/lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
b/lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
index 9a869f3ea0289..862082f8a16ba 100644
--- a/lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
+++ b/lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
@@ -790,31 +790,27 @@ static void LoadLibCxxFormatters(lldb::TypeCategoryImplSP
cpp_category_sp) {
lldb_private::formatters::LibcxxStringSummaryProviderASCII,
"std::string summary provider",
"^std::__[[:alnum:]]+::basic_string, "
-"std::__[[:alnum:]]+::allocator >$",
+"std::__[[:alnum:]]+::char_traits,.*>$",
stl_summary_flags, true);
AddCXXSummary(cpp_category_sp,
lldb_private::formatters::LibcxxStringSummaryProviderASCII,
"std::string summary provider",
"^std::__[[:alnum:]]+::basic_string, "
-"std::__[[:alnum:]]+::allocator >$",
+"std::__[[:alnum:]]+::char_traits,.*>$",
stl_summary_flags, true);
AddCXXSummary(cpp_category_sp,
lldb_private::formatters::LibcxxStringSummaryProviderUTF16,
"std::u16string summary provider",
"^std::__[[:alnum:]]+::basic_string, "
-"std::__[[:alnum:]]+::allocator >$",
+"std::__[[:alnum:]]+::char_traits,.*>$",
stl_summary_flags, true);
AddCXXSummary(cpp_category_sp,
lldb_private::formatters::LibcxxStringSummaryProviderUTF32,
"std::u32string summary provider",
"^std::__[[:alnum:]]+::basic_string, "
-"std::__[[:alnum:]]+::allocator >$",
+"std::__[[:alnum:]]+::char_traits,.*>$",
stl_summary_flags, true);
AddCXXSummary(cpp_category_sp,
@@ -825,8 +821,7 @@ static void LoadLibCxxFormatters(lldb::TypeCategoryImplSP
cpp_category_sp) {
lldb_private::formatters::LibcxxWStringSummaryProvider,
"std::wstring summary provider",
"^std::__[[:alnum:]]+::basic_string, "
-"std::__[[:alnum:]]+::allocator >$",
+"std::__[[:alnum:]]+::char_traits,.*>$",
stl_summary_flags, true);
AddCXXSummary(cpp_category_sp,
@@ -1342,24 +1337,16 @@ static void RegisterStdStringSummaryProvider(
category_sp->AddTypeSummary(makeSpecifier(string_ty), summary_sp);
- // std::basic_string
category_sp->AddTypeSummary(
makeSpecifier(llvm::formatv("std::basic_string<{}>", char_ty).str()),
summary_sp);
- // std::basic_string,std::allocator >
- category_sp->AddTypeSummary(
-
makeSpecifier(llvm::formatv("std::basic_string<{0},std::char_traits<{0}>,"
- "std::allocator<{0}> >",
- char_ty)
-.str()),
- summary_sp);
- // std::basic_string, std::allocator >
+
category_sp->AddTypeSummary(
- makeSpecifier(
- llvm::formatv("std::basic_string<{0}, std::char_traits<{0}>, "
-"std::allocator<{0}> >",
+ std::make_shared(
+ llvm::formatv("^std::basic_string<{0}, ?std::char_traits<{0}>,.*>$",
char_ty)
- .str()),
+ .str(),
+ eFormatterMatchRegex),
summary_sp);
}
@@ -1382,20 +1369,17 @@ static void
LoadLibStdcppFormatters(lldb::TypeCategoryImplSP cpp_category_sp) {
cpp_category_sp->AddTypeSummary("std::__cxx11::string", eFormatterMatchExact,
string_summary_sp);
cpp_category_sp->AddTypeSummary(
- "std::_
[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)
https://github.com/kasuga-fj edited https://github.com/llvm/llvm-project/pull/157086 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [AllocToken, Clang] Infer type hints from sizeof expressions and casts (PR #156841)
https://github.com/melver edited https://github.com/llvm/llvm-project/pull/156841 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [MC] Rewrite stdin.s to use python (PR #157232)
MaskRay wrote: The previous, uglified lld tests, and this, make me believe that we should revisit the lit feature. I am not sure I agree with this test rewriting. https://github.com/llvm/llvm-project/pull/157232 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [RISCV] Remove post-decoding instruction adjustments (PR #156360)
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156360
>From 32e1a07943e330424c87c405e9021b61af005d73 Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:18:06 +0300
Subject: [PATCH] [RISCV] Remove post-decoding instruction adjustments
---
llvm/lib/Target/RISCV/CMakeLists.txt | 3 +--
.../RISCV/Disassembler/RISCVDisassembler.cpp | 25 ++-
llvm/lib/Target/RISCV/RISCVInstrFormatsC.td | 1 -
llvm/lib/Target/RISCV/RISCVInstrInfoC.td | 8 --
llvm/lib/Target/RISCV/RISCVInstrInfoXwch.td | 4 +++
5 files changed, 19 insertions(+), 22 deletions(-)
diff --git a/llvm/lib/Target/RISCV/CMakeLists.txt
b/llvm/lib/Target/RISCV/CMakeLists.txt
index 720361dc3da5b..531238ae85029 100644
--- a/llvm/lib/Target/RISCV/CMakeLists.txt
+++ b/llvm/lib/Target/RISCV/CMakeLists.txt
@@ -8,8 +8,7 @@ tablegen(LLVM RISCVGenCompressInstEmitter.inc
-gen-compress-inst-emitter)
tablegen(LLVM RISCVGenMacroFusion.inc -gen-macro-fusion-pred)
tablegen(LLVM RISCVGenDAGISel.inc -gen-dag-isel)
tablegen(LLVM RISCVGenDisassemblerTables.inc -gen-disassembler
- --specialize-decoders-per-bitwidth
- -ignore-non-decodable-operands)
+ --specialize-decoders-per-bitwidth)
tablegen(LLVM RISCVGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM RISCVGenMCCodeEmitter.inc -gen-emitter)
tablegen(LLVM RISCVGenMCPseudoLowering.inc -gen-pseudo-lowering)
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index b1b7ea5246fda..89df9d82f8780 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -46,8 +46,6 @@ class RISCVDisassembler : public MCDisassembler {
raw_ostream &CStream) const override;
private:
- void addSPOperands(MCInst &MI) const;
-
DecodeStatus getInstruction48(MCInst &Instr, uint64_t &Size,
ArrayRef Bytes, uint64_t Address,
raw_ostream &CStream) const;
@@ -196,6 +194,12 @@ static DecodeStatus DecodeFPR128RegisterClass(MCInst
&Inst, uint32_t RegNo,
return MCDisassembler::Success;
}
+static DecodeStatus DecodeSPRegisterClass(MCInst &Inst,
+ const MCDisassembler *Decoder) {
+ Inst.addOperand(MCOperand::createReg(RISCV::X2));
+ return MCDisassembler::Success;
+}
+
static DecodeStatus DecodeGPRNoX0RegisterClass(MCInst &Inst, uint32_t RegNo,
uint64_t Address,
const MCDisassembler *Decoder) {
@@ -600,15 +604,6 @@ static DecodeStatus decodeXTHeadMemPair(MCInst &Inst,
uint32_t Insn,
#include "RISCVGenDisassemblerTables.inc"
-// Add implied SP operand for C.*SP compressed instructions. The SP operand
-// isn't explicitly encoded in the instruction.
-void RISCVDisassembler::addSPOperands(MCInst &MI) const {
- const MCInstrDesc &MCID = MCII->get(MI.getOpcode());
- for (unsigned i = 0; i < MCID.getNumOperands(); i++)
-if (MCID.operands()[i].RegClass == RISCV::SPRegClassID)
- MI.insert(MI.begin() + i, MCOperand::createReg(RISCV::X2));
-}
-
namespace {
struct DecoderListEntry {
@@ -774,12 +769,8 @@ DecodeStatus RISCVDisassembler::getInstruction16(MCInst
&MI, uint64_t &Size,
LLVM_DEBUG(dbgs() << "Trying " << Entry.Desc << " table:\n");
DecodeStatus Result =
decodeInstruction(Entry.Table, MI, Insn, Address, this, STI);
-if (Result == MCDisassembler::Fail)
- continue;
-
-addSPOperands(MI);
-
-return Result;
+if (Result != MCDisassembler::Fail)
+ return Result;
}
return MCDisassembler::Fail;
diff --git a/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
b/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
index 209c3fae63f45..4c7cd05723ac8 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
@@ -54,7 +54,6 @@ class RVInst16CSS funct3, bits<2> opcode, dag outs,
dag ins,
: RVInst16 {
bits<10> imm;
bits<5> rs2;
- bits<5> rs1;
let Inst{15-13} = funct3;
let Inst{12-7} = imm{5-0};
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
index bfc766dfc27e5..9fc73662d9704 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
@@ -230,13 +230,17 @@ let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in
class CStackLoad funct3, string OpcodeStr,
DAGOperand cls, DAGOperand opnd>
: RVInst16CI;
+ OpcodeStr, "$rd, ${imm}(${rs1})"> {
+ bits<0> rs1;
+}
let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in
class CStackStore funct3, string OpcodeStr,
DAGOperand cls, DAGOperand opnd>
: RVInst16CSS;
+ OpcodeStr, "$rs2, ${imm}(${rs1})"> {
+ bit
[llvm-branch-commits] Utils: Inhibit load/store folding through phis for llvm.protected.field.ptr. (PR #151649)
nikic wrote: As this test runs the whole optimization pipeline, please move it to llvm/test/Transforms/PhaseOrdering. https://github.com/llvm/llvm-project/pull/151649 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][ptr] Add `ptr.ptr_diff` operation (PR #157354)
https://github.com/fabianmcg updated
https://github.com/llvm/llvm-project/pull/157354
>From 5e4b9843521939d926c7fcc4007d38a8f4c320a6 Mon Sep 17 00:00:00 2001
From: Fabian Mora <6982088+fabian...@users.noreply.github.com>
Date: Sun, 7 Sep 2025 17:33:04 +
Subject: [PATCH] [mlir][ptr] Add `ptr.ptr_diff` op
Thi patch introduces the `ptr.ptr_diff` operation for computing pointer
differences. The semantics of the operation are given by:
```
The `ptr_diff` operation computes the difference between two pointers,
returning an integer or index value representing the number of bytes
between them. This difference is always computed using signed arithmetic.
The operation supports both scalar and shaped types with value semantics:
- When both operands are scalar: produces a single difference value
- When both are shaped: performs element-wise subtraction,
shapes must be the same
The operation also supports the following flags:
- `none`: No flags are set.
- `nuw`: No Unsigned Wrap, if the subtraction causes an unsigned overflow,
the result is a poison value.
- `nsw`: No Signed Wrap, if the subtraction causes a signed overflow, the
result is a poison value.
NOTE: The pointer difference is calculated using an integer type specified
by the data layout. The final result will be sign-extended or truncated to
fit the result type as necessary.
```
This patch also adds translation to LLVM IR hooks for the `ptr_diff` op.
This translation uses the `ptrtoaddr` builder to compute only index
bits difference.
Example:
```mlir
llvm.func @ptr_diff_vector_i32(%ptrs1:
vector<8x!ptr.ptr<#llvm.address_space<0>>>, %ptrs2:
vector<8x!ptr.ptr<#llvm.address_space<0>>>) -> vector<8xi32> {
%diffs = ptr.ptr_diff %ptrs1, %ptrs2 :
vector<8x!ptr.ptr<#llvm.address_space<0>>> -> vector<8xi32>
llvm.return %diffs : vector<8xi32>
}
```
Translation to LLVM IR:
```llvm
define <8 x i32> @ptr_diff_vector_i32(<8 x ptr> %0, <8 x ptr> %1) {
%3 = ptrtoint <8 x ptr> %0 to <8 x i64>
%4 = ptrtoint <8 x ptr> %1 to <8 x i64>
%5 = sub <8 x i64> %3, %4
%6 = trunc <8 x i64> %5 to <8 x i32>
ret <8 x i32> %6
}
```
---
mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td | 10 ++
mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td| 57 +++
mlir/lib/Dialect/Ptr/IR/PtrDialect.cpp| 34 +++
.../Dialect/Ptr/PtrToLLVMIRTranslation.cpp| 37 +++
mlir/test/Dialect/Ptr/invalid.mlir| 8 ++
mlir/test/Dialect/Ptr/ops.mlir| 28 ++
mlir/test/Target/LLVMIR/ptr.mlir | 96 +++
7 files changed, 270 insertions(+)
diff --git a/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
b/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
index c169f48e573d0..c97bd04d32896 100644
--- a/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
+++ b/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
@@ -79,4 +79,14 @@ def Ptr_PtrAddFlags : I32Enum<"PtrAddFlags", "Pointer add
flags", [
let cppNamespace = "::mlir::ptr";
}
+//===--===//
+// Ptr diff flags enum properties.
+//===--===//
+
+def Ptr_PtrDiffFlags : I8BitEnum<"PtrDiffFlags", "Pointer difference flags", [
+I8BitEnumCase<"none", 0>, I8BitEnumCase<"nuw", 1>, I8BitEnumCase<"nsw", 2>
+ ]> {
+ let cppNamespace = "::mlir::ptr";
+}
+
#endif // PTR_ENUMS
diff --git a/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
b/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
index 468a3004d5c62..7735210e809e3 100644
--- a/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
+++ b/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
@@ -415,6 +415,63 @@ def Ptr_PtrAddOp : Pointer_Op<"ptr_add", [
}];
}
+//===--===//
+// PtrDiffOp
+//===--===//
+
+def Ptr_PtrDiffOp : Pointer_Op<"ptr_diff", [
+Pure, AllTypesMatch<["lhs", "rhs"]>, SameOperandsAndResultShape
+ ]> {
+ let summary = "Pointer difference operation";
+ let description = [{
+The `ptr_diff` operation computes the difference between two pointers,
+returning an integer or index value representing the number of bytes
+between them. This difference is always computed using signed arithmetic.
+
+The operation supports both scalar and shaped types with value semantics:
+- When both operands are scalar: produces a single difference value
+- When both are shaped: performs element-wise subtraction,
+ shapes must be the same
+
+The operation also supports the following flags:
+- `none`: No flags are set.
+- `nuw`: No Unsigned Wrap, if the subtraction causes an unsigned overflow,
+ the result is a poison value.
+- `nsw`: No Signed Wrap, if the subtraction causes a signed overflow, the
+ result is a poison value.
+
+NOTE: The pointer difference is calculated using an integer type specified
+by the data layout. The
[llvm-branch-commits] [mlir] [mlir][ptr] Add `ptr.ptr_diff` operation (PR #157354)
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[llvm-branch-commits] [mlir] [mlir][ptr] Add `ptr.ptr_diff` operation (PR #157354)
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[llvm-branch-commits] [llvm] [MC] Rewrite stdin.s to use python (PR #157232)
https://github.com/boomanaiden154 edited https://github.com/llvm/llvm-project/pull/157232 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] Utils: Inhibit load/store folding through phis for llvm.protected.field.ptr. (PR #151649)
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[llvm-branch-commits] Utils: Inhibit load/store folding through phis for llvm.protected.field.ptr. (PR #151649)
https://github.com/nikic edited https://github.com/llvm/llvm-project/pull/151649 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [MC] Invoke run line in stdin.s using bash (PR #157232)
https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/157232 >From d749f30964e57caa797b3df87ae88ffc3d4a2f54 Mon Sep 17 00:00:00 2001 From: Aiden Grossman Date: Sun, 7 Sep 2025 17:39:19 + Subject: [PATCH] feedback Created using spr 1.3.6 --- llvm/test/MC/COFF/stdin.py | 17 + llvm/test/MC/COFF/stdin.s | 1 - 2 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 llvm/test/MC/COFF/stdin.py delete mode 100644 llvm/test/MC/COFF/stdin.s diff --git a/llvm/test/MC/COFF/stdin.py b/llvm/test/MC/COFF/stdin.py new file mode 100644 index 0..8b7b6ae1fba13 --- /dev/null +++ b/llvm/test/MC/COFF/stdin.py @@ -0,0 +1,17 @@ +# RUN: echo "// comment" > %t.input +# RUN: which llvm-mc | %python %s %t + +import subprocess +import sys + +llvm_mc_binary = sys.stdin.readlines()[0].strip() +temp_file = sys.argv[1] +input_file = temp_file + ".input" + +with open(temp_file, "w") as mc_stdout: +mc_stdout.seek(4) +subprocess.run( +[llvm_mc_binary, "-filetype=obj", "-triple", "i686-pc-win32", input_file], +stdout=mc_stdout, +check=True, +) diff --git a/llvm/test/MC/COFF/stdin.s b/llvm/test/MC/COFF/stdin.s deleted file mode 100644 index 8ceae7fdef501..0 --- a/llvm/test/MC/COFF/stdin.s +++ /dev/null @@ -1 +0,0 @@ -// RUN: bash -c '(echo "test"; llvm-mc -filetype=obj -triple i686-pc-win32 %s ) > %t' ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MC] Invoke run line in stdin.s using bash (PR #157232)
boomanaiden154 wrote: > I don't know if I understand what you're going for in this patch. How is this > an improvement over just keeping REQUIRES: shell? The REQUIRES: bit is > what's going to stop the test from running in the wrong environment. That > seems like the right tradeoff. If we don't get rid of all the `REQUIRES: shell` checks and we want to turn on the internal shell by default, we end up losing test coverage here. Unless we explicitly have a buildbot running tests with the exteral shell, which seems like a bit of a waste. Let me try rewriting this one in Python though, because I think that will capture the semantics of the test better and also avoid the use of bash. https://github.com/llvm/llvm-project/pull/157232 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [CGData] Rewrite tests to not use subshells (PR #157234)
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[llvm-branch-commits] [llvm] [MC] Rewrite stdin.s to use python (PR #157232)
https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/157232 >From d749f30964e57caa797b3df87ae88ffc3d4a2f54 Mon Sep 17 00:00:00 2001 From: Aiden Grossman Date: Sun, 7 Sep 2025 17:39:19 + Subject: [PATCH] feedback Created using spr 1.3.6 --- llvm/test/MC/COFF/stdin.py | 17 + llvm/test/MC/COFF/stdin.s | 1 - 2 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 llvm/test/MC/COFF/stdin.py delete mode 100644 llvm/test/MC/COFF/stdin.s diff --git a/llvm/test/MC/COFF/stdin.py b/llvm/test/MC/COFF/stdin.py new file mode 100644 index 0..8b7b6ae1fba13 --- /dev/null +++ b/llvm/test/MC/COFF/stdin.py @@ -0,0 +1,17 @@ +# RUN: echo "// comment" > %t.input +# RUN: which llvm-mc | %python %s %t + +import subprocess +import sys + +llvm_mc_binary = sys.stdin.readlines()[0].strip() +temp_file = sys.argv[1] +input_file = temp_file + ".input" + +with open(temp_file, "w") as mc_stdout: +mc_stdout.seek(4) +subprocess.run( +[llvm_mc_binary, "-filetype=obj", "-triple", "i686-pc-win32", input_file], +stdout=mc_stdout, +check=True, +) diff --git a/llvm/test/MC/COFF/stdin.s b/llvm/test/MC/COFF/stdin.s deleted file mode 100644 index 8ceae7fdef501..0 --- a/llvm/test/MC/COFF/stdin.s +++ /dev/null @@ -1 +0,0 @@ -// RUN: bash -c '(echo "test"; llvm-mc -filetype=obj -triple i686-pc-win32 %s ) > %t' ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [MC] Rewrite stdin.s to use python (PR #157232)
https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/157232 >From d749f30964e57caa797b3df87ae88ffc3d4a2f54 Mon Sep 17 00:00:00 2001 From: Aiden Grossman Date: Sun, 7 Sep 2025 17:39:19 + Subject: [PATCH] feedback Created using spr 1.3.6 --- llvm/test/MC/COFF/stdin.py | 17 + llvm/test/MC/COFF/stdin.s | 1 - 2 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 llvm/test/MC/COFF/stdin.py delete mode 100644 llvm/test/MC/COFF/stdin.s diff --git a/llvm/test/MC/COFF/stdin.py b/llvm/test/MC/COFF/stdin.py new file mode 100644 index 0..8b7b6ae1fba13 --- /dev/null +++ b/llvm/test/MC/COFF/stdin.py @@ -0,0 +1,17 @@ +# RUN: echo "// comment" > %t.input +# RUN: which llvm-mc | %python %s %t + +import subprocess +import sys + +llvm_mc_binary = sys.stdin.readlines()[0].strip() +temp_file = sys.argv[1] +input_file = temp_file + ".input" + +with open(temp_file, "w") as mc_stdout: +mc_stdout.seek(4) +subprocess.run( +[llvm_mc_binary, "-filetype=obj", "-triple", "i686-pc-win32", input_file], +stdout=mc_stdout, +check=True, +) diff --git a/llvm/test/MC/COFF/stdin.s b/llvm/test/MC/COFF/stdin.s deleted file mode 100644 index 8ceae7fdef501..0 --- a/llvm/test/MC/COFF/stdin.s +++ /dev/null @@ -1 +0,0 @@ -// RUN: bash -c '(echo "test"; llvm-mc -filetype=obj -triple i686-pc-win32 %s ) > %t' ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [not] Update disable-symbolization.test to work with internal shell (PR #157236)
https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/157236 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Use lit internal shell by default (PR #157237)
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[llvm-branch-commits] [CGData] Rewrite tests to not use subshells (PR #157234)
https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/157234 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Use lit internal shell by default (PR #157237)
https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/157237 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [not] Update disable-symbolization.test to work with internal shell (PR #157236)
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[llvm-branch-commits] [mlir] [mlir][ptr] Add `ptr.ptr_diff` operation (PR #157354)
https://github.com/fabianmcg created
https://github.com/llvm/llvm-project/pull/157354
Thi patch introduces the `ptr.ptr_diff` operation for computing pointer
differences. The semantics of the operation are given by:
```
The `ptr_diff` operation computes the difference between two pointers,
returning an integer or index value representing the number of bytes
between them. This difference is always computed using signed arithmetic.
The operation supports both scalar and shaped types with value semantics:
- When both operands are scalar: produces a single difference value
- When both are shaped: performs element-wise subtraction,
shapes must be the same
The operation also supports the following flags:
- `none`: No flags are set.
- `nuw`: No Unsigned Wrap, if the addition causes an unsigned overflow,
the result is a poison value.
- `nsw`: No Signed Wrap, if the addition causes a signed overflow, the
result is a poison value.
NOTE: The pointer difference is calculated using an integer type specified
by the data layout. The final result will be sign-extended or truncated to
fit the result type as necessary.
```
This patch also adds translation to LLVM IR hooks for the `ptr_diff` op. This
translation uses the `ptrtoaddr` builder to compute only index bits difference.
Example:
```mlir
llvm.func @ptr_diff_vector_i32(%ptrs1:
vector<8x!ptr.ptr<#llvm.address_space<0>>>, %ptrs2:
vector<8x!ptr.ptr<#llvm.address_space<0>>>) -> vector<8xi32> {
%diffs = ptr.ptr_diff %ptrs1, %ptrs2 :
vector<8x!ptr.ptr<#llvm.address_space<0>>> -> vector<8xi32>
llvm.return %diffs : vector<8xi32>
}
```
Translation to LLVM IR:
```llvm
define <8 x i32> @ptr_diff_vector_i32(<8 x ptr> %0, <8 x ptr> %1) {
%3 = ptrtoint <8 x ptr> %0 to <8 x i64>
%4 = ptrtoint <8 x ptr> %1 to <8 x i64>
%5 = sub <8 x i64> %3, %4
%6 = trunc <8 x i64> %5 to <8 x i32>
ret <8 x i32> %6
}
```
>From f467d256c653bc62d7cee5d3935b9a1d1f47e3b8 Mon Sep 17 00:00:00 2001
From: Fabian Mora <6982088+fabian...@users.noreply.github.com>
Date: Sun, 7 Sep 2025 17:33:04 +
Subject: [PATCH] [mlir][ptr] Add `ptr.ptr_diff` op
Thi patch introduces the `ptr.ptr_diff` operation for computing pointer
differences. The semantics of the operation are given by:
```
The `ptr_diff` operation computes the difference between two pointers,
returning an integer or index value representing the number of bytes
between them. This difference is always computed using signed arithmetic.
The operation supports both scalar and shaped types with value semantics:
- When both operands are scalar: produces a single difference value
- When both are shaped: performs element-wise subtraction,
shapes must be the same
The operation also supports the following flags:
- `none`: No flags are set.
- `nuw`: No Unsigned Wrap, if the addition causes an unsigned overflow,
the result is a poison value.
- `nsw`: No Signed Wrap, if the addition causes a signed overflow, the
result is a poison value.
NOTE: The pointer difference is calculated using an integer type specified
by the data layout. The final result will be sign-extended or truncated to
fit the result type as necessary.
```
This patch also adds translation to LLVM IR hooks for the `ptr_diff` op.
This translation uses the `ptrtoaddr` builder to compute only index
bits difference.
Example:
```mlir
llvm.func @ptr_diff_vector_i32(%ptrs1:
vector<8x!ptr.ptr<#llvm.address_space<0>>>, %ptrs2:
vector<8x!ptr.ptr<#llvm.address_space<0>>>) -> vector<8xi32> {
%diffs = ptr.ptr_diff %ptrs1, %ptrs2 :
vector<8x!ptr.ptr<#llvm.address_space<0>>> -> vector<8xi32>
llvm.return %diffs : vector<8xi32>
}
```
Translation to LLVM IR:
```llvm
define <8 x i32> @ptr_diff_vector_i32(<8 x ptr> %0, <8 x ptr> %1) {
%3 = ptrtoint <8 x ptr> %0 to <8 x i64>
%4 = ptrtoint <8 x ptr> %1 to <8 x i64>
%5 = sub <8 x i64> %3, %4
%6 = trunc <8 x i64> %5 to <8 x i32>
ret <8 x i32> %6
}
```
---
mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td | 10 ++
mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td| 57 +++
mlir/lib/Dialect/Ptr/IR/PtrDialect.cpp| 34 +++
.../Dialect/Ptr/PtrToLLVMIRTranslation.cpp| 37 +++
mlir/test/Dialect/Ptr/invalid.mlir| 8 ++
mlir/test/Dialect/Ptr/ops.mlir| 28 ++
mlir/test/Target/LLVMIR/ptr.mlir | 96 +++
7 files changed, 270 insertions(+)
diff --git a/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
b/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
index c169f48e573d0..c97bd04d32896 100644
--- a/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
+++ b/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
@@ -79,4 +79,14 @@ def Ptr_PtrAddFlags : I32Enum<"PtrAddFlags", "Pointer add
flags", [
let cppNamespace = "::mlir::ptr";
}
+//===--===//
+// Ptr diff flags enum properties.
+//===--===//
+
+def Ptr_PtrDiffFlags : I8BitEnum<"
[llvm-branch-commits] [mlir] [mlir][ptr] Add `ptr.ptr_diff` operation (PR #157354)
llvmbot wrote:
@llvm/pr-subscribers-mlir-llvm
Author: Fabian Mora (fabianmcg)
Changes
Thi patch introduces the `ptr.ptr_diff` operation for computing pointer
differences. The semantics of the operation are given by:
```
The `ptr_diff` operation computes the difference between two pointers,
returning an integer or index value representing the number of bytes
between them. This difference is always computed using signed arithmetic.
The operation supports both scalar and shaped types with value semantics:
- When both operands are scalar: produces a single difference value
- When both are shaped: performs element-wise subtraction,
shapes must be the same
The operation also supports the following flags:
- `none`: No flags are set.
- `nuw`: No Unsigned Wrap, if the addition causes an unsigned overflow,
the result is a poison value.
- `nsw`: No Signed Wrap, if the addition causes a signed overflow, the
result is a poison value.
NOTE: The pointer difference is calculated using an integer type specified
by the data layout. The final result will be sign-extended or truncated to
fit the result type as necessary.
```
This patch also adds translation to LLVM IR hooks for the `ptr_diff` op. This
translation uses the `ptrtoaddr` builder to compute only index bits difference.
Example:
```mlir
llvm.func @ptr_diff_vector_i32(%ptrs1:
vector<8x!ptr.ptr<#llvm.address_space<0>>>, %ptrs2:
vector<8x!ptr.ptr<#llvm.address_space<0>>>) ->
vector<8xi32> {
%diffs = ptr.ptr_diff %ptrs1, %ptrs2 :
vector<8x!ptr.ptr<#llvm.address_space<0>>> ->
vector<8xi32>
llvm.return %diffs : vector<8xi32>
}
```
Translation to LLVM IR:
```llvm
define <8 x i32> @ptr_diff_vector_i32(<8 x ptr> %0, <8 x
ptr> %1) {
%3 = ptrtoint <8 x ptr> %0 to <8 x i64>
%4 = ptrtoint <8 x ptr> %1 to <8 x i64>
%5 = sub <8 x i64> %3, %4
%6 = trunc <8 x i64> %5 to <8 x i32>
ret <8 x i32> %6
}
```
---
Full diff: https://github.com/llvm/llvm-project/pull/157354.diff
7 Files Affected:
- (modified) mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td (+10)
- (modified) mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td (+57)
- (modified) mlir/lib/Dialect/Ptr/IR/PtrDialect.cpp (+34)
- (modified) mlir/lib/Target/LLVMIR/Dialect/Ptr/PtrToLLVMIRTranslation.cpp
(+37)
- (modified) mlir/test/Dialect/Ptr/invalid.mlir (+8)
- (modified) mlir/test/Dialect/Ptr/ops.mlir (+28)
- (modified) mlir/test/Target/LLVMIR/ptr.mlir (+96)
``diff
diff --git a/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
b/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
index c169f48e573d0..c97bd04d32896 100644
--- a/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
+++ b/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
@@ -79,4 +79,14 @@ def Ptr_PtrAddFlags : I32Enum<"PtrAddFlags", "Pointer add
flags", [
let cppNamespace = "::mlir::ptr";
}
+//===--===//
+// Ptr diff flags enum properties.
+//===--===//
+
+def Ptr_PtrDiffFlags : I8BitEnum<"PtrDiffFlags", "Pointer difference flags", [
+I8BitEnumCase<"none", 0>, I8BitEnumCase<"nuw", 1>, I8BitEnumCase<"nsw", 2>
+ ]> {
+ let cppNamespace = "::mlir::ptr";
+}
+
#endif // PTR_ENUMS
diff --git a/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
b/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
index 468a3004d5c62..85902fdf7159e 100644
--- a/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
+++ b/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
@@ -415,6 +415,63 @@ def Ptr_PtrAddOp : Pointer_Op<"ptr_add", [
}];
}
+//===--===//
+// PtrDiffOp
+//===--===//
+
+def Ptr_PtrDiffOp : Pointer_Op<"ptr_diff", [
+Pure, AllTypesMatch<["lhs", "rhs"]>, SameOperandsAndResultShape
+ ]> {
+ let summary = "Pointer difference operation";
+ let description = [{
+The `ptr_diff` operation computes the difference between two pointers,
+returning an integer or index value representing the number of bytes
+between them. This difference is always computed using signed arithmetic.
+
+The operation supports both scalar and shaped types with value semantics:
+- When both operands are scalar: produces a single difference value
+- When both are shaped: performs element-wise subtraction,
+ shapes must be the same
+
+The operation also supports the following flags:
+- `none`: No flags are set.
+- `nuw`: No Unsigned Wrap, if the addition causes an unsigned overflow,
+ the result is a poison value.
+- `nsw`: No Signed Wrap, if the addition causes a signed overflow, the
+ result is a poison value.
+
+NOTE: The pointer difference is calculated using an integer type specified
+by the data layout. The final result will be sign-extended or truncated to
+fit the result type as necessary.
+
+Example:
+
+```mlir
+// Scalar pointers
+%diff
[llvm-branch-commits] [mlir] [mlir][ptr] Add `ptr.ptr_diff` operation (PR #157354)
llvmbot wrote:
@llvm/pr-subscribers-mlir
Author: Fabian Mora (fabianmcg)
Changes
Thi patch introduces the `ptr.ptr_diff` operation for computing pointer
differences. The semantics of the operation are given by:
```
The `ptr_diff` operation computes the difference between two pointers,
returning an integer or index value representing the number of bytes
between them. This difference is always computed using signed arithmetic.
The operation supports both scalar and shaped types with value semantics:
- When both operands are scalar: produces a single difference value
- When both are shaped: performs element-wise subtraction,
shapes must be the same
The operation also supports the following flags:
- `none`: No flags are set.
- `nuw`: No Unsigned Wrap, if the addition causes an unsigned overflow,
the result is a poison value.
- `nsw`: No Signed Wrap, if the addition causes a signed overflow, the
result is a poison value.
NOTE: The pointer difference is calculated using an integer type specified
by the data layout. The final result will be sign-extended or truncated to
fit the result type as necessary.
```
This patch also adds translation to LLVM IR hooks for the `ptr_diff` op. This
translation uses the `ptrtoaddr` builder to compute only index bits difference.
Example:
```mlir
llvm.func @ptr_diff_vector_i32(%ptrs1:
vector<8x!ptr.ptr<#llvm.address_space<0>>>, %ptrs2:
vector<8x!ptr.ptr<#llvm.address_space<0>>>) ->
vector<8xi32> {
%diffs = ptr.ptr_diff %ptrs1, %ptrs2 :
vector<8x!ptr.ptr<#llvm.address_space<0>>> ->
vector<8xi32>
llvm.return %diffs : vector<8xi32>
}
```
Translation to LLVM IR:
```llvm
define <8 x i32> @ptr_diff_vector_i32(<8 x ptr> %0, <8 x
ptr> %1) {
%3 = ptrtoint <8 x ptr> %0 to <8 x i64>
%4 = ptrtoint <8 x ptr> %1 to <8 x i64>
%5 = sub <8 x i64> %3, %4
%6 = trunc <8 x i64> %5 to <8 x i32>
ret <8 x i32> %6
}
```
---
Full diff: https://github.com/llvm/llvm-project/pull/157354.diff
7 Files Affected:
- (modified) mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td (+10)
- (modified) mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td (+57)
- (modified) mlir/lib/Dialect/Ptr/IR/PtrDialect.cpp (+34)
- (modified) mlir/lib/Target/LLVMIR/Dialect/Ptr/PtrToLLVMIRTranslation.cpp
(+37)
- (modified) mlir/test/Dialect/Ptr/invalid.mlir (+8)
- (modified) mlir/test/Dialect/Ptr/ops.mlir (+28)
- (modified) mlir/test/Target/LLVMIR/ptr.mlir (+96)
``diff
diff --git a/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
b/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
index c169f48e573d0..c97bd04d32896 100644
--- a/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
+++ b/mlir/include/mlir/Dialect/Ptr/IR/PtrEnums.td
@@ -79,4 +79,14 @@ def Ptr_PtrAddFlags : I32Enum<"PtrAddFlags", "Pointer add
flags", [
let cppNamespace = "::mlir::ptr";
}
+//===--===//
+// Ptr diff flags enum properties.
+//===--===//
+
+def Ptr_PtrDiffFlags : I8BitEnum<"PtrDiffFlags", "Pointer difference flags", [
+I8BitEnumCase<"none", 0>, I8BitEnumCase<"nuw", 1>, I8BitEnumCase<"nsw", 2>
+ ]> {
+ let cppNamespace = "::mlir::ptr";
+}
+
#endif // PTR_ENUMS
diff --git a/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
b/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
index 468a3004d5c62..85902fdf7159e 100644
--- a/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
+++ b/mlir/include/mlir/Dialect/Ptr/IR/PtrOps.td
@@ -415,6 +415,63 @@ def Ptr_PtrAddOp : Pointer_Op<"ptr_add", [
}];
}
+//===--===//
+// PtrDiffOp
+//===--===//
+
+def Ptr_PtrDiffOp : Pointer_Op<"ptr_diff", [
+Pure, AllTypesMatch<["lhs", "rhs"]>, SameOperandsAndResultShape
+ ]> {
+ let summary = "Pointer difference operation";
+ let description = [{
+The `ptr_diff` operation computes the difference between two pointers,
+returning an integer or index value representing the number of bytes
+between them. This difference is always computed using signed arithmetic.
+
+The operation supports both scalar and shaped types with value semantics:
+- When both operands are scalar: produces a single difference value
+- When both are shaped: performs element-wise subtraction,
+ shapes must be the same
+
+The operation also supports the following flags:
+- `none`: No flags are set.
+- `nuw`: No Unsigned Wrap, if the addition causes an unsigned overflow,
+ the result is a poison value.
+- `nsw`: No Signed Wrap, if the addition causes a signed overflow, the
+ result is a poison value.
+
+NOTE: The pointer difference is calculated using an integer type specified
+by the data layout. The final result will be sign-extended or truncated to
+fit the result type as necessary.
+
+Example:
+
+```mlir
+// Scalar pointers
+%diff = pt
[llvm-branch-commits] [llvm] [MC] Rewrite stdin.s to use python (PR #157232)
boomanaiden154 wrote: > The previous, uglified lld tests, and this, make me believe that we should > revisit the lit feature. I am not sure I agree with this test rewriting. I understand the argument that the tests in #156526 look a bit worse. It's not an opinion that everyone shares though. @petrhosek thinks it makes the tests more readable because you no longer need to know about subshells to understand the semantics of the test. For this test though, modifying it to use python adds a bit of boilerplate, but I think significantly clarifies what the test is actually trying to test. Instead of using arguably a hack with subshells to create a fd with a non-zero offset for `llvm-mc` to output into, we can explicitly create exactly that in python with easily readable code. Overall, there are three options I can see for this test. 1. Rewrite in python (what this patch currently does). 2. Rewrite to invoke the subshell through `bash` first. 3. Implement subshells in lit. I think 1 makes the best set of tradeoffs. I'm not opposed to 3, but I would like a reasonably strong consensus that the handful of tests impacted by this are objectively worse in terms of readability/cleanliness before doing that. Everyone with knowledge of lit's internal shell that I have talked about subshells thinks it would be a poor decision to implement them. I have not personally done enough digging/attempted enough of an implementation to know the exact tradeoffs though. https://github.com/llvm/llvm-project/pull/157232 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
