[llvm-commits] CVS: llvm-www/OpenProjects.html
Changes in directory llvm-www: OpenProjects.html updated: 1.10 - 1.11 --- Log message: Added link to the Elsa C++ parser and Elkhound GLR parser generator -- this could be used to implement a better C++ front-end for LLVM. --- Diffs of the changes: (+10 -4) OpenProjects.html | 14 ++ 1 files changed, 10 insertions(+), 4 deletions(-) Index: llvm-www/OpenProjects.html diff -u llvm-www/OpenProjects.html:1.10 llvm-www/OpenProjects.html:1.11 --- llvm-www/OpenProjects.html:1.10 Sat Oct 29 00:46:00 2005 +++ llvm-www/OpenProjects.html Thu Jan 12 09:05:17 2006 @@ -347,9 +347,15 @@ candidate./li liWrite a new frontend for C/C++ bin/b C++, giving us the ability to directly use LLVM C++ classes from within a compiler rather than use -C-based wrapper functions a la llvm-gcc. One possible starting point is the a -href=http://www.parashift.com/c++-faq-lite/compiler-dependencies.html#faq-38.11;C++ -yacc grammar by Ed Willink/a./li +C-based wrapper functions a la llvm-gcc. Possible starting points: + ul + lia href=http://www.cs.berkeley.edu/~smcpeak/elkhound/sources/elsa/;Elsa + C++ parser/a, written in C++ and built with a Generalized LR parser + generator a + href=http://www.cs.berkeley.edu/~smcpeak/elkhound/;Elkhound/a/li + lia href=http://www.parashift.com/c++-faq-lite/compiler-dependencies.html#faq-38.11;C++ yacc grammar by Ed Willink/a/li + /ul +/li liWrite a new frontend for some other language (Java? OCaml? Forth?)/li liWrite a disassembler for machine code that would use TableGen to output ttMachineInstr/tts for transformations, optimizations, etc./li @@ -375,7 +381,7 @@ src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a a href=http://llvm.cs.uiuc.edu;LLVM Compiler Infrastructure/abr - Last modified: $Date: 2005/10/29 05:46:00 $ + Last modified: $Date: 2006/01/12 15:05:17 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManagerT.h
Changes in directory llvm/lib/VMCore:
PassManagerT.h updated: 1.66 - 1.67
---
Log message:
Patch #10 from Saem:
Extracts a few more methods, reduces some redundancy in the code at
the same time.
---
Diffs of the changes: (+32 -52)
PassManagerT.h | 84 +
1 files changed, 32 insertions(+), 52 deletions(-)
Index: llvm/lib/VMCore/PassManagerT.h
diff -u llvm/lib/VMCore/PassManagerT.h:1.66 llvm/lib/VMCore/PassManagerT.h:1.67
--- llvm/lib/VMCore/PassManagerT.h:1.66 Wed Jan 11 10:14:49 2006
+++ llvm/lib/VMCore/PassManagerT.h Thu Jan 12 10:48:23 2006
@@ -472,33 +472,10 @@
E = RequiredSet.end(); I != E; ++I)
markPassUsed(*I, P); // Mark *I as used by P
-// Erase all analyses not in the preserved set...
-if (!AnUsage.getPreservesAll()) {
- const std::vectorAnalysisID PreservedSet = AnUsage.getPreservedSet();
- for (std::mapAnalysisID, Pass*::iterator I = CurrentAnalyses.begin(),
- E = CurrentAnalyses.end(); I != E; ) {
-if (std::find(PreservedSet.begin(), PreservedSet.end(), I-first) ==
-PreservedSet.end()) { // Analysis not preserved!
- CurrentAnalyses.erase(I); // Remove from available analyses
- I = CurrentAnalyses.begin();
-} else {
- ++I;
-}
- }
-}
-
-// Add this pass to the currently available set...
-if (const PassInfo *PI = P-getPassInfo()) {
- CurrentAnalyses[PI] = P;
-
- // This pass is the current implementation of all of the interfaces it
- // implements as well.
- //
- const std::vectorconst PassInfo* II = PI-getInterfacesImplemented();
- for (unsigned i = 0, e = II.size(); i != e; ++i)
-CurrentAnalyses[II[i]] = P;
-}
-
+removeNonPreservedAnalyses(AnUsage);
+
+makeCurrentlyAvailable(P);
+
// For now assume that our results are never used...
LastUseOf[P] = P;
}
@@ -632,30 +609,10 @@
// Erase all analyses not in the preserved set
removeNonPreservedAnalyses(AnUsage);
- // Add the current pass to the set of passes that have been run, and are
- // thus available to users.
- //
- if (const PassInfo *PI = P-getPassInfo()) {
-CurrentAnalyses[PI] = P;
-
-// This pass is the current implementation of all of the interfaces it
-// implements as well.
-//
-const std::vectorconst PassInfo* II =
PI-getInterfacesImplemented();
-for (unsigned i = 0, e = II.size(); i != e; ++i)
- CurrentAnalyses[II[i]] = P;
- }
-
- // Free memory for any passes that we are the last use of...
- std::vectorPass* DeadPass = LastUserOf[P];
- for (std::vectorPass*::iterator I = DeadPass.begin(),E =
DeadPass.end();
- I != E; ++I) {
-PMDebug::PrintPassInformation(getDepth()+1, Freeing Pass, *I, M);
-(*I)-releaseMemory();
- }
+ makeCurrentlyAvailable(P);
- // remove dead passes from the CurrentAnalyses list...
- removeDeadPasses(DeadPass);
+ // free memory and remove dead passes from the CurrentAnalyses list...
+ removeDeadPasses(P, M, LastUserOf);
}
return MadeChanges;
@@ -707,7 +664,15 @@
}
}
- inline void removeDeadPasses(std::vectorPass* DeadPass) {
+ inline void removeDeadPasses(Pass* P, UnitType *M,
+ std::mapPass *, std::vectorPass* LastUserOf) {
+std::vectorPass* DeadPass = LastUserOf[P];
+for (std::vectorPass*::iterator I = DeadPass.begin(),E = DeadPass.end();
+ I != E; ++I) {
+ PMDebug::PrintPassInformation(getDepth()+1, Freeing Pass, *I, M);
+ (*I)-releaseMemory();
+}
+
for (std::mapAnalysisID, Pass*::iterator I = CurrentAnalyses.begin();
I != CurrentAnalyses.end(); ) {
std::vectorPass*::iterator DPI = std::find(DeadPass.begin(),
@@ -720,8 +685,23 @@
}
}
}
+
+ inline void makeCurrentlyAvailable(Pass* P) {
+if (const PassInfo *PI = P-getPassInfo()) {
+ CurrentAnalyses[PI] = P;
+
+ // This pass is the current implementation of all of the interfaces it
+ // implements as well.
+ //
+ const std::vectorconst PassInfo* II = PI-getInterfacesImplemented();
+ for (unsigned i = 0, e = II.size(); i != e; ++i)
+CurrentAnalyses[II[i]] = P;
+}
+ }
};
+
+
//===--===//
// BasicBlockPassManager
//
@@ -859,7 +839,7 @@
};
//===--===//
-// PassManagerTraits Method Implementations
+// PassManager Method Implementations
//
// BasicBlockPassManager Implementations
___
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[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp SparcV8InstrInfo.td
Changes in directory llvm/lib/Target/SparcV8:
SparcV8ISelDAGToDAG.cpp updated: 1.47 - 1.48
SparcV8InstrInfo.td updated: 1.101 - 1.102
---
Log message:
Fix branches on FP compares
---
Diffs of the changes: (+17 -21)
SparcV8ISelDAGToDAG.cpp | 33 +++--
SparcV8InstrInfo.td |5 ++---
2 files changed, 17 insertions(+), 21 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.47
llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.48
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.47Thu Jan 12
01:38:04 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Thu Jan 12 11:05:32 2006
@@ -665,13 +665,7 @@
SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CC, Cond);
} else {
- std::vectorMVT::ValueType VTs;
- VTs.push_back(MVT::i32);
- VTs.push_back(MVT::Flag);
- std::vectorSDOperand Ops;
- Ops.push_back(LHS);
- Ops.push_back(RHS);
- SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops).getValue(1);
+ SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CC, Cond);
}
}
@@ -682,18 +676,21 @@
SDOperand TrueVal = Op.getOperand(2);
SDOperand FalseVal = Op.getOperand(3);
+SDOperand CompareFlag;
unsigned Opc;
-Opc = LHS.getValueType() == MVT::i32 ? V8ISD::CMPICC : V8ISD::CMPFCC;
-std::vectorMVT::ValueType VTs;
-VTs.push_back(LHS.getValueType());
-VTs.push_back(MVT::Flag);
-std::vectorSDOperand Ops;
-Ops.push_back(LHS);
-Ops.push_back(RHS);
-SDOperand CompareFlag = DAG.getNode(Opc, VTs, Ops).getValue(1);
-
-Opc = LHS.getValueType() == MVT::i32 ?
- V8ISD::SELECT_ICC : V8ISD::SELECT_FCC;
+if (LHS.getValueType() == MVT::i32) {
+ std::vectorMVT::ValueType VTs;
+ VTs.push_back(LHS.getValueType()); // subcc returns a value
+ VTs.push_back(MVT::Flag);
+ std::vectorSDOperand Ops;
+ Ops.push_back(LHS);
+ Ops.push_back(RHS);
+ CompareFlag = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
+ Opc = V8ISD::SELECT_ICC;
+} else {
+ CompareFlag = DAG.getNode(V8ISD::CMPFCC, MVT::Flag, LHS, RHS);
+ Opc = V8ISD::SELECT_FCC;
+}
return DAG.getNode(Opc, TrueVal.getValueType(), TrueVal, FalseVal,
DAG.getConstant(CC, MVT::i32), CompareFlag);
}
Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.101
llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.102
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.101 Wed Jan 11 01:49:38 2006
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Thu Jan 12 11:05:32 2006
@@ -72,9 +72,8 @@
def SDTV8ITOF :
SDTypeProfile1, 1, [SDTCisFP0, SDTCisVT1, f32];
-def V8cmpicc : SDNodeV8ISD::CMPICC, SDTIntBinOp,
- [SDNPCommutative, SDNPOutFlag];
-def V8cmpfcc : SDNodeV8ISD::CMPFCC, SDTV8cmpfcc;
+def V8cmpicc : SDNodeV8ISD::CMPICC, SDTIntBinOp, [SDNPOutFlag];
+def V8cmpfcc : SDNodeV8ISD::CMPFCC, SDTV8cmpfcc, [SDNPOutFlag];
def V8bricc : SDNodeV8ISD::BRICC, SDTV8brcc, [SDNPHasChain];
def V8brfcc : SDNodeV8ISD::BRFCC, SDTV8brcc, [SDNPHasChain];
___
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.80 - 1.81
---
Log message:
Don't create rotate instructions in unsupported types, because we don't have
promote/expand code yet. This fixes the 177.mesa failure on PPC.
---
Diffs of the changes: (+2 -2)
DAGCombiner.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.80
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.81
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.80 Wed Jan 11 15:21:00 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Jan 12 12:57:33 2006
@@ -1184,7 +1184,7 @@
// check for rotl, rotr
if (N0.getOpcode() == ISD::SHL N1.getOpcode() == ISD::SRL
N0.getOperand(0) == N1.getOperand(0)
- TLI.isOperationLegal(ISD::ROTL, VT)) {
+ TLI.isOperationLegal(ISD::ROTL, VT) TLI.isTypeLegal(VT)) {
// fold (or (shl x, C1), (srl x, C2)) - (rotl x, C1)
if (N0.getOperand(1).getOpcode() == ISD::Constant
N1.getOperand(1).getOpcode() == ISD::Constant) {
@@ -1206,7 +1206,7 @@
if (ConstantSDNode *SUBC =
dyn_castConstantSDNode(N0.getOperand(1).getOperand(0)))
if (SUBC-getValue() == OpSizeInBits) {
- if (TLI.isOperationLegal(ISD::ROTR, VT))
+ if (TLI.isOperationLegal(ISD::ROTR, VT) TLI.isTypeLegal(VT))
return DAG.getNode(ISD::ROTR, VT, N0.getOperand(0),
N1.getOperand(1));
else
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[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td
Changes in directory llvm/lib/Target/X86: X86InstrInfo.td updated: 1.200 - 1.201 --- Log message: Specify transformation from GlobalAddress to TargetGlobalAddress and ExternalSymbol to TargetExternalSymbol. --- Diffs of the changes: (+2 -2) X86InstrInfo.td |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.200 llvm/lib/Target/X86/X86InstrInfo.td:1.201 --- llvm/lib/Target/X86/X86InstrInfo.td:1.200 Thu Jan 12 02:27:59 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Thu Jan 12 13:36:31 2006 @@ -2959,8 +2959,8 @@ //===--===// // GlobalAddress and ExternalSymbol -def : Pat(i32 globaladdr:$dst), (MOV32ri globaladdr:$dst); -def : Pat(i32 externalsym:$dst), (MOV32ri externalsym:$dst); +def : Pat(i32 globaladdr:$dst), (MOV32ri tglobaladdr:$dst); +def : Pat(i32 externalsym:$dst), (MOV32ri texternalsym:$dst); // Calls def : Pat(X86call tglobaladdr:$dst), ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.132 - 1.133
---
Log message:
Allow transformation from GlobalAddress to TargetGlobalAddress and
ExternalSymbol to TargetExternalSymbol.
---
Diffs of the changes: (+24 -13)
DAGISelEmitter.cpp | 37 -
1 files changed, 24 insertions(+), 13 deletions(-)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.132
llvm/utils/TableGen/DAGISelEmitter.cpp:1.133
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.132Thu Jan 12 01:54:57 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Thu Jan 12 13:35:54 2006
@@ -1826,7 +1826,9 @@
unsigned PatternNo;
std::ostream OS;
// Node to name mapping
- std::mapstd::string,std::string VariableMap;
+ std::mapstd::string, std::string VariableMap;
+ // Node to operator mapping
+ std::mapstd::string, Record* OperatorMap;
// Names of all the folded nodes which produce chains.
std::vectorstd::pairstd::string, unsigned FoldedChains;
unsigned TmpNo;
@@ -1892,6 +1894,9 @@
) goto P PatternNo Fail;\n;
return;
}
+
+ if (!N-isLeaf())
+OperatorMap[N-getName()] = N-getOperator();
}
@@ -2023,20 +2028,26 @@
OSSDOperand Tmp utostr(ResNo)
= CurDAG-getTargetConstant(Tmp
ResNo C, MVT:: getEnumName(N-getTypeNum(0)) );\n;
- } else if (!N-isLeaf() N-getOperator()-getName() == globaladdr) {
-OSSDOperand Tmp ResNo
- = CurDAG-getTargetGlobalAddress(castGlobalAddressSDNode(
-Val )-getGlobal(), MVT:: getEnumName(N-getTypeNum(0))
-);\n;
- } else if (!N-isLeaf() N-getOperator()-getName() == externalsym)
{
-OSSDOperand Tmp ResNo
- = CurDAG-getTargetExternalSymbol(castExternalSymbolSDNode(
-Val )-getSymbol(), MVT:: getEnumName(N-getTypeNum(0))
-);\n;
} else if (!N-isLeaf() N-getOperator()-getName() ==
texternalsym){
-OSSDOperand Tmp ResNo = Val ;\n;
+Record *Op = OperatorMap[N-getName()];
+// Transform ExternalSymbol to TargetExternalSymbol
+if (Op Op-getName() == externalsym) {
+ OSSDOperand Tmp ResNo
+ =
CurDAG-getTargetExternalSymbol(castExternalSymbolSDNode(
+ Val )-getSymbol(), MVT:: getEnumName(N-getTypeNum(0))
+ );\n;
+} else
+ OSSDOperand Tmp ResNo = Val ;\n;
} else if (!N-isLeaf() N-getOperator()-getName() == tglobaladdr)
{
-OSSDOperand Tmp ResNo = Val ;\n;
+Record *Op = OperatorMap[N-getName()];
+// Transform GlobalAddress to TargetGlobalAddress
+if (Op Op-getName() == globaladdr) {
+ OSSDOperand Tmp ResNo
+ = CurDAG-getTargetGlobalAddress(castGlobalAddressSDNode(
+ Val )-getGlobal(), MVT:: getEnumName(N-getTypeNum(0))
+ );\n;
+} else
+ OSSDOperand Tmp ResNo = Val ;\n;
} else if (!N-isLeaf() N-getOperator()-getName() ==
texternalsym){
OSSDOperand Tmp ResNo = Val ;\n;
} else if (!N-isLeaf() N-getOperator()-getName() == tconstpool) {
___
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[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
Changes in directory llvm-test/SingleSource/UnitTests:
2005-05-11-Popcount-ffs-fls.c updated: 1.4 - 1.5
---
Log message:
enhance this test to pass on non-gcc 4 host compilers
---
Diffs of the changes: (+22 -1)
2005-05-11-Popcount-ffs-fls.c | 23 ++-
1 files changed, 22 insertions(+), 1 deletion(-)
Index: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
diff -u llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.4
llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.5
--- llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.4 Sun May
15 16:18:45 2005
+++ llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c Thu Jan
12 13:42:26 2006
@@ -24,6 +24,12 @@
return table[x 26];
}
+int nlzll(unsigned long long x) {
+ if ((x 32) == 0)
+return nlz10b(x)+32;
+ return nlz10b(x32);
+}
+
int pop(unsigned x) {
x = x - ((x 1) 0x);
x = (x 0x) + ((x 2) 0x);
@@ -33,6 +39,10 @@
return x 24;
}
+int popll(unsigned long long x) {
+ return pop(x) + pop(x 32);
+}
+
int ntz8(unsigned x) {
static char table[64] =
@@ -45,6 +55,17 @@
return table[x 26];
}
+/* Work with non-gcc compilers and GCC before 4.0 */
+#if !defined(__GNUC__) || __GNUC__ 4
+#define __builtin_clz nlz10b
+#define __builtin_popcount pop
+#define __builtin_ctz ntz8
+#define __builtin_clzll nlzll
+#define __builtin_popcountll popll
+#define __builtin_ffsl __builtin_ffs
+#define ffsl ffs
+#endif
+
int i;
int main(void) {
long long l;
@@ -66,7 +87,7 @@
printf(LLVM: n: %lld, clz(n): %d, popcount(n): %d, ctz(n): %d\n,
l, __builtin_clzll(l), __builtin_popcountll(l), __builtin_ctz(l));
printf(REF LO BITS : n: %lld, clz(n): %d, popcount(n): %d, ctz(n): %d\n,
- l, nlz10b(l), pop(l), ntz8(l));
+ l, nlzll(l), popll(l), ntz8(l));
printf( *** \n);
l++;
}
___
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[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c
Changes in directory llvm-test/SingleSource/UnitTests: 2005-05-11-Popcount-ffs-fls.c updated: 1.5 - 1.6 --- Log message: Add another case to check, eliminate a warning --- Diffs of the changes: (+5 -4) 2005-05-11-Popcount-ffs-fls.c |9 + 1 files changed, 5 insertions(+), 4 deletions(-) Index: llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c diff -u llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.5 llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.6 --- llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c:1.5 Thu Jan 12 13:42:26 2006 +++ llvm-test/SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls.c Thu Jan 12 16:42:40 2006 @@ -2,6 +2,7 @@ * http://www.hackersdelight.org/HDcode/nlz.cc and * http://www.hackersdelight.org/HDcode/ntz.cc */ +#include stdio.h #define u 99 @@ -93,11 +94,11 @@ } // Check some boundary and other cases for FFS call - printf(FFS: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, i:%d, l:%d\n, - ffs(0), ffs(1), ffs(2), ffs(7), ffs(1024), ffs(i), ffsl(l)); - printf(__builtin_ffs: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, i:%d l:%d\n, + printf(FFS: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, 1234:%d i:%d, l:%d\n, + ffs(0), ffs(1), ffs(2), ffs(7), ffs(1024), ffs(1234), ffs(i), ffsl(l)); + printf(__builtin_ffs: 0:%d, 1:%d, 2:%d, 7:%d, 1024:%d, 1234:%d i:%d l:%d\n, __builtin_ffs(0), __builtin_ffs(1), __builtin_ffs(2), __builtin_ffs(7), - __builtin_ffs(1024), __builtin_ffs(i), __builtin_ffsl(l)); + __builtin_ffs(1024), __builtin_ffs(1234), __builtin_ffs(i), __builtin_ffsl(l)); return(0); } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll
Changes in directory llvm/test/Regression/CodeGen/Generic:
2006-01-12-BadSetCCFold.ll added (r1.1)
---
Log message:
Test case for a SETCC / BRCOND folding bug.
---
Diffs of the changes: (+39 -0)
2006-01-12-BadSetCCFold.ll | 39 +++
1 files changed, 39 insertions(+)
Index: llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll
diff -c /dev/null
llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll:1.1
*** /dev/null Thu Jan 12 19:02:32 2006
--- llvm/test/Regression/CodeGen/Generic/2006-01-12-BadSetCCFold.ll Thu Jan
12 19:02:22 2006
***
*** 0
--- 1,39
+ ; RUN: llvm-as %s | llc
+
+ target endian = little
+ target pointersize = 32
+ %struct.node_t = type { double*, %struct.node_t*, %struct.node_t**,
double**, double*, int, int }
+
+ implementation ; Functions:
+
+ void %main() {
+ entry:
+ br bool false, label %then.2.i, label %endif.2.i
+
+ then.2.i: ; preds = %entry
+ br label %dealwithargs.exit
+
+ endif.2.i:; preds = %entry
+ br bool false, label %then.3.i, label %dealwithargs.exit
+
+ then.3.i: ; preds = %endif.2.i
+ br label %dealwithargs.exit
+
+ dealwithargs.exit:; preds = %then.3.i, %endif.2.i, %then.2.i
+ %n_nodes.4 = phi int [ 64, %then.3.i ], [ 64, %then.2.i ], [ 64,
%endif.2.i ] ; int [#uses=1]
+ %tmp.14.i1134.i.i = setgt int %n_nodes.4, 1 ; bool
[#uses=2]
+ br bool %tmp.14.i1134.i.i, label %no_exit.i12.i.i, label
%fill_table.exit22.i.i
+
+ no_exit.i12.i.i: ; preds = %no_exit.i12.i.i, %dealwithargs.exit
+ br bool false, label %fill_table.exit22.i.i, label %no_exit.i12.i.i
+
+ fill_table.exit22.i.i:; preds = %no_exit.i12.i.i,
%dealwithargs.exit
+ %cur_node.0.i8.1.i.i = phi %struct.node_t* [ undef, %dealwithargs.exit
], [ null, %no_exit.i12.i.i ]; %struct.node_t* [#uses=0]
+ br bool %tmp.14.i1134.i.i, label %no_exit.i.preheader.i.i, label
%make_tables.exit.i
+
+ no_exit.i.preheader.i.i: ; preds = %fill_table.exit22.i.i
+ ret void
+
+ make_tables.exit.i: ; preds = %fill_table.exit22.i.i
+ ret void
+ }
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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.34 - 1.35
---
Log message:
Fix a SETCC / BRCOND folding bug.
---
Diffs of the changes: (+37 -12)
X86ISelLowering.cpp | 49 +
1 files changed, 37 insertions(+), 12 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.34
llvm/lib/Target/X86/X86ISelLowering.cpp:1.35
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.34Thu Jan 12 16:54:21 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Jan 12 19:03:02 2006
@@ -1572,14 +1572,24 @@
bool isFP = MVT::isFloatingPoint(VT);
bool isFPStack = isFP (X86Vector SSE2);
bool isFPSSE = isFP (X86Vector = SSE2);
-bool isValid = false;
+bool addTest = false;
SDOperand Op0 = Op.getOperand(0);
SDOperand Cond, CC;
if (Op0.getOpcode() == X86ISD::SETCC) {
- CC = Op0.getOperand(0);
- Cond = Op0.getOperand(1);
- isValid =
-!(isFPStack
!hasFPCMov(castConstantSDNode(CC)-getSignExtended()));
+ // If condition flag is set by a X86ISD::CMP, then make a copy of it
+ // (since flag operand cannot be shared). If the X86ISD::SETCC does not
+ // have another use it will be eliminated.
+ // If the X86ISD::SETCC has more than one use, then it's probably better
+ // to use a test instead of duplicating the X86ISD::CMP (for register
+ // pressure reason).
+ if (Cond.hasOneUse() Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
+CC = Op0.getOperand(0);
+Cond = Op0.getOperand(1);
+addTest =
+ !(isFPStack
+!hasFPCMov(castConstantSDNode(CC)-getSignExtended()));
+ } else
+addTest = true;
} else if (Op0.getOpcode() == ISD::SETCC) {
CC = Op0.getOperand(2);
bool isFP = MVT::isFloatingPoint(Op0.getOperand(1).getValueType());
@@ -1587,10 +1597,11 @@
CC = DAG.getConstant(X86CC, MVT::i8);
Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
Op0.getOperand(0), Op0.getOperand(1));
- isValid = true;
-}
+ addTest = true;
+} else
+ addTest = true;
-if (!isValid) {
+if (!addTest) {
CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Op0, Op0);
}
@@ -1606,13 +1617,24 @@
return DAG.getNode(X86ISD::CMOV, Tys, Ops);
}
case ISD::BRCOND: {
+bool addTest = false;
SDOperand Cond = Op.getOperand(1);
SDOperand Dest = Op.getOperand(2);
SDOperand CC;
-// TODO: handle Cond == OR / AND / XOR
if (Cond.getOpcode() == X86ISD::SETCC) {
- CC = Cond.getOperand(0);
- Cond = Cond.getOperand(1);
+ // If condition flag is set by a X86ISD::CMP, then make a copy of it
+ // (since flag operand cannot be shared). If the X86ISD::SETCC does not
+ // have another use it will be eliminated.
+ // If the X86ISD::SETCC has more than one use, then it's probably better
+ // to use a test instead of duplicating the X86ISD::CMP (for register
+ // pressure reason).
+ if (Cond.hasOneUse() Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
+CC = Cond.getOperand(0);
+Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
+ Cond.getOperand(1).getOperand(0),
+ Cond.getOperand(1).getOperand(1));
+ } else
+addTest = true;
} else if (Cond.getOpcode() == ISD::SETCC) {
CC = Cond.getOperand(2);
bool isFP = MVT::isFloatingPoint(Cond.getOperand(1).getValueType());
@@ -1620,7 +1642,10 @@
CC = DAG.getConstant(X86CC, MVT::i8);
Cond = DAG.getNode(X86ISD::CMP, MVT::Flag,
Cond.getOperand(0), Cond.getOperand(1));
-} else {
+} else
+ addTest = true;
+
+if (addTest) {
CC = DAG.getConstant(X86ISD::COND_NE, MVT::i8);
Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Cond, Cond);
}
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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.35 - 1.36
---
Log message:
Oops. Typo.
---
Diffs of the changes: (+1 -1)
X86ISelLowering.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.35
llvm/lib/Target/X86/X86ISelLowering.cpp:1.36
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.35Thu Jan 12 19:03:02 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Jan 12 19:06:49 2006
@@ -1601,7 +1601,7 @@
} else
addTest = true;
-if (!addTest) {
+if (addTest) {
CC = DAG.getConstant(X86ISD::COND_E, MVT::i8);
Cond = DAG.getNode(X86ISD::TEST, MVT::Flag, Op0, Op0);
}
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[llvm-commits] CVS: llvm/lib/Target/X86/README.txt
Changes in directory llvm/lib/Target/X86: README.txt updated: 1.21 - 1.22 --- Log message: Minor update. --- Diffs of the changes: (+9 -0) README.txt |9 + 1 files changed, 9 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.21 llvm/lib/Target/X86/README.txt:1.22 --- llvm/lib/Target/X86/README.txt:1.21 Thu Jan 12 16:54:21 2006 +++ llvm/lib/Target/X86/README.txt Thu Jan 12 19:20:42 2006 @@ -112,3 +112,12 @@ //===-===// Check if load folding would add a cycle in the dag. + +//===-===// + +Model X86 EFLAGS as a real register to avoid redudant cmp / test. e.g. + + cmpl $1, %eax + setg %al + testb %al, %al # unnecessary + jne .BB7 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.36 - 1.37
---
Log message:
More typo's. I need new eye glasses...
---
Diffs of the changes: (+2 -3)
X86ISelLowering.cpp |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.36
llvm/lib/Target/X86/X86ISelLowering.cpp:1.37
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.36Thu Jan 12 19:06:49 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Jan 12 19:17:24 2006
@@ -1582,12 +1582,11 @@
// If the X86ISD::SETCC has more than one use, then it's probably better
// to use a test instead of duplicating the X86ISD::CMP (for register
// pressure reason).
- if (Cond.hasOneUse() Cond.getOperand(1).getOpcode() == X86ISD::CMP) {
+ if (Op0.hasOneUse() Op0.getOperand(1).getOpcode() == X86ISD::CMP) {
CC = Op0.getOperand(0);
Cond = Op0.getOperand(1);
addTest =
- !(isFPStack
-!hasFPCMov(castConstantSDNode(CC)-getSignExtended()));
+ isFPStack !hasFPCMov(castConstantSDNode(CC)-getSignExtended());
} else
addTest = true;
} else if (Op0.getOpcode() == ISD::SETCC) {
___
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[llvm-commits] CVS: llvm/docs/LangRef.html
Changes in directory llvm/docs: LangRef.html updated: 1.122 - 1.123 --- Log message: Add llvm.stacksave and llvm.stackrestore. --- Diffs of the changes: (+69 -1) LangRef.html | 70 ++- 1 files changed, 69 insertions(+), 1 deletion(-) Index: llvm/docs/LangRef.html diff -u llvm/docs/LangRef.html:1.122 llvm/docs/LangRef.html:1.123 --- llvm/docs/LangRef.html:1.122Thu Jan 12 19:20:27 2006 +++ llvm/docs/LangRef.html Thu Jan 12 20:03:13 2006 @@ -127,6 +127,8 @@ ol lia href=#i_returnaddress'ttllvm.returnaddress/tt' Intrinsic/a/li lia href=#i_frameaddress'ttllvm.frameaddress/tt' Intrinsic/a/li + lia href=#i_stacksave'ttllvm.stacksave/tt' Intrinsic/a/li + lia href=#i_stackrestore'ttllvm.stackrestore/tt' Intrinsic/a/li lia href=#i_prefetch'ttllvm.prefetch/tt' Intrinsic/a/li lia href=#i_pcmarker'ttllvm.pcmarker/tt' Intrinsic/a/li lia href=#i_readcyclecounterttllvm.readcyclecounter/tt' Intrinsic/a/li @@ -2789,6 +2791,72 @@ !-- ___ -- div class=doc_subsubsection + a name=i_stacksave'ttllvm.stacksave/tt' Intrinsic/a +/div + +div class=doc_text + +h5Syntax:/h5 +pre + declare sbyte *%llvm.stacksave() +/pre + +h5Overview:/h5 + +p +The 'ttllvm.stacksave/tt' intrinsic is used to remember the current state of +the function stack, for use with a href=#i_stackrestore +ttllvm.stackrestore/tt/a. This is useful for implementing language +features like scoped automatic variable sized arrays in C99. +/p + +h5Semantics:/h5 + +p +This intrinsic returns a opaque pointer value that can be passed to a +href=#i_stackrestorettllvm.stackrestore/tt/a. When an +ttllvm.stackrestore/tt intrinsic is executed with a value saved from +ttllvm.stacksave/tt, it effectively restores the state of the stack to the +state it was in when the ttllvm.stacksave/tt intrinsic executed. In +practice, this pops any a href=#i_allocaalloca/a blocks from the stack +that were allocated after the ttllvm.stacksave/tt was executed. +/p + +/div + +!-- ___ -- +div class=doc_subsubsection + a name=i_stackrestore'ttllvm.stackrestore/tt' Intrinsic/a +/div + +div class=doc_text + +h5Syntax:/h5 +pre + declare void %llvm.stackrestore(sbyte* %ptr) +/pre + +h5Overview:/h5 + +p +The 'ttllvm.stackrestore/tt' intrinsic is used to restore the state of +the function stack to the state it was in when the corresponding a +href=#llvm.stacksavettllvm.stacksave/tt/a intrinsic executed. This is +useful for implementing language features like scoped automatic variable sized +arrays in C99. +/p + +h5Semantics:/h5 + +p +See the description for a href=#i_stacksavettllvm.stacksave/tt/a. +/p + +/div + + +!-- ___ -- +div class=doc_subsubsection a name=i_prefetch'ttllvm.prefetch/tt' Intrinsic/a /div @@ -3481,7 +3549,7 @@ a href=mailto:[EMAIL PROTECTED]Chris Lattner/abr a href=http://llvm.cs.uiuc.edu;The LLVM Compiler Infrastructure/abr - Last modified: $Date: 2006/01/13 01:20:27 $ + Last modified: $Date: 2006/01/13 02:03:13 $ /address /body /html ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Intrinsics.h
Changes in directory llvm/include/llvm: Intrinsics.h updated: 1.33 - 1.34 --- Log message: add new llvm.stacksave/llvm.stackrestore intrinsics --- Diffs of the changes: (+2 -0) Intrinsics.h |2 ++ 1 files changed, 2 insertions(+) Index: llvm/include/llvm/Intrinsics.h diff -u llvm/include/llvm/Intrinsics.h:1.33 llvm/include/llvm/Intrinsics.h:1.34 --- llvm/include/llvm/Intrinsics.h:1.33 Fri Nov 11 10:45:18 2005 +++ llvm/include/llvm/Intrinsics.h Thu Jan 12 20:15:02 2006 @@ -34,6 +34,8 @@ // Code generator intrinsics. returnaddress,// Yields the return address of a dynamic call frame frameaddress, // Yields the frame address of a dynamic call frame +stacksave,// Save the stack pointer +stackrestore, // Restore the stack pointer prefetch, // Prefetch a value into the cache pcmarker, // Export a PC from near the marker readcyclecounter, // Read cycle counter register ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/Function.cpp Verifier.cpp
Changes in directory llvm/lib/VMCore: Function.cpp updated: 1.96 - 1.97 Verifier.cpp updated: 1.138 - 1.139 --- Log message: Add recognition and verification of new llvm.stacksave/llvm.stackrestore intrinsics --- Diffs of the changes: (+18 -4) Function.cpp | 10 ++ Verifier.cpp | 12 2 files changed, 18 insertions(+), 4 deletions(-) Index: llvm/lib/VMCore/Function.cpp diff -u llvm/lib/VMCore/Function.cpp:1.96 llvm/lib/VMCore/Function.cpp:1.97 --- llvm/lib/VMCore/Function.cpp:1.96 Fri Nov 11 10:46:18 2005 +++ llvm/lib/VMCore/Function.cppThu Jan 12 20:15:39 2006 @@ -249,10 +249,12 @@ if (getName() == llvm.readcyclecounter) return Intrinsic::readcyclecounter; break; case 's': -if (getName() == llvm.setjmp) return Intrinsic::setjmp; -if (getName() == llvm.sigsetjmp) return Intrinsic::sigsetjmp; -if (getName() == llvm.siglongjmp) return Intrinsic::siglongjmp; -if (getName() == llvm.sqrt) return Intrinsic::sqrt; +if (getName() == llvm.setjmp) return Intrinsic::setjmp; +if (getName() == llvm.sigsetjmp)return Intrinsic::sigsetjmp; +if (getName() == llvm.siglongjmp) return Intrinsic::siglongjmp; +if (getName() == llvm.stackrestore) return Intrinsic::stackrestore; +if (getName() == llvm.stacksave)return Intrinsic::stacksave; +if (getName() == llvm.sqrt) return Intrinsic::sqrt; break; case 'v': if (getName() == llvm.va_copy) return Intrinsic::vacopy; Index: llvm/lib/VMCore/Verifier.cpp diff -u llvm/lib/VMCore/Verifier.cpp:1.138 llvm/lib/VMCore/Verifier.cpp:1.139 --- llvm/lib/VMCore/Verifier.cpp:1.138 Thu Jan 12 00:17:59 2006 +++ llvm/lib/VMCore/Verifier.cppThu Jan 12 20:15:39 2006 @@ -796,6 +796,18 @@ case Intrinsic::memmove: NumArgs = 4; break; case Intrinsic::memset: NumArgs = 4; break; + case Intrinsic::stacksave: +NumArgs = 0; +Assert1(CI.getType() == PointerType::get(Type::SByteTy), +llvm.stacksave must return an sbyte*, CI); +break; + case Intrinsic::stackrestore: +NumArgs = 1; +Assert1(CI.getOperand(1)-getType() == PointerType::get(Type::SByteTy), +llvm.stackrestore must take an sbyte*, CI); +Assert1(CI.getType() == Type::VoidTy, +llvm.stackrestore return void, CI); +break; case Intrinsic::prefetch:NumArgs = 3; break; case Intrinsic::pcmarker: NumArgs = 1; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/CodeGen/stacksave-restore.ll
Changes in directory llvm/test/Regression/CodeGen:
stacksave-restore.ll added (r1.1)
---
Log message:
testcase for the llvm.stacksave/llvm.stackrestore intrinsics.
---
Diffs of the changes: (+12 -0)
stacksave-restore.ll | 12
1 files changed, 12 insertions(+)
Index: llvm/test/Regression/CodeGen/stacksave-restore.ll
diff -c /dev/null llvm/test/Regression/CodeGen/stacksave-restore.ll:1.1
*** /dev/null Thu Jan 12 20:25:18 2006
--- llvm/test/Regression/CodeGen/stacksave-restore.ll Thu Jan 12 20:25:08 2006
***
*** 0
--- 1,12
+ ; RUN: llvm-as %s | llc
+
+ declare sbyte* %llvm.stacksave()
+ declare void %llvm.stackrestore(sbyte*)
+
+ int *%test(uint %N) {
+ %tmp = call sbyte* %llvm.stacksave()
+ %P = alloca int, uint %N
+ call void %llvm.stackrestore(sbyte* %tmp)
+ %Q = alloca int, uint %N
+ ret int* %P
+ }
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[llvm-commits] CVS: llvm/lib/CodeGen/IntrinsicLowering.cpp
Changes in directory llvm/lib/CodeGen:
IntrinsicLowering.cpp updated: 1.36 - 1.37
---
Log message:
Add support for the llvm.stacksave/stackrestore intrinsics, this is
used by the C backend.
---
Diffs of the changes: (+15 -2)
IntrinsicLowering.cpp | 17 +++--
1 files changed, 15 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/IntrinsicLowering.cpp
diff -u llvm/lib/CodeGen/IntrinsicLowering.cpp:1.36
llvm/lib/CodeGen/IntrinsicLowering.cpp:1.37
--- llvm/lib/CodeGen/IntrinsicLowering.cpp:1.36 Fri Nov 11 10:46:18 2005
+++ llvm/lib/CodeGen/IntrinsicLowering.cpp Thu Jan 12 20:22:08 2006
@@ -248,6 +248,19 @@
break;
}
+ case Intrinsic::stacksave:
+ case Intrinsic::stackrestore: {
+static bool Warned = false;
+if (!Warned)
+ std::cerr WARNING: this target does not support the llvm.stack
+(Callee-getIntrinsicID() == Intrinsic::stacksave ?
+ save : restore) intrinsic.\n;
+Warned = true;
+if (Callee-getIntrinsicID() == Intrinsic::stacksave)
+ CI-replaceAllUsesWith(Constant::getNullValue(CI-getType()));
+break;
+ }
+
case Intrinsic::returnaddress:
case Intrinsic::frameaddress:
std::cerr WARNING: this target does not support the llvm.
@@ -263,8 +276,8 @@
case Intrinsic::pcmarker:
break;// Simply strip out pcmarker on unsupported architectures
case Intrinsic::readcyclecounter: {
-std::cerr WARNING: this target does not support the
llvm.readcyclecounter
-intrinsic. It is being lowered to a constant 0\n;
+std::cerr WARNING: this target does not support the llvm.readcyclecoun
+ ter intrinsic. It is being lowered to a constant 0\n;
CI-replaceAllUsesWith(ConstantUInt::get(Type::ULongTy, 0));
break;
}
___
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelLowering.cpp IA64ISelPattern.cpp
Changes in directory llvm/lib/Target/IA64: IA64ISelLowering.cpp updated: 1.18 - 1.19 IA64ISelPattern.cpp updated: 1.74 - 1.75 --- Log message: new nodes --- Diffs of the changes: (+8 -0) IA64ISelLowering.cpp |4 IA64ISelPattern.cpp |4 2 files changed, 8 insertions(+) Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.18 llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.19 --- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.18 Wed Jan 11 21:28:40 2006 +++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Thu Jan 12 20:40:58 2006 @@ -83,6 +83,10 @@ setOperationAction(ISD::ROTL , MVT::i64 , Expand); setOperationAction(ISD::ROTR , MVT::i64 , Expand); + // Not implemented yet. + setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); + setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); + computeRegisterProperties(); addLegalFPImmediate(+0.0); Index: llvm/lib/Target/IA64/IA64ISelPattern.cpp diff -u llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.74 llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.75 --- llvm/lib/Target/IA64/IA64ISelPattern.cpp:1.74 Wed Jan 11 17:20:28 2006 +++ llvm/lib/Target/IA64/IA64ISelPattern.cppThu Jan 12 20:40:58 2006 @@ -107,6 +107,10 @@ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); + // Not implemented yet. + setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); + setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); + computeRegisterProperties(); addLegalFPImmediate(+0.0); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.63 - 1.64
---
Log message:
expand unsupported stacksave/stackrestore nodes
---
Diffs of the changes: (+4 -0)
PPCISelLowering.cpp |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.63
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.64
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.63Wed Jan 11 15:21:00 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Thu Jan 12 20:42:53 2006
@@ -108,6 +108,10 @@
// appropriate instructions to materialize the address.
setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
+
+ // Not implemented yet.
+ setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
+ setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
if (TM.getSubtargetPPCSubtarget().is64Bit()) {
// They also have instructions for converting between i64 and fp.
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[llvm-commits] CVS: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/SparcV8: SparcV8ISelDAGToDAG.cpp updated: 1.48 - 1.49 --- Log message: expand unsupported stacksave/stackrestore nodes --- Diffs of the changes: (+4 -0) SparcV8ISelDAGToDAG.cpp |4 1 files changed, 4 insertions(+) Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.48 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.49 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.48Thu Jan 12 11:05:32 2006 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Thu Jan 12 20:42:53 2006 @@ -160,6 +160,10 @@ setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); + // Not implemented yet. + setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); + setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); + computeRegisterProperties(); } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Changes in directory llvm/include/llvm/CodeGen: SelectionDAGNodes.h updated: 1.89 - 1.90 --- Log message: add stacksave/stackrestore nodes --- Diffs of the changes: (+9 -0) SelectionDAGNodes.h |9 + 1 files changed, 9 insertions(+) Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.89 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.90 --- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.89 Wed Jan 11 15:21:00 2006 +++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jan 12 20:39:03 2006 @@ -312,6 +312,15 @@ CALL, TAILCALL, +// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a +// value, the same type as the pointer type for the system, and an output +// chain. +STACKSAVE, + +// STACKRESTORE has two operands, an input chain and a pointer to restore to +// it returns an output chain. +STACKRESTORE, + // MEMSET/MEMCPY/MEMMOVE - The first operand is the chain, and the rest // correspond to the operands of the LLVM intrinsic functions. The only // result is a token chain. The alignment argument is guaranteed to be a ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.37 - 1.38
---
Log message:
expand unsupported stacksave/stackrestore nodes
---
Diffs of the changes: (+4 -0)
X86ISelLowering.cpp |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.37
llvm/lib/Target/X86/X86ISelLowering.cpp:1.38
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.37Thu Jan 12 19:17:24 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Thu Jan 12 20:42:53 2006
@@ -159,6 +159,10 @@
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
+ // Not implemented yet.
+ setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
+ setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+
if (X86ScalarSSE) {
// Set up the FP register classes.
addRegisterClass(MVT::f32, X86::FR32RegisterClass);
___
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