[llvm-commits] CVS: llvm/test/Regression/CodeGen/X86/vec_shuffle-6.ll
Changes in directory llvm/test/Regression/CodeGen/X86:
vec_shuffle-6.ll updated: 1.2 -> 1.3
---
Log message:
Fix test failure on non-Apple systems.
---
Diffs of the changes: (+2 -0)
vec_shuffle-6.ll |2 ++
1 files changed, 2 insertions(+)
Index: llvm/test/Regression/CodeGen/X86/vec_shuffle-6.ll
diff -u llvm/test/Regression/CodeGen/X86/vec_shuffle-6.ll:1.2
llvm/test/Regression/CodeGen/X86/vec_shuffle-6.ll:1.3
--- llvm/test/Regression/CodeGen/X86/vec_shuffle-6.ll:1.2 Mon Jul 10
16:49:09 2006
+++ llvm/test/Regression/CodeGen/X86/vec_shuffle-6.ll Wed Jul 12 01:48:47 2006
@@ -2,6 +2,8 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movaps | wc -l | grep
1
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movups | wc -l | grep
2
+target triple = "i686-apple-darwin"
+
%x = global [4 x int] [ int 1, int 2, int 3, int 4 ]
<2 x long> %test1() {
___
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[llvm-commits] CVS: llvm/lib/ExecutionEngine/JIT/JIT.cpp
Changes in directory llvm/lib/ExecutionEngine/JIT: JIT.cpp updated: 1.68 -> 1.69 --- Log message: Remove non-portable optimization that isn't worth it --- Diffs of the changes: (+1 -5) JIT.cpp |6 +- 1 files changed, 1 insertion(+), 5 deletions(-) Index: llvm/lib/ExecutionEngine/JIT/JIT.cpp diff -u llvm/lib/ExecutionEngine/JIT/JIT.cpp:1.68 llvm/lib/ExecutionEngine/JIT/JIT.cpp:1.69 --- llvm/lib/ExecutionEngine/JIT/JIT.cpp:1.68 Fri Jul 7 12:18:09 2006 +++ llvm/lib/ExecutionEngine/JIT/JIT.cppTue Jul 11 19:31:47 2006 @@ -309,11 +309,7 @@ // space. Ptr = malloc(S+A); unsigned MisAligned = ((intptr_t)Ptr & (A-1)); - unsigned Offset = MisAligned ? (A-MisAligned) : 0; - - // Trim the tail off the memory block. - realloc(Ptr, S+Offset); - Ptr = (char*)Ptr + Offset; + Ptr = (char*)Ptr + (MisAligned ? (A-MisAligned) : 0); } state.getPendingGlobals(locked).push_back(GV); } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.72 -> 1.73
---
Log message:
The PPC64 JIT needs register numbers to encode instructions.
---
Diffs of the changes: (+36 -35)
PPCRegisterInfo.cpp | 71 ++--
1 files changed, 36 insertions(+), 35 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.72
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.73
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.72Mon Jul 10 19:48:23 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Tue Jul 11 15:53:55 2006
@@ -40,42 +40,43 @@
/// getRegisterNumbering - Given the enum value for some register, e.g.
/// PPC::F14, return the number that it corresponds to (e.g. 14).
unsigned PPCRegisterInfo::getRegisterNumbering(unsigned RegEnum) {
+ using namespace PPC;
switch (RegEnum) {
-case PPC::R0 : case PPC::F0 : case PPC::V0 : case PPC::CR0: return 0;
-case PPC::R1 : case PPC::F1 : case PPC::V1 : case PPC::CR1: return 1;
-case PPC::R2 : case PPC::F2 : case PPC::V2 : case PPC::CR2: return 2;
-case PPC::R3 : case PPC::F3 : case PPC::V3 : case PPC::CR3: return 3;
-case PPC::R4 : case PPC::F4 : case PPC::V4 : case PPC::CR4: return 4;
-case PPC::R5 : case PPC::F5 : case PPC::V5 : case PPC::CR5: return 5;
-case PPC::R6 : case PPC::F6 : case PPC::V6 : case PPC::CR6: return 6;
-case PPC::R7 : case PPC::F7 : case PPC::V7 : case PPC::CR7: return 7;
-case PPC::R8 : case PPC::F8 : case PPC::V8 : return 8;
-case PPC::R9 : case PPC::F9 : case PPC::V9 : return 9;
-case PPC::R10: case PPC::F10: case PPC::V10: return 10;
-case PPC::R11: case PPC::F11: case PPC::V11: return 11;
-case PPC::R12: case PPC::F12: case PPC::V12: return 12;
-case PPC::R13: case PPC::F13: case PPC::V13: return 13;
-case PPC::R14: case PPC::F14: case PPC::V14: return 14;
-case PPC::R15: case PPC::F15: case PPC::V15: return 15;
-case PPC::R16: case PPC::F16: case PPC::V16: return 16;
-case PPC::R17: case PPC::F17: case PPC::V17: return 17;
-case PPC::R18: case PPC::F18: case PPC::V18: return 18;
-case PPC::R19: case PPC::F19: case PPC::V19: return 19;
-case PPC::R20: case PPC::F20: case PPC::V20: return 20;
-case PPC::R21: case PPC::F21: case PPC::V21: return 21;
-case PPC::R22: case PPC::F22: case PPC::V22: return 22;
-case PPC::R23: case PPC::F23: case PPC::V23: return 23;
-case PPC::R24: case PPC::F24: case PPC::V24: return 24;
-case PPC::R25: case PPC::F25: case PPC::V25: return 25;
-case PPC::R26: case PPC::F26: case PPC::V26: return 26;
-case PPC::R27: case PPC::F27: case PPC::V27: return 27;
-case PPC::R28: case PPC::F28: case PPC::V28: return 28;
-case PPC::R29: case PPC::F29: case PPC::V29: return 29;
-case PPC::R30: case PPC::F30: case PPC::V30: return 30;
-case PPC::R31: case PPC::F31: case PPC::V31: return 31;
-default:
- std::cerr << "Unhandled reg in PPCRegisterInfo::getRegisterNumbering!\n";
- abort();
+ case R0 : case X0 : case F0 : case V0 : case CR0: return 0;
+ case R1 : case X1 : case F1 : case V1 : case CR1: return 1;
+ case R2 : case X2 : case F2 : case V2 : case CR2: return 2;
+ case R3 : case X3 : case F3 : case V3 : case CR3: return 3;
+ case R4 : case X4 : case F4 : case V4 : case CR4: return 4;
+ case R5 : case X5 : case F5 : case V5 : case CR5: return 5;
+ case R6 : case X6 : case F6 : case V6 : case CR6: return 6;
+ case R7 : case X7 : case F7 : case V7 : case CR7: return 7;
+ case R8 : case X8 : case F8 : case V8 : return 8;
+ case R9 : case X9 : case F9 : case V9 : return 9;
+ case R10: case X10: case F10: case V10: return 10;
+ case R11: case X11: case F11: case V11: return 11;
+ case R12: case X12: case F12: case V12: return 12;
+ case R13: case X13: case F13: case V13: return 13;
+ case R14: case X14: case F14: case V14: return 14;
+ case R15: case X15: case F15: case V15: return 15;
+ case R16: case X16: case F16: case V16: return 16;
+ case R17: case X17: case F17: case V17: return 17;
+ case R18: case X18: case F18: case V18: return 18;
+ case R19: case X19: case F19: case V19: return 19;
+ case R20: case X20: case F20: case V20: return 20;
+ case R21: case X21: case F21: case V21: return 21;
+ case R22: case X22: case F22: case V22: return 22;
+ case R23: case X23: case F23: case V23: return 23;
+ case R24: case X24: case F24: case V24: return 24;
+ case R25: case X25: case F25: case V25: return 25;
+ case R26: case X26: case F26: case V26: return 26;
+ case R27: case X27: case F27: case V27: return 27;
+ case R28: case X28: case F28: case V28: return 28;
+ case R29: case X29: case F29: case V29: return 29;
+ case R30: c
[llvm-commits] CVS: llvm/docs/CFEBuildInstrs.html
Changes in directory llvm/docs: CFEBuildInstrs.html updated: 1.57 -> 1.58 --- Log message: Revamp this doc to be accurate w.r.t. building llvmgcc4 --- Diffs of the changes: (+36 -53) CFEBuildInstrs.html | 89 +--- 1 files changed, 36 insertions(+), 53 deletions(-) Index: llvm/docs/CFEBuildInstrs.html diff -u llvm/docs/CFEBuildInstrs.html:1.57 llvm/docs/CFEBuildInstrs.html:1.58 --- llvm/docs/CFEBuildInstrs.html:1.57 Fri Jun 16 18:34:49 2006 +++ llvm/docs/CFEBuildInstrs.html Tue Jul 11 15:47:00 2006 @@ -19,7 +19,8 @@ Building under AIX - Instructions + llvm-gcc4 Instructions + llvm-gcc3 Instructions License Information @@ -36,9 +37,10 @@ This document is intended to explain the process of building the -LLVM C/C++ front-end, based on GCC 3.4, from its source code. You -would have to do this, for example, if you are porting LLVM to a new -architecture or operating system. +LLVM C/C++ front-end from its source code. You have to do this, for example, if +you are porting LLVM to a new architecture or operating system, if you are +working from Top-Of-Tree CVS/SVN, or if there is no precompiled snapshot +available. NOTE: This is currently a somewhat fragile, error-prone process, and you should only try to do it if: @@ -71,7 +73,8 @@ versions is incapable of compiling the LLVM GCC front-end correctly. If your Cygwin installation includes GCC 3.3.3, we strongly recommend that you download -GCC 3.4.3, build it separately, and use it for compiling the LLVM GCC front-end. This has been +GCC 3.4.3, build it separately, and use it for compiling the LLVM GCC front-end. + This has been shown to work correctly. Some versions of Cygwin utilize an experimental version of GNU binutils that will cause the GNU ld linker to fail an assertion when linking @@ -94,18 +97,24 @@ - Instructions + llvm-gcc4 Instructions - + +This section describes how to aquire and build llvm-gcc4, which is based on +the GCC 4.0.1 front-end. This front-end supports C, C++, Objective-C, and +Objective-C++. Note that the instructions for building this front-end are +completely different than those for building llvm-gcc3. + + Retrieve the appropriate llvm-gcc4-x.y.source.tar.gz archive from the llvm web site. It is also possible to download the sources of the llvm-gcc4 front end from -a read-only mirror using subversion. To check out the code the first time use; +a read-only mirror using subversion. To check out the code the first time use: svn co svn://anonsvn.opensource.apple.com/svn/llvm dst-directory @@ -117,6 +126,23 @@ The mirror is brought up to date every evening. + +Follow the directions in the top-level README.LLVM file for up-to-date +instructions on how to build llvm-gcc4. + + + + + + llvm-gcc3 Instructions + + + + + +Aquire llvm-gcc3 from LLVM CVS or +from a http://llvm.org/releases/";>release tarball. + Configure and build the LLVM libraries and tools. There are two ways to do this: either with objdir == srcdir or objdir != srcdir. It is recommended @@ -314,51 +340,8 @@ -The software also has the following additional copyrights: +More information is available in the FAQ. - - - -Copyright (c) 2003, 2004, 2005 University of Illinois at Urbana-Champaign. -All rights reserved. - -Developed by: - -LLVM Team - -University of Illinois at Urbana-Champaign - -http://llvm.org - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS -FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE -SOFTWARE. - -Copyright (c) 1994 -Hewlett-Packard Company - -Permission to use, copy, modify, distribute and sell this software -and its documentation for any purpose is hereby granted without fee, -provided that the above copyright notice appear in all copies and -that both that copyright notice and this permission notice appear -in supporting documentation. Hewlett-Packard Company makes no -representations about the suitability of this software for any -purpose. It is provided "as is" without express or implied warranty. - -Copyright (c) 1996, 1997, 1998, 1999 -Silicon Graphics Computer Systems, Inc. - -Permission to use, copy, modify, distribute and sell this software -and its documentation for any purpose is hereby granted without fee, -provided that the above copyright notice appear in all copies and -that both that copyright notice and this permission notice appear -in supporting documentation. Silicon Graphics makes no -representations about the suitability of this software for any -purpose. It is provided "as is" without express or i
[llvm-commits] CVS: llvm/lib/VMCore/Verifier.cpp
Changes in directory llvm/lib/VMCore:
Verifier.cpp updated: 1.158 -> 1.159
---
Log message:
Fix PR826: http://llvm.org/PR826 , testcase here:
Regression/Verifier/2006-07-11-StoreStruct.ll
---
Diffs of the changes: (+8 -2)
Verifier.cpp | 10 --
1 files changed, 8 insertions(+), 2 deletions(-)
Index: llvm/lib/VMCore/Verifier.cpp
diff -u llvm/lib/VMCore/Verifier.cpp:1.158 llvm/lib/VMCore/Verifier.cpp:1.159
--- llvm/lib/VMCore/Verifier.cpp:1.158 Thu Jul 6 13:01:23 2006
+++ llvm/lib/VMCore/Verifier.cppTue Jul 11 15:29:49 2006
@@ -652,10 +652,16 @@
}
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
-// Check to make sure that the "address of" an intrinsic function is never
-// taken.
Assert1(I.getOperand(i) != 0, "Instruction has null operand!", &I);
+
+// Check to make sure that only first-class-values are operands to
+// instructions.
+Assert1(I.getOperand(i)->getType()->isFirstClassType(),
+"Instruction operands must be first-class values!", &I);
+
if (Function *F = dyn_cast(I.getOperand(i))) {
+ // Check to make sure that the "address of" an intrinsic function is
never
+ // taken.
Assert1(!F->isIntrinsic() || (i == 0 && isa(I)),
"Cannot take the address of an intrinsic!", &I);
} else if (BasicBlock *OpBB = dyn_cast(I.getOperand(i))) {
___
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[llvm-commits] CVS: llvm/test/Regression/Verifier/2006-07-11-StoreStruct.ll
Changes in directory llvm/test/Regression/Verifier:
2006-07-11-StoreStruct.ll added (r1.1)
---
Log message:
Testcase for PR826: http://llvm.org/PR826
---
Diffs of the changes: (+11 -0)
2006-07-11-StoreStruct.ll | 11 +++
1 files changed, 11 insertions(+)
Index: llvm/test/Regression/Verifier/2006-07-11-StoreStruct.ll
diff -c /dev/null llvm/test/Regression/Verifier/2006-07-11-StoreStruct.ll:1.1
*** /dev/null Tue Jul 11 15:29:31 2006
--- llvm/test/Regression/Verifier/2006-07-11-StoreStruct.ll Tue Jul 11
15:29:21 2006
***
*** 0
--- 1,11
+ ; RUN: not llvm-as %s -o /dev/null -f
+ ; PR826
+
+ %struct_4 = type { int }
+
+ implementation ; Functions:
+
+ void %test() {
+ store %struct_4 zeroinitializer, %struct_4* null
+ unreachable
+ }
___
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[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.td updated: 1.278 -> 1.279
---
Log message:
Emit inc / dec of registers as one byte instruction.
---
Diffs of the changes: (+4 -4)
X86InstrInfo.td |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.278
llvm/lib/Target/X86/X86InstrInfo.td:1.279
--- llvm/lib/Target/X86/X86InstrInfo.td:1.278 Wed Jun 28 19:36:51 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td Tue Jul 11 14:49:49 2006
@@ -1095,9 +1095,9 @@
def INC8r : I<0xFE, MRM0r, (ops GR8 :$dst, GR8 :$src), "inc{b} $dst",
[(set GR8:$dst, (add GR8:$src, 1))]>;
let isConvertibleToThreeAddress = 1 in { // Can transform into LEA.
-def INC16r : I<0xFF, MRM0r, (ops GR16:$dst, GR16:$src), "inc{w} $dst",
+def INC16r : I<0x40, AddRegFrm, (ops GR16:$dst, GR16:$src), "inc{w} $dst",
[(set GR16:$dst, (add GR16:$src, 1))]>, OpSize;
-def INC32r : I<0xFF, MRM0r, (ops GR32:$dst, GR32:$src), "inc{l} $dst",
+def INC32r : I<0x40, AddRegFrm, (ops GR32:$dst, GR32:$src), "inc{l} $dst",
[(set GR32:$dst, (add GR32:$src, 1))]>;
}
let isTwoAddress = 0 in {
@@ -1112,9 +1112,9 @@
def DEC8r : I<0xFE, MRM1r, (ops GR8 :$dst, GR8 :$src), "dec{b} $dst",
[(set GR8:$dst, (add GR8:$src, -1))]>;
let isConvertibleToThreeAddress = 1 in { // Can transform into LEA.
-def DEC16r : I<0xFF, MRM1r, (ops GR16:$dst, GR16:$src), "dec{w} $dst",
+def DEC16r : I<0x48, AddRegFrm, (ops GR16:$dst, GR16:$src), "dec{w} $dst",
[(set GR16:$dst, (add GR16:$src, -1))]>, OpSize;
-def DEC32r : I<0xFF, MRM1r, (ops GR32:$dst, GR32:$src), "dec{l} $dst",
+def DEC32r : I<0x48, AddRegFrm, (ops GR32:$dst, GR32:$src), "dec{l} $dst",
[(set GR32:$dst, (add GR32:$src, -1))]>;
}
___
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[llvm-commits] CVS: llvm/Makefile.rules
Changes in directory llvm: Makefile.rules updated: 1.384 -> 1.385 --- Log message: Profile builds should always have debug info enabled. --- Diffs of the changes: (+3 -3) Makefile.rules |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/Makefile.rules diff -u llvm/Makefile.rules:1.384 llvm/Makefile.rules:1.385 --- llvm/Makefile.rules:1.384 Thu Jun 29 14:38:04 2006 +++ llvm/Makefile.rules Tue Jul 11 13:33:50 2006 @@ -208,9 +208,9 @@ ifdef ENABLE_PROFILING BuildMode := Profile - CXX.Flags := $(OPTIMIZE_OPTION) -pg - C.Flags := $(OPTIMIZE_OPTION) -pg - LD.Flags := $(OPTIMIZE_OPTION) -pg + CXX.Flags := $(OPTIMIZE_OPTION) -pg -g + C.Flags := $(OPTIMIZE_OPTION) -pg -g + LD.Flags := $(OPTIMIZE_OPTION) -pg -g else ifdef ENABLE_OPTIMIZED BuildMode := Release ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.498 -> 1.499 --- Log message: Silence a warning produced in assertions-disabled mode --- Diffs of the changes: (+1 -1) InstructionCombining.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.498 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.499 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.498 Mon Jul 10 17:15:25 2006 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Tue Jul 11 13:31:26 2006 @@ -2902,7 +2902,7 @@ // If they do then *success* we can turn this into a bswap. Figure out what // bswap to make it into. Module *M = I.getParent()->getParent()->getParent(); - const char *FnName; + const char *FnName = 0; if (I.getType() == Type::UShortTy) FnName = "llvm.bswap.i16"; else if (I.getType() == Type::UIntTy) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/docs/MakefileGuide.html
Changes in directory llvm/docs: MakefileGuide.html updated: 1.34 -> 1.35 --- Log message: Fix typo. --- Diffs of the changes: (+2 -2) MakefileGuide.html |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/docs/MakefileGuide.html diff -u llvm/docs/MakefileGuide.html:1.34 llvm/docs/MakefileGuide.html:1.35 --- llvm/docs/MakefileGuide.html:1.34 Sat Jun 3 13:55:33 2006 +++ llvm/docs/MakefileGuide.htmlTue Jul 11 13:25:57 2006 @@ -237,7 +237,7 @@ LIBRARYNAME = mylib SHARED_LIBRARY = 1 ARCHIVE_LIBRARY = 1 - DONT_BUILT_RELINKED = 1 + DONT_BUILD_RELINKED = 1 says to build a library named "mylib" with both a shared library (mylib.so) and an archive library (mylib.a) version but @@ -1004,7 +1004,7 @@ mailto:[EMAIL PROTECTED]">Reid Spencer http://llvm.org";>The LLVM Compiler Infrastructure - Last modified: $Date: 2006/06/03 18:55:33 $ + Last modified: $Date: 2006/07/11 18:25:57 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.97 -> 1.98
---
Log message:
It was pointed out that DEBUG() is only available with -debug.
---
Diffs of the changes: (+3 -1)
ScheduleDAG.cpp |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.97
llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.98
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.97 Tue Jul 11 12:58:07 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Tue Jul 11 13:25:13 2006
@@ -421,7 +421,9 @@
} else {
switch (Node->getOpcode()) {
default:
- DEBUG(Node->dump());
+#ifndef NDEBUG
+ Node->dump();
+#endif
assert(0 && "This target-independent node should have been selected!");
case ISD::EntryToken: // fall thru
case ISD::TokenFactor:
___
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.43 -> 1.44
---
Log message:
It was pointed out that DEBUG() is only available with -debug.
---
Diffs of the changes: (+5 -1)
IA64ISelDAGToDAG.cpp |6 +-
1 files changed, 5 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.43
llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.44
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.43 Tue Jul 11 12:58:07 2006
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp Tue Jul 11 13:25:13 2006
@@ -511,7 +511,11 @@
N->getValueType(0) : cast(N->getOperand(3))->getVT();
unsigned Opc;
switch (TypeBeingLoaded) {
-default: DEBUG(N->dump()); assert(0 && "Cannot load this type!");
+default:
+#ifndef NDEBUG
+ N->dump();
+#endif
+ assert(0 && "Cannot load this type!");
case MVT::i1: { // this is a bool
Opc = IA64::LD1; // first we load a byte, then compare for != 0
if(N->getValueType(0) == MVT::i1) { // XXX: early exit!
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[llvm-commits] CVS: llvm/lib/Analysis/IPA/Andersens.cpp
Changes in directory llvm/lib/Analysis/IPA:
Andersens.cpp updated: 1.29 -> 1.30
---
Log message:
It was pointed out that DEBUG() is only available with -debug.
---
Diffs of the changes: (+3 -1)
Andersens.cpp |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index: llvm/lib/Analysis/IPA/Andersens.cpp
diff -u llvm/lib/Analysis/IPA/Andersens.cpp:1.29
llvm/lib/Analysis/IPA/Andersens.cpp:1.30
--- llvm/lib/Analysis/IPA/Andersens.cpp:1.29Tue Jul 11 12:58:07 2006
+++ llvm/lib/Analysis/IPA/Andersens.cpp Tue Jul 11 13:25:13 2006
@@ -260,7 +260,9 @@
std::map::iterator I = ValueNodes.find(V);
if (I == ValueNodes.end()) {
-DEBUG(V->dump());
+#ifndef NDEBUG
+V->dump();
+#endif
assert(0 && "Value does not have a node in the points-to graph!");
}
return &GraphNodes[I->second];
___
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[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.218 -> 1.219
---
Log message:
It was pointed out that DEBUG() is only available with -debug.
---
Diffs of the changes: (+12 -4)
DAGISelEmitter.cpp | 16
1 files changed, 12 insertions(+), 4 deletions(-)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.218
llvm/utils/TableGen/DAGISelEmitter.cpp:1.219
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.218Tue Jul 11 12:58:07 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Tue Jul 11 13:25:13 2006
@@ -2136,7 +2136,9 @@
if (DefInit *Pred = dynamic_cast(Predicates->getElement(i)))
{
Record *Def = Pred->getDef();
if (!Def->isSubClassOf("Predicate")) {
-DEBUG(Def->dump());
+#ifndef NDEBUG
+Def->dump();
+#endif
assert(0 && "Unknown predicate type!");
}
if (!PredicateCheck.empty())
@@ -2344,8 +2346,10 @@
emitCheck("cast(" + RootName + utostr(OpNo) +
")->get() == ISD::" + LeafRec->getName());
} else {
-DEBUG(Child->dump());
+#ifndef NDEBUG
+Child->dump();
std::cerr << " ";
+#endif
assert(0 && "Unknown leaf type!");
}
} else if (IntInit *II =
@@ -2357,7 +2361,9 @@
emitCheck("CN" + utostr(CTmp) + " == " +itostr(II->getValue()));
} else {
- DEBUG(Child->dump());
+#ifndef NDEBUG
+ Child->dump();
+#endif
assert(0 && "Unknown leaf type!");
}
}
@@ -2510,7 +2516,9 @@
return std::make_pair(1, ResNo);
}
- DEBUG(N->dump());
+#ifndef NDEBUG
+ N->dump();
+#endif
assert(0 && "Unknown leaf type!");
return std::make_pair(1, ~0U);
}
___
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[llvm-commits] CVS: llvm/lib/Analysis/IPA/Andersens.cpp
Changes in directory llvm/lib/Analysis/IPA:
Andersens.cpp updated: 1.28 -> 1.29
---
Log message:
Ensure that dump calls that are associated with asserts are removed from
non-debug build.
---
Diffs of the changes: (+2 -3)
Andersens.cpp |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Index: llvm/lib/Analysis/IPA/Andersens.cpp
diff -u llvm/lib/Analysis/IPA/Andersens.cpp:1.28
llvm/lib/Analysis/IPA/Andersens.cpp:1.29
--- llvm/lib/Analysis/IPA/Andersens.cpp:1.28Wed May 24 12:04:04 2006
+++ llvm/lib/Analysis/IPA/Andersens.cpp Tue Jul 11 12:58:07 2006
@@ -260,9 +260,8 @@
std::map::iterator I = ValueNodes.find(V);
if (I == ValueNodes.end()) {
-V->dump();
-assert(I != ValueNodes.end() &&
- "Value does not have a node in the points-to graph!");
+DEBUG(V->dump());
+assert(0 && "Value does not have a node in the points-to graph!");
}
return &GraphNodes[I->second];
}
___
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[llvm-commits] CVS: llvm/utils/TableGen/DAGISelEmitter.cpp
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.217 -> 1.218
---
Log message:
Ensure that dump calls that are associated with asserts are removed from
non-debug build.
---
Diffs of the changes: (+4 -4)
DAGISelEmitter.cpp |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.217
llvm/utils/TableGen/DAGISelEmitter.cpp:1.218
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.217Thu Jun 29 18:57:05 2006
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Tue Jul 11 12:58:07 2006
@@ -2136,7 +2136,7 @@
if (DefInit *Pred = dynamic_cast(Predicates->getElement(i)))
{
Record *Def = Pred->getDef();
if (!Def->isSubClassOf("Predicate")) {
-Def->dump();
+DEBUG(Def->dump());
assert(0 && "Unknown predicate type!");
}
if (!PredicateCheck.empty())
@@ -2344,7 +2344,7 @@
emitCheck("cast(" + RootName + utostr(OpNo) +
")->get() == ISD::" + LeafRec->getName());
} else {
-Child->dump();
+DEBUG(Child->dump());
std::cerr << " ";
assert(0 && "Unknown leaf type!");
}
@@ -2357,7 +2357,7 @@
emitCheck("CN" + utostr(CTmp) + " == " +itostr(II->getValue()));
} else {
- Child->dump();
+ DEBUG(Child->dump());
assert(0 && "Unknown leaf type!");
}
}
@@ -2510,7 +2510,7 @@
return std::make_pair(1, ResNo);
}
- N->dump();
+ DEBUG(N->dump());
assert(0 && "Unknown leaf type!");
return std::make_pair(1, ~0U);
}
___
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[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/Alpha:
AlphaISelDAGToDAG.cpp updated: 1.46 -> 1.47
---
Log message:
Ensure that dump calls that are associated with asserts are removed from
non-debug build.
---
Diffs of the changes: (+1 -1)
AlphaISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.46
llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.47
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.46Wed Jun 21 10:42:36 2006
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Tue Jul 11 12:58:07 2006
@@ -303,7 +303,7 @@
bool rev = false;
bool isNE = false;
switch(CC) {
- default: N->dump(); assert(0 && "Unknown FP comparison!");
+ default: DEBUG(N->dump()); assert(0 && "Unknown FP comparison!");
case ISD::SETEQ: case ISD::SETOEQ: case ISD::SETUEQ: Opc =
Alpha::CMPTEQ; break;
case ISD::SETLT: case ISD::SETOLT: case ISD::SETULT: Opc =
Alpha::CMPTLT; break;
case ISD::SETLE: case ISD::SETOLE: case ISD::SETULE: Opc =
Alpha::CMPTLE; break;
___
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.42 -> 1.43
---
Log message:
Ensure that dump calls that are associated with asserts are removed from
non-debug build.
---
Diffs of the changes: (+1 -1)
IA64ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.42
llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.43
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.42 Wed May 24 19:24:28 2006
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp Tue Jul 11 12:58:07 2006
@@ -511,7 +511,7 @@
N->getValueType(0) : cast(N->getOperand(3))->getVT();
unsigned Opc;
switch (TypeBeingLoaded) {
-default: N->dump(); assert(0 && "Cannot load this type!");
+default: DEBUG(N->dump()); assert(0 && "Cannot load this type!");
case MVT::i1: { // this is a bool
Opc = IA64::LD1; // first we load a byte, then compare for != 0
if(N->getValueType(0) == MVT::i1) { // XXX: early exit!
___
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCCodeEmitter.cpp updated: 1.61 -> 1.62
---
Log message:
Ensure that dump calls that are associated with asserts are removed from
non-debug build.
---
Diffs of the changes: (+1 -1)
PPCCodeEmitter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp
diff -u llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.61
llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.62
--- llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.61 Wed Jun 28 18:17:23 2006
+++ llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp Tue Jul 11 12:58:07 2006
@@ -160,7 +160,7 @@
Reloc = PPC::reloc_pcrel_bx;
else {
switch (MI.getOpcode()) {
- default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
+ default: DEBUG(MI.dump()); assert(0 && "Unknown instruction for
relocation!");
case PPC::LIS:
Reloc = PPC::reloc_absolute_high; // Pointer to symbol
break;
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp ScheduleDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.381 -> 1.382
ScheduleDAG.cpp updated: 1.96 -> 1.97
---
Log message:
Ensure that dump calls that are associated with asserts are removed from
non-debug build.
---
Diffs of the changes: (+14 -2)
LegalizeDAG.cpp | 14 +-
ScheduleDAG.cpp |2 +-
2 files changed, 14 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.381
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.382
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.381 Mon Jul 10 20:40:09 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Jul 11 12:58:07 2006
@@ -540,7 +540,9 @@
return Result.getValue(Op.ResNo);
}
// Otherwise this is an unhandled builtin node. splat.
+#ifndef NDEBUG
std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
+#endif
assert(0 && "Do not know how to legalize this operator!");
abort();
case ISD::GlobalAddress:
@@ -2865,7 +2867,9 @@
case ISD::CopyFromReg:
assert(0 && "CopyFromReg must be legal!");
default:
+#ifndef NDEBUG
std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
+#endif
assert(0 && "Do not know how to promote this operator!");
abort();
case ISD::UNDEF:
@@ -4205,7 +4209,9 @@
case ISD::CopyFromReg:
assert(0 && "CopyFromReg must be legal!");
default:
+#ifndef NDEBUG
std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
+#endif
assert(0 && "Do not know how to expand this operator!");
abort();
case ISD::UNDEF:
@@ -4703,7 +4709,11 @@
}
switch (Node->getOpcode()) {
- default: Node->dump(); assert(0 && "Unhandled operation in SplitVectorOp!");
+ default:
+#ifndef NDEBUG
+Node->dump();
+#endif
+assert(0 && "Unhandled operation in SplitVectorOp!");
case ISD::VBUILD_VECTOR: {
std::vector LoOps(Node->op_begin(),
Node->op_begin()+NewNumElts);
LoOps.push_back(NewNumEltsNode);
@@ -4820,7 +4830,9 @@
SDOperand Result;
switch (Node->getOpcode()) {
default:
+#ifndef NDEBUG
Node->dump(); std::cerr << "\n";
+#endif
assert(0 && "Unknown vector operation in PackVectorOp!");
case ISD::VADD:
case ISD::VSUB:
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.96
llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.97
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.96 Thu Jun 15 02:22:16 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Tue Jul 11 12:58:07 2006
@@ -421,7 +421,7 @@
} else {
switch (Node->getOpcode()) {
default:
- Node->dump();
+ DEBUG(Node->dump());
assert(0 && "This target-independent node should have been selected!");
case ISD::EntryToken: // fall thru
case ISD::TokenFactor:
___
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[llvm-commits] CVS: llvm/lib/VMCore/IntrinsicInst.cpp
Changes in directory llvm/lib/VMCore:
IntrinsicInst.cpp updated: 1.8 -> 1.9
---
Log message:
1. Support for c++ mangled names.
2. Support for private/protected class members.
---
Diffs of the changes: (+2 -2)
IntrinsicInst.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/VMCore/IntrinsicInst.cpp
diff -u llvm/lib/VMCore/IntrinsicInst.cpp:1.8
llvm/lib/VMCore/IntrinsicInst.cpp:1.9
--- llvm/lib/VMCore/IntrinsicInst.cpp:1.8 Mon Jun 19 07:54:15 2006
+++ llvm/lib/VMCore/IntrinsicInst.cpp Tue Jul 11 10:58:09 2006
@@ -61,7 +61,7 @@
std::string DbgStopPointInst::getFileName() const {
// Once the operand indices are verified, update this assert
- assert(LLVMDebugVersion == (4 << 16) && "Verify operand indices");
+ assert(LLVMDebugVersion == (5 << 16) && "Verify operand indices");
GlobalVariable *GV = cast(getContext());
ConstantStruct *CS = cast(GV->getInitializer());
return CS->getOperand(3)->getStringValue();
@@ -69,7 +69,7 @@
std::string DbgStopPointInst::getDirectory() const {
// Once the operand indices are verified, update this assert
- assert(LLVMDebugVersion == (4 << 16) && "Verify operand indices");
+ assert(LLVMDebugVersion == (5 << 16) && "Verify operand indices");
GlobalVariable *GV = cast(getContext());
ConstantStruct *CS = cast(GV->getInitializer());
return CS->getOperand(4)->getStringValue();
___
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[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp MachineDebugInfo.cpp
Changes in directory llvm/lib/CodeGen:
DwarfWriter.cpp updated: 1.67 -> 1.68
MachineDebugInfo.cpp updated: 1.44 -> 1.45
---
Log message:
1. Support for c++ mangled names.
2. Support for private/protected class members.
---
Diffs of the changes: (+14 -1)
DwarfWriter.cpp |6 ++
MachineDebugInfo.cpp |9 -
2 files changed, 14 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.67
llvm/lib/CodeGen/DwarfWriter.cpp:1.68
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.67 Fri Jun 23 07:51:53 2006
+++ llvm/lib/CodeGen/DwarfWriter.cppTue Jul 11 10:58:09 2006
@@ -1383,6 +1383,12 @@
Block->AddUInt(DW_FORM_udata, FieldOffset >> 3);
Block->ComputeSize(*this);
Member->AddBlock(DW_AT_data_member_location, 0, Block);
+
+if (MemberDesc->isProtected()) {
+ Member->AddUInt(DW_AT_accessibility, 0, DW_ACCESS_protected);
+} else if (MemberDesc->isPrivate()) {
+ Member->AddUInt(DW_AT_accessibility, 0, DW_ACCESS_private);
+}
Ty->AddChild(Member);
}
Index: llvm/lib/CodeGen/MachineDebugInfo.cpp
diff -u llvm/lib/CodeGen/MachineDebugInfo.cpp:1.44
llvm/lib/CodeGen/MachineDebugInfo.cpp:1.45
--- llvm/lib/CodeGen/MachineDebugInfo.cpp:1.44 Tue Jun 20 14:41:06 2006
+++ llvm/lib/CodeGen/MachineDebugInfo.cpp Tue Jul 11 10:58:09 2006
@@ -671,6 +671,7 @@
, Size(0)
, Align(0)
, Offset(0)
+, Flags(0)
{}
/// ApplyToFields - Target the visitor to the fields of the TypeDesc.
@@ -685,6 +686,7 @@
Visitor->Apply(Size);
Visitor->Apply(Align);
Visitor->Apply(Offset);
+ if (getVersion() > LLVMDebugVersion4) Visitor->Apply(Flags);
}
/// getDescString - Return a string used to compose global names and labels.
@@ -710,7 +712,8 @@
<< "Line(" << Line << "), "
<< "Size(" << Size << "), "
<< "Align(" << Align << "), "
-<< "Offset(" << Offset << ")\n";
+<< "Offset(" << Offset << "), "
+<< "Flags(" << Flags << ")\n";
}
#endif
@@ -1029,6 +1032,7 @@
: AnchoredDesc(T)
, Context(0)
, Name("")
+, DisplayName("")
, File(NULL)
, Line(0)
, TyDesc(NULL)
@@ -1043,6 +1047,7 @@
Visitor->Apply(Context);
Visitor->Apply(Name);
+ if (getVersion() > LLVMDebugVersion4) Visitor->Apply(DisplayName);
Visitor->Apply(File);
Visitor->Apply(Line);
Visitor->Apply(TyDesc);
@@ -1096,6 +1101,7 @@
<< "Tag(" << getTag() << "), "
<< "Anchor(" << getAnchor() << "), "
<< "Name(\"" << getName() << "\"), "
+<< "DisplayName(\"" << getDisplayName() << "\"), "
<< "File(" << getFile() << "),"
<< "Line(" << getLine() << "),"
<< "Type(\"" << getType() << "\"), "
@@ -1148,6 +1154,7 @@
<< "Tag(" << getTag() << "), "
<< "Anchor(" << getAnchor() << "), "
<< "Name(\"" << getName() << "\"), "
+<< "DisplayName(\"" << getDisplayName() << "\"), "
<< "File(" << getFile() << "),"
<< "Line(" << getLine() << "),"
<< "Type(\"" << getType() << "\"), "
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineDebugInfo.h
Changes in directory llvm/include/llvm/CodeGen:
MachineDebugInfo.h updated: 1.37 -> 1.38
---
Log message:
1. Support for c++ mangled names.
2. Support for private/protected class members.
---
Diffs of the changes: (+18 -1)
MachineDebugInfo.h | 19 ++-
1 files changed, 18 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/CodeGen/MachineDebugInfo.h
diff -u llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.37
llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.38
--- llvm/include/llvm/CodeGen/MachineDebugInfo.h:1.37 Fri Jun 23 07:51:53 2006
+++ llvm/include/llvm/CodeGen/MachineDebugInfo.hTue Jul 11 10:58:09 2006
@@ -57,7 +57,8 @@
// Debug info constants.
enum {
- LLVMDebugVersion = (4 << 16), // Current version of debug
information.
+ LLVMDebugVersion = (5 << 16), // Current version of debug
information.
+ LLVMDebugVersion4 = (4 << 16),// Constant for version 4.
LLVMDebugVersionMask = 0x // Mask for version number.
};
@@ -276,6 +277,10 @@
///
class TypeDesc : public DebugInfoDesc {
private:
+ enum {
+FlagPrivate= 1 << 0,
+FlagProtected = 1 << 1
+ };
DebugInfoDesc *Context; // Context debug descriptor.
std::string Name; // Type name (may be empty.)
DebugInfoDesc *File; // Defined compile unit (may be NULL.)
@@ -283,6 +288,7 @@
uint64_t Size;// Type bit size (may be zero.)
uint64_t Align; // Type bit alignment (may be zero.)
uint64_t Offset; // Type bit offset (may be zero.)
+ unsigned Flags; // Miscellaneous flags.
public:
TypeDesc(unsigned T);
@@ -297,6 +303,12 @@
uint64_t getSize() const { return Size; }
uint64_t getAlign()const { return Align; }
uint64_t getOffset() const { return Offset; }
+ bool isPrivate() const {
+return (Flags & FlagPrivate) != 0;
+ }
+ bool isProtected() const {
+return (Flags & FlagProtected) != 0;
+ }
void setContext(DebugInfoDesc *C){ Context = C; }
void setName(const std::string &N) { Name = N; }
void setFile(CompileUnitDesc *U) {
@@ -306,6 +318,8 @@
void setSize(uint64_t S) { Size = S; }
void setAlign(uint64_t A){ Align = A; }
void setOffset(uint64_t O) { Offset = O; }
+ void setIsPrivate() { Flags |= FlagPrivate; }
+ void setIsProtected(){ Flags |= FlagProtected; }
/// ApplyToFields - Target the visitor to the fields of the TypeDesc.
///
@@ -572,6 +586,7 @@
private:
DebugInfoDesc *Context; // Context debug descriptor.
std::string Name; // Global name.
+ std::string DisplayName; // C++ unmangled name.
DebugInfoDesc *File; // Defined compile unit (may be NULL.)
unsigned Line;// Defined line# (may be zero.)
DebugInfoDesc *TyDesc;// Type debug descriptor.
@@ -585,6 +600,7 @@
// Accessors
DebugInfoDesc *getContext()const { return Context; }
const std::string &getName() const { return Name; }
+ const std::string &getDisplayName()const { return DisplayName; }
CompileUnitDesc *getFile() const {
return static_cast(File);
}
@@ -596,6 +612,7 @@
bool isDefinition()const { return IsDefinition; }
void setContext(DebugInfoDesc *C){ Context = C; }
void setName(const std::string &N) { Name = N; }
+ void setDisplayName(const std::string &N){ DisplayName = N; }
void setFile(CompileUnitDesc *U) {
File = static_cast(U);
}
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.td ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.4 -> 1.5
ARMISelDAGToDAG.cpp updated: 1.14 -> 1.15
ARMInstrInfo.td updated: 1.6 -> 1.7
ARMRegisterInfo.cpp updated: 1.6 -> 1.7
---
Log message:
add the memri memory operand
this makes it possible for ldr instructions with non-zero immediate
---
Diffs of the changes: (+42 -14)
ARMAsmPrinter.cpp |6 ++
ARMISelDAGToDAG.cpp |7 +--
ARMInstrInfo.td | 17 +
ARMRegisterInfo.cpp | 26 ++
4 files changed, 42 insertions(+), 14 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.4
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.5
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.4 Fri May 26 05:56:17 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Jul 11 06:36:48 2006
@@ -58,6 +58,12 @@
return "ARM Assembly Printer";
}
+void printMemRegImm(const MachineInstr *MI, unsigned OpNo) {
+ printOperand(MI, OpNo + 1);
+ O << ", ";
+ printOperand(MI, OpNo);
+}
+
void printOperand(const MachineInstr *MI, int opNum);
void printMemOperand(const MachineInstr *MI, int opNum,
const char *Modifier = 0);
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.14
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.15
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.14Sun Jul 9 20:41:35 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Jul 11 06:36:48 2006
@@ -164,7 +164,7 @@
void Select(SDOperand &Result, SDOperand Op);
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
- bool SelectAddrReg(SDOperand N, SDOperand &Base);
+ bool SelectAddrRegImm(SDOperand N, SDOperand &Offset, SDOperand &Base);
// Include the pieces autogenerated from the target description.
#include "ARMGenDAGISel.inc"
@@ -183,7 +183,10 @@
ScheduleAndEmitDAG(DAG);
}
-bool ARMDAGToDAGISel::SelectAddrReg(SDOperand N, SDOperand &Base) {
+//register plus/minus 12 bit offset
+bool ARMDAGToDAGISel::SelectAddrRegImm(SDOperand N, SDOperand &Offset,
+ SDOperand &Base) {
+ Offset = CurDAG->getTargetConstant(0, MVT::i32);
if (FrameIndexSDNode *FI = dyn_cast(N)) {
Base = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType());
}
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.6
llvm/lib/Target/ARM/ARMInstrInfo.td:1.7
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.6 Sun Jul 9 20:41:35 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Tue Jul 11 06:36:48 2006
@@ -12,9 +12,18 @@
//
//===--===//
+// Address operands
+def memri : Operand {
+ let PrintMethod = "printMemRegImm";
+ let NumMIOperands = 2;
+ let MIOperandInfo = (ops i32imm, ptr_rc);
+}
+
// Define ARM specific addressing mode.
- //register or frame index
-def raddr : ComplexPattern;
+//register plus/minus 12 bit offset
+def iaddr : ComplexPattern;
+//register plus scaled register
+//def raddr : ComplexPattern;
//===--===//
// Instructions
@@ -42,9 +51,9 @@
def bxr: InstARM<(ops IntRegs:$dst), "bx $dst", [(brind IntRegs:$dst)]>;
-def ldr : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
+def ldr : InstARM<(ops IntRegs:$dst, memri:$addr),
"ldr $dst, [$addr]",
- [(set IntRegs:$dst, (load raddr:$addr))]>;
+ [(set IntRegs:$dst, (load iaddr:$addr))]>;
def str : InstARM<(ops IntRegs:$src, IntRegs:$addr),
"str $src, [$addr]",
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.6
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.7
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.6 Sun Jul 9 20:41:35 2006
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Tue Jul 11 06:36:48 2006
@@ -83,23 +83,33 @@
assert (MI.getOpcode() == ARM::ldr);
- unsigned FrameIdx = 1;
+ unsigned FrameIdx = 2;
+ unsigned OffIdx = 1;
int FrameIndex = MI.getOperand(FrameIdx).getFrameIndex();
int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
+ assert (MI.getOperand(OffIdx).getImmedValue() == 0);
unsigned StackSize = MF.getFrameInfo()->getStackSize();
Offset += StackSize;
- // Insert a set of r12 with the full address
- // r12 = r13 + offset
- MachineBasicBlock *MBB2 = MI.getParent();
- BuildMI(*MBB2, II, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(Offset);
-
- // Replace the FrameIndex with r12
- MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12);
+ assert (Offset >= 0);
+ if (Offset < 4096) {
+// Replace the FrameIndex with r13
+MI.getOperand(FrameIdx).ChangeToRegister(ARM::R13);
+// Replace the ldr offset with Offset
+MI.getOperand(OffIdx).ChangeToImmediate(Offset);
+ } else {
+
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Changes in directory llvm/lib/Transforms/Scalar:
IndVarSimplify.cpp updated: 1.84 -> 1.85
---
Log message:
Revert my indvars changes because they were breaking things. Unfortunately this
didn't start showing up until after the recent instcombine fixes.
---
Diffs of the changes: (+15 -29)
IndVarSimplify.cpp | 44 +++-
1 files changed, 15 insertions(+), 29 deletions(-)
Index: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
diff -u llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.84
llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.85
--- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.84 Mon Jun 26 21:17:08 2006
+++ llvm/lib/Transforms/Scalar/IndVarSimplify.cpp Tue Jul 11 02:25:33 2006
@@ -325,8 +325,20 @@
for (Value::use_iterator UI = I->use_begin(), E = I->use_end();
UI != E; ++UI) {
Instruction *User = cast(*UI);
- if (!L->contains(User->getParent()))
+ if (!L->contains(User->getParent())) {
+// If this is a PHI node in the exit block and we're inserting,
+// into the exit block, it must have a single entry. In this
+// case, we can't insert the code after the PHI and have the
PHI
+// still use it. Instead, don't insert the the PHI.
+if (PHINode *PN = dyn_cast(User)) {
+ // FIXME: This is a case where LCSSA pessimizes code, this
+ // should be fixed better.
+ if (PN->getNumOperands() == 2 &&
+ PN->getParent() == BlockToInsertInto)
+continue;
+}
ExtraLoopUsers.push_back(User);
+ }
}
if (!ExtraLoopUsers.empty()) {
@@ -346,34 +358,8 @@
// Rewrite any users of the computed value outside of the loop
// with the newly computed value.
-for (unsigned i = 0, e = ExtraLoopUsers.size(); i != e; ++i) {
- PHINode* PN = dyn_cast(ExtraLoopUsers[i]);
- if (PN && PN->getParent() == BlockToInsertInto) {
- // We're dealing with an LCSSA Phi. Handle it specially.
-Instruction* LCSSAInsertPt = BlockToInsertInto->begin();
-
-Instruction* NewInstr = dyn_cast(NewVal);
-if (Instruction* NewInstr = dyn_cast(NewVal))
- for (unsigned j = 0; j < NewInstr->getNumOperands();
++j){
-Instruction* PredI =
-
dyn_cast(NewInstr->getOperand(j));
-if (PredI && L->contains(PredI->getParent())) {
- PHINode* NewLCSSA = new PHINode(PredI->getType(),
-PredI->getName() +
".lcssa",
-LCSSAInsertPt);
- NewLCSSA->addIncoming(PredI,
-
BlockToInsertInto->getSinglePredecessor());
-
- NewInstr->replaceUsesOfWith(PredI, NewLCSSA);
-}
- }
-
-PN->replaceAllUsesWith(NewVal);
-PN->eraseFromParent();
- } else {
-ExtraLoopUsers[i]->replaceUsesOfWith(I, NewVal);
- }
-}
+for (unsigned i = 0, e = ExtraLoopUsers.size(); i != e; ++i)
+ ExtraLoopUsers[i]->replaceUsesOfWith(I, NewVal);
// If this instruction is dead now, schedule it to be removed.
if (I->use_empty())
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