[llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h
Changes in directory llvm/include/llvm/Transforms: Scalar.h updated: 1.76 -> 1.77 --- Log message: Now IndVarSimplify is a LoopPass. --- Diffs of the changes: (+1 -1) Scalar.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Transforms/Scalar.h diff -u llvm/include/llvm/Transforms/Scalar.h:1.76 llvm/include/llvm/Transforms/Scalar.h:1.77 --- llvm/include/llvm/Transforms/Scalar.h:1.76 Tue Mar 6 22:41:30 2007 +++ llvm/include/llvm/Transforms/Scalar.h Wed Mar 7 00:39:01 2007 @@ -92,7 +92,7 @@ // InductionVariableSimplify - Transform induction variables in a program to all // use a single canonical induction variable per loop. // -FunctionPass *createIndVarSimplifyPass(); +LoopPass *createIndVarSimplifyPass(); //===--===// // ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp
Changes in directory llvm/lib/Analysis: LoopPass.cpp updated: 1.17 -> 1.18 --- Log message: Now IndVarSimplify is a LoopPass. --- Diffs of the changes: (+3 -0) LoopPass.cpp |3 +++ 1 files changed, 3 insertions(+) Index: llvm/lib/Analysis/LoopPass.cpp diff -u llvm/lib/Analysis/LoopPass.cpp:1.17 llvm/lib/Analysis/LoopPass.cpp:1.18 --- llvm/lib/Analysis/LoopPass.cpp:1.17 Tue Mar 6 18:26:10 2007 +++ llvm/lib/Analysis/LoopPass.cpp Wed Mar 7 00:39:01 2007 @@ -14,6 +14,7 @@ //===--===// #include "llvm/Analysis/LoopPass.h" +#include "llvm/Analysis/ScalarEvolutionExpander.h" using namespace llvm; //===--===// @@ -148,6 +149,8 @@ // LPPassManager needs LoopInfo. In the long term LoopInfo class will // become part of LPPassManager. Info.addRequired(); + // Used by IndVar doInitialization. + Info.addRequired(); Info.setPreservesAll(); } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Changes in directory llvm/lib/Transforms/Scalar:
IndVarSimplify.cpp updated: 1.114 -> 1.115
---
Log message:
Now IndVarSimplify is a LoopPass.
---
Diffs of the changes: (+32 -27)
IndVarSimplify.cpp | 59 -
1 files changed, 32 insertions(+), 27 deletions(-)
Index: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
diff -u llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.114
llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.115
--- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.114 Sat Mar 3 21:43:23 2007
+++ llvm/lib/Transforms/Scalar/IndVarSimplify.cpp Wed Mar 7 00:39:01 2007
@@ -45,6 +45,7 @@
#include "llvm/Type.h"
#include "llvm/Analysis/ScalarEvolutionExpander.h"
#include "llvm/Analysis/LoopInfo.h"
+#include "llvm/Analysis/LoopPass.h"
#include "llvm/Support/CFG.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
@@ -62,33 +63,26 @@
STATISTIC(NumLFTR, "Number of loop exit tests replaced");
namespace {
- class VISIBILITY_HIDDEN IndVarSimplify : public FunctionPass {
+ class VISIBILITY_HIDDEN IndVarSimplify : public LoopPass {
LoopInfo*LI;
ScalarEvolution *SE;
bool Changed;
public:
-virtual bool runOnFunction(Function &) {
- LI = &getAnalysis();
- SE = &getAnalysis();
- Changed = false;
-
- // Induction Variables live in the header nodes of loops
- for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I)
-runOnLoop(*I);
- return Changed;
-}
+
+ bool runOnLoop(Loop *L, LPPassManager &LPM);
+ bool doInitialization(Loop *L, LPPassManager &LPM);
+ virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.addRequiredID(LCSSAID);
+ AU.addRequiredID(LoopSimplifyID);
+ AU.addRequired();
+ AU.addRequired();
+ AU.addPreservedID(LoopSimplifyID);
+ AU.addPreservedID(LCSSAID);
+ AU.setPreservesCFG();
+ }
-virtual void getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addRequiredID(LCSSAID);
- AU.addRequiredID(LoopSimplifyID);
- AU.addRequired();
- AU.addRequired();
- AU.addPreservedID(LoopSimplifyID);
- AU.addPreservedID(LCSSAID);
- AU.setPreservesCFG();
-}
private:
-void runOnLoop(Loop *L);
+
void EliminatePointerRecurrence(PHINode *PN, BasicBlock *Preheader,
std::set &DeadInsts);
Instruction *LinearFunctionTestReplace(Loop *L, SCEV *IterationCount,
@@ -100,7 +94,7 @@
RegisterPass X("indvars", "Canonicalize Induction
Variables");
}
-FunctionPass *llvm::createIndVarSimplifyPass() {
+LoopPass *llvm::createIndVarSimplifyPass() {
return new IndVarSimplify();
}
@@ -410,14 +404,16 @@
DeleteTriviallyDeadInstructions(InstructionsToDelete);
}
+bool IndVarSimplify::doInitialization(Loop *L, LPPassManager &LPM) {
-void IndVarSimplify::runOnLoop(Loop *L) {
+ Changed = false;
// First step. Check to see if there are any trivial GEP pointer
recurrences.
// If there are, change them into integer recurrences, permitting analysis by
// the SCEV routines.
//
BasicBlock *Header= L->getHeader();
BasicBlock *Preheader = L->getLoopPreheader();
+ SE = &LPM.getAnalysis();
std::set DeadInsts;
for (BasicBlock::iterator I = Header->begin(); isa(I); ++I) {
@@ -429,11 +425,19 @@
if (!DeadInsts.empty())
DeleteTriviallyDeadInstructions(DeadInsts);
+ return Changed;
+}
+
+bool IndVarSimplify::runOnLoop(Loop *L, LPPassManager &LPM) {
+
- // Next, transform all loops nesting inside of this loop.
- for (LoopInfo::iterator I = L->begin(), E = L->end(); I != E; ++I)
-runOnLoop(*I);
+ LI = &getAnalysis();
+ SE = &getAnalysis();
+ Changed = false;
+ BasicBlock *Header= L->getHeader();
+ std::set DeadInsts;
+
// Verify the input to the pass in already in LCSSA form.
assert(L->isLCSSAForm());
@@ -483,7 +487,7 @@
DeleteTriviallyDeadInstructions(InstructionsToDelete);
}
}
-return;
+return Changed;
}
// Compute the type of the largest recurrence expression.
@@ -585,4 +589,5 @@
DeleteTriviallyDeadInstructions(DeadInsts);
assert(L->isLCSSAForm());
+ return Changed;
}
___
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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrMMX.td
Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.362 -> 1.363 X86InstrMMX.td updated: 1.15 -> 1.16 --- Log message: Properly support v8i8 and v4i16 types. It now converts them to v2i32 for load and stores. --- Diffs of the changes: (+20 -6) X86ISelLowering.cpp |7 +-- X86InstrMMX.td | 19 +++ 2 files changed, 20 insertions(+), 6 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.362 llvm/lib/Target/X86/X86ISelLowering.cpp:1.363 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.362 Tue Mar 6 12:53:42 2007 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Mar 6 23:43:18 2007 @@ -327,9 +327,12 @@ addRegisterClass(MVT::v2i32, X86::VR64RegisterClass); // FIXME: add MMX packed arithmetics -setOperationAction(ISD::LOAD, MVT::v8i8, Legal); -setOperationAction(ISD::LOAD, MVT::v4i16, Legal); +setOperationAction(ISD::LOAD, MVT::v8i8, Promote); +AddPromotedToType (ISD::LOAD, MVT::v8i8, MVT::v2i32); +setOperationAction(ISD::LOAD, MVT::v4i16, Promote); +AddPromotedToType (ISD::LOAD, MVT::v4i16, MVT::v2i32); setOperationAction(ISD::LOAD, MVT::v2i32, Legal); + setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Expand); setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Expand); setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Expand); Index: llvm/lib/Target/X86/X86InstrMMX.td diff -u llvm/lib/Target/X86/X86InstrMMX.td:1.15 llvm/lib/Target/X86/X86InstrMMX.td:1.16 --- llvm/lib/Target/X86/X86InstrMMX.td:1.15 Tue Mar 6 12:53:42 2007 +++ llvm/lib/Target/X86/X86InstrMMX.td Tue Mar 6 23:43:18 2007 @@ -1,4 +1,4 @@ -//- X86InstrMMX.td - Describe the X86 Instruction Set ---*- C++ -*-===// +//- X86InstrMMX.td - Describe the X86 Instruction Set --*- tablegen -*-===// // // The LLVM Compiler Infrastructure // @@ -33,14 +33,17 @@ [(set VR64:$dst, (v8i8 (undef)))]>, Requires<[HasMMX]>; -def : Pat<(v8i8 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; -def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; -def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; +// 64-bit vector undef's. +def : Pat<(v8i8 (undef)), (IMPLICIT_DEF_VR64)>; +def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>; +def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>; //===--===// // MMX Pattern Fragments //===--===// +def loadv8i8 : PatFrag<(ops node:$ptr), (v8i8 (load node:$ptr))>; +def loadv4i16 : PatFrag<(ops node:$ptr), (v4i16 (load node:$ptr))>; def loadv2i32 : PatFrag<(ops node:$ptr), (v2i32 (load node:$ptr))>; //===--===// @@ -120,3 +123,11 @@ (MOVQ64mr addr:$dst, VR64:$src)>; def : Pat<(store (v4i16 VR64:$src), addr:$dst), (MOVQ64mr addr:$dst, VR64:$src)>; + +// Bit convert. +def : Pat<(v8i8 (bitconvert (v2i32 VR64:$src))), (v8i8 VR64:$src)>; +def : Pat<(v8i8 (bitconvert (v4i16 VR64:$src))), (v8i8 VR64:$src)>; +def : Pat<(v4i16 (bitconvert (v2i32 VR64:$src))), (v4i16 VR64:$src)>; +def : Pat<(v4i16 (bitconvert (v8i8 VR64:$src))), (v4i16 VR64:$src)>; +def : Pat<(v2i32 (bitconvert (v4i16 VR64:$src))), (v2i32 VR64:$src)>; +def : Pat<(v2i32 (bitconvert (v8i8 VR64:$src))), (v2i32 VR64:$src)>; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/OpenProjects.html
Changes in directory llvm-www: OpenProjects.html updated: 1.20 -> 1.21 --- Log message: Fix broken link. --- Diffs of the changes: (+2 -2) OpenProjects.html |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/OpenProjects.html diff -u llvm-www/OpenProjects.html:1.20 llvm-www/OpenProjects.html:1.21 --- llvm-www/OpenProjects.html:1.20 Tue Mar 6 15:49:19 2007 +++ llvm-www/OpenProjects.html Tue Mar 6 23:31:39 2007 @@ -186,7 +186,7 @@ would be nice to have a transformation which could be "required" by these passes which makes irreducible graphs reducible. This can easily be accomplished through code duplication. See http://citeseer.nj.nec.com/janssen97making.html";>Making Graphs Reducible +href="http://citeseer.ist.psu.edu/janssen97making.html";>Making Graphs Reducible with Controlled Node Splitting and perhaps http://doi.acm.org/10.1145/262004.262005";>Nesting of Reducible and Irreducible Loops. @@ -375,7 +375,7 @@ src="http://www.w3.org/Icons/valid-html401"; alt="Valid HTML 4.01!"> http://llvm.org";>LLVM Compiler Infrastructure - Last modified: $Date: 2007/03/06 21:49:19 $ + Last modified: $Date: 2007/03/07 05:31:39 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/tools/lto/lto.cpp
Changes in directory llvm/tools/lto: lto.cpp updated: 1.37 -> 1.38 --- Log message: Now LICM is a LoopPass. --- Diffs of the changes: (+1 -0) lto.cpp |1 + 1 files changed, 1 insertion(+) Index: llvm/tools/lto/lto.cpp diff -u llvm/tools/lto/lto.cpp:1.37 llvm/tools/lto/lto.cpp:1.38 --- llvm/tools/lto/lto.cpp:1.37 Fri Feb 16 13:11:07 2007 +++ llvm/tools/lto/lto.cpp Tue Mar 6 22:41:30 2007 @@ -26,6 +26,7 @@ #include "llvm/System/Program.h" #include "llvm/System/Signals.h" #include "llvm/Analysis/Passes.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/Verifier.h" #include "llvm/CodeGen/FileWriters.h" #include "llvm/Target/SubtargetFeature.h" ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/tools/llvm-ld/Optimize.cpp
Changes in directory llvm/tools/llvm-ld: Optimize.cpp updated: 1.17 -> 1.18 --- Log message: Now LICM is a LoopPass. --- Diffs of the changes: (+1 -0) Optimize.cpp |1 + 1 files changed, 1 insertion(+) Index: llvm/tools/llvm-ld/Optimize.cpp diff -u llvm/tools/llvm-ld/Optimize.cpp:1.17 llvm/tools/llvm-ld/Optimize.cpp:1.18 --- llvm/tools/llvm-ld/Optimize.cpp:1.17Thu Feb 8 12:13:59 2007 +++ llvm/tools/llvm-ld/Optimize.cpp Tue Mar 6 22:41:30 2007 @@ -15,6 +15,7 @@ #include "llvm/PassManager.h" #include "llvm/Analysis/LoadValueNumbering.h" #include "llvm/Analysis/Passes.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/Verifier.h" #include "llvm/Support/CommandLine.h" #include "llvm/System/DynamicLibrary.h" ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LICM.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LICM.cpp updated: 1.87 -> 1.88
---
Log message:
Now LICM is a LoopPass.
---
Diffs of the changes: (+26 -30)
LICM.cpp | 56 ++--
1 files changed, 26 insertions(+), 30 deletions(-)
Index: llvm/lib/Transforms/Scalar/LICM.cpp
diff -u llvm/lib/Transforms/Scalar/LICM.cpp:1.87
llvm/lib/Transforms/Scalar/LICM.cpp:1.88
--- llvm/lib/Transforms/Scalar/LICM.cpp:1.87Mon Feb 5 17:32:05 2007
+++ llvm/lib/Transforms/Scalar/LICM.cpp Tue Mar 6 22:41:30 2007
@@ -38,6 +38,7 @@
#include "llvm/Instructions.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Analysis/LoopInfo.h"
+#include "llvm/Analysis/LoopPass.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/AliasSetTracker.h"
#include "llvm/Analysis/Dominators.h"
@@ -61,8 +62,8 @@
DisablePromotion("disable-licm-promotion", cl::Hidden,
cl::desc("Disable memory promotion in LICM pass"));
- struct VISIBILITY_HIDDEN LICM : public FunctionPass {
-virtual bool runOnFunction(Function &F);
+ struct VISIBILITY_HIDDEN LICM : public LoopPass {
+virtual bool runOnLoop(Loop *L, LPPassManager &LPM);
/// This transformation requires natural loop information & requires that
/// loop preheaders be inserted into the CFG...
@@ -76,6 +77,11 @@
AU.addRequired();
}
+bool doFinalize() {
+ LoopToAliasMap.clear();
+ return false;
+}
+
private:
// Various analyses that we use...
AliasAnalysis *AA; // Current AliasAnalysis information
@@ -88,10 +94,7 @@
BasicBlock *Preheader; // The preheader block of the current loop...
Loop *CurLoop; // The current loop we are working on...
AliasSetTracker *CurAST; // AliasSet information for the current loop...
-
-/// visitLoop - Hoist expressions out of the specified loop...
-///
-void visitLoop(Loop *L, AliasSetTracker &AST);
+std::map LoopToAliasMap;
/// SinkRegion - Walk the specified region of the CFG (defined by all
blocks
/// dominated by the specified block, and that are in the current loop) in
@@ -199,12 +202,11 @@
RegisterPass X("licm", "Loop Invariant Code Motion");
}
-FunctionPass *llvm::createLICMPass() { return new LICM(); }
+LoopPass *llvm::createLICMPass() { return new LICM(); }
-/// runOnFunction - For LICM, this simply traverses the loop structure of the
-/// function, hoisting expressions out of loops if possible.
+/// Hoist expressions out of the specified loop...
///
-bool LICM::runOnFunction(Function &) {
+bool LICM::runOnLoop(Loop *L, LPPassManager &LPM) {
Changed = false;
// Get our Loop and Alias Analysis information...
@@ -213,28 +215,19 @@
DF = &getAnalysis();
DT = &getAnalysis();
- // Hoist expressions out of all of the top-level loops.
- for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) {
-AliasSetTracker AST(*AA);
-visitLoop(*I, AST);
- }
- return Changed;
-}
-
-
-/// visitLoop - Hoist expressions out of the specified loop...
-///
-void LICM::visitLoop(Loop *L, AliasSetTracker &AST) {
- // Recurse through all subloops before we process this loop...
- for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) {
-AliasSetTracker SubAST(*AA);
-visitLoop(*I, SubAST);
+ CurAST = new AliasSetTracker(*AA);
+ // Collect Alias info frmo subloops
+ for (Loop::iterator LoopItr = L->begin(), LoopItrE = L->end();
+ LoopItr != LoopItrE; ++LoopItr) {
+Loop *InnerL = *LoopItr;
+AliasSetTracker *InnerAST = LoopToAliasMap[InnerL];
+assert (InnerAST && "Where is my AST?");
-// Incorporate information about the subloops into this loop...
-AST.add(SubAST);
+// What if InnerLoop was modified by other passes ?
+CurAST->add(*InnerAST);
}
+
CurLoop = L;
- CurAST = &AST;
// Get the preheader block to move instructions into...
Preheader = L->getLoopPreheader();
@@ -247,7 +240,7 @@
for (std::vector::const_iterator I = L->getBlocks().begin(),
E = L->getBlocks().end(); I != E; ++I)
if (LI->getLoopFor(*I) == L)// Ignore blocks in subloops...
- AST.add(**I); // Incorporate the specified basic
block
+ CurAST->add(**I); // Incorporate the specified basic
block
// We want to visit all of the instructions in this loop... that are not
parts
// of our subloops (they have already had their invariants hoisted out of
@@ -270,6 +263,9 @@
// Clear out loops state information for the next iteration
CurLoop = 0;
Preheader = 0;
+
+ LoopToAliasMap[L] = CurAST;
+ return Changed;
}
/// SinkRegion - Walk the specified region of the CFG (defined by all blocks
___
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[llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h
Changes in directory llvm/include/llvm/Transforms: Scalar.h updated: 1.75 -> 1.76 --- Log message: Now LICM is a LoopPass. --- Diffs of the changes: (+1 -1) Scalar.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Transforms/Scalar.h diff -u llvm/include/llvm/Transforms/Scalar.h:1.75 llvm/include/llvm/Transforms/Scalar.h:1.76 --- llvm/include/llvm/Transforms/Scalar.h:1.75 Tue Mar 6 19:38:05 2007 +++ llvm/include/llvm/Transforms/Scalar.h Tue Mar 6 22:41:30 2007 @@ -112,7 +112,7 @@ // // LICM - This pass is a loop invariant code motion and memory promotion pass. // -FunctionPass *createLICMPass(); +LoopPass *createLICMPass(); //===--===// // ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [124656] Include looppass.h
Revision: 124656 Author: dpatel Date: 2007-03-06 20:35:26 -0800 (Tue, 06 Mar 2007) Log Message: --- Include looppass.h Modified Paths: -- apple-local/branches/llvm/gcc/llvm-backend.cpp Modified: apple-local/branches/llvm/gcc/llvm-backend.cpp === --- apple-local/branches/llvm/gcc/llvm-backend.cpp 2007-03-07 01:01:43 UTC (rev 124655) +++ apple-local/branches/llvm/gcc/llvm-backend.cpp 2007-03-07 04:35:26 UTC (rev 124656) @@ -28,6 +28,7 @@ #include "llvm/Module.h" #include "llvm/ModuleProvider.h" #include "llvm/PassManager.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/Verifier.h" #include "llvm/Assembly/Writer.h" #include "llvm/Assembly/PrintModulePass.h" ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86TargetAsmInfo.cpp
Changes in directory llvm/lib/Target/X86: X86TargetAsmInfo.cpp updated: 1.32 -> 1.33 --- Log message: Fix DWARF debugging information on x86/Linux and (hopefully) Mingw32/Cygwin targets. This fixes PR978: http://llvm.org/PR978 --- Diffs of the changes: (+3 -0) X86TargetAsmInfo.cpp |3 +++ 1 files changed, 3 insertions(+) Index: llvm/lib/Target/X86/X86TargetAsmInfo.cpp diff -u llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.32 llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.33 --- llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.32 Thu Feb 22 19:58:50 2007 +++ llvm/lib/Target/X86/X86TargetAsmInfo.cppTue Mar 6 20:47:57 2007 @@ -97,6 +97,7 @@ case X86Subtarget::isELF: // Set up DWARF directives HasLEB128 = true; // Target asm supports leb128 directives (little-endian) +AbsoluteSectionOffsets = true; // bool HasLEB128; // Defaults to false. // hasDotLoc - True if target asm supports .loc directives. // bool HasDotLoc; // Defaults to false. @@ -130,9 +131,11 @@ // Set up DWARF directives HasLEB128 = true; // Target asm supports leb128 directives (little-endian) +AbsoluteSectionOffsets = true; PrivateGlobalPrefix = "L"; // Prefix for private global symbols WeakRefDirective = "\t.weak\t"; DwarfRequiresFrameSection = false; +DwarfSectionOffsetDirective = "\t.secrel32\t"; DwarfAbbrevSection = "\t.section\t.debug_abbrev,\"dr\""; DwarfInfoSection ="\t.section\t.debug_info,\"dr\""; DwarfLineSection ="\t.section\t.debug_line,\"dr\""; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp
Changes in directory llvm/lib/CodeGen:
DwarfWriter.cpp updated: 1.130 -> 1.131
---
Log message:
Fix DWARF debugging information on x86/Linux and (hopefully)
Mingw32/Cygwin targets. This fixes PR978: http://llvm.org/PR978
---
Diffs of the changes: (+61 -17)
DwarfWriter.cpp | 78 +++-
1 files changed, 61 insertions(+), 17 deletions(-)
Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.130
llvm/lib/CodeGen/DwarfWriter.cpp:1.131
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.130 Thu Mar 1 14:26:43 2007
+++ llvm/lib/CodeGen/DwarfWriter.cppTue Mar 6 20:47:57 2007
@@ -823,8 +823,12 @@
void PrintLabelName(DWLabel Label) const {
PrintLabelName(Label.Tag, Label.Number);
}
- void PrintLabelName(const char *Tag, unsigned Number) const {
-O << TAI->getPrivateGlobalPrefix() << Tag;
+ void PrintLabelName(const char *Tag, unsigned Number,
+ bool isInSection = false) const {
+if (isInSection && TAI->getDwarfSectionOffsetDirective())
+ O << TAI->getDwarfSectionOffsetDirective() << Tag;
+else
+ O << TAI->getPrivateGlobalPrefix() << Tag;
if (Number) O << Number;
}
@@ -907,7 +911,44 @@
PrintLabelName(TagLo, NumberLo);
}
}
-
+
+ void EmitSectionOffset(const char* Label, const char* Section,
+ unsigned LabelNumber, unsigned SectionNumber,
+ bool IsSmall = false) const {
+if (TAI->needsSet()) {
+ static unsigned SetCounter = 1;
+
+ O << "\t.set\t";
+ PrintLabelName("set", SetCounter);
+ O << ",";
+ PrintLabelName(Label, LabelNumber, true);
+ if (!TAI->isAbsoluteSectionOffsets()) {
+O << "-";
+PrintLabelName(Section, SectionNumber);
+ }
+ O << "\n";
+
+ if (IsSmall || TAI->getAddressSize() == sizeof(int32_t))
+O << TAI->getData32bitsDirective();
+ else
+O << TAI->getData64bitsDirective();
+
+ PrintLabelName("set", SetCounter);
+ ++SetCounter;
+} else {
+ if (IsSmall || TAI->getAddressSize() == sizeof(int32_t))
+O << TAI->getData32bitsDirective();
+ else
+O << TAI->getData64bitsDirective();
+
+ PrintLabelName(Label, LabelNumber, true);
+ if (!TAI->isAbsoluteSectionOffsets()) {
+O << "-";
+PrintLabelName(Section, SectionNumber);
+ }
+}
+ }
+
/// EmitFrameMoves - Emit frame instructions to describe the layout of the
/// frame.
void EmitFrameMoves(const char *BaseLabel, unsigned BaseLabelID,
@@ -1649,8 +1690,11 @@
CompileUnit *NewCompileUnit(CompileUnitDesc *UnitDesc, unsigned ID) {
// Construct debug information entry.
DIE *Die = new DIE(DW_TAG_compile_unit);
-AddDelta(Die, DW_AT_stmt_list, DW_FORM_data4, DWLabel("section_line", 0),
- DWLabel("section_line", 0));
+if (TAI->isAbsoluteSectionOffsets())
+ AddLabel(Die, DW_AT_stmt_list, DW_FORM_data4, DWLabel("section_line",
0));
+else
+ AddDelta(Die, DW_AT_stmt_list, DW_FORM_data4, DWLabel("section_line", 0),
+ DWLabel("section_line", 0));
AddString(Die, DW_AT_producer, DW_FORM_string, UnitDesc->getProducer());
AddUInt (Die, DW_AT_language, DW_FORM_data1, UnitDesc->getLanguage());
AddString(Die, DW_AT_name, DW_FORM_string, UnitDesc->getFileName());
@@ -2065,7 +2109,7 @@
Asm->EmitInt32(ContentSize); Asm->EOL("Length of Compilation Unit Info");
Asm->EmitInt16(DWARF_VERSION); Asm->EOL("DWARF version number");
-EmitDifference("abbrev_begin", 0, "section_abbrev", 0, true);
+EmitSectionOffset("abbrev_begin", "section_abbrev", 0, 0, true);
Asm->EOL("Offset Into Abbrev. Section");
Asm->EmitInt8(TAI->getAddressSize()); Asm->EOL("Address Size (in bytes)");
@@ -2323,8 +2367,8 @@
Asm->EOL("Length of Frame Information Entry");
EmitLabel("frame_begin", SubprogramCount);
-
-EmitDifference("frame_common_begin", 0, "section_frame", 0, true);
+
+EmitSectionOffset("frame_common_begin", "section_frame", 0, 0, true);
Asm->EOL("FDE CIE offset");
EmitReference("func_begin", SubprogramCount);
@@ -2358,8 +2402,8 @@
EmitLabel("pubnames_begin", Unit->getID());
Asm->EmitInt16(DWARF_VERSION); Asm->EOL("DWARF Version");
-
-EmitDifference("info_begin", Unit->getID(), "section_info", 0, true);
+
+EmitSectionOffset("info_begin", "section_info", Unit->getID(), 0, true);
Asm->EOL("Offset of Compilation Unit Info");
EmitDifference("info_end", Unit->getID(), "info_begin",
Unit->getID(),true);
@@ -2786,9 +2830,9 @@
Asm->EOL("Length of Frame Information Entry");
EmitLabel("eh_frame_begin", SubprogramCount);
-
- EmitDifference("eh_frame_begin", SubprogramCount,
-
[llvm-commits] CVS: llvm/lib/Target/TargetAsmInfo.cpp
Changes in directory llvm/lib/Target:
TargetAsmInfo.cpp updated: 1.19 -> 1.20
---
Log message:
Fix DWARF debugging information on x86/Linux and (hopefully)
Mingw32/Cygwin targets. This fixes PR978: http://llvm.org/PR978
---
Diffs of the changes: (+3 -0)
TargetAsmInfo.cpp |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/TargetAsmInfo.cpp
diff -u llvm/lib/Target/TargetAsmInfo.cpp:1.19
llvm/lib/Target/TargetAsmInfo.cpp:1.20
--- llvm/lib/Target/TargetAsmInfo.cpp:1.19 Wed Feb 21 16:43:40 2007
+++ llvm/lib/Target/TargetAsmInfo.cpp Tue Mar 6 20:47:57 2007
@@ -69,11 +69,13 @@
UsedDirective(0),
WeakRefDirective(0),
HiddenDirective("\t.hidden\t"),
+ AbsoluteSectionOffsets(false),
HasLEB128(false),
HasDotLoc(false),
HasDotFile(false),
SupportsExceptionHandling(false),
DwarfRequiresFrameSection(true),
+ DwarfSectionOffsetDirective(0),
DwarfAbbrevSection(".debug_abbrev"),
DwarfInfoSection(".debug_info"),
DwarfLineSection(".debug_line"),
@@ -106,3 +108,4 @@
// Multiply by the worst-case length for each instruction.
return NumInsts * MaxInstLength;
}
+
___
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[llvm-commits] CVS: llvm/include/llvm/Target/TargetAsmInfo.h
Changes in directory llvm/include/llvm/Target:
TargetAsmInfo.h updated: 1.26 -> 1.27
---
Log message:
Fix DWARF debugging information on x86/Linux and (hopefully)
Mingw32/Cygwin targets. This fixes PR978: http://llvm.org/PR978
---
Diffs of the changes: (+13 -0)
TargetAsmInfo.h | 13 +
1 files changed, 13 insertions(+)
Index: llvm/include/llvm/Target/TargetAsmInfo.h
diff -u llvm/include/llvm/Target/TargetAsmInfo.h:1.26
llvm/include/llvm/Target/TargetAsmInfo.h:1.27
--- llvm/include/llvm/Target/TargetAsmInfo.h:1.26 Wed Feb 21 16:43:40 2007
+++ llvm/include/llvm/Target/TargetAsmInfo.hTue Mar 6 20:47:57 2007
@@ -246,6 +246,10 @@
//===--- Dwarf Emission Directives ---===//
+/// AbsoluteSectionOffsets - True if we should emit abolute section
+/// offsets. Defaults to false.
+bool AbsoluteSectionOffsets;
+
/// HasLEB128 - True if target asm supports leb128 directives.
///
bool HasLEB128; // Defaults to false.
@@ -266,6 +270,9 @@
///
bool DwarfRequiresFrameSection; // Defaults to true.
+/// DwarfSectionOffsetDirective - Special section offset directive.
+const char* DwarfSectionOffsetDirective; // Defaults to NULL
+
/// DwarfAbbrevSection - Section directive for Dwarf abbrev.
///
const char *DwarfAbbrevSection; // Defaults to ".debug_abbrev".
@@ -494,6 +501,9 @@
const char *getHiddenDirective() const {
return HiddenDirective;
}
+bool isAbsoluteSectionOffsets() const {
+ return AbsoluteSectionOffsets;
+}
bool hasLEB128() const {
return HasLEB128;
}
@@ -509,6 +519,9 @@
bool getDwarfRequiresFrameSection() const {
return DwarfRequiresFrameSection;
}
+const char *getDwarfSectionOffsetDirective() const {
+ return DwarfSectionOffsetDirective;
+}
const char *getDwarfAbbrevSection() const {
return DwarfAbbrevSection;
}
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.td updated: 1.13 -> 1.14
---
Log message:
ARM always use register scavenger. No longer reserves R12.
---
Diffs of the changes: (+12 -50)
ARMRegisterInfo.td | 62 ++---
1 files changed, 12 insertions(+), 50 deletions(-)
Index: llvm/lib/Target/ARM/ARMRegisterInfo.td
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.td:1.13
llvm/lib/Target/ARM/ARMRegisterInfo.td:1.14
--- llvm/lib/Target/ARM/ARMRegisterInfo.td:1.13 Tue Feb 27 18:59:19 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.td Tue Mar 6 20:46:23 2007
@@ -99,51 +99,26 @@
// generate large stack offset. Make it available once we have register
// scavenging. Similarly r3 is reserved in Thumb mode for now.
let MethodBodies = [{
-// FP is R11, R9 is available.
-static const unsigned ARM_GPR_AO_1[] = {
- ARM::R3, ARM::R2, ARM::R1, ARM::R0,
- ARM::R4, ARM::R5, ARM::R6, ARM::R7,
- ARM::R8, ARM::R9, ARM::R10,
- ARM::LR, ARM::R11 };
-// FP is R11, R9 is not available.
-static const unsigned ARM_GPR_AO_2[] = {
- ARM::R3, ARM::R2, ARM::R1, ARM::R0,
- ARM::R4, ARM::R5, ARM::R6, ARM::R7,
- ARM::R8, ARM::R10,
- ARM::LR, ARM::R11 };
-// FP is R7, R9 is available.
-static const unsigned ARM_GPR_AO_3[] = {
- ARM::R3, ARM::R2, ARM::R1, ARM::R0,
- ARM::R4, ARM::R5, ARM::R6, ARM::R8,
- ARM::R9, ARM::R10,ARM::R11,
- ARM::LR, ARM::R7 };
-// FP is R7, R9 is not available.
-static const unsigned ARM_GPR_AO_4[] = {
- ARM::R3, ARM::R2, ARM::R1, ARM::R0,
- ARM::R4, ARM::R5, ARM::R6, ARM::R8,
- ARM::R10,ARM::R11,
- ARM::LR, ARM::R7 };
-
// FP is R11, R9 is available, R12 is available.
-static const unsigned ARM_GPR_AO_5[] = {
+static const unsigned ARM_GPR_AO_1[] = {
ARM::R3, ARM::R2, ARM::R1, ARM::R0,
ARM::R4, ARM::R5, ARM::R6, ARM::R7,
ARM::R8, ARM::R9, ARM::R10,ARM::R12,
ARM::LR, ARM::R11 };
// FP is R11, R9 is not available, R12 is available.
-static const unsigned ARM_GPR_AO_6[] = {
+static const unsigned ARM_GPR_AO_2[] = {
ARM::R3, ARM::R2, ARM::R1, ARM::R0,
ARM::R4, ARM::R5, ARM::R6, ARM::R7,
ARM::R8, ARM::R10,ARM::R12,
ARM::LR, ARM::R11 };
// FP is R7, R9 is available, R12 is available.
-static const unsigned ARM_GPR_AO_7[] = {
+static const unsigned ARM_GPR_AO_3[] = {
ARM::R3, ARM::R2, ARM::R1, ARM::R0,
ARM::R4, ARM::R5, ARM::R6, ARM::R8,
ARM::R9, ARM::R10,ARM::R11,ARM::R12,
ARM::LR, ARM::R7 };
// FP is R7, R9 is not available, R12 is available.
-static const unsigned ARM_GPR_AO_8[] = {
+static const unsigned ARM_GPR_AO_4[] = {
ARM::R3, ARM::R2, ARM::R1, ARM::R0,
ARM::R4, ARM::R5, ARM::R6, ARM::R8,
ARM::R10,ARM::R11,ARM::R12,
@@ -157,20 +132,19 @@
GPRClass::iterator
GPRClass::allocation_order_begin(const MachineFunction &MF) const {
const TargetMachine &TM = MF.getTarget();
- const MRegisterInfo *RI = TM.getRegisterInfo();
const ARMSubtarget &Subtarget = TM.getSubtarget();
if (Subtarget.isThumb())
return THUMB_GPR_AO;
if (Subtarget.useThumbBacktraces()) {
if (Subtarget.isR9Reserved())
- return RI->requiresRegisterScavenging(MF) ?
ARM_GPR_AO_8:ARM_GPR_AO_4;
+ return ARM_GPR_AO_4;
else
- return RI->requiresRegisterScavenging(MF) ?
ARM_GPR_AO_7:ARM_GPR_AO_3;
+ return ARM_GPR_AO_3;
} else {
if (Subtarget.isR9Reserved())
- return RI->requiresRegisterScavenging(MF) ?
ARM_GPR_AO_6:ARM_GPR_AO_2;
+ return ARM_GPR_AO_2;
else
- return RI->requiresRegisterScavenging(MF) ?
ARM_GPR_AO_5:ARM_GPR_AO_1;
+ return ARM_GPR_AO_1;
}
}
@@ -184,27 +158,15 @@
I = THUMB_GPR_AO + (sizeof(THUMB_GPR_AO)/sizeof(unsigned));
else if (Subtarget.useThumbBacktraces()) {
if (Subtarget.isR9Reserved()) {
- if (RI->requiresRegisterScavenging(MF))
-I = ARM_GPR_AO_8 + (sizeof(ARM_GPR_AO_8)/sizeof(unsigned));
- else
-I = ARM_GPR_AO_4 + (sizeof(ARM_GPR_AO_4)/sizeof(unsigned));
+ I = ARM_GPR_AO_4 + (sizeof(ARM_GPR_AO_4)/sizeof(unsigned));
} else {
- if (RI->requiresRegisterScavenging(MF))
-I = ARM_GPR_AO_7 + (sizeof(ARM_GPR_AO_7)/sizeof(unsigned));
- else
-I = ARM_GPR_AO_3 + (sizeof(ARM_GPR_AO_3)/sizeof(unsigned));
+ I = ARM_GPR_AO_3 + (sizeof(ARM_GPR_AO_3)/sizeof(unsigned));
}
} else {
if (Subtarget.isR9Reserved()) {
- if (RI->requiresRegisterScavenging(MF))
-I = ARM_GPR_AO_6 + (sizeof(ARM_GPR_AO_6)/sizeof(unsigned));
- else
-I = ARM_GPR_AO_2 + (sizeof(ARM_GPR_AO_2)/sizeof(unsigned));
+ I = ARM_GPR_AO_2 + (sizeof(ARM_GPR_AO_2)/sizeof(unsi
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Changes in directory llvm/lib/Target/ARM:
ARMLoadStoreOptimizer.cpp updated: 1.3 -> 1.4
---
Log message:
Fix some brittle code. Watch out for cases where register scavenger is pointing
to deleted instructions.
---
Diffs of the changes: (+39 -41)
ARMLoadStoreOptimizer.cpp | 80 ++
1 files changed, 39 insertions(+), 41 deletions(-)
Index: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
diff -u llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.3
llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.4
--- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.3 Tue Mar 6 15:59:20 2007
+++ llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Mar 6 20:38:05 2007
@@ -40,6 +40,7 @@
const TargetInstrInfo *TII;
const MRegisterInfo *MRI;
RegScavenger *RS;
+MachineBasicBlock::iterator RSI;
virtual bool runOnMachineFunction(MachineFunction &Fn);
@@ -59,11 +60,10 @@
typedef SmallVector MemOpQueue;
typedef MemOpQueue::iterator MemOpQueueIter;
-void AdvanceRS(MachineBasicBlock *MBB, MemOpQueue &MemOps);
-
SmallVector
MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex, unsigned Base,
- int Opcode, unsigned Size, MemOpQueue &MemOps);
+ int Opcode, unsigned Size, unsigned Scratch,
+ MemOpQueue &MemOps);
bool LoadStoreMultipleOpti(MachineBasicBlock &MBB);
bool MergeReturnIntoLDM(MachineBasicBlock &MBB);
@@ -106,8 +106,8 @@
/// It returns true if the transformation is done.
static bool mergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
int Offset, unsigned Base, bool BaseKill, int Opcode,
+ unsigned Scratch,
SmallVector, 8> &Regs,
- RegScavenger *RS,
const TargetInstrInfo *TII) {
// Only a single register to load / store. Don't bother.
unsigned NumRegs = Regs.size();
@@ -135,8 +135,8 @@
// use as the new base.
NewBase = Regs[NumRegs-1].first;
else {
- // Try to find a free register to use as a new base.
- NewBase = RS ? RS->FindUnusedReg(&ARM::GPRRegClass) : (unsigned)ARM::R12;
+ // Use the scratch register to use as a new base.
+ NewBase = Scratch;
if (NewBase == 0)
return false;
}
@@ -169,31 +169,12 @@
return true;
}
-/// AdvanceRS - Advance register scavenger to just before the earliest memory
-/// op that is being merged.
-void ARMLoadStoreOpt::AdvanceRS(MachineBasicBlock *MBB, MemOpQueue &MemOps) {
- MachineBasicBlock::iterator Loc = MemOps[0].MBBI;
- unsigned Position = MemOps[0].Position;
- for (unsigned i = 1, e = MemOps.size(); i != e; ++i) {
-if (MemOps[i].Position < Position) {
- Position = MemOps[i].Position;
- Loc = MemOps[i].MBBI;
-}
- }
-
- if (Loc != MBB->begin())
-RS->forward(prior(Loc));
-}
-
/// MergeLDR_STR - Merge a number of load / store instructions into one or more
/// load / store multiple instructions.
SmallVector
-ARMLoadStoreOpt::MergeLDR_STR(MachineBasicBlock &MBB,
- unsigned SIndex, unsigned Base, int Opcode,
- unsigned Size, MemOpQueue &MemOps) {
- if (RS && SIndex == 0)
-AdvanceRS(&MBB, MemOps);
-
+ARMLoadStoreOpt::MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex,
+ unsigned Base, int Opcode, unsigned Size,
+ unsigned Scratch, MemOpQueue &MemOps) {
SmallVector Merges;
SmallVector, 8> Regs;
bool isAM4 = Opcode == ARM::LDR || Opcode == ARM::STR;
@@ -219,7 +200,7 @@
PRegNum = RegNum;
} else {
// Can't merge this in. Try merge the earlier ones first.
- if (mergeOps(MBB, ++Loc, SOffset, Base, false, Opcode, Regs, RS, TII)) {
+ if (mergeOps(MBB, ++Loc, SOffset, Base, false, Opcode,Scratch,Regs,TII))
{
Merges.push_back(prior(Loc));
for (unsigned j = SIndex; j < i; ++j) {
MBB.erase(MemOps[j].MBBI);
@@ -227,7 +208,7 @@
}
}
SmallVector Merges2 =
-MergeLDR_STR(MBB, i, Base, Opcode, Size, MemOps);
+MergeLDR_STR(MBB, i, Base, Opcode, Size, Scratch, MemOps);
Merges.append(Merges2.begin(), Merges2.end());
return Merges;
}
@@ -239,7 +220,7 @@
}
bool BaseKill = Loc->findRegisterUseOperand(Base, true) != NULL;
- if (mergeOps(MBB, ++Loc, SOffset, Base, BaseKill, Opcode, Regs, RS, TII)) {
+ if (mergeOps(MBB, ++Loc, SOffset, Base, BaseKill, Opcode,Scratch,Regs, TII))
{
Merges.push_back(prior(Loc));
for (unsigned i = SIndex, e = MemOps.size(); i != e; ++i) {
MBB.erase(MemOps[i].MBBI);
@@ -520,7 +501,8 @@
unsigned CurrSize = 0;
unsigned Position = 0;
- if (RS) RS->enterBasicBlock(&MBB);
+ RS->enterBasicBlock(&MBB);
+ RSI = MBB.begin();
MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
while (MBBI != E) {
bool Advance = false;
[llvm-commits] CVS: llvm/include/llvm/CodeGen/RegisterScavenging.h
Changes in directory llvm/include/llvm/CodeGen:
RegisterScavenging.h updated: 1.8 -> 1.9
---
Log message:
Add skipTo to set internal iterator. Useful when pointed to instruction is
deleted.
---
Diffs of the changes: (+4 -0)
RegisterScavenging.h |4
1 files changed, 4 insertions(+)
Index: llvm/include/llvm/CodeGen/RegisterScavenging.h
diff -u llvm/include/llvm/CodeGen/RegisterScavenging.h:1.8
llvm/include/llvm/CodeGen/RegisterScavenging.h:1.9
--- llvm/include/llvm/CodeGen/RegisterScavenging.h:1.8 Tue Mar 6 04:00:43 2007
+++ llvm/include/llvm/CodeGen/RegisterScavenging.h Tue Mar 6 20:36:16 2007
@@ -79,6 +79,10 @@
while (MBBI != I) backward();
}
+ /// skipTo - Move the internal MBB iterator but do not update register
states.
+ ///
+ void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
+
/// isReserved - Returns true if a register is reserved. It is never
"unused".
bool isReserved(unsigned Reg) const { return ReservedRegs[Reg]; }
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnroll.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LoopUnroll.cpp updated: 1.37 -> 1.38
---
Log message:
Now LoopUnroll is a LoopPass.
---
Diffs of the changes: (+7 -36)
LoopUnroll.cpp | 43 +++
1 files changed, 7 insertions(+), 36 deletions(-)
Index: llvm/lib/Transforms/Scalar/LoopUnroll.cpp
diff -u llvm/lib/Transforms/Scalar/LoopUnroll.cpp:1.37
llvm/lib/Transforms/Scalar/LoopUnroll.cpp:1.38
--- llvm/lib/Transforms/Scalar/LoopUnroll.cpp:1.37 Fri Mar 2 17:31:34 2007
+++ llvm/lib/Transforms/Scalar/LoopUnroll.cpp Tue Mar 6 19:38:05 2007
@@ -24,6 +24,7 @@
#include "llvm/Instructions.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/LoopInfo.h"
+#include "llvm/Analysis/LoopPass.h"
#include "llvm/Transforms/Utils/Cloning.h"
#include "llvm/Transforms/Utils/Local.h"
#include "llvm/Support/CFG.h"
@@ -45,11 +46,10 @@
UnrollThreshold("unroll-threshold", cl::init(100), cl::Hidden,
cl::desc("The cut-off point for loop unrolling"));
- class VISIBILITY_HIDDEN LoopUnroll : public FunctionPass {
+ class VISIBILITY_HIDDEN LoopUnroll : public LoopPass {
LoopInfo *LI; // The current loop information
public:
-virtual bool runOnFunction(Function &F);
-bool visitLoop(Loop *L);
+bool runOnLoop(Loop *L, LPPassManager &LPM);
BasicBlock* FoldBlockIntoPredecessor(BasicBlock* BB);
/// This transformation requires natural loop information & requires that
@@ -66,20 +66,7 @@
RegisterPass X("loop-unroll", "Unroll loops");
}
-FunctionPass *llvm::createLoopUnrollPass() { return new LoopUnroll(); }
-
-bool LoopUnroll::runOnFunction(Function &F) {
- bool Changed = false;
- LI = &getAnalysis();
-
- // Transform all the top-level loops. Copy the loop list so that the child
- // can update the loop tree if it needs to delete the loop.
- std::vector SubLoops(LI->begin(), LI->end());
- for (unsigned i = 0, e = SubLoops.size(); i != e; ++i)
-Changed |= visitLoop(SubLoops[i]);
-
- return Changed;
-}
+LoopPass *llvm::createLoopUnrollPass() { return new LoopUnroll(); }
/// ApproximateLoopSize - Approximate the size of the loop after it has been
/// unrolled.
@@ -171,15 +158,9 @@
return OnlyPred;
}
-bool LoopUnroll::visitLoop(Loop *L) {
+bool LoopUnroll::runOnLoop(Loop *L, LPPassManager &LPM) {
bool Changed = false;
-
- // Recurse through all subloops before we process this loop. Copy the loop
- // list so that the child can update the loop tree if it needs to delete the
- // loop.
- std::vector SubLoops(L->begin(), L->end());
- for (unsigned i = 0, e = SubLoops.size(); i != e; ++i)
-Changed |= visitLoop(SubLoops[i]);
+ LI = &getAnalysis();
BasicBlock* Header = L->getHeader();
BasicBlock* LatchBlock = L->getLoopLatch();
@@ -367,18 +348,8 @@
}
// Update the loop information for this loop.
- Loop *Parent = L->getParentLoop();
-
- // Move all of the basic blocks in the loop into the parent loop.
- for (std::vector::const_iterator BB = NewLoopBlocks.begin(),
- E = NewLoopBlocks.end(); BB != E; ++BB)
-LI->changeLoopFor(*BB, Parent);
-
// Remove the loop from the parent.
- if (Parent)
-delete Parent->removeChildLoop(std::find(Parent->begin(),
Parent->end(),L));
- else
-delete LI->removeLoop(std::find(LI->begin(), LI->end(), L));
+ LPM.deleteLoopFromQueue(L);
++NumUnrolled;
return true;
___
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[llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h
Changes in directory llvm/include/llvm/Transforms: Scalar.h updated: 1.74 -> 1.75 --- Log message: Now LoopUnroll is a LoopPass. --- Diffs of the changes: (+1 -1) Scalar.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Transforms/Scalar.h diff -u llvm/include/llvm/Transforms/Scalar.h:1.74 llvm/include/llvm/Transforms/Scalar.h:1.75 --- llvm/include/llvm/Transforms/Scalar.h:1.74 Tue Mar 6 18:26:10 2007 +++ llvm/include/llvm/Transforms/Scalar.h Tue Mar 6 19:38:05 2007 @@ -133,7 +133,7 @@ // // LoopUnroll - This pass is a simple loop unrolling pass. // -FunctionPass *createLoopUnrollPass(); +LoopPass *createLoopUnrollPass(); //===--===// // ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/Integer/sign.reference_output
Changes in directory llvm-test/SingleSource/UnitTests/Integer: sign.reference_output updated: 1.1 -> 1.2 --- Log message: Correct the reference output. The result is -1 for the last test. --- Diffs of the changes: (+1 -1) sign.reference_output |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/SingleSource/UnitTests/Integer/sign.reference_output diff -u llvm-test/SingleSource/UnitTests/Integer/sign.reference_output:1.1 llvm-test/SingleSource/UnitTests/Integer/sign.reference_output:1.2 --- llvm-test/SingleSource/UnitTests/Integer/sign.reference_output:1.1 Fri Jan 26 17:34:47 2007 +++ llvm-test/SingleSource/UnitTests/Integer/sign.reference_output Tue Mar 6 19:09:24 2007 @@ -3,5 +3,5 @@ z=1, uz=1 z=0, uz=0 z=12, uz=12 -z=-1, uz=53428 +z=-1, uz=16777215 exit 0 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CFrontend/2007-03-05-DataLayout.c
Changes in directory llvm/test/CFrontend: 2007-03-05-DataLayout.c updated: 1.3 -> 1.4 --- Log message: Fix the pattern. --- Diffs of the changes: (+1 -1) 2007-03-05-DataLayout.c |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/test/CFrontend/2007-03-05-DataLayout.c diff -u llvm/test/CFrontend/2007-03-05-DataLayout.c:1.3 llvm/test/CFrontend/2007-03-05-DataLayout.c:1.4 --- llvm/test/CFrontend/2007-03-05-DataLayout.c:1.3 Tue Mar 6 18:32:12 2007 +++ llvm/test/CFrontend/2007-03-05-DataLayout.c Tue Mar 6 18:39:11 2007 @@ -1,6 +1,6 @@ // Testcase for PR1242 // RUN: %llvmgcc -S %s -o - | grep datalayout | \ -// RUN:not grep '"[Ee]-p:[36][24]:[36]:[24]"' +// RUN:not grep '"[Ee]-p:[36][24]:[36][24]"' #include #define NDIM 3 #define BODY 01 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CFrontend/2007-03-05-DataLayout.c
Changes in directory llvm/test/CFrontend: 2007-03-05-DataLayout.c updated: 1.2 -> 1.3 --- Log message: Make this test more reliable across platforms. --- Diffs of the changes: (+2 -1) 2007-03-05-DataLayout.c |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/test/CFrontend/2007-03-05-DataLayout.c diff -u llvm/test/CFrontend/2007-03-05-DataLayout.c:1.2 llvm/test/CFrontend/2007-03-05-DataLayout.c:1.3 --- llvm/test/CFrontend/2007-03-05-DataLayout.c:1.2 Tue Mar 6 11:48:25 2007 +++ llvm/test/CFrontend/2007-03-05-DataLayout.c Tue Mar 6 18:32:12 2007 @@ -1,5 +1,6 @@ // Testcase for PR1242 -// RUN: %llvmgcc -S %s -o - | grep datalayout | wc -c | grep 130 +// RUN: %llvmgcc -S %s -o - | grep datalayout | \ +// RUN:not grep '"[Ee]-p:[36][24]:[36]:[24]"' #include #define NDIM 3 #define BODY 01 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp
Changes in directory llvm/lib/Analysis:
LoopPass.cpp updated: 1.16 -> 1.17
---
Log message:
Now LoopUnswitch is a LoopPass.
---
Diffs of the changes: (+2 -1)
LoopPass.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Analysis/LoopPass.cpp
diff -u llvm/lib/Analysis/LoopPass.cpp:1.16 llvm/lib/Analysis/LoopPass.cpp:1.17
--- llvm/lib/Analysis/LoopPass.cpp:1.16 Tue Mar 6 13:50:49 2007
+++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 18:26:10 2007
@@ -132,7 +132,7 @@
// queue. This allows LoopPass to change loop nest for the loop. This
// utility may send LPPassManager into infinite loops so use caution.
void LPPassManager::redoLoop(Loop *L) {
- assert (CurrentLoop != L && "Can redo only CurrentLoop");
+ assert (CurrentLoop == L && "Can redo only CurrentLoop");
redoThisLoop = true;
}
@@ -279,6 +279,7 @@
// [1] Create new Call Graph Pass Manager
LPPM = new LPPassManager(PMD->getDepth() + 1);
+LPPM->populateInheritedAnalysis(PMS);
// [2] Set up new manager's top level manager
PMTopLevelManager *TPM = PMD->getTopLevelManager();
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[llvm-commits] CVS: llvm/tools/opt/opt.cpp
Changes in directory llvm/tools/opt: opt.cpp updated: 1.131 -> 1.132 --- Log message: Now LoopUnswitch is a LoopPass. --- Diffs of the changes: (+1 -0) opt.cpp |1 + 1 files changed, 1 insertion(+) Index: llvm/tools/opt/opt.cpp diff -u llvm/tools/opt/opt.cpp:1.131 llvm/tools/opt/opt.cpp:1.132 --- llvm/tools/opt/opt.cpp:1.131Wed Feb 7 15:41:02 2007 +++ llvm/tools/opt/opt.cpp Tue Mar 6 18:26:10 2007 @@ -18,6 +18,7 @@ #include "llvm/Bytecode/WriteBytecodePass.h" #include "llvm/Assembly/PrintModulePass.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Support/PassNameParser.h" ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LoopUnswitch.cpp updated: 1.64 -> 1.65
---
Log message:
Now LoopUnswitch is a LoopPass.
---
Diffs of the changes: (+17 -86)
LoopUnswitch.cpp | 103 +--
1 files changed, 17 insertions(+), 86 deletions(-)
Index: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
diff -u llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.64
llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.65
--- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.64Fri Mar 2 17:35:28 2007
+++ llvm/lib/Transforms/Scalar/LoopUnswitch.cpp Tue Mar 6 18:26:10 2007
@@ -34,6 +34,7 @@
#include "llvm/Instructions.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/LoopInfo.h"
+#include "llvm/Analysis/LoopPass.h"
#include "llvm/Transforms/Utils/Cloning.h"
#include "llvm/Transforms/Utils/Local.h"
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
@@ -58,16 +59,17 @@
Threshold("loop-unswitch-threshold", cl::desc("Max loop size to unswitch"),
cl::init(10), cl::Hidden);
- class VISIBILITY_HIDDEN LoopUnswitch : public FunctionPass {
+ class VISIBILITY_HIDDEN LoopUnswitch : public LoopPass {
LoopInfo *LI; // Loop information
+LPPassManager *LPM;
-// LoopProcessWorklist - List of loops we need to process.
+// LoopProcessWorklist - Used to check if second loop needs processing
+// after RewriteLoopBodyWithConditionConstant rewrites first loop.
std::vector LoopProcessWorklist;
SmallPtrSet UnswitchedVals;
public:
-virtual bool runOnFunction(Function &F);
-bool visitLoop(Loop *L);
+bool runOnLoop(Loop *L, LPPassManager &LPM);
/// This transformation requires natural loop information & requires that
/// loop preheaders be inserted into the CFG...
@@ -110,29 +112,7 @@
RegisterPass X("loop-unswitch", "Unswitch loops");
}
-FunctionPass *llvm::createLoopUnswitchPass() { return new LoopUnswitch(); }
-
-bool LoopUnswitch::runOnFunction(Function &F) {
- bool Changed = false;
- LI = &getAnalysis();
-
- // Populate the worklist of loops to process in post-order.
- for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I)
-for (po_iterator LI = po_begin(*I), E = po_end(*I); LI != E; ++LI)
- LoopProcessWorklist.push_back(*LI);
-
- // Process the loops in worklist order, this is a post-order visitation of
- // the loops. We use a worklist of loops so that loops can be removed at any
- // time if they are deleted (e.g. the backedge of a loop is removed).
- while (!LoopProcessWorklist.empty()) {
-Loop *L = LoopProcessWorklist.back();
-LoopProcessWorklist.pop_back();
-Changed |= visitLoop(L);
- }
-
- UnswitchedVals.clear();
- return Changed;
-}
+LoopPass *llvm::createLoopUnswitchPass() { return new LoopUnswitch(); }
/// FindLIVLoopCondition - Cond is a condition that occurs in L. If it is
/// invariant in the loop, or has an invariant piece, return the invariant.
@@ -160,9 +140,10 @@
return 0;
}
-bool LoopUnswitch::visitLoop(Loop *L) {
+bool LoopUnswitch::runOnLoop(Loop *L, LPPassManager &LPM_Ref) {
assert(L->isLCSSAForm());
-
+ LI = &getAnalysis();
+ LPM = &LPM_Ref;
bool Changed = false;
// Loop over all of the basic blocks in the loop. If we find an interior
@@ -466,13 +447,10 @@
/// CloneLoop - Recursively clone the specified loop and all of its children,
/// mapping the blocks with the specified map.
static Loop *CloneLoop(Loop *L, Loop *PL, DenseMap &VM,
- LoopInfo *LI) {
+ LoopInfo *LI, LPPassManager *LPM) {
Loop *New = new Loop();
- if (PL)
-PL->addChildLoop(New);
- else
-LI->addTopLevelLoop(New);
+ LPM->insertLoop(New, PL);
// Add all of the blocks in L to the new loop.
for (Loop::block_iterator I = L->block_begin(), E = L->block_end();
@@ -482,7 +460,7 @@
// Add all of the subloops to the new loop.
for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I)
-CloneLoop(*I, New, VM, LI);
+CloneLoop(*I, New, VM, LI, LPM);
return New;
}
@@ -545,7 +523,7 @@
OrigPH->getTerminator()->eraseFromParent();
// We need to reprocess this loop, it could be unswitched again.
- LoopProcessWorklist.push_back(L);
+ LPM->redoLoop(L);
// Now that we know that the loop is never entered when this condition is a
// particular value, rewrite the loop with this info. We know that this will
@@ -654,7 +632,7 @@
NewBlocks[0], F->end());
// Now we create the new Loop object for the versioned loop.
- Loop *NewLoop = CloneLoop(L, L->getParentLoop(), ValueMap, LI);
+ Loop *NewLoop = CloneLoop(L, L->getParentLoop(), ValueMap, LI, LPM);
Loop *ParentLoop = L->getParentLoop();
if (ParentLoop) {
// Make sure to add the cloned preheader and exit blocks to the parent loop
@@ -699,8 +677,8 @@
EmitPreheaderBranchOnCondition(LIC, Val, NewBlocks[0], LoopBl
[llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h
Changes in directory llvm/include/llvm/Transforms: Scalar.h updated: 1.73 -> 1.74 --- Log message: Now LoopUnswitch is a LoopPass. --- Diffs of the changes: (+1 -1) Scalar.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Transforms/Scalar.h diff -u llvm/include/llvm/Transforms/Scalar.h:1.73 llvm/include/llvm/Transforms/Scalar.h:1.74 --- llvm/include/llvm/Transforms/Scalar.h:1.73 Tue Mar 6 15:14:09 2007 +++ llvm/include/llvm/Transforms/Scalar.h Tue Mar 6 18:26:10 2007 @@ -127,7 +127,7 @@ // // LoopUnswitch - This pass is a simple loop unswitching pass. // -FunctionPass *createLoopUnswitchPass(); +LoopPass *createLoopUnswitchPass(); //===--===// // ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/ARM/2007-03-06-AddR7.ll
Changes in directory llvm/test/CodeGen/ARM:
2007-03-06-AddR7.ll added (r1.1)
---
Log message:
New test case.
---
Diffs of the changes: (+117 -0)
2007-03-06-AddR7.ll | 117
1 files changed, 117 insertions(+)
Index: llvm/test/CodeGen/ARM/2007-03-06-AddR7.ll
diff -c /dev/null llvm/test/CodeGen/ARM/2007-03-06-AddR7.ll:1.1
*** /dev/null Tue Mar 6 18:13:58 2007
--- llvm/test/CodeGen/ARM/2007-03-06-AddR7.ll Tue Mar 6 18:13:48 2007
***
*** 0
--- 1,117
+ ; RUN: llvm-as < %s | llc -march=thumb &&
+ ; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin -relocation-model=pic
-mattr=+v6,+vfp2 | not grep 'add r., r7, #2 \* 4'
+
+ %struct.__fooAllocator = type opaque
+ %struct.__fooY = type { %struct.fooXBase, %struct.__fooString*,
%struct.__fooU*, %struct.__fooV*, i8** }
+ %struct.__fooZ = type opaque
+ %struct.__fooU = type opaque
+ %struct.__fooString = type opaque
+ %struct.__fooV = type opaque
+ %struct.fooXBase = type { i32, [4 x i8] }
+ %struct.fooXClass = type { i32, i8*, void (i8*)*, i8*
(%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zext *, i32 (i8*)*,
%struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* }
+ %struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] }
+ %struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*,
i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**,
%struct.aa_cache*, %struct.aa_protocol_list* }
+ %struct.aa_ivar = type { i8*, i8*, i32 }
+ %struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] }
+ %struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object*
(%struct.aa_object*, %struct.aa_ss*, ...)* }
+ %struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x
%struct.aa_method] }
+ %struct.aa_object = type { %struct.aa_class* }
+ %struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x
%struct.aa_object*] }
+ %struct.aa_ss = type opaque
+ @__kfooYTypeID = external global i32 ; [#uses=3]
+ @__fooYClass = external constant %struct.fooXClass;
<%struct.fooXClass*> [#uses=1]
+ @__fooXClassTableSize = external global i32 ; [#uses=1]
+ @__fooXAaClassTable = external global i32*; [#uses=1]
+ @s.10319 = external global %struct.aa_ss* ; <%struct.aa_ss**>
[#uses=2]
+ @str15 = external constant [24 x i8] ; <[24 x i8]*> [#uses=1]
+
+ implementation ; Functions:
+
+ define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc,
...) zext {
+ entry:
+ %args = alloca i8*, align 4 ; [#uses=5]
+ %args4 = bitcast i8** %args to i8* ; [#uses=2]
+ call void @llvm.va_start( i8* %args4 )
+ %tmp6 = load i32* @__kfooYTypeID; [#uses=1]
+ icmp eq i32 %tmp6, 0; :0 [#uses=1]
+ br i1 %0, label %cond_true, label %cond_next
+
+ cond_true:; preds = %entry
+ %tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass )
; [#uses=1]
+ store i32 %tmp7, i32* @__kfooYTypeID
+ br label %cond_next
+
+ cond_next:; preds = %cond_true, %entry
+ %tmp8 = load i32* @__kfooYTypeID; [#uses=2]
+ %tmp15 = load i32* @__fooXClassTableSize;
[#uses=1]
+ icmp ugt i32 %tmp15, %tmp8 ; :1 [#uses=1]
+ br i1 %1, label %cond_next18, label %cond_true58
+
+ cond_next18: ; preds = %cond_next
+ %tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0
; [#uses=1]
+ %tmp22 = load i32* %tmp21 ; [#uses=2]
+ %tmp29 = load i32** @__fooXAaClassTable ; [#uses=1]
+ %tmp31 = getelementptr i32* %tmp29, i32 %tmp8 ;
[#uses=1]
+ %tmp32 = load i32* %tmp31 ; [#uses=1]
+ icmp eq i32 %tmp22, %tmp32 ; :2 [#uses=1]
+ %.not = xor i1 %2, true ; [#uses=1]
+ icmp ugt i32 %tmp22, 4095 ; :3 [#uses=1]
+ %bothcond = and i1 %.not, %3; [#uses=1]
+ br i1 %bothcond, label %cond_true58, label %bb48
+
+ bb48: ; preds = %cond_next18
+ %tmp78 = call i32 @strlen( i8* %componentDesc ) ;
[#uses=4]
+ %tmp92 = alloca i32, i32 %tmp78 ; [#uses=2]
+ icmp sgt i32 %tmp78, 0 ; :4 [#uses=1]
+ br i1 %4, label %cond_true111, label %bb114
+
+ cond_true58: ; preds = %cond_next18, %cond_next
+ %tmp59 = load %struct.aa_ss** @s.10319 ; <%struct.aa_ss*>
[#uses=2]
+ icmp eq %struct.aa_ss* %tmp59, null ; :5 [#uses=1]
+ %tmp6869 = bitcast %struct.__fooY* %calendar to i8* ;
[#uses=2]
+ br i1 %5, label %cond_true60, label %cond_next64
+
+ cond_true60: ; preds = %cond_true58
+
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.81 -> 1.82
---
Log message:
Fix one more Thumb eliminateFrameIndex bug.
---
Diffs of the changes: (+23 -9)
ARMRegisterInfo.cpp | 32 +++-
1 files changed, 23 insertions(+), 9 deletions(-)
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.81
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.82
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.81Tue Mar 6 16:02:53 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Tue Mar 6 18:12:18 2007
@@ -398,7 +398,7 @@
Bytes -= ThisVal;
NumMIs++;
NumBits = 8;
-Scale = 1;
+Scale = 1; // Followed by a number of tADDi8.
Chunk = ((1 << NumBits) - 1) * Scale;
}
@@ -685,7 +685,7 @@
const TargetInstrDescriptor &Desc = TII.get(Opcode);
unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
bool isSub = false;
-
+
if (Opcode == ARM::ADDri) {
Offset += MI.getOperand(i+1).getImm();
if (Offset == 0) {
@@ -724,8 +724,21 @@
MI.getOperand(i+1).ChangeToImmediate(ThisSOImmVal);
} else if (Opcode == ARM::tADDrSPi) {
Offset += MI.getOperand(i+1).getImm();
-assert((Offset & 3) == 0 &&
- "Thumb add/sub sp, #imm immediate must be multiple of 4!");
+
+// Can't use tADDrSPi if it's based off the frame pointer.
+unsigned NumBits = 0;
+unsigned Scale = 1;
+if (FrameReg != ARM::SP) {
+ Opcode = ARM::tADDi3;
+ MI.setInstrDescriptor(TII.get(ARM::tADDi3));
+ NumBits = 3;
+} else {
+ NumBits = 8;
+ Scale = 4;
+ assert((Offset & 3) == 0 &&
+ "Thumb add/sub sp, #imm immediate must be multiple of 4!");
+}
+
if (Offset == 0) {
// Turn it into a move.
MI.setInstrDescriptor(TII.get(ARM::tMOVrr));
@@ -735,16 +748,17 @@
}
// Common case: small offset, fits into instruction.
-if (((Offset >> 2) & ~255U) == 0) {
+unsigned Mask = (1 << NumBits) - 1;
+if (((Offset / Scale) & ~Mask) == 0) {
// Replace the FrameIndex with sp / fp
MI.getOperand(i).ChangeToRegister(FrameReg, false);
- MI.getOperand(i+1).ChangeToImmediate(Offset >> 2);
+ MI.getOperand(i+1).ChangeToImmediate(Offset / Scale);
return;
}
unsigned DestReg = MI.getOperand(0).getReg();
unsigned Bytes = (Offset > 0) ? Offset : -Offset;
-unsigned NumMIs = calcNumMI(Opcode, 0, Bytes, 8, 1);
+unsigned NumMIs = calcNumMI(Opcode, 0, Bytes, NumBits, Scale);
// MI would expand into a large number of instructions. Don't try to
// simplify the immediate.
if (NumMIs > 2) {
@@ -758,8 +772,8 @@
// r0 = add sp, 255*4
// r0 = add r0, (imm - 255*4)
MI.getOperand(i).ChangeToRegister(FrameReg, false);
- MI.getOperand(i+1).ChangeToImmediate(255);
- Offset = (Offset - 255 * 4);
+ MI.getOperand(i+1).ChangeToImmediate(Mask);
+ Offset = (Offset - Mask * Scale);
MachineBasicBlock::iterator NII = next(II);
emitThumbRegPlusImmediate(MBB, NII, DestReg, DestReg, Offset, TII);
} else {
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Re: [llvm-commits] JIT Failures On Grawp i386 nightly tester
On Mar 6, 2007, at 2:42 PM, Reid Spencer wrote: > As far as I can tell, these issues have all been fixed with the > improvement of ExecutionEngine::getConstantValue(). I'm not sure how > anything worked previously as none of the casting operators were > implemented. In any event, constant expressions are fully implemented > now. All the tests pass on Linux. We'll see if they pass on Darwin > tonight. Thanks Reid! -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [see] CVS: llvm-poolalloc/lib/DSA/DataStructure.cpp
Changes in directory llvm-poolalloc/lib/DSA:
DataStructure.cpp updated: 1.248.2.4.2.1 -> 1.248.2.4.2.2
---
Log message:
Disabled debugging output.
---
Diffs of the changes: (+2 -0)
DataStructure.cpp |2 ++
1 files changed, 2 insertions(+)
Index: llvm-poolalloc/lib/DSA/DataStructure.cpp
diff -u llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.1
llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.2
--- llvm-poolalloc/lib/DSA/DataStructure.cpp:1.248.2.4.2.1 Wed Feb 28
11:35:32 2007
+++ llvm-poolalloc/lib/DSA/DataStructure.cppTue Mar 6 16:44:38 2007
@@ -1402,10 +1402,12 @@
Value *dest = getMetaPoolValue();
Value *curr = other->getMetaPoolValue();
if (dest != curr) {
+#if 0
std::cerr << "LLVA: Merging metapools: " <<
this->Creator->getParent()->getParent()->getName() << " : " <<
other->Creator->getParent()->getParent()->getName() << "\n"
<< "LLVA: " << *(this->Creator) << "\n"
<< "LLVA: " << *(other->Creator) << "\n";
curr->replaceAllUsesWith(dest);
+#endif
}
//merge the hash sets in to other
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[llvm-commits] JIT Failures On Grawp i386 nightly tester
As far as I can tell, these issues have all been fixed with the improvement of ExecutionEngine::getConstantValue(). I'm not sure how anything worked previously as none of the casting operators were implemented. In any event, constant expressions are fully implemented now. All the tests pass on Linux. We'll see if they pass on Darwin tonight. Reid. On Tue, 2007-03-06 at 11:15 -0800, Reid Spencer wrote: > On Tue, 2007-03-06 at 10:48 -0800, Chris Lattner wrote: > > Hi Reid, > > > > Can you take a look at these JIT failures? They are almost certainly > > GenericValue related. > > Already am. There were similar ones on your ppc32 as well. > > > > Thanks, > > > > -Chris > > > > Begin forwarded message: > > > > > From: Nobody <[EMAIL PROTECTED]> > > > Date: March 6, 2007 7:29:36 AM PST > > > To: [EMAIL PROTECTED] > > > Subject: [llvm-testresults] Grawp i386 nightly tester results > > > > > > http://llvm.org/nightlytest/test.php?machine=64&night=2376 > > > Name: grawp.apple.com > > > Nickname: Grawp > > > Buildstatus: OK > > > > > > New Test Passes: > > > None > > > > > > New Test Failures: > > > Applications/kimwitu++/kc [JIT codegen, JIT] > > > Applications/lambda-0.1.3/lambda [JIT codegen, JIT] > > > Benchmarks/CoyoteBench/fftbench [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/city/city [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/deriv1/deriv1 [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/deriv2/deriv2 [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/employ/employ [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/family/family [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/garage/garage [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/life/life [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/NP/np [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/objects/objects [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/ocean/ocean [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/office/office [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/primes/primes [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/shapes/shapes [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/simul/simul [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/trees/trees [JIT codegen, JIT] > > > Benchmarks/Prolangs-C++/vcirc/vcirc [JIT codegen, JIT] > > > Benchmarks/Shootout-C++/methcall [JIT codegen, JIT] > > > Benchmarks/Shootout-C++/objinst [JIT codegen, JIT] > > > Benchmarks/tramp3d-v4/tramp3d-v4 [JIT codegen, ] > > > Nurbs/nurbs [JIT codegen, ] > > > SPEC/CFP2006/444.namd/444.namd [JIT codegen, JIT] > > > SPEC/CFP2006/447.dealII/447.dealII [JIT codegen, ] > > > SPEC/CINT2000/252.eon/252.eon [JIT codegen, JIT] > > > SPEC/CINT2006/473.astar/473.astar [JIT codegen, JIT] > > > > > > > > > Added Tests: > > > test/CFrontend/2007-03-05-DataLayout.c > > > test/CodeGen/X86/mmx-emms.ll > > > test/Transforms/InstCombine/udiv_select_to_select_shift.ll > > > > > > > > > Removed Tests: > > > None > > > > > > Significant changes in test results: > > > JIT: > > > singlesource/Benchmarks/Shootout-C++/ackermann: 9.47% (3.80 => 3.44) > > > singlesource/Benchmarks/Shootout/matrix: 11.57% (10.72 => 9.48) > > > LLC-BETA: > > > external/SPEC/CFP2000/179.art/179.art: 8.75% (2.40 => 2.19) > > > > > > ___ > > > llvm-testresults mailing list > > > [EMAIL PROTECTED] > > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-testresults > > > > ___ > > llvm-commits mailing list > > llvm-commits@cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/ExecutionEngine/ExecutionEngine.cpp
Changes in directory llvm/lib/ExecutionEngine:
ExecutionEngine.cpp updated: 1.112 -> 1.113
---
Log message:
Fix all of last night's JIT failures in Prolangs-C++ by finishing the
implementation of getConstantValue().
---
Diffs of the changes: (+151 -42)
ExecutionEngine.cpp | 193
1 files changed, 151 insertions(+), 42 deletions(-)
Index: llvm/lib/ExecutionEngine/ExecutionEngine.cpp
diff -u llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.112
llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.113
--- llvm/lib/ExecutionEngine/ExecutionEngine.cpp:1.112 Mon Mar 5 23:03:16 2007
+++ llvm/lib/ExecutionEngine/ExecutionEngine.cppTue Mar 6 16:23:15 2007
@@ -302,82 +302,191 @@
/// part is if C is a ConstantExpr.
/// @brief Get a GenericValue for a Constnat*
GenericValue ExecutionEngine::getConstantValue(const Constant *C) {
- // Declare the result as garbage.
- GenericValue Result;
-
// If its undefined, return the garbage.
- if (isa(C)) return Result;
+ if (isa(C))
+return GenericValue();
// If the value is a ConstantExpr
if (const ConstantExpr *CE = dyn_cast(C)) {
+Constant *Op0 = CE->getOperand(0);
switch (CE->getOpcode()) {
case Instruction::GetElementPtr: {
// Compute the index
- Result = getConstantValue(CE->getOperand(0));
+ GenericValue Result = getConstantValue(Op0);
SmallVector Indices(CE->op_begin()+1, CE->op_end());
uint64_t Offset =
-TD->getIndexedOffset(CE->getOperand(0)->getType(),
- &Indices[0], Indices.size());
+TD->getIndexedOffset(Op0->getType(), &Indices[0], Indices.size());
char* tmp = (char*) Result.PointerVal;
Result = PTOGV(tmp + Offset);
return Result;
}
-case Instruction::Trunc:
-case Instruction::ZExt:
-case Instruction::SExt:
-case Instruction::FPTrunc:
-case Instruction::FPExt:
-case Instruction::UIToFP:
-case Instruction::SIToFP:
-case Instruction::FPToUI:
-case Instruction::FPToSI:
- break;
-case Instruction::PtrToInt: {
- Constant *Op = CE->getOperand(0);
- GenericValue GV = getConstantValue(Op);
+case Instruction::Trunc: {
+ GenericValue GV = getConstantValue(Op0);
+ uint32_t BitWidth = cast(CE->getType())->getBitWidth();
+ GV.IntVal = GV.IntVal.trunc(BitWidth);
return GV;
}
-case Instruction::BitCast: {
- // Bit casts are no-ops but we can only return the GV of the operand if
- // they are the same basic type (pointer->pointer, packed->packed, etc.)
- Constant *Op = CE->getOperand(0);
- GenericValue GV = getConstantValue(Op);
- if (Op->getType()->getTypeID() == C->getType()->getTypeID())
-return GV;
- break;
+case Instruction::ZExt: {
+ GenericValue GV = getConstantValue(Op0);
+ uint32_t BitWidth = cast(CE->getType())->getBitWidth();
+ GV.IntVal = GV.IntVal.zext(BitWidth);
+ return GV;
+}
+case Instruction::SExt: {
+ GenericValue GV = getConstantValue(Op0);
+ uint32_t BitWidth = cast(CE->getType())->getBitWidth();
+ GV.IntVal = GV.IntVal.sext(BitWidth);
+ return GV;
+}
+case Instruction::FPTrunc: {
+ GenericValue GV = getConstantValue(Op0);
+ GV.FloatVal = float(GV.DoubleVal);
+ return GV;
+}
+case Instruction::FPExt:{
+ GenericValue GV = getConstantValue(Op0);
+ GV.DoubleVal = double(GV.FloatVal);
+ return GV;
+}
+case Instruction::UIToFP: {
+ GenericValue GV = getConstantValue(Op0);
+ if (CE->getType() == Type::FloatTy)
+GV.FloatVal = float(GV.IntVal.roundToDouble());
+ else
+GV.DoubleVal = GV.IntVal.roundToDouble();
+ return GV;
+}
+case Instruction::SIToFP: {
+ GenericValue GV = getConstantValue(Op0);
+ if (CE->getType() == Type::FloatTy)
+GV.FloatVal = float(GV.IntVal.signedRoundToDouble());
+ else
+GV.DoubleVal = GV.IntVal.signedRoundToDouble();
+ return GV;
+}
+case Instruction::FPToUI: // double->APInt conversion handles sign
+case Instruction::FPToSI: {
+ GenericValue GV = getConstantValue(Op0);
+ uint32_t BitWidth = cast(CE->getType())->getBitWidth();
+ if (Op0->getType() == Type::FloatTy)
+GV.IntVal = APIntOps::RoundFloatToAPInt(GV.FloatVal, BitWidth);
+ else
+GV.IntVal = APIntOps::RoundDoubleToAPInt(GV.DoubleVal, BitWidth);
+ return GV;
+}
+case Instruction::PtrToInt: {
+ GenericValue GV = getConstantValue(Op0);
+ uint32_t PtrWidth = TD->getPointerSizeInBits();
+ GV.IntVal = APInt(PtrWidth, uintptr_t(GV.PointerVal));
+ return GV;
}
case Instruction::IntToPtr: {
- // IntToPtr casts are just so special. Cast to intptr_t first.
- Constant *Op = CE->getOperand(0);
- GenericValue GV = getConstantValue(Op);
- return PTOGV((void*)(uintptr_t)GV.IntVal.getZ
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.80 -> 1.81
---
Log message:
Register scavenging is now on by default for ARM.
---
Diffs of the changes: (+4 -3)
ARMRegisterInfo.cpp |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.80
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.81
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.80Tue Mar 6 04:03:56 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Tue Mar 6 16:02:53 2007
@@ -36,8 +36,9 @@
#include
using namespace llvm;
-static cl::opt EnableScavenging("enable-arm-reg-scavenging", cl::Hidden,
- cl::desc("Enable register scavenging on
ARM"));
+static cl::opt ThumbRegScavenging("enable-thumb-reg-scavenging",
+ cl::Hidden,
+ cl::desc("Enable register scavenging on
Thumb"));
unsigned ARMRegisterInfo::getRegisterNumbering(unsigned RegEnum) {
using namespace ARM;
@@ -345,7 +346,7 @@
bool
ARMRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
const ARMFunctionInfo *AFI = MF.getInfo();
- return EnableScavenging && !AFI->isThumbFunction();
+ return ThumbRegScavenging || !AFI->isThumbFunction();
}
/// hasFP - Return true if the specified function should have a dedicated frame
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Changes in directory llvm/lib/Target/ARM:
ARMLoadStoreOptimizer.cpp updated: 1.2 -> 1.3
---
Log message:
Make load / store optimizer use register scavenger.
---
Diffs of the changes: (+58 -21)
ARMLoadStoreOptimizer.cpp | 79 +-
1 files changed, 58 insertions(+), 21 deletions(-)
Index: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
diff -u llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.2
llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.3
--- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.2 Tue Mar 6 12:02:41 2007
+++ llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Mar 6 15:59:20 2007
@@ -59,6 +59,8 @@
typedef SmallVector MemOpQueue;
typedef MemOpQueue::iterator MemOpQueueIter;
+void AdvanceRS(MachineBasicBlock *MBB, MemOpQueue &MemOps);
+
SmallVector
MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex, unsigned Base,
int Opcode, unsigned Size, MemOpQueue &MemOps);
@@ -103,8 +105,9 @@
/// registers in Regs as the register operands that would be loaded / stored.
/// It returns true if the transformation is done.
static bool mergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
- int Offset, unsigned Base, int Opcode,
- SmallVector &Regs,
+ int Offset, unsigned Base, bool BaseKill, int Opcode,
+ SmallVector, 8> &Regs,
+ RegScavenger *RS,
const TargetInstrInfo *TII) {
// Only a single register to load / store. Don't bother.
unsigned NumRegs = Regs.size();
@@ -130,10 +133,12 @@
if (Opcode == ARM::LDR)
// If it is a load, then just use one of the destination register to
// use as the new base.
- NewBase = Regs[NumRegs-1];
+ NewBase = Regs[NumRegs-1].first;
else {
- // FIXME: Try scavenging a register to use as a new base.
- NewBase = ARM::R12;
+ // Try to find a free register to use as a new base.
+ NewBase = RS ? RS->FindUnusedReg(&ARM::GPRRegClass) : (unsigned)ARM::R12;
+ if (NewBase == 0)
+return false;
}
int BaseOpc = ARM::ADDri;
if (Offset < 0) {
@@ -143,52 +148,78 @@
int ImmedOffset = ARM_AM::getSOImmVal(Offset);
if (ImmedOffset == -1)
return false; // Probably not worth it then.
-BuildMI(MBB, MBBI, TII->get(BaseOpc),
NewBase).addReg(Base).addImm(ImmedOffset);
+
+BuildMI(MBB, MBBI, TII->get(BaseOpc), NewBase)
+ .addReg(Base, false, false, BaseKill).addImm(ImmedOffset);
Base = NewBase;
+BaseKill = true; // New base is always killed right its use.
}
bool isDPR = Opcode == ARM::FLDD || Opcode == ARM::FSTD;
bool isDef = Opcode == ARM::LDR || Opcode == ARM::FLDS || Opcode ==
ARM::FLDD;
Opcode = getLoadStoreMultipleOpcode(Opcode);
MachineInstrBuilder MIB = (isAM4)
-? BuildMI(MBB, MBBI, TII->get(Opcode)).addReg(Base)
+? BuildMI(MBB, MBBI, TII->get(Opcode)).addReg(Base, false, false, BaseKill)
.addImm(ARM_AM::getAM4ModeImm(Mode))
-: BuildMI(MBB, MBBI, TII->get(Opcode)).addReg(Base)
+: BuildMI(MBB, MBBI, TII->get(Opcode)).addReg(Base, false, false, BaseKill)
.addImm(ARM_AM::getAM5Opc(Mode, false, isDPR ? NumRegs<<1 : NumRegs));
for (unsigned i = 0; i != NumRegs; ++i)
-MIB = MIB.addReg(Regs[i], Opcode == isDef);
+MIB = MIB.addReg(Regs[i].first, isDef, false, Regs[i].second);
return true;
}
+/// AdvanceRS - Advance register scavenger to just before the earliest memory
+/// op that is being merged.
+void ARMLoadStoreOpt::AdvanceRS(MachineBasicBlock *MBB, MemOpQueue &MemOps) {
+ MachineBasicBlock::iterator Loc = MemOps[0].MBBI;
+ unsigned Position = MemOps[0].Position;
+ for (unsigned i = 1, e = MemOps.size(); i != e; ++i) {
+if (MemOps[i].Position < Position) {
+ Position = MemOps[i].Position;
+ Loc = MemOps[i].MBBI;
+}
+ }
+
+ if (Loc != MBB->begin())
+RS->forward(prior(Loc));
+}
+
+/// MergeLDR_STR - Merge a number of load / store instructions into one or more
+/// load / store multiple instructions.
SmallVector
ARMLoadStoreOpt::MergeLDR_STR(MachineBasicBlock &MBB,
unsigned SIndex, unsigned Base, int Opcode,
unsigned Size, MemOpQueue &MemOps) {
- bool isAM4 = Opcode == ARM::LDR || Opcode == ARM::STR;
+ if (RS && SIndex == 0)
+AdvanceRS(&MBB, MemOps);
+
SmallVector Merges;
+ SmallVector, 8> Regs;
+ bool isAM4 = Opcode == ARM::LDR || Opcode == ARM::STR;
int Offset = MemOps[SIndex].Offset;
int SOffset = Offset;
unsigned Pos = MemOps[SIndex].Position;
MachineBasicBlock::iterator Loc = MemOps[SIndex].MBBI;
- SmallVector Regs;
unsigned PReg = MemOps[SIndex].MBBI->getOperand(0).getReg();
unsigned PRegNum = ARMRegisterInfo::getRegisterNumbering(PReg);
- Regs.push_back(PReg);
+ bool isKill = MemOps[SIndex].MBBI->getOperand(0).isKill();
+ Regs.push_back(std::m
[llvm-commits] CVS: llvm/lib/CodeGen/RegisterScavenging.cpp
Changes in directory llvm/lib/CodeGen: RegisterScavenging.cpp updated: 1.11 -> 1.12 --- Log message: Minor bug fix. --- Diffs of the changes: (+2 -0) RegisterScavenging.cpp |2 ++ 1 files changed, 2 insertions(+) Index: llvm/lib/CodeGen/RegisterScavenging.cpp diff -u llvm/lib/CodeGen/RegisterScavenging.cpp:1.11 llvm/lib/CodeGen/RegisterScavenging.cpp:1.12 --- llvm/lib/CodeGen/RegisterScavenging.cpp:1.11Tue Mar 6 04:01:25 2007 +++ llvm/lib/CodeGen/RegisterScavenging.cpp Tue Mar 6 15:58:15 2007 @@ -50,6 +50,8 @@ } MBB = mbb; + ScavengedReg = 0; + ScavengedRC = NULL; // All registers started out unused. RegStates.set(); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/OpenProjects.html
Changes in directory llvm-www: OpenProjects.html updated: 1.19 -> 1.20 --- Log message: add a note --- Diffs of the changes: (+2 -2) OpenProjects.html |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/OpenProjects.html diff -u llvm-www/OpenProjects.html:1.19 llvm-www/OpenProjects.html:1.20 --- llvm-www/OpenProjects.html:1.19 Thu Feb 8 00:07:55 2007 +++ llvm-www/OpenProjects.html Tue Mar 6 15:49:19 2007 @@ -297,7 +297,7 @@ Implement GVN-PRE, a powerful and simple Partial Redundancy Elimination -algorithm for SSA form +algorithm for SSA form (in progress, ask on llvmdev) Implement a Dependence Analysis Infrastructure - Design some way to represent and query dep analysis Value range propagation pass @@ -375,7 +375,7 @@ src="http://www.w3.org/Icons/valid-html401"; alt="Valid HTML 4.01!"> http://llvm.org";>LLVM Compiler Infrastructure - Last modified: $Date: 2007/02/08 06:07:55 $ + Last modified: $Date: 2007/03/06 21:49:19 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LoopStrengthReduce.cpp updated: 1.114 -> 1.115
---
Log message:
Now LoopStrengthReduce is a LoopPass.
---
Diffs of the changes: (+14 -23)
LoopStrengthReduce.cpp | 37 ++---
1 files changed, 14 insertions(+), 23 deletions(-)
Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
diff -u llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.114
llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.115
--- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.114 Fri Mar 2
17:51:25 2007
+++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp Tue Mar 6 15:14:09 2007
@@ -23,6 +23,7 @@
#include "llvm/DerivedTypes.h"
#include "llvm/Analysis/Dominators.h"
#include "llvm/Analysis/LoopInfo.h"
+#include "llvm/Analysis/LoopPass.h"
#include "llvm/Analysis/ScalarEvolutionExpander.h"
#include "llvm/Support/CFG.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
@@ -104,7 +105,7 @@
}
};
- class VISIBILITY_HIDDEN LoopStrengthReduce : public FunctionPass {
+ class VISIBILITY_HIDDEN LoopStrengthReduce : public LoopPass {
LoopInfo *LI;
ETForest *EF;
ScalarEvolution *SE;
@@ -143,19 +144,7 @@
: TLI(tli) {
}
-virtual bool runOnFunction(Function &) {
- LI = &getAnalysis();
- EF = &getAnalysis();
- SE = &getAnalysis();
- TD = &getAnalysis();
- UIntPtrTy = TD->getIntPtrType();
- Changed = false;
-
- for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I)
-runOnLoop(*I);
-
- return Changed;
-}
+bool runOnLoop(Loop *L, LPPassManager &LPM);
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
// We split critical edges, so we change the CFG. However, we do update
@@ -179,7 +168,6 @@
///
Value *getCastedVersionOf(Instruction::CastOps opcode, Value *V);
private:
-void runOnLoop(Loop *L);
bool AddUsersIfInteresting(Instruction *I, Loop *L,
std::set &Processed);
SCEVHandle GetExpressionSCEV(Instruction *E, Loop *L);
@@ -196,7 +184,7 @@
RegisterPass X("loop-reduce", "Loop Strength Reduction");
}
-FunctionPass *llvm::createLoopStrengthReducePass(const TargetLowering *TLI) {
+LoopPass *llvm::createLoopStrengthReducePass(const TargetLowering *TLI) {
return new LoopStrengthReduce(TLI);
}
@@ -1271,12 +1259,15 @@
};
}
-void LoopStrengthReduce::runOnLoop(Loop *L) {
- // First step, transform all loops nesting inside of this loop.
- for (LoopInfo::iterator I = L->begin(), E = L->end(); I != E; ++I)
-runOnLoop(*I);
+bool LoopStrengthReduce::runOnLoop(Loop *L, LPPassManager &LPM) {
- // Next, find all uses of induction variables in this loop, and catagorize
+ LI = &getAnalysis();
+ EF = &getAnalysis();
+ SE = &getAnalysis();
+ TD = &getAnalysis();
+ UIntPtrTy = TD->getIntPtrType();
+
+ // Find all uses of induction variables in this loop, and catagorize
// them by stride. Start by finding all of the PHI nodes in the header for
// this loop. If they are induction variables, inspect their uses.
std::set Processed; // Don't reprocess instructions.
@@ -1284,7 +1275,7 @@
AddUsersIfInteresting(I, L, Processed);
// If we have nothing to do, return.
- if (IVUsesByStride.empty()) return;
+ if (IVUsesByStride.empty()) return false;
// Optimize induction variables. Some indvar uses can be transformed to use
// strides that will be needed for other purposes. A common example of this
@@ -1368,5 +1359,5 @@
CastedPointers.clear();
IVUsesByStride.clear();
StrideOrder.clear();
- return;
+ return false;
}
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[llvm-commits] CVS: llvm/include/llvm/Transforms/Scalar.h
Changes in directory llvm/include/llvm/Transforms:
Scalar.h updated: 1.72 -> 1.73
---
Log message:
Now LoopStrengthReduce is a LoopPass.
---
Diffs of the changes: (+2 -1)
Scalar.h |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/Transforms/Scalar.h
diff -u llvm/include/llvm/Transforms/Scalar.h:1.72
llvm/include/llvm/Transforms/Scalar.h:1.73
--- llvm/include/llvm/Transforms/Scalar.h:1.72 Wed Feb 14 20:26:09 2007
+++ llvm/include/llvm/Transforms/Scalar.h Tue Mar 6 15:14:09 2007
@@ -20,6 +20,7 @@
namespace llvm {
class FunctionPass;
+class LoopPass;
class Pass;
class GetElementPtrInst;
class PassInfo;
@@ -120,7 +121,7 @@
// optional parameter used to consult the target machine whether certain
// transformations are profitable.
//
-FunctionPass *createLoopStrengthReducePass(const TargetLowering *TLI = NULL);
+LoopPass *createLoopStrengthReducePass(const TargetLowering *TLI = NULL);
//===--===//
//
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[llvm-commits] CVS: llvm/lib/CodeGen/LLVMTargetMachine.cpp
Changes in directory llvm/lib/CodeGen: LLVMTargetMachine.cpp updated: 1.9 -> 1.10 --- Log message: Now LoopStrengthReduce is a LoopPass. --- Diffs of the changes: (+1 -0) LLVMTargetMachine.cpp |1 + 1 files changed, 1 insertion(+) Index: llvm/lib/CodeGen/LLVMTargetMachine.cpp diff -u llvm/lib/CodeGen/LLVMTargetMachine.cpp:1.9 llvm/lib/CodeGen/LLVMTargetMachine.cpp:1.10 --- llvm/lib/CodeGen/LLVMTargetMachine.cpp:1.9 Thu Feb 22 10:22:15 2007 +++ llvm/lib/CodeGen/LLVMTargetMachine.cpp Tue Mar 6 15:14:09 2007 @@ -14,6 +14,7 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/PassManager.h" #include "llvm/Pass.h" +#include "llvm/Analysis/LoopPass.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Transforms/Scalar.h" ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.482 -> 1.483
---
Log message:
big endian 32-bit systems (e.g. ppc32) want to return the high reg first, not
the lo-reg first. This is fallout from my ppc calling conv change yesterday,
it fixes test/ExecutionEngine/2003-05-06-LivenessClobber.llx
---
Diffs of the changes: (+5 -0)
LegalizeDAG.cpp |5 +
1 files changed, 5 insertions(+)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.482
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.483
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.482 Sat Mar 3 17:43:21 2007
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Mar 6 14:01:06 2007
@@ -1675,6 +1675,11 @@
if (Tmp2.getValueType() != MVT::Vector) {
SDOperand Lo, Hi;
ExpandOp(Tmp2, Lo, Hi);
+
+ // Big endian systems want the hi reg first.
+ if (!TLI.isLittleEndian())
+std::swap(Lo, Hi);
+
if (Hi.Val)
Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3,
Hi,Tmp3);
else
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[llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp
Changes in directory llvm/lib/Analysis:
LoopPass.cpp updated: 1.15 -> 1.16
---
Log message:
Insert loop into LQ before visiting children.
---
Diffs of the changes: (+1 -1)
LoopPass.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Analysis/LoopPass.cpp
diff -u llvm/lib/Analysis/LoopPass.cpp:1.15 llvm/lib/Analysis/LoopPass.cpp:1.16
--- llvm/lib/Analysis/LoopPass.cpp:1.15 Tue Mar 6 13:11:25 2007
+++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 13:50:49 2007
@@ -138,9 +138,9 @@
// Recurse through all subloops and all loops into LQ.
static void addLoopIntoQueue(Loop *L, std::deque &LQ) {
+ LQ.push_back(L);
for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I)
addLoopIntoQueue(*I, LQ);
- LQ.push_back(L);
}
/// Pass Manager itself does not invalidate any analysis info.
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[llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.153 -> 1.154
---
Log message:
Small eye-candy: use asciz directive everywhere, where possible.
---
Diffs of the changes: (+10 -3)
AsmPrinter.cpp | 13 ++---
1 files changed, 10 insertions(+), 3 deletions(-)
Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.153
llvm/lib/CodeGen/AsmPrinter.cpp:1.154
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.153 Wed Feb 21 16:48:45 2007
+++ llvm/lib/CodeGen/AsmPrinter.cpp Tue Mar 6 13:25:02 2007
@@ -559,13 +559,20 @@
/// Special characters are emitted properly.
/// \literal (Eg. '\t') \endliteral
void AsmPrinter::EmitString(const std::string &String) const {
- O << TAI->getAsciiDirective()
-<< "\"";
+ const char* AscizDirective = TAI->getAscizDirective();
+ if (AscizDirective)
+O << AscizDirective;
+ else
+O << TAI->getAsciiDirective();
+ O << "\"";
for (unsigned i = 0, N = String.size(); i < N; ++i) {
unsigned char C = String[i];
printStringChar(O, C);
}
- O << "\\0\"";
+ if (AscizDirective)
+O << "\"";
+ else
+O << "\\0\"";
}
___
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Re: [llvm-commits] Fwd: [llvm-testresults] Grawp i386 nightly tester results
On Tue, 2007-03-06 at 10:48 -0800, Chris Lattner wrote: > Hi Reid, > > Can you take a look at these JIT failures? They are almost certainly > GenericValue related. Already am. There were similar ones on your ppc32 as well. > > Thanks, > > -Chris > > Begin forwarded message: > > > From: Nobody <[EMAIL PROTECTED]> > > Date: March 6, 2007 7:29:36 AM PST > > To: [EMAIL PROTECTED] > > Subject: [llvm-testresults] Grawp i386 nightly tester results > > > > http://llvm.org/nightlytest/test.php?machine=64&night=2376 > > Name: grawp.apple.com > > Nickname: Grawp > > Buildstatus: OK > > > > New Test Passes: > > None > > > > New Test Failures: > > Applications/kimwitu++/kc [JIT codegen, JIT] > > Applications/lambda-0.1.3/lambda [JIT codegen, JIT] > > Benchmarks/CoyoteBench/fftbench [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/city/city [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/deriv1/deriv1 [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/deriv2/deriv2 [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/employ/employ [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/family/family [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/garage/garage [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/life/life [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/NP/np [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/objects/objects [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/ocean/ocean [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/office/office [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/primes/primes [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/shapes/shapes [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/simul/simul [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/trees/trees [JIT codegen, JIT] > > Benchmarks/Prolangs-C++/vcirc/vcirc [JIT codegen, JIT] > > Benchmarks/Shootout-C++/methcall [JIT codegen, JIT] > > Benchmarks/Shootout-C++/objinst [JIT codegen, JIT] > > Benchmarks/tramp3d-v4/tramp3d-v4 [JIT codegen, ] > > Nurbs/nurbs [JIT codegen, ] > > SPEC/CFP2006/444.namd/444.namd [JIT codegen, JIT] > > SPEC/CFP2006/447.dealII/447.dealII [JIT codegen, ] > > SPEC/CINT2000/252.eon/252.eon [JIT codegen, JIT] > > SPEC/CINT2006/473.astar/473.astar [JIT codegen, JIT] > > > > > > Added Tests: > > test/CFrontend/2007-03-05-DataLayout.c > > test/CodeGen/X86/mmx-emms.ll > > test/Transforms/InstCombine/udiv_select_to_select_shift.ll > > > > > > Removed Tests: > > None > > > > Significant changes in test results: > > JIT: > > singlesource/Benchmarks/Shootout-C++/ackermann: 9.47% (3.80 => 3.44) > > singlesource/Benchmarks/Shootout/matrix: 11.57% (10.72 => 9.48) > > LLC-BETA: > > external/SPEC/CFP2000/179.art/179.art: 8.75% (2.40 => 2.19) > > > > ___ > > llvm-testresults mailing list > > [EMAIL PROTECTED] > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-testresults > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h
Changes in directory llvm/include/llvm/Analysis:
LoopPass.h updated: 1.12 -> 1.13
---
Log message:
Use schedulePass() instead of assignPassManager() to add new LPPassManager.
This ensures that require analysis info is available.
---
Diffs of the changes: (+2 -6)
LoopPass.h |8 ++--
1 files changed, 2 insertions(+), 6 deletions(-)
Index: llvm/include/llvm/Analysis/LoopPass.h
diff -u llvm/include/llvm/Analysis/LoopPass.h:1.12
llvm/include/llvm/Analysis/LoopPass.h:1.13
--- llvm/include/llvm/Analysis/LoopPass.h:1.12 Tue Mar 6 13:00:02 2007
+++ llvm/include/llvm/Analysis/LoopPass.h Tue Mar 6 13:11:25 2007
@@ -69,12 +69,8 @@
bool runOnFunction(Function &F);
/// Pass Manager itself does not invalidate any analysis info.
- void getAnalysisUsage(AnalysisUsage &Info) const {
-// LPPassManager needs LoopInfo. In the long term LoopInfo class will
-// be consumed by LPPassManager.
-Info.addRequired();
-Info.setPreservesAll();
- }
+ // LPPassManager needs LoopInfo.
+ void getAnalysisUsage(AnalysisUsage &Info) const;
virtual const char *getPassName() const {
return "Loop Pass Manager";
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[llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp
Changes in directory llvm/lib/Analysis:
LoopPass.cpp updated: 1.14 -> 1.15
---
Log message:
Use schedulePass() instead of assignPassManager() to add new LPPassManager.
This ensures that require analysis info is available.
---
Diffs of the changes: (+11 -3)
LoopPass.cpp | 14 +++---
1 files changed, 11 insertions(+), 3 deletions(-)
Index: llvm/lib/Analysis/LoopPass.cpp
diff -u llvm/lib/Analysis/LoopPass.cpp:1.14 llvm/lib/Analysis/LoopPass.cpp:1.15
--- llvm/lib/Analysis/LoopPass.cpp:1.14 Tue Mar 6 13:00:02 2007
+++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 13:11:25 2007
@@ -143,14 +143,22 @@
LQ.push_back(L);
}
+/// Pass Manager itself does not invalidate any analysis info.
+void LPPassManager::getAnalysisUsage(AnalysisUsage &Info) const {
+ // LPPassManager needs LoopInfo. In the long term LoopInfo class will
+ // become part of LPPassManager.
+ Info.addRequired();
+ Info.setPreservesAll();
+}
+
/// run - Execute all of the passes scheduled for execution. Keep track of
/// whether any of the passes modifies the function, and if so, return true.
bool LPPassManager::runOnFunction(Function &F) {
- LoopInfo &LI = getAnalysis();
+ LI = &getAnalysis();
bool Changed = false;
// Populate Loop Queue
- for (LoopInfo::iterator I = LI.begin(), E = LI.end(); I != E; ++I)
+ for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I)
addLoopIntoQueue(*I, LQ);
// Initialization
@@ -279,7 +287,7 @@
// [3] Assign manager to manage this new manager. This may create
// and push new managers into PMS
Pass *P = dynamic_cast(LPPM);
-P->assignPassManager(PMS);
+TPM->schedulePass(P);
// [4] Push new manager into PMS
PMS.push(LPPM);
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[llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h
Changes in directory llvm/include/llvm/Analysis: LoopPass.h updated: 1.11 -> 1.12 --- Log message: Add LPPassManager::insertLoop(). --- Diffs of the changes: (+4 -2) LoopPass.h |6 -- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/include/llvm/Analysis/LoopPass.h diff -u llvm/include/llvm/Analysis/LoopPass.h:1.11 llvm/include/llvm/Analysis/LoopPass.h:1.12 --- llvm/include/llvm/Analysis/LoopPass.h:1.11 Tue Mar 6 12:38:33 2007 +++ llvm/include/llvm/Analysis/LoopPass.h Tue Mar 6 13:00:02 2007 @@ -101,9 +101,11 @@ } public: - // Delete loop from the loop queue. This is used by Loop pass to inform - // Loop Pass Manager that it should skip rest of the passes for this loop. + // Delete loop from the loop queue and loop nest (LoopInfo). void deleteLoopFromQueue(Loop *L); + + // Inset loop into the loop nest(LoopInfo) and loop queue(LQ). + void insertLoop(Loop *L, Loop *ParentLoop); // Reoptimize this loop. LPPassManager will re-insert this loop into the // queue. This allows LoopPass to change loop nest for the loop. This ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp
Changes in directory llvm/lib/Analysis:
LoopPass.cpp updated: 1.13 -> 1.14
---
Log message:
Add LPPassManager::insertLoop().
---
Diffs of the changes: (+32 -0)
LoopPass.cpp | 32
1 files changed, 32 insertions(+)
Index: llvm/lib/Analysis/LoopPass.cpp
diff -u llvm/lib/Analysis/LoopPass.cpp:1.13 llvm/lib/Analysis/LoopPass.cpp:1.14
--- llvm/lib/Analysis/LoopPass.cpp:1.13 Tue Mar 6 12:38:33 2007
+++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 13:00:02 2007
@@ -97,10 +97,42 @@
}
}
+// Inset loop into loop nest (LoopInfo) and loop queue (LQ).
+void LPPassManager::insertLoop(Loop *L, Loop *ParentLoop) {
+
+ assert (CurrentLoop != L && "Cannot insert CurrentLoop");
+
+ // Insert into loop nest
+ if (ParentLoop)
+ParentLoop->addChildLoop(L);
+ else
+LI->addTopLevelLoop(L);
+
+ // Insert L into loop queue
+ if (L == CurrentLoop)
+redoLoop(L);
+ else if (!ParentLoop)
+// This is top level loop.
+LQ.push_front(L);
+ else {
+// Insert L after ParentLoop
+for (std::deque::iterator I = LQ.begin(),
+ E = LQ.end(); I != E; ++I) {
+ if (*I == ParentLoop) {
+// deque does not support insert after.
+++I;
+LQ.insert(I, 1, L);
+break;
+ }
+}
+ }
+}
+
// Reoptimize this loop. LPPassManager will re-insert this loop into the
// queue. This allows LoopPass to change loop nest for the loop. This
// utility may send LPPassManager into infinite loops so use caution.
void LPPassManager::redoLoop(Loop *L) {
+ assert (CurrentLoop != L && "Can redo only CurrentLoop");
redoThisLoop = true;
}
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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrMMX.td
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.361 -> 1.362
X86InstrMMX.td updated: 1.14 -> 1.15
---
Log message:
Add LOAD/STORE support for MMX.
---
Diffs of the changes: (+47 -22)
X86ISelLowering.cpp |3 ++
X86InstrMMX.td | 66 ++--
2 files changed, 47 insertions(+), 22 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.361
llvm/lib/Target/X86/X86ISelLowering.cpp:1.362
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.361 Tue Mar 6 02:12:33 2007
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Mar 6 12:53:42 2007
@@ -327,6 +327,9 @@
addRegisterClass(MVT::v2i32, X86::VR64RegisterClass);
// FIXME: add MMX packed arithmetics
+setOperationAction(ISD::LOAD, MVT::v8i8, Legal);
+setOperationAction(ISD::LOAD, MVT::v4i16, Legal);
+setOperationAction(ISD::LOAD, MVT::v2i32, Legal);
setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Expand);
setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Expand);
setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Expand);
Index: llvm/lib/Target/X86/X86InstrMMX.td
diff -u llvm/lib/Target/X86/X86InstrMMX.td:1.14
llvm/lib/Target/X86/X86InstrMMX.td:1.15
--- llvm/lib/Target/X86/X86InstrMMX.td:1.14 Mon Mar 5 17:09:45 2007
+++ llvm/lib/Target/X86/X86InstrMMX.td Tue Mar 6 12:53:42 2007
@@ -13,7 +13,10 @@
//
//===--===//
+//===--===//
// Instruction templates
+//===--===//
+
// MMXI - MMX instructions with TB prefix.
// MMX2I - MMX / SSE2 instructions with TB and OpSize prefixes.
// MMXIi8 - MMX instructions with ImmT == Imm8 and TB prefix.
@@ -30,33 +33,42 @@
[(set VR64:$dst, (v8i8 (undef)))]>,
Requires<[HasMMX]>;
+def : Pat<(v8i8 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>;
def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>;
def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>;
-// EMMS
-def EMMS : I<0x77, RawFrm, (ops), "emms", [(int_x86_mmx_emms)]>, TB,
- Requires<[HasMMX]>;
+//===--===//
+// MMX Pattern Fragments
+//===--===//
-// Move Instructions
-def MOVD64rr : I<0x6E, MRMSrcReg, (ops VR64:$dst, GR32:$src),
- "movd {$src, $dst|$dst, $src}", []>, TB,
- Requires<[HasMMX]>;
-def MOVD64rm : I<0x6E, MRMSrcMem, (ops VR64:$dst, i32mem:$src),
- "movd {$src, $dst|$dst, $src}", []>, TB,
- Requires<[HasMMX]>;
-def MOVD64mr : I<0x7E, MRMDestMem, (ops i32mem:$dst, VR64:$src),
- "movd {$src, $dst|$dst, $src}", []>, TB,
- Requires<[HasMMX]>;
+def loadv2i32 : PatFrag<(ops node:$ptr), (v2i32 (load node:$ptr))>;
-def MOVQ64rr : I<0x6F, MRMSrcReg, (ops VR64:$dst, VR64:$src),
- "movq {$src, $dst|$dst, $src}", []>, TB,
- Requires<[HasMMX]>;
-def MOVQ64rm : I<0x6F, MRMSrcMem, (ops VR64:$dst, i64mem:$src),
- "movq {$src, $dst|$dst, $src}", []>, TB,
- Requires<[HasMMX]>;
-def MOVQ64mr : I<0x7F, MRMDestMem, (ops i64mem:$dst, VR64:$src),
- "movq {$src, $dst|$dst, $src}", []>, TB,
- Requires<[HasMMX]>;
+//===--===//
+// MMX EMMS Instruction
+//===--===//
+
+def EMMS : MMXI<0x77, RawFrm, (ops), "emms", [(int_x86_mmx_emms)]>;
+
+//===--===//
+// MMX Scalar Instructions
+//===--===//
+
+// Move Instructions
+def MOVD64rr : MMXI<0x6E, MRMSrcReg, (ops VR64:$dst, GR32:$src),
+"movd {$src, $dst|$dst, $src}", []>;
+def MOVD64rm : MMXI<0x6E, MRMSrcMem, (ops VR64:$dst, i32mem:$src),
+"movd {$src, $dst|$dst, $src}", []>;
+def MOVD64mr : MMXI<0x7E, MRMDestMem, (ops i32mem:$dst, VR64:$src),
+"movd {$src, $dst|$dst, $src}", []>;
+
+def MOVQ64rr : MMXI<0x6F, MRMSrcReg, (ops VR64:$dst, VR64:$src),
+"movq {$src, $dst|$dst, $src}", []>;
+def MOVQ64rm : MMXI<0x6F, MRMSrcMem, (ops VR64:$dst, i64mem:$src),
+"movq {$src, $dst|$dst, $src}",
+[(set VR64:$dst, (loadv2i32 addr:$src))]>;
+def MOVQ64mr : MMXI<0x7F, MRMDestMem, (ops i64mem:$dst, VR64:$src),
+"movq {$src, $dst|$dst, $src}",
+[(store (v2i32 VR64:$src), addr:$
[llvm-commits] Fwd: [llvm-testresults] Grawp i386 nightly tester results
Hi Reid, Can you take a look at these JIT failures? They are almost certainly GenericValue related. Thanks, -Chris Begin forwarded message: > From: Nobody <[EMAIL PROTECTED]> > Date: March 6, 2007 7:29:36 AM PST > To: [EMAIL PROTECTED] > Subject: [llvm-testresults] Grawp i386 nightly tester results > > http://llvm.org/nightlytest/test.php?machine=64&night=2376 > Name: grawp.apple.com > Nickname: Grawp > Buildstatus: OK > > New Test Passes: > None > > New Test Failures: > Applications/kimwitu++/kc [JIT codegen, JIT] > Applications/lambda-0.1.3/lambda [JIT codegen, JIT] > Benchmarks/CoyoteBench/fftbench [JIT codegen, JIT] > Benchmarks/Prolangs-C++/city/city [JIT codegen, JIT] > Benchmarks/Prolangs-C++/deriv1/deriv1 [JIT codegen, JIT] > Benchmarks/Prolangs-C++/deriv2/deriv2 [JIT codegen, JIT] > Benchmarks/Prolangs-C++/employ/employ [JIT codegen, JIT] > Benchmarks/Prolangs-C++/family/family [JIT codegen, JIT] > Benchmarks/Prolangs-C++/garage/garage [JIT codegen, JIT] > Benchmarks/Prolangs-C++/life/life [JIT codegen, JIT] > Benchmarks/Prolangs-C++/NP/np [JIT codegen, JIT] > Benchmarks/Prolangs-C++/objects/objects [JIT codegen, JIT] > Benchmarks/Prolangs-C++/ocean/ocean [JIT codegen, JIT] > Benchmarks/Prolangs-C++/office/office [JIT codegen, JIT] > Benchmarks/Prolangs-C++/primes/primes [JIT codegen, JIT] > Benchmarks/Prolangs-C++/shapes/shapes [JIT codegen, JIT] > Benchmarks/Prolangs-C++/simul/simul [JIT codegen, JIT] > Benchmarks/Prolangs-C++/trees/trees [JIT codegen, JIT] > Benchmarks/Prolangs-C++/vcirc/vcirc [JIT codegen, JIT] > Benchmarks/Shootout-C++/methcall [JIT codegen, JIT] > Benchmarks/Shootout-C++/objinst [JIT codegen, JIT] > Benchmarks/tramp3d-v4/tramp3d-v4 [JIT codegen, ] > Nurbs/nurbs [JIT codegen, ] > SPEC/CFP2006/444.namd/444.namd [JIT codegen, JIT] > SPEC/CFP2006/447.dealII/447.dealII [JIT codegen, ] > SPEC/CINT2000/252.eon/252.eon [JIT codegen, JIT] > SPEC/CINT2006/473.astar/473.astar [JIT codegen, JIT] > > > Added Tests: > test/CFrontend/2007-03-05-DataLayout.c > test/CodeGen/X86/mmx-emms.ll > test/Transforms/InstCombine/udiv_select_to_select_shift.ll > > > Removed Tests: > None > > Significant changes in test results: > JIT: > singlesource/Benchmarks/Shootout-C++/ackermann: 9.47% (3.80 => 3.44) > singlesource/Benchmarks/Shootout/matrix: 11.57% (10.72 => 9.48) > LLC-BETA: > external/SPEC/CFP2000/179.art/179.art: 8.75% (2.40 => 2.19) > > ___ > llvm-testresults mailing list > [EMAIL PROTECTED] > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-testresults ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h
Changes in directory llvm/include/llvm/Analysis: LoopPass.h updated: 1.10 -> 1.11 --- Log message: LPPassManager::deleteLoopFromQueue() add meat. Cut-n-paste code from LoopUnswitch pass. --- Diffs of the changes: (+2 -0) LoopPass.h |2 ++ 1 files changed, 2 insertions(+) Index: llvm/include/llvm/Analysis/LoopPass.h diff -u llvm/include/llvm/Analysis/LoopPass.h:1.10 llvm/include/llvm/Analysis/LoopPass.h:1.11 --- llvm/include/llvm/Analysis/LoopPass.h:1.10 Tue Mar 6 11:59:37 2007 +++ llvm/include/llvm/Analysis/LoopPass.h Tue Mar 6 12:38:33 2007 @@ -113,6 +113,8 @@ std::deque LQ; bool skipThisLoop; bool redoThisLoop; + LoopInfo *LI; + Loop *CurrentLoop; }; } // End llvm namespace ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp
Changes in directory llvm/lib/Analysis:
LoopPass.cpp updated: 1.12 -> 1.13
---
Log message:
LPPassManager::deleteLoopFromQueue() add meat. Cut-n-paste code from
LoopUnswitch pass.
---
Diffs of the changes: (+71 -7)
LoopPass.cpp | 78 +--
1 files changed, 71 insertions(+), 7 deletions(-)
Index: llvm/lib/Analysis/LoopPass.cpp
diff -u llvm/lib/Analysis/LoopPass.cpp:1.12 llvm/lib/Analysis/LoopPass.cpp:1.13
--- llvm/lib/Analysis/LoopPass.cpp:1.12 Tue Mar 6 11:59:37 2007
+++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 12:38:33 2007
@@ -24,13 +24,77 @@
LPPassManager::LPPassManager(int Depth) : PMDataManager(Depth) {
skipThisLoop = false;
redoThisLoop = false;
+ LI = NULL;
+ CurrentLoop = NULL;
}
-/// Delete loop from the loop queue. This is used by Loop pass to inform
-/// Loop Pass Manager that it should skip rest of the passes for this loop.
+/// Delete loop from the loop queue and loop hierarcy (LoopInfo).
void LPPassManager::deleteLoopFromQueue(Loop *L) {
- // Do not pop loop from LQ here. It will be done by runOnFunction while loop.
- skipThisLoop = true;
+
+ if (Loop *ParentLoop = L->getParentLoop()) { // Not a top-level loop.
+// Reparent all of the blocks in this loop. Since BBLoop had a parent,
+// they are now all in it.
+for (Loop::block_iterator I = L->block_begin(), E = L->block_end();
+ I != E; ++I)
+ if (LI->getLoopFor(*I) == L)// Don't change blocks in subloops.
+LI->changeLoopFor(*I, ParentLoop);
+
+// Remove the loop from its parent loop.
+for (Loop::iterator I = ParentLoop->begin(), E = ParentLoop->end();;
+ ++I) {
+ assert(I != E && "Couldn't find loop");
+ if (*I == L) {
+ParentLoop->removeChildLoop(I);
+break;
+ }
+}
+
+// Move all subloops into the parent loop.
+while (L->begin() != L->end())
+ ParentLoop->addChildLoop(L->removeChildLoop(L->end()-1));
+ } else {
+// Reparent all of the blocks in this loop. Since BBLoop had no parent,
+// they no longer in a loop at all.
+
+for (unsigned i = 0; i != L->getBlocks().size(); ++i) {
+ // Don't change blocks in subloops.
+ if (LI->getLoopFor(L->getBlocks()[i]) == L) {
+LI->removeBlock(L->getBlocks()[i]);
+--i;
+ }
+}
+
+// Remove the loop from the top-level LoopInfo object.
+for (LoopInfo::iterator I = LI->begin(), E = LI->end();; ++I) {
+ assert(I != E && "Couldn't find loop");
+ if (*I == L) {
+LI->removeLoop(I);
+break;
+ }
+}
+
+// Move all of the subloops to the top-level.
+while (L->begin() != L->end())
+ LI->addTopLevelLoop(L->removeChildLoop(L->end()-1));
+ }
+
+ delete L;
+
+ // If L is current loop then skip rest of the passes and let
+ // runOnFunction remove L from LQ. Otherwise, remove L from LQ now
+ // and continue applying other passes on CurrentLoop.
+ if (CurrentLoop == L) {
+skipThisLoop = true;
+return;
+ }
+
+ for (std::deque::iterator I = LQ.begin(),
+ E = LQ.end(); I != E; ++I) {
+if (*I == L) {
+ LQ.erase(I);
+ break;
+}
+ }
}
// Reoptimize this loop. LPPassManager will re-insert this loop into the
@@ -72,7 +136,7 @@
// Walk Loops
while (!LQ.empty()) {
-Loop *L = LQ.back();
+CurrentLoop = LQ.back();
skipThisLoop = false;
redoThisLoop = false;
@@ -91,7 +155,7 @@
StartPassTimer(P);
LoopPass *LP = dynamic_cast(P);
assert (LP && "Invalid LPPassManager member");
- LP->runOnLoop(L, *this);
+ LP->runOnLoop(CurrentLoop, *this);
StopPassTimer(P);
if (Changed)
@@ -111,7 +175,7 @@
LQ.pop_back();
if (redoThisLoop)
- LQ.push_back(L);
+ LQ.push_back(CurrentLoop);
}
// Finalization
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Re: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp
> @@ -27,6 +27,7 @@ > #include "llvm/CodeGen/MachineFunction.h" > #include "llvm/CodeGen/MachineInstrBuilder.h" > #include "llvm/CodeGen/SelectionDAG.h" > +#include "llvm/CodeGen/SelectionDAGISel.h" Please put the enum into SelectionDAGNodes.h so that SDISel.h doesn't need to be pulled into other code like this. Thanks, -Chris > #include "llvm/CodeGen/SSARegMap.h" > #include "llvm/Target/TargetOptions.h" > #include "llvm/ADT/VectorExtras.h" > @@ -346,7 +347,7 @@ >NeededGPRs = 0; >StackPad = 0; >GPRPad = 0; > - unsigned align = (Flags >> 27); > + unsigned align = (Flags >> SDISelParamFlags::OrigAlignmentOffs); >GPRPad = NumGPRs % ((align + 3)/4); >StackPad = StackOffset % align; >unsigned firstGPR = NumGPRs + GPRPad; > > > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> // FIXME: Distinguish between a formal with no [sz]ext
> attribute from one
> // that is zero extended!
> if (FTy->paramHasAttr(j, FunctionType::ZExtAttribute))
> - Flags |= 0;
> + Flags &= ~(SDISelParamFlags::Signed);
this should set the zext bit.
> case Promote:
>if (MVT::isInteger(VT)) {
> -unsigned ExtOp = isSigned ? ISD::SIGN_EXTEND :
> ISD::ZERO_EXTEND;
> +unsigned ExtOp = Args[i].isSigned ? ISD::SIGN_EXTEND :
> ISD::ZERO_EXTEND;
> Op = DAG.getNode(ExtOp, getTypeToTransformTo(VT), Op);
>} else {
> assert(MVT::isFloatingPoint(VT) && "Not int or FP?");
This should use ZERO_EXTEND if zext, SIGN_EXTEND if sext, and
ANY_EXTEND if neither,
-Chris
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Re: [llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAGISel.h
> Enumerate SDISel formal parameter attributes. Make use of new
> enumeration.
Cool.
> + namespace SDISelParamFlags {
> +enum Flags {
> + NoFlagSet = 0,
> + Signed= 1<<0,
> + SignedOffs= 0,
Can you please rename 'Signed' to 'SExt' for consistency? Can you
please also add "ZExt" as well?
-Chris
> + InReg = 1<<1,
> + InRegOffs = 1,
> + StructReturn = 1<<2,
> + StructReturnOffs = 2,
> + OrigAlignment = 0x1F<<27,
> + OrigAlignmentOffs = 27
> +};
> + }
> +
> /// SelectionDAGISel - This is the common base class used for
> SelectionDAG-based
> /// pattern-matching instruction selectors.
> class SelectionDAGISel : public FunctionPass {
>
>
>
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Re: [llvm-commits] CVS: llvm/test/CFrontend/2007-03-05-DataLayout.c
> > Index: llvm/test/CFrontend/2007-03-05-DataLayout.c > diff -u llvm/test/CFrontend/2007-03-05-DataLayout.c:1.1 llvm/test/ > CFrontend/2007-03-05-DataLayout.c:1.2 > --- llvm/test/CFrontend/2007-03-05-DataLayout.c:1.1 Mon Mar 5 > 21:00:17 2007 > +++ llvm/test/CFrontend/2007-03-05-DataLayout.c Tue Mar 6 11:48:25 > 2007 > @@ -1,5 +1,5 @@ > // Testcase for PR1242 > -// RUN: %llvmgcc -c %s -o %t && lli --force-interpreter=1 %t > +// RUN: %llvmgcc -S %s -o - | grep datalayout | wc -c | grep 130 > #include This will fail when run on a non-linux platform. Please check that the length is > 6 characters, or whatever the old string was. -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] Stack and register alignment in linux/ppc calls
Small mistake, here's the correct patch.
Nicolas
Nicolas Geoffray wrote:
This patch corrects arguments passing alignment for linux/ppc calls
(ELF ABI).
It affects LowerFORMAL_ARGUMENTS and LowerCALL of PPCISelLowering.cpp.
OK to commit?
Index: PPCISelLowering.cpp
===
RCS file: /var/cvs/llvm/llvm/lib/Target/PowerPC/PPCISelLowering.cpp,v
retrieving revision 1.259
diff -t -d -u -p -5 -r1.259 PPCISelLowering.cpp
--- PPCISelLowering.cpp 1 Mar 2007 13:11:38 - 1.259
+++ PPCISelLowering.cpp 6 Mar 2007 18:09:01 -
@@ -1127,10 +1127,11 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
SDOperand Root = Op.getOperand(0);
MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
bool isPPC64 = PtrVT == MVT::i64;
bool isMachoABI = Subtarget.isMachoABI();
+ bool isELF_ABI = Subtarget.isELF_ABI();
unsigned PtrByteSize = isPPC64 ? 8 : 4;
unsigned ArgOffset = PPCFrameInfo::getLinkageSize(isPPC64, isMachoABI);
static const unsigned GPR_32[] = { // 32-bit registers.
@@ -1164,24 +1165,34 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
SDOperand ArgVal;
bool needsLoad = false;
MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
unsigned ArgSize = ObjSize;
+unsigned Flags = cast(Op.getOperand(ArgNo+3))->getValue();
+// See if next argument requires stack alignment in ELF
+unsigned Expand = (ObjectVT == MVT::f64) || ((ArgNo + 1 < e) &&
+ (cast(Op.getOperand(ArgNo+4))->getValue() & (1 << 27)) &&
+ (!(Flags & (1 << 27;
unsigned CurArgOffset = ArgOffset;
switch (ObjectVT) {
default: assert(0 && "Unhandled argument type!");
case MVT::i32:
+ // Double word align in ELF
+ if (Expand && isELF_ABI && !isPPC64) GPR_idx += (GPR_idx % 2);
if (GPR_idx != Num_GPR_Regs) {
unsigned VReg = RegMap->createVirtualRegister(&PPC::GPRCRegClass);
MF.addLiveIn(GPR[GPR_idx], VReg);
ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i32);
++GPR_idx;
} else {
needsLoad = true;
ArgSize = PtrByteSize;
}
+ // Stack align in ELF
+ if (needsLoad && Expand && isELF_ABI && !isPPC64)
+ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize;
// All int arguments reserve stack space in Macho ABI.
if (isMachoABI || needsLoad) ArgOffset += PtrByteSize;
break;
case MVT::i64: // PPC64
@@ -1199,11 +1210,11 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
case MVT::f32:
case MVT::f64:
// Every 4 bytes of argument space consumes one of the GPRs available for
// argument passing.
- if (GPR_idx != Num_GPR_Regs) {
+ if (GPR_idx != Num_GPR_Regs && isMachoABI) {
++GPR_idx;
if (ObjSize == 8 && GPR_idx != Num_GPR_Regs && !isPPC64)
++GPR_idx;
}
if (FPR_idx != Num_FPR_Regs) {
@@ -1217,10 +1228,13 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
++FPR_idx;
} else {
needsLoad = true;
}
+ // Stack align in ELF
+ if (needsLoad && Expand && isELF_ABI && !isPPC64)
+ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize;
// All FP arguments reserve stack space in Macho ABI.
if (isMachoABI || needsLoad) ArgOffset += isPPC64 ? 8 : ObjSize;
break;
case MVT::v4f32:
case MVT::v4i32:
@@ -1319,10 +1333,11 @@ static SDOperand LowerCALL(SDOperand Op,
bool isVarArg= cast(Op.getOperand(2))->getValue() != 0;
SDOperand Callee = Op.getOperand(4);
unsigned NumOps = (Op.getNumOperands() - 5) / 2;
bool isMachoABI = Subtarget.isMachoABI();
+ bool isELF_ABI = Subtarget.isELF_ABI();
MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
bool isPPC64 = PtrVT == MVT::i64;
unsigned PtrByteSize = isPPC64 ? 8 : 4;
@@ -1394,35 +1409,58 @@ static SDOperand LowerCALL(SDOperand Op,
std::vector > RegsToPass;
SmallVector MemOpChains;
for (unsigned i = 0; i != NumOps; ++i) {
bool inMem = false;
SDOperand Arg = Op.getOperand(5+2*i);
-
+unsigned Flags = cast(Op.getOperand(5+2*i+1))->getValue();
+// See if next argument requires stack alignment in ELF
+unsigned Expand = (Arg.getValueType() == MVT::f64) ||
+ ((i + 1 < NumOps) &&
+ (cast(Op.getOperand(5+2*(i+1)+1))->getValue()
+& (1 << 27)) &&
+ (!(Flags & (1 << 27;
+
// PtrOff will be used to store the current argument to the stack if a
// register cannot be found for it.
-SDOperand PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType());
+SDOperand PtrOff;
+
+// Stack align in ELF
+if (isELF_ABI && Expand && !isPPC64)
+PtrOff = DAG.getConstant(ArgOffset + ((ArgOffset/4) % 2) * PtrByteSize,
+StackPtr.getValueType());
+else
+
[llvm-commits] Stack and register alignment in linux/ppc calls
This patch corrects arguments passing alignment for linux/ppc calls (ELF
ABI).
It affects LowerFORMAL_ARGUMENTS and LowerCALL of PPCISelLowering.cpp.
OK to commit?
Index: PPCISelLowering.cpp
===
RCS file: /var/cvs/llvm/llvm/lib/Target/PowerPC/PPCISelLowering.cpp,v
retrieving revision 1.259
diff -t -d -u -p -5 -r1.259 PPCISelLowering.cpp
--- PPCISelLowering.cpp 1 Mar 2007 13:11:38 - 1.259
+++ PPCISelLowering.cpp 6 Mar 2007 17:57:47 -
@@ -1127,10 +1127,11 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
SDOperand Root = Op.getOperand(0);
MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
bool isPPC64 = PtrVT == MVT::i64;
bool isMachoABI = Subtarget.isMachoABI();
+ bool isELF_ABI = Subtarget.isELF_ABI();
unsigned PtrByteSize = isPPC64 ? 8 : 4;
unsigned ArgOffset = PPCFrameInfo::getLinkageSize(isPPC64, isMachoABI);
static const unsigned GPR_32[] = { // 32-bit registers.
@@ -1164,24 +1165,34 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
SDOperand ArgVal;
bool needsLoad = false;
MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
unsigned ArgSize = ObjSize;
+unsigned Flags = cast(Op.getOperand(ArgNo+3))->getValue();
+// See if next argument requires stack alignment in ELF
+unsigned Expand = (ObjectVT == MVT::f64) || ((ArgNo + 1 < e) &&
+ (cast(Op.getOperand(ArgNo+4))->getValue() & (1 << 27)) &&
+ (!(Flags & (1 << 27;
unsigned CurArgOffset = ArgOffset;
switch (ObjectVT) {
default: assert(0 && "Unhandled argument type!");
case MVT::i32:
+ // Double word align in ELF
+ if (Expand && !isELF_ABI && !isPPC64) GPR_idx += (GPR_idx % 2);
if (GPR_idx != Num_GPR_Regs) {
unsigned VReg = RegMap->createVirtualRegister(&PPC::GPRCRegClass);
MF.addLiveIn(GPR[GPR_idx], VReg);
ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i32);
++GPR_idx;
} else {
needsLoad = true;
ArgSize = PtrByteSize;
}
+ // Stack align in ELF
+ if (needsLoad && Expand && isELF_ABI && !isPPC64)
+ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize;
// All int arguments reserve stack space in Macho ABI.
if (isMachoABI || needsLoad) ArgOffset += PtrByteSize;
break;
case MVT::i64: // PPC64
@@ -1199,11 +1210,11 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
case MVT::f32:
case MVT::f64:
// Every 4 bytes of argument space consumes one of the GPRs available for
// argument passing.
- if (GPR_idx != Num_GPR_Regs) {
+ if (GPR_idx != Num_GPR_Regs && isMachoABI) {
++GPR_idx;
if (ObjSize == 8 && GPR_idx != Num_GPR_Regs && !isPPC64)
++GPR_idx;
}
if (FPR_idx != Num_FPR_Regs) {
@@ -1217,10 +1228,13 @@ static SDOperand LowerFORMAL_ARGUMENTS(S
++FPR_idx;
} else {
needsLoad = true;
}
+ // Stack align in ELF
+ if (needsLoad && Expand && isELF_ABI && !isPPC64)
+ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize;
// All FP arguments reserve stack space in Macho ABI.
if (isMachoABI || needsLoad) ArgOffset += isPPC64 ? 8 : ObjSize;
break;
case MVT::v4f32:
case MVT::v4i32:
@@ -1319,10 +1333,11 @@ static SDOperand LowerCALL(SDOperand Op,
bool isVarArg= cast(Op.getOperand(2))->getValue() != 0;
SDOperand Callee = Op.getOperand(4);
unsigned NumOps = (Op.getNumOperands() - 5) / 2;
bool isMachoABI = Subtarget.isMachoABI();
+ bool isELF_ABI = Subtarget.isELF_ABI();
MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
bool isPPC64 = PtrVT == MVT::i64;
unsigned PtrByteSize = isPPC64 ? 8 : 4;
@@ -1394,35 +1409,58 @@ static SDOperand LowerCALL(SDOperand Op,
std::vector > RegsToPass;
SmallVector MemOpChains;
for (unsigned i = 0; i != NumOps; ++i) {
bool inMem = false;
SDOperand Arg = Op.getOperand(5+2*i);
-
+unsigned Flags = cast(Op.getOperand(5+2*i+1))->getValue();
+// See if next argument requires stack alignment in ELF
+unsigned Expand = (Arg.getValueType() == MVT::f64) ||
+ ((i + 1 < NumOps) &&
+ (cast(Op.getOperand(5+2*(i+1)+1))->getValue()
+& (1 << 27)) &&
+ (!(Flags & (1 << 27;
+
// PtrOff will be used to store the current argument to the stack if a
// register cannot be found for it.
-SDOperand PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType());
+SDOperand PtrOff;
+
+// Stack align in ELF
+if (isELF_ABI && Expand && !isPPC64)
+PtrOff = DAG.getConstant(ArgOffset + ((ArgOffset/4) % 2) * PtrByteSize,
+StackPtr.getValueType());
+else
+PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType());
+
PtrOff
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Changes in directory llvm/lib/Target/ARM:
ARMLoadStoreOptimizer.cpp updated: 1.1 -> 1.2
---
Log message:
Code clean up. Prepare to use register scavenger.
---
Diffs of the changes: (+37 -22)
ARMLoadStoreOptimizer.cpp | 59 --
1 files changed, 37 insertions(+), 22 deletions(-)
Index: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
diff -u llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.1
llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.2
--- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.1 Fri Jan 19 01:51:42 2007
+++ llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Mar 6 12:02:41 2007
@@ -23,7 +23,9 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
@@ -36,6 +38,8 @@
namespace {
struct VISIBILITY_HIDDEN ARMLoadStoreOpt : public MachineFunctionPass {
const TargetInstrInfo *TII;
+const MRegisterInfo *MRI;
+RegScavenger *RS;
virtual bool runOnMachineFunction(MachineFunction &Fn);
@@ -448,6 +452,25 @@
return true;
}
+/// isMemoryOp - Returns true if instruction is a memory operations (that this
+/// pass is capable of operating on).
+static bool isMemoryOp(MachineInstr *MI) {
+ int Opcode = MI->getOpcode();
+ switch (Opcode) {
+ default: break;
+ case ARM::LDR:
+ case ARM::STR:
+return MI->getOperand(1).isRegister() && MI->getOperand(2).getReg() == 0;
+ case ARM::FLDS:
+ case ARM::FSTS:
+return MI->getOperand(1).isRegister();
+ case ARM::FLDD:
+ case ARM::FSTD:
+return MI->getOperand(1).isRegister();
+ }
+ return false;
+}
+
/// LoadStoreMultipleOpti - An optimization pass to turn multiple LDR / STR
/// ops of the same base and incrementing offset into LDM / STM ops.
bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
@@ -458,34 +481,20 @@
int CurrOpc = -1;
unsigned CurrSize = 0;
unsigned Position = 0;
+
+ if (RS) RS->enterBasicBlock(&MBB);
MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
while (MBBI != E) {
bool Advance = false;
bool TryMerge = false;
bool Clobber = false;
-int Opcode = MBBI->getOpcode();
-bool isMemOp = false;
-bool isAM2 = false;
-unsigned Size = 4;
-switch (Opcode) {
-case ARM::LDR:
-case ARM::STR:
- isMemOp =
-(MBBI->getOperand(1).isRegister() && MBBI->getOperand(2).getReg() ==
0);
- isAM2 = true;
- break;
-case ARM::FLDS:
-case ARM::FSTS:
- isMemOp = MBBI->getOperand(1).isRegister();
- break;
-case ARM::FLDD:
-case ARM::FSTD:
- isMemOp = MBBI->getOperand(1).isRegister();
- Size = 8;
- break;
-}
+bool isMemOp = isMemoryOp(MBBI);
if (isMemOp) {
+ int Opcode = MBBI->getOpcode();
+ bool isAM2 = Opcode == ARM::LDR || Opcode == ARM::STR;
+ unsigned Size = getLSMultipleTransferSize(MBBI);
+
unsigned Base = MBBI->getOperand(1).getReg();
unsigned OffIdx = MBBI->getNumOperands()-1;
unsigned OffField = MBBI->getOperand(OffIdx).getImm();
@@ -616,7 +625,11 @@
}
bool ARMLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
- TII = Fn.getTarget().getInstrInfo();
+ const TargetMachine &TM = Fn.getTarget();
+ TII = TM.getInstrInfo();
+ MRI = TM.getRegisterInfo();
+ RS = MRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
+
bool Modified = false;
for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
++MFI) {
@@ -624,5 +637,7 @@
Modified |= LoadStoreMultipleOpti(MBB);
Modified |= MergeReturnIntoLDM(MBB);
}
+
+ delete RS;
return Modified;
}
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[llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h
Changes in directory llvm/include/llvm/Analysis:
LoopPass.h updated: 1.9 -> 1.10
---
Log message:
LPPassManager. Implement preparePassManager() hook.
---
Diffs of the changes: (+9 -1)
LoopPass.h | 10 +-
1 files changed, 9 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/Analysis/LoopPass.h
diff -u llvm/include/llvm/Analysis/LoopPass.h:1.9
llvm/include/llvm/Analysis/LoopPass.h:1.10
--- llvm/include/llvm/Analysis/LoopPass.h:1.9 Tue Mar 6 10:59:03 2007
+++ llvm/include/llvm/Analysis/LoopPass.h Tue Mar 6 11:59:37 2007
@@ -44,7 +44,15 @@
// Finalization hook does not supply Loop because at this time
// loop nest is completely different.
virtual bool doFinalization() { return false; }
-
+
+ // Check if this pass is suitable for the current LPPassManager, if
+ // available. This pass P is not suitable for a LPPassManager if P
+ // is not preserving higher level analysis info used by other
+ // LPPassManager passes. In such case, pop LPPassManager from the
+ // stack. This will force assignPassManager() to create new
+ // LPPassManger as expected.
+ void preparePassManager(PMStack &PMS);
+
/// Assign pass manager to manager this pass
virtual void assignPassManager(PMStack &PMS,
PassManagerType PMT = PMT_LoopPassManager);
___
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[llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp
Changes in directory llvm/lib/Analysis:
LoopPass.cpp updated: 1.11 -> 1.12
---
Log message:
LPPassManager. Implement preparePassManager() hook.
---
Diffs of the changes: (+25 -0)
LoopPass.cpp | 25 +
1 files changed, 25 insertions(+)
Index: llvm/lib/Analysis/LoopPass.cpp
diff -u llvm/lib/Analysis/LoopPass.cpp:1.11 llvm/lib/Analysis/LoopPass.cpp:1.12
--- llvm/lib/Analysis/LoopPass.cpp:1.11 Tue Mar 6 10:59:03 2007
+++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 11:59:37 2007
@@ -129,6 +129,31 @@
//===--===//
// LoopPass
+// Check if this pass is suitable for the current LPPassManager, if
+// available. This pass P is not suitable for a LPPassManager if P
+// is not preserving higher level analysis info used by other
+// LPPassManager passes. In such case, pop LPPassManager from the
+// stack. This will force assignPassManager() to create new
+// LPPassManger as expected.
+void LoopPass::preparePassManager(PMStack &PMS) {
+
+ // Find LPPassManager
+ while (!PMS.empty()) {
+if (PMS.top()->getPassManagerType() > PMT_LoopPassManager)
+ PMS.pop();
+else;
+break;
+ }
+
+ LPPassManager *LPPM = dynamic_cast(PMS.top());
+
+ // If this pass is destroying high level information that is used
+ // by other passes that are managed by LPM then do not insert
+ // this pass in current LPM. Use new LPPassManager.
+ if (LPPM && !LPPM->preserveHigherLevelAnalysis(this))
+PMS.pop();
+}
+
/// Assign pass manager to manage this pass.
void LoopPass::assignPassManager(PMStack &PMS,
PassManagerType PreferredType) {
___
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[llvm-commits] CVS: llvm/include/llvm/PassManagers.h
Changes in directory llvm/include/llvm: PassManagers.h updated: 1.13 -> 1.14 --- Log message: Keep track of higher level analysis. --- Diffs of the changes: (+9 -0) PassManagers.h |9 + 1 files changed, 9 insertions(+) Index: llvm/include/llvm/PassManagers.h diff -u llvm/include/llvm/PassManagers.h:1.13 llvm/include/llvm/PassManagers.h:1.14 --- llvm/include/llvm/PassManagers.h:1.13 Mon Mar 5 19:55:46 2007 +++ llvm/include/llvm/PassManagers.hTue Mar 6 11:52:53 2007 @@ -228,6 +228,11 @@ InheritedAnalysis[i] = NULL; } + // Return true if P preserves high level analysis used by other + // passes that are managed by this manager. + bool preserveHigherLevelAnalysis(Pass *P); + + /// Populate RequiredPasses with the analysis pass that are required by /// pass P. void collectRequiredAnalysisPasses(std::vector &RequiredPasses, @@ -298,6 +303,10 @@ // scheduled to run. std::map AvailableAnalysis; + // Collection of higher level analysis used by the pass managed by + // this manager. + std::vector HigherLevelAnalysis; + unsigned Depth; }; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore:
PassManager.cpp updated: 1.144 -> 1.145
---
Log message:
Keep track of higher level analysis.
---
Diffs of the changes: (+26 -0)
PassManager.cpp | 26 ++
1 files changed, 26 insertions(+)
Index: llvm/lib/VMCore/PassManager.cpp
diff -u llvm/lib/VMCore/PassManager.cpp:1.144
llvm/lib/VMCore/PassManager.cpp:1.145
--- llvm/lib/VMCore/PassManager.cpp:1.144 Mon Mar 5 19:55:46 2007
+++ llvm/lib/VMCore/PassManager.cpp Tue Mar 6 11:52:53 2007
@@ -532,6 +532,30 @@
}
}
+// Return true if P preserves high level analysis used by other
+// passes managed by this manager
+bool PMDataManager::preserveHigherLevelAnalysis(Pass *P) {
+
+ AnalysisUsage AnUsage;
+ P->getAnalysisUsage(AnUsage);
+
+ if (AnUsage.getPreservesAll())
+return true;
+
+ const std::vector &PreservedSet = AnUsage.getPreservedSet();
+ for (std::vector::iterator I = HigherLevelAnalysis.begin(),
+ E = HigherLevelAnalysis.end(); I != E; ++I) {
+Pass *P1 = *I;
+if (std::find(PreservedSet.begin(), PreservedSet.end(), P1->getPassInfo())
==
+PreservedSet.end()) {
+ if (!dynamic_cast(P1))
+return false;
+}
+ }
+
+ return true;
+}
+
/// Remove Analyss not preserved by Pass P
void PMDataManager::removeNotPreservedAnalysis(Pass *P) {
AnalysisUsage AnUsage;
@@ -634,6 +658,8 @@
else if (PDepth > RDepth) {
// Let the parent claim responsibility of last use
TransferLastUses.push_back(PRequired);
+// Keep track of higher level analysis used by this manager.
+HigherLevelAnalysis.push_back(PRequired);
} else {
// Note : This feature is not yet implemented
assert (0 &&
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[llvm-commits] CVS: llvm/test/CFrontend/2007-03-05-DataLayout.c
Changes in directory llvm/test/CFrontend: 2007-03-05-DataLayout.c updated: 1.1 -> 1.2 --- Log message: Don't run lli in llvm-test. Instead just check that the datalayout string is the right length. --- Diffs of the changes: (+1 -1) 2007-03-05-DataLayout.c |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/test/CFrontend/2007-03-05-DataLayout.c diff -u llvm/test/CFrontend/2007-03-05-DataLayout.c:1.1 llvm/test/CFrontend/2007-03-05-DataLayout.c:1.2 --- llvm/test/CFrontend/2007-03-05-DataLayout.c:1.1 Mon Mar 5 21:00:17 2007 +++ llvm/test/CFrontend/2007-03-05-DataLayout.c Tue Mar 6 11:48:25 2007 @@ -1,5 +1,5 @@ // Testcase for PR1242 -// RUN: %llvmgcc -c %s -o %t && lli --force-interpreter=1 %t +// RUN: %llvmgcc -S %s -o - | grep datalayout | wc -c | grep 130 #include #define NDIM 3 #define BODY 01 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-stacker/lib/compiler/StackerCompiler.cpp
Changes in directory llvm-stacker/lib/compiler: StackerCompiler.cpp updated: 1.35 -> 1.36 --- Log message: Update for new ConstantInt interface, to prevent compiler warning. --- Diffs of the changes: (+1 -1) StackerCompiler.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-stacker/lib/compiler/StackerCompiler.cpp diff -u llvm-stacker/lib/compiler/StackerCompiler.cpp:1.35 llvm-stacker/lib/compiler/StackerCompiler.cpp:1.36 --- llvm-stacker/lib/compiler/StackerCompiler.cpp:1.35 Sun Feb 18 23:05:07 2007 +++ llvm-stacker/lib/compiler/StackerCompiler.cpp Tue Mar 6 11:46:45 2007 @@ -1092,7 +1092,7 @@ // bb->getInstList().push_back( negop ); // So we'll multiply by -1 (ugh) BinaryOperator* multop = BinaryOperator::create( Instruction::Mul, op1, -ConstantInt::get( Type::Int64Ty, -1 ) ); +ConstantInt::get( Type::Int64Ty, -1ULL ) ); bb->getInstList().push_back( multop ); push_value( bb, multop ); break; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr
Changes in directory llvm/test/CFrontend:
2003-08-17-DeadCodeShortCircuit.c.tr updated: 1.2 -> 1.3
---
Log message:
Fix this to put its output in the output directory.
---
Diffs of the changes: (+1 -1)
2003-08-17-DeadCodeShortCircuit.c.tr |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr
diff -u llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr:1.2
llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr:1.3
--- llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.tr:1.2Thu Nov
6 15:13:45 2003
+++ llvm/test/CFrontend/2003-08-17-DeadCodeShortCircuit.c.trTue Mar 6
11:44:43 2007
@@ -1,4 +1,4 @@
-// RUN: %llvmgcc -xc %s -c
+// RUN: %llvmgcc -xc %s -c -o %t.o
int test(_Bool pos, _Bool color) {
return 0;
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[llvm-commits] CVS: llvm/examples/Makefile
Changes in directory llvm/examples: Makefile updated: 1.9 -> 1.10 --- Log message: Revert last patch. The examples build now. --- Diffs of the changes: (+2 -2) Makefile |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/examples/Makefile diff -u llvm/examples/Makefile:1.9 llvm/examples/Makefile:1.10 --- llvm/examples/Makefile:1.9 Tue Mar 6 01:30:03 2007 +++ llvm/examples/Makefile Tue Mar 6 11:26:14 2007 @@ -10,10 +10,10 @@ include $(LEVEL)/Makefile.config -#PARALLEL_DIRS:= Fibonacci HowToUseJIT ModuleMaker BFtoLLVM +PARALLEL_DIRS:= Fibonacci HowToUseJIT ModuleMaker BFtoLLVM ifeq ($(HAVE_PTHREAD),1) -#PARALLEL_DIRS += ParallelJIT +PARALLEL_DIRS += ParallelJIT endif include $(LEVEL)/Makefile.common ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/examples/HowToUseJIT/HowToUseJIT.cpp
Changes in directory llvm/examples/HowToUseJIT: HowToUseJIT.cpp updated: 1.16 -> 1.17 --- Log message: Adjust for changes in GenericValue type. --- Diffs of the changes: (+1 -1) HowToUseJIT.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/examples/HowToUseJIT/HowToUseJIT.cpp diff -u llvm/examples/HowToUseJIT/HowToUseJIT.cpp:1.16 llvm/examples/HowToUseJIT/HowToUseJIT.cpp:1.17 --- llvm/examples/HowToUseJIT/HowToUseJIT.cpp:1.16 Tue Feb 13 00:06:26 2007 +++ llvm/examples/HowToUseJIT/HowToUseJIT.cpp Tue Mar 6 11:24:31 2007 @@ -107,6 +107,6 @@ GenericValue gv = EE->runFunction(FooF, noargs); // Import result of execution: - std::cout << "Result: " << gv.Int32Val << "\n"; + std::cout << "Result: " << gv.IntVal.toString(10) << "\n"; return 0; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/examples/ParallelJIT/ParallelJIT.cpp
Changes in directory llvm/examples/ParallelJIT: ParallelJIT.cpp updated: 1.10 -> 1.11 --- Log message: Adjust for changes in GenericValue type. --- Diffs of the changes: (+2 -2) ParallelJIT.cpp |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/examples/ParallelJIT/ParallelJIT.cpp diff -u llvm/examples/ParallelJIT/ParallelJIT.cpp:1.10 llvm/examples/ParallelJIT/ParallelJIT.cpp:1.11 --- llvm/examples/ParallelJIT/ParallelJIT.cpp:1.10 Fri Jan 19 16:45:50 2007 +++ llvm/examples/ParallelJIT/ParallelJIT.cpp Tue Mar 6 11:24:31 2007 @@ -221,12 +221,12 @@ // Call the `foo' function with no arguments: std::vector Args(1); - Args[0].Int32Val = p->value; + Args[0].IntVal = APInt(32, p->value); synchronize.block(); // wait until other threads are at this point GenericValue gv = p->EE->runFunction(p->F, Args); - return (void*) intptr_t(gv.Int32Val); + return (void*)(intptr_t)gv.IntVal.getZExtValue(); } int main() ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/examples/Fibonacci/fibonacci.cpp
Changes in directory llvm/examples/Fibonacci: fibonacci.cpp updated: 1.15 -> 1.16 --- Log message: Adjust for changes in GenericValue type. --- Diffs of the changes: (+2 -2) fibonacci.cpp |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/examples/Fibonacci/fibonacci.cpp diff -u llvm/examples/Fibonacci/fibonacci.cpp:1.15 llvm/examples/Fibonacci/fibonacci.cpp:1.16 --- llvm/examples/Fibonacci/fibonacci.cpp:1.15 Sun Jan 7 01:40:09 2007 +++ llvm/examples/Fibonacci/fibonacci.cpp Tue Mar 6 11:24:31 2007 @@ -112,10 +112,10 @@ // Call the Fibonacci function with argument n: std::vector Args(1); - Args[0].Int32Val = n; + Args[0].IntVal = APInt(32, n); GenericValue GV = EE->runFunction(FibF, Args); // import result of execution - std::cout << "Result: " << GV.Int32Val << "\n"; + std::cout << "Result: " << GV.IntVal.toString(10) << "\n"; return 0; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/examples/Makefile
On Mar 6, 2007, at 9:19 AM, Reid Spencer wrote: On Tue, 2007-03-06 at 01:30 -0600, Chris Lattner wrote: Changes in directory llvm/examples: Makefile updated: 1.8 -> 1.9 --- Log message: temporarily disable this until Reid has a chance to fix it. What's wrong with it? From: [EMAIL PROTECTED] Subject:[LLVMbugs] Build broke again Date: March 5, 2007 11:17:10 PM PST To: [EMAIL PROTECTED] I'm getting this: llvm[2]: Compiling fibonacci.cpp for Debug build /Users/wendling/llvm/llvm.src/examples/Fibonacci/fibonacci.cpp: In function 'int main(int, char**)': /Users/wendling/llvm/llvm.src/examples/Fibonacci/fibonacci.cpp:115: error: 'struct llvm::GenericValue' has no member named 'Int32Val' /Users/wendling/llvm/llvm.src/examples/Fibonacci/fibonacci.cpp:119: error: 'struct llvm::GenericValue' has no member named 'Int32Val' make[2]: *** [/Users/wendling/llvm/llvm.obj/examples/Fibonacci/Debug/ fibonacci.o] Error 1 make[1]: *** [Fibonacci/.makeall] Error 2 make: *** [all] Error 1 -bw _ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/examples/Makefile
On Tue, 2007-03-06 at 01:30 -0600, Chris Lattner wrote: > > Changes in directory llvm/examples: > > Makefile updated: 1.8 -> 1.9 > --- > Log message: > > temporarily disable this until Reid has a chance to fix it. What's wrong with it? > > > --- > Diffs of the changes: (+2 -2) > > Makefile |4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > > > Index: llvm/examples/Makefile > diff -u llvm/examples/Makefile:1.8 llvm/examples/Makefile:1.9 > --- llvm/examples/Makefile:1.8Thu Nov 30 18:37:14 2006 > +++ llvm/examples/MakefileTue Mar 6 01:30:03 2007 > @@ -10,10 +10,10 @@ > > include $(LEVEL)/Makefile.config > > -PARALLEL_DIRS:= Fibonacci HowToUseJIT ModuleMaker BFtoLLVM > +#PARALLEL_DIRS:= Fibonacci HowToUseJIT ModuleMaker BFtoLLVM > > ifeq ($(HAVE_PTHREAD),1) > -PARALLEL_DIRS += ParallelJIT > +#PARALLEL_DIRS += ParallelJIT > endif > > include $(LEVEL)/Makefile.common > > > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Analysis/LoopPass.h
Changes in directory llvm/include/llvm/Analysis:
LoopPass.h updated: 1.8 -> 1.9
---
Log message:
LPPassManager : Add initialization and finalizatino hooks.
---
Diffs of the changes: (+9 -0)
LoopPass.h |9 +
1 files changed, 9 insertions(+)
Index: llvm/include/llvm/Analysis/LoopPass.h
diff -u llvm/include/llvm/Analysis/LoopPass.h:1.8
llvm/include/llvm/Analysis/LoopPass.h:1.9
--- llvm/include/llvm/Analysis/LoopPass.h:1.8 Mon Mar 5 20:30:46 2007
+++ llvm/include/llvm/Analysis/LoopPass.h Tue Mar 6 10:59:03 2007
@@ -36,6 +36,15 @@
return false;
}
+ // Initialization and finalization hooks.
+ virtual bool doInitialization(Loop *L, LPPassManager &LPM) {
+return false;
+ }
+
+ // Finalization hook does not supply Loop because at this time
+ // loop nest is completely different.
+ virtual bool doFinalization() { return false; }
+
/// Assign pass manager to manager this pass
virtual void assignPassManager(PMStack &PMS,
PassManagerType PMT = PMT_LoopPassManager);
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[llvm-commits] CVS: llvm/lib/Analysis/LoopPass.cpp
Changes in directory llvm/lib/Analysis:
LoopPass.cpp updated: 1.10 -> 1.11
---
Log message:
LPPassManager : Add initialization and finalizatino hooks.
---
Diffs of the changes: (+20 -0)
LoopPass.cpp | 20
1 files changed, 20 insertions(+)
Index: llvm/lib/Analysis/LoopPass.cpp
diff -u llvm/lib/Analysis/LoopPass.cpp:1.10 llvm/lib/Analysis/LoopPass.cpp:1.11
--- llvm/lib/Analysis/LoopPass.cpp:1.10 Mon Mar 5 20:30:46 2007
+++ llvm/lib/Analysis/LoopPass.cpp Tue Mar 6 10:59:03 2007
@@ -57,6 +57,18 @@
for (LoopInfo::iterator I = LI.begin(), E = LI.end(); I != E; ++I)
addLoopIntoQueue(*I, LQ);
+ // Initialization
+ for (std::deque::const_iterator I = LQ.begin(), E = LQ.end();
+ I != E; ++I) {
+Loop *L = *I;
+for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) {
+ Pass *P = getContainedPass(Index);
+ LoopPass *LP = dynamic_cast(P);
+ if (LP)
+Changed |= LP->doInitialization(L, *this);
+}
+ }
+
// Walk Loops
while (!LQ.empty()) {
@@ -101,6 +113,14 @@
if (redoThisLoop)
LQ.push_back(L);
}
+
+ // Finalization
+ for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) {
+Pass *P = getContainedPass(Index);
+LoopPass *LP = dynamic_cast (P);
+if (LP)
+ Changed |= LP->doFinalization();
+ }
return Changed;
}
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[llvm-commits] llvm-gcc: better support for variable size struct fields
This patch applies on top of the previously posted patch
"llvm-gcc: use component_ref_field_offset in component references",
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070226/045399.html.
This fixes wrong handling of structs containing more than one
variable sized field. Two C testcases are attached. Consider
for example the struct from VarSizeInStruct1:
struct f { char w; char x[n]; char z[]; };
DecodeStructFields does the following: it creates a field for
w; it skips x; it doesn't skip z because it is the last field,
however it thinks it starts at byte offset 0 because it starts
at the variable offset n+1, and so pops w out of the struct
and replaces it with z, leading to the LLVM struct { [0 * i8] }.
This causes an assertion failure later on in EmitLV_COMPONENT_REF.
The other testcase is similar, and leads to a different assertion
failure.
I first prepared a minimal fix, but later noticed that the code for
handling variable sized struct fields was unnecessarily complicated
and came up with this more involved patch, which removes a bunch of
special casing. The existing code seems rather fixated on whether
TYPE_SIZE is constant or not, when what really matters is whether the
field starts at a constant offset. I simply skip over fields if and
only if they don't start at a constant offset, and let variable sized
fields be emitted and indexed like any others (no more ~0U field indices).
I remove the special casing for ~0U field indices everywhere in favour
of the generic code, for example in EmitLV_COMPONENT_REF. The only
place where something still needs to be done is in ConvertRecordCONSTRUCTOR,
but there too the code simplifies.
I see no additional failures in the regression test suite or in
MultiSource with these changes.
Enjoy!
Duncan.
Index: gcc.llvm.master/gcc/llvm-convert.cpp
===
--- gcc.llvm.master.orig/gcc/llvm-convert.cpp 2007-03-05 13:05:41.0 +0100
+++ gcc.llvm.master/gcc/llvm-convert.cpp 2007-03-05 14:55:33.0 +0100
@@ -4635,12 +4635,6 @@
assert(DECL_LLVM_SET_P(FieldDecl) && "Struct not laid out for LLVM?");
ConstantInt *CI = cast(DECL_LLVM(FieldDecl));
uint32_t MemberIndex = CI->getZExtValue();
-if (MemberIndex == ~0U) {
- assert(isStructWithVarSizeArrayAtEnd(StructTy) &&
- "Isn't var sized array access!");
- CI = ConstantInt::get(Type::Int32Ty, StructTy->getNumContainedTypes()-1);
- MemberIndex = CI->getZExtValue();
-}
assert(MemberIndex < StructTy->getNumContainedTypes() &&
"Field Idx out of range!");
FieldPtr = new GetElementPtrInst(StructAddrLV.Ptr,
@@ -5451,35 +5445,32 @@
// If not, things are much simpler.
assert(DECL_LLVM_SET_P(Field) && "Struct not laid out for LLVM?");
unsigned FieldNo = cast(DECL_LLVM(Field))->getZExtValue();
-
+ assert(FieldNo < ResultElts.size() && "Invalid struct field number!");
+
+ // Example: struct X { int A; char C[]; } x = { 4, "foo" };
+ assert(TYPE_SIZE(TREE_TYPE(Field)) ||
+ (FieldNo == ResultElts.size()-1 &&
+ isStructWithVarSizeArrayAtEnd(STy))
+ && "field with no size is not array at end of struct!");
+
// If this is an initialization of a global that ends with a variable
// sized array at its end, and the initializer has a non-zero number of
- // elements, we must handle this case now. In this case, FieldNo is ~0U
- // and Val contains the actual type for the array.
- if (FieldNo == ~0U) {
-// Handle: struct X { int A; char C[]; } x = { 4, "foo" };
-assert(isStructWithVarSizeArrayAtEnd(STy) &&
- "Struct doesn't end with variable sized array!");
-FieldNo = STy->getNumElements()-1;
-ResultElts[FieldNo] = Val;
- } else {
-assert(FieldNo < ResultElts.size() && "Invalid struct field number!");
-
-// Otherwise, we know that the initializer has to match the element type
-// of the LLVM structure field. If not, then there is something that is
-// not straight-forward going on. For example, we could be initializing
-// an unaligned integer field (e.g. due to attribute packed) with an
-// integer. The struct field will have type [4 x ubyte] instead of
-// "int" for example. If we ignored this, we would lay out the
-// initializer wrong.
-if (Val->getType() != STy->getElementType(FieldNo))
- Val = ConvertStructFieldInitializerToType(Val,
+ // elements, then Val contains the actual type for the array. Otherwise,
+ // we know that the initializer has to match the element type of the LLVM
+ // structure field. If not, then there is something that is not
+ // straight-forward going on. For example, we could be initializing an
+ // unaligned integer field (e.g. due to attribute packed) with an
+ // integer. The
[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.100 -> 1.101
---
Log message:
Minor interface change.
---
Diffs of the changes: (+3 -1)
MRegisterInfo.h |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.100
llvm/include/llvm/Target/MRegisterInfo.h:1.101
--- llvm/include/llvm/Target/MRegisterInfo.h:1.100 Tue Feb 27 18:57:39 2007
+++ llvm/include/llvm/Target/MRegisterInfo.hTue Mar 6 04:04:38 2007
@@ -433,7 +433,9 @@
/// processFunctionBeforeCalleeSavedScan - This method is called immediately
/// before PrologEpilogInserter scans the physical registers used to
determine
/// what callee saved registers should be spilled. This method is optional.
- virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const
{
+ virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
+RegScavenger *RS = NULL) const
{
+
}
/// processFunctionBeforeFrameFinalized - This method is called immediately
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp ARMRegisterInfo.h
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.79 -> 1.80
ARMRegisterInfo.h updated: 1.15 -> 1.16
---
Log message:
Scavenge a register using the register scavenger when needed.
---
Diffs of the changes: (+111 -14)
ARMRegisterInfo.cpp | 115
ARMRegisterInfo.h | 10 +---
2 files changed, 111 insertions(+), 14 deletions(-)
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.79
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.80
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.79Thu Mar 1 19:17:17 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Tue Mar 6 04:03:56 2007
@@ -85,11 +85,6 @@
: ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP),
TII(tii), STI(sti),
FramePtr(STI.useThumbBacktraces() ? ARM::R7 : ARM::R11) {
- RS = (EnableScavenging) ? new RegScavenger() : NULL;
-}
-
-ARMRegisterInfo::~ARMRegisterInfo() {
- delete RS;
}
bool ARMRegisterInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
@@ -329,6 +324,25 @@
}
bool
+ARMRegisterInfo::isReservedReg(const MachineFunction &MF, unsigned Reg) const {
+ switch (Reg) {
+ default: break;
+ case ARM::SP:
+ case ARM::PC:
+return true;
+ case ARM::R7:
+ case ARM::R11:
+if (FramePtr == Reg && (STI.isTargetDarwin() || hasFP(MF)))
+ return true;
+break;
+ case ARM::R9:
+return STI.isR9Reserved();
+ }
+
+ return false;
+}
+
+bool
ARMRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
const ARMFunctionInfo *AFI = MF.getInfo();
return EnableScavenging && !AFI->isThumbFunction();
@@ -918,15 +932,34 @@
// to form it with a series of ADDri's. Do this by taking 8-bit chunks
// out of 'Offset'.
unsigned ScratchReg = findScratchRegister(RS, &ARM::GPRRegClass, AFI);
-assert(ScratchReg && "Unable to find a free register!");
+if (ScratchReg == 0)
+ // No register is "free". Scavenge a register.
+ ScratchReg = RS->scavengeRegister(&ARM::GPRRegClass, II);
emitARMRegPlusImmediate(MBB, II, ScratchReg, FrameReg,
isSub ? -Offset : Offset, TII);
MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true);
}
}
-void ARMRegisterInfo::
-processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const {
+static unsigned estimateStackSize(MachineFunction &MF, MachineFrameInfo *MFI) {
+ const MachineFrameInfo *FFI = MF.getFrameInfo();
+ int Offset = 0;
+ for (int i = FFI->getObjectIndexBegin(); i != 0; ++i) {
+int FixedOff = -FFI->getObjectOffset(i);
+if (FixedOff > Offset) Offset = FixedOff;
+ }
+ for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {
+Offset += FFI->getObjectSize(i);
+unsigned Align = FFI->getObjectAlignment(i);
+// Adjust to alignment boundary
+Offset = (Offset+Align-1)/Align*Align;
+ }
+ return (unsigned)Offset;
+}
+
+void
+ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
+ RegScavenger *RS) const {
// This tells PEI to spill the FP as if it is any other callee-save register
// to take advantage the eliminateFrameIndex machinery. This also ensures it
// is spilled in the order specified by getCalleeSavedRegs() to make it
easier
@@ -1020,6 +1053,7 @@
}
}
+ bool ExtraCSSpill = false;
if (!CanEliminateFrame || hasFP(MF)) {
AFI->setHasStackFrame(true);
@@ -1032,6 +1066,7 @@
UnspilledCS1GPRs.erase(std::find(UnspilledCS1GPRs.begin(),
UnspilledCS1GPRs.end(),
(unsigned)ARM::LR));
ForceLRSpill = false;
+ ExtraCSSpill = true;
}
// Darwin ABI requires FP to point to the stack slot that contains the
@@ -1050,10 +1085,74 @@
unsigned Reg = UnspilledCS1GPRs.front();
MF.changePhyRegUsed(Reg, true);
AFI->setCSRegisterIsSpilled(Reg);
+if (!isReservedReg(MF, Reg))
+ ExtraCSSpill = true;
} else if (!UnspilledCS2GPRs.empty()) {
unsigned Reg = UnspilledCS2GPRs.front();
MF.changePhyRegUsed(Reg, true);
AFI->setCSRegisterIsSpilled(Reg);
+if (!isReservedReg(MF, Reg))
+ ExtraCSSpill = true;
+ }
+}
+
+// Estimate if we might need to scavenge a register at some point in order
+// to materialize a stack offset. If so, either spill one additiona
+// callee-saved register or reserve a special spill slot to facilitate
+// register scavenging.
+if (RS && !ExtraCSSpill && !AFI->isThumbFunction()) {
+ MachineFrameInfo *MFI = MF.getFrameInfo();
+ unsigned Size = estimateStackSize(MF, MFI);
+ unsigned Limit = (1 << 12) - 1;
+ for (MachineFunction::iterator BB = MF.begin(),E = MF.end();BB != E;
++BB)
+for (MachineBasicBlock::iterator I= BB->begin(); I != BB->end(); ++I) {
+ for (unsigned i = 0, e = I->getNumOpe
[llvm-commits] CVS: llvm/lib/CodeGen/PrologEpilogInserter.cpp
Changes in directory llvm/lib/CodeGen:
PrologEpilogInserter.cpp updated: 1.76 -> 1.77
---
Log message:
If target decides to create an emergency spill slot, make sure it's closest to
SP or frame pointer.
---
Diffs of the changes: (+56 -7)
PrologEpilogInserter.cpp | 63 +--
1 files changed, 56 insertions(+), 7 deletions(-)
Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.76
llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.77
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.76 Thu Mar 1 04:23:33 2007
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp Tue Mar 6 04:02:38 2007
@@ -39,6 +39,9 @@
/// frame indexes with appropriate references.
///
bool runOnMachineFunction(MachineFunction &Fn) {
+ const MRegisterInfo *MRI = Fn.getTarget().getRegisterInfo();
+ RS = MRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
+
// Get MachineModuleInfo so that we can track the construction of the
// frame.
if (MachineModuleInfo *MMI = getAnalysisToUpdate()) {
@@ -47,8 +50,7 @@
// Allow the target machine to make some adjustments to the function
// e.g. UsedPhysRegs before calculateCalleeSavedRegisters.
- Fn.getTarget().getRegisterInfo()
-->processFunctionBeforeCalleeSavedScan(Fn);
+ MRI->processFunctionBeforeCalleeSavedScan(Fn, RS);
// Scan the function for modified callee saved registers and insert spill
// code for any callee saved registers that are modified. Also calculate
@@ -78,10 +80,13 @@
//
replaceFrameIndices(Fn);
+ delete RS;
return true;
}
private:
+RegScavenger *RS;
+
// MinCSFrameIndex, MaxCSFrameIndex - Keeps the range of callee saved
// stack frame indexes.
unsigned MinCSFrameIndex, MaxCSFrameIndex;
@@ -363,11 +368,37 @@
}
}
+ // Make sure the special register scavenging spill slot is closest to the
+ // frame pointer if a frame pointer is required.
+ const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
+ if (RS && RegInfo->hasFP(Fn)) {
+int SFI = RS->getScavengingFrameIndex();
+if (SFI >= 0) {
+ // If stack grows down, we need to add size of find the lowest
+ // address of the object.
+ if (StackGrowsDown)
+Offset += FFI->getObjectSize(SFI);
+
+ unsigned Align = FFI->getObjectAlignment(SFI);
+ // Adjust to alignment boundary
+ Offset = (Offset+Align-1)/Align*Align;
+
+ if (StackGrowsDown) {
+FFI->setObjectOffset(SFI, -Offset);// Set the computed offset
+ } else {
+FFI->setObjectOffset(SFI, Offset);
+Offset += FFI->getObjectSize(SFI);
+ }
+}
+ }
+
// Then assign frame offsets to stack objects that are not used to spill
// callee saved registers.
for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {
if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
continue;
+if (RS && (int)i == RS->getScavengingFrameIndex())
+ continue;
// If stack grows down, we need to add size of find the lowest
// address of the object.
@@ -389,10 +420,32 @@
}
}
+ // Make sure the special register scavenging spill slot is closest to the
+ // stack pointer.
+ if (RS) {
+int SFI = RS->getScavengingFrameIndex();
+if (SFI >= 0) {
+ // If stack grows down, we need to add size of find the lowest
+ // address of the object.
+ if (StackGrowsDown)
+Offset += FFI->getObjectSize(SFI);
+
+ unsigned Align = FFI->getObjectAlignment(SFI);
+ // Adjust to alignment boundary
+ Offset = (Offset+Align-1)/Align*Align;
+
+ if (StackGrowsDown) {
+FFI->setObjectOffset(SFI, -Offset);// Set the computed offset
+ } else {
+FFI->setObjectOffset(SFI, Offset);
+Offset += FFI->getObjectSize(SFI);
+ }
+}
+ }
+
// Round up the size to a multiple of the alignment, but only if there are
// calls or alloca's in the function. This ensures that any calls to
// subroutines have their stack frames suitable aligned.
- const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
if (!RegInfo->targetHandlesStackFrameRounding() &&
(FFI->hasCalls() || FFI->hasVarSizedObjects())) {
// When we have no frame pointer, we reserve argument space for call sites
@@ -442,7 +495,6 @@
const TargetMachine &TM = Fn.getTarget();
assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
const MRegisterInfo &MRI = *TM.getRegisterInfo();
- RegScavenger *RS=MRI.requiresRegisterScavenging(Fn) ? new
RegScavenger():NULL;
for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
{
if (RS) RS->enterBasicBlock(BB);
@@ -458,7 +510,4 @@
if (RS) RS->forward(I);
}
}
-
- delete RS;
}
-
___
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp PPCRegisterInfo.h
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.115 -> 1.116
PPCRegisterInfo.h updated: 1.32 -> 1.33
---
Log message:
Minor interface change.
---
Diffs of the changes: (+4 -2)
PPCRegisterInfo.cpp |3 ++-
PPCRegisterInfo.h |3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.115
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.116
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.115 Tue Feb 27 18:19:26 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Tue Mar 6 04:05:14 2007
@@ -874,7 +874,8 @@
MFI->setStackSize(FrameSize);
}
-void PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF)
+void PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
+ RegScavenger *RS)
const {
// Save and clear the LR state.
PPCFunctionInfo *FI = MF.getInfo();
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.32
llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.33
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.32 Tue Feb 27 18:19:26 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h Tue Mar 6 04:05:14 2007
@@ -83,7 +83,8 @@
/// frame size.
void determineFrameLayout(MachineFunction &MF) const;
- void processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const;
+ void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
+RegScavenger *RS = NULL) const;
void emitPrologue(MachineFunction &MF) const;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
___
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[llvm-commits] CVS: llvm/lib/CodeGen/RegisterScavenging.cpp
Changes in directory llvm/lib/CodeGen:
RegisterScavenging.cpp updated: 1.10 -> 1.11
---
Log message:
Register scavenger is now capable of scavenging. It spills a register whose use
of furthest away to make it available.
---
Diffs of the changes: (+90 -2)
RegisterScavenging.cpp | 92 +++--
1 files changed, 90 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/RegisterScavenging.cpp
diff -u llvm/lib/CodeGen/RegisterScavenging.cpp:1.10
llvm/lib/CodeGen/RegisterScavenging.cpp:1.11
--- llvm/lib/CodeGen/RegisterScavenging.cpp:1.10Fri Mar 2 04:43:16 2007
+++ llvm/lib/CodeGen/RegisterScavenging.cpp Tue Mar 6 04:01:25 2007
@@ -28,7 +28,8 @@
void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
const MachineFunction &MF = *mbb->getParent();
const TargetMachine &TM = MF.getTarget();
- const MRegisterInfo *RegInfo = TM.getRegisterInfo();
+ TII = TM.getInstrInfo();
+ RegInfo = TM.getRegisterInfo();
assert((NumPhysRegs == 0 || NumPhysRegs == RegInfo->getNumRegs()) &&
"Target changed?");
@@ -65,6 +66,19 @@
Tracking = false;
}
+void RegScavenger::restoreScavengedReg() {
+ if (!ScavengedReg)
+return;
+
+ RegInfo->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
+ScavengingFrameIndex, ScavengedRC);
+ MachineBasicBlock::iterator II = prior(MBBI);
+ RegInfo->eliminateFrameIndex(II, this);
+ setUsed(ScavengedReg);
+ ScavengedReg = 0;
+ ScavengedRC = NULL;
+}
+
void RegScavenger::forward() {
// Move ptr forward.
if (!Tracking) {
@@ -76,6 +90,12 @@
}
MachineInstr *MI = MBBI;
+
+ // Reaching a terminator instruction. Restore a scavenged register (which
+ // must be life out.
+ if (TII->isTerminatorInstr(MI->getOpcode()))
+restoreScavengedReg();
+
// Process uses first.
BitVector ChangedRegs(NumPhysRegs);
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
@@ -85,7 +105,13 @@
unsigned Reg = MO.getReg();
if (Reg == 0)
continue;
-assert(isUsed(Reg));
+if (!isUsed(Reg)) {
+ // Register has been scavenged. Restore it!
+ if (Reg != ScavengedReg)
+assert(false);
+ else
+restoreScavengedReg();
+}
if (MO.isKill() && !isReserved(Reg))
ChangedRegs.set(Reg);
}
@@ -191,3 +217,65 @@
int Reg = RegStatesCopy.find_first();
return (Reg == -1) ? 0 : Reg;
}
+
+/// calcDistanceToUse - Calculate the distance to the first use of the
+/// specified register.
+static unsigned calcDistanceToUse(MachineBasicBlock *MBB,
+ MachineBasicBlock::iterator I, unsigned Reg)
{
+ unsigned Dist = 0;
+ I = next(I);
+ while (I != MBB->end()) {
+Dist++;
+if (I->findRegisterUseOperand(Reg))
+return Dist;
+I = next(I);
+ }
+ return Dist + 1;
+}
+
+unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
+MachineBasicBlock::iterator I) {
+ assert(ScavengingFrameIndex >= 0 &&
+ "Cannot scavenge a register without an emergency spill slot!");
+
+ // Mask off the registers which are not in the TargetRegisterClass.
+ BitVector Candidates(NumPhysRegs, false);
+ CreateRegClassMask(RC, Candidates);
+ Candidates ^= ReservedRegs; // Do not include reserved registers.
+
+ // Exclude all the registers being used by the instruction.
+ for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
+MachineOperand &MO = I->getOperand(i);
+if (MO.isReg())
+ Candidates.reset(MO.getReg());
+ }
+
+ // Find the register whose use is furtherest aaway.
+ unsigned SReg = 0;
+ unsigned MaxDist = 0;
+ int Reg = Candidates.find_first();
+ while (Reg != -1) {
+unsigned Dist = calcDistanceToUse(MBB, I, Reg);
+if (Dist >= MaxDist) {
+ MaxDist = Dist;
+ SReg = Reg;
+}
+Reg = Candidates.find_next(Reg);
+ }
+
+ if (ScavengedReg != 0) {
+// First restore previously scavenged register.
+RegInfo->loadRegFromStackSlot(*MBB, I, ScavengedReg,
+ ScavengingFrameIndex, ScavengedRC);
+MachineBasicBlock::iterator II = prior(I);
+RegInfo->eliminateFrameIndex(II, this);
+ }
+
+ RegInfo->storeRegToStackSlot(*MBB, I, SReg, ScavengingFrameIndex, RC);
+ MachineBasicBlock::iterator II = prior(I);
+ RegInfo->eliminateFrameIndex(II, this);
+ ScavengedReg = SReg;
+ ScavengedRC = RC;
+
+ return SReg;
+}
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/RegisterScavenging.h
Changes in directory llvm/include/llvm/CodeGen:
RegisterScavenging.h updated: 1.7 -> 1.8
---
Log message:
Register scavenger is now capable of scavenging. It spills a register whose use
of furthest away to make it available.
---
Diffs of the changes: (+39 -2)
RegisterScavenging.h | 41 +++--
1 files changed, 39 insertions(+), 2 deletions(-)
Index: llvm/include/llvm/CodeGen/RegisterScavenging.h
diff -u llvm/include/llvm/CodeGen/RegisterScavenging.h:1.7
llvm/include/llvm/CodeGen/RegisterScavenging.h:1.8
--- llvm/include/llvm/CodeGen/RegisterScavenging.h:1.7 Thu Mar 1 02:56:24 2007
+++ llvm/include/llvm/CodeGen/RegisterScavenging.h Tue Mar 6 04:00:43 2007
@@ -22,6 +22,8 @@
namespace llvm {
+class MRegisterInfo;
+class TargetInstrInfo;
class TargetRegisterClass;
class RegScavenger {
@@ -33,6 +35,18 @@
/// registers.
bool Tracking;
+ /// ScavengingFrameIndex - Special spill slot used for scavenging a register
+ /// post register allocation.
+ int ScavengingFrameIndex;
+
+ /// ScavengedReg - If none zero, the specific register is currently being
+ /// scavenged. That is, it is spilled to the special scavenging stack slot.
+ unsigned ScavengedReg;
+
+ /// ScavengedRC - Register class of the scavenged register.
+ ///
+ const TargetRegisterClass *ScavengedRC;
+
/// RegStates - The current state of all the physical registers immediately
/// before MBBI. One bit per physical register. If bit is set that means it's
/// available, unset means the register is currently being used.
@@ -40,10 +54,12 @@
public:
RegScavenger()
-: MBB(NULL), NumPhysRegs(0), Tracking(false) {};
+: MBB(NULL), NumPhysRegs(0), Tracking(false),
+ ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {};
RegScavenger(MachineBasicBlock *mbb)
-: MBB(mbb), NumPhysRegs(0), Tracking(false) {};
+: MBB(mbb), NumPhysRegs(0), Tracking(false),
+ ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {};
/// enterBasicBlock - Start tracking liveness from the begin of the specific
/// basic block.
@@ -88,7 +104,24 @@
unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
bool ExCalleeSaved = false) const;
+ /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter
of
+ /// ScavengingFrameIndex.
+ void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
+ int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
+
+ /// scavengeRegister - Make a register of the specific register class
+ /// available and do the appropriate bookkeeping. Returns the scavenged
+ /// register.
+ unsigned scavengeRegister(const TargetRegisterClass *RegClass,
+MachineBasicBlock::iterator I);
+ unsigned scavengeRegister(const TargetRegisterClass *RegClass) {
+return scavengeRegister(RegClass, MBBI);
+ }
+
private:
+ const MRegisterInfo *RegInfo;
+ const TargetInstrInfo *TII;
+
/// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
///
BitVector CalleeSavedRegs;
@@ -96,6 +129,10 @@
/// ReservedRegs - A bitvector of reserved registers.
///
BitVector ReservedRegs;
+
+ /// restoreScavengedReg - Restore scavenged by loading it back from the
+ /// emergency spill slot. Mark it used.
+ void restoreScavengedReg();
};
} // End llvm namespace
___
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[llvm-commits] CVS: llvm/lib/Target/TargetCallingConv.td
Changes in directory llvm/lib/Target:
TargetCallingConv.td updated: 1.3 -> 1.4
---
Log message:
Use new SDIselParamAttr enumeration. This removes "magick" constants
from formal attributes' flags processing.
---
Diffs of the changes: (+1 -1)
TargetCallingConv.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/TargetCallingConv.td
diff -u llvm/lib/Target/TargetCallingConv.td:1.3
llvm/lib/Target/TargetCallingConv.td:1.4
--- llvm/lib/Target/TargetCallingConv.td:1.3Tue Feb 27 23:29:33 2007
+++ llvm/lib/Target/TargetCallingConv.tdTue Mar 6 02:12:33 2007
@@ -38,7 +38,7 @@
/// CCIfInReg - If this argument is marked with the 'inreg' attribute, apply
/// the specified action.
-class CCIfInReg : CCIf<"ArgFlags & 2", A> {}
+class CCIfInReg : CCIf<"ArgFlags & SDISelParamFlags::InReg", A> {}
/// CCAssignToReg - This action matches if there is a register in the specified
___
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[llvm-commits] CVS: llvm/utils/TableGen/CallingConvEmitter.cpp
Changes in directory llvm/utils/TableGen:
CallingConvEmitter.cpp updated: 1.4 -> 1.5
---
Log message:
Use new SDIselParamAttr enumeration. This removes "magick" constants
from formal attributes' flags processing.
---
Diffs of the changes: (+2 -2)
CallingConvEmitter.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/utils/TableGen/CallingConvEmitter.cpp
diff -u llvm/utils/TableGen/CallingConvEmitter.cpp:1.4
llvm/utils/TableGen/CallingConvEmitter.cpp:1.5
--- llvm/utils/TableGen/CallingConvEmitter.cpp:1.4 Tue Feb 27 23:29:06 2007
+++ llvm/utils/TableGen/CallingConvEmitter.cpp Tue Mar 6 02:12:33 2007
@@ -123,8 +123,8 @@
} else if (Action->isSubClassOf("CCPromoteToType")) {
Record *DestTy = Action->getValueAsDef("DestTy");
O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy))
<<";\n";
- O << IndentStr << "LocInfo = (ArgFlags & 1) ? CCValAssign::SExt"
-<< " : CCValAssign::ZExt;\n";
+ O << IndentStr << "LocInfo = (ArgFlags & SDISelParamFlags::Signed) ? \n"
+<< IndentStr << IndentStr << "CCValAssign::SExt :
CCValAssign::ZExt;\n";
} else {
Action->dump();
throw "Unknown CCAction!";
___
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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.360 -> 1.361
---
Log message:
Use new SDIselParamAttr enumeration. This removes "magick" constants
from formal attributes' flags processing.
---
Diffs of the changes: (+8 -3)
X86ISelLowering.cpp | 11 ---
1 files changed, 8 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.360
llvm/lib/Target/X86/X86ISelLowering.cpp:1.361
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.360 Fri Mar 2 17:16:35 2007
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Mar 6 02:12:33 2007
@@ -29,6 +29,7 @@
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetOptions.h"
@@ -665,10 +666,12 @@
BytesToPopOnReturn = StackSize;// Callee pops everything..
BytesCallerReserves = 0;
} else {
-BytesToPopOnReturn = 0; // Callee pops hidden struct pointer.
+BytesToPopOnReturn = 0; // Callee pops nothing.
// If this is an sret function, the return should pop the hidden pointer.
-if (NumArgs && (cast(Op.getOperand(3))->getValue() & 4))
+if (NumArgs &&
+(cast(Op.getOperand(3))->getValue() &
+ SDISelParamFlags::StructReturn))
BytesToPopOnReturn = 4;
BytesCallerReserves = StackSize;
@@ -740,7 +743,9 @@
}
// If the first argument is an sret pointer, remember it.
- bool isSRet = NumOps
&&(cast(Op.getOperand(6))->getValue()&4);
+ bool isSRet = NumOps &&
+(cast(Op.getOperand(6))->getValue() &
+ SDISelParamFlags::StructReturn);
if (!MemOpChains.empty())
Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp
Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.17 -> 1.18 --- Log message: Use new SDIselParamAttr enumeration. This removes "magick" constants from formal attributes' flags processing. --- Diffs of the changes: (+2 -1) ARMISelLowering.cpp |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMISelLowering.cpp diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.17 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.18 --- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.17Fri Feb 23 14:32:57 2007 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp Tue Mar 6 02:12:33 2007 @@ -27,6 +27,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Target/TargetOptions.h" #include "llvm/ADT/VectorExtras.h" @@ -346,7 +347,7 @@ NeededGPRs = 0; StackPad = 0; GPRPad = 0; - unsigned align = (Flags >> 27); + unsigned align = (Flags >> SDISelParamFlags::OrigAlignmentOffs); GPRPad = NumGPRs % ((align + 3)/4); StackPad = StackOffset % align; unsigned firstGPR = NumGPRs + GPRPad; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
