[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.282 -> 1.283 --- Log message: Disable load width reduction xform of variant (zext (truncate load x)) for big endian targets until llvm-gcc build issue has been resolved. --- Diffs of the changes: (+3 -1) DAGCombiner.cpp |4 +++- 1 files changed, 3 insertions(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.282 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.283 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.282 Mon Mar 26 02:12:51 2007 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Mar 29 02:56:46 2007 @@ -2110,7 +2110,9 @@ // fold (zext (truncate (load x))) -> (zext (smaller load x)) // fold (zext (truncate (srl (load x), c))) -> (zext (small load (x+c/n))) - if (N0.getOpcode() == ISD::TRUNCATE) { + // FIXME: Temporarily disable this for big endian machines until llvm-gcc + // build issue has been resolved. + if (TLI.isLittleEndian() && N0.getOpcode() == ISD::TRUNCATE) { SDOperand NarrowLoad = ReduceLoadWidth(N0.Val); if (NarrowLoad.Val) { if (NarrowLoad.Val != N0.Val) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.62 -> 1.63 --- Log message: Add support for hidden visibility to darwin/arm. --- Diffs of the changes: (+4 -0) ARMAsmPrinter.cpp |4 1 files changed, 4 insertions(+) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.62 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.63 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.62 Tue Mar 20 03:11:30 2007 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Mar 29 02:49:34 2007 @@ -205,6 +205,10 @@ break; } + if (F->hasHiddenVisibility()) +if (const char *Directive = TAI->getHiddenDirective()) + O << Directive << CurrentFnName << "\n"; + if (AFI->isThumbFunction()) { EmitAlignment(1, F); O << "\t.code\t16\n"; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/MultiSource/Applications/JM/ldecod/image.c
Changes in directory llvm-test/MultiSource/Applications/JM/ldecod: image.c updated: 1.4 -> 1.5 --- Log message: Fix for BSD systems (JIT still fails though). --- Diffs of the changes: (+21 -2) image.c | 23 +-- 1 files changed, 21 insertions(+), 2 deletions(-) Index: llvm-test/MultiSource/Applications/JM/ldecod/image.c diff -u llvm-test/MultiSource/Applications/JM/ldecod/image.c:1.4 llvm-test/MultiSource/Applications/JM/ldecod/image.c:1.5 --- llvm-test/MultiSource/Applications/JM/ldecod/image.c:1.4Thu Feb 8 16:38:32 2007 +++ llvm-test/MultiSource/Applications/JM/ldecod/image.cThu Mar 29 01:21:07 2007 @@ -63,6 +63,10 @@ #include "vlc.h" +#if defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__APPLE__) +#include +#endif + #include "erc_api.h" extern objectBuffer_t *erc_object_list; extern ercVariables_t *erc_errorVar; @@ -82,6 +86,21 @@ OldSliceParams old_slice; +void ftime_hack(struct timeb *tp) +{ +#if defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__APPLE__) + struct timeval tv; + struct timezone tz; + gettimeofday(&tv, &tz); + tp->time = tv.tv_sec; + tp->millitm = tv.tv_usec / 1000; + tp->timezone = tz.tz_minuteswest; + tp->dstflag = tz.tz_dsttime; +#else + ftime(tp); +#endif +} + void MbAffPostProc() { imgpel temp[16][32]; @@ -1289,7 +1308,7 @@ #ifdef WIN32 _ftime (&(img->tstruct_start)); // start time ms #else -ftime (&(img->tstruct_start)); // start time ms +ftime_hack (&(img->tstruct_start)); // start time ms #endif time( &(img->ltime_start));// start time s } @@ -1513,7 +1532,7 @@ #ifdef WIN32 _ftime (&(img->tstruct_end)); // start time ms #else -ftime (&(img->tstruct_end)); // start time ms +ftime_hack (&(img->tstruct_end)); // start time ms #endif time( &(img->ltime_end));// start time s ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.707 -> 1.708 --- Log message: Clean up some codes in InstCombiner::SimplifyDemandedBits(). --- Diffs of the changes: (+6 -12) InstructionCombining.cpp | 18 ++ 1 files changed, 6 insertions(+), 12 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.707 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.708 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.707 Wed Mar 28 21:26:30 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Mar 28 23:45:55 2007 @@ -1135,10 +1135,9 @@ uint32_t SrcBitWidth = SrcTy->getBitWidth(); DemandedMask &= SrcTy->getMask().zext(BitWidth); -uint32_t zextBf = SrcTy->getBitWidth(); -DemandedMask.trunc(zextBf); -RHSKnownZero.trunc(zextBf); -RHSKnownOne.trunc(zextBf); +DemandedMask.trunc(SrcBitWidth); +RHSKnownZero.trunc(SrcBitWidth); +RHSKnownOne.trunc(SrcBitWidth); if (SimplifyDemandedBits(I->getOperand(0), DemandedMask, RHSKnownZero, RHSKnownOne, Depth+1)) return true; @@ -1168,10 +1167,9 @@ if ((NewBits & DemandedMask) != 0) InputDemandedBits |= InSignBit; -uint32_t sextBf = SrcTy->getBitWidth(); -InputDemandedBits.trunc(sextBf); -RHSKnownZero.trunc(sextBf); -RHSKnownOne.trunc(sextBf); +InputDemandedBits.trunc(SrcBitWidth); +RHSKnownZero.trunc(SrcBitWidth); +RHSKnownOne.trunc(SrcBitWidth); if (SimplifyDemandedBits(I->getOperand(0), InputDemandedBits, RHSKnownZero, RHSKnownOne, Depth+1)) return true; @@ -1193,10 +1191,6 @@ return UpdateValueUsesWith(I, NewCast); } else if (RHSKnownOne[SrcBitWidth-1]) {// Input sign bit known set RHSKnownOne |= NewBits; - RHSKnownZero &= ~NewBits; -} else { // Input sign bit unknown - RHSKnownZero &= ~NewBits; - RHSKnownOne &= ~NewBits; } break; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/index.html
Changes in directory llvm-www/pubs: index.html updated: 1.45 -> 1.46 --- Log message: link to new paper --- Diffs of the changes: (+10 -1) index.html | 11 ++- 1 files changed, 10 insertions(+), 1 deletion(-) Index: llvm-www/pubs/index.html diff -u llvm-www/pubs/index.html:1.45 llvm-www/pubs/index.html:1.46 --- llvm-www/pubs/index.html:1.45 Tue Mar 13 08:15:19 2007 +++ llvm-www/pubs/index.htmlWed Mar 28 22:27:53 2007 @@ -3,7 +3,16 @@ -"The LLVM Compiler System"Chris Lattner2007 Bossa Conference on Open Source, Mobile Internet and Multimedia, Recife, Brazil, March 2007. +"Making Context-Sensitive Points-to +Analysis with Heap Cloning Practical For The Real World" + Chris Lattner, Andrew Lenharth, and Vikram Adve. + Proc. of the 2007 ACM SIGPLAN Conference on Programming Language + Design and Implementation (PLDI'07), San Diego, CA, Jun, 2007. + +"The LLVM Compiler System" + Chris Lattner + 2007 Bossa Conference on Open Source, Mobile Internet and Multimedia, + Recife, Brazil, March 2007. "A Virtual Instruction Set Interface for Operating System Kernels"John Criswell, Brent Monroe, and Vikram Adve. Workshop on the Interaction between Operating Systems and Computer Architecture (WIOSCA '06), Boston, Massachusetts, 2006. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/2007-06-10-PLDI-DSA.html
Changes in directory llvm-www/pubs: 2007-06-10-PLDI-DSA.html added (r1.1) --- Log message: new paper --- Diffs of the changes: (+92 -0) 2007-06-10-PLDI-DSA.html | 92 +++ 1 files changed, 92 insertions(+) Index: llvm-www/pubs/2007-06-10-PLDI-DSA.html diff -c /dev/null llvm-www/pubs/2007-06-10-PLDI-DSA.html:1.1 *** /dev/null Wed Mar 28 22:26:07 2007 --- llvm-www/pubs/2007-06-10-PLDI-DSA.html Wed Mar 28 22:25:57 2007 *** *** 0 --- 1,92 + + + + + + Making Context-Sensitive Points-to Analysis with Heap Cloning + Practical For The Real World + + + + + Making Context-Sensitive Points-to Analysis with Heap Cloning + Practical For The Real World + + + http://www.nondot.org/sabre/";>Chris Lattner, + Andrew Lenharth, and + http://www.cs.uiuc.edu/~vadve";>Vikram Adve + + + Abstract: + + Context-sensitive pointer analysis algorithms with full "heap + cloning" are powerful but are widely considered to be too expensive + to include in production compilers. This paper shows, for the first + time, that a context-sensitive, field-sensitive algorithm with full + heap cloning (by acyclic call paths) can indeed be both scalable and + extremely fast in practice. Overall, the algorithm is able to analyze + programs in the range of 100K-200K lines of C code in 1-3 seconds, + takes less than 5% of the time it takes for GCC to compile the code + (which includes no whole-program + analysis), and scales well across five orders of magnitude of code + size. It is also able to analyze the Linux kernel (about 355K lines + of code) in 3.1 seconds. The paper describes the major algorithmic + and engineering design choices that are required to achieve these + results, including (a) using flow-insensitive and unification-based + analysis, which are essential to avoid exponential behavior in + practice; + (b) sacrificing context-sensitivity within strongly connected components + of the call graph; and + (c) carefully eliminating several kinds of O(N2) behaviors (largely + without affecting precision). + The techniques used for (b) and (c) eliminated several major bottlenecks + to scalability, and both are generalizable to + other context-sensitive algorithms. We show that the engineering + choices collectively reduce analysis time by factors of up to 3x-21x + in our ten largest programs, and that the savings grow strongly + with program size. + Finally, we briefly summarize results demonstrating the precision of the + analysis. + + + Published: + + "Making Context-Sensitive Points-to Analysis with Heap Cloning + Practical For The Real World" + Chris Lattner, Andrew Lenharth, and Vikram Adve. + Proc. of the 2007 ACM SIGPLAN Conference on Programming Language + Design and Implementation (PLDI'07), San Diego, CA, Jun, 2007. + + + Download: + Paper: + + Making Context-Sensitive Points-to +Analysis with Heap Cloning Practical For The Real World (PDF) + + + Slides: + not yet + + BibTeX Entry: + + @InProceedings{DSA:PLDI07, + author= {Chris Lattner and Vikram Adve}, + title = "{Making Context-Sensitive Points-to Analysis with Heap Cloning Practical For The Real World}", + booktitle = "{Proceedings of the 2007 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI'07)}", + address = {San Diego, California}, + month = {June}, + year = {2007} + } + + + + + http://jigsaw.w3.org/css-validator/check/referer";>http://jigsaw.w3.org/css-validator/images/vcss"; alt="Valid CSS!"> + http://validator.w3.org/check/referer";>http://www.w3.org/Icons/valid-html401"; alt="Valid HTML 4.01!" /> + + + ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/2007-06-10-PLDI-DSA.pdf
Changes in directory llvm-www/pubs: 2007-06-10-PLDI-DSA.pdf added (r1.1) --- Log message: new paper --- Diffs of the changes: (+0 -0) 2007-06-10-PLDI-DSA.pdf |0 1 files changed Index: llvm-www/pubs/2007-06-10-PLDI-DSA.pdf ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/README.txt
Changes in directory llvm/lib/CodeGen: README.txt updated: 1.2 -> 1.3 --- Log message: New entries. --- Diffs of the changes: (+21 -0) README.txt | 21 + 1 files changed, 21 insertions(+) Index: llvm/lib/CodeGen/README.txt diff -u llvm/lib/CodeGen/README.txt:1.2 llvm/lib/CodeGen/README.txt:1.3 --- llvm/lib/CodeGen/README.txt:1.2 Wed Mar 28 03:30:04 2007 +++ llvm/lib/CodeGen/README.txt Wed Mar 28 21:48:56 2007 @@ -65,3 +65,24 @@ 4. As stated in 3, not as simple as cloning in some cases. The target will have to decide how to remat it. For example, an ARM 2-piece constant generation instruction is remat'ed as a load from constantpool. + +//===-===// + +bb27 ... +... + %reg1037 = ADDri %reg1039, 1 + %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10 +Successors according to CFG: 0x8b03bf0 (#5) + +bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5): +Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4) + %reg1039 = PHI %reg1070, mbb, %reg1037, mbb + +Note ADDri is not a two-address instruction. However, its result %reg1037 is an +operand of the PHI node in bb76 and its operand %reg1039 is the result of the +PHI node. We should treat it as a two-address code and make sure the ADDri is +scheduled after any node that reads %reg1039. + +//===-===// + +Re-Materialize load from frame index. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.706 -> 1.707 --- Log message: Clean up codes in InstCombiner::SimplifyDemandedBits(): 1. Line out nested call of APInt::zext/trunc. 2. Make more use of APInt::getHighBitsSet/getLowBitsSet. 3. Use APInt[] operator instead of expression like "APIntVal & SignBit". --- Diffs of the changes: (+35 -32) InstructionCombining.cpp | 67 --- 1 files changed, 35 insertions(+), 32 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.706 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.707 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.706 Wed Mar 28 20:57:21 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Mar 28 21:26:30 2007 @@ -1106,8 +1106,11 @@ case Instruction::Trunc: { uint32_t truncBf = cast(I->getOperand(0)->getType())->getBitWidth(); -if (SimplifyDemandedBits(I->getOperand(0), DemandedMask.zext(truncBf), -RHSKnownZero.zext(truncBf), RHSKnownOne.zext(truncBf), Depth+1)) +DemandedMask.zext(truncBf); +RHSKnownZero.zext(truncBf); +RHSKnownOne.zext(truncBf); +if (SimplifyDemandedBits(I->getOperand(0), DemandedMask, + RHSKnownZero, RHSKnownOne, Depth+1)) return true; DemandedMask.trunc(BitWidth); RHSKnownZero.trunc(BitWidth); @@ -1130,12 +1133,14 @@ // Compute the bits in the result that are not present in the input. const IntegerType *SrcTy = cast(I->getOperand(0)->getType()); uint32_t SrcBitWidth = SrcTy->getBitWidth(); -APInt NewBits(APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth)); DemandedMask &= SrcTy->getMask().zext(BitWidth); uint32_t zextBf = SrcTy->getBitWidth(); -if (SimplifyDemandedBits(I->getOperand(0), DemandedMask.trunc(zextBf), - RHSKnownZero.trunc(zextBf), RHSKnownOne.trunc(zextBf), Depth+1)) +DemandedMask.trunc(zextBf); +RHSKnownZero.trunc(zextBf); +RHSKnownOne.trunc(zextBf); +if (SimplifyDemandedBits(I->getOperand(0), DemandedMask, + RHSKnownZero, RHSKnownOne, Depth+1)) return true; DemandedMask.zext(BitWidth); RHSKnownZero.zext(BitWidth); @@ -1143,29 +1148,32 @@ assert((RHSKnownZero & RHSKnownOne) == 0 && "Bits known to be one AND zero?"); // The top bits are known to be zero. -RHSKnownZero |= NewBits; +RHSKnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth); break; } case Instruction::SExt: { // Compute the bits in the result that are not present in the input. const IntegerType *SrcTy = cast(I->getOperand(0)->getType()); uint32_t SrcBitWidth = SrcTy->getBitWidth(); -APInt NewBits(APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth)); // Get the sign bit for the source type -APInt InSignBit(APInt::getSignBit(SrcTy->getPrimitiveSizeInBits())); +APInt InSignBit(APInt::getSignBit(SrcBitWidth)); InSignBit.zext(BitWidth); APInt InputDemandedBits = DemandedMask & - SrcTy->getMask().zext(BitWidth); + APInt::getLowBitsSet(BitWidth, SrcBitWidth); +APInt NewBits(APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth)); // If any of the sign extended bits are demanded, we know that the sign // bit is demanded. if ((NewBits & DemandedMask) != 0) InputDemandedBits |= InSignBit; uint32_t sextBf = SrcTy->getBitWidth(); -if (SimplifyDemandedBits(I->getOperand(0), InputDemandedBits.trunc(sextBf), - RHSKnownZero.trunc(sextBf), RHSKnownOne.trunc(sextBf), Depth+1)) +InputDemandedBits.trunc(sextBf); +RHSKnownZero.trunc(sextBf); +RHSKnownOne.trunc(sextBf); +if (SimplifyDemandedBits(I->getOperand(0), InputDemandedBits, + RHSKnownZero, RHSKnownOne, Depth+1)) return true; InputDemandedBits.zext(BitWidth); RHSKnownZero.zext(BitWidth); @@ -1178,12 +1186,12 @@ // If the input sign bit is known zero, or if the NewBits are not demanded // convert this into a zero extension. -if ((RHSKnownZero & InSignBit) != 0 || (NewBits & ~DemandedMask) == NewBits) +if (RHSKnownZero[SrcBitWidth-1] || (NewBits & ~DemandedMask) == NewBits) { // Convert to ZExt cast CastInst *NewCast = new ZExtInst(I->getOperand(0), VTy, I->getName(), I); return UpdateValueUsesWith(I, NewCast); -} else if ((RHSKnownOne & InSignBit) != 0) {// Input sign bit known set +} else if (RHSKnownOne[SrcBitWidth-1]) {// Input sign bit known set RHSKnownOne |= NewBits; RHSKnownZero &= ~NewBits; } else { // Input sign bit unknown @@ -1208,7 +1216,7 @@ // If the top bit of the output is demanded, demand everything
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.705 -> 1.706 --- Log message: 1. Make the APInt variable do the binary operation stuff if possible instead of using ConstantExpr::getXX. 2. Use constant reference to APInt if possible instead of expensive APInt copy. --- Diffs of the changes: (+5 -3) InstructionCombining.cpp |8 +--- 1 files changed, 5 insertions(+), 3 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.705 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.706 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.705 Wed Mar 28 12:38:21 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Mar 28 20:57:21 2007 @@ -540,8 +540,10 @@ if (I->getOpcode() == Instruction::Shl) if ((CST = dyn_cast(I->getOperand(1 { // The multiplier is really 1 << CST. - Constant *One = ConstantInt::get(V->getType(), 1); - CST = cast(ConstantExpr::getShl(One, CST)); + uint32_t BitWidth = cast(V->getType())->getBitWidth(); + uint32_t CSTVal = CST->getValue().getActiveBits() > 64 ? + BitWidth : CST->getZExtValue(); + CST = ConstantInt::get(APInt(BitWidth, 1).shl(CSTVal)); return I->getOperand(0); } } @@ -2264,7 +2266,7 @@ if (CI->isAllOnesValue()) // X * -1 == 0 - X return BinaryOperator::createNeg(Op0, I.getName()); - APInt Val(cast(CI)->getValue()); + const APInt& Val = cast(CI)->getValue(); if (Val.isPowerOf2()) { // Replace X*(2^C) with X << C return BinaryOperator::createShl(Op0, ConstantInt::get(Op0->getType(), Val.logBase2())); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/MultiSource/Applications/SPASS/stringsx.h dfgparser.c flags.c options.c strings.c symbol.h top.c strings.h
Changes in directory llvm-test/MultiSource/Applications/SPASS: stringsx.h added (r1.1) dfgparser.c updated: 1.1 -> 1.2 flags.c updated: 1.1 -> 1.2 options.c updated: 1.1 -> 1.2 strings.c updated: 1.1 -> 1.2 symbol.h updated: 1.1 -> 1.2 top.c updated: 1.1 -> 1.2 strings.h (r1.1) removed --- Log message: The header file strings.h was overriding the POSIX-defined header file strings.h supplied by FreeBSD. Fixed by renaming it. --- Diffs of the changes: (+108 -20) dfgparser.c |2 - flags.c |8 ++--- options.c |6 ++-- strings.c |8 ++--- stringsx.h | 88 symbol.h|8 ++--- top.c |8 ++--- 7 files changed, 108 insertions(+), 20 deletions(-) Index: llvm-test/MultiSource/Applications/SPASS/stringsx.h diff -c /dev/null llvm-test/MultiSource/Applications/SPASS/stringsx.h:1.1 *** /dev/null Wed Mar 28 19:24:50 2007 --- llvm-test/MultiSource/Applications/SPASS/stringsx.h Wed Mar 28 19:24:40 2007 *** *** 0 --- 1,88 + /**/ + /* ** */ + /* ** */ + /* *STRING HANDLING * */ + /* ** */ + /* * $Module: STRINGS* */ + /* ** */ + /* * Copyright (C) 1999, 2000, 2001 MPI fuer Informatik* */ + /* ** */ + /* * This program is free software; you can redistribute * */ + /* * it and/or modify it under the terms of the GNU* */ + /* * General Public License as published by the Free * */ + /* * Software Foundation; either version 2 of the License, * */ + /* * or (at your option) any later version.* */ + /* ** */ + /* * This program is distributed in the hope that it will * */ + /* * be useful, but WITHOUT ANY WARRANTY; without even * */ + /* * the implied warranty of MERCHANTABILITY or FITNESS* */ + /* * FOR A PARTICULAR PURPOSE. See the GNU General Public * */ + /* * License for more details. * */ + /* ** */ + /* * You should have received a copy of the GNU General* */ + /* * Public License along with this program; if not, write * */ + /* * to the Free Software Foundation, Inc., 59 Temple * */ + /* * Place, Suite 330, Boston, MA 02111-1307 USA * */ + /* ** */ + /* ** */ + /* $Revision: 1.1 $* */ + /* $State: Exp $* */ + /* $Date: 2007/03/29 00:24:40 $ * */ + /* $Author: jeffc $ * */ + /* ** */ + /* * Contact: * */ + /* * Christoph Weidenbach * */ + /* * MPI fuer Informatik* */ + /* * Stuhlsatzenhausweg 85 * */ + /* * 66123 Saarbruecken * */ + /* * Email: [EMAIL PROTECTED] * */ + /* * Germany* */ + /* ** */ + /* ** */ + /**/ + + + /* $RCSfile: stringsx.h,v $ */ + + #ifndef _STRINGS_ + #define _STRINGS_ + + /**/ + /* Includes */ + /**/ + + #include + #include "memory.h" + + + /**/ + /* Functions */ + /**/ + + #ifdef __cplusplus + extern "C" { + #endif + + static __inline__ BOOL string_Equal(const char* S1, const char* S2) + { + return strcmp(S1, S2) == 0; + } + + + BOOL string_StringIsNumber(const char*); + char* string_StringCopy(const char*); + void string_StringFree(char*); + char* string_IntToString(int); + BOOL string_StringToInt(const char*, BOOL, int*); + char* string_Conc(const char*, const char*); + char* string_Nconc(char*, char*); + char* string_EmptyString(void); + char* string_Prefix(const char*, int); + char* string_Suffix(const char*, int); + char** string_Tokens(c
[llvm-commits] CVS: llvm/lib/Target/CBackend/CBackend.cpp
Changes in directory llvm/lib/Target/CBackend: CBackend.cpp updated: 1.329 -> 1.330 --- Log message: Fix C Backend to generate code that works with Microsoft C for the benefit of front ends that do not depend on the GCC runtime (someday...). --- Diffs of the changes: (+4 -1) CBackend.cpp |5 - 1 files changed, 4 insertions(+), 1 deletion(-) Index: llvm/lib/Target/CBackend/CBackend.cpp diff -u llvm/lib/Target/CBackend/CBackend.cpp:1.329 llvm/lib/Target/CBackend/CBackend.cpp:1.330 --- llvm/lib/Target/CBackend/CBackend.cpp:1.329 Sat Mar 3 10:33:33 2007 +++ llvm/lib/Target/CBackend/CBackend.cpp Wed Mar 28 18:08:37 2007 @@ -1293,7 +1293,10 @@ << "#define alloca(x) __builtin_alloca(x)\n" << "#elif defined(__FreeBSD__) || defined(__OpenBSD__)\n" << "#define alloca(x) __builtin_alloca(x)\n" - << "#elif !defined(_MSC_VER)\n" + << "#elif defined(_MSC_VER)\n" + << "#define inline\n" + << "#define alloca(x) _alloca(x)\n" + << "#else\n" << "#include \n" << "#endif\n\n"; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/README.txt
Changes in directory llvm/lib/Target/X86: README.txt updated: 1.159 -> 1.160 --- Log message: add a note --- Diffs of the changes: (+8 -0) README.txt |8 1 files changed, 8 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.159 llvm/lib/Target/X86/README.txt:1.160 --- llvm/lib/Target/X86/README.txt:1.159Wed Mar 21 16:16:39 2007 +++ llvm/lib/Target/X86/README.txt Wed Mar 28 13:17:19 2007 @@ -23,6 +23,14 @@ //===-===// +CodeGen/X86/lea-3.ll:test3 should be a single LEA, not a shift/move. The X86 +backend knows how to three-addressify this shift, but it appears the register +allocator isn't even asking it to do so in this case. We should investigate +why this isn't happening, it could have significant impact on other important +cases for X86 as well. + +//===-===// + This should be one DIV/IDIV instruction, not a libcall: unsigned test(unsigned long long X, unsigned Y) { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.cpp
Changes in directory llvm/lib/Target/X86: X86InstrInfo.cpp updated: 1.80 -> 1.81 --- Log message: Compile CodeGen/X86/lea-3.ll:test2 to: _test3: leaq (,%rdi,4), %rax orq %rdi, %rax ret instead of: _test2: movq %rdi, %rax shlq $2, %rax orq %rdi, %rax ret --- Diffs of the changes: (+13 -0) X86InstrInfo.cpp | 13 + 1 files changed, 13 insertions(+) Index: llvm/lib/Target/X86/X86InstrInfo.cpp diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.80 llvm/lib/Target/X86/X86InstrInfo.cpp:1.81 --- llvm/lib/Target/X86/X86InstrInfo.cpp:1.80 Tue Mar 27 19:58:40 2007 +++ llvm/lib/Target/X86/X86InstrInfo.cppWed Mar 28 13:12:31 2007 @@ -149,6 +149,19 @@ NewMI = BuildMI(get(X86::PSHUFDri), A).addReg(B).addImm(M); break; } + case X86::SHL64ri: { +assert(MI->getNumOperands() == 3 && "Unknown shift instruction!"); +// NOTE: LEA doesn't produce flags like shift does, but LLVM never uses +// the flags produced by a shift yet, so this is safe. +unsigned Dest = MI->getOperand(0).getReg(); +unsigned Src = MI->getOperand(1).getReg(); +unsigned ShAmt = MI->getOperand(2).getImm(); +if (ShAmt == 0 || ShAmt >= 4) return 0; + +NewMI = BuildMI(get(X86::LEA64r), Dest) + .addReg(0).addImm(1 << ShAmt).addReg(Src).addImm(0); +break; + } case X86::SHL32ri: { assert(MI->getNumOperands() == 3 && "Unknown shift instruction!"); // NOTE: LEA doesn't produce flags like shift does, but LLVM never uses ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/X86/lea-3.ll
Changes in directory llvm/test/CodeGen/X86: lea-3.ll updated: 1.1 -> 1.2 --- Log message: new testcases --- Diffs of the changes: (+14 -1) lea-3.ll | 15 ++- 1 files changed, 14 insertions(+), 1 deletion(-) Index: llvm/test/CodeGen/X86/lea-3.ll diff -u llvm/test/CodeGen/X86/lea-3.ll:1.1 llvm/test/CodeGen/X86/lea-3.ll:1.2 --- llvm/test/CodeGen/X86/lea-3.ll:1.1 Wed Mar 28 13:03:14 2007 +++ llvm/test/CodeGen/X86/lea-3.ll Wed Mar 28 13:11:17 2007 @@ -1,7 +1,20 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep 'leal (%rdi,%rdi,2), %eax' +; RUN: llvm-as < %s | llc -march=x86-64 | grep 'leal (%rdi,%rdi,2), %eax' && define i32 @test(i32 %a) { %tmp2 = mul i32 %a, 3 ; [#uses=1] ret i32 %tmp2 } +; RUN: llvm-as < %s | llc -march=x86-64 | grep 'leaq (,%rdi,4), %rax' +define i64 @test2(i64 %a) { +%tmp2 = shl i64 %a, 2 + %tmp3 = or i64 %tmp2, %a +ret i64 %tmp3 +} + +;; TODO! LEA instead of shift + copy. +define i64 @test3(i64 %a) { +%tmp2 = shl i64 %a, 3 +ret i64 %tmp2 +} + ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/docs/GettingStartedVS.html
Changes in directory llvm/docs: GettingStartedVS.html updated: 1.8 -> 1.9 --- Log message: Update to current situation. --- Diffs of the changes: (+13 -3) GettingStartedVS.html | 16 +--- 1 files changed, 13 insertions(+), 3 deletions(-) Index: llvm/docs/GettingStartedVS.html diff -u llvm/docs/GettingStartedVS.html:1.8 llvm/docs/GettingStartedVS.html:1.9 --- llvm/docs/GettingStartedVS.html:1.8 Fri Feb 9 09:59:08 2007 +++ llvm/docs/GettingStartedVS.html Wed Mar 28 15:27:51 2007 @@ -258,7 +258,7 @@ Next, compile the C file into a LLVM bytecode file: - % llvm-gcc hello.c -emit-llvm -o hello.bc + % llvm-gcc -c hello.c -emit-llvm -o hello.bc This will create the result file hello.bc which is the LLVM bytecode that corresponds the the compiled program and the library @@ -267,12 +267,17 @@ optimize or analyze it further with the opt tool, etc. Note: while you cannot do this step on Windows, you can do it on a -Unix system and transfer hello.bc to Windows. +Unix system and transfer hello.bc to Windows. Important: +transfer as a binary file! Run the program using the just-in-time compiler: % lli hello.bc + Note: this will only work for trivial C programs. Non-trivial programs +(and any C++ program) will have dependencies on the GCC runtime that +won't be satisfied by the Microsoft runtime libraries. + Use the llvm-dis utility to take a look at the LLVM assembly code: @@ -286,6 +291,11 @@ % cl hello.cbe.c + Note: this will only work for trivial C programs. Non-trivial programs +(and any C++ program) will have dependencies on the GCC runtime that +won't be satisfied by the Microsoft runtime libraries. Currently, it +doesn't even work for trivial C programs such as the one above. + Execute the native code program: % hello.cbe.exe @@ -342,7 +352,7 @@ mailto:[EMAIL PROTECTED]">Jeff Cohen http://llvm.org";>The LLVM Compiler Infrastructure - Last modified: $Date: 2007/02/09 15:59:08 $ + Last modified: $Date: 2007/03/28 20:27:51 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/README-SSE.txt
Changes in directory llvm/lib/Target/X86: README-SSE.txt updated: 1.16 -> 1.17 --- Log message: Made this into a bug report: PR1286: http://llvm.org/PR1286 --- Diffs of the changes: (+0 -40) README-SSE.txt | 40 1 files changed, 40 deletions(-) Index: llvm/lib/Target/X86/README-SSE.txt diff -u llvm/lib/Target/X86/README-SSE.txt:1.16 llvm/lib/Target/X86/README-SSE.txt:1.17 --- llvm/lib/Target/X86/README-SSE.txt:1.16 Thu Mar 22 13:42:45 2007 +++ llvm/lib/Target/X86/README-SSE.txt Wed Mar 28 14:07:34 2007 @@ -572,43 +572,3 @@ ret //===-===// - -We should compile this: - -#include - -void foo(__m128i *A, __m128i *B) { - *A = _mm_sll_epi16 (*A, *B); -} - -to: - -_foo: - subl$12, %esp - movl16(%esp), %edx - movl20(%esp), %eax - movdqa (%edx), %xmm1 - movdqa (%eax), %xmm0 - psllw %xmm0, %xmm1 - movdqa %xmm1, (%edx) - addl$12, %esp - ret - -not: - -_foo: - movl 8(%esp), %eax - movdqa (%eax), %xmm0 - #IMPLICIT_DEF %eax - pinsrw $2, %eax, %xmm0 - xorl %ecx, %ecx - pinsrw $3, %ecx, %xmm0 - pinsrw $4, %eax, %xmm0 - pinsrw $5, %ecx, %xmm0 - pinsrw $6, %eax, %xmm0 - pinsrw $7, %ecx, %xmm0 - movl 4(%esp), %eax - movdqa (%eax), %xmm1 - psllw %xmm0, %xmm1 - movdqa %xmm1, (%eax) - ret ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/X86: X86ISelDAGToDAG.cpp updated: 1.147 -> 1.148 --- Log message: Oops :) --- Diffs of the changes: (+1 -1) X86ISelDAGToDAG.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.147 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.148 --- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.147 Wed Mar 28 13:36:33 2007 +++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Mar 28 13:38:33 2007 @@ -141,7 +141,7 @@ SDNode *Select(SDOperand N); bool MatchAddress(SDOperand N, X86ISelAddressMode &AM, - bool isRoot = true,unsigned Depth = 0); + bool isRoot = true, unsigned Depth = 0); bool SelectAddr(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Scale, SDOperand &Index, SDOperand &Disp); bool SelectLEAAddr(SDOperand Op, SDOperand N, SDOperand &Base, ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/X86: X86ISelDAGToDAG.cpp updated: 1.146 -> 1.147 --- Log message: Don't allow MatchAddress recurse too much. This trims exponential behaviour in some cases. --- Diffs of the changes: (+14 -6) X86ISelDAGToDAG.cpp | 20 ++-- 1 files changed, 14 insertions(+), 6 deletions(-) Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.146 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.147 --- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.146 Tue Mar 20 01:08:29 2007 +++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Mar 28 13:36:33 2007 @@ -140,7 +140,8 @@ private: SDNode *Select(SDOperand N); -bool MatchAddress(SDOperand N, X86ISelAddressMode &AM, bool isRoot = true); +bool MatchAddress(SDOperand N, X86ISelAddressMode &AM, + bool isRoot = true,unsigned Depth = 0); bool SelectAddr(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Scale, SDOperand &Index, SDOperand &Disp); bool SelectLEAAddr(SDOperand Op, SDOperand N, SDOperand &Base, @@ -561,7 +562,14 @@ /// returning true if it cannot be done. This just pattern matches for the /// addressing mode bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM, - bool isRoot) { + bool isRoot, unsigned Depth) { + if (Depth > 5) { +// Default, generate it as a register. +AM.BaseType = X86ISelAddressMode::RegBase; +AM.Base.Reg = N; +return false; + } + // RIP relative addressing: %rip + 32-bit displacement! if (AM.isRIPRel) { if (!AM.ES && AM.JT != -1 && N.getOpcode() == ISD::Constant) { @@ -711,12 +719,12 @@ case ISD::ADD: if (!Available) { X86ISelAddressMode Backup = AM; - if (!MatchAddress(N.Val->getOperand(0), AM, false) && - !MatchAddress(N.Val->getOperand(1), AM, false)) + if (!MatchAddress(N.Val->getOperand(0), AM, false, Depth+1) && + !MatchAddress(N.Val->getOperand(1), AM, false, Depth+1)) return false; AM = Backup; - if (!MatchAddress(N.Val->getOperand(1), AM, false) && - !MatchAddress(N.Val->getOperand(0), AM, false)) + if (!MatchAddress(N.Val->getOperand(1), AM, false, Depth+1) && + !MatchAddress(N.Val->getOperand(0), AM, false, Depth+1)) return false; AM = Backup; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/docs/ProgrammersManual.html
Changes in directory llvm/docs: ProgrammersManual.html updated: 1.129 -> 1.130 --- Log message: Stop using the foo HTML tag :) --- Diffs of the changes: (+3 -3) ProgrammersManual.html |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/docs/ProgrammersManual.html diff -u llvm/docs/ProgrammersManual.html:1.129 llvm/docs/ProgrammersManual.html:1.130 --- llvm/docs/ProgrammersManual.html:1.129 Thu Mar 1 19:31:31 2007 +++ llvm/docs/ProgrammersManual.htmlWed Mar 28 13:27:57 2007 @@ -803,7 +803,7 @@ for ( ... ) { - std::vector V; + std::vectorV; use V; } @@ -813,7 +813,7 @@ -std::vector V; +std::vector V; for ( ... ) { use V; V.clear(); @@ -3060,7 +3060,7 @@ mailto:[EMAIL PROTECTED]">Dinakar Dhurjati and mailto:[EMAIL PROTECTED]">Chris Lattner http://llvm.org";>The LLVM Compiler Infrastructure - Last modified: $Date: 2007/03/02 01:31:31 $ + Last modified: $Date: 2007/03/28 18:27:57 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/X86/lea-3.ll mul-shift-reassoc.ll
Changes in directory llvm/test/CodeGen/X86: lea-3.ll added (r1.1) mul-shift-reassoc.ll updated: 1.2 -> 1.3 --- Log message: new testcase --- Diffs of the changes: (+8 -1) lea-3.ll |7 +++ mul-shift-reassoc.ll |2 +- 2 files changed, 8 insertions(+), 1 deletion(-) Index: llvm/test/CodeGen/X86/lea-3.ll diff -c /dev/null llvm/test/CodeGen/X86/lea-3.ll:1.1 *** /dev/null Wed Mar 28 13:03:24 2007 --- llvm/test/CodeGen/X86/lea-3.ll Wed Mar 28 13:03:14 2007 *** *** 0 --- 1,7 + ; RUN: llvm-as < %s | llc -march=x86-64 | grep 'leal (%rdi,%rdi,2), %eax' + + define i32 @test(i32 %a) { + %tmp2 = mul i32 %a, 3 ; [#uses=1] + ret i32 %tmp2 + } + Index: llvm/test/CodeGen/X86/mul-shift-reassoc.ll diff -u llvm/test/CodeGen/X86/mul-shift-reassoc.ll:1.2 llvm/test/CodeGen/X86/mul-shift-reassoc.ll:1.3 --- llvm/test/CodeGen/X86/mul-shift-reassoc.ll:1.2 Fri Dec 1 22:23:08 2006 +++ llvm/test/CodeGen/X86/mul-shift-reassoc.ll Wed Mar 28 13:03:14 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep lea +; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | grep lea && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 | not grep add int %test(int %X, int %Y) { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.704 -> 1.705 --- Log message: Avoid unnecessary APInt construction. --- Diffs of the changes: (+2 -3) InstructionCombining.cpp |5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.704 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.705 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.704 Wed Mar 28 10:02:20 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Mar 28 12:38:21 2007 @@ -734,11 +734,10 @@ // If the sign bit of the input is known set or clear, then we know the // top bits of the result. -APInt NewBits(APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth)); if (KnownZero[SrcBitWidth-1]) // Input sign bit known zero - KnownZero |= NewBits; + KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth); else if (KnownOne[SrcBitWidth-1]) // Input sign bit known set - KnownOne |= NewBits; + KnownOne |= APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth); return; } case Instruction::Shl: ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/README-X86-64.txt
Changes in directory llvm/lib/Target/X86: README-X86-64.txt updated: 1.3 -> 1.4 --- Log message: Dan pointed out that this is done, remove it! --- Diffs of the changes: (+0 -21) README-X86-64.txt | 21 - 1 files changed, 21 deletions(-) Index: llvm/lib/Target/X86/README-X86-64.txt diff -u llvm/lib/Target/X86/README-X86-64.txt:1.3 llvm/lib/Target/X86/README-X86-64.txt:1.4 --- llvm/lib/Target/X86/README-X86-64.txt:1.3 Tue Dec 5 13:50:18 2006 +++ llvm/lib/Target/X86/README-X86-64.txt Wed Mar 28 12:26:52 2007 @@ -30,27 +30,6 @@ //===-===// -For this: - -int test(int a) -{ - return a * 3; -} - -We generates - leal (%edi,%edi,2), %eax - -We should be generating - leal (%rdi,%rdi,2), %eax - -instead. The later form does not require an address-size prefix 67H. - -It's probably ok to simply emit the corresponding 64-bit super class registers -in this case? - - -//===-===// - AMD64 Optimization Manual 8.2 has some nice information about optimizing integer multiplication by a constant. How much of it applies to Intel's X86-64 implementation? There are definite trade-offs to consider: latency vs. register ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/CellSPU/README.txt
Changes in directory llvm/lib/Target/CellSPU: README.txt added (r1.1) --- Log message: First test check-in. --- Diffs of the changes: (+10 -0) README.txt | 10 ++ 1 files changed, 10 insertions(+) Index: llvm/lib/Target/CellSPU/README.txt diff -c /dev/null llvm/lib/Target/CellSPU/README.txt:1.1 *** /dev/null Wed Mar 28 12:04:53 2007 --- llvm/lib/Target/CellSPU/README.txt Wed Mar 28 12:04:43 2007 *** *** 0 --- 1,10 + //===- README.txt - Notes for improving CellSPU-specific code gen -===// + + TODO: + * Check in the actual code. + + ===-=== + + Note: The CellSPU work is work-in-progress and "alpha" quality code. No code + has been officially checked into the llvm repo, but this will happen Real Soon, + Real Soon Now. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/CellSPU/
Changes in directory llvm/lib/Target/CellSPU: --- Log message: Directory /var/cvs/llvm/llvm/lib/Target/CellSPU added to the repository --- Diffs of the changes: (+0 -0) 0 files changed ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/Integer/APInt/.cvsignore Makefile arith.cpp bigint.cpp bitlogic.cpp convert.cpp gptest.cpp sign.cpp to_string.cpp
Changes in directory llvm-test/SingleSource/UnitTests/Integer/APInt: .cvsignore (r1.1) removed Makefile (r1.4) removed arith.cpp (r1.12) removed bigint.cpp (r1.3) removed bitlogic.cpp (r1.2) removed convert.cpp (r1.1) removed gptest.cpp (r1.11) removed sign.cpp (r1.3) removed to_string.cpp (r1.1) removed --- Log message: APInt is working satisfactorily, no need to keep these tests. --- Diffs of the changes: (+0 -0) 0 files changed ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/Integer/bit_concat_cpp.cpp bit_concat_cpp.reference_output bit_select_cpp.cpp bit_select_cpp.reference_output part_select_cpp.cpp part_select_cpp.r
Changes in directory llvm-test/SingleSource/UnitTests/Integer: bit_concat_cpp.cpp added (r1.1) bit_concat_cpp.reference_output added (r1.1) bit_select_cpp.cpp added (r1.1) bit_select_cpp.reference_output added (r1.1) part_select_cpp.cpp added (r1.1) part_select_cpp.reference_output added (r1.1) --- Log message: Add new test cases for C++ form of bit builtins --- Diffs of the changes: (+333 -0) bit_concat_cpp.cpp | 62 bit_concat_cpp.reference_output | 119 +++ bit_select_cpp.cpp | 45 ++ bit_select_cpp.reference_output |2 part_select_cpp.cpp | 57 ++ part_select_cpp.reference_output | 48 +++ 6 files changed, 333 insertions(+) Index: llvm-test/SingleSource/UnitTests/Integer/bit_concat_cpp.cpp diff -c /dev/null llvm-test/SingleSource/UnitTests/Integer/bit_concat_cpp.cpp:1.1 *** /dev/null Wed Mar 28 11:32:00 2007 --- llvm-test/SingleSource/UnitTests/Integer/bit_concat_cpp.cpp Wed Mar 28 11:31:50 2007 *** *** 0 --- 1,62 + //===--- part_select.c --- Test The bit_select builtin ===// + // + // This file was developed by Reid Spencer and is distributed under the + // University of Illinois Open Source License. See LICENSE.TXT for details. + // + //===--===// + // + // This test case tests the __builtin_part_select builtin function llvm-gcc. + // bit_select selects one bit out of a larger + // + //===--===// + + #include + #include + + typedef unsigned int __attribute__((bitwidth(17))) BitType1; + typedef unsigned int __attribute__((bitwidth(19))) BitType2; + typedef unsigned long long __attribute__((bitwidth(36))) ConcatType; + int numbits1 = 17; + int numbits2 = 19; + + void printBits(ConcatType val, int numbits ) { + int j; + for (j = numbits; j > 0; --j) { + if (__builtin_bit_select(val, j)) + printf("1"); + else + printf("0"); + } + } + + int main(int argc, char** argv) + { + BitType1 X = 0; + BitType2 Y = 0; + ConcatType Z = 0; + int i, j; + int count = (argc > 1 ? atoi(argv[1]) % 128 : 128); + + srand(count); + + for (i = 0; i < count; i++) { + Y = X = 0; + for (j = 0; j < numbits1; j++) { + X += (rand() % 2 == 0 ? 0 : 1); + X <<= 1; + } + for (j = 0; j < numbits2; j++) { + Y += (rand() % 2 == 0 ? 0 : 1); + Y <<= 1; + } + Z = __builtin_bit_concat(X, Y); + printf("bit_concat("); + printBits(X, numbits1); + printf(","); + printBits(Y, numbits2); + printf(") = "); + printBits(Z, numbits1 + numbits2); + printf("\n"); + } + return 0; + } Index: llvm-test/SingleSource/UnitTests/Integer/bit_concat_cpp.reference_output diff -c /dev/null llvm-test/SingleSource/UnitTests/Integer/bit_concat_cpp.reference_output:1.1 *** /dev/null Wed Mar 28 11:32:07 2007 --- llvm-test/SingleSource/UnitTests/Integer/bit_concat_cpp.reference_output Wed Mar 28 11:31:50 2007 *** *** 0 --- 1,119 + bit_concat(000001110,0010011010011011100) = 0000011100010011010011011100 + bit_concat(0100001011010,00100110101) = 010000101101000100110101 + bit_concat(0100111011000,010101101011010) = 010011101110101101011010 + bit_concat(0100110101110,010010001011011) = 0100110101110010010001011011 + bit_concat(0111010011010,01001111010) = 011101001101001001111010 + bit_concat(0110101001000,1110111) = 01101010010001110111 + bit_concat(0011100100110,0010101010110011100) = 00111001001100010101010110011100 + bit_concat(0001001001001,001000100011001) = 0001001001001001000100011001 + bit_concat(0010001101010,000100110010101) = 001000110101100110010101 + bit_concat(0101010000110,0011011011100011010) = 01010100001100011011011100011010 + bit_concat(0100011011101,00110101000) = 010001101110100110101000 + bit_concat(000110100,001001101101100) = 000110100001001101101100 + bit_concat(0101011000100,0001010) = 01010110001000001010 + bit_concat(0111000110001,00100110110) = 011100011000100100110110 + bit_concat(0001000100100,00010110001) = 00010001001010110001 + bit_concat(0101011001101,0100101101001100010) = 01010110011010100101101001100010 + bit_concat(0001010001000,000110101101000) = 000101000100110101101000 + bit_concat(1001101011000,000010110110111) = 100110101100010110110111 + bit_concat(0101101011100,011100101110100) = 0101101011100011100101110100 + bit_concat(01110011101
[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/Integer/Makefile
Changes in directory llvm-test/SingleSource/UnitTests/Integer: Makefile updated: 1.6 -> 1.7 --- Log message: No point running CBE here, it can't handle the integer types. --- Diffs of the changes: (+1 -0) Makefile |1 + 1 files changed, 1 insertion(+) Index: llvm-test/SingleSource/UnitTests/Integer/Makefile diff -u llvm-test/SingleSource/UnitTests/Integer/Makefile:1.6 llvm-test/SingleSource/UnitTests/Integer/Makefile:1.7 --- llvm-test/SingleSource/UnitTests/Integer/Makefile:1.6 Mon Feb 5 20:54:07 2007 +++ llvm-test/SingleSource/UnitTests/Integer/Makefile Wed Mar 28 11:31:04 2007 @@ -19,6 +19,7 @@ # LLC-BETA, and JIT test cases. This leaves the CBE which can # handle the arbitrary precision integers. +DISABLE_CBE := 1 DISABLE_LLC := 1 DISABLE_JIT := 1 ENABLE_LLI := 1 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/Integer/sign.c
Changes in directory llvm-test/SingleSource/UnitTests/Integer: sign.c updated: 1.2 -> 1.3 --- Log message: Add some comments. --- Diffs of the changes: (+4 -4) sign.c |8 1 files changed, 4 insertions(+), 4 deletions(-) Index: llvm-test/SingleSource/UnitTests/Integer/sign.c diff -u llvm-test/SingleSource/UnitTests/Integer/sign.c:1.2 llvm-test/SingleSource/UnitTests/Integer/sign.c:1.3 --- llvm-test/SingleSource/UnitTests/Integer/sign.c:1.2 Sat Feb 10 08:40:07 2007 +++ llvm-test/SingleSource/UnitTests/Integer/sign.c Wed Mar 28 11:30:20 2007 @@ -39,12 +39,12 @@ ux = num; // = 1 printf("x = %d, ux = %u, y=%d, uy = %u\n", x, ux, y, uy); - z = x * y; // 0x101 * (-1) - uz = ux * uy; + z = x * y; // 0x101 * -1 + uz = ux * uy; // 1 * -1 printf("z=%d, uz=%u\n", z, uz); - z = x % 314; - uz = ux % 314; + z = x % 314; // 0x101 % 314 + uz = ux % 314; // 1 % 314 == 1 printf("z=%d, uz=%u\n", z, uz); z = x / 314; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] llvm-gcc: correct handling of arrays of var-sized elements
In gcc, the length of an array may only be known at runtime, for example "char X[n];" is legal; the same goes for array types: the length of the array type may depend on the value of a variable. This is a gcc C extension, so somewhat rare, but is widely used in languages like Ada. You can construct pointers to such types and arrays where the element type is such a variable-sized array. This is one way of getting an array where the element type does not have a fixed size; the other way is to use a variable-sized struct as the element type. Currently such arrays are handled wrong: loads and stores to elements (via ARRAY_REF) access the wrong memory location. The reason for this is simple enough: the gcc element type (EType) and the corresponding LLVM type (ETypeLLVM) have different sizes. This means that LLVM arrays of the LLVM element type lay their components out in memory differently to the gcc array. For example, suppose the element type EType is "char [n]", a length n string, and the array type AType is an array of three ETypes, which I'll write as "(char [n])[3]". Right now these get converted as follows: GCC LLVM char[n] i8 (char [n])[3] [3 x i8] GCC memory layout element: 0 0 0 1 1 12 2 byte: 0 1 ... n-1 n n+1 ... 2n-1 2n .. 3n-1 LLVM memory layout element: 0 1 2 byte: 0 1 2 Referencing element 1 accesses 1 byte from the start when it should be accessing the n'th byte from the start. The testcase shows an example of the bogus results this can give (2007-03-27-ArrayCompatible.c). The conversion to an LLVM array is clearly bogus. There is an analogous problem with pointers: using GetElementPtr to do pointer offsets is only valid if the LLVM type is the same size as the GCC type, since otherwise the pointer will be advanced by the wrong amount. The patch introduces utility functions isSequentialCompatible and isArrayCompatible that apply to a gcc array (or pointer type). If isSequentialCompatible returns true, then elements of the gcc type are laid out in memory the same as the corresponding LLVM elements. Thus GetElementPtr can be used to access them. If isArrayCompatible returns true, then the gcc array corresponds to an LLVM array, laying out its components the same way. isSequentialCompatible relies on the following invariant: if the size of a gcc type is a constant, then the corresponding LLVM type has the same size [1]. I've added an assertion in llvm-types to check that this is true. isSequentialCompatible simply returns whether the gcc element type has constant size [1]. Thus isSequentialCompatible returns true for a variable length array with a constant size element type. isArrayCompatible returns true if the array has a constant length and the element type has constant size [2]. The patch then fixes up a bunch of array code to use these. It also modifies pointer code to use isSequentialCompatible, but these modifications are minor since the pointer code already got it right. For example, both isSequentialCompatible and isArrayCompatible return false for the array type example described above. The conversions are now: GCC LLVM char[n] i8 (char [n])[3] i8 and the LLVM memory layout is done using pointer arithmetic. The patch also introduces two generally useful methods requested by Chris: isInt64 and getInt64. These tell you whether a gcc constant fits into 64 bits, and gets the constant for you (aborting if it doesn't fit). They are analogous to host_integerp and tree_low_cst, only using 64 bit integers rather than HOST_WIDE_INT. They are used for example to tell whether the size in bits of the gcc type is small enough (< 2^64) to correspond to an LLVM type [3]. The main difference with getINTEGER_CSTVal is that getInt64 refuses to return constants that overflowed or are simply too big for 64 bits. I corrected a number of other small problems while I was there: - I unified the pointer and array cases in TreeToLLVM::EmitLV_ARRAY_REF. The pointer code did a better job than the array code and the array code benefits from this: indexing into a variable length array with a constant size element type (i.e. when isSequentialCompatible is true) now uses a GetElementPtr rather than 'orrible pointer arithmetic. This produces vastly better code when, for example, accessing elements of an array like "int X[n]". There's a testcase for this (2007-03-27-VarLengthArray.c). - The size passed to an AllocaInst might not be an Int32. Probably impossible to hit in practice. - If the index type in TreeConstantToLLVM::EmitLV_ARRAY_REF was an unsigned 32 bit integer, you could get wrong code on a 64 bit machine. Wildly unlikely it could ever be hit. Bootstraps, causes no testsuite failures (including multisource) and indeed on my system causes 2003-05-22-VarSizeArray.c to pass rather than crash the gcc 4.1 compiler (CBE) because the improved array indexing causes the testcase to be simplified down to one l
Re: [llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.cpp
Chris Lattner wrote: > Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the > system assembler not groking legal instructions like "leal (,%esi,8), %ecx". I was just about to report this. Thanks! BTW, I believe this also fixes the fifth entry in llvm/lib/Target/X86/README-X86-64.txt Dan -- Dan Gohman, Cray Inc. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.703 -> 1.704 --- Log message: 1. Make more use of getLowBitsSet/getHighBitsSet. 2. Use APInt[] instead of "X & SignBit". 3. Clean up some codes. 4. Make the expression like "ShiftAmt = ShiftAmtC->getZExtValue()" safe. --- Diffs of the changes: (+16 -13) InstructionCombining.cpp | 29 - 1 files changed, 16 insertions(+), 13 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.703 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.704 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.703 Wed Mar 28 04:19:01 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Mar 28 10:02:20 2007 @@ -1313,7 +1313,7 @@ RHSKnownOne <<= ShiftAmt; // low bits known zero. if (ShiftAmt) -RHSKnownZero |= APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth); +RHSKnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt); } break; case Instruction::LShr: @@ -5608,7 +5608,7 @@ // shl uint X, 32 = 0 and shr ubyte Y, 9 = 0, ... just don't eliminate shr // of a signed value. // - if (Op1->getZExtValue() >= TypeBits) { // shift amount always <= 32 bits + if (Op1->getValue().getActiveBits() > 64 || Op1->getZExtValue() >= TypeBits) { if (I.getOpcode() != Instruction::AShr) return ReplaceInstUsesWith(I, Constant::getNullValue(Op0->getType())); else { @@ -5751,8 +5751,7 @@ // operation. // if (isValid && !isLeftShift && I.getOpcode() == Instruction::AShr) { - isValid = ((Op0C->getValue() & APInt::getSignBit(TypeBits)) != 0) == -highBitSet; + isValid = Op0C->getValue()[TypeBits-1] == highBitSet; } if (isValid) { @@ -5777,9 +5776,10 @@ if (ShiftOp && isa(ShiftOp->getOperand(1))) { ConstantInt *ShiftAmt1C = cast(ShiftOp->getOperand(1)); -// These shift amounts are always <= 32 bits. -unsigned ShiftAmt1 = (unsigned)ShiftAmt1C->getZExtValue(); -unsigned ShiftAmt2 = (unsigned)Op1->getZExtValue(); +uint32_t ShiftAmt1 = ShiftAmt1C->getValue().getActiveBits() > 64 ? + TypeBits : (uint32_t)ShiftAmt1C->getZExtValue(); +uint32_t ShiftAmt2 = Op1->getValue().getActiveBits() > 64 ? + TypeBits : (uint32_t)Op1->getZExtValue(); assert(ShiftAmt2 != 0 && "Should have been simplified earlier"); if (ShiftAmt1 == 0) return 0; // Will be simplified in the future. Value *X = ShiftOp->getOperand(0); @@ -5805,7 +5805,7 @@ BinaryOperator::createAShr(X, ConstantInt::get(Ty, AmtSum)); InsertNewInstBefore(Shift, I); - APInt Mask(Ty->getMask().lshr(ShiftAmt2)); + APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2)); return BinaryOperator::createAnd(Shift, ConstantInt::get(Mask)); } @@ -5828,11 +5828,14 @@ // generators. const Type *SExtType = 0; switch (Ty->getBitWidth() - ShiftAmt1) { - case 1 : SExtType = Type::Int1Ty; break; - case 8 : SExtType = Type::Int8Ty; break; - case 16 : SExtType = Type::Int16Ty; break; - case 32 : SExtType = Type::Int32Ty; break; - case 64 : SExtType = Type::Int64Ty; break; + case 1 : + case 8 : + case 16 : + case 32 : + case 64 : + case 128: +SExtType = IntegerType::get(Ty->getBitWidth() - ShiftAmt1); +break; default: break; } if (SExtType) { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/Dominators.cpp
Changes in directory llvm/lib/VMCore: Dominators.cpp updated: 1.84 -> 1.85 --- Log message: It is not possible to determine dominance between two PHI nodes based on their ordering. This is applicable to ETForest::dominates() also. --- Diffs of the changes: (+5 -0) Dominators.cpp |5 + 1 files changed, 5 insertions(+) Index: llvm/lib/VMCore/Dominators.cpp diff -u llvm/lib/VMCore/Dominators.cpp:1.84 llvm/lib/VMCore/Dominators.cpp:1.85 --- llvm/lib/VMCore/Dominators.cpp:1.84 Tue Mar 27 15:50:46 2007 +++ llvm/lib/VMCore/Dominators.cpp Wed Mar 28 09:57:43 2007 @@ -952,6 +952,11 @@ BasicBlock::iterator I = BBA->begin(); for (; &*I != A && &*I != B; ++I) /*empty*/; + // It is not possible to determine dominance between two PHI nodes + // based on their ordering. + if (isa(A) && isa(B)) +return false; + if(!IsPostDominators) { // A dominates B if it is found first in the basic block. return &*I == A; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
On Wed, 2007-03-28 at 14:23 +0800, Zhou Sheng wrote: > 在 2007-03-27二的 22:17 -0700,Reid Spencer写道: > > > >KnownOne |= NewBits; > > > > - KnownZero &= ~NewBits; > > > > -} else { // Input sign bit unknown > > > > - KnownZero &= ~NewBits; > > > > - KnownOne &= ~NewBits; > > > > -} > > > > > > Why did you delete this? What if the sign bit is unknown? (neither known > > > one nor known zero). Please revert. > > > > This however is still a problem. It is quite possible for KnownZero[X] > > and KnownOne[X] to both be false. > I looked into the context, the *else* case is possible, but, as the > NewBits are : > > APInt NewBits(APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth)); > > So ~NewBits should be a Mask of SrcBitWidth, and as KnownZero, KnownOne > are just zexted from SrcBitWidth to BitWidth, so, the &= operation will > be useless. I see. I didn't have the full context on the trunc/zext. However, now what you can do is move the construction of NewBits into each of the two cases. This will avoid constructing it in the event that the sign bit is not sent in either KnownZero nor KnownOne. Thanks Sheng, Reid. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.702 -> 1.703 --- Log message: 1. Make more use of getLowBitsSet/getHighBitsSet. 2. Make the APInt value do the zext/trunc stuff instead of using ConstantExpr::getZExt(). --- Diffs of the changes: (+3 -5) InstructionCombining.cpp |8 +++- 1 files changed, 3 insertions(+), 5 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.702 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.703 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.702 Wed Mar 28 00:15:57 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Mar 28 04:19:01 2007 @@ -6304,8 +6304,7 @@ case Instruction::ZExt: { // We need to emit an AND to clear the high bits. assert(SrcBitSize < DestBitSize && "Not a zext?"); -Constant *C = ConstantInt::get(APInt::getAllOnesValue(SrcBitSize)); -C = ConstantExpr::getZExt(C, DestTy); +Constant *C = ConstantInt::get(APInt::getLowBitsSet(DestBitSize, SrcBitSize)); return BinaryOperator::createAnd(Res, C); } case Instruction::SExt: @@ -6487,8 +6486,7 @@ unsigned ShAmt = ShAmtV->getZExtValue(); // Get a mask for the bits shifting in. -APInt Mask(APInt::getAllOnesValue(SrcBitWidth).lshr( - SrcBitWidth-ShAmt).shl(DestBitWidth)); +APInt Mask(APInt::getLowBitsSet(SrcBitWidth, ShAmt).shl(DestBitWidth)); Value* SrcIOp0 = SrcI->getOperand(0); if (SrcI->hasOneUse() && MaskedValueIsZero(SrcIOp0, Mask)) { if (ShAmt >= DestBitWidth)// All zeros. @@ -6547,7 +6545,7 @@ // If we're actually extending zero bits and the trunc is a no-op if (MidSize < DstSize && SrcSize == DstSize) { // Replace both of the casts with an And of the type mask. -APInt AndValue(APInt::getAllOnesValue(MidSize).zext(SrcSize)); +APInt AndValue(APInt::getLowBitsSet(SrcSize, MidSize)); Constant *AndConst = ConstantInt::get(AndValue); Instruction *And = BinaryOperator::createAnd(CSrc->getOperand(0), AndConst); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/Makefile.programs
Changes in directory llvm-test: Makefile.programs updated: 1.263 -> 1.264 --- Log message: X86 llcbeta back to -enable-tail-merge. --- Diffs of the changes: (+1 -2) Makefile.programs |3 +-- 1 files changed, 1 insertion(+), 2 deletions(-) Index: llvm-test/Makefile.programs diff -u llvm-test/Makefile.programs:1.263 llvm-test/Makefile.programs:1.264 --- llvm-test/Makefile.programs:1.263 Tue Mar 20 19:19:32 2007 +++ llvm-test/Makefile.programs Wed Mar 28 03:31:17 2007 @@ -223,8 +223,7 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -enable-rematerialization -# -enable-tail-merge +LLCBETAOPTION := -enable-tail-merge #-regalloc=local -fast endif ifeq ($(ARCH),Sparc) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/README.txt
Changes in directory llvm/lib/CodeGen: README.txt updated: 1.1 -> 1.2 --- Log message: Notes on re-materialization. --- Diffs of the changes: (+40 -0) README.txt | 40 1 files changed, 40 insertions(+) Index: llvm/lib/CodeGen/README.txt diff -u llvm/lib/CodeGen/README.txt:1.1 llvm/lib/CodeGen/README.txt:1.2 --- llvm/lib/CodeGen/README.txt:1.1 Tue Mar 20 17:22:38 2007 +++ llvm/lib/CodeGen/README.txt Wed Mar 28 03:30:04 2007 @@ -1,3 +1,5 @@ +//===-===// + Common register allocation / spilling problem: mul lr, r4, lr @@ -25,3 +27,41 @@ mla r4, r3, lr, r4 It also increase the likelyhood the store may become dead. + +//===-===// + +I think we should have a "hasSideEffects" flag (which is automatically set for +stuff that "isLoad" "isCall" etc), and the remat pass should eventually be able +to remat any instruction that has no side effects, if it can handle it and if +profitable. + +For now, I'd suggest having the remat stuff work like this: + +1. I need to spill/reload this thing. +2. Check to see if it has side effects. +3. Check to see if it is simple enough: e.g. it only has one register +destination and no register input. +4. If so, clone the instruction, do the xform, etc. + +Advantages of this are: + +1. the .td file describes the behavior of the instructions, not the way the + algorithm should work. +2. as remat gets smarter in the future, we shouldn't have to be changing the .td + files. +3. it is easier to explain what the flag means in the .td file, because you + don't have to pull in the explanation of how the current remat algo works. + +Some potential added complexities: + +1. Some instructions have to be glued to it's predecessor or successor. All of + the PC relative instructions and condition code setting instruction. We could + mark them as hasSideEffects, but that's not quite right. PC relative loads + from constantpools can be remat'ed, for example. But it requires more than + just cloning the instruction. Some instructions can be remat'ed but it + expands to more than one instruction. But allocator will have to make a + decision. + +4. As stated in 3, not as simple as cloning in some cases. The target will have + to decide how to remat it. For example, an ARM 2-piece constant generation + instruction is remat'ed as a load from constantpool. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
Changes in directory llvm/lib/CodeGen: LiveIntervalAnalysis.cpp updated: 1.229 -> 1.230 --- Log message: Move rematerialization out of beta. --- Diffs of the changes: (+1 -7) LiveIntervalAnalysis.cpp |8 +--- 1 files changed, 1 insertion(+), 7 deletions(-) Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.229 llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.230 --- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.229 Tue Mar 27 20:30:37 2007 +++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp Wed Mar 28 03:26:40 2007 @@ -50,11 +50,6 @@ EnableJoining("join-liveintervals", cl::desc("Coallesce copies (default=true)"), cl::init(true)); - - static cl::opt - EnableReMat("enable-rematerialization", -cl::desc("Perform trivial re-materialization"), -cl::init(false)); } void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const { @@ -436,8 +431,7 @@ // time we see a vreg. if (interval.empty()) { // Remember if the definition can be rematerialized. -if (EnableReMat && -vi.DefInst && tii_->isReMaterializable(vi.DefInst->getOpcode())) +if (vi.DefInst && tii_->isReMaterializable(vi.DefInst->getOpcode())) interval.remat = vi.DefInst; // Get the Idx of the defining instructions. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits