[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/PowerPC: PPCISelDAGToDAG.cpp updated: 1.229 - 1.230 --- Log message: Fix a bug which caused us to never be able to use signed comparisons for equality comparisons of a constant. This allows us to codegen the 'sintzero' loop in PR1288: http://llvm.org/PR1288 as: LBB1_1: ;cond_next li r4, 0 addi r2, r2, 1 stw r4, 0(r3) addi r3, r3, 4 cmpwi cr0, r2, -1 bne cr0, LBB1_1 ;cond_next instead of: LBB1_1: ;cond_next addi r2, r2, 1 li r4, 0 xoris r5, r2, 65535 stw r4, 0(r3) addi r3, r3, 4 cmplwi cr0, r5, 65535 bne cr0, LBB1_1 ;cond_next This implements CodeGen/PowerPC/compare-simm.ll, and also cuts 74 instructions out of kc++. --- Diffs of the changes: (+1 -1) PPCISelDAGToDAG.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.229 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.230 --- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.229 Tue Dec 19 16:59:26 2006 +++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Mon Apr 2 00:59:42 2007 @@ -508,7 +508,7 @@ return SDOperand(CurDAG-getTargetNode(PPC::CMPLWI, MVT::i32, LHS, getI32Imm(Imm 0x)), 0); // If this is a 16-bit signed immediate, fold it. -if (isInt16(Imm)) +if (isInt16((int)Imm)) return SDOperand(CurDAG-getTargetNode(PPC::CMPWI, MVT::i32, LHS, getI32Imm(Imm 0x)), 0); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/DevMtgMay2007.html
Changes in directory llvm-www: DevMtgMay2007.html updated: 1.22 - 1.23 --- Log message: Add Devang. --- Diffs of the changes: (+4 -3) DevMtgMay2007.html |7 --- 1 files changed, 4 insertions(+), 3 deletions(-) Index: llvm-www/DevMtgMay2007.html diff -u llvm-www/DevMtgMay2007.html:1.22 llvm-www/DevMtgMay2007.html:1.23 --- llvm-www/DevMtgMay2007.html:1.22Sun Apr 1 16:07:53 2007 +++ llvm-www/DevMtgMay2007.html Mon Apr 2 01:09:54 2007 @@ -212,13 +212,14 @@ trtdChris Lattner/tdtdApple, Inc./td/tr trtdNick Lewycky/tdtdIndependent/td/tr trtdScott Michel + 2/tdtdAerospace/td/tr +trtdDevang Patel/tdtdApple, Inc./td/tr trtdReid Spencer/tdtdIndependent/td/tr trtdSarah Thompson + 1/tdtdNASA, Ames Research Center/td/tr trtdBill Wendling/tdtdApple, Inc./td/tr trtdMarcel Weiher/tdtdMetaObject/td/tr /table - pTotal confirmed attendees: 13/p - pPossible additional attendees: 8/p + pTotal confirmed attendees: 14/p + pPossible additional attendees: 7/p /div !-- *** -- @@ -228,6 +229,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/01 21:07:53 $ +br/Last modified: $Date: 2007/04/02 06:09:54 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/ARM/lsr-scale-addr-mode.ll
Changes in directory llvm/test/CodeGen/ARM:
lsr-scale-addr-mode.ll added (r1.1)
---
Log message:
new testcase.
---
Diffs of the changes: (+19 -0)
lsr-scale-addr-mode.ll | 19 +++
1 files changed, 19 insertions(+)
Index: llvm/test/CodeGen/ARM/lsr-scale-addr-mode.ll
diff -c /dev/null llvm/test/CodeGen/ARM/lsr-scale-addr-mode.ll:1.1
*** /dev/null Mon Apr 2 01:33:20 2007
--- llvm/test/CodeGen/ARM/lsr-scale-addr-mode.llMon Apr 2 01:33:10 2007
***
*** 0
--- 1,19
+ ; RUN: llvm-as %s | llc -march=arm | grep -F 'str r2, [r0, +r3, lsl #2]'
+ ; Should use scaled addressing mode.
+
+ define void @sintzero(i32* %a) {
+ entry:
+ store i32 0, i32* %a
+ br label %cond_next
+
+ cond_next:; preds = %cond_next, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %tmp25, %cond_next ] ; i32
[#uses=1]
+ %tmp25 = add i32 %indvar, 1 ; i32 [#uses=3]
+ %tmp36 = getelementptr i32* %a, i32 %tmp25 ; i32*
[#uses=1]
+ store i32 0, i32* %tmp36
+ icmp eq i32 %tmp25, -1 ; i1:0 [#uses=1]
+ br i1 %0, label %return, label %cond_next
+
+ return: ; preds = %cond_next
+ ret void
+ }
___
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Changes in directory llvm/lib/Transforms/Scalar: LoopStrengthReduce.cpp updated: 1.123 - 1.124 --- Log message: Pass the type of the store access, not the type of the store, into the target hook. This allows us to codegen a loop as: LBB1_1: @cond_next mov r2, #0 str r2, [r0, +r3, lsl #2] add r3, r3, #1 cmn r3, #1 bne LBB1_1 @cond_next instead of: LBB1_1: @cond_next mov r2, #0 str r2, [r0], #+4 add r3, r3, #1 cmn r3, #1 bne LBB1_1 @cond_next This looks the same, but has one fewer induction variable (and therefore, one fewer register) live in the loop. --- Diffs of the changes: (+9 -2) LoopStrengthReduce.cpp | 11 +-- 1 files changed, 9 insertions(+), 2 deletions(-) Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp diff -u llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.123 llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.124 --- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.123 Sun Apr 1 17:21:39 2007 +++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp Mon Apr 2 01:34:44 2007 @@ -899,8 +899,15 @@ Imm = SC-getValue()-getSExtValue(); else Imm = 0; -if (!TLI-isLegalAddressScaleAndImm(Scale, Imm, - UsersToProcess[i].Inst-getType())) + +// If this is a load or other access, pass the type of the access in. +const Type *AccessTy = Type::VoidTy; +if (StoreInst *SI = dyn_castStoreInst(UsersToProcess[i].Inst)) + AccessTy = SI-getOperand(0)-getType(); +else if (LoadInst *LI = dyn_castLoadInst(UsersToProcess[i].Inst)) + AccessTy = LI-getType(); + +if (!TLI-isLegalAddressScaleAndImm(Scale, Imm, AccessTy)) return false; } return true; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.721 - 1.722
---
Log message:
Use uint32_t for bitwidth instead of unsigned.
---
Diffs of the changes: (+29 -29)
InstructionCombining.cpp | 58 +++
1 files changed, 29 insertions(+), 29 deletions(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.721
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.722
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.721 Mon Apr 2
00:48:58 2007
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Mon Apr 2 03:20:41 2007
@@ -1279,7 +1279,7 @@
if (DemandedMask[BitWidth-1] == 0) {
// Right fill the mask of bits for this SUB to demand the most
// significant bit and all those below it.
- unsigned NLZ = DemandedMask.countLeadingZeros();
+ uint32_t NLZ = DemandedMask.countLeadingZeros();
APInt DemandedFromOps(APInt::getLowBitsSet(BitWidth, BitWidth-NLZ));
if (SimplifyDemandedBits(I-getOperand(0), DemandedFromOps,
LHSKnownZero, LHSKnownOne, Depth+1))
@@ -1871,7 +1871,7 @@
if (ConstantInt *CI = dyn_castConstantInt(RHSC)) {
// X + (signbit) -- X ^ signbit
const APInt Val = CI-getValue();
- unsigned BitWidth = Val.getBitWidth();
+ uint32_t BitWidth = Val.getBitWidth();
if (Val == APInt::getSignBit(BitWidth))
return BinaryOperator::createXor(LHS, RHS);
@@ -1893,10 +1893,10 @@
Value *XorLHS = 0;
if (isaConstantInt(RHSC)
match(LHS, m_Xor(m_Value(XorLHS), m_ConstantInt(XorRHS {
- unsigned TySizeBits = I.getType()-getPrimitiveSizeInBits();
+ uint32_t TySizeBits = I.getType()-getPrimitiveSizeInBits();
const APInt RHSVal = castConstantInt(RHSC)-getValue();
- unsigned Size = TySizeBits / 2;
+ uint32_t Size = TySizeBits / 2;
APInt C0080Val(APInt(TySizeBits, 1ULL).shl(Size - 1));
APInt CFF80Val(-C0080Val);
do {
@@ -2049,7 +2049,7 @@
// isSignBit - Return true if the value represented by the constant only has
the
// highest order bit set.
static bool isSignBit(ConstantInt *CI) {
- unsigned NumBits = CI-getType()-getPrimitiveSizeInBits();
+ uint32_t NumBits = CI-getType()-getPrimitiveSizeInBits();
return CI-getValue() == APInt::getSignBit(NumBits);
}
@@ -2321,8 +2321,8 @@
// If the multiply type is not the same as the source type, sign extend
// or truncate to the multiply type.
if (I.getType() != V-getType()) {
- unsigned SrcBits = V-getType()-getPrimitiveSizeInBits();
- unsigned DstBits = I.getType()-getPrimitiveSizeInBits();
+ uint32_t SrcBits = V-getType()-getPrimitiveSizeInBits();
+ uint32_t DstBits = I.getType()-getPrimitiveSizeInBits();
Instruction::CastOps opcode =
(SrcBits == DstBits ? Instruction::BitCast :
(SrcBits DstBits ? Instruction::SExt : Instruction::Trunc));
@@ -3081,7 +3081,7 @@
// any number of 0s on either side. The 1s are allowed to wrap from LSB to
// MSB, so 0x000FFF0, 0x, and 0xFFFF are all runs. 0x0F0F is
// not, since all 1s are not contiguous.
-static bool isRunOfOnes(ConstantInt *Val, unsigned MB, unsigned ME) {
+static bool isRunOfOnes(ConstantInt *Val, uint32_t MB, uint32_t ME) {
const APInt V = Val-getValue();
uint32_t BitWidth = Val-getType()-getBitWidth();
if (!APIntOps::isShiftedMask(BitWidth, V)) return false;
@@ -3125,7 +3125,7 @@
// Otherwise, if Mask is 0+1+0+, and if B is known to have the low 0+
// part, we don't need any explicit masks to take them out of A. If that
// is all N is, ignore it.
- unsigned MB = 0, ME = 0;
+ uint32_t MB = 0, ME = 0;
if (isRunOfOnes(Mask, MB, ME)) { // begin/end bit of run, inclusive
uint32_t BitWidth = castIntegerType(RHS-getType())-getBitWidth();
APInt Mask(APInt::getLowBitsSet(BitWidth, MB-1));
@@ -4844,7 +4844,7 @@
case Instruction::Shl: // (icmp pred (shl X, ShAmt), CI)
if (ConstantInt *ShAmt = dyn_castConstantInt(LHSI-getOperand(1))) {
if (I.isEquality()) {
-unsigned TypeBits = CI-getType()-getPrimitiveSizeInBits();
+uint32_t TypeBits = CI-getType()-getPrimitiveSizeInBits();
// Check that the shift amount is in range. If not, don't perform
// undefined shifts. When the shift is visited it will be
@@ -4865,8 +4865,8 @@
if (LHSI-hasOneUse()) {
// Otherwise strength reduce the shift into an and.
uint32_t ShAmtVal = (uint32_t)ShAmt-getLimitedValue(TypeBits);
- uint64_t Val = (1ULL (TypeBits-ShAmtVal))-1;
- Constant *Mask = ConstantInt::get(CI-getType(), Val);
+ Constant *Mask = ConstantInt::get(
+
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.722 - 1.723
---
Log message:
1. Make use of APInt operation instead of using ConstantExpr::getXXX.
2. Use cheaper APInt methods.
---
Diffs of the changes: (+19 -26)
InstructionCombining.cpp | 45 +++--
1 files changed, 19 insertions(+), 26 deletions(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.722
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.723
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.722 Mon Apr 2
03:20:41 2007
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Mon Apr 2 08:45:30 2007
@@ -522,7 +522,7 @@
// Constants can be considered to be not'ed values...
if (ConstantInt *C = dyn_castConstantInt(V))
-return ConstantExpr::getNot(C);
+return ConstantInt::get(~C-getValue());
return 0;
}
@@ -844,16 +844,14 @@
Ty, KnownZero, KnownOne and Min, Max must have equal bitwidth.);
APInt UnknownBits = ~(KnownZero|KnownOne);
- APInt SignBit(APInt::getSignBit(BitWidth));
-
// The minimum value is when all unknown bits are zeros, EXCEPT for the sign
// bit if it is unknown.
Min = KnownOne;
Max = KnownOne|UnknownBits;
if (UnknownBits[BitWidth-1]) { // Sign bit is unknown
-Min |= SignBit;
-Max = ~SignBit;
+Min.set(BitWidth-1);
+Max.clear(BitWidth-1);
}
}
@@ -1133,7 +1131,6 @@
const IntegerType *SrcTy = castIntegerType(I-getOperand(0)-getType());
uint32_t SrcBitWidth = SrcTy-getBitWidth();
-DemandedMask = SrcTy-getMask().zext(BitWidth);
DemandedMask.trunc(SrcBitWidth);
RHSKnownZero.trunc(SrcBitWidth);
RHSKnownOne.trunc(SrcBitWidth);
@@ -1154,9 +1151,6 @@
const IntegerType *SrcTy = castIntegerType(I-getOperand(0)-getType());
uint32_t SrcBitWidth = SrcTy-getBitWidth();
-// Get the sign bit for the source type
-APInt InSignBit(APInt::getSignBit(SrcBitWidth));
-InSignBit.zext(BitWidth);
APInt InputDemandedBits = DemandedMask
APInt::getLowBitsSet(BitWidth, SrcBitWidth);
@@ -1164,7 +1158,7 @@
// If any of the sign extended bits are demanded, we know that the sign
// bit is demanded.
if ((NewBits DemandedMask) != 0)
- InputDemandedBits |= InSignBit;
+ InputDemandedBits.set(SrcBitWidth-1);
InputDemandedBits.trunc(SrcBitWidth);
RHSKnownZero.trunc(SrcBitWidth);
@@ -3652,7 +3646,8 @@
Instruction *Or = BinaryOperator::createOr(X, RHS);
InsertNewInstBefore(Or, I);
Or-takeName(Op0);
- return BinaryOperator::createAnd(Or, ConstantExpr::getOr(RHS, C1));
+ return BinaryOperator::createAnd(Or,
+ ConstantInt::get(RHS-getValue() | C1-getValue()));
}
// (X ^ C1) | C2 -- (X | C2) ^ (C1~C2)
@@ -3661,7 +3656,7 @@
InsertNewInstBefore(Or, I);
Or-takeName(Op0);
return BinaryOperator::createXor(Or,
- ConstantExpr::getAnd(C1, ConstantExpr::getNot(RHS)));
+ ConstantInt::get(C1-getValue() ~RHS-getValue()));
}
// Try to fold constant and into select arguments.
@@ -3716,13 +3711,14 @@
match(Op1, m_And(m_Value(B), m_ConstantInt(C2 {
if (A == B) // (A C1)|(A C2) == A (C1|C2)
- return BinaryOperator::createAnd(A, ConstantExpr::getOr(C1, C2));
+ return BinaryOperator::createAnd(A,
+ ConstantInt::get(C1-getValue() | C2-getValue()));
// If we have: ((V + N) C1) | (V C2)
// .. and C2 = ~C1 and C2 is 0+1+ and (N C2) == 0
// replace with V+N.
-if (C1 == ConstantExpr::getNot(C2)) {
+if (C1-getValue() == ~C2-getValue()) {
Value *V1 = 0, *V2 = 0;
if ((C2-getValue() (C2-getValue()+1)) == 0 // C2 == 0+1+
match(A, m_Add(m_Value(V1), m_Value(V2 {
@@ -3826,7 +3822,7 @@
Instruction *Add = BinaryOperator::createAdd(LHSVal, AddCST,
LHSVal-getName()+.off);
InsertNewInstBefore(Add, I);
-AddCST = ConstantExpr::getSub(AddOne(RHSCst), LHSCst);
+AddCST = Subtract(AddOne(RHSCst), LHSCst);
return new ICmpInst(ICmpInst::ICMP_ULT, Add, AddCST);
}
break; // (X == 13 | X == 15) - no
change
@@ -4027,7 +4023,7 @@
Constant *NewRHS = ConstantExpr::getOr(Op0CI, RHS);
// Anything in both C1 and C2 is known to be zero, remove it from
// NewRHS.
-Constant *CommonBits = ConstantExpr::getAnd(Op0CI, RHS);
+Constant *CommonBits = And(Op0CI, RHS);
NewRHS = ConstantExpr::getAnd(NewRHS,
ConstantExpr::getNot(CommonBits));
AddToWorkList(Op0I);
@@ -4196,7 +4192,7 @@
///
[llvm-commits] CVS: llvm-www/DevMtgMay2007.html
Changes in directory llvm-www: DevMtgMay2007.html updated: 1.23 - 1.24 --- Log message: Add Mark Schimmel. --- Diffs of the changes: (+4 -3) DevMtgMay2007.html |7 --- 1 files changed, 4 insertions(+), 3 deletions(-) Index: llvm-www/DevMtgMay2007.html diff -u llvm-www/DevMtgMay2007.html:1.23 llvm-www/DevMtgMay2007.html:1.24 --- llvm-www/DevMtgMay2007.html:1.23Mon Apr 2 01:09:54 2007 +++ llvm-www/DevMtgMay2007.html Mon Apr 2 09:28:34 2007 @@ -213,13 +213,14 @@ trtdNick Lewycky/tdtdIndependent/td/tr trtdScott Michel + 2/tdtdAerospace/td/tr trtdDevang Patel/tdtdApple, Inc./td/tr +trtdMark Schimmel/tdtdWind River/td/tr trtdReid Spencer/tdtdIndependent/td/tr trtdSarah Thompson + 1/tdtdNASA, Ames Research Center/td/tr trtdBill Wendling/tdtdApple, Inc./td/tr trtdMarcel Weiher/tdtdMetaObject/td/tr /table - pTotal confirmed attendees: 14/p - pPossible additional attendees: 7/p + pTotal confirmed attendees: 15/p + pPossible additional attendees: 6/p /div !-- *** -- @@ -229,6 +230,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/02 06:09:54 $ +br/Last modified: $Date: 2007/04/02 14:28:34 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/autoconf/configure.ac
Changes in directory llvm/autoconf:
configure.ac updated: 1.267 - 1.268
---
Log message:
Check for .svn directories too to determine if a debug build is appropriate.
---
Diffs of the changes: (+3 -3)
configure.ac |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/autoconf/configure.ac
diff -u llvm/autoconf/configure.ac:1.267 llvm/autoconf/configure.ac:1.268
--- llvm/autoconf/configure.ac:1.267Thu Mar 29 10:37:57 2007
+++ llvm/autoconf/configure.ac Mon Apr 2 10:40:39 2007
@@ -235,13 +235,13 @@
AC_SUBST(LLVM_CROSS_COMPILING, [0])
fi
-dnl Check to see if there's a CVS directory indicating that this build is
-dnl being done from a CVS checkout. This sets up several defaults for the
+dnl Check to see if there's a CVS (or .svn) directory indicating that this
+dnl build is being done from a checkout. This sets up several defaults for the
dnl command line switches. When we build with a CVS directory, we get a
dnl debug with assertions turned on. Without, we assume a source release and we
dnl get an optimized build without assertions. See --enable-optimized and
dnl --enable-assertions below
-if test -d CVS -o -d ${srcdir}/CVS; then
+if test -d CVS -o -d ${srcdir}/CVS -o -d .svn -o -d ${srcdir}/.svn;
then
cvsbuild=yes
optimize=no
AC_SUBST(CVSBUILD,[[CVSBUILD=1]])
___
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[llvm-commits] CVS: llvm/configure
Changes in directory llvm:
configure updated: 1.272 - 1.273
---
Log message:
Regenerate.
---
Diffs of the changes: (+1 -1)
configure |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/configure
diff -u llvm/configure:1.272 llvm/configure:1.273
--- llvm/configure:1.272Thu Mar 29 10:38:33 2007
+++ llvm/configure Mon Apr 2 10:41:39 2007
@@ -4535,7 +4535,7 @@
fi
-if test -d CVS -o -d ${srcdir}/CVS; then
+if test -d CVS -o -d ${srcdir}/CVS -o -d .svn -o -d ${srcdir}/.svn;
then
cvsbuild=yes
optimize=no
CVSBUILD=CVSBUILD=1
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[llvm-commits] CVS: llvm-www/img/PhotoSheng.jpg
Changes in directory llvm-www/img: PhotoSheng.jpg added (r1.1) --- Log message: Add Sheng's picture. --- Diffs of the changes: (+0 -0) PhotoSheng.jpg |0 1 files changed Index: llvm-www/img/PhotoSheng.jpg ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/docs/LinkTimeOptimization.html
Changes in directory llvm/docs: LinkTimeOptimization.html updated: 1.10 - 1.11 --- Log message: Update example notes to clarify system linker's role. --- Diffs of the changes: (+4 -2) LinkTimeOptimization.html |6 -- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/docs/LinkTimeOptimization.html diff -u llvm/docs/LinkTimeOptimization.html:1.10 llvm/docs/LinkTimeOptimization.html:1.11 --- llvm/docs/LinkTimeOptimization.html:1.10Fri Oct 27 18:06:27 2006 +++ llvm/docs/LinkTimeOptimization.html Mon Apr 2 11:54:12 2007 @@ -83,7 +83,9 @@ div class=doc_text pThe following example illustrates the advantages of LTO's integrated - approach and clean interface./p + approach and clean interface. This example requires optimization support, + using interface described in this document, from system linker. Here, + llvm-gcc4 transparantly invokes system linker. /p ul li Input source file tta.c/tt is compiled into LLVM byte code form. li Input source file ttmain.c/tt is compiled into native object code. @@ -383,7 +385,7 @@ Devang Patelbr a href=http://llvm.org;LLVM Compiler Infrastructure/abr - Last modified: $Date: 2006/10/27 23:06:27 $ + Last modified: $Date: 2007/04/02 16:54:12 $ /address /body ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/developers.txt
Changes in directory llvm-www: developers.txt updated: 1.12 - 1.13 --- Log message: Add myself to the developer's list --- Diffs of the changes: (+1 -0) developers.txt |1 + 1 files changed, 1 insertion(+) Index: llvm-www/developers.txt diff -u llvm-www/developers.txt:1.12 llvm-www/developers.txt:1.13 --- llvm-www/developers.txt:1.12Mon Apr 2 10:49:38 2007 +++ llvm-www/developers.txt Mon Apr 2 11:54:45 2007 @@ -11,6 +11,7 @@ Brian Gaeke href=http://netfiles.uiuc.edu/gaeke/www/ img=PhotoBrian.png width=155 height=163 alt=brg PatrickJenkins href=http://www.patjenk.comimg=PhotoPatJenk.jpg width=200 width=173 height=130 alt=PatJenk Brad Jones href=http://www.nondot.org/~kungfoomaster/ img=PhotoBrad.jpg width=200 height=171 alt=KungFooMaster +Anton Korobeynikovhref=mailto:asl_at_math_dot_spbu_dot_ru img=PhotoAnton.jpg width=239 height=207 alt=Anton JimLaskey href=mailto:[EMAIL PROTECTED] img=PhotoJim.jpg width=128 height=128 alt=Wickund Chris Lattner href=http://nondot.org/sabre/LLVMNotes/ img=PhotoChris.jpg width=150 height=152 alt=Sabre Tanya Lattner href=http://nondot.org/tonic/ img=PhotoTanya.jpg width=200 height=217 alt=tonic ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/img/PhotoAnton.jpg
Changes in directory llvm-www/img: PhotoAnton.jpg added (r1.1) --- Log message: Add myself to the developer's list --- Diffs of the changes: (+0 -0) PhotoAnton.jpg |0 1 files changed Index: llvm-www/img/PhotoAnton.jpg ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/DevMtgMay2007.html
Changes in directory llvm-www: DevMtgMay2007.html updated: 1.24 - 1.25 --- Log message: Add Devang's talk on the PassManager. --- Diffs of the changes: (+3 -1) DevMtgMay2007.html |4 +++- 1 files changed, 3 insertions(+), 1 deletion(-) Index: llvm-www/DevMtgMay2007.html diff -u llvm-www/DevMtgMay2007.html:1.24 llvm-www/DevMtgMay2007.html:1.25 --- llvm-www/DevMtgMay2007.html:1.24Mon Apr 2 09:28:34 2007 +++ llvm-www/DevMtgMay2007.html Mon Apr 2 11:57:52 2007 @@ -104,6 +104,8 @@ trtdNick Lewycky/td tdDesign and implementation of the PredicateSimplifier pass, or, VRP in LLVM/td + trtdDevang Patel/td +tdDemystifying the LLVM Pass Manager/td /tr /table /div @@ -230,6 +232,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/02 14:28:34 $ +br/Last modified: $Date: 2007/04/02 16:57:52 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/DevMtgMay2007.html
Changes in directory llvm-www: DevMtgMay2007.html updated: 1.25 - 1.26 --- Log message: Add Robert Hundt. --- Diffs of the changes: (+3 -2) DevMtgMay2007.html |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) Index: llvm-www/DevMtgMay2007.html diff -u llvm-www/DevMtgMay2007.html:1.25 llvm-www/DevMtgMay2007.html:1.26 --- llvm-www/DevMtgMay2007.html:1.25Mon Apr 2 11:57:52 2007 +++ llvm-www/DevMtgMay2007.html Mon Apr 2 12:18:24 2007 @@ -211,6 +211,7 @@ trtdOwen Anderson/tdtdIndependent/td/tr trtdRyan Brown/tdtdGoogle/td/tr trtdJeff Cohen/tdtdIndependent/td/tr +trtdRobert Hundt/tdtdGoogle/td/tr trtdChris Lattner/tdtdApple, Inc./td/tr trtdNick Lewycky/tdtdIndependent/td/tr trtdScott Michel + 2/tdtdAerospace/td/tr @@ -221,7 +222,7 @@ trtdBill Wendling/tdtdApple, Inc./td/tr trtdMarcel Weiher/tdtdMetaObject/td/tr /table - pTotal confirmed attendees: 15/p + pTotal confirmed attendees: 16/p pPossible additional attendees: 6/p /div @@ -232,6 +233,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/02 16:57:52 $ +br/Last modified: $Date: 2007/04/02 17:18:24 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.35 - 1.36
---
Log message:
add support for the 'w' inline asm register class.
---
Diffs of the changes: (+28 -6)
ARMISelLowering.cpp | 34 --
1 files changed, 28 insertions(+), 6 deletions(-)
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.35
llvm/lib/Target/ARM/ARMISelLowering.cpp:1.36
--- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.35Sun Apr 1 20:30:03 2007
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp Mon Apr 2 12:24:08 2007
@@ -1598,6 +1598,7 @@
switch (Constraint[0]) {
default: break;
case 'l': return C_RegisterClass;
+case 'w': return C_RegisterClass;
}
}
return TargetLowering::getConstraintType(Constraint);
@@ -1609,12 +1610,17 @@
if (Constraint.size() == 1) {
// GCC RS6000 Constraint Letters
switch (Constraint[0]) {
- case 'l':
- // FIXME: in thumb mode, 'l' is only low-regs.
- // FALL THROUGH.
- case 'r':
-return std::make_pair(0U, ARM::GPRRegisterClass);
-break;
+case 'l':
+// FIXME: in thumb mode, 'l' is only low-regs.
+// FALL THROUGH.
+case 'r':
+ return std::make_pair(0U, ARM::GPRRegisterClass);
+case 'w':
+ if (VT == MVT::f32)
+return std::make_pair(0U, ARM::SPRRegisterClass);
+ if (VT == MVT::f32)
+return std::make_pair(0U, ARM::DPRRegisterClass);
+ break;
}
}
return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
@@ -1634,6 +1640,22 @@
ARM::R4, ARM::R5, ARM::R6, ARM::R7,
ARM::R8, ARM::R9, ARM::R10, ARM::R11,
ARM::R12, ARM::LR, 0);
+ case 'w':
+if (VT == MVT::f32)
+ return make_vectorunsigned(ARM::S0, ARM::S1, ARM::S2, ARM::S3,
+ ARM::S4, ARM::S5, ARM::S6, ARM::S7,
+ ARM::S8, ARM::S9, ARM::S10, ARM::S11,
+ ARM::S12,ARM::S13,ARM::S14,ARM::S15,
+ ARM::S16,ARM::S17,ARM::S18,ARM::S19,
+ ARM::S20,ARM::S21,ARM::S22,ARM::S23,
+ ARM::S24,ARM::S25,ARM::S26,ARM::S27,
+ ARM::S28,ARM::S29,ARM::S30,ARM::S31, 0);
+if (VT == MVT::f64)
+ return make_vectorunsigned(ARM::D0, ARM::D1, ARM::D2, ARM::D3,
+ ARM::D4, ARM::D5, ARM::D6, ARM::D7,
+ ARM::D8, ARM::D9, ARM::D10,ARM::D11,
+ ARM::D12,ARM::D13,ARM::D14,ARM::D15, 0);
+ break;
}
return std::vectorunsigned();
___
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llvm-commits@cs.uiuc.edu
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[llvm-commits] CVS: llvm-www/DevMtgMay2007.html
Changes in directory llvm-www: DevMtgMay2007.html updated: 1.26 - 1.27 --- Log message: Get the attendee count correct. Add Reid's talk on HLVM. --- Diffs of the changes: (+4 -3) DevMtgMay2007.html |7 --- 1 files changed, 4 insertions(+), 3 deletions(-) Index: llvm-www/DevMtgMay2007.html diff -u llvm-www/DevMtgMay2007.html:1.26 llvm-www/DevMtgMay2007.html:1.27 --- llvm-www/DevMtgMay2007.html:1.26Mon Apr 2 12:18:24 2007 +++ llvm-www/DevMtgMay2007.html Mon Apr 2 12:47:52 2007 @@ -107,6 +107,7 @@ trtdDevang Patel/td tdDemystifying the LLVM Pass Manager/td /tr + trtdReid Spencer/tdtdThe Goal of HLVM/td/tr /table /div @@ -216,13 +217,13 @@ trtdNick Lewycky/tdtdIndependent/td/tr trtdScott Michel + 2/tdtdAerospace/td/tr trtdDevang Patel/tdtdApple, Inc./td/tr -trtdMark Schimmel/tdtdWind River/td/tr +trtdMark Schimmel + 1/tdtdWind River/td/tr trtdReid Spencer/tdtdIndependent/td/tr trtdSarah Thompson + 1/tdtdNASA, Ames Research Center/td/tr trtdBill Wendling/tdtdApple, Inc./td/tr trtdMarcel Weiher/tdtdMetaObject/td/tr /table - pTotal confirmed attendees: 16/p + pTotal confirmed attendees: 18/p pPossible additional attendees: 6/p /div @@ -233,6 +234,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/02 17:18:24 $ +br/Last modified: $Date: 2007/04/02 17:47:52 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/SVNMigration.html
Changes in directory llvm-www: SVNMigration.html added (r1.1) --- Log message: Add a page for tracking information about the CVS - SVN migration. --- Diffs of the changes: (+122 -0) SVNMigration.html | 122 ++ 1 files changed, 122 insertions(+) Index: llvm-www/SVNMigration.html diff -c /dev/null llvm-www/SVNMigration.html:1.1 *** /dev/null Mon Apr 2 13:04:29 2007 --- llvm-www/SVNMigration.html Mon Apr 2 13:04:19 2007 *** *** 0 --- 1,122 + !--#include virtual=header.incl -- + !-- *** -- + div class=www_sectiontitleSubversion Migration Notes/div + div class=www_text + pThis document contains notes about the planned migration of the CVS code + repository to Subversion./p + /div + + !-- *** -- + div class=www_sectiontitlea name=branchesBranch Status/a/div + div class=www_text + pThe existing branches have been categorized as shown in the table below. If + a branch is scheduled to be removed and you need it, please let + a href=mailto:[EMAIL PROTECTED]Reid/a know as soon as + possible./p + h3Branches To Be Kept/h3 + table class=www + trthName/ththDescription/th/tr + trtdrelease_*/tdtdRelease branches (10 total)/td/tr + trtdsee/tdtdBranch Vikram's group is using for Secure + Code?/td/tr + trtdparallel/tdtdBranch for parallel features? (not sure)/td/tr + trtdvector_llvm/tdtdBranch for vector stuff? (not sure)/td/tr + /table + + h3Branches To Be Removed/h3 + table class=www + trthName/ththDescription/th/tr + trtdautoconf/td + tdappears to be an early version, even before the autoconf + directory existed/td + /tr + trtdbug_122/td + tda bug fix branch that I created long ago. Its not needed any more. + /td + /tr + trtdjrsdev/td + tdhas exactly 2 header files in it, one for reoptimizer, the other for + SparcV9/td + /tr + trtdllvm/td + tdappears to be a *very* early version (docs has only LangRef.html, + and only 3 tools)/td + /tr + trtdregalloc_linearscan/td + tdhas only 3 old header files in it/td + /tr + trtdPowerPC_0/td + tdAppears to be an early version of the PowerPC target. Seems not + important to keep it/td + /tr + trtdpre-11, prerelease_*/td + tdJohn created these as the first step towards a release, but it + hasn't been done that way since (there's no prerelease_12 or later). + I think its not important to retain these./td + /tr + trtdSignlessTypes/td + tdReid created this and doesn't need/want it/td + /tr + trtdunlabelled-*/td + tdthese three appear to be mistakes (only a few files each)/td + /tr + /table + /div + + !-- *** -- + div class=www_sectiontitlea name=tagsTag Status/a/div + div class=www_text + pBelow are some tables of tag names to be kept or removed when the migration + occurs./p + h3Tags To Be Kept/h3 + table class=www + trthName/ththDescription/th/tr + trtdjtc/tdtdAssuming this is John Criswell's tag and he wants + it/td + /tr + trtdjtcllva/tdtdAssuming this is the LLVA tag/td/tr + trtdPARALLEL_ROOT/tdtdRoot of the parallel branch/td/tr + trtdRELEASE_*/tdtdThese are the final release tags (7 total)/td + /tr + trtdROOT_RELEASE_*/tdtdThese are the original release tags (9 total) + /td + /tr + trtdRC15/tdtdThis should have been ROOT_RELEASE_15, I think/td + /tr + trtdstart/tdtdThis seems to be the very first tag. It references an + ancient version of llvm and is only of historical interest/td/tr + /table + h3Tags To Be Removed/h3 + table class=www + trthName/ththDescription/th/tr + trtdbyebye/tdtdContains just the old lib/Analysis/DataStructure + stuff. It is inappropriately named and definitely not needed/td/tr + trtdLLVM_PRE111/tdtdThis is a pre-release tag to go with a branch + we're planning to remove./td + /tr + trtdnew_merge_vector/tdtdAppears to be a merging tag. Pretty sure + its unneeded at this point/td + /tr + trtdPowerPC_0_0/tdtdRoot of a branch we're deleting/td/tr + trtdPRE10/tdtdRoot of a branch we're deleting/td/tr + trtdPRE101/tdtdRoot of a branch we're deleting/td/tr + trtdPRE11/tdtdRoot of a branch we're deleting/td/tr + trtdPRE11_ROOT/tdtdRoot of a branch we're deleting/td/tr + trtdPRE2_ROOT/tdtdRoot of a branch we're deleting/td/tr + trtdregalloc_linearscan_mergein_main/tdtdMerge point of branch + we're deleting/td/tr + trtdROOT_VLLVM/tdtdAppears to be a typo/td/tr + trtdST_incr_*/tdtdSignlessTypes tags, not needed any more/td/tr + /table + + /div + !--
[llvm-commits] CVS: llvm-www/DevMtgMay2007.html
Changes in directory llvm-www: DevMtgMay2007.html updated: 1.27 - 1.28 --- Log message: Add Devang's discussion topic and break discussion topics into their own group. --- Diffs of the changes: (+18 -6) DevMtgMay2007.html | 24 ++-- 1 files changed, 18 insertions(+), 6 deletions(-) Index: llvm-www/DevMtgMay2007.html diff -u llvm-www/DevMtgMay2007.html:1.27 llvm-www/DevMtgMay2007.html:1.28 --- llvm-www/DevMtgMay2007.html:1.27Mon Apr 2 12:47:52 2007 +++ llvm-www/DevMtgMay2007.html Mon Apr 2 13:16:34 2007 @@ -9,6 +9,7 @@ lia href=#sess2Session 2: Learning LLVM/a/li lia href=#sess3Session 3: Using LLVM/a/li lia href=#sess4Session 4: Improving LLVM/a/li +lia href=#discussDiscussion Topics Submitted/a/li /ol/li lia href=#travelTravel Tips/a ol @@ -136,14 +137,23 @@ wishful fantasies. What do you think LLVM lacks? Where does it need to go from here? This session will consist of a 5 minute presentation by the issue originator followed by 10 minutes of discussion. This will allow 6 issues to - be discussed in this time slot. + be discussed in this time slot./p table class=www - trthSuggested By/ththIssue or Discussion Topic/td/tr + trthSuggested By/ththIssue Description/td/tr trtdOwen Anderson/tdtdbIntegration of HLVM into LLVM/b - its - future as an LLVM subproject, and plans for making LLVM more accessible - to scripting and higher level language front ends./td/tr +future as an LLVM subproject, and plans for making LLVM more accessible +to scripting and higher level language front ends./td/tr +/table +/div + +div class=www_subsectiona name=discussDiscussion Topics Submitted/a/div +div class=www_text + pIn addition to the planned sessions above, the following discussion topics + have been submitted./p +table class=www + trthSuggested By/ththIssue or Discussion Topic/td/tr trtdOwen Anderson/tdtdbFuture development practices/b: with a - burgeoning number of clients and wider adoption, do we want more orgnized + burgeoning number of clients and wider adoption, do we want more organized development practices? i.e. release focuses or something?/td/tr trtdOwen Anderson/tdtdbAdoption Goals/b: while our adoption has increased greatly recently, we're still tiny compared to GCC. What are our @@ -153,6 +163,8 @@ given us some great things, but sometimes secrecy makes things difficult for those not involved; should there be an LLVM Foundation in our (distant?) future?/td/tr + trtdDevang Patel/tdtdbUsing Bugpoint/b: How to use the bugpoint + tool to identifiy misoptimizations and bad code gen bugs./td/tr /table /div @@ -234,6 +246,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/02 17:47:52 $ +br/Last modified: $Date: 2007/04/02 18:16:34 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
Changes in directory llvm/test/CodeGen/ARM:
2007-04-02-RegScavengerAssert.ll added (r1.1)
---
Log message:
New test case.
---
Diffs of the changes: (+55 -0)
2007-04-02-RegScavengerAssert.ll | 55 +++
1 files changed, 55 insertions(+)
Index: llvm/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
diff -c /dev/null llvm/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll:1.1
*** /dev/null Mon Apr 2 13:47:23 2007
--- llvm/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll Mon Apr 2
13:47:13 2007
***
*** 0
--- 1,55
+ ; RUN: llvm-as %s | llc -march=arm -mtriple=arm-apple-darwin
+
+ %struct.H_TBL = type { [17 x i8], [256 x i8], i32 }
+ %struct.Q_TBL = type { [64 x i16], i32 }
+ %struct.anon = type { [80 x i8] }
+ %struct.X_c_coef_ccler = type { void (%struct.X_Y*, i32)*, i32
(%struct.X_Y*, i8***)* }
+ %struct.X_c_main_ccler = type { void (%struct.X_Y*, i32)*, void
(%struct.X_Y*, i8**, i32*, i32)* }
+ %struct.X_c_prep_ccler = type { void (%struct.X_Y*, i32)*, void
(%struct.X_Y*, i8**, i32*, i32, i8***, i32*, i32)* }
+ %struct.X_color_converter = type { void (%struct.X_Y*)*, void
(%struct.X_Y*, i8**, i8***, i32, i32)* }
+ %struct.X_common_struct = type { %struct.X_error_mgr*,
%struct.X_memory_mgr*, %struct.X_progress_mgr*, i8*, i32, i32 }
+ %struct.X_comp_master = type { void (%struct.X_Y*)*, void
(%struct.X_Y*)*, void (%struct.X_Y*)*, i32, i32 }
+ %struct.X_component_info = type { i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Q_TBL*, i8*
}
+ %struct.X_Y = type { %struct.X_error_mgr*, %struct.X_memory_mgr*,
%struct.X_progress_mgr*, i8*, i32, i32, %struct.X_destination_mgr*, i32, i32,
i32, i32, double, i32, i32, i32, %struct.X_component_info*, [4 x
%struct.Q_TBL*], [4 x %struct.H_TBL*], [4 x %struct.H_TBL*], [16 x i8], [16 x
i8], [16 x i8], i32, %struct.X_scan_info*, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i8, i8, i8, i16, i16, i32, i32, i32, i32, i32, i32, i32, [4 x
%struct.X_component_info*], i32, i32, i32, [10 x i32], i32, i32, i32, i32,
%struct.X_comp_master*, %struct.X_c_main_ccler*, %struct.X_c_prep_ccler*,
%struct.X_c_coef_ccler*, %struct.X_marker_writer*, %struct.X_color_converter*,
%struct.X_downssr*, %struct.X_forward_D*, %struct.X_entropy_en*,
%struct.X_scan_info*, i32 }
+ %struct.X_destination_mgr = type { i8*, i32, void (%struct.X_Y*)*, i32
(%struct.X_Y*)*, void (%struct.X_Y*)* }
+ %struct.X_downssr = type { void (%struct.X_Y*)*, void (%struct.X_Y*,
i8***, i32, i8***, i32)*, i32 }
+ %struct.X_entropy_en = type { void (%struct.X_Y*, i32)*, i32
(%struct.X_Y*, [64 x i16]**)*, void (%struct.X_Y*)* }
+ %struct.X_error_mgr = type { void (%struct.X_common_struct*)*, void
(%struct.X_common_struct*, i32)*, void (%struct.X_common_struct*)*, void
(%struct.X_common_struct*, i8*)*, void (%struct.X_common_struct*)*, i32,
%struct.anon, i32, i32, i8**, i32, i8**, i32, i32 }
+ %struct.X_forward_D = type { void (%struct.X_Y*)*, void (%struct.X_Y*,
%struct.X_component_info*, i8**, [64 x i16]*, i32, i32, i32)* }
+ %struct.X_marker_writer = type { void (%struct.X_Y*)*, void
(%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void
(%struct.X_Y*)*, void (%struct.X_Y*, i32, i32)*, void (%struct.X_Y*, i32)* }
+ %struct.X_memory_mgr = type { i8* (%struct.X_common_struct*, i32,
i32)*, i8* (%struct.X_common_struct*, i32, i32)*, i8**
(%struct.X_common_struct*, i32, i32, i32)*, [64 x i16]**
(%struct.X_common_struct*, i32, i32, i32)*, %struct.jvirt_sAY_cc*
(%struct.X_common_struct*, i32, i32, i32, i32, i32)*, %struct.jvirt_bAY_cc*
(%struct.X_common_struct*, i32, i32, i32, i32, i32)*, void
(%struct.X_common_struct*)*, i8** (%struct.X_common_struct*,
%struct.jvirt_sAY_cc*, i32, i32, i32)*, [64 x i16]** (%struct.X_common_struct*,
%struct.jvirt_bAY_cc*, i32, i32, i32)*, void (%struct.X_common_struct*, i32)*,
void (%struct.X_common_struct*)*, i32, i32 }
+ %struct.X_progress_mgr = type { void (%struct.X_common_struct*)*, i32,
i32, i32, i32 }
+ %struct.X_scan_info = type { i32, [4 x i32], i32, i32, i32, i32 }
+ %struct.jvirt_bAY_cc = type opaque
+ %struct.jvirt_sAY_cc = type opaque
+
+ define void @test(%struct.X_Y* %cinfo) {
+ entry:
+ br i1 false, label %bb.preheader, label %return
+
+ bb.preheader: ; preds = %entry
+ %tbl.014.us = load i32* null; i32 [#uses=1]
+ br i1 false, label %cond_next.us, label %bb
+
+ cond_next51.us: ; preds = %cond_next.us,
%cond_true33.us.cond_true46.us_crit_edge
+ %htblptr.019.1.us = phi %struct.H_TBL** [ %tmp37.us,
%cond_true33.us.cond_true46.us_crit_edge ], [ %tmp37.us, %cond_next.us ]
; %struct.H_TBL** [#uses=0]
+ ret void
+
+ cond_true33.us.cond_true46.us_crit_edge: ; preds = %cond_next.us
+
[llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.231 - 1.232
---
Log message:
Ugh. Copy coalescer does not update register numbers.
---
Diffs of the changes: (+15 -2)
LiveIntervalAnalysis.cpp | 17 +++--
1 files changed, 15 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.231
llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.232
--- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.231 Fri Mar 30 15:18:35 2007
+++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Apr 2 13:49:18 2007
@@ -945,7 +945,7 @@
} else {
MachineInstr *SrcMI = getInstructionFromIndex(SrcStart);
if (SrcMI) {
- MachineOperand *mops = SrcMI-findRegisterDefOperand(SrcReg);
+ MachineOperand *mops = findDefOperand(SrcMI, repSrcReg);
if (mops)
// A dead def should have a single cycle interval.
++RemoveStart;
@@ -1022,7 +1022,7 @@
} else {
MachineInstr *SrcMI = getInstructionFromIndex(SrcStart);
if (SrcMI) {
- MachineOperand *mops = SrcMI-findRegisterDefOperand(SrcReg);
+ MachineOperand *mops = findDefOperand(SrcMI, repSrcReg);
if (mops)
mops-setIsDead();
}
@@ -1617,6 +1617,19 @@
return NULL;
}
+
+/// findDefOperand - Returns the MachineOperand that is a def of the specific
+/// register. It returns NULL if the def is not found.
+MachineOperand *LiveIntervals::findDefOperand(MachineInstr *MI, unsigned Reg) {
+ for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
+MachineOperand MO = MI-getOperand(i);
+if (MO.isReg() MO.isDef()
+mri_-regsOverlap(rep(MO.getReg()), Reg))
+ return MO;
+ }
+ return NULL;
+}
+
/// unsetRegisterKill - Unset IsKill property of all uses of specific register
/// of the specific instruction.
void LiveIntervals::unsetRegisterKill(MachineInstr *MI, unsigned Reg) {
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h
Changes in directory llvm/include/llvm/CodeGen: LiveIntervalAnalysis.h updated: 1.76 - 1.77 --- Log message: Ugh. Copy coalescer does not update register numbers. --- Diffs of the changes: (+4 -0) LiveIntervalAnalysis.h |4 1 files changed, 4 insertions(+) Index: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h diff -u llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.76 llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.77 --- llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.76 Wed Feb 28 20:03:03 2007 +++ llvm/include/llvm/CodeGen/LiveIntervalAnalysis.hMon Apr 2 13:49:18 2007 @@ -267,6 +267,10 @@ MachineInstr *lastRegisterUse(unsigned Reg, unsigned Start, unsigned End, MachineOperand *MOU); +/// findDefOperand - Returns the MachineOperand that is a def of the specific +/// register. It returns NULL if the def is not found. +MachineOperand *findDefOperand(MachineInstr *MI, unsigned Reg); + /// unsetRegisterKill - Unset IsKill property of all uses of the specific /// register of the specific instruction. void unsetRegisterKill(MachineInstr *MI, unsigned Reg); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp
Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.36 - 1.37 --- Log message: fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales to be folded into non-store instructions. --- Diffs of the changes: (+20 -4) ARMISelLowering.cpp | 24 1 files changed, 20 insertions(+), 4 deletions(-) Index: llvm/lib/Target/ARM/ARMISelLowering.cpp diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.36 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.37 --- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.36Mon Apr 2 12:24:08 2007 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp Mon Apr 2 13:51:18 2007 @@ -1332,6 +1332,15 @@ // r + r if (((unsigned)AM.HasBaseReg + AM.Scale) = 2) return true; + +case MVT::isVoid: + // Note, we allow void uses (basically, uses that aren't loads or + // stores), because arm allows folding a scale into many arithmetic + // operations. This should be made more precise and revisited later. + + // Allow r imm, but the imm has to be a multiple of two. + if (AM.Scale 1) return false; + return isPowerOf2_32(AM.Scale); } break; } @@ -1413,12 +1422,19 @@ case MVT::i1: case MVT::i8: case MVT::i32: -// r + r -if (S == 2) - return true; -// r + r imm +// Allow: r + r +// Allow: r imm +// Allow: r + r imm S = ~1; return isPowerOf2_32(S); + case MVT::isVoid: +// Note, we allow void uses (basically, uses that aren't loads or +// stores), because arm allows folding a scale into many arithmetic +// operations. This should be made more precise and revisited later. + +// Allow r imm, but the imm has to be a multiple of two. +if (S 1) return false; +return isPowerOf2_32(S); } } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/SVNMigration.html
Changes in directory llvm-www: SVNMigration.html updated: 1.1 - 1.2 --- Log message: We don't need to keep the root version tag for branches because SVN does this automatically. --- Diffs of the changes: (+8 -7) SVNMigration.html | 15 --- 1 files changed, 8 insertions(+), 7 deletions(-) Index: llvm-www/SVNMigration.html diff -u llvm-www/SVNMigration.html:1.1 llvm-www/SVNMigration.html:1.2 --- llvm-www/SVNMigration.html:1.1 Mon Apr 2 13:04:19 2007 +++ llvm-www/SVNMigration.html Mon Apr 2 13:52:38 2007 @@ -75,13 +75,8 @@ it/td /tr trtdjtcllva/tdtdAssuming this is the LLVA tag/td/tr -trtdPARALLEL_ROOT/tdtdRoot of the parallel branch/td/tr trtdRELEASE_*/tdtdThese are the final release tags (7 total)/td /tr -trtdROOT_RELEASE_*/tdtdThese are the original release tags (9 total) - /td -/tr -trtdRC15/tdtdThis should have been ROOT_RELEASE_15, I think/td /tr trtdstart/tdtdThis seems to be the very first tag. It references an ancient version of llvm and is only of historical interest/td/tr @@ -98,6 +93,7 @@ its unneeded at this point/td /tr trtdPowerPC_0_0/tdtdRoot of a branch we're deleting/td/tr +trtdPARALLEL_ROOT/tdtdRoot of the parallel branch/td/tr trtdPRE10/tdtdRoot of a branch we're deleting/td/tr trtdPRE101/tdtdRoot of a branch we're deleting/td/tr trtdPRE11/tdtdRoot of a branch we're deleting/td/tr @@ -105,7 +101,12 @@ trtdPRE2_ROOT/tdtdRoot of a branch we're deleting/td/tr trtdregalloc_linearscan_mergein_main/tdtdMerge point of branch we're deleting/td/tr -trtdROOT_VLLVM/tdtdAppears to be a typo/td/tr +trtdRC15/tdtdThis should have been ROOT_RELEASE_15, I think/td +trtdROOT_RELEASE_*/tdtdThese are the root version tags for release +branches (9 total). They aren't needed in SVN because of the way SVN +handles branches./td +/tr +trtdROOT_VLLVM/tdtdThe root version tag for the vector_llvm branch./td/tr trtdST_incr_*/tdtdSignlessTypes tags, not needed any more/td/tr /table @@ -117,6 +118,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/02 18:04:19 $ +br/Last modified: $Date: 2007/04/02 18:52:38 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/DevMtgMay2007.html
Changes in directory llvm-www: DevMtgMay2007.html updated: 1.28 - 1.29 --- Log message: Add Christopher Lamb and his discussion topic. --- Diffs of the changes: (+9 -3) DevMtgMay2007.html | 12 +--- 1 files changed, 9 insertions(+), 3 deletions(-) Index: llvm-www/DevMtgMay2007.html diff -u llvm-www/DevMtgMay2007.html:1.28 llvm-www/DevMtgMay2007.html:1.29 --- llvm-www/DevMtgMay2007.html:1.28Mon Apr 2 13:16:34 2007 +++ llvm-www/DevMtgMay2007.html Mon Apr 2 14:02:02 2007 @@ -139,10 +139,15 @@ originator followed by 10 minutes of discussion. This will allow 6 issues to be discussed in this time slot./p table class=www - trthSuggested By/ththIssue Description/td/tr + trthSuggested By/ththIssue Description/th/tr trtdOwen Anderson/tdtdbIntegration of HLVM into LLVM/b - its future as an LLVM subproject, and plans for making LLVM more accessible to scripting and higher level language front ends./td/tr + trtdChristopher Lamb/tdtdbConcurrency Primitives/b: for multi-threaded + shared memory models. Though I don't claim to be any sort of expert + myself, I've spent some time looking over the Java Memory Model revision + and discussions and I think it would be worth discussing similar issues + with regards to LLVM./td/tr /table /div @@ -225,6 +230,7 @@ trtdRyan Brown/tdtdGoogle/td/tr trtdJeff Cohen/tdtdIndependent/td/tr trtdRobert Hundt/tdtdGoogle/td/tr +trtdChristopher Lamb/tdtdIndependent/td/tr trtdChris Lattner/tdtdApple, Inc./td/tr trtdNick Lewycky/tdtdIndependent/td/tr trtdScott Michel + 2/tdtdAerospace/td/tr @@ -235,7 +241,7 @@ trtdBill Wendling/tdtdApple, Inc./td/tr trtdMarcel Weiher/tdtdMetaObject/td/tr /table - pTotal confirmed attendees: 18/p + pTotal confirmed attendees: 19/p pPossible additional attendees: 6/p /div @@ -246,6 +252,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/02 18:16:34 $ +br/Last modified: $Date: 2007/04/02 19:02:02 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/DevMtgMay2007.html
Changes in directory llvm-www: DevMtgMay2007.html updated: 1.29 - 1.30 --- Log message: Fix Christopher Lamb's affiliation. --- Diffs of the changes: (+2 -2) DevMtgMay2007.html |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/DevMtgMay2007.html diff -u llvm-www/DevMtgMay2007.html:1.29 llvm-www/DevMtgMay2007.html:1.30 --- llvm-www/DevMtgMay2007.html:1.29Mon Apr 2 14:02:02 2007 +++ llvm-www/DevMtgMay2007.html Mon Apr 2 14:14:17 2007 @@ -230,7 +230,7 @@ trtdRyan Brown/tdtdGoogle/td/tr trtdJeff Cohen/tdtdIndependent/td/tr trtdRobert Hundt/tdtdGoogle/td/tr -trtdChristopher Lamb/tdtdIndependent/td/tr +trtdChristopher Lamb/tdtdAgeia Technologies, Inc./td/tr trtdChris Lattner/tdtdApple, Inc./td/tr trtdNick Lewycky/tdtdIndependent/td/tr trtdScott Michel + 2/tdtdAerospace/td/tr @@ -252,6 +252,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/02 19:02:02 $ +br/Last modified: $Date: 2007/04/02 19:14:17 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] Patch resubmit: ROTL/ROTR cleanups
On Mar 30, 2007, at 12:02 PM, Scott Michel wrote:
Spotted what was probably a long-standing bug, since some of my
cleanups
were simple substitutions.
Sorry for the delay. In general, if you keep the changes as simple
and disjoint as possible, I'm more likely to look at them soon :).
Here you could split up the allow custom legalize of rotates part
from the introduce some temporary vars part from match ext rotate
cases part.
-scooter
Index: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
===
--- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (.../trunk) (revision
2119)
+++ lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (.../branches/llvm-
spu) (revision 2119)
@@ -2683,10 +2683,24 @@
case ISD::ROTR:
Tmp1 = LegalizeOp(Node-getOperand(0)); // LHS
Tmp2 = LegalizeOp(Node-getOperand(1)); // RHS
-
-assert(TLI.isOperationLegal(Node-getOpcode(), Node-
getValueType(0))
- Cannot handle this yet!);
Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2);
+switch (TLI.getOperationAction(Node-getOpcode(), Node-
getValueType(0))) {
+default:
+ assert(0 ROTL/ROTR legalize operation not supported);
+ break;
+case TargetLowering::Legal:
+ break;
+case TargetLowering::Custom:
+ Tmp1 = TLI.LowerOperation(Result, DAG);
+ if (Tmp1.Val) Result = Tmp1;
+ break;
+case TargetLowering::Promote:
+ assert(0 Do not know how to promote ROTL/ROTR);
+ break;
+case TargetLowering::Expand:
+ assert(0 Do not know how to expand ROTL/ROTR);
+ break;
+}
break;
Looks good.
case ISD::BSWAP:
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp (.../trunk) (revision
2119)
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp (.../branches/llvm-
spu) (revision 2119)
@@ -1488,23 +1488,24 @@
}
unsigned OpSizeInBits = MVT::getSizeInBits(VT);
+ SDOperand LHSShiftArg = LHSShift.getOperand(0);
+ SDOperand LHSShiftAmt = LHSShift.getOperand(1);
+ SDOperand RHSShiftAmt = RHSShift.getOperand(1);
// fold (or (shl x, C1), (srl x, C2)) - (rotl x, C1)
// fold (or (shl x, C1), (srl x, C2)) - (rotr x, C2)
- if (LHSShift.getOperand(1).getOpcode() == ISD::Constant
- RHSShift.getOperand(1).getOpcode() == ISD::Constant) {
-uint64_t LShVal = castConstantSDNode(LHSShift.getOperand(1))-
getValue();
-uint64_t RShVal = castConstantSDNode(RHSShift.getOperand(1))-
getValue();
+ if (LHSShiftAmt.getOpcode() == ISD::Constant
+ RHSShiftAmt.getOpcode() == ISD::Constant) {
+uint64_t LShVal = castConstantSDNode(LHSShiftAmt)-getValue();
+uint64_t RShVal = castConstantSDNode(RHSShiftAmt)-getValue();
if ((LShVal + RShVal) != OpSizeInBits)
return 0;
SDOperand Rot;
if (HasROTL)
- Rot = DAG.getNode(ISD::ROTL, VT, LHSShift.getOperand(0),
-LHSShift.getOperand(1));
+ Rot = DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt);
else
- Rot = DAG.getNode(ISD::ROTR, VT, LHSShift.getOperand(0),
-RHSShift.getOperand(1));
+ Rot = DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt);
// If there is an AND of either shifted operand, apply it to
the result.
if (LHSMask.Val || RHSMask.Val) {
Looks fine.
@@ -1532,35 +1533,71 @@
// fold (or (shl x, y), (srl x, (sub 32, y))) - (rotl x, y)
// fold (or (shl x, y), (srl x, (sub 32, y))) - (rotr x, (sub
32, y))
- if (RHSShift.getOperand(1).getOpcode() == ISD::SUB
- LHSShift.getOperand(1) == RHSShift.getOperand(1).getOperand
(1)) {
+ if (RHSShiftAmt.getOpcode() == ISD::SUB
+ LHSShiftAmt == RHSShiftAmt.getOperand(1)) {
if (ConstantSDNode *SUBC =
- dyn_castConstantSDNode(RHSShift.getOperand
(1).getOperand(0))) {
+ dyn_castConstantSDNode(RHSShiftAmt.getOperand(0))) {
if (SUBC-getValue() == OpSizeInBits)
if (HasROTL)
- return DAG.getNode(ISD::ROTL, VT, LHSShift.getOperand(0),
- LHSShift.getOperand(1)).Val;
+ return DAG.getNode(ISD::ROTL, VT, LHSShiftArg,
LHSShiftAmt).Val;
else
- return DAG.getNode(ISD::ROTR, VT, LHSShift.getOperand(0),
- LHSShift.getOperand(1)).Val;
+ return DAG.getNode(ISD::ROTR, VT, LHSShiftArg,
RHSShiftAmt).Val;
}
}
ok
// fold (or (shl x, (sub 32, y)), (srl x, r)) - (rotr x, y)
// fold (or (shl x, (sub 32, y)), (srl x, r)) - (rotl x, (sub
32, y))
- if (LHSShift.getOperand(1).getOpcode() == ISD::SUB
- RHSShift.getOperand(1) == LHSShift.getOperand(1).getOperand
(1)) {
+ if (LHSShiftAmt.getOpcode() == ISD::SUB
+ RHSShiftAmt == LHSShiftAmt.getOperand(1)) {
if (ConstantSDNode *SUBC
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM: ARMConstantIslandPass.cpp updated: 1.33 - 1.34 --- Log message: fix off by 1 error in displacement computation --- Diffs of the changes: (+5 -0) ARMConstantIslandPass.cpp |5 + 1 files changed, 5 insertions(+) Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.33 llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.34 --- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.33 Thu Mar 1 02:26:31 2007 +++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Mon Apr 2 15:31:06 2007 @@ -593,6 +593,11 @@ Water-begin()-getOpcode() != ARM::CONSTPOOL_ENTRY)) CPEOffset += 2; + // If the CPE is to be inserted before the instruction, that will raise + // the offset of the instruction. + if (CPEOffset UserOffset) +UserOffset += isThumb ? 2 : 4; + return OffsetIsInRange (UserOffset, CPEOffset, MaxDisp, !isThumb); } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/pubs/2007-03-12-BossaLLVMIntro.pdf
Changes in directory llvm-www/pubs: 2007-03-12-BossaLLVMIntro.pdf updated: 1.2 - 1.3 --- Log message: this time with less crashing? --- Diffs of the changes: (+0 -0) 2007-03-12-BossaLLVMIntro.pdf |0 1 files changed Index: llvm-www/pubs/2007-03-12-BossaLLVMIntro.pdf ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
Changes in directory llvm/test/CodeGen/X86: 2007-03-24-InlineAsmVectorOp.ll updated: 1.2 - 1.3 --- Log message: fix this testcase on ppc hosts --- Diffs of the changes: (+1 -1) 2007-03-24-InlineAsmVectorOp.ll |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll diff -u llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll:1.2 llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll:1.3 --- llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll:1.2 Tue Mar 27 21:38:26 2007 +++ llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll Mon Apr 2 15:39:48 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as %s | llc -march=x86 | grep 'cmpltsd %xmm0, %xmm0' +; RUN: llvm-as %s | llc -mcpu=yonah -march=x86 | grep 'cmpltsd %xmm0, %xmm0' target datalayout = e-p:32:32 target triple = i686-apple-darwin9 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Transforms/InstCombine/bitcount.ll
Changes in directory llvm/test/Transforms/InstCombine: bitcount.ll updated: 1.2 - 1.3 --- Log message: fix this testcase so it passes --- Diffs of the changes: (+2 -2) bitcount.ll |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/test/Transforms/InstCombine/bitcount.ll diff -u llvm/test/Transforms/InstCombine/bitcount.ll:1.2 llvm/test/Transforms/InstCombine/bitcount.ll:1.3 --- llvm/test/Transforms/InstCombine/bitcount.ll:1.2Sun Apr 1 22:24:47 2007 +++ llvm/test/Transforms/InstCombine/bitcount.llMon Apr 2 15:46:28 2007 @@ -1,6 +1,6 @@ ; Tests to make sure bit counts of constants are folded -; RUN: llvm-as %s | opt -instcombine | llvm-dis -o /dev/null -f -; RUN: llvm-as %s | opt -instcombine | llvm-dis | not grep 'llvm.ct' +; RUN: llvm-as %s | opt -instcombine | llvm-dis | grep 'ret i32 19' +; RUN: llvm-as %s | opt -instcombine | llvm-dis | grep -v declare | not grep 'llvm.ct' declare i32 @llvm.ctpop.i31(i31 %val) declare i32 @llvm.cttz.i32(i32 %val) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp LegalizeDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.284 - 1.285
LegalizeDAG.cpp updated: 1.485 - 1.486
---
Log message:
1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL.
2. Help DAGCombiner recognize zero/sign/any-extended versions of ROTR and ROTL
patterns. This was motivated by the X86/rotate.ll testcase, which should now
generate code for other platforms (and soon-to-come platforms.) Rewrote code
slightly to make it easier to read.
---
Diffs of the changes: (+76 -25)
DAGCombiner.cpp | 81
LegalizeDAG.cpp | 20 +++--
2 files changed, 76 insertions(+), 25 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.284
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.285
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.284 Fri Mar 30 16:38:07 2007
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Apr 2 16:36:32 2007
@@ -1488,23 +1488,24 @@
}
unsigned OpSizeInBits = MVT::getSizeInBits(VT);
+ SDOperand LHSShiftArg = LHSShift.getOperand(0);
+ SDOperand LHSShiftAmt = LHSShift.getOperand(1);
+ SDOperand RHSShiftAmt = RHSShift.getOperand(1);
// fold (or (shl x, C1), (srl x, C2)) - (rotl x, C1)
// fold (or (shl x, C1), (srl x, C2)) - (rotr x, C2)
- if (LHSShift.getOperand(1).getOpcode() == ISD::Constant
- RHSShift.getOperand(1).getOpcode() == ISD::Constant) {
-uint64_t LShVal = castConstantSDNode(LHSShift.getOperand(1))-getValue();
-uint64_t RShVal = castConstantSDNode(RHSShift.getOperand(1))-getValue();
+ if (LHSShiftAmt.getOpcode() == ISD::Constant
+ RHSShiftAmt.getOpcode() == ISD::Constant) {
+uint64_t LShVal = castConstantSDNode(LHSShiftAmt)-getValue();
+uint64_t RShVal = castConstantSDNode(RHSShiftAmt)-getValue();
if ((LShVal + RShVal) != OpSizeInBits)
return 0;
SDOperand Rot;
if (HasROTL)
- Rot = DAG.getNode(ISD::ROTL, VT, LHSShift.getOperand(0),
-LHSShift.getOperand(1));
+ Rot = DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt);
else
- Rot = DAG.getNode(ISD::ROTR, VT, LHSShift.getOperand(0),
-RHSShift.getOperand(1));
+ Rot = DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt);
// If there is an AND of either shifted operand, apply it to the result.
if (LHSMask.Val || RHSMask.Val) {
@@ -1532,33 +1533,69 @@
// fold (or (shl x, y), (srl x, (sub 32, y))) - (rotl x, y)
// fold (or (shl x, y), (srl x, (sub 32, y))) - (rotr x, (sub 32, y))
- if (RHSShift.getOperand(1).getOpcode() == ISD::SUB
- LHSShift.getOperand(1) == RHSShift.getOperand(1).getOperand(1)) {
+ if (RHSShiftAmt.getOpcode() == ISD::SUB
+ LHSShiftAmt == RHSShiftAmt.getOperand(1)) {
if (ConstantSDNode *SUBC =
- dyn_castConstantSDNode(RHSShift.getOperand(1).getOperand(0))) {
+ dyn_castConstantSDNode(RHSShiftAmt.getOperand(0))) {
if (SUBC-getValue() == OpSizeInBits)
if (HasROTL)
- return DAG.getNode(ISD::ROTL, VT, LHSShift.getOperand(0),
- LHSShift.getOperand(1)).Val;
+ return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).Val;
else
- return DAG.getNode(ISD::ROTR, VT, LHSShift.getOperand(0),
- LHSShift.getOperand(1)).Val;
+ return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).Val;
}
}
// fold (or (shl x, (sub 32, y)), (srl x, r)) - (rotr x, y)
// fold (or (shl x, (sub 32, y)), (srl x, r)) - (rotl x, (sub 32, y))
- if (LHSShift.getOperand(1).getOpcode() == ISD::SUB
- RHSShift.getOperand(1) == LHSShift.getOperand(1).getOperand(1)) {
+ if (LHSShiftAmt.getOpcode() == ISD::SUB
+ RHSShiftAmt == LHSShiftAmt.getOperand(1)) {
if (ConstantSDNode *SUBC =
- dyn_castConstantSDNode(LHSShift.getOperand(1).getOperand(0))) {
+ dyn_castConstantSDNode(LHSShiftAmt.getOperand(0))) {
if (SUBC-getValue() == OpSizeInBits)
if (HasROTL)
- return DAG.getNode(ISD::ROTL, VT, LHSShift.getOperand(0),
- LHSShift.getOperand(1)).Val;
+ return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).Val;
else
- return DAG.getNode(ISD::ROTR, VT, LHSShift.getOperand(0),
- RHSShift.getOperand(1)).Val;
+ return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).Val;
+}
+ }
+
+ // Look for sign/zext/any-extended cases:
+ if ((LHSShiftAmt.getOpcode() == ISD::SIGN_EXTEND
+ || LHSShiftAmt.getOpcode() == ISD::ZERO_EXTEND
+ || LHSShiftAmt.getOpcode() == ISD::ANY_EXTEND)
+ (RHSShiftAmt.getOpcode() == ISD::SIGN_EXTEND
+ || RHSShiftAmt.getOpcode() == ISD::ZERO_EXTEND
+ || RHSShiftAmt.getOpcode() == ISD::ANY_EXTEND)) {
+SDOperand LExtOp0 =
Re: [llvm-commits] Patch resubmit: ROTL/ROTR cleanups
On Apr 2, 2007, at 1:11 PM, Chris Lattner wrote:
On Mar 30, 2007, at 12:02 PM, Scott Michel wrote:
Spotted what was probably a long-standing bug, since some of my
cleanups
were simple substitutions.
Sorry for the delay. In general, if you keep the changes as simple
and disjoint as possible, I'm more likely to look at them soon :).
Here you could split up the allow custom legalize of rotates part
from the introduce some temporary vars part from match ext
rotate cases part.
I did, I did, I did! Really! They're part and parcel of the same
functionality... :-)
+
+ // Look for sign/zext/any-extended cases:
+ if ((LHSShiftAmt.getOpcode() == ISD::SIGN_EXTEND
+ || LHSShiftAmt.getOpcode() == ISD::ZERO_EXTEND
+ || LHSShiftAmt.getOpcode() == ISD::ANY_EXTEND)
+ (RHSShiftAmt.getOpcode() == ISD::SIGN_EXTEND
+ || RHSShiftAmt.getOpcode() == ISD::ZERO_EXTEND
+ || RHSShiftAmt.getOpcode() == ISD::ANY_EXTEND)) {
+SDOperand LExtOp0 = LHSShiftAmt.getOperand(0);
+SDOperand RExtOp0 = RHSShiftAmt.getOperand(0);
+if (RExtOp0.getOpcode() == ISD::SUB
+RExtOp0.getOperand(1) == LExtOp0) {
+ // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y -
+ // (rotr x, y)
+ // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y -
+ // (rotl x, (sub 32, y))
+ if (ConstantSDNode *SUBC = castConstantSDNode
(RExtOp0.getOperand(0))) {
+if (SUBC-getValue() == OpSizeInBits) {
+ if (HasROTL)
+return DAG.getNode(ISD::ROTL, VT, LHSShiftArg,
LHSShiftAmt).Val;
+ else
+return DAG.getNode(ISD::ROTR, VT, LHSShiftArg,
RHSShiftAmt).Val;
+}
Okay, but needs an extra level of spacing for the indentation here
(2 spaces, not 1).
+ }
+} else if (LExtOp0.getOpcode() == ISD::SUB
+ RExtOp0 == LExtOp0.getOperand(1)) {
+ // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -
+ // (rotl x, y)
+ // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -
+ // (rotr x, (sub 32, y))
+ if (ConstantSDNode *SUBC = castConstantSDNode
(LExtOp0.getOperand(0))) {
+if (SUBC-getValue() == OpSizeInBits) {
+ if (HasROTL)
+return DAG.getNode(ISD::ROTL, VT, LHSShiftArg,
RHSShiftAmt).Val;
+ else
+return DAG.getNode(ISD::ROTL, VT, LHSShiftArg,
LHSShiftAmt).Val;
+}
Likewise.
Fixed tab violations, which made it look like incorrect indentation...
-scooter
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[llvm-commits] CVS: llvm/test/CodeGen/PowerPC/rotl-2.ll
Changes in directory llvm/test/CodeGen/PowerPC:
rotl-2.ll added (r1.1)
---
Log message:
Add a regtest for cases we now recognize as rotates, thanks to Scott Michel's
recent dagcombine patch
---
Diffs of the changes: (+38 -0)
rotl-2.ll | 38 ++
1 files changed, 38 insertions(+)
Index: llvm/test/CodeGen/PowerPC/rotl-2.ll
diff -c /dev/null llvm/test/CodeGen/PowerPC/rotl-2.ll:1.1
*** /dev/null Mon Apr 2 17:09:04 2007
--- llvm/test/CodeGen/PowerPC/rotl-2.ll Mon Apr 2 17:08:54 2007
***
*** 0
--- 1,38
+ ; RUN: llvm-as %s | llc -march=ppc32 | grep rlwinm | wc -l | grep 4
+ ; RUN: llvm-as %s | llc -march=ppc32 | grep rlwnm | wc -l | grep 2
+ ; RUN: llvm-as %s | llc -march=ppc32 | not grep or
+
+ define i32 @rotl32(i32 %A, i8 %Amt) {
+ %shift.upgrd.1 = zext i8 %Amt to i32; i32 [#uses=1]
+ %B = shl i32 %A, %shift.upgrd.1 ; i32 [#uses=1]
+ %Amt2 = sub i8 32, %Amt ; i8 [#uses=1]
+ %shift.upgrd.2 = zext i8 %Amt2 to i32 ; i32 [#uses=1]
+ %C = lshr i32 %A, %shift.upgrd.2; i32 [#uses=1]
+ %D = or i32 %B, %C ; i32 [#uses=1]
+ ret i32 %D
+ }
+
+ define i32 @rotr32(i32 %A, i8 %Amt) {
+ %shift.upgrd.3 = zext i8 %Amt to i32; i32 [#uses=1]
+ %B = lshr i32 %A, %shift.upgrd.3; i32 [#uses=1]
+ %Amt2 = sub i8 32, %Amt ; i8 [#uses=1]
+ %shift.upgrd.4 = zext i8 %Amt2 to i32 ; i32 [#uses=1]
+ %C = shl i32 %A, %shift.upgrd.4 ; i32 [#uses=1]
+ %D = or i32 %B, %C ; i32 [#uses=1]
+ ret i32 %D
+ }
+
+ define i32 @rotli32(i32 %A) {
+ %B = shl i32 %A, 5 ; i32 [#uses=1]
+ %C = lshr i32 %A, 27; i32 [#uses=1]
+ %D = or i32 %B, %C ; i32 [#uses=1]
+ ret i32 %D
+ }
+
+ define i32 @rotri32(i32 %A) {
+ %B = lshr i32 %A, 5 ; i32 [#uses=1]
+ %C = shl i32 %A, 27 ; i32 [#uses=1]
+ %D = or i32 %B, %C ; i32 [#uses=1]
+ ret i32 %D
+ }
+
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Re: [llvm-commits] Patch resubmit: ROTL/ROTR cleanups
On Apr 2, 2007, at 2:44 PM, Scott Michel wrote: On Apr 2, 2007, at 1:11 PM, Chris Lattner wrote: On Mar 30, 2007, at 12:02 PM, Scott Michel wrote: Spotted what was probably a long-standing bug, since some of my cleanups were simple substitutions. Sorry for the delay. In general, if you keep the changes as simple and disjoint as possible, I'm more likely to look at them soon :). Here you could split up the allow custom legalize of rotates part from the introduce some temporary vars part from match ext rotate cases part. I did, I did, I did! Really! They're part and parcel of the same functionality... :-) :) Likewise. Fixed tab violations, which made it look like incorrect indentation... Great, even better! -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LoopStrengthReduce.cpp updated: 1.124 - 1.125
---
Log message:
allow -1 strides to reuse 1 strides.
---
Diffs of the changes: (+2 -1)
LoopStrengthReduce.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
diff -u llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.124
llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.125
--- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.124 Mon Apr 2
01:34:44 2007
+++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp Mon Apr 2 17:51:58 2007
@@ -929,7 +929,8 @@
for (std::mapSCEVHandle, IVsOfOneStride::iterator SI=
IVsByStride.begin(),
SE = IVsByStride.end(); SI != SE; ++SI) {
int64_t SSInt =
castSCEVConstant(SI-first)-getValue()-getSExtValue();
- if (unsigned(abs(SInt)) SSInt || (SInt % SSInt) != 0)
+ if (SInt != -SSInt
+ (unsigned(abs(SInt)) SSInt || (SInt % SSInt) != 0))
continue;
int64_t Scale = SInt / SSInt;
// Check that this stride is valid for all the types used for loads and
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[llvm-commits] [125637] arm EABI patch (from Lauro Ramos Venancio)
Revision: 125637 Author: johannes Date: 2007-04-02 17:10:47 -0700 (Mon, 02 Apr 2007) Log Message: --- arm EABI patch (from Lauro Ramos Venancio) Modified Paths: -- apple-local/branches/llvm/libstdc++-v3/Makefile.in apple-local/branches/llvm/libstdc++-v3/acinclude.m4 apple-local/branches/llvm/libstdc++-v3/aclocal.m4 apple-local/branches/llvm/libstdc++-v3/configure apple-local/branches/llvm/libstdc++-v3/include/Makefile.in apple-local/branches/llvm/libstdc++-v3/libmath/Makefile.in apple-local/branches/llvm/libstdc++-v3/libsupc++/Makefile.am apple-local/branches/llvm/libstdc++-v3/libsupc++/Makefile.in apple-local/branches/llvm/libstdc++-v3/libsupc++/eh_catch.cc apple-local/branches/llvm/libstdc++-v3/libsupc++/eh_personality.cc apple-local/branches/llvm/libstdc++-v3/libsupc++/eh_throw.cc apple-local/branches/llvm/libstdc++-v3/libsupc++/unwind-cxx.h apple-local/branches/llvm/libstdc++-v3/po/Makefile.in apple-local/branches/llvm/libstdc++-v3/src/Makefile.in Modified: apple-local/branches/llvm/libstdc++-v3/Makefile.in === --- apple-local/branches/llvm/libstdc++-v3/Makefile.in 2007-04-02 21:58:58 UTC (rev 125636) +++ apple-local/branches/llvm/libstdc++-v3/Makefile.in 2007-04-03 00:10:47 UTC (rev 125637) @@ -1,8 +1,8 @@ -# Makefile.in generated by automake 1.9.3 from Makefile.am. +# Makefile.in generated by automake 1.9.5 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, -# 2003, 2004 Free Software Foundation, Inc. +# 2003, 2004, 2005 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. @@ -408,7 +408,13 @@ # (which will cause the Makefiles to be regenerated when you run `make'); # (2) otherwise, pass the desired values on the `make' command line. $(RECURSIVE_TARGETS): - @set fnord $$MAKEFLAGS; amf=$$2; \ + @failcom='exit 1'; \ + for f in x $$MAKEFLAGS; do \ + case $$f in \ + *=* | --[!k]*);; \ + *k*) failcom='fail=yes';; \ + esac; \ + done; \ dot_seen=no; \ target=`echo $@ | sed s/-recursive//`; \ list='$(SUBDIRS)'; for subdir in $$list; do \ @@ -420,7 +426,7 @@ local_target=$$target; \ fi; \ (cd $$subdir $(MAKE) $(AM_MAKEFLAGS) $$local_target) \ - || case $$amf in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \ + || eval $$failcom; \ done; \ if test $$dot_seen = no; then \ $(MAKE) $(AM_MAKEFLAGS) $$target-am || exit 1; \ @@ -428,7 +434,13 @@ mostlyclean-recursive clean-recursive distclean-recursive \ maintainer-clean-recursive: - @set fnord $$MAKEFLAGS; amf=$$2; \ + @failcom='exit 1'; \ + for f in x $$MAKEFLAGS; do \ + case $$f in \ + *=* | --[!k]*);; \ + *k*) failcom='fail=yes';; \ + esac; \ + done; \ dot_seen=no; \ case $@ in \ distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \ @@ -449,7 +461,7 @@ local_target=$$target; \ fi; \ (cd $$subdir $(MAKE) $(AM_MAKEFLAGS) $$local_target) \ - || case $$amf in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \ + || eval $$failcom; \ done test -z $$fail tags-recursive: list='$(SUBDIRS)'; for subdir in $$list; do \ Modified: apple-local/branches/llvm/libstdc++-v3/acinclude.m4 === --- apple-local/branches/llvm/libstdc++-v3/acinclude.m4 2007-04-02 21:58:58 UTC (rev 125636) +++ apple-local/branches/llvm/libstdc++-v3/acinclude.m4 2007-04-03 00:10:47 UTC (rev 125637) @@ -1675,6 +1675,10 @@ enable_sjlj_exceptions=yes elif grep _Unwind_Resume conftest.s /dev/null 21 ; then enable_sjlj_exceptions=no + #APPLE LOCAL begin LLVM + elif grep __cxa_end_cleanup conftest.s /dev/null 21 ; then +enable_sjlj_exceptions=no + #APPLE LOCAL end LLVM fi fi # APPLE LOCAL LLVM HACK! Modified: apple-local/branches/llvm/libstdc++-v3/aclocal.m4 === --- apple-local/branches/llvm/libstdc++-v3/aclocal.m4 2007-04-02 21:58:58 UTC (rev 125636) +++ apple-local/branches/llvm/libstdc++-v3/aclocal.m4 2007-04-03 00:10:47 UTC (rev 125637) @@ -1,7 +1,7 @@ -# generated automatically by aclocal 1.9.3 -*- Autoconf -*- +# generated automatically by aclocal 1.9.5 -*- Autoconf -*- -# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 -# Free Software Foundation, Inc. +# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, +# 2005 Free Software Foundation, Inc. # This
[llvm-commits] CVS: llvm/test/CodeGen/ARM/arm-negative-stride.ll
Changes in directory llvm/test/CodeGen/ARM:
arm-negative-stride.ll added (r1.1)
---
Log message:
new testcase, where we should use a negative stride
---
Diffs of the changes: (+20 -0)
arm-negative-stride.ll | 20
1 files changed, 20 insertions(+)
Index: llvm/test/CodeGen/ARM/arm-negative-stride.ll
diff -c /dev/null llvm/test/CodeGen/ARM/arm-negative-stride.ll:1.1
*** /dev/null Mon Apr 2 19:13:26 2007
--- llvm/test/CodeGen/ARM/arm-negative-stride.llMon Apr 2 19:13:16 2007
***
*** 0
--- 1,20
+ ; RUN: llvm-as %s | llc -march=arm | grep -F 'str r1, [r3, -r0, lsl #2]'
+
+ define void @test(i32* %P, i32 %A, i32 %i) {
+ entry:
+ icmp eq i32 %i, 0 ; i1:0 [#uses=1]
+ br i1 %0, label %return, label %bb
+
+ bb: ; preds = %bb, %entry
+ %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ;
i32 [#uses=2]
+ %i_addr.09.0 = sub i32 %i, %indvar ; i32 [#uses=1]
+ %tmp2 = getelementptr i32* %P, i32 %i_addr.09.0 ; i32*
[#uses=1]
+ store i32 %A, i32* %tmp2
+ %indvar.next = add i32 %indvar, 1 ; i32 [#uses=2]
+ icmp eq i32 %indvar.next, %i; i1:1 [#uses=1]
+ br i1 %1, label %return, label %bb
+
+ return: ; preds = %bb, %entry
+ ret void
+ }
+
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[llvm-commits] [125638] arm EABI patch (Lauro Ramos Venancio)
Revision: 125638 Author: johannes Date: 2007-04-02 17:13:00 -0700 (Mon, 02 Apr 2007) Log Message: --- arm EABI patch (Lauro Ramos Venancio) Modified Paths: -- apple-local/branches/llvm/gcc/Makefile.in apple-local/branches/llvm/gcc/ada/misc.c apple-local/branches/llvm/gcc/c-decl.c apple-local/branches/llvm/gcc/config/arm/arm.c apple-local/branches/llvm/gcc/config/arm/arm.h apple-local/branches/llvm/gcc/config/arm/bpabi.h apple-local/branches/llvm/gcc/config/arm/elf.h apple-local/branches/llvm/gcc/config/arm/lib1funcs.asm apple-local/branches/llvm/gcc/config/arm/libgcc-bpabi.ver apple-local/branches/llvm/gcc/config/arm/t-bpabi apple-local/branches/llvm/gcc/config/arm/t-symbian apple-local/branches/llvm/gcc/config/i386/t-netware apple-local/branches/llvm/gcc/config/ia64/ia64.h apple-local/branches/llvm/gcc/cp/Make-lang.in apple-local/branches/llvm/gcc/cp/decl.c apple-local/branches/llvm/gcc/cp/except.c apple-local/branches/llvm/gcc/except.c apple-local/branches/llvm/gcc/except.h apple-local/branches/llvm/gcc/java/decl.c apple-local/branches/llvm/gcc/objc/objc-act.c apple-local/branches/llvm/gcc/optabs.c apple-local/branches/llvm/gcc/opts.c apple-local/branches/llvm/gcc/target-def.h apple-local/branches/llvm/gcc/target.h apple-local/branches/llvm/gcc/unwind-c.c Modified: apple-local/branches/llvm/gcc/Makefile.in === --- apple-local/branches/llvm/gcc/Makefile.in 2007-04-03 00:10:47 UTC (rev 125637) +++ apple-local/branches/llvm/gcc/Makefile.in 2007-04-03 00:13:00 UTC (rev 125638) @@ -340,10 +340,11 @@ $(srcdir)/ginclude/stddef.h \ $(srcdir)/ginclude/tgmath.h \ $(srcdir)/ginclude/varargs.h \ -$(srcdir)/unwind.h \ $(EXTRA_HEADERS) # APPLE LOCAL end radar 2872232 add tgmath.h +UNWIND_H = $(srcdir)/unwind-generic.h + # The GCC to use for compiling libgcc.a and crt*.o. # Usually the one we just built. # Don't use this as a dependency--use $(GCC_PASSES) or $(GCC_PARTS). @@ -582,7 +583,7 @@ $(srcdir)/unwind-sjlj.c $(srcdir)/gthr-gnat.c $(srcdir)/unwind-c.c LIB2ADDEHSTATIC = $(LIB2ADDEH) LIB2ADDEHSHARED = $(LIB2ADDEH) -LIB2ADDEHDEP = unwind.h unwind-pe.h unwind.inc unwind-dw2-fde.h unwind-dw2.h +LIB2ADDEHDEP = $(UNWIND_H) unwind-pe.h unwind.inc unwind-dw2-fde.h unwind-dw2.h # Don't build libunwind by default. LIBUNWIND = @@ -3129,7 +3130,7 @@ # be rebuilt. # Build the include directory -stmp-int-hdrs: $(STMP_FIXINC) $(USER_H) xlimits.h +stmp-int-hdrs: $(STMP_FIXINC) $(USER_H) xlimits.h $(UNWIND_H) # Copy in the headers provided with gcc. # The sed command gets just the last file name component; # this is necessary because VPATH could add a dirname. @@ -3147,6 +3148,7 @@ done rm -f include/limits.h cp xlimits.h include/limits.h + cp $(UNWIND_H) include/unwind.h chmod a+r include/limits.h # Install the README rm -f include/README @@ -3772,6 +3774,7 @@ $(DESTDIR)$(itoolsdatadir)/include/$$realfile ; \ done $(INSTALL_DATA) xlimits.h $(DESTDIR)$(itoolsdatadir)/include/limits.h + $(INSTALL_DATA) $(UNWIND_H) $(DESTDIR)$(itoolsdatadir)/include/unwind.h $(INSTALL_DATA) $(srcdir)/gsyslimits.h \ $(DESTDIR)$(itoolsdatadir)/gsyslimits.h $(INSTALL_DATA) macro_list $(DESTDIR)$(itoolsdatadir)/macro_list Modified: apple-local/branches/llvm/gcc/ada/misc.c === --- apple-local/branches/llvm/gcc/ada/misc.c2007-04-03 00:10:47 UTC (rev 125637) +++ apple-local/branches/llvm/gcc/ada/misc.c2007-04-03 00:13:00 UTC (rev 125638) @@ -478,6 +478,9 @@ using_eh_for_cleanups (); eh_personality_libfunc = init_one_libfunc (__gnat_eh_personality); + /* APPLE LOCAL begin LLVM */ + default_init_unwind_resume_libfunc (); + /* APPLE LOCAL end LLVM */ lang_eh_type_covers = gnat_eh_type_covers; lang_eh_runtime_type = gnat_eh_runtime_type; Modified: apple-local/branches/llvm/gcc/c-decl.c === --- apple-local/branches/llvm/gcc/c-decl.c 2007-04-03 00:10:47 UTC (rev 125637) +++ apple-local/branches/llvm/gcc/c-decl.c 2007-04-03 00:13:00 UTC (rev 125638) @@ -3765,6 +3765,9 @@ = init_one_libfunc (USING_SJLJ_EXCEPTIONS ? __gcc_personality_sj0 : __gcc_personality_v0); + /* APPLE LOCAL begin LLVM */ + default_init_unwind_resume_libfunc (); + /* APPLE LOCAL end LLVM */ using_eh_for_cleanups (); } Modified: apple-local/branches/llvm/gcc/config/arm/arm.c === --- apple-local/branches/llvm/gcc/config/arm/arm.c 2007-04-03
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp
Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.37 - 1.38 --- Log message: Arm supports negative strides as well, add them. This lets us compile: CodeGen/ARM/arm-negative-stride.ll to: LBB1_2: @bb str r1, [r3, -r0, lsl #2] add r0, r0, #1 cmp r0, r2 bne LBB1_2 @bb --- Diffs of the changes: (+6 -3) ARMISelLowering.cpp |9 ++--- 1 files changed, 6 insertions(+), 3 deletions(-) Index: llvm/lib/Target/ARM/ARMISelLowering.cpp diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.37 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.38 --- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.37Mon Apr 2 13:51:18 2007 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp Mon Apr 2 19:13:57 2007 @@ -1323,7 +1323,7 @@ // This assumes i64 is legalized to a pair of i32. If not (i.e. // ldrd / strd are used, then its address mode is same as i16. // r + r - if (AM.Scale == 2) + if (AM.Scale == 1) return true; // r + r imm if (!isPowerOf2_32(AM.Scale ~1)) @@ -1422,7 +1422,9 @@ case MVT::i1: case MVT::i8: case MVT::i32: -// Allow: r + r +if (S 0) S = -S; +if (S == 1) return true; // Allow: r + r + // Allow: r imm // Allow: r + r imm S = ~1; @@ -1431,7 +1433,8 @@ // Note, we allow void uses (basically, uses that aren't loads or // stores), because arm allows folding a scale into many arithmetic // operations. This should be made more precise and revisited later. - +if (S == 1) return true; // Allow: r + r + // Allow r imm, but the imm has to be a multiple of two. if (S 1) return false; return isPowerOf2_32(S); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [125639] arm EABI patch (Lauro Ramos Venancio)
Revision: 125639
Author: johannes
Date: 2007-04-02 17:13:59 -0700 (Mon, 02 Apr 2007)
Log Message:
---
arm EABI patch (Lauro Ramos Venancio)
Added Paths:
---
apple-local/branches/llvm/gcc/unwind-generic.h
apple-local/branches/llvm/gcc/unwind.h.removed
Removed Paths:
-
apple-local/branches/llvm/gcc/unwind.h
Added: apple-local/branches/llvm/gcc/unwind-generic.h
===
--- apple-local/branches/llvm/gcc/unwind-generic.h
(rev 0)
+++ apple-local/branches/llvm/gcc/unwind-generic.h 2007-04-03 00:13:59 UTC
(rev 125639)
@@ -0,0 +1,240 @@
+/* Exception handling and frame unwind runtime interface routines.
+ Copyright (C) 2001, 2003, 2004 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING. If not, write to the Free
+ Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+/* As a special exception, if you include this header file into source
+ files compiled by GCC, this header file does not by itself cause
+ the resulting executable to be covered by the GNU General Public
+ License. This exception does not however invalidate any other
+ reasons why the executable file might be covered by the GNU General
+ Public License. */
+
+/* This is derived from the C++ ABI for IA-64. Where we diverge
+ for cross-architecture compatibility are noted with @@@. */
+
+#ifndef _UNWIND_H
+#define _UNWIND_H
+
+#ifndef HIDE_EXPORTS
+#pragma GCC visibility push(default)
+#endif
+
+#ifdef __cplusplus
+extern C {
+#endif
+
+/* Level 1: Base ABI */
+
+/* @@@ The IA-64 ABI uses uint64 throughout. Most places this is
+ inefficient for 32-bit and smaller machines. */
+typedef unsigned _Unwind_Word __attribute__((__mode__(__word__)));
+typedef signed _Unwind_Sword __attribute__((__mode__(__word__)));
+#if defined(__ia64__) defined(__hpux__)
+typedef unsigned _Unwind_Ptr __attribute__((__mode__(__word__)));
+#else
+typedef unsigned _Unwind_Ptr __attribute__((__mode__(__pointer__)));
+#endif
+typedef unsigned _Unwind_Internal_Ptr __attribute__((__mode__(__pointer__)));
+
+/* @@@ The IA-64 ABI uses a 64-bit word to identify the producer and
+ consumer of an exception. We'll go along with this for now even on
+ 32-bit machines. We'll need to provide some other option for
+ 16-bit machines and for machines with 8 bits per byte. */
+typedef unsigned _Unwind_Exception_Class __attribute__((__mode__(__DI__)));
+
+/* The unwind interface uses reason codes in several contexts to
+ identify the reasons for failures or other actions. */
+typedef enum
+{
+ _URC_NO_REASON = 0,
+ _URC_FOREIGN_EXCEPTION_CAUGHT = 1,
+ _URC_FATAL_PHASE2_ERROR = 2,
+ _URC_FATAL_PHASE1_ERROR = 3,
+ _URC_NORMAL_STOP = 4,
+ _URC_END_OF_STACK = 5,
+ _URC_HANDLER_FOUND = 6,
+ _URC_INSTALL_CONTEXT = 7,
+ _URC_CONTINUE_UNWIND = 8
+} _Unwind_Reason_Code;
+
+
+/* The unwind interface uses a pointer to an exception header object
+ as its representation of an exception being thrown. In general, the
+ full representation of an exception object is language- and
+ implementation-specific, but it will be prefixed by a header
+ understood by the unwind interface. */
+
+struct _Unwind_Exception;
+
+typedef void (*_Unwind_Exception_Cleanup_Fn) (_Unwind_Reason_Code,
+ struct _Unwind_Exception *);
+
+struct _Unwind_Exception
+{
+ _Unwind_Exception_Class exception_class;
+ _Unwind_Exception_Cleanup_Fn exception_cleanup;
+ _Unwind_Word private_1;
+ _Unwind_Word private_2;
+
+ /* @@@ The IA-64 ABI says that this structure must be double-word aligned.
+ Taking that literally does not make much sense generically. Instead we
+ provide the maximum alignment required by any type for the machine. */
+} __attribute__((__aligned__));
+
+
+/* The ACTIONS argument to the personality routine is a bitwise OR of one
+ or more of the following constants. */
+typedef int _Unwind_Action;
+
+#define _UA_SEARCH_PHASE 1
+#define _UA_CLEANUP_PHASE 2
+#define _UA_HANDLER_FRAME 4
+#define _UA_FORCE_UNWIND 8
+#define _UA_END_OF_STACK 16
+
+/* This is an opaque type used to refer to a system-specific data
+ structure used by the system unwinder. This context is created and
+ destroyed by the system, and
[llvm-commits] [125641] arm EABI patch (files I missed) (Lauro Ramos Venancio)
Revision: 125641 Author: johannes Date: 2007-04-02 17:16:00 -0700 (Mon, 02 Apr 2007) Log Message: --- arm EABI patch (files I missed) (Lauro Ramos Venancio) Modified Paths: -- apple-local/branches/llvm/gcc/config/arm/arm-protos.h apple-local/branches/llvm/libstdc++-v3/testsuite/Makefile.in Modified: apple-local/branches/llvm/gcc/config/arm/arm-protos.h === --- apple-local/branches/llvm/gcc/config/arm/arm-protos.h 2007-04-03 00:14:25 UTC (rev 125640) +++ apple-local/branches/llvm/gcc/config/arm/arm-protos.h 2007-04-03 00:16:00 UTC (rev 125641) @@ -38,6 +38,10 @@ unsigned int); extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int, unsigned int); +/* APPLE LOCAL begin LLVM */ +extern unsigned int arm_dbx_register_number (unsigned int); +extern void arm_output_fn_unwind (FILE *, bool); +/* APPLE LOCAL end LLVM */ #ifdef TREE_CODE extern int arm_return_in_memory (tree); @@ -120,6 +124,10 @@ #if defined TREE_CODE extern rtx arm_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int); extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); +/* APPLE LOCAL begin LLVM */ +extern bool arm_pad_arg_upward (enum machine_mode, tree); +extern bool arm_pad_reg_upward (enum machine_mode, tree, int); +/* APPLE LOCAL end LLVM */ extern bool arm_needs_doubleword_align (enum machine_mode, tree); extern rtx arm_function_value(tree, tree); #endif Modified: apple-local/branches/llvm/libstdc++-v3/testsuite/Makefile.in === --- apple-local/branches/llvm/libstdc++-v3/testsuite/Makefile.in 2007-04-03 00:14:25 UTC (rev 125640) +++ apple-local/branches/llvm/libstdc++-v3/testsuite/Makefile.in 2007-04-03 00:16:00 UTC (rev 125641) @@ -1,8 +1,8 @@ -# Makefile.in generated by automake 1.9.3 from Makefile.am. +# Makefile.in generated by automake 1.9.5 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, -# 2003, 2004 Free Software Foundation, Inc. +# 2003, 2004, 2005 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Constants.h
Changes in directory llvm/include/llvm:
Constants.h updated: 1.143 - 1.144
---
Log message:
add a helper function to constantint.
---
Diffs of the changes: (+3 -0)
Constants.h |3 +++
1 files changed, 3 insertions(+)
Index: llvm/include/llvm/Constants.h
diff -u llvm/include/llvm/Constants.h:1.143 llvm/include/llvm/Constants.h:1.144
--- llvm/include/llvm/Constants.h:1.143 Fri Mar 30 11:50:28 2007
+++ llvm/include/llvm/Constants.h Mon Apr 2 20:41:34 2007
@@ -52,6 +52,9 @@
inline const APInt getValue() const {
return Val;
}
+
+ /// getBitWidth - Return the bitwidth of this constant.
+ unsigned getBitWidth() const { return Val.getBitWidth(); }
/// Return the constant as a 64-bit unsigned integer value after it
/// has been zero extended as appropriate for the type of this constant. Note
___
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[llvm-commits] CVS: llvm/test/Transforms/InstCombine/xor2.ll
Changes in directory llvm/test/Transforms/InstCombine:
xor2.ll added (r1.1)
---
Log message:
new testcase for PR1253: http://llvm.org/PR1253
---
Diffs of the changes: (+19 -0)
xor2.ll | 19 +++
1 files changed, 19 insertions(+)
Index: llvm/test/Transforms/InstCombine/xor2.ll
diff -c /dev/null llvm/test/Transforms/InstCombine/xor2.ll:1.1
*** /dev/null Mon Apr 2 20:45:42 2007
--- llvm/test/Transforms/InstCombine/xor2.llMon Apr 2 20:45:32 2007
***
*** 0
--- 1,19
+ ; This test makes sure that these instructions are properly eliminated.
+ ;
+
+ ; RUN: llvm-as %s | opt -instcombine -disable-output
+ ; RUN: llvm-as %s | opt -instcombine | llvm-dis | not grep 'xor '
+
+ ; PR1253
+ define i1 @test0(i32 %A) {
+ %B = xor i32 %A, -2147483648
+ %C = icmp sgt i32 %B, -1
+ ret i1 %C
+ }
+
+ define i1 @test1(i32 %A) {
+ %B = xor i32 %A, 12345
+ %C = icmp slt i32 %B, 0
+ ret i1 %C
+ }
+
___
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.723 - 1.724
---
Log message:
Fix PR1253: http://llvm.org/PR1253 and xor2.ll:test[01]
---
Diffs of the changes: (+30 -1)
InstructionCombining.cpp | 31 ++-
1 files changed, 30 insertions(+), 1 deletion(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.723
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.724
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.723 Mon Apr 2
08:45:30 2007
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Mon Apr 2 20:47:41 2007
@@ -4714,7 +4714,36 @@
// instruction can be folded into the icmp
if (Instruction *LHSI = dyn_castInstruction(Op0))
switch (LHSI-getOpcode()) {
- case Instruction::And:
+ case Instruction::Xor: // (icmp pred (and X, XorCST), CI)
+if (ConstantInt *XorCST = dyn_castConstantInt(LHSI-getOperand(1))) {
+ // If this is a comparison that tests the signbit (X 0) or (x
-1),
+ // fold the xor.
+ if (I.getPredicate() == ICmpInst::ICMP_SLT CI-isZero() ||
+ I.getPredicate() == ICmpInst::ICMP_SGT CI-isAllOnesValue()) {
+Value *CompareVal = LHSI-getOperand(0);
+
+// If the sign bit of the XorCST is not set, there is no change to
+// the operation, just stop using the Xor.
+if (!XorCST-getValue().isNegative()) {
+ I.setOperand(0, CompareVal);
+ AddToWorkList(LHSI);
+ return I;
+}
+
+// Was the old condition true if the operand is positive?
+bool isTrueIfPositive = I.getPredicate() == ICmpInst::ICMP_SGT;
+
+// If so, the new one isn't.
+isTrueIfPositive ^= true;
+
+if (isTrueIfPositive)
+ return new ICmpInst(ICmpInst::ICMP_SGT, CompareVal, SubOne(CI));
+else
+ return new ICmpInst(ICmpInst::ICMP_SLT, CompareVal, AddOne(CI));
+ }
+}
+break;
+ case Instruction::And: // (icmp pred (and X, AndCST), CI)
if (LHSI-hasOneUse() isaConstantInt(LHSI-getOperand(1))
LHSI-getOperand(0)-hasOneUse()) {
ConstantInt *AndCST = castConstantInt(LHSI-getOperand(1));
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[llvm-commits] CVS: llvm/include/llvm/ADT/APInt.h
Changes in directory llvm/include/llvm/ADT:
APInt.h updated: 1.61 - 1.62
---
Log message:
add missing operator
---
Diffs of the changes: (+4 -0)
APInt.h |4
1 files changed, 4 insertions(+)
Index: llvm/include/llvm/ADT/APInt.h
diff -u llvm/include/llvm/ADT/APInt.h:1.61 llvm/include/llvm/ADT/APInt.h:1.62
--- llvm/include/llvm/ADT/APInt.h:1.61 Mon Apr 2 00:41:00 2007
+++ llvm/include/llvm/ADT/APInt.h Mon Apr 2 23:25:46 2007
@@ -542,6 +542,10 @@
APInt operator-(uint64_t RHS) const {
return (*this) - APInt(BitWidth, RHS);
}
+
+ APInt operator(unsigned Bits) const {
+return shl(Bits);
+ }
/// Arithmetic right-shift this APInt by shiftAmt.
/// @brief Arithmetic right-shift function.
___
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.724 - 1.725
---
Log message:
Split a whole ton of code out of visitICmpInst into
visitICmpInstWithInstAndIntCst.
---
Diffs of the changes: (+524 -520)
InstructionCombining.cpp | 1044 +++
1 files changed, 524 insertions(+), 520 deletions(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.724
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.725
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.724 Mon Apr 2
20:47:41 2007
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Mon Apr 2 23:46:52 2007
@@ -183,6 +183,9 @@
Instruction *visitFCmpInst(FCmpInst I);
Instruction *visitICmpInst(ICmpInst I);
Instruction *visitICmpInstWithCastAndCast(ICmpInst ICI);
+Instruction *visitICmpInstWithInstAndIntCst(ICmpInst ICI,
+Instruction *LHS,
+ConstantInt *RHS);
Instruction *FoldGEPICmp(User *GEPLHS, Value *RHS,
ICmpInst::Predicate Cond, Instruction I);
@@ -4713,525 +4716,11 @@
// instruction, see if that instruction also has constants so that the
// instruction can be folded into the icmp
if (Instruction *LHSI = dyn_castInstruction(Op0))
- switch (LHSI-getOpcode()) {
- case Instruction::Xor: // (icmp pred (and X, XorCST), CI)
-if (ConstantInt *XorCST = dyn_castConstantInt(LHSI-getOperand(1))) {
- // If this is a comparison that tests the signbit (X 0) or (x
-1),
- // fold the xor.
- if (I.getPredicate() == ICmpInst::ICMP_SLT CI-isZero() ||
- I.getPredicate() == ICmpInst::ICMP_SGT CI-isAllOnesValue()) {
-Value *CompareVal = LHSI-getOperand(0);
-
-// If the sign bit of the XorCST is not set, there is no change to
-// the operation, just stop using the Xor.
-if (!XorCST-getValue().isNegative()) {
- I.setOperand(0, CompareVal);
- AddToWorkList(LHSI);
- return I;
-}
-
-// Was the old condition true if the operand is positive?
-bool isTrueIfPositive = I.getPredicate() == ICmpInst::ICMP_SGT;
-
-// If so, the new one isn't.
-isTrueIfPositive ^= true;
-
-if (isTrueIfPositive)
- return new ICmpInst(ICmpInst::ICMP_SGT, CompareVal, SubOne(CI));
-else
- return new ICmpInst(ICmpInst::ICMP_SLT, CompareVal, AddOne(CI));
- }
-}
-break;
- case Instruction::And: // (icmp pred (and X, AndCST), CI)
-if (LHSI-hasOneUse() isaConstantInt(LHSI-getOperand(1))
-LHSI-getOperand(0)-hasOneUse()) {
- ConstantInt *AndCST = castConstantInt(LHSI-getOperand(1));
-
- // If the LHS is an AND of a truncating cast, we can widen the
- // and/compare to be the input width without changing the value
- // produced, eliminating a cast.
- if (CastInst *Cast = dyn_castCastInst(LHSI-getOperand(0))) {
-// We can do this transformation if either the AND constant does
not
-// have its sign bit set or if it is an equality comparison.
-// Extending a relational comparison when we're checking the sign
-// bit would not work.
-if (Cast-hasOneUse() isaTruncInst(Cast)
-(I.isEquality() || AndCST-getValue().isPositive()
- CI-getValue().isPositive())) {
- ConstantInt *NewCST;
- ConstantInt *NewCI;
- APInt NewCSTVal(AndCST-getValue()), NewCIVal(CI-getValue());
- uint32_t BitWidth = castIntegerType(
-Cast-getOperand(0)-getType())-getBitWidth();
- NewCST = ConstantInt::get(NewCSTVal.zext(BitWidth));
- NewCI = ConstantInt::get(NewCIVal.zext(BitWidth));
- Instruction *NewAnd =
-BinaryOperator::createAnd(Cast-getOperand(0), NewCST,
- LHSI-getName());
- InsertNewInstBefore(NewAnd, I);
- return new ICmpInst(I.getPredicate(), NewAnd, NewCI);
-}
- }
-
- // If this is: (X C1) C2 != C3 (where any shift and any compare
- // could exist), turn it into (X (C2 C1)) != (C3 C1). This
- // happens a LOT in code produced by the C front-end, for bitfield
- // access.
- BinaryOperator *Shift =
dyn_castBinaryOperator(LHSI-getOperand(0));
- if (Shift !Shift-isShift())
-Shift = 0;
-
- ConstantInt *ShAmt;
- ShAmt = Shift ? dyn_castConstantInt(Shift-getOperand(1)) : 0;
- const Type
[llvm-commits] CVS: llvm-www/SVNMigration.html
Changes in directory llvm-www: SVNMigration.html updated: 1.2 - 1.3 --- Log message: Add a note about renaming things. --- Diffs of the changes: (+34 -1) SVNMigration.html | 35 ++- 1 files changed, 34 insertions(+), 1 deletion(-) Index: llvm-www/SVNMigration.html diff -u llvm-www/SVNMigration.html:1.2 llvm-www/SVNMigration.html:1.3 --- llvm-www/SVNMigration.html:1.2 Mon Apr 2 13:52:38 2007 +++ llvm-www/SVNMigration.html Mon Apr 2 23:56:22 2007 @@ -7,6 +7,39 @@ /div !-- *** -- +div class=www_sectiontitlea name=branchesRenaming/a/div +div class=www_text + pSince everything will be in one SVN repository, we thought we'd take this + opportunity to rename some top level directories to reduce redundancy. This + will be more important with Subversion because of Subversion URLs which will + already contain llvm.org (host) and llvm-isomething/i (repository). We + don't need another level of llvm in the top level directories as well./p + pThe proposed renamining is shown in the table below./p + table class=www +trthOld Name/ththNew Name/th/tr +trtdllvm/tdtdllvm/td/tr +trtdllvm-test/tdtdtest-suite/td/tr +trtdllvm-stacker/tdtdstacker/td/tr +trtdllvm-java/tdtdjava/td/tr +trtdllvm-tv/tdtdtelevision/td/tr +trtdllvm-poolalloc/tdtdpoolalloc/td/tr +trtdAdaptive/tdtdadaptive/td/tr +trtdnightlytest-serverside/tdtdnightly-test/td/tr + /table + pbNOTE/b: Due to synchronization of commits in the conversion process, + we will likely transition all of the above to Subversion in one shot. + This will allow SVN revision numbers to increase temporally instead + of disjointedly if the projects were imported one at a time. It also + permits revision groups to span across projects. For example, + changes to llvm and llvm-stacker made at the same time with + the same commit comment would be grouped as one SVN revision. + This increases the atomicity of commits and reduces the total number of + revisions in the SVN repository./p + pbNOTE/b: we will be converting neither llvm-www (UIUC web site) nor + llvm-gcc (old version 3)./p +/div + +!-- *** -- div class=www_sectiontitlea name=branchesBranch Status/a/div div class=www_text pThe existing branches have been categorized as shown in the table below. If @@ -118,6 +151,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/02 18:52:38 $ +br/Last modified: $Date: 2007/04/03 04:56:22 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/SVNMigration.html
Changes in directory llvm-www: SVNMigration.html updated: 1.3 - 1.4 --- Log message: Update the current status of branch/tag migration. --- Diffs of the changes: (+13 -17) SVNMigration.html | 30 +- 1 files changed, 13 insertions(+), 17 deletions(-) Index: llvm-www/SVNMigration.html diff -u llvm-www/SVNMigration.html:1.3 llvm-www/SVNMigration.html:1.4 --- llvm-www/SVNMigration.html:1.3 Mon Apr 2 23:56:22 2007 +++ llvm-www/SVNMigration.html Tue Apr 3 00:02:58 2007 @@ -50,10 +50,12 @@ table class=www trthName/ththDescription/th/tr trtdrelease_*/tdtdRelease branches (10 total)/td/tr -trtdsee/tdtdBranch Vikram's group is using for Secure -Code?/td/tr +trtdsee/tdtdBranch SVA project (will be renamed SVA)/td/tr trtdparallel/tdtdBranch for parallel features? (not sure)/td/tr trtdvector_llvm/tdtdBranch for vector stuff? (not sure)/td/tr +trtdPowerPC_0/td + tdAn early version of the PowerPC target, needed by release_13./td +/tr /table h3Branches To Be Removed/h3 @@ -78,10 +80,6 @@ trtdregalloc_linearscan/td tdhas only 3 old header files in it/td /tr -trtdPowerPC_0/td - tdAppears to be an early version of the PowerPC target. Seems not -important to keep it/td -/tr trtdpre-11, prerelease_*/td tdJohn created these as the first step towards a release, but it hasn't been done that way since (there's no prerelease_12 or later). @@ -104,28 +102,26 @@ h3Tags To Be Kept/h3 table class=www trthName/ththDescription/th/tr -trtdjtc/tdtdAssuming this is John Criswell's tag and he wants -it/td -/tr -trtdjtcllva/tdtdAssuming this is the LLVA tag/td/tr -trtdRELEASE_*/tdtdThese are the final release tags (7 total)/td -/tr -/tr -trtdstart/tdtdThis seems to be the very first tag. It references an -ancient version of llvm and is only of historical interest/td/tr +trtdRELEASE_*/tdtdThese are the release tags (7 total)./td/tr +trtdstart/tdtdThis seems to be the very first tag. It is required +by the RELEASE_* tags./td/tr /table h3Tags To Be Removed/h3 table class=www trthName/ththDescription/th/tr trtdbyebye/tdtdContains just the old lib/Analysis/DataStructure stuff. It is inappropriately named and definitely not needed/td/tr +trtdjtc/tdtdAssuming this is John Criswell's tag and he wants +it/td +/tr +trtdjtcllva/tdtdAssuming this is the LLVA tag/td/tr trtdLLVM_PRE111/tdtdThis is a pre-release tag to go with a branch we're planning to remove./td /tr trtdnew_merge_vector/tdtdAppears to be a merging tag. Pretty sure its unneeded at this point/td /tr -trtdPowerPC_0_0/tdtdRoot of a branch we're deleting/td/tr +trtdPowerPC_0_0/tdtdRequired by PowerPC_0 branch/td/tr trtdPARALLEL_ROOT/tdtdRoot of the parallel branch/td/tr trtdPRE10/tdtdRoot of a branch we're deleting/td/tr trtdPRE101/tdtdRoot of a branch we're deleting/td/tr @@ -151,6 +147,6 @@ src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a a href=http://validator.w3.org/check/referer;img src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a -br/Last modified: $Date: 2007/04/03 04:56:22 $ +br/Last modified: $Date: 2007/04/03 05:02:58 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LoopStrengthReduce.cpp updated: 1.125 - 1.126
---
Log message:
split some code out into a helper function
---
Diffs of the changes: (+30 -18)
LoopStrengthReduce.cpp | 48 ++--
1 files changed, 30 insertions(+), 18 deletions(-)
Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
diff -u llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.125
llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.126
--- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1.125 Mon Apr 2
17:51:58 2007
+++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp Tue Apr 3 00:11:24 2007
@@ -176,6 +176,8 @@
SCEVHandle GetExpressionSCEV(Instruction *E, Loop *L);
void OptimizeIndvars(Loop *L);
+bool FindIVForUser(ICmpInst *Cond, IVStrideUse *CondUse,
+ const SCEVHandle *CondStride);
unsigned CheckForIVReuse(const SCEVHandle, IVExpr, const Type*,
const std::vectorBasedUser UsersToProcess);
@@ -1222,6 +1224,31 @@
// different starting values, into different PHIs.
}
+/// FindIVForUser - If Cond has an operand that is an expression of an IV,
+/// set the IV user and stride information and return true, otherwise return
+/// false.
+bool LoopStrengthReduce::FindIVForUser(ICmpInst *Cond, IVStrideUse *CondUse,
+ const SCEVHandle *CondStride) {
+ for (unsigned Stride = 0, e = StrideOrder.size(); Stride != e !CondUse;
+ ++Stride) {
+std::mapSCEVHandle, IVUsersOfOneStride::iterator SI =
+IVUsesByStride.find(StrideOrder[Stride]);
+assert(SI != IVUsesByStride.end() Stride doesn't exist!);
+
+for (std::vectorIVStrideUse::iterator UI = SI-second.Users.begin(),
+ E = SI-second.Users.end(); UI != E; ++UI)
+ if (UI-User == Cond) {
+// NOTE: we could handle setcc instructions with multiple uses here,
but
+// InstCombine does it as well for simple uses, it's not clear that it
+// occurs enough in real life to handle.
+CondUse = *UI;
+CondStride = SI-first;
+return true;
+ }
+ }
+ return false;
+}
+
// OptimizeIndvars - Now that IVUsesByStride is set up with all of the indvar
// uses in the loop, look to see if we can eliminate some, in favor of using
// common indvars for the different uses.
@@ -1246,24 +1273,9 @@
IVStrideUse *CondUse = 0;
const SCEVHandle *CondStride = 0;
- for (unsigned Stride = 0, e = StrideOrder.size(); Stride != e !CondUse;
- ++Stride) {
-std::mapSCEVHandle, IVUsersOfOneStride::iterator SI =
- IVUsesByStride.find(StrideOrder[Stride]);
-assert(SI != IVUsesByStride.end() Stride doesn't exist!);
-
-for (std::vectorIVStrideUse::iterator UI = SI-second.Users.begin(),
- E = SI-second.Users.end(); UI != E; ++UI)
- if (UI-User == Cond) {
-CondUse = *UI;
-CondStride = SI-first;
-// NOTE: we could handle setcc instructions with multiple uses here,
but
-// InstCombine does it as well for simple uses, it's not clear that it
-// occurs enough in real life to handle.
-break;
- }
- }
- if (!CondUse) return; // setcc doesn't use the IV.
+ if (!FindIVForUser(Cond, CondUse, CondStride))
+return; // setcc doesn't use the IV.
+
// It's possible for the setcc instruction to be anywhere in the loop, and
// possible for it to have multiple users. If it is not immediately before
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