Re: [llvm-commits] llvm patch 45027
Doh! Who ratted me out? ;-)
-bw
On Jan 4, 2008, at 3:43 PM, Evan Cheng wrote:
Bill? You *own* MMX. :-)
Evan
On Jan 4, 2008, at 2:56 PM, Dale Johannesen wrote:
This patch does not make the corresponding change in llvm-gcc-4.*/
gcc/config/i386/llvm-i386.cpp, with the effect that all these
builtins are broken. Please fix?
(This shows up easily in the gcc testsuite, I'm a bit disappointed
it took 3 weeks for somebody to notice.)
Author: andersca
Date: Fri Dec 14 00:38:54 2007
New Revision: 45027
URL: http://llvm.org/viewvc/llvm-project?rev=45027&view=rev
Log:
All MMX shift instructions took a <2 x i32> vector as the shift
amount parameter. Change this to be <1 x i64> instead, which
matches the assembler instruction.
Modified:
llvm/trunk/include/llvm/IntrinsicsX86.td
llvm/trunk/lib/VMCore/AutoUpgrade.cpp
llvm/trunk/test/Assembler/AutoUpgradeIntrinsics.ll
Modified: llvm/trunk/include/llvm/IntrinsicsX86.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=45027&r1=45026&r2=45027&view=diff
=
=
=
=
=
=
=
=
=
=
--- llvm/trunk/include/llvm/IntrinsicsX86.td (original)
+++ llvm/trunk/include/llvm/IntrinsicsX86.td Fri Dec 14 00:38:54
2007
@@ -767,30 +767,30 @@
// Shift left logical
def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">,
Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">,
Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
}
// Pack ops.
Modified: llvm/trunk/lib/VMCore/AutoUpgrade.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AutoUpgrade.cpp?rev=45027&r1=45026&r2=45027&view=diff
=
=
=
=
=
=
=
=
=
=
--- llvm/trunk/lib/VMCore/AutoUpgrade.cpp (original)
+++ llvm/trunk/lib/VMCore/AutoUpgrade.cpp Fri Dec 14 00:38:54 2007
@@ -12,6 +12,7 @@
//
=
=
=
--=
==//
#include "llvm/AutoUpgrade.h"
+#include "llvm/Constants.h"
#include "llvm/Function.h"
#include "llvm/Module.h"
#include "llvm/Instructions.h"
@@ -110,6 +111,39 @@
}
break;
+ case 'x':
+// This fixes all MMX shift intrinsic instructions to take a
+// v1i64 instead of a v2i32 as the second parameter.
+if (Name.compare(5,10,"x86.mmx.ps",10) == 0 &&
+(Name.compare(13,4,"psll", 4) == 0 ||
+ Name.compare(13,4,"psra", 4) == 0 ||
+ Name.compare(13,4,"psrl", 4) == 0)) {
+
+ const llvm::Type *VT =
VectorType::get(IntegerType::get(64), 1);
+
+ // We don't have to do anything if the parameter already has
+ // the correct type.
+ if (FTy->getParamType(1) == VT)
+break;
+
+ // We first need to change the name of the old (bad)
intrinsic, because
+ // its type is incorrect, but we cannot overload that
name. We
+ /
[llvm-commits] [llvm] r45596 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/MachineDominators.cpp lib/CodeGen/MachineLoopInfo.cpp lib/CodeGen/PHIElimi
Author: void
Date: Fri Jan 4 14:54:55 2008
New Revision: 45596
URL: http://llvm.org/viewvc/llvm-project?rev=45596&view=rev
Log:
Don't recalculate the loop info and loop dominators analyses if they're
preserved.
Modified:
llvm/trunk/include/llvm/CodeGen/Passes.h
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/trunk/lib/CodeGen/MachineDominators.cpp
llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp
llvm/trunk/lib/CodeGen/PHIElimination.cpp
llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
Modified: llvm/trunk/include/llvm/CodeGen/Passes.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=45596&r1=45595&r2=45596&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/Passes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/Passes.h Fri Jan 4 14:54:55 2008
@@ -38,6 +38,14 @@
FunctionPass *createMachineFunctionPrinterPass(std::ostream *OS,
const std::string &Banner
="");
+ /// MachineLoopInfo pass - This pass is a loop analysis pass.
+ ///
+ extern const PassInfo *MachineLoopInfoID;
+
+ /// MachineDominators pass - This pass is a machine dominators analysis pass.
+ ///
+ extern const PassInfo *MachineDominatorsID;
+
/// PHIElimination pass - This pass eliminates machine instruction PHI nodes
/// by inserting copy instructions. This destroys SSA information, but is
the
/// desired input for some register allocators. This pass is "required" by
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=45596&r1=45595&r2=45596&view=diff
==
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Fri Jan 4 14:54:55 2008
@@ -60,6 +60,8 @@
void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved();
AU.addRequired();
+ AU.addPreservedID(MachineLoopInfoID);
+ AU.addPreservedID(MachineDominatorsID);
AU.addPreservedID(PHIEliminationID);
AU.addRequiredID(PHIEliminationID);
AU.addRequiredID(TwoAddressInstructionPassID);
Modified: llvm/trunk/lib/CodeGen/MachineDominators.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineDominators.cpp?rev=45596&r1=45595&r2=45596&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineDominators.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineDominators.cpp Fri Jan 4 14:54:55 2008
@@ -13,12 +13,17 @@
//===--===//
#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/Passes.h"
using namespace llvm;
TEMPLATE_INSTANTIATION(class DomTreeNodeBase);
TEMPLATE_INSTANTIATION(class DominatorTreeBase);
-char MachineDominatorTree::ID = 0;
-static RegisterPass
-E("machinedomtree", "MachineDominator Tree Construction", true);
+namespace {
+ char MachineDominatorTree::ID = 0;
+ RegisterPass
+ E("machinedomtree", "MachineDominator Tree Construction", true);
+}
+
+const PassInfo *llvm::MachineDominatorsID = E.getPassInfo();
Modified: llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp?rev=45596&r1=45595&r2=45596&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp Fri Jan 4 14:54:55 2008
@@ -16,15 +16,20 @@
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/Passes.h"
using namespace llvm;
TEMPLATE_INSTANTIATION(class LoopBase);
TEMPLATE_INSTANTIATION(class LoopInfoBase);
-char MachineLoopInfo::ID = 0;
-static RegisterPass
-X("machine-loops", "Machine Natural Loop Construction", true);
+namespace {
+ char MachineLoopInfo::ID = 0;
+ RegisterPass
+ X("machine-loops", "Machine Natural Loop Construction", true);
+}
+
+const PassInfo *llvm::MachineLoopInfoID = X.getPassInfo();
bool MachineLoopInfo::runOnMachineFunction(MachineFunction &) {
releaseMemory();
Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=45596&r1=45595&r2=45596&view=diff
==
--- llvm/trunk/lib/CodeGen/PHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/PHIElimination.cpp Fri Jan 4 14:54:55 2008
@@ -51,6 +51,8 @@
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved();
+ AU.ad
[llvm-commits] [llvm] r45574 - /llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
Author: void
Date: Fri Jan 4 02:59:18 2008
New Revision: 45574
URL: http://llvm.org/viewvc/llvm-project?rev=45574&view=rev
Log:
80-column violations.
Modified:
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=45574&r1=45573&r2=45574&view=diff
==
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Fri Jan 4 02:59:18 2008
@@ -90,8 +90,9 @@
///
/// This returns true if an interval was modified.
///
-bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
LiveInterval &IntB,
- MachineInstr *CopyMI) {
+bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
+LiveInterval &IntB,
+MachineInstr *CopyMI) {
unsigned CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI));
// BValNo is a value number in B that is defined by a copy from A. 'B3' in
@@ -622,7 +623,7 @@
/// value number and that the RHS is not defined by a copy from this
/// interval. This returns false if the intervals are not joinable, or it
/// joins them and returns true.
-bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval
&RHS) {
+bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval
&RHS){
assert(RHS.containsOneValue());
// Some number (potentially more than one) value numbers in the current
@@ -870,7 +871,7 @@
continue;
// Figure out the value # from the RHS.
- LHSValsDefinedFromRHS[VNI] =
RHS.getLiveRangeContaining(VNI->def-1)->valno;
+ LHSValsDefinedFromRHS[VNI]=RHS.getLiveRangeContaining(VNI->def-1)->valno;
}
// Loop over the value numbers of the RHS, seeing if any are defined from
@@ -888,7 +889,7 @@
continue;
// Figure out the value # from the LHS.
- RHSValsDefinedFromLHS[VNI]=
LHS.getLiveRangeContaining(VNI->def-1)->valno;
+ RHSValsDefinedFromLHS[VNI]=LHS.getLiveRangeContaining(VNI->def-1)->valno;
}
LHSValNoAssignments.resize(LHS.getNumValNums(), -1);
@@ -1285,7 +1286,8 @@
/// findDefOperand - Returns the MachineOperand that is a def of the specific
/// register. It returns NULL if the def is not found.
-MachineOperand *SimpleRegisterCoalescing::findDefOperand(MachineInstr *MI,
unsigned Reg) {
+MachineOperand *SimpleRegisterCoalescing::findDefOperand(MachineInstr *MI,
+ unsigned Reg) {
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isRegister() && MO.isDef() &&
@@ -1297,7 +1299,8 @@
/// unsetRegisterKill - Unset IsKill property of all uses of specific register
/// of the specific instruction.
-void SimpleRegisterCoalescing::unsetRegisterKill(MachineInstr *MI, unsigned
Reg) {
+void SimpleRegisterCoalescing::unsetRegisterKill(MachineInstr *MI,
+ unsigned Reg) {
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isRegister() && MO.isKill() && MO.getReg() &&
@@ -1309,7 +1312,7 @@
/// unsetRegisterKills - Unset IsKill property of all uses of specific register
/// between cycles Start and End.
void SimpleRegisterCoalescing::unsetRegisterKills(unsigned Start, unsigned End,
- unsigned Reg) {
+ unsigned Reg) {
int e = (End-1) / InstrSlots::NUM * InstrSlots::NUM;
int s = Start;
while (e >= s) {
@@ -1387,7 +1390,8 @@
allocatableRegs_ = mri_->getAllocatableSet(fn);
for (MRegisterInfo::regclass_iterator I = mri_->regclass_begin(),
E = mri_->regclass_end(); I != E; ++I)
-allocatableRCRegs_.insert(std::make_pair(*I,mri_->getAllocatableSet(fn,
*I)));
+allocatableRCRegs_.insert(std::make_pair(*I,
+ mri_->getAllocatableSet(fn, *I)));
MachineRegisterInfo &RegInfo = mf_->getRegInfo();
r2rMap_.grow(RegInfo.getLastVirtReg());
@@ -1398,7 +1402,7 @@
if (EnableJoining) {
joinIntervals();
DOUT << "** INTERVALS POST JOINING **\n";
-for (LiveIntervals::iterator I = li_->begin(), E = li_->end(); I != E;
++I) {
+for (LiveIntervals::iterator I = li_->begin(), E = li_->end(); I != E;
++I){
I->second.print(DOUT, mri_);
DOUT << "\n";
}
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[llvm-commits] [llvm] r45573 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Fri Jan 4 02:48:49 2008
New Revision: 45573
URL: http://llvm.org/viewvc/llvm-project?rev=45573&view=rev
Log:
Add that this preserves some analyses.
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=45573&r1=45572&r2=45573&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Fri Jan 4 02:48:49 2008
@@ -53,10 +53,12 @@
/// FIXME: Loop preheaders?
///
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
- MachineFunctionPass::getAnalysisUsage(AU);
AU.setPreservesCFG();
AU.addRequired();
AU.addRequired();
+ AU.addPreserved();
+ AU.addPreserved();
+ MachineFunctionPass::getAnalysisUsage(AU);
}
private:
/// VisitAllLoops - Visit all of the loops in depth first order and try to
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[llvm-commits] [llvm] r45572 - in /llvm/trunk/lib/CodeGen: LLVMTargetMachine.cpp MachineLICM.cpp
Author: void
Date: Fri Jan 4 02:11:03 2008
New Revision: 45572
URL: http://llvm.org/viewvc/llvm-project?rev=45572&view=rev
Log:
Move option to enable machine LICM into LLVMTargetMachine.cpp.
Modified:
llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=45572&r1=45571&r2=45572&view=diff
==
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Fri Jan 4 02:11:03 2008
@@ -33,7 +33,10 @@
static cl::opt
EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
cl::desc("Perform sinking on machine code"));
-
+static cl::opt
+PerformLICM("machine-licm",
+cl::init(false), cl::Hidden,
+cl::desc("Perform loop-invariant code motion on machine code"));
FileModel::Model
LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
@@ -73,7 +76,8 @@
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
- PM.add(createMachineLICMPass());
+ if (PerformLICM)
+PM.add(createMachineLICMPass());
if (EnableSinking)
PM.add(createMachineSinkingPass());
@@ -187,7 +191,8 @@
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
- PM.add(createMachineLICMPass());
+ if (PerformLICM)
+PM.add(createMachineLICMPass());
// Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator());
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=45572&r1=45571&r2=45572&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Fri Jan 4 02:11:03 2008
@@ -28,14 +28,6 @@
using namespace llvm;
-namespace {
- // Hidden options to help debugging
- cl::opt
- PerformLICM("machine-licm",
- cl::init(false), cl::Hidden,
- cl::desc("Perform loop-invariant code motion on machine code"));
-}
-
STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loops");
namespace {
@@ -167,8 +159,6 @@
/// loop.
///
bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
- if (!PerformLICM) return false; // For debugging.
-
DOUT << " Machine LICM \n";
Changed = false;
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[llvm-commits] [llvm] r45571 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Fri Jan 4 01:50:05 2008
New Revision: 45571
URL: http://llvm.org/viewvc/llvm-project?rev=45571&view=rev
Log:
Call the parent's getAnalysisUsage.
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=45571&r1=45570&r2=45571&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Fri Jan 4 01:50:05 2008
@@ -61,6 +61,7 @@
/// FIXME: Loop preheaders?
///
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ MachineFunctionPass::getAnalysisUsage(AU);
AU.setPreservesCFG();
AU.addRequired();
AU.addRequired();
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[llvm-commits] [llvm] r45557 - /llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp
Author: void
Date: Thu Jan 3 17:02:16 2008
New Revision: 45557
URL: http://llvm.org/viewvc/llvm-project?rev=45557&view=rev
Log:
Remove the default else. This was ending in code that looked like this:
if (!strcmp(Target, "x86")) {
// ...
}
else
IntrinsicID = Intrinsic::not_intrinsic;
Modified:
llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp
Modified: llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp?rev=45557&r1=45556&r2=45557&view=diff
==
--- llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp Thu Jan 3 17:02:16 2008
@@ -381,7 +381,5 @@
}
OS << " }\n";
}
- OS << " else\n";
- OS << "IntrinsicID = Intrinsic::not_intrinsic;\n";
OS << "#endif\n\n";
}
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[llvm-commits] [llvm-gcc-4.2] r45544 - /llvm-gcc-4.2/trunk/gcc/objc/objc-act.c
Author: void Date: Thu Jan 3 13:31:37 2008 New Revision: 45544 URL: http://llvm.org/viewvc/llvm-project?rev=45544&view=rev Log: We need to set the decl assembler name for this newly created variable, or else it will be treated as a local and then bad things will happen. Modified: llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Modified: llvm-gcc-4.2/trunk/gcc/objc/objc-act.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/objc/objc-act.c?rev=45544&r1=45543&r2=45544&view=diff == --- llvm-gcc-4.2/trunk/gcc/objc/objc-act.c (original) +++ llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Thu Jan 3 13:31:37 2008 @@ -6089,15 +6089,25 @@ decl = build_objc_string_decl (section); type = build_array_type -(char_type_node, - build_index_type - (build_int_cst (NULL_TREE, - IDENTIFIER_LENGTH (ident; +(char_type_node, + build_index_type + (build_int_cst (NULL_TREE, + IDENTIFIER_LENGTH (ident; decl = start_var_decl (type, IDENTIFIER_POINTER (DECL_NAME (decl))); string_expr = my_build_string (IDENTIFIER_LENGTH (ident) + 1, -IDENTIFIER_POINTER (ident)); + IDENTIFIER_POINTER (ident)); finish_var_decl (decl, string_expr); + /* LLVM LOCAL begin */ +#ifdef ENABLE_LLVM + /* This decl's name is special, it uses 'L' as a prefix. Ask llvm to not + add leading underscore by setting it as a user supplied asm name. */ + set_user_assembler_name (decl, IDENTIFIER_POINTER (DECL_NAME (decl))); + /* Let optimizer know that this decl is not removable. */ + DECL_PRESERVE_P (decl) = 1; +#endif + /* LLVM LOCAL end */ + hsh = hash_ident_enter (hash_table, ident); hash_add_attr (hsh, decl); *chain = tree_cons (decl, ident, *chain); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r45543 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Author: void Date: Thu Jan 3 13:30:07 2008 New Revision: 45543 URL: http://llvm.org/viewvc/llvm-project?rev=45543&view=rev Log: Initialize variable. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=45543&r1=45542&r2=45543&view=diff == --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Thu Jan 3 13:30:07 2008 @@ -3932,7 +3932,7 @@ // If this builtin directly corresponds to an LLVM intrinsic, get the // IntrinsicID now. const char *BuiltinName = IDENTIFIER_POINTER(DECL_NAME(fndecl)); - Intrinsic::ID IntrinsicID; + Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; #define GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN #include "llvm/Intrinsics.gen" #undef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45499 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void Date: Wed Jan 2 15:10:54 2008 New Revision: 45499 URL: http://llvm.org/viewvc/llvm-project?rev=45499&view=rev Log: Use the correct MachineRegisterInfo object. Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=45499&r1=45498&r2=45499&view=diff == --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Wed Jan 2 15:10:54 2008 @@ -178,7 +178,7 @@ CurMF = &MF; TM = &CurMF->getTarget(); TII = TM->getInstrInfo(); - RegInfo = new MachineRegisterInfo(*TM->getRegisterInfo()); + RegInfo = &CurMF->getRegInfo(); // Get our Loop information... LI = &getAnalysis(); @@ -194,7 +194,6 @@ VisitAllLoops(CurLoop); } - delete RegInfo; return Changed; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45498 - in /llvm/trunk/lib/Target/X86: X86InstrInfo.cpp X86InstrInfo.h
Author: void
Date: Wed Jan 2 15:10:40 2008
New Revision: 45498
URL: http://llvm.org/viewvc/llvm-project?rev=45498&view=rev
Log:
Machine LICM will check that operands are defined outside of the loop. Also
check that register isn't 0 before going further.
Modified:
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.h
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=45498&r1=45497&r2=45498&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Wed Jan 2 15:10:40 2008
@@ -144,37 +144,6 @@
return true;
}
-/// isDefinedInEntryBlock - Goes through the entry block to see if the given
-/// virtual register is indeed defined in the entry block.
-///
-bool X86InstrInfo::isDefinedInEntryBlock(const MachineBasicBlock &Entry,
- unsigned VReg) const {
- assert(MRegisterInfo::isVirtualRegister(VReg) &&
- "Map only holds virtual registers!");
- MachineInstrMap.grow(VReg);
- if (MachineInstrMap[VReg]) return true;
-
- MachineBasicBlock::const_iterator I = Entry.begin(), E = Entry.end();
-
- for (; I != E; ++I) {
-const MachineInstr &MI = *I;
-unsigned NumOps = MI.getNumOperands();
-
-for (unsigned i = 0; i < NumOps; ++i) {
- const MachineOperand &MO = MI.getOperand(i);
-
- if(MO.isRegister() && MO.isDef() &&
- MRegisterInfo::isVirtualRegister(MO.getReg()) &&
- MO.getReg() == VReg) {
-MachineInstrMap[VReg] = &MI;
-return true;
- }
-}
- }
-
- return false;
-}
-
/// isReallySideEffectFree - If the M_MAY_HAVE_SIDE_EFFECTS flag is set, this
/// method is called to determine if the specific instance of this instruction
/// has side effects. This is useful in cases of instructions, like loads,
which
@@ -189,8 +158,7 @@
// Loads from global addresses which aren't redefined in the function are
// side effect free.
- if (MRegisterInfo::isVirtualRegister(Reg) &&
- isDefinedInEntryBlock(MI->getParent()->getParent()->front(), Reg) &&
+ if (Reg != 0 && MRegisterInfo::isVirtualRegister(Reg) &&
MI->getOperand(2).isImmediate() &&
MI->getOperand(3).isRegister() &&
MI->getOperand(4).isGlobalAddress() &&
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=45498&r1=45497&r2=45498&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Wed Jan 2 15:10:40 2008
@@ -225,13 +225,6 @@
class X86InstrInfo : public TargetInstrInfoImpl {
X86TargetMachine &TM;
const X86RegisterInfo RI;
- mutable IndexedMap
MachineInstrMap;
-
- /// isDefinedInEntryBlock - Goes through the entry block to see if the given
- /// virtual register is indeed defined in the entry block.
- ///
- bool isDefinedInEntryBlock(const MachineBasicBlock &Entry,
- unsigned VReg) const;
public:
X86InstrInfo(X86TargetMachine &tm);
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[llvm-commits] [llvm] r45496 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Wed Jan 2 14:47:37 2008
New Revision: 45496
URL: http://llvm.org/viewvc/llvm-project?rev=45496&view=rev
Log:
Remove dead code.
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=45496&r1=45495&r2=45496&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Wed Jan 2 14:47:37 2008
@@ -56,9 +56,6 @@
// State that is updated as we process loops
bool Changed; // True if a loop is changed.
MachineLoop *CurLoop; // The current loop we are working on.
-
-// Map the def of a virtual register to the machine instruction.
-IndexedMap VRegDefs;
public:
static char ID; // Pass identification, replacement for typeid
MachineLICM() : MachineFunctionPass((intptr_t)&ID) {}
@@ -92,11 +89,6 @@
HoistRegion(DT->getNode(L->getHeader()));
}
-/// MapVirtualRegisterDefs - Create a map of which machine instruction
-/// defines a virtual register.
-///
-void MapVirtualRegisterDefs();
-
/// IsInSubLoop - A little predicate that returns true if the specified
/// basic block is in a subloop of the current one, not the current one
/// itself.
@@ -192,8 +184,6 @@
LI = &getAnalysis();
DT = &getAnalysis();
- MapVirtualRegisterDefs();
-
for (MachineLoopInfo::iterator
I = LI->begin(), E = LI->end(); I != E; ++I) {
CurLoop = *I;
@@ -208,31 +198,6 @@
return Changed;
}
-/// MapVirtualRegisterDefs - Create a map of which machine instruction defines
a
-/// virtual register.
-///
-void MachineLICM::MapVirtualRegisterDefs() {
- for (MachineFunction::const_iterator
- I = CurMF->begin(), E = CurMF->end(); I != E; ++I) {
-const MachineBasicBlock &MBB = *I;
-
-for (MachineBasicBlock::const_iterator
- II = MBB.begin(), IE = MBB.end(); II != IE; ++II) {
- const MachineInstr &MI = *II;
-
- for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
-const MachineOperand &MO = MI.getOperand(i);
-
-if (MO.isRegister() && MO.isDef() &&
-MRegisterInfo::isVirtualRegister(MO.getReg())) {
- VRegDefs.grow(MO.getReg());
- VRegDefs[MO.getReg()] = &MI;
-}
- }
-}
- }
-}
-
/// HoistRegion - Walk the specified region of the CFG (defined by all blocks
/// dominated by the specified block, and that are in the current loop) in
depth
/// first order w.r.t the DominatorTree. This allows us to visit definitions
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[llvm-commits] [llvm] r45492 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Wed Jan 2 13:32:43 2008
New Revision: 45492
URL: http://llvm.org/viewvc/llvm-project?rev=45492&view=rev
Log:
Use the new architecture to get the containing machine basic block for a machine
instruction. Also, use "splice" to move the new instruction instead of
remove/insert (where it was leaking memory anyway).
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=45492&r1=45491&r2=45492&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Wed Jan 2 13:32:43 2008
@@ -20,6 +20,7 @@
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CFG.h"
#include "llvm/Support/CommandLine.h"
@@ -43,12 +44,14 @@
namespace {
class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
+const TargetMachine *TM;
const TargetInstrInfo *TII;
MachineFunction *CurMF; // Current MachineFunction
// Various analyses that we use...
MachineLoopInfo *LI; // Current MachineLoopInfo
MachineDominatorTree *DT; // Machine dominator tree for the current Loop
+MachineRegisterInfo *RegInfo; // Machine register information
// State that is updated as we process loops
bool Changed; // True if a loop is changed.
@@ -125,16 +128,27 @@
/// MoveInstToEndOfBlock - Moves the machine instruction to the bottom of
/// the predecessor basic block (but before the terminator instructions).
///
-void MoveInstToEndOfBlock(MachineBasicBlock *MBB, MachineInstr *MI) {
+void MoveInstToEndOfBlock(MachineBasicBlock *ToMBB,
+ MachineBasicBlock *FromMBB,
+ MachineInstr *MI) {
DEBUG({
DOUT << "Hoisting " << *MI;
- if (MBB->getBasicBlock())
+ if (ToMBB->getBasicBlock())
DOUT << " to MachineBasicBlock "
- << MBB->getBasicBlock()->getName();
+ << ToMBB->getBasicBlock()->getName();
DOUT << "\n";
});
- MachineBasicBlock::iterator Iter = MBB->getFirstTerminator();
- MBB->insert(Iter, MI);
+
+ MachineBasicBlock::iterator WhereIter = ToMBB->getFirstTerminator();
+ MachineBasicBlock::iterator To, From = FromMBB->begin();
+
+ while (&*From != MI)
+++From;
+
+ assert(From != FromMBB->end() && "Didn't find instr in BB!");
+
+ To = From;
+ ToMBB->splice(WhereIter, FromMBB, From, ++To);
++NumHoisted;
}
@@ -170,7 +184,9 @@
Changed = false;
CurMF = &MF;
- TII = CurMF->getTarget().getInstrInfo();
+ TM = &CurMF->getTarget();
+ TII = TM->getInstrInfo();
+ RegInfo = new MachineRegisterInfo(*TM->getRegisterInfo());
// Get our Loop information...
LI = &getAnalysis();
@@ -188,6 +204,7 @@
VisitAllLoops(CurLoop);
}
+ delete RegInfo;
return Changed;
}
@@ -258,8 +275,7 @@
if (I.getInstrDescriptor()->ImplicitUses) {
DOUT << " * Instruction has implicit uses:\n";
-const TargetMachine &TM = CurMF->getTarget();
-const MRegisterInfo *MRI = TM.getRegisterInfo();
+const MRegisterInfo *MRI = TM->getRegisterInfo();
const unsigned *ImpUses = I.getInstrDescriptor()->ImplicitUses;
for (; *ImpUses; ++ImpUses)
@@ -269,8 +285,7 @@
if (I.getInstrDescriptor()->ImplicitDefs) {
DOUT << " * Instruction has implicit defines:\n";
-const TargetMachine &TM = CurMF->getTarget();
-const MRegisterInfo *MRI = TM.getRegisterInfo();
+const MRegisterInfo *MRI = TM->getRegisterInfo();
const unsigned *ImpDefs = I.getInstrDescriptor()->ImplicitDefs;
for (; *ImpDefs; ++ImpDefs)
@@ -294,11 +309,11 @@
if (!MRegisterInfo::isVirtualRegister(Reg))
return false;
-assert(VRegDefs[Reg] && "Machine instr not mapped for this vreg?");
+assert(RegInfo->getVRegDef(Reg)&&"Machine instr not mapped for this
vreg?");
// If the loop contains the definition of an operand, then the instruction
// isn't loop invariant.
-if (CurLoop->contains(VRegDefs[Reg]->getParent()))
+if (CurLoop->contains(RegInfo->getVRegDef(Reg)->getParent()))
return false;
}
@@ -337,21 +352,6 @@
"The predecessor doesn't feed directly into the loop header!");
// Now move the instructions to the predecessor.
- MachineInstr *NewMI = MI.clone();
- MoveInstToEndOfBlock(MBB, NewMI);
-
- // Update VRegDefs.
- for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
-const MachineOperand &MO = NewMI->getOperand(i);
-
-if (MO.isRegister() && MO
[llvm-commits] [llvm] r45478 - /llvm/trunk/test/Transforms/LICM/scalar_promote.ll
Author: void
Date: Mon Dec 31 19:34:36 2007
New Revision: 45478
URL: http://llvm.org/viewvc/llvm-project?rev=45478&view=rev
Log:
Update this testcase. The output needs to be disabled to pass.
Modified:
llvm/trunk/test/Transforms/LICM/scalar_promote.ll
Modified: llvm/trunk/test/Transforms/LICM/scalar_promote.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LICM/scalar_promote.ll?rev=45478&r1=45477&r2=45478&view=diff
==
--- llvm/trunk/test/Transforms/LICM/scalar_promote.ll (original)
+++ llvm/trunk/test/Transforms/LICM/scalar_promote.ll Mon Dec 31 19:34:36 2007
@@ -1,37 +1,35 @@
-; RUN: llvm-upgrade < %s | llvm-as | opt -licm -stats |& \
+; RUN: llvm-as < %s | opt -licm -disable-output -stats |& \
; RUN:grep {memory locations promoted to register}
[EMAIL PROTECTED] = global i32 7; [#uses=4]
-%X = global int 7
-
-void %testfunc(int %i) {
+define void @testfunc(i32 %i) {
+; :0
br label %Loop
-Loop:
- %j = phi uint [0, %0], [%Next, %Loop]
-
- %x = load int* %X ; Should promote this to a register inside of loop!
- %x2 = add int %x, 1
- store int %x2, int* %X
-
- %Next = add uint %j, 1
- %cond = seteq uint %Next, 0
- br bool %cond, label %Out, label %Loop
+Loop: ; preds = %Loop, %0
+ %j = phi i32 [ 0, %0 ], [ %Next, %Loop ];
[#uses=1]
+ %x = load i32* @X ; [#uses=1]
+ %x2 = add i32 %x, 1 ; [#uses=1]
+ store i32 %x2, i32* @X
+ %Next = add i32 %j, 1 ; [#uses=2]
+ %cond = icmp eq i32 %Next, 0; [#uses=1]
+ br i1 %cond, label %Out, label %Loop
-Out:
+Out: ; preds = %Loop
ret void
}
-void %testhard(int %i) {
+define void @testhard(i32 %i) {
br label %Loop
-Loop:
- %X1 = getelementptr int* %X, long 0
- %A = load int* %X1 ; Aliases X, needs to be rewritten
- %V = add int %A, 1
- %X2 = getelementptr int* %X, long 0
- store int %V, int* %X2
- br bool false, label %Loop, label %Exit
-Exit:
- ret void
+Loop: ; preds = %Loop, %0
+ %X1 = getelementptr i32* @X, i64 0 ; [#uses=1]
+ %A = load i32* %X1 ; [#uses=1]
+ %V = add i32 %A, 1 ; [#uses=1]
+ %X2 = getelementptr i32* @X, i64 0 ; [#uses=1]
+ store i32 %V, i32* %X2
+ br i1 false, label %Loop, label %Exit
+Exit: ; preds = %Loop
+ ret void
}
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[llvm-commits] [test-suite] r45474 - /test-suite/trunk/Makefile.programs
Author: void Date: Mon Dec 31 18:22:07 2007 New Revision: 45474 URL: http://llvm.org/viewvc/llvm-project?rev=45474&view=rev Log: Turn on Machine LICM for a beta test. Modified: test-suite/trunk/Makefile.programs Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=45474&r1=45473&r2=45474&view=diff == --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Mon Dec 31 18:22:07 2007 @@ -222,7 +222,8 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -new-coalescer-heuristic=true +LLCBETAOPTION := -machine-licm +#-new-coalescer-heuristic=true #-tailcallopt #-regalloc=local -fast #-disable-rematerialization ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r45470 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ l
Hi Owen,
> ==
>
> --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
> +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Dec 31
> 00:32:00 2007
> @@ -458,6 +458,15 @@
> return 0;
>}
>
> + /// copyRegToReg - Add a copy between a pair of registers
> + virtual void copyRegToReg(MachineBasicBlock &MBB,
> +MachineBasicBlock::iterator MI,
> +unsigned DestReg, unsigned SrcReg,
> +const TargetRegisterClass *DestRC,
> +const TargetRegisterClass *SrcRC) const {
> +assert(0 && "Target didn't implement
> TargetInstrInfo::copyRegToReg!");
> + }
> +
>/// BlockHasNoFallThrough - Return true if the specified block
> does not
>/// fall-through into its successor block. This is primarily
> used when a
>/// branch is unanalyzable. It is useful for things like
> unconditional
>
Is there any reason not to make this a pure virtual function?
Just wondering. :-)
-bw
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[llvm-commits] [llvm] r45444 - in /llvm/trunk/lib/Target/X86: X86InstrInfo.cpp X86InstrInfo.h
Author: void
Date: Sat Dec 29 21:18:58 2007
New Revision: 45444
URL: http://llvm.org/viewvc/llvm-project?rev=45444&view=rev
Log:
If we have a load of a global address that's not modified during the
function, then go ahead and hoist it out of the loop. This is the result:
$ cat a.c
volatile int G;
int A(int N) {
for (; N > 0; --N)
G++;
}
$ llc -o - -relocation-model=pic
_A:
..
LBB1_2: # bb
movlL_G$non_lazy_ptr-"L1$pb"(%eax), %esi
incl(%esi)
incl%edx
cmpl%ecx, %edx
jne LBB1_2 # bb
..
$ llc -o - -relocation-model=pic -machine-licm
_A:
..
movlL_G$non_lazy_ptr-"L1$pb"(%eax), %eax
LBB1_2: # bb
incl(%eax)
incl%edx
cmpl%ecx, %edx
jne LBB1_2 # bb
..
I'm limiting this to the MOV32rm x86 instruction for now.
Modified:
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.h
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=45444&r1=45443&r2=45444&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Sat Dec 29 21:18:58 2007
@@ -144,6 +144,37 @@
return true;
}
+/// isDefinedInEntryBlock - Goes through the entry block to see if the given
+/// virtual register is indeed defined in the entry block.
+///
+bool X86InstrInfo::isDefinedInEntryBlock(const MachineBasicBlock &Entry,
+ unsigned VReg) const {
+ assert(MRegisterInfo::isVirtualRegister(VReg) &&
+ "Map only holds virtual registers!");
+ MachineInstrMap.grow(VReg);
+ if (MachineInstrMap[VReg]) return true;
+
+ MachineBasicBlock::const_iterator I = Entry.begin(), E = Entry.end();
+
+ for (; I != E; ++I) {
+const MachineInstr &MI = *I;
+unsigned NumOps = MI.getNumOperands();
+
+for (unsigned i = 0; i < NumOps; ++i) {
+ const MachineOperand &MO = MI.getOperand(i);
+
+ if(MO.isRegister() && MO.isDef() &&
+ MRegisterInfo::isVirtualRegister(MO.getReg()) &&
+ MO.getReg() == VReg) {
+MachineInstrMap[VReg] = &MI;
+return true;
+ }
+}
+ }
+
+ return false;
+}
+
/// isReallySideEffectFree - If the M_MAY_HAVE_SIDE_EFFECTS flag is set, this
/// method is called to determine if the specific instance of this instruction
/// has side effects. This is useful in cases of instructions, like loads,
which
@@ -152,10 +183,25 @@
bool X86InstrInfo::isReallySideEffectFree(MachineInstr *MI) const {
switch (MI->getOpcode()) {
default: break;
+ case X86::MOV32rm:
+if (MI->getOperand(1).isRegister()) {
+ unsigned Reg = MI->getOperand(1).getReg();
+
+ // Loads from global addresses which aren't redefined in the function are
+ // side effect free.
+ if (MRegisterInfo::isVirtualRegister(Reg) &&
+ isDefinedInEntryBlock(MI->getParent()->getParent()->front(), Reg) &&
+ MI->getOperand(2).isImmediate() &&
+ MI->getOperand(3).isRegister() &&
+ MI->getOperand(4).isGlobalAddress() &&
+ MI->getOperand(2).getImmedValue() == 1 &&
+ MI->getOperand(3).getReg() == 0)
+return true;
+}
+// FALLTHROUGH
case X86::MOV8rm:
case X86::MOV16rm:
case X86::MOV16_rm:
- case X86::MOV32rm:
case X86::MOV32_rm:
case X86::MOV64rm:
case X86::LD_Fp64m:
@@ -166,8 +212,10 @@
case X86::MMX_MOVD64rm:
case X86::MMX_MOVQ64rm:
// Loads from constant pools have no side effects
-return MI->getOperand(1).isRegister() && MI->getOperand(2).isImmediate() &&
- MI->getOperand(3).isRegister() &&
MI->getOperand(4).isConstantPoolIndex() &&
+return MI->getOperand(1).isRegister() &&
+ MI->getOperand(2).isImmediate() &&
+ MI->getOperand(3).isRegister() &&
+ MI->getOperand(4).isConstantPoolIndex() &&
MI->getOperand(1).getReg() == 0 &&
MI->getOperand(2).getImmedValue() == 1 &&
MI->getOperand(3).getReg() == 0;
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=45444&r1=45443&r2=45444&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Sat Dec 29 21:18:58 2007
@@ -16,6 +16,8 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "X86RegisterInfo.h"
+#include "llvm/ADT/IndexedMap.h"
+#include "llvm/Target/MRegisterInfo.h"
namespace llvm {
class X86RegisterInfo;
@@ -223,6 +225,13 @@
class X86InstrInfo : public TargetInstrInfo {
X86TargetMachine &TM;
const X86RegisterInfo RI;
+ mutable IndexedMap
MachineInstrMap;
+
+ /// isDefinedInEntryBlock - Goes through the entry block to see if t
[llvm-commits] [llvm] r45245 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Wed Dec 19 19:08:10 2007
New Revision: 45245
URL: http://llvm.org/viewvc/llvm-project?rev=45245&view=rev
Log:
Updated comments to reflect what "side effects" means in this situation.
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=45245&r1=45244&r2=45245&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Wed Dec 19 19:08:10 2007
@@ -249,8 +249,8 @@
/// IsLoopInvariantInst - Returns true if the instruction is loop
/// invariant. I.e., all virtual register operands are defined outside of the
-/// loop, physical registers aren't accessed (explicitly or implicitly), and
the
-/// instruction is hoistable.
+/// loop, physical registers aren't accessed explicitly, and there are no side
+/// effects that aren't captured by the operands or other flags.
///
bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
DEBUG({
@@ -281,13 +281,6 @@
DOUT << " * Instruction has side effects.\n";
});
-#if 0
- // FIXME: Don't hoist if this instruction implicitly reads physical
registers.
- if (I.getInstrDescriptor()->ImplicitUses ||
- I.getInstrDescriptor()->ImplicitDefs)
-return false;
-#endif
-
// The instruction is loop invariant if all of its operands are
loop-invariant
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
const MachineOperand &MO = I.getOperand(i);
@@ -309,7 +302,7 @@
return false;
}
- // Don't hoist something that has side effects.
+ // Don't hoist something that has unmodelled side effects.
if (TII->hasUnmodelledSideEffects(&I)) return false;
// If we got this far, the instruction is loop invariant!
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[llvm-commits] [llvm] r45192 - /llvm/trunk/utils/emacs/tablegen-mode.el
Author: void
Date: Wed Dec 19 00:20:05 2007
New Revision: 45192
URL: http://llvm.org/viewvc/llvm-project?rev=45192&view=rev
Log:
Modified to support comments better.
Modified:
llvm/trunk/utils/emacs/tablegen-mode.el
Modified: llvm/trunk/utils/emacs/tablegen-mode.el
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/emacs/tablegen-mode.el?rev=45192&r1=45191&r2=45192&view=diff
==
--- llvm/trunk/utils/emacs/tablegen-mode.el (original)
+++ llvm/trunk/utils/emacs/tablegen-mode.el Wed Dec 19 00:20:05 2007
@@ -1,15 +1,12 @@
;; Maintainer: The LLVM team, http://llvm.org/
;; Description: Major mode for TableGen description files (part of LLVM
project)
-;; Updated: 2007-03-26
+;; Updated: 2007-12-18
(require 'comint)
(require 'custom)
(require 'ansi-color)
;; Create mode-specific tables.
-(defvar tablegen-mode-syntax-table nil
- "Syntax table used while in TableGen mode.")
-
(defvar td-decorators-face 'td-decorators-face
"Face method decorators.")
(make-face 'td-decorators-face)
@@ -25,7 +22,7 @@
)
(list
;; Comments
- '("\/\/" . font-lock-comment-face)
+;; '("\/\/" . font-lock-comment-face)
;; Strings
'("\"[^\"]+\"" . font-lock-string-face)
;; Hex constants
@@ -51,44 +48,36 @@
;; Shamelessly ripped from jasmin.el
;; URL: http://www.neilvandyke.org/jasmin-emacs/jasmin.el
-(if (not tablegen-mode-syntax-table)
-(progn
- (setq tablegen-mode-syntax-table (make-syntax-table))
- (mapcar (function
- (lambda (n)
- (modify-syntax-entry (aref n 0)
- (aref n 1)
- tablegen-mode-syntax-table)))
- '(
-;; whitespace (` ')
-[?\^m " "]
-[?\f " "]
-[?\n " "]
-[?\t " "]
-[?\ " "]
-;; word constituents (`w')
-[?\% "w"]
-;;[?_ "w "]
-;; comments
-[?\; "< "]
-[?\n "> "]
-;;[?\r "> "]
-;;[?\^m "> "]
-;; symbol constituents (`_')
-;; punctuation (`.')
-;; open paren (`(')
-[?\( "("]
-[?\[ "("]
-[?\{ "("]
-[?\< "("]
-;; close paren (`)')
-[?\) ")"]
-[?\] ")"]
-[?\} ")"]
-[?\> ")"]
-;; string quote ('"')
-[?\" "\""]
-
+(defvar tablegen-mode-syntax-table nil
+ "Syntax table used in `tablegen-mode' buffers.")
+(when (not tablegen-mode-syntax-table)
+ (setq tablegen-mode-syntax-table (make-syntax-table))
+ ;; whitespace (` ')
+ (modify-syntax-entry ?\ " " tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\t " " tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\r " " tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\n " " tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\f " " tablegen-mode-syntax-table)
+ ;; word constituents (`w')
+ (modify-syntax-entry ?\% "w" tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\_ "w" tablegen-mode-syntax-table)
+ ;; comments
+ (modify-syntax-entry ?/ ". 124b" tablegen-mode-syntax-table)
+ (modify-syntax-entry ?* ". 23" tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\n "> b"tablegen-mode-syntax-table)
+ ;; open paren (`(')
+ (modify-syntax-entry ?\( "(" tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\[ "(" tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\{ "(" tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\< "(" tablegen-mode-syntax-table)
+ ;; close paren (`)')
+ (modify-syntax-entry ?\) ")" tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\] ")" tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\} ")" tablegen-mode-syntax-table)
+ (modify-syntax-entry ?\> ")" tablegen-mode-syntax-table)
+ ;; string quote ('"')
+ (modify-syntax-entry ?\" "\"" tablegen-mode-syntax-table)
+ )
;; - Abbrev table -
@@ -112,19 +101,19 @@
Runs tablegen-mode-hook on startup."
(interactive)
(kill-all-local-variables)
- (use-local-map tablegen-mode-map) ; Provides the local keymap.
- (setq major-mode 'tablegen-mode)
-
+ (use-local-map tablegen-mode-map) ; Provides the local keymap.
(make-local-variable 'font-lock-defaults)
- (setq major-mode 'tablegen-mode ; This is how describe-mode
-; finds the doc string to print.
- mode-name "TableGen"; This name goes into the modeline.
- font-lock-defaults `(tablegen-font-lock-keywords
[llvm-commits] [llvm] r45190 - /llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
Author: void
Date: Wed Dec 19 00:07:48 2007
New Revision: 45190
URL: http://llvm.org/viewvc/llvm-project?rev=45190&view=rev
Log:
Mark the "isRemat" instruction as never having side effects.
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=45190&r1=45189&r2=45190&view=diff
==
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Wed Dec 19 00:07:48 2007
@@ -687,7 +687,7 @@
"subfic $rD, $rA, $imm", IntGeneral,
[(set GPRC:$rD, (subc immSExt16:$imm, GPRC:$rA))]>;
-let isReMaterializable = 1 in {
+let isReMaterializable = 1, neverHasSideEffects = 1 in {
def LI : DForm_2_r0<14, (outs GPRC:$rD), (ins symbolLo:$imm),
"li $rD, $imm", IntGeneral,
[(set GPRC:$rD, immSExt16:$imm)]>;
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[llvm-commits] [llvm] r45178 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Tue Dec 18 15:38:04 2007
New Revision: 45178
URL: http://llvm.org/viewvc/llvm-project?rev=45178&view=rev
Log:
Add debugging info. Use the newly created "hasUnmodelledSideEffects" method.
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=45178&r1=45177&r2=45178&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Dec 18 15:38:04 2007
@@ -103,25 +103,6 @@
return LI->getLoopFor(BB) != CurLoop;
}
-/// CanHoistInst - Checks that this instructions is one that can be hoisted
-/// out of the loop. I.e., it has no side effects, isn't a control flow
-/// instr, etc.
-///
-bool CanHoistInst(MachineInstr &I) const {
-#ifndef NDEBUG
- DEBUG({
- DOUT << "--- Checking if we can hoist " << I << "\n";
- if (I.getInstrDescriptor()->ImplicitUses)
-DOUT << " * Instruction has implicit uses.\n";
- else if (!TII->isTriviallyReMaterializable(&I))
-DOUT << " * Instruction has side effects.\n";
-});
-#endif
- // Don't hoist if this instruction implicitly reads physical registers.
- if (I.getInstrDescriptor()->ImplicitUses) return false;
- return TII->isTriviallyReMaterializable(&I);
-}
-
/// IsLoopInvariantInst - Returns true if the instruction is loop
/// invariant. I.e., all virtual register operands are defined outside of
/// the loop, physical registers aren't accessed (explicitly or
implicitly),
@@ -272,13 +253,46 @@
/// instruction is hoistable.
///
bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
- if (!CanHoistInst(I)) return false;
+ DEBUG({
+ DOUT << "--- Checking if we can hoist " << I;
+ if (I.getInstrDescriptor()->ImplicitUses) {
+DOUT << " * Instruction has implicit uses:\n";
+
+const TargetMachine &TM = CurMF->getTarget();
+const MRegisterInfo *MRI = TM.getRegisterInfo();
+const unsigned *ImpUses = I.getInstrDescriptor()->ImplicitUses;
+
+for (; *ImpUses; ++ImpUses)
+ DOUT << " -> " << MRI->getName(*ImpUses) << "\n";
+ }
+
+ if (I.getInstrDescriptor()->ImplicitDefs) {
+DOUT << " * Instruction has implicit defines:\n";
+
+const TargetMachine &TM = CurMF->getTarget();
+const MRegisterInfo *MRI = TM.getRegisterInfo();
+const unsigned *ImpDefs = I.getInstrDescriptor()->ImplicitDefs;
+
+for (; *ImpDefs; ++ImpDefs)
+ DOUT << " -> " << MRI->getName(*ImpDefs) << "\n";
+ }
+
+ if (TII->hasUnmodelledSideEffects(&I))
+DOUT << " * Instruction has side effects.\n";
+});
+
+#if 0
+ // FIXME: Don't hoist if this instruction implicitly reads physical
registers.
+ if (I.getInstrDescriptor()->ImplicitUses ||
+ I.getInstrDescriptor()->ImplicitDefs)
+return false;
+#endif
// The instruction is loop invariant if all of its operands are
loop-invariant
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
const MachineOperand &MO = I.getOperand(i);
-if (!MO.isRegister() || !MO.isUse())
+if (!(MO.isRegister() && MO.getReg() && MO.isUse()))
continue;
unsigned Reg = MO.getReg();
@@ -295,6 +309,9 @@
return false;
}
+ // Don't hoist something that has side effects.
+ if (TII->hasUnmodelledSideEffects(&I)) return false;
+
// If we got this far, the instruction is loop invariant!
return true;
}
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[llvm-commits] [llvm] r45166 - /llvm/trunk/utils/buildit/build_llvm
Author: void
Date: Tue Dec 18 13:21:52 2007
New Revision: 45166
URL: http://llvm.org/viewvc/llvm-project?rev=45166&view=rev
Log:
Ignore shell scripts when doing "dsymutil" call.
Modified:
llvm/trunk/utils/buildit/build_llvm
Modified: llvm/trunk/utils/buildit/build_llvm
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/buildit/build_llvm?rev=45166&r1=45165&r2=45166&view=diff
==
--- llvm/trunk/utils/buildit/build_llvm (original)
+++ llvm/trunk/utils/buildit/build_llvm Tue Dec 18 13:21:52 2007
@@ -201,7 +201,8 @@
rm -rf * || exit 1
# Generate .dSYM files
-find $DEST_DIR -perm -0111 -type f -print | xargs -n 1 -P ${SYSCTL} dsymutil
+find $DEST_DIR -perm -0111 -type f ! \( -name '*.la' -o -name gccas -o -name
gccld -o -name llvm-config \) -print \
+| xargs -n 1 -P ${SYSCTL} dsymutil
# Save .dSYM files and .a archives
cd $DEST_DIR || exit 1
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Re: [llvm-commits] [llvm] r45128 - /llvm/trunk/lib/Target/X86/X86InstrFPStack.td
On Dec 17, 2007 4:31 PM, Chris Lattner <[EMAIL PROTECTED]> wrote: > > On Dec 17, 2007, at 4:29 PM, Chris Lattner wrote: > > > > > On Dec 17, 2007, at 2:17 PM, Bill Wendling wrote: > > > >> Author: void > >> Date: Mon Dec 17 16:17:14 2007 > >> New Revision: 45128 > >> > >> URL: http://llvm.org/viewvc/llvm-project?rev=45128&view=rev > >> Log: > >> LD_Fp64m should have "isRematerializable" set. > > > > It should? > > Oh right, because isReallyTriviallyReMaterializable handles it. > > Doh, I hate that flag :-) > LOL. Yeah, it's not 100% great. I also added the isRemat flag to other functions that that method deals with (and marked them appropriately for LICM). -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r45134 - /llvm/trunk/test/CodeGen/CellSPU/immed32.ll
Hi Scott, > --- llvm/trunk/test/CodeGen/CellSPU/immed32.ll (added) > +++ llvm/trunk/test/CodeGen/CellSPU/immed32.ll Mon Dec 17 17:45:52 2007 > @@ -0,0 +1,70 @@ > +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s > +; RUN: grep ilhu %t1.s | count 8 && > +; RUN: grep iohl %t1.s | count 6 && > +; RUN: grep il%t1.s | count 11 && > +; RUN: grep 16429 %t1.s | count 1 && > +; RUN: grep 63572 %t1.s | count 1 && > +; RUN: grep 128 %t1.s | count 1 && > +; RUN: grep 32639 %t1.s | count 1 && > +; RUN: grep 65535 %t1.s | count 1 && > +; RUN: grep 16457 %t1.s | count 1 && > +; RUN: grep 4059 %t1.s | count 1 && > +; RUN: grep 49077 %t1.s | count 1 && > +; RUN: grep 1267 %t1.s | count 2 && > +; RUN: grep 16309 %t1.s | count 1 > + I don't think you need the "&&" here anymore. -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45133 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Author: void
Date: Mon Dec 17 17:19:54 2007
New Revision: 45133
URL: http://llvm.org/viewvc/llvm-project?rev=45133&view=rev
Log:
s/hasSideEffects/hasUnmodelledSideEffects/g
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=45133&r1=45132&r2=45133&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Dec 17 17:19:54 2007
@@ -314,9 +314,10 @@
isReallyTriviallyReMaterializable(MI);
}
- /// hasSideEffects - Returns true if the instruction has side effects that
are
- /// not captured by any operands of the instruction or other flags.
- bool hasSideEffects(MachineInstr *MI) const {
+ /// hasUnmodelledSideEffects - Returns true if the instruction has side
+ /// effects that are not captured by any operands of the instruction or other
+ /// flags.
+ bool hasUnmodelledSideEffects(MachineInstr *MI) const {
const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
if (!(TID->Flags & M_NEVER_HAS_SIDE_EFFECTS ||
TID->Flags & M_MAY_HAVE_SIDE_EFFECTS)) return true;
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Re: [llvm-commits] [llvm] r45126 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h
On Dec 17, 2007 3:15 PM, Chris Lattner <[EMAIL PROTECTED]> wrote:
>
> > + /// hasSideEffects - Returns true if the instruction has side
> > effects that are
> > + /// not captured by any operands of the instruction or other flags.
> > + bool hasSideEffects(MachineInstr *MI) const {
>
> How about "hasUnmodelledSideEffects() ?
>
> I would expect a method named 'hasSideEffects' to return true if
> flags/operands indicate a side effect.
>
Good point. I'll make the change. :-)
-bw
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[llvm-commits] [llvm] r45132 - in /llvm/trunk/lib/Target/X86: X86InstrFPStack.td X86InstrInfo.cpp X86InstrInfo.h X86InstrInfo.td X86InstrMMX.td X86InstrSSE.td X86InstrX86-64.td
Author: void
Date: Mon Dec 17 17:07:56 2007
New Revision: 45132
URL: http://llvm.org/viewvc/llvm-project?rev=45132&view=rev
Log:
Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I
based what flag to set on whether it was already marked as
"isRematerializable". If there was a further check to determine if it's "really"
rematerializable, then I marked it as "mayHaveSideEffects" and created a check
in the X86 back-end similar to the remat one.
Modified:
llvm/trunk/lib/Target/X86/X86InstrFPStack.td
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.h
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86InstrMMX.td
llvm/trunk/lib/Target/X86/X86InstrSSE.td
llvm/trunk/lib/Target/X86/X86InstrX86-64.td
Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=45132&r1=45131&r2=45132&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Mon Dec 17 17:07:56 2007
@@ -349,7 +349,7 @@
let isLoad = 1 in {
def LD_Fp32m : FpIf32<(outs RFP32:$dst), (ins f32mem:$src), ZeroArgFP,
[(set RFP32:$dst, (loadf32 addr:$src))]>;
-let isReMaterializable = 1 in
+let isReMaterializable = 1, mayHaveSideEffects = 1 in
def LD_Fp64m : FpIf64<(outs RFP64:$dst), (ins f64mem:$src), ZeroArgFP,
[(set RFP64:$dst, (loadf64 addr:$src))]>;
def LD_Fp80m : FpI_<(outs RFP80:$dst), (ins f80mem:$src), ZeroArgFP,
@@ -466,7 +466,7 @@
def XCH_F: FPI<0xC8, AddRegFrm, (outs), (ins RST:$op), "fxch\t$op">, D9;
// Floating point constant loads.
-let isReMaterializable = 1 in {
+let isReMaterializable = 1, neverHasSideEffects = 1 in {
def LD_Fp032 : FpIf32<(outs RFP32:$dst), (ins), ZeroArgFP,
[(set RFP32:$dst, fpimm0)]>;
def LD_Fp132 : FpIf32<(outs RFP32:$dst), (ins), ZeroArgFP,
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=45132&r1=45131&r2=45132&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Dec 17 17:07:56 2007
@@ -144,6 +144,40 @@
return true;
}
+/// isReallySideEffectFree - If the M_MAY_HAVE_SIDE_EFFECTS flag is set, this
+/// method is called to determine if the specific instance of this instruction
+/// has side effects. This is useful in cases of instructions, like loads,
which
+/// generally always have side effects. A load from a constant pool doesn't
have
+/// side effects, though. So we need to differentiate it from the general case.
+bool X86InstrInfo::isReallySideEffectFree(MachineInstr *MI) const {
+ switch (MI->getOpcode()) {
+ default: break;
+ case X86::MOV8rm:
+ case X86::MOV16rm:
+ case X86::MOV16_rm:
+ case X86::MOV32rm:
+ case X86::MOV32_rm:
+ case X86::MOV64rm:
+ case X86::LD_Fp64m:
+ case X86::MOVSSrm:
+ case X86::MOVSDrm:
+ case X86::MOVAPSrm:
+ case X86::MOVAPDrm:
+ case X86::MMX_MOVD64rm:
+ case X86::MMX_MOVQ64rm:
+// Loads from constant pools have no side effects
+return MI->getOperand(1).isRegister() && MI->getOperand(2).isImmediate() &&
+ MI->getOperand(3).isRegister() &&
MI->getOperand(4).isConstantPoolIndex() &&
+ MI->getOperand(1).getReg() == 0 &&
+ MI->getOperand(2).getImmedValue() == 1 &&
+ MI->getOperand(3).getReg() == 0;
+ }
+
+ // All other instances of these instructions are presumed to have side
+ // effects.
+ return false;
+}
+
/// hasLiveCondCodeDef - True if MI has a condition code def, e.g. EFLAGS, that
/// is not marked dead.
static bool hasLiveCondCodeDef(MachineInstr *MI) {
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=45132&r1=45131&r2=45132&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Mon Dec 17 17:07:56 2007
@@ -240,7 +240,8 @@
unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
bool isReallyTriviallyReMaterializable(MachineInstr *MI) const;
-
+ bool isReallySideEffectFree(MachineInstr *MI) const;
+
/// convertToThreeAddress - This method must be implemented by targets that
/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
/// may be able to convert a two-address instruction into a true
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Inst
[llvm-commits] [llvm] r45128 - /llvm/trunk/lib/Target/X86/X86InstrFPStack.td
Author: void
Date: Mon Dec 17 16:17:14 2007
New Revision: 45128
URL: http://llvm.org/viewvc/llvm-project?rev=45128&view=rev
Log:
LD_Fp64m should have "isRematerializable" set.
Modified:
llvm/trunk/lib/Target/X86/X86InstrFPStack.td
Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=45128&r1=45127&r2=45128&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Mon Dec 17 16:17:14 2007
@@ -349,7 +349,8 @@
let isLoad = 1 in {
def LD_Fp32m : FpIf32<(outs RFP32:$dst), (ins f32mem:$src), ZeroArgFP,
[(set RFP32:$dst, (loadf32 addr:$src))]>;
-def LD_Fp64m : FpIf64<(outs RFP64:$dst), (ins f64mem:$src), ZeroArgFP,
+let isReMaterializable = 1 in
+ def LD_Fp64m : FpIf64<(outs RFP64:$dst), (ins f64mem:$src), ZeroArgFP,
[(set RFP64:$dst, (loadf64 addr:$src))]>;
def LD_Fp80m : FpI_<(outs RFP80:$dst), (ins f80mem:$src), ZeroArgFP,
[(set RFP80:$dst, (loadf80 addr:$src))]>;
___
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Re: [llvm-commits] [llvm] r45126 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h
On Dec 17, 2007 1:53 PM, Bill Wendling <[EMAIL PROTECTED]> wrote: > Author: void > Date: Mon Dec 17 15:53:30 2007 > New Revision: 45126 > > URL: http://llvm.org/viewvc/llvm-project?rev=45126&view=rev > Log: > Add "hasSideEffects" method to MachineInstrInfo class. > s/MachineInstrInfo/TargetInstrInfo/ -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45126 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Author: void
Date: Mon Dec 17 15:53:30 2007
New Revision: 45126
URL: http://llvm.org/viewvc/llvm-project?rev=45126&view=rev
Log:
Add "hasSideEffects" method to MachineInstrInfo class.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=45126&r1=45125&r2=45126&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Dec 17 15:53:30 2007
@@ -314,6 +314,15 @@
isReallyTriviallyReMaterializable(MI);
}
+ /// hasSideEffects - Returns true if the instruction has side effects that
are
+ /// not captured by any operands of the instruction or other flags.
+ bool hasSideEffects(MachineInstr *MI) const {
+const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
+if (!(TID->Flags & M_NEVER_HAS_SIDE_EFFECTS ||
+ TID->Flags & M_MAY_HAVE_SIDE_EFFECTS)) return true;
+if (TID->Flags & M_NEVER_HAS_SIDE_EFFECTS) return false;
+return !isReallySideEffectFree(MI); // May have side effects
+ }
protected:
/// isReallyTriviallyReMaterializable - For instructions with opcodes for
/// which the M_REMATERIALIZABLE flag is set, this function tests whether the
@@ -329,7 +338,7 @@
/// isReallySideEffectFree - If the M_MAY_HAVE_SIDE_EFFECTS flag is set, this
/// method is called to determine if the specific instance of this
- /// instructions has side effects. This is useful in cases of instructions,
+ /// instruction has side effects. This is useful in cases of instructions,
/// like loads, which generally always have side effects. A load from a
/// constant pool doesn't have side effects, though. So we need to
/// differentiate it from the general case.
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[llvm-commits] [llvm] r45123 - /llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj
Author: void
Date: Mon Dec 17 15:14:45 2007
New Revision: 45123
URL: http://llvm.org/viewvc/llvm-project?rev=45123&view=rev
Log:
Add MachineLICM.cpp
Modified:
llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj
Modified: llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj?rev=45123&r1=45122&r2=45123&view=diff
==
--- llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj (original)
+++ llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Mon Dec 17 15:14:45 2007
@@ -75,6 +75,7 @@
35E98A830CBC2ED300C5CDC1 /* DenseSet.h */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path =
DenseSet.h; sourceTree = ""; };
35E98A840CBC2ED300C5CDC1 /* ImmutableMap.h */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path =
ImmutableMap.h; sourceTree = ""; };
35E98A850CBC2ED300C5CDC1 /* ImmutableSet.h */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path =
ImmutableSet.h; sourceTree = ""; };
+ 754221420D171DFC00DDB61B /* MachineLICM.cpp */ = {isa =
PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp;
path = MachineLICM.cpp; sourceTree = ""; };
84115FFE0B66D87400E1293E /* TargetMachOWriterInfo.cpp */ = {isa
= PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp;
path = TargetMachOWriterInfo.cpp; sourceTree = ""; };
84115FFF0B66D89B00E1293E /* PPCMachOWriterInfo.cpp */ = {isa =
PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp;
path = PPCMachOWriterInfo.cpp; sourceTree = ""; };
84116B66D8AC00E1293E /* PPCMachOWriterInfo.h */ = {isa =
PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path =
PPCMachOWriterInfo.h; sourceTree = ""; };
@@ -1520,6 +1521,7 @@
DE66ED3E08ABEC2A00323D32 /* lib/CodeGen */ = {
isa = PBXGroup;
children = (
+ 754221420D171DFC00DDB61B /* MachineLICM.cpp */,
9FE450AB0C77AB6100C4FEA4 /* README.txt */,
DE66ED8308ABEC2B00323D32 /* SelectionDAG */,
DE66ED3F08ABEC2A00323D32 /* AsmPrinter.cpp */,
___
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[llvm-commits] [llvm] r45120 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td
Author: void
Date: Mon Dec 17 15:02:07 2007
New Revision: 45120
URL: http://llvm.org/viewvc/llvm-project?rev=45120&view=rev
Log:
As per feedback, revised comments to (hopefully) make the different side effect
flags clearer.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/lib/Target/Target.td
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=45120&r1=45119&r2=45120&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Dec 17 15:02:07 2007
@@ -91,17 +91,23 @@
// ARM instructions which can set condition code if 's' bit is set.
const unsigned M_HAS_OPTIONAL_DEF = 1 << 17;
-// M_MAY_HAVE_SIDE_EFFECTS - Set if this instruction *might* have side effects,
-// e.g. load instructions. Note: This and M_NEVER_HAS_SIDE_EFFECTS are mutually
-// exclusive. You can't set both! If neither flag is set, then the instruction
-// *always* has side effects.
-const unsigned M_MAY_HAVE_SIDE_EFFECTS = 1 << 18;
-
-// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction *never* has side effects,
-// e.g., xor on X86. Note: This and M_MAY_HAVE_SIDE_EFFECTS are mutually
-// exclusive. You can't set both! If neither flag is set, then the instruction
-// *always* has side effects.
-const unsigned M_NEVER_HAS_SIDE_EFFECTS = 1 << 19;
+// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction has no side effects that
+// are not captured by any operands of the instruction or other flags, and when
+// *all* instances of the instruction of that opcode have no side effects.
+//
+// Note: This and M_MAY_HAVE_SIDE_EFFECTS are mutually exclusive. You can't set
+// both! If neither flag is set, then the instruction *always* has side
effects.
+const unsigned M_NEVER_HAS_SIDE_EFFECTS = 1 << 18;
+
+// M_MAY_HAVE_SIDE_EFFECTS - Set if some instances of this instruction can have
+// side effects. The virtual method "isReallySideEffectFree" is called to
+// determine this. Load instructions are an example of where this is useful. In
+// general, loads always have side effects. However, loads from constant pools
+// don't. We let the specific back end make this determination.
+//
+// Note: This and M_NEVER_HAS_SIDE_EFFECTS are mutually exclusive. You can't
set
+// both! If neither flag is set, then the instruction *always* has side
effects.
+const unsigned M_MAY_HAVE_SIDE_EFFECTS = 1 << 19;
// Machine operand flags
// M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it
@@ -321,6 +327,15 @@
return true;
}
+ /// isReallySideEffectFree - If the M_MAY_HAVE_SIDE_EFFECTS flag is set, this
+ /// method is called to determine if the specific instance of this
+ /// instructions has side effects. This is useful in cases of instructions,
+ /// like loads, which generally always have side effects. A load from a
+ /// constant pool doesn't have side effects, though. So we need to
+ /// differentiate it from the general case.
+ virtual bool isReallySideEffectFree(MachineInstr *MI) const {
+return false;
+ }
public:
/// getOperandConstraint - Returns the value of the specific constraint if
/// it is set. Returns -1 if it is not set.
Modified: llvm/trunk/lib/Target/Target.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=45120&r1=45119&r2=45120&view=diff
==
--- llvm/trunk/lib/Target/Target.td (original)
+++ llvm/trunk/lib/Target/Target.td Mon Dec 17 15:02:07 2007
@@ -205,9 +205,18 @@
bit isNotDuplicable = 0; // Is it unsafe to duplicate this instruction?
// Side effect flags - If neither of these flags is set, then the instruction
- // *always* has side effects. Otherwise, it's one or the other.
- bit mayHaveSideEffects = 0; // This instruction *may* have side effects.
- bit neverHasSideEffects = 0; // This instruction never has side effects.
+ // *always* has side effects. When set, the flags have these meanings:
+ //
+ // neverHasSideEffects - The instruction has no side effects that are not
+ //captured by any operands of the instruction or other flags, and when
+ //*all* instances of the instruction of that opcode have no side effects.
+ // mayHaveSideEffects - Some instances of the instruction can have side
+ //effects. The virtual method "isReallySideEffectFree" is called to
+ //determine this. Load instructions are an example of where this is
+ //useful. In general, loads always have side effects. However, loads from
+ //constant pools don't. Individual back ends make this determination.
+ bit neverHasSideEffects = 0;
+ bit mayHaveSideEffects = 0;
InstrItinClass Itinerary = NoItinerary;// Execution steps used for
scheduling.
Re: [llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrI
On Dec 17, 2007 12:46 PM, Evan Cheng <[EMAIL PROTECTED]> wrote: > On Dec 17, 2007, at 11:40 AM, Bill Wendling wrote: > >> As others have pointed out, we need to be much more clear about what > >> these mean. Specifically, I'd list "NEVER" first (it is easier to > >> explain). The pertinent point here is completely missing in the > >> comments: this flag is set on an instruction where there is a side > >> effect that is not captured by any *operands* of the instruction or > >> *other flags*. Instructions that are "isBranch" instructions but > >> have > >> no other side effects should have M_NEVER_HAS_SIDE_EFFECTS set. This > >> flag should only be set on an instruction when *all instances* of an > >> instruction of that opcode have no side effects in this way. > >> > > I'm confused. If we set this for an instruction where there is a side > > I am pretty sure he meant the opposite. If M_NEVER_HAS_SIDE_EFFECTS is > set, that means the instruction would never have any side effects that > are not captured in the operands. > Okay. That makes more sense to me. I thought that there might have been a "not" or something missing. :-) -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrI
Hi Chris, > > +// M_MAY_HAVE_SIDE_EFFECTS - Set if this instruction *might* have > > side effects, > > +// e.g. load instructions. Note: This and M_NEVER_HAS_SIDE_EFFECTS > > are mutually > > +// exclusive. You can't set both! If neither flag is set, then the > > instruction > > +// *always* has side effects. > > +const unsigned M_MAY_HAVE_SIDE_EFFECTS = 1 << 18; > > + > > +// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction *never* has > > side effects, > > +// e.g., xor on X86. Note: This and M_MAY_HAVE_SIDE_EFFECTS are > > mutually > > +// exclusive. You can't set both! If neither flag is set, then the > > instruction > > +// *always* has side effects. > > +const unsigned M_NEVER_HAS_SIDE_EFFECTS = 1 << 19; > > As others have pointed out, we need to be much more clear about what > these mean. Specifically, I'd list "NEVER" first (it is easier to > explain). The pertinent point here is completely missing in the > comments: this flag is set on an instruction where there is a side > effect that is not captured by any *operands* of the instruction or > *other flags*. Instructions that are "isBranch" instructions but have > no other side effects should have M_NEVER_HAS_SIDE_EFFECTS set. This > flag should only be set on an instruction when *all instances* of an > instruction of that opcode have no side effects in this way. > I'm confused. If we set this for an instruction where there is a side effect that is not captured by any operands of the instr or other flags, then it has a side effect, right? Or do you mean that we *shouldn't* set it in this situation (which makes more sense to me)? -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45071 - /llvm/trunk/lib/AsmParser/LLLexer.cpp
Author: void
Date: Sun Dec 16 03:16:12 2007
New Revision: 45071
URL: http://llvm.org/viewvc/llvm-project?rev=45071&view=rev
Log:
Remove spurious warnings from GCC:
warning: suggest a space before ';' or explicit braces around empty
body in 'for' statement
Patch by Mike Stump (modified slightly by yours truly).
Modified:
llvm/trunk/lib/AsmParser/LLLexer.cpp
Modified: llvm/trunk/lib/AsmParser/LLLexer.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLLexer.cpp?rev=45071&r1=45070&r2=45071&view=diff
==
--- llvm/trunk/lib/AsmParser/LLLexer.cpp (original)
+++ llvm/trunk/lib/AsmParser/LLLexer.cpp Sun Dec 16 03:16:12 2007
@@ -54,7 +54,7 @@
Result += C-'A'+10;
else if (C >= 'a' && C <= 'f')
Result += C-'a'+10;
-
+
if (Result < OldRes) { // Uh, oh, overflow detected!!!
GenerateError("constant bigger than 64 bits detected!");
return 0;
@@ -102,7 +102,7 @@
// appropriate character.
static void UnEscapeLexed(std::string &Str) {
if (Str.empty()) return;
-
+
char *Buffer = &Str[0], *EndBuffer = Buffer+Str.size();
char *BOut = Buffer;
for (char *BIn = Buffer; BIn != EndBuffer; ) {
@@ -168,9 +168,9 @@
// a random nul in the file. Disambiguate that here.
if (CurPtr-1 != CurBuf->getBufferEnd())
return 0; // Just whitespace.
-
+
// Otherwise, return end of file.
---CurPtr; // Another call to lex will return EOF again.
+--CurPtr; // Another call to lex will return EOF again.
return EOF;
case '\n':
case '\r':
@@ -180,24 +180,24 @@
if ((*CurPtr == '\n' || (*CurPtr == '\r')) &&
*CurPtr != CurChar)
++CurPtr; // Eat the two char newline sequence.
-
+
++CurLineNo;
return '\n';
- }
+ }
}
int LLLexer::LexToken() {
TokStart = CurPtr;
-
+
int CurChar = getNextChar();
-
+
switch (CurChar) {
default:
// Handle letters: [a-zA-Z_]
if (isalpha(CurChar) || CurChar == '_')
return LexIdentifier();
-
+
return CurChar;
case EOF: return YYEOF;
case 0:
@@ -234,7 +234,7 @@
return LexToken();
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
- case '-':
+ case '-':
return LexDigitOrNegative();
}
}
@@ -254,11 +254,11 @@
// Handle AtStringConstant: @\"[^\"]*\"
if (CurPtr[0] == '"') {
++CurPtr;
-
+
while (1) {
int CurChar = getNextChar();
-
- if (CurChar == EOF) {
+
+ if (CurChar == EOF) {
GenerateError("End of file in global variable name");
return YYERROR;
}
@@ -269,30 +269,31 @@
}
}
}
-
+
// Handle GlobalVarName: @[-a-zA-Z$._][-a-zA-Z$._0-9]*
- if (isalpha(CurPtr[0]) || CurPtr[0] == '-' || CurPtr[0] == '$' ||
+ if (isalpha(CurPtr[0]) || CurPtr[0] == '-' || CurPtr[0] == '$' ||
CurPtr[0] == '.' || CurPtr[0] == '_') {
++CurPtr;
-while (isalnum(CurPtr[0]) || CurPtr[0] == '-' || CurPtr[0] == '$' ||
+while (isalnum(CurPtr[0]) || CurPtr[0] == '-' || CurPtr[0] == '$' ||
CurPtr[0] == '.' || CurPtr[0] == '_')
++CurPtr;
llvmAsmlval.StrVal = new std::string(TokStart+1, CurPtr); // Skip @
return GLOBALVAR;
}
-
+
// Handle GlobalVarID: @[0-9]+
if (isdigit(CurPtr[0])) {
-for (++CurPtr; isdigit(CurPtr[0]); ++CurPtr);
-
+for (++CurPtr; isdigit(CurPtr[0]); ++CurPtr)
+ /*empty*/;
+
uint64_t Val = atoull(TokStart+1, CurPtr);
if ((unsigned)Val != Val)
GenerateError("Invalid value number (too large)!");
llvmAsmlval.UIntVal = unsigned(Val);
return GLOBALVAL_ID;
}
-
+
return '@';
}
@@ -305,11 +306,11 @@
// Handle PctStringConstant: %\"[^\"]*\"
if (CurPtr[0] == '"') {
++CurPtr;
-
+
while (1) {
int CurChar = getNextChar();
-
- if (CurChar == EOF) {
+
+ if (CurChar == EOF) {
GenerateError("End of file in local variable name");
return YYERROR;
}
@@ -320,30 +321,31 @@
}
}
}
-
+
// Handle LocalVarName: %[-a-zA-Z$._][-a-zA-Z$._0-9]*
- if (isalpha(CurPtr[0]) || CurPtr[0] == '-' || CurPtr[0] == '$' ||
+ if (isalpha(CurPtr[0]) || CurPtr[0] == '-' || CurPtr[0] == '$' ||
CurPtr[0] == '.' || CurPtr[0] == '_') {
++CurPtr;
-while (isalnum(CurPtr[0]) || CurPtr[0] == '-' || CurPtr[0] == '$' ||
+while (isalnum(CurPtr[0]) || CurPtr[0] == '-' || CurPtr[0] == '$' ||
CurPtr[0] == '.' || CurPtr[0] == '_')
++CurPtr;
-
+
llvmAsmlval.StrVal = new std::string(TokStart+1, CurPtr); // Skip %
return LOCALVAR;
}
-
+
// Handle LocalVarID: %[0-9]+
if (isdigit(CurPtr[0])) {
-for (++CurPtr; isdigit(CurPtr[0]); ++CurPtr);
-
+for (++CurPtr; isdigit(CurPtr[0]); ++CurPtr)
+ /*empty*/;
+
uint64_t Val = atoull(TokStart+1, CurPtr);
if ((uns
Re: [llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrI
On Dec 15, 2007, at 1:23 AM, Christopher Lamb wrote: On Dec 14, 2007, at 10:40 AM, Bill Wendling wrote: My understanding of a side effect is when an instruction has un-modeled effects. For instance, "emms" on X86 has side effects that aren't modeled in the instruction pattern -- it resets the FP registers after MMX use. Other instructions have no un-modeled side effects -- e.g., "xor" on X86 or "li" on PPC. Others may have un-modeled side effects in some situations, but not in others -- e.g., loads, in general, have side effects (accessing memory), but loads from a constant pool don't. This is the working definition, anyway. In the beginning, it'll be closely tied to what the "isRematerializable" flag means. I don't know what GCC considers side effects. Could you give a summary? It would be good to contrast/compare with it. In processor design discussions all load instructions were termed "side affecting", as they could cause a page fault. Perhaps the key here is whether the un-modeled effects of the instruction affect correct program behavior? That is the key, yes. :-) We'll leave it up to the individual back ends to tell us if moving instructions marked as "may having side effects" affects correct program behavior. -bw___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrI
Hi Duncan, > Hi Bill, does a branch instruction have side-effects? Yes. > What is a side-effect? I noticed some confusion in gcc about > the definition of a side-effect, so it would be good to avoid > confusion in LLVM. > My understanding of a side effect is when an instruction has un-modeled effects. For instance, "emms" on X86 has side effects that aren't modeled in the instruction pattern -- it resets the FP registers after MMX use. Other instructions have no un-modeled side effects -- e.g., "xor" on X86 or "li" on PPC. Others may have un-modeled side effects in some situations, but not in others -- e.g., loads, in general, have side effects (accessing memory), but loads from a constant pool don't. This is the working definition, anyway. In the beginning, it'll be closely tied to what the "isRematerializable" flag means. I don't know what GCC considers side effects. Could you give a summary? It would be good to contrast/compare with it. -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrInfoE
Author: void
Date: Thu Dec 13 19:48:59 2007
New Revision: 45022
URL: http://llvm.org/viewvc/llvm-project?rev=45022&view=rev
Log:
Add flags to indicate that there are "never" side effects or that there "may be"
side effects for machine instructions.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/lib/Target/Target.td
llvm/trunk/utils/TableGen/CodeGenInstruction.h
llvm/trunk/utils/TableGen/CodeGenTarget.cpp
llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=45022&r1=45021&r2=45022&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Thu Dec 13 19:48:59 2007
@@ -91,6 +91,18 @@
// ARM instructions which can set condition code if 's' bit is set.
const unsigned M_HAS_OPTIONAL_DEF = 1 << 17;
+// M_MAY_HAVE_SIDE_EFFECTS - Set if this instruction *might* have side effects,
+// e.g. load instructions. Note: This and M_NEVER_HAS_SIDE_EFFECTS are mutually
+// exclusive. You can't set both! If neither flag is set, then the instruction
+// *always* has side effects.
+const unsigned M_MAY_HAVE_SIDE_EFFECTS = 1 << 18;
+
+// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction *never* has side effects,
+// e.g., xor on X86. Note: This and M_MAY_HAVE_SIDE_EFFECTS are mutually
+// exclusive. You can't set both! If neither flag is set, then the instruction
+// *always* has side effects.
+const unsigned M_NEVER_HAS_SIDE_EFFECTS = 1 << 19;
+
// Machine operand flags
// M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it
// requires a callback to look up its register class.
Modified: llvm/trunk/lib/Target/Target.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=45022&r1=45021&r2=45022&view=diff
==
--- llvm/trunk/lib/Target/Target.td (original)
+++ llvm/trunk/lib/Target/Target.td Thu Dec 13 19:48:59 2007
@@ -203,6 +203,11 @@
bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help.
bit hasCtrlDep = 0; // Does this instruction r/w ctrl-flow chains?
bit isNotDuplicable = 0; // Is it unsafe to duplicate this instruction?
+
+ // Side effect flags - If neither of these flags is set, then the instruction
+ // *always* has side effects. Otherwise, it's one or the other.
+ bit mayHaveSideEffects = 0; // This instruction *may* have side effects.
+ bit neverHasSideEffects = 0; // This instruction never has side effects.
InstrItinClass Itinerary = NoItinerary;// Execution steps used for
scheduling.
Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=45022&r1=45021&r2=45022&view=diff
==
--- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Thu Dec 13 19:48:59 2007
@@ -104,6 +104,8 @@
bool hasCtrlDep;
bool isNotDuplicable;
bool hasOptionalDef;
+bool mayHaveSideEffects;
+bool neverHasSideEffects;
/// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar",
/// where $foo is a whole operand and $foo.bar refers to a suboperand.
Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=45022&r1=45021&r2=45022&view=diff
==
--- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Thu Dec 13 19:48:59 2007
@@ -395,9 +395,15 @@
usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
hasCtrlDep = R->getValueAsBit("hasCtrlDep");
isNotDuplicable = R->getValueAsBit("isNotDuplicable");
+ mayHaveSideEffects = R->getValueAsBit("mayHaveSideEffects");
+ neverHasSideEffects = R->getValueAsBit("neverHasSideEffects");
hasOptionalDef = false;
hasVariableNumberOfOperands = false;
-
+
+ if (mayHaveSideEffects && neverHasSideEffects)
+throw R->getName() +
+ ": cannot have both 'mayHaveSideEffects' and 'neverHasSideEffects' set!";
+
DagInit *DI;
try {
DI = R->getValueAsDag("OutOperandList");
Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=45022&r1=45021&r2=45022&view=diff
==
--- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Thu Dec 13 19:48:59 2007
@@ -
[llvm-commits] [llvm-gcc-4.2] r45018 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2004/
Author: void Date: Thu Dec 13 19:02:33 2007 New Revision: 45018 URL: http://llvm.org/viewvc/llvm-project?rev=45018&view=rev Log: Need to grab a patch that makes building happy. Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2004/ - copied from r45017, llvm-gcc-4.2/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r45012 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2003/
Author: void Date: Thu Dec 13 13:01:20 2007 New Revision: 45012 URL: http://llvm.org/viewvc/llvm-project?rev=45012&view=rev Log: Creating llvmgcc-2003 tag. Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2003/ - copied from r45011, llvm-gcc-4.2/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45010 - /llvm/tags/Apple/llvmCore-2005/
Author: void Date: Thu Dec 13 12:53:57 2007 New Revision: 45010 URL: http://llvm.org/viewvc/llvm-project?rev=45010&view=rev Log: Creating llvmCore-2005 tag. Added: llvm/tags/Apple/llvmCore-2005/ - copied from r45009, llvm/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44959 - in /llvm/trunk: autoconf/configure.ac configure include/llvm/Config/config.h.in include/llvm/System/Host.h include/llvm/Target/TargetData.h lib/ExecutionEngine/Execu
On Dec 12, 2007 3:03 PM, Duncan Sands <[EMAIL PROTECTED]> wrote: > Remove host endianness info from TargetData and > put it in a new header System/Host.h instead. > Instead of getting the endianness from configure, > calculate it directly. > Way to obviate my last post. ;-) -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm-gcc-4.2] r44958 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
On Dec 12, 2007 2:55 PM, Devang Patel <[EMAIL PROTECTED]> wrote: > +return; // Do not process broken code. Where's your sense of adventure?! ;-) -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
On Dec 12, 2007 11:32 AM, Evan Cheng <[EMAIL PROTECTED]> wrote: > On Dec 12, 2007, at 11:12 AM, Bill Wendling wrote: > > I'm sure I could move it, but as Chris asked, isn't it trivial to get > > this information anyway? Also, I'm kind of hesitant to put so much > > effort into compile-time performance issues when it doesn't even have > > partial (let alone full) functionality right now. We don't know what > > impact any of those optimizations have or if they are necessary yet. > > :-) > > It's something to keep in mind. Not critical right now if we are not > hoisting anything with implicit defs / uses. > Sounds good. :-) > If we are keeping LICM before livevariables, we will have to compute > liveness in the BB's where the invariants are hoisted to. Now that I > think about it, we *cannot* use the register scavenger to do this > because it also depends on kill / dead markers on the operands. The > scavenger's job is not to add the kill / dead markers, it is to track > what registers are live at any point of the BB. This means you'll > have to walk the BB and track all physical register defs and uses in > the BB. > I see. Okay, so by the time I get to the point where I'm moving instructions that access physical registers, I should have the pass after LiveVariables... -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
On Dec 12, 2007 1:38 AM, Evan Cheng <[EMAIL PROTECTED]> wrote: > > > On Dec 11, 2007, at 11:40 AM, Bill Wendling <[EMAIL PROTECTED]> wrote: > > > Author: void > > Date: Tue Dec 11 13:40:06 2007 > > New Revision: 44874 > > > > URL: http://llvm.org/viewvc/llvm-project?rev=44874&view=rev > > Log: > > Blark! How in the world did this work without this?! > > Is this just cosmetic changes? I am sure I see why this is better? > Just curious. > This is the part of the patch that has the "real" change. The rest are cosmetic. // Get our Loop information... LI = &getAnalysis(); DT = &getAnalysis(); + MapVirtualRegisterDefs(); + > One thing that is some what annoying to me is if LICM is after live > variables then it won't need to compute vreg def info or liveness > info. I wonder if it is possible to move the pass after live variables? > I'm sure I could move it, but as Chris asked, isn't it trivial to get this information anyway? Also, I'm kind of hesitant to put so much effort into compile-time performance issues when it doesn't even have partial (let alone full) functionality right now. We don't know what impact any of those optimizations have or if they are necessary yet. :-) -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44903 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Author: void Date: Tue Dec 11 19:51:58 2007 New Revision: 44903 URL: http://llvm.org/viewvc/llvm-project?rev=44903&view=rev Log: Bit masks conflicted. Needed to bump them by one. Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=44903&r1=44902&r2=44903&view=diff == --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Tue Dec 11 19:51:58 2007 @@ -54,42 +54,42 @@ // changed into a 3-address instruction if the first two operands cannot be // assigned to the same register. The target must implement the // TargetInstrInfo::convertToThreeAddress method for this instruction. -const unsigned M_CONVERTIBLE_TO_3_ADDR = 1 << 7; +const unsigned M_CONVERTIBLE_TO_3_ADDR = 1 << 8; // This M_COMMUTABLE - is a 2- or 3-address instruction (of the form X = op Y, // Z), which produces the same result if Y and Z are exchanged. -const unsigned M_COMMUTABLE= 1 << 8; +const unsigned M_COMMUTABLE= 1 << 9; // M_TERMINATOR_FLAG - Is this instruction part of the terminator for a basic // block? Typically this is things like return and branch instructions. // Various passes use this to insert code into the bottom of a basic block, but // before control flow occurs. -const unsigned M_TERMINATOR_FLAG = 1 << 9; +const unsigned M_TERMINATOR_FLAG = 1 << 10; // M_USES_CUSTOM_DAG_SCHED_INSERTION - Set if this instruction requires custom // insertion support when the DAG scheduler is inserting it into a machine basic // block. -const unsigned M_USES_CUSTOM_DAG_SCHED_INSERTION = 1 << 10; +const unsigned M_USES_CUSTOM_DAG_SCHED_INSERTION = 1 << 11; // M_VARIABLE_OPS - Set if this instruction can have a variable number of extra // operands in addition to the minimum number operands specified. -const unsigned M_VARIABLE_OPS = 1 << 11; +const unsigned M_VARIABLE_OPS = 1 << 12; // M_PREDICABLE - Set if this instruction has a predicate operand that // controls execution. It may be set to 'always'. -const unsigned M_PREDICABLE = 1 << 12; +const unsigned M_PREDICABLE= 1 << 13; // M_REMATERIALIZIBLE - Set if this instruction can be trivally re-materialized // at any time, e.g. constant generation, load from constant pool. -const unsigned M_REMATERIALIZIBLE = 1 << 13; +const unsigned M_REMATERIALIZIBLE = 1 << 14; // M_NOT_DUPLICABLE - Set if this instruction cannot be safely duplicated. // (e.g. instructions with unique labels attached). -const unsigned M_NOT_DUPLICABLE = 1 << 14; +const unsigned M_NOT_DUPLICABLE= 1 << 15; // M_HAS_OPTIONAL_DEF - Set if this instruction has an optional definition, e.g. // ARM instructions which can set condition code if 's' bit is set. -const unsigned M_HAS_OPTIONAL_DEF = 1 << 15; +const unsigned M_HAS_OPTIONAL_DEF = 1 << 16; // Machine operand flags // M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44881 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Tue Dec 11 16:22:22 2007
New Revision: 44881
URL: http://llvm.org/viewvc/llvm-project?rev=44881&view=rev
Log:
Simplify slightly.
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44881&r1=44880&r2=44881&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Dec 11 16:22:22 2007
@@ -183,6 +183,8 @@
bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
if (!PerformLICM) return false; // For debugging.
+ DOUT << " Machine LICM \n";
+
Changed = false;
CurMF = &MF;
TII = CurMF->getTarget().getInstrInfo();
@@ -195,13 +197,12 @@
for (MachineLoopInfo::iterator
I = LI->begin(), E = LI->end(); I != E; ++I) {
-MachineLoop *L = *I;
-CurLoop = L;
+CurLoop = *I;
// Visit all of the instructions of the loop. We want to visit the subloops
// first, though, so that we can hoist their invariants first into their
// containing loop before we process that loop.
-VisitAllLoops(L);
+VisitAllLoops(CurLoop);
}
return Changed;
___
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[llvm-commits] [llvm] r44892 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Tue Dec 11 17:27:51 2007
New Revision: 44892
URL: http://llvm.org/viewvc/llvm-project?rev=44892&view=rev
Log:
Need to grow the indexed map. Added debug statements.
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44892&r1=44891&r2=44892&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Dec 11 17:27:51 2007
@@ -21,12 +21,12 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/CFG.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
@@ -43,14 +43,13 @@
namespace {
class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
-MachineFunction *CurMF;// Current MachineFunction
+const TargetInstrInfo *TII;
+MachineFunction *CurMF; // Current MachineFunction
// Various analyses that we use...
MachineLoopInfo *LI; // Current MachineLoopInfo
MachineDominatorTree *DT; // Machine dominator tree for the current Loop
-const TargetInstrInfo *TII;
-
// State that is updated as we process loops
bool Changed; // True if a loop is changed.
MachineLoop *CurLoop; // The current loop we are working on.
@@ -109,22 +108,18 @@
/// instr, etc.
///
bool CanHoistInst(MachineInstr &I) const {
- const TargetInstrDescriptor *TID = I.getInstrDescriptor();
-
+#ifndef NDEBUG
+ DEBUG({
+ DOUT << "--- Checking if we can hoist " << I << "\n";
+ if (I.getInstrDescriptor()->ImplicitUses)
+DOUT << " * Instruction has implicit uses.\n";
+ else if (!TII->isTriviallyReMaterializable(&I))
+DOUT << " * Instruction has side effects.\n";
+});
+#endif
// Don't hoist if this instruction implicitly reads physical registers.
- if (TID->ImplicitUses) return false;
-
- MachineOpCode Opcode = TID->Opcode;
- return TII->isTriviallyReMaterializable(&I) &&
-// FIXME: Below necessary?
-!(TII->isReturn(Opcode) ||
- TII->isTerminatorInstr(Opcode) ||
- TII->isBranch(Opcode) ||
- TII->isIndirectBranch(Opcode) ||
- TII->isBarrier(Opcode) ||
- TII->isCall(Opcode) ||
- TII->isLoad(Opcode) || // TODO: Do loads and stores.
- TII->isStore(Opcode));
+ if (I.getInstrDescriptor()->ImplicitUses) return false;
+ return TII->isTriviallyReMaterializable(&I);
}
/// IsLoopInvariantInst - Returns true if the instruction is loop
@@ -150,6 +145,13 @@
/// the predecessor basic block (but before the terminator instructions).
///
void MoveInstToEndOfBlock(MachineBasicBlock *MBB, MachineInstr *MI) {
+ DEBUG({
+ DOUT << "Hoisting " << *MI;
+ if (MBB->getBasicBlock())
+DOUT << " to MachineBasicBlock "
+ << MBB->getBasicBlock()->getName();
+ DOUT << "\n";
+});
MachineBasicBlock::iterator Iter = MBB->getFirstTerminator();
MBB->insert(Iter, MI);
++NumHoisted;
@@ -224,8 +226,10 @@
const MachineOperand &MO = MI.getOperand(i);
if (MO.isRegister() && MO.isDef() &&
-MRegisterInfo::isVirtualRegister(MO.getReg()))
+MRegisterInfo::isVirtualRegister(MO.getReg())) {
+ VRegDefs.grow(MO.getReg());
VRegDefs[MO.getReg()] = &MI;
+}
}
}
}
@@ -331,8 +335,10 @@
const MachineOperand &MO = NewMI->getOperand(i);
if (MO.isRegister() && MO.isDef() &&
-MRegisterInfo::isVirtualRegister(MO.getReg()))
+MRegisterInfo::isVirtualRegister(MO.getReg())) {
+ VRegDefs.grow(MO.getReg());
VRegDefs[MO.getReg()] = NewMI;
+}
}
// Hoisting was successful! Remove bothersome instruction now.
___
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[llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Tue Dec 11 13:40:06 2007
New Revision: 44874
URL: http://llvm.org/viewvc/llvm-project?rev=44874&view=rev
Log:
Blark! How in the world did this work without this?!
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44874&r1=44873&r2=44874&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Dec 11 13:40:06 2007
@@ -43,6 +43,8 @@
namespace {
class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
+MachineFunction *CurMF;// Current MachineFunction
+
// Various analyses that we use...
MachineLoopInfo *LI; // Current MachineLoopInfo
MachineDominatorTree *DT; // Machine dominator tree for the current Loop
@@ -91,7 +93,7 @@
/// MapVirtualRegisterDefs - Create a map of which machine instruction
/// defines a virtual register.
///
-void MapVirtualRegisterDefs(const MachineFunction &MF);
+void MapVirtualRegisterDefs();
/// IsInSubLoop - A little predicate that returns true if the specified
/// basic block is in a subloop of the current one, not the current one
@@ -182,12 +184,15 @@
if (!PerformLICM) return false; // For debugging.
Changed = false;
- TII = MF.getTarget().getInstrInfo();
+ CurMF = &MF;
+ TII = CurMF->getTarget().getInstrInfo();
// Get our Loop information...
LI = &getAnalysis();
DT = &getAnalysis();
+ MapVirtualRegisterDefs();
+
for (MachineLoopInfo::iterator
I = LI->begin(), E = LI->end(); I != E; ++I) {
MachineLoop *L = *I;
@@ -205,9 +210,9 @@
/// MapVirtualRegisterDefs - Create a map of which machine instruction defines
a
/// virtual register.
///
-void MachineLICM::MapVirtualRegisterDefs(const MachineFunction &MF) {
+void MachineLICM::MapVirtualRegisterDefs() {
for (MachineFunction::const_iterator
- I = MF.begin(), E = MF.end(); I != E; ++I) {
+ I = CurMF->begin(), E = CurMF->end(); I != E; ++I) {
const MachineBasicBlock &MBB = *I;
for (MachineBasicBlock::const_iterator
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[llvm-commits] [llvm] r44873 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Tue Dec 11 13:17:04 2007
New Revision: 44873
URL: http://llvm.org/viewvc/llvm-project?rev=44873&view=rev
Log:
- Update the virtual reg to machine instruction map when hoisting.
- Fix subtle bug when creating initially creating this map.
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44873&r1=44872&r2=44873&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Dec 11 13:17:04 2007
@@ -215,7 +215,7 @@
const MachineInstr &MI = *II;
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
-const MachineOperand &MO = MI.getOperand(0);
+const MachineOperand &MO = MI.getOperand(i);
if (MO.isRegister() && MO.isDef() &&
MRegisterInfo::isVirtualRegister(MO.getReg()))
@@ -317,7 +317,17 @@
"The predecessor doesn't feed directly into the loop header!");
// Now move the instructions to the predecessor.
- MoveInstToEndOfBlock(MBB, MI.clone());
+ MachineInstr *NewMI = MI.clone();
+ MoveInstToEndOfBlock(MBB, NewMI);
+
+ // Update VRegDefs.
+ for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
+const MachineOperand &MO = NewMI->getOperand(i);
+
+if (MO.isRegister() && MO.isDef() &&
+MRegisterInfo::isVirtualRegister(MO.getReg()))
+ VRegDefs[MO.getReg()] = NewMI;
+ }
// Hoisting was successful! Remove bothersome instruction now.
MI.getParent()->remove(&MI);
___
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[llvm-commits] [llvm] r44871 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Tue Dec 11 12:45:11 2007
New Revision: 44871
URL: http://llvm.org/viewvc/llvm-project?rev=44871&view=rev
Log:
Checking for "zero operands" during the "CanHoistInst()" method isn't necessary
because those with side effects will be caught by other checks in here.
Also, simplify the check for a BB in a sub loop.
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44871&r1=44870&r2=44871&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Dec 11 12:45:11 2007
@@ -99,13 +99,7 @@
///
bool IsInSubLoop(MachineBasicBlock *BB) {
assert(CurLoop->contains(BB) && "Only valid if BB is IN the loop");
-
- for (MachineLoop::iterator
- I = CurLoop->begin(), E = CurLoop->end(); I != E; ++I)
-if ((*I)->contains(BB))
- return true; // A subloop actually contains this block!
-
- return false;
+ return LI->getLoopFor(BB) != CurLoop;
}
/// CanHoistInst - Checks that this instructions is one that can be hoisted
@@ -115,9 +109,8 @@
bool CanHoistInst(MachineInstr &I) const {
const TargetInstrDescriptor *TID = I.getInstrDescriptor();
- // Don't hoist if this instruction implicitly reads physical registers or
- // doesn't take any operands.
- if (TID->ImplicitUses || !I.getNumOperands()) return false;
+ // Don't hoist if this instruction implicitly reads physical registers.
+ if (TID->ImplicitUses) return false;
MachineOpCode Opcode = TID->Opcode;
return TII->isTriviallyReMaterializable(&I) &&
@@ -142,7 +135,7 @@
/// FindPredecessors - Get all of the predecessors of the loop that are not
/// back-edges.
///
-void FindPredecessors(std::vector &Preds){
+void FindPredecessors(std::vector &Preds) {
const MachineBasicBlock *Header = CurLoop->getHeader();
for (MachineBasicBlock::const_pred_iterator
___
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[llvm-commits] [llvm] r44832 - /llvm/tags/Apple/llvmCore-2004/
Author: void Date: Mon Dec 10 19:04:05 2007 New Revision: 44832 URL: http://llvm.org/viewvc/llvm-project?rev=44832&view=rev Log: Retagging with the config.h fix. Added: llvm/tags/Apple/llvmCore-2004/ - copied from r44831, llvm/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44687 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/MachineLICM.cpp lib/Target/PowerPC/PPCInstrInfo.td
On Dec 10, 2007 4:38 PM, Chris Lattner <[EMAIL PROTECTED]> wrote: > With that said, licm should hoist things as far out as possible. The > LLVM LICM pass is structured the way it is in order to hoist loads > out, which require checking alias information at each level of a loop > nest. We don't have short-term plans to hoist out loops (which will > require extensive machine aliasing support), so switching to a model > like dan describes (single pass over all bb's in outermost loops, > hoisting instructions once instead of iteratively) makes sense to me. > I'm confused. If we do that, we won't be able to hoist things in inner loops into their pre-header blocks. Or are you suggesting that the machine LICM pass looks for loop-invariant instructions. If they can be hoisted all of the way out, then do that. Otherwise, find each containing loop and try to hoist to that pre-header? -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44687 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/MachineLICM.cpp lib/Target/PowerPC/PPCInstrInfo.td
On Dec 10, 2007 3:44 PM, Evan Cheng <[EMAIL PROTECTED]> wrote: > On Dec 10, 2007, at 1:23 PM, Bill Wendling wrote: > > On Dec 10, 2007 11:36 AM, Evan Cheng <[EMAIL PROTECTED]> wrote: > >> I don't think lifting loop invariant from inner loop all the way out > >> of outer-most loop is a good idea. That will increase register > >> pressure in basic blocks where it is not used. > >> > > This is going to happen with the current pass, though. Each loop is > > going to see the hoisted instructions from the previous iteration and > > try to re-hoist them. Is there some heuristic we should apply to > > prevent it from hoisting instructions too far? > > > > I am not sure. :-) > > For innermost loops, hoisting invariants out into the preheader always > make sense. Intuitively, hoisting invariants from inner loops out of > the outermost loop only makes sense when all (or a lot, whatever that > means :-) of the inner loops use it. Or at least the first inner loop > use it. > > What does the LLVM level LICM do? > It does the same thing that Machine LICM does...tries to hoist things as far as possible. -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r44812 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2002/
Author: void Date: Mon Dec 10 15:50:11 2007 New Revision: 44812 URL: http://llvm.org/viewvc/llvm-project?rev=44812&view=rev Log: Creating llvmgcc42-2002 Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2002/ - copied from r44811, llvm-gcc-4.2/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44811 - /llvm/tags/Apple/llvmCore-2003/
Author: void Date: Mon Dec 10 15:49:16 2007 New Revision: 44811 URL: http://llvm.org/viewvc/llvm-project?rev=44811&view=rev Log: Creating llvmCore-2003. Added: llvm/tags/Apple/llvmCore-2003/ - copied from r44810, llvm/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44687 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/MachineLICM.cpp lib/Target/PowerPC/PPCInstrInfo.td
On Dec 10, 2007 11:36 AM, Evan Cheng <[EMAIL PROTECTED]> wrote: > On Dec 10, 2007, at 6:47 AM, Dan Gohman wrote: > > And if that's all it's doing, MachineLICM's traversal could be > > simplified > > a little. Instead of visiting each loop individually, taking care to > > avoid > > revisiting to blocks within inner loops, the pass could just traverse > > entire outer-most loops, which will implicitly include the blocks of > > any > > inner loops. Instructions nested deep in inner loops can then be > > hoisted > > all the way out of the outer-most loop in a single step instead of > > being > > hoisted out one loop at a time. > > I don't think lifting loop invariant from inner loop all the way out > of outer-most loop is a good idea. That will increase register > pressure in basic blocks where it is not used. > This is going to happen with the current pass, though. Each loop is going to see the hoisted instructions from the previous iteration and try to re-hoist them. Is there some heuristic we should apply to prevent it from hoisting instructions too far? -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44687 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/MachineLICM.cpp lib/Target/PowerPC/PPCInstrInfo.td
On Dec 10, 2007 6:47 AM, Dan Gohman <[EMAIL PROTECTED]> wrote: > > Thanks for pointing this out. I'll go over it when I'm doing the load/ > > store instructions in my pass. > > Hi Bill, > > How involved will MachineLICM be? After LLVM's main LICM pass runs, it > seems all that's left for MachineLICM to do are just the constant-pool > loads, immediates, etc. that aren't exposed in the main LLVM IR, things > that don't require alias analysis. > Good point. I was just leaving the option of needing AA open just in case. But I won't use it if not needed, of course. > And if that's all it's doing, MachineLICM's traversal could be simplified > a little. Instead of visiting each loop individually, taking care to avoid > revisiting to blocks within inner loops, the pass could just traverse > entire outer-most loops, which will implicitly include the blocks of any > inner loops. Instructions nested deep in inner loops can then be hoisted > all the way out of the outer-most loop in a single step instead of being > hoisted out one loop at a time. > I just want to make sure we're visiting all defs before uses. This way, we won't be hoisting things that shouldn't be, and, of course, that we hoist things which we should be hoisting. Take, for example, an invariant in a subloop that is itself part of the body of a conditional statement. Of course, we want to hoist the instruction to the pre-header of the subloop, but not to the pre-header of the outer loop. To make sure we do this without visiting the subloops first, I think we would have to have a lot more checking. -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44729 - /llvm/trunk/tools/Makefile
Sorry :-( -bw On Dec 8, 2007, at 4:27 PM, Chris Lattner wrote: > Author: lattner > Date: Sat Dec 8 18:27:38 2007 > New Revision: 44729 > > URL: http://llvm.org/viewvc/llvm-project?rev=44729&view=rev > Log: > Fix accidental commit by Bill. > > Modified: > llvm/trunk/tools/Makefile > > Modified: llvm/trunk/tools/Makefile > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile? > rev=44729&r1=44728&r2=44729&view=diff > > == > > --- llvm/trunk/tools/Makefile (original) > +++ llvm/trunk/tools/Makefile Sat Dec 8 18:27:38 2007 > @@ -16,7 +16,7 @@ > llc llvm-ranlib llvm-ar llvm-nm \ > llvm-ld llvmc llvm-prof llvm-link \ >lli gccas gccld llvm-extract llvm-db llvm2cpp \ > - bugpoint llvm-bcanalyzer llvm-stub cfe > + bugpoint llvm-bcanalyzer llvm-stub > > > include $(LEVEL)/Makefile.config > > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44687 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/MachineLICM.cpp lib/Target/PowerPC/PPCInstrInfo.td
On Dec 8, 2007, at 12:33 AM, Duncan Sands wrote: > Hi Bill, presumably you are using alias analysis at the > codegen level. I noticed some time ago that in several > places code doing multiple stores to successive locations > does not set the SVOffset value correctly: it used the same > SVOffset for all the stores. Probably the same is true for > loads. I think this can result in wrong alias analysis > deductions. Probably someone should audit code for this... > Hi Duncan, Thanks for pointing this out. I'll go over it when I'm doing the load/ store instructions in my pass. -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44727 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/MachineLICM.cpp lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86
Author: void
Date: Sat Dec 8 17:58:46 2007
New Revision: 44727
URL: http://llvm.org/viewvc/llvm-project?rev=44727&view=rev
Log:
Reverting 44702. It wasn't correct to rename them.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/trunk/lib/CodeGen/MachineLICM.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.h
llvm/trunk/tools/Makefile
llvm/trunk/utils/emacs/tablegen-mode.el
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=44727&r1=44726&r2=44727&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Sat Dec 8 17:58:46 2007
@@ -288,24 +288,24 @@
return get(Opcode).Flags & M_HAS_OPTIONAL_DEF;
}
- /// hasNoSideEffects - Return true if the instruction is trivially
+ /// isTriviallyReMaterializable - Return true if the instruction is trivially
/// rematerializable, meaning it has no side effects and requires no operands
/// that aren't always available.
- bool hasNoSideEffects(MachineInstr *MI) const {
+ bool isTriviallyReMaterializable(MachineInstr *MI) const {
return (MI->getInstrDescriptor()->Flags & M_REMATERIALIZIBLE) &&
- isTriviallyReMaterializable(MI);
+ isReallyTriviallyReMaterializable(MI);
}
protected:
- /// isTriviallyReMaterializable - For instructions with opcodes for which the
- /// M_REMATERIALIZABLE flag is set, this function tests whether the
- /// instruction itself is actually trivially rematerializable, considering
its
- /// operands. This is used for targets that have instructions that are only
- /// trivially rematerializable for specific uses. This predicate must return
- /// false if the instruction has any side effects other than producing a
- /// value, or if it requres any address registers that are not always
- /// available.
- virtual bool isTriviallyReMaterializable(MachineInstr *MI) const {
+ /// isReallyTriviallyReMaterializable - For instructions with opcodes for
+ /// which the M_REMATERIALIZABLE flag is set, this function tests whether the
+ /// instruction itself is actually trivially rematerializable, considering
+ /// its operands. This is used for targets that have instructions that are
+ /// only trivially rematerializable for specific uses. This predicate must
+ /// return false if the instruction has any side effects other than
+ /// producing a value, or if it requres any address registers that are not
+ /// always available.
+ virtual bool isReallyTriviallyReMaterializable(MachineInstr *MI) const {
return true;
}
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=44727&r1=44726&r2=44727&view=diff
==
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Sat Dec 8 17:58:46 2007
@@ -613,7 +613,7 @@
return false;
isLoad = false;
- if (tii_->hasNoSideEffects(MI)) {
+ if (tii_->isTriviallyReMaterializable(MI)) {
isLoad = MI->getInstrDescriptor()->Flags & M_LOAD_FLAG;
return true;
}
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44727&r1=44726&r2=44727&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Sat Dec 8 17:58:46 2007
@@ -39,7 +39,7 @@
cl::desc("Perform loop-invariant code motion on machine code"));
}
-STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loop");
+STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loops");
namespace {
class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
@@ -93,11 +93,11 @@
///
void MapVirtualRegisterDefs(const MachineFunction &MF);
-/// isInSubLoop - A little predicate that returns true if the specified
+/// IsInSubLoop - A little predicate that returns true if the specified
/// basic block is in a subloop of the current one, not the current one
/// itself.
///
-bool isInSubLoop(MachineBasicBlock *BB) {
+bool IsInSubLoop(MachineBasicBlock *BB) {
assert(CurLoop->contains(BB) && "Only valid if BB is IN the loop");
for (MachineLoop::iterator
@@ -120,7 +120,7 @@
if (TID->ImplicitUses || !I.getNumOperands()) return false;
MachineOpCode Opcode = TID->Opcode;
- return TII->hasNoSideEffects(&I) &&
+ return TII->isTriviallyReMaterializable(&I)
[llvm-commits] [llvm] r44702 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/MachineLICM.cpp lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86
Author: void
Date: Sat Dec 8 01:17:56 2007
New Revision: 44702
URL: http://llvm.org/viewvc/llvm-project?rev=44702&view=rev
Log:
Renaming:
isTriviallyReMaterializable -> hasNoSideEffects
isReallyTriviallyReMaterializable -> isTriviallyReMaterializable
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/trunk/lib/CodeGen/MachineLICM.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.h
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=44702&r1=44701&r2=44702&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Sat Dec 8 01:17:56 2007
@@ -288,24 +288,24 @@
return get(Opcode).Flags & M_HAS_OPTIONAL_DEF;
}
- /// isTriviallyReMaterializable - Return true if the instruction is trivially
+ /// hasNoSideEffects - Return true if the instruction is trivially
/// rematerializable, meaning it has no side effects and requires no operands
/// that aren't always available.
- bool isTriviallyReMaterializable(MachineInstr *MI) const {
+ bool hasNoSideEffects(MachineInstr *MI) const {
return (MI->getInstrDescriptor()->Flags & M_REMATERIALIZIBLE) &&
- isReallyTriviallyReMaterializable(MI);
+ isTriviallyReMaterializable(MI);
}
protected:
- /// isReallyTriviallyReMaterializable - For instructions with opcodes for
- /// which the M_REMATERIALIZABLE flag is set, this function tests whether the
- /// instruction itself is actually trivially rematerializable, considering
- /// its operands. This is used for targets that have instructions that are
- /// only trivially rematerializable for specific uses. This predicate must
- /// return false if the instruction has any side effects other than
- /// producing a value, or if it requres any address registers that are not
- /// always available.
- virtual bool isReallyTriviallyReMaterializable(MachineInstr *MI) const {
+ /// isTriviallyReMaterializable - For instructions with opcodes for which the
+ /// M_REMATERIALIZABLE flag is set, this function tests whether the
+ /// instruction itself is actually trivially rematerializable, considering
its
+ /// operands. This is used for targets that have instructions that are only
+ /// trivially rematerializable for specific uses. This predicate must return
+ /// false if the instruction has any side effects other than producing a
+ /// value, or if it requres any address registers that are not always
+ /// available.
+ virtual bool isTriviallyReMaterializable(MachineInstr *MI) const {
return true;
}
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=44702&r1=44701&r2=44702&view=diff
==
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Sat Dec 8 01:17:56 2007
@@ -613,7 +613,7 @@
return false;
isLoad = false;
- if (tii_->isTriviallyReMaterializable(MI)) {
+ if (tii_->hasNoSideEffects(MI)) {
isLoad = MI->getInstrDescriptor()->Flags & M_LOAD_FLAG;
return true;
}
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44702&r1=44701&r2=44702&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Sat Dec 8 01:17:56 2007
@@ -120,7 +120,7 @@
if (TID->ImplicitUses || !I.getNumOperands()) return false;
MachineOpCode Opcode = TID->Opcode;
- return TII->isTriviallyReMaterializable(&I) &&
+ return TII->hasNoSideEffects(&I) &&
// FIXME: Below necessary?
!(TII->isReturn(Opcode) ||
TII->isTerminatorInstr(Opcode) ||
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=44702&r1=44701&r2=44702&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Sat Dec 8 01:17:56 2007
@@ -116,7 +116,7 @@
}
-bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const {
+bool X86InstrInfo::isTriviallyReMaterializable(MachineInstr *MI) const {
switch (MI->getOpcode()) {
default: break;
case X86::MOV8rm:
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev
[llvm-commits] [llvm] r44696 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
Author: void
Date: Fri Dec 7 19:47:01 2007
New Revision: 44696
URL: http://llvm.org/viewvc/llvm-project?rev=44696&view=rev
Log:
Incorporated comments from Evan and Chris:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056043.html
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056048.html
Modified:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44696&r1=44695&r2=44696&view=diff
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Fri Dec 7 19:47:01 2007
@@ -13,6 +13,7 @@
//===--===//
#define DEBUG_TYPE "machine-licm"
+#include "llvm/ADT/IndexedMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
@@ -27,7 +28,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"
-#include
using namespace llvm;
@@ -35,9 +35,12 @@
// Hidden options to help debugging
cl::opt
PerformLICM("machine-licm",
- cl::init(false), cl::Hidden);
+ cl::init(false), cl::Hidden,
+ cl::desc("Perform loop-invariant code motion on machine code"));
}
+STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loop");
+
namespace {
class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
// Various analyses that we use...
@@ -51,7 +54,7 @@
MachineLoop *CurLoop; // The current loop we are working on.
// Map the def of a virtual register to the machine instruction.
-std::map VRegDefs;
+IndexedMap VRegDefs;
public:
static char ID; // Pass identification, replacement for typeid
MachineLICM() : MachineFunctionPass((intptr_t)&ID) {}
@@ -66,16 +69,23 @@
AU.addRequired();
}
private:
-/// GatherAllLoops - Get all loops in depth first order.
+/// VisitAllLoops - Visit all of the loops in depth first order and try to
+/// hoist invariant instructions from them.
///
-void GatherAllLoops(MachineLoop *L, SmallVectorImpl &Loops) {
+void VisitAllLoops(MachineLoop *L) {
const std::vector &SubLoops = L->getSubLoops();
for (MachineLoop::iterator
- I = SubLoops.begin(), E = SubLoops.end(); I != E; ++I)
-GatherAllLoops(*I, Loops);
+ I = SubLoops.begin(), E = SubLoops.end(); I != E; ++I) {
+MachineLoop *ML = *I;
+
+// Traverse the body of the loop in depth first order on the dominator
+// tree so that we are guaranteed to see definitions before we see
uses.
+VisitAllLoops(ML);
+HoistRegion(DT->getNode(ML->getHeader()));
+ }
- Loops.push_back(L);
+ HoistRegion(DT->getNode(L->getHeader()));
}
/// MapVirtualRegisterDefs - Create a map of which machine instruction
@@ -104,8 +114,12 @@
///
bool CanHoistInst(MachineInstr &I) const {
const TargetInstrDescriptor *TID = I.getInstrDescriptor();
- MachineOpCode Opcode = TID->Opcode;
+ // Don't hoist if this instruction implicitly reads physical registers or
+ // doesn't take any operands.
+ if (TID->ImplicitUses || !I.getNumOperands()) return false;
+
+ MachineOpCode Opcode = TID->Opcode;
return TII->isTriviallyReMaterializable(&I) &&
// FIXME: Below necessary?
!(TII->isReturn(Opcode) ||
@@ -137,12 +151,13 @@
Preds.push_back(*I);
}
-/// MoveInstToBlock - Moves the machine instruction to the bottom of the
-/// predecessor basic block (but before the terminator instructions).
+/// MoveInstToEndOfBlock - Moves the machine instruction to the bottom of
+/// the predecessor basic block (but before the terminator instructions).
///
-void MoveInstToBlock(MachineBasicBlock *MBB, MachineInstr *MI) {
+void MoveInstToEndOfBlock(MachineBasicBlock *MBB, MachineInstr *MI) {
MachineBasicBlock::iterator Iter = MBB->getFirstTerminator();
MBB->insert(Iter, MI);
+ ++NumHoisted;
}
/// HoistRegion - Walk the specified region of the CFG (defined by all
@@ -156,7 +171,7 @@
/// Hoist - When an instruction is found to only use loop invariant
operands
/// that is safe to hoist, this instruction is called to do the dirty work.
///
-bool Hoist(MachineInstr &MI);
+void Hoist(MachineInstr &MI);
};
char MachineLICM::ID = 0;
@@ -188,17 +203,7 @@
// Visit all of the instructions of the loop. We want to visit the subloops
// first, though, so that we can hoist their invariants first into their
// containing loop before we process that loop.
-SmallVector Loops;
-GatherAllLoops(L, Loops);
Re: [llvm-commits] [llvm] r44687 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/MachineLICM.cpp lib/Target/PowerPC/PPCInstrInfo.td
On Dec 7, 2007 4:42 PM, Evan Cheng <[EMAIL PROTECTED]> wrote:
>
> Nicely done!
>
Thx! :-)
> > +// Map the def of a virtual register to the machine instruction.
> > +std::map VRegDefs;
>
> Consider using IndexedMap.
>
Okay.
> > +bool CanHoistInst(MachineInstr &I) const {
> > + const TargetInstrDescriptor *TID = I.getInstrDescriptor();
> > + MachineOpCode Opcode = TID->Opcode;
> > +
> > + return TII->isTriviallyReMaterializable(&I) &&
> > +// FIXME: Below necessary?
> > +!(TII->isReturn(Opcode) ||
> > + TII->isTerminatorInstr(Opcode) ||
> > + TII->isBranch(Opcode) ||
> > + TII->isIndirectBranch(Opcode) ||
> > + TII->isBarrier(Opcode) ||
> > + TII->isCall(Opcode) ||
> > + TII->isLoad(Opcode) || // TODO: Do loads and stores.
> > + TII->isStore(Opcode));
> > +}
>
> Since you are touching this... When you have a chance, please rename
> it to something like hasNoSideEffect().
>
Okay. I'll do it in a future patch.
> > +void MoveInstToBlock(MachineBasicBlock *MBB, MachineInstr *MI) {
> > + MachineBasicBlock::iterator Iter = MBB->getFirstTerminator();
> > + MBB->insert(Iter, MI);
> > +}
>
> Poorly named. :-) MoveInstToEndOfBlock?
>
Sounds good.
> > +// Visit all of the instructions of the loop. We want to visit
> > the subloops
> > +// first, though, so that we can hoist their invariants first
> > into their
> > +// containing loop before we process that loop.
> > +SmallVector Loops;
> > +GatherAllLoops(L, Loops);
>
> Seems to me this can be smarter. When you are gathering the loops, put
> loops of greater depth in the front of the queue then HoistRegion
> won't have to check if the BB is in the current loop level?
>
> > +for (MachineBasicBlock::const_iterator
> > + II = MBB.begin(), IE = MBB.end(); II != IE; ++II) {
> > + const MachineInstr &MI = *II;
> > +
> > + if (MI.getNumOperands() > 0) {
> > +const MachineOperand &MO = MI.getOperand(0);
>
> This is not right. You are assuming only one def and it must be the
> first operand. Neither is necessarily true.
>
Okay.
> > + // If this subregion is not in the top level loop at all, exit.
> > + if (!CurLoop->contains(BB)) return;
> > +
> > + // Only need to process the contents of this block if it is not
> > part of a
> > + // subloop (which would already have been processed).
> > + if (!isInSubLoop(BB))
>
> Like I said earlier, I think this check can be eliminated if we visit
> the inner most loops first (and perhaps keep track which BB has been
> processed?)
>
I'm not sure I understand. I was under the impression that
MachineDomTreeNode would give blocks from the loop and its subloops.
If we keep track of those visited, I suppose we could simplify this
check...
> > + // Try hoisting the instruction out of the loop. We can only
> > do this if
> > + // all of the operands of the instruction are loop invariant
> > and if it is
> > + // safe to hoist the instruction.
> > + if (Hoist(MI))
> > +// Hoisting was successful! Remove bothersome instruction
> > now.
> > +MI.getParent()->remove(&MI);
>
> Why not have Hoist remove the MI?
>
I had a bug earlier where I was invalidating an iterator. I think it's
no longer the case, so this can be moved to Hoist instead.
> > + // Don't hoist if this instruction implicitly reads physical
> > registers or
> > + // doesn't take any operands.
> > + if (TID->ImplicitUses || !I.getNumOperands()) return false;
>
> The comment is wrong. It's ok to lift something that has no uses but
> produces result(s), right? "doesn't take any operands" to me means
> something that doesn't have any uses.
>
I was thinking about things like "emms" which don't seem to use
anything, but have definite side effects. Or will this be picked up in
the earlier check isTriviallyReMaterializable?
> > + if (!CanHoistInst(I)) return false;
>
> Perhaps fold the earlier check into CanHoistInst()?
>
Okay.
> > +// If the loop contains the definition of an operand, then the
> > instruction
> > +// isn't loop invariant.
> > +if (CurLoop->contains(VRegDefs[Reg]->getParent()))
> > + return false;
>
> Hmmm. I am not sure about this. What if the definition is in the
> preheader? Does contains() returns true? Chris, Owen?
>
The preheader wouldn't be part of the loop, so it should be okay.
> Also, I fear this might be slow. When you are creating the VReg -> MI
> map, perhaps you should create a VReg -> loop map as well?
>
I'll see if a map will help things along.
> > +bool MachineLICM::Hoist(MachineInstr &MI) {
> > + if (!isLoopInvariantInst(MI)) return false;
> > +
> > + std::vector Preds;
> > +
> > + // Non-back-edge predecessors.
> > + FindPredecessors(Preds);
>
> Consider caching some of these info?
>
Okay.
> > +// FIXME: We are assuming at first that the basic blocks coming
> > into this
> > +// loop have only one
Re: [llvm-commits] [llvm] r44687 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/MachineLICM.cpp lib/Target/PowerPC/PPCInstrInfo.td
On Dec 7, 2007 5:01 PM, Chris Lattner <[EMAIL PROTECTED]> wrote: > >> +// Visit all of the instructions of the loop. We want to visit > >> the subloops > >> +// first, though, so that we can hoist their invariants first > >> into their > >> +// containing loop before we process that loop. > >> +SmallVector Loops; > >> +GatherAllLoops(L, Loops); > > > > Seems to me this can be smarter. When you are gathering the loops, put > > loops of greater depth in the front of the queue then HoistRegion > > won't have to check if the BB is in the current loop level? > > This should do a simple postorder traversal of the loop nest, there > is no need to make a vector of the loops. This ensures you visit > inner loops before outer loops etc. > Doh! Yeah, it's easier to just do it without the vector. > >> + // Now move the instructions to the predecessors. > >> + for (std::vector::iterator > >> + I = Preds.begin(), E = Preds.end(); I != E; ++I) > >> +MoveInstToBlock(*I, MI.clone()); > > > > This will create multiple copies, it seems bad. Again, this should be > > fixable with a loop preheader? > > Furthermore, this won't work, you'd have to insert phi nodes etc. > You really really really don't want to do this bill. Only handle > loops that have a header with one predecessor that is outside the > loop plz, > Ah! Good point. When there's pre-headers, I'll be able to handle this much nicer. In the meantime, I'll make sure that there's only one predecessor. -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.0] r44689 - /llvm-gcc-4.0/trunk/build_gcc
Author: void Date: Fri Dec 7 18:39:04 2007 New Revision: 44689 URL: http://llvm.org/viewvc/llvm-project?rev=44689&view=rev Log: Backport driver-driver linkage hack from 4.2 Modified: llvm-gcc-4.0/trunk/build_gcc Modified: llvm-gcc-4.0/trunk/build_gcc URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/build_gcc?rev=44689&r1=44688&r2=44689&view=diff == --- llvm-gcc-4.0/trunk/build_gcc (original) +++ llvm-gcc-4.0/trunk/build_gcc Fri Dec 7 18:39:04 2007 @@ -511,11 +511,17 @@ ln -s -f ../../../$DEST_ROOT/bin/llvm-gcc-$MAJ_VERS llvm-gcc-$MAJ_VERS || exit 1 ln -s -f ../../../$DEST_ROOT/bin/llvm-g++-$MAJ_VERS llvm-g++-$MAJ_VERS || exit 1 - # Copy one of the libllvmgcc.dylib's up to libexec/gcc. +# FIXME: This is a hack to get things working. +for h in $HOSTS ; do +ln -s -f ../../../$DEST_ROOT/bin/$h-apple-darwin$DARWIN_VERS-llvm-gcc-$MAJ_VERS $h-apple-darwin$DARWIN_VERS-llvm-gcc-$MAJ_VERS || exit 1 +ln -s -f ../../../$DEST_ROOT/bin/$h-apple-darwin$DARWIN_VERS-llvm-g++-$MAJ_VERS $h-apple-darwin$DARWIN_VERS-llvm-g++-$MAJ_VERS || exit 1 +done + +# Copy one of the libllvmgcc.dylib's up to libexec/gcc. cp $DEST_DIR/$DEST_ROOT/libexec/gcc/$BUILD-apple-darwin$DARWIN_VERS/$VERS/libllvmgcc.dylib \ $DEST_DIR/$DEST_ROOT/libexec/gcc/ - # Replace the installed ones with symlinks to the common one. +# Replace the installed ones with symlinks to the common one. for t in $TARGETS ; do cd $DEST_DIR/$DEST_ROOT/libexec/gcc/$t-apple-darwin$DARWIN_VERS/$VERS/ rm libllvmgcc.dylib ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44687 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/MachineLICM.cpp lib/Target/PowerPC/PPCInstrInfo.td
On Dec 7, 2007 2:24 PM, Chris Lattner <[EMAIL PROTECTED]> wrote:
>
> I know you're kidding, but have you benchmarked this on the G5? In
> this specific case, "foo" is probably MUCH faster because the loop is
> one dispatch group instead of two (I think). :)
>
It made this program slower:
$ cat t.c
#include
#define SIZE 10
int arr[SIZE];
__attribute__((noinline)) void foo(int *arr, unsigned size) {
unsigned i = 0;
do {
arr[i++] = 0;
} while (i < size);
}
int main() {
int i;
for (i = 0; i < SIZE; ++i)
foo(arr, SIZE);
return 0;
}
$ time ./t.old
real0m15.107s
user0m15.095s
sys 0m0.012s
$ time ./t.new
real0m20.088s
user0m20.075s
sys 0m0.013s
But when I set the alignment of the loop in main to 8, it got slightly faster:
$ time ./t.new
real0m15.090s
user0m15.079s
sys 0m0.010s
So there's some type of alignment thing that's getting in the way, but
it's encouraging for an initial pass that moved 3 instructions total.
:-)
-bw
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[llvm-commits] [llvm] r44687 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/MachineLICM.cpp lib/Target/PowerPC/PPCInstrInfo.td
Author: void
Date: Fri Dec 7 15:42:31 2007
New Revision: 44687
URL: http://llvm.org/viewvc/llvm-project?rev=44687&view=rev
Log:
Initial commit of the machine code LICM pass. It successfully hoists this:
_foo:
li r2, 0
LBB1_1: ; bb
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
to:
_foo:
li r2, 0
li r5, 0
LBB1_1: ; bb
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
ZOMG!! :-)
Moar to come...
Added:
llvm/trunk/lib/CodeGen/MachineLICM.cpp
Modified:
llvm/trunk/include/llvm/CodeGen/Passes.h
llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
Modified: llvm/trunk/include/llvm/CodeGen/Passes.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=44687&r1=44686&r2=44687&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/Passes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/Passes.h Fri Dec 7 15:42:31 2007
@@ -135,6 +135,10 @@
/// for the Sparc.
FunctionPass *getRegisterAllocator(TargetMachine &T);
+ /// createMachineLICMPass - This pass performs LICM on machine instructions.
+ ///
+ FunctionPass *createMachineLICMPass();
+
} // End llvm namespace
#endif
Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=44687&r1=44686&r2=44687&view=diff
==
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Fri Dec 7 15:42:31 2007
@@ -66,7 +66,9 @@
// Print the instruction selected machine code...
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
-
+
+ PM.add(createMachineLICMPass());
+
// Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator());
@@ -92,7 +94,7 @@
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast)
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
-
+
// Fold redundant debug labels.
PM.add(createDebugLabelFoldingPass());
@@ -175,7 +177,9 @@
// Print the instruction selected machine code...
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
-
+
+ PM.add(createMachineLICMPass());
+
// Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator());
@@ -204,7 +208,7 @@
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast)
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
-
+
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
Added: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44687&view=auto
==
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (added)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Fri Dec 7 15:42:31 2007
@@ -0,0 +1,336 @@
+//===-- MachineLICM.cpp - Machine Loop Invariant Code Motion Pass
-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by Bill Wendling and is distributed under the
+// University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===--===//
+//
+// This pass performs loop invariant code motion on machine instructions. We
+// attempt to remove as much code from the body of a loop as possible.
+//
+//===--===//
+
+#define DEBUG_TYPE "machine-licm"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Support/CFG.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetMachine.h"
+#include
+
+using namespace llvm;
+
+namespace {
+ // Hidden options to help debugging
+ cl::opt
+ PerformLICM("machine-licm",
+
[llvm-commits] [llvm-gcc-4.2] r44667 - in /llvm-gcc-4.2/trunk: build_gcc driverdriver.c
Author: void
Date: Thu Dec 6 16:10:02 2007
New Revision: 44667
URL: http://llvm.org/viewvc/llvm-project?rev=44667&view=rev
Log:
Hacked to link the drivers into the ${Fnord}/Developer/usr/bin directory. This
isn't optimal, but gets around the hack we had of trying to find the correct
driver...
Modified:
llvm-gcc-4.2/trunk/build_gcc
llvm-gcc-4.2/trunk/driverdriver.c
Modified: llvm-gcc-4.2/trunk/build_gcc
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/build_gcc?rev=44667&r1=44666&r2=44667&view=diff
==
--- llvm-gcc-4.2/trunk/build_gcc (original)
+++ llvm-gcc-4.2/trunk/build_gcc Thu Dec 6 16:10:02 2007
@@ -372,7 +372,7 @@
$DIR/dst-*-$t/$DEST_ROOT/bin/$t-apple-darwin$DARWIN_VERS-gcc || exit 1
# APPLE LOCAL LLVM build_gcc bug with non-/usr $DEST_ROOT
lipo -output .$DEST_ROOT/bin/$t-apple-darwin$DARWIN_VERS-llvm-g++-$MAJ_VERS
-create \
-$DIR/dst-*-$t/$DEST_ROOT/bin/$t-apple-darwin$DARWIN_VERS-llvm-g++ || exit 1
+$DIR/dst-*-$t/$DEST_ROOT/bin/$t-apple-darwin$DARWIN_VERS-g++ || exit 1
done
# lib
@@ -524,11 +524,17 @@
ln -s -f ../../../$DEST_ROOT/bin/llvm-gcc-$MAJ_VERS llvm-gcc-$MAJ_VERS || exit
1
ln -s -f ../../../$DEST_ROOT/bin/llvm-g++-$MAJ_VERS llvm-g++-$MAJ_VERS || exit
1
- # Copy one of the libllvmgcc.dylib's up to libexec/gcc.
+# FIXME: This is a hack to get things working.
+for h in $HOSTS ; do
+ln -s -f
../../../$DEST_ROOT/bin/$h-apple-darwin$DARWIN_VERS-llvm-gcc-$MAJ_VERS
$h-apple-darwin$DARWIN_VERS-llvm-gcc-$MAJ_VERS || exit 1
+ln -s -f
../../../$DEST_ROOT/bin/$h-apple-darwin$DARWIN_VERS-llvm-g++-$MAJ_VERS
$h-apple-darwin$DARWIN_VERS-llvm-g++-$MAJ_VERS || exit 1
+done
+
+# Copy one of the libllvmgcc.dylib's up to libexec/gcc.
cp
$DEST_DIR/$DEST_ROOT/libexec/gcc/$BUILD-apple-darwin$DARWIN_VERS/$VERS/libllvmgcc.dylib
\
$DEST_DIR/$DEST_ROOT/libexec/gcc/
- # Replace the installed ones with symlinks to the common one.
+# Replace the installed ones with symlinks to the common one.
for t in $TARGETS ; do
cd $DEST_DIR/$DEST_ROOT/libexec/gcc/$t-apple-darwin$DARWIN_VERS/$VERS/
rm libllvmgcc.dylib
Modified: llvm-gcc-4.2/trunk/driverdriver.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/driverdriver.c?rev=44667&r1=44666&r2=44667&view=diff
==
--- llvm-gcc-4.2/trunk/driverdriver.c (original)
+++ llvm-gcc-4.2/trunk/driverdriver.c Thu Dec 6 16:10:02 2007
@@ -1253,6 +1253,7 @@
strncpy (curr_dir, argv[0], prefix_len);
curr_dir[prefix_len] = '\0';
/* LLVM LOCAL begin - These drivers live in /.../usr/llvm-gcc-4.2/bin */
+#if 0
{
size_t curr_dir_len = strlen (curr_dir);
const char *llvm_bin_dir = "/usr/llvm-gcc-4.2/bin/";
@@ -1267,6 +1268,9 @@
} else
driver_exec_prefix = curr_dir;
}
+#else
+ driver_exec_prefix = curr_dir;
+#endif
/* LLVM LOCAL end - These drivers live in /.../usr/llvm-gcc-4.2/bin */
#ifdef DEBUG
@@ -1553,7 +1557,11 @@
final_cleanup ();
free (curr_dir);
+ /* LLVM LOCAL - begin */
+#if 0
if (delete_prefix)
free (driver_exec_prefix);
+#endif
+ /* LLVM LOCAL - end */
return greatest_status;
}
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[llvm-commits] [llvm] r44629 - /llvm/trunk/CREDITS.TXT
Author: void Date: Wed Dec 5 15:26:54 2007 New Revision: 44629 URL: http://llvm.org/viewvc/llvm-project?rev=44629&view=rev Log: Alphabetizing; I want to be the last in the file ;-) Modified: llvm/trunk/CREDITS.TXT Modified: llvm/trunk/CREDITS.TXT URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=44629&r1=44628&r2=44629&view=diff == --- llvm/trunk/CREDITS.TXT (original) +++ llvm/trunk/CREDITS.TXT Wed Dec 5 15:26:54 2007 @@ -202,6 +202,10 @@ E: [EMAIL PROTECTED] D: Test suite fixes for FreeBSD +N: Scott Michel +E: [EMAIL PROTECTED] +D: Added STI Cell SPU backend. + N: Morten Ofstad E: [EMAIL PROTECTED] D: Visual C++ compatibility fixes @@ -257,7 +261,3 @@ D: Darwin exception handling D: MMX & SSSE3 instructions D: SPEC2006 support - -N: Scott Michel -E: [EMAIL PROTECTED] -D: Added STI Cell SPU backend. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44487 - in /llvm/trunk: include/llvm/Analysis/AliasAnalysis.h lib/Analysis/AliasAnalysis.cpp lib/Analysis/AliasAnalysisCounter.cpp lib/Analysis/AliasSetTracker.cpp lib/Analy
Hi Duncan, > > This patch seems to be causing a bootstrap failure on my system. I try > > to compile llvm-gcc-4.2 and it gives me errors like this during stage2 > > of the bootstrapping build: > > I've committed a workaround. It's not yet clear what the root cause of > the problem is. > Thanks for looking into/fixing this! -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44487 - in /llvm/trunk: include/llvm/Analysis/AliasAnalysis.h lib/Analysis/AliasAnalysis.cpp lib/Analysis/AliasAnalysisCounter.cpp lib/Analysis/AliasSetTracker.cpp lib/Analy
Hi Duncan, This patch seems to be causing a bootstrap failure on my system. I try to compile llvm-gcc-4.2 and it gives me errors like this during stage2 of the bootstrapping build: /Users/admin/LLVM/llvm-gcc-4.2.obj/./gcc/xgcc -B/Users/admin/LLVM/llvm-gcc-4.2.obj/./gcc/ -B/Users/admin/LLVM/llvm-gcc-4.2.install/i386-apple-darwin9.1.0/bin/ -B/Users/admin/LLVM/llvm-gcc-4.2.install/i386-apple-darwin9.1.0/lib/ -isystem /Users/admin/LLVM/llvm-gcc-4.2.install/i386-apple-darwin9.1.0/include -isystem /Users/admin/LLVM/llvm-gcc-4.2.install/i386-apple-darwin9.1.0/sys-include -O2 -g -O2 -DIN_GCC-W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -I. -I. -I../../llvm-gcc-4.2.src/gcc -I../../llvm-gcc-4.2.src/gcc/. -I../../llvm-gcc-4.2.src/gcc/../include -I./../intl -I../../llvm-gcc-4.2.src/gcc/../libcpp/include -I../../llvm-gcc-4.2.src/gcc/../libdecnumber -I../libdecnumber -I/Users/admin/LLVM/llvm.src/include -I/Users/admin/LLVM/llvm.obj/include -mlongcall \ -fno-tree-dominator-opts \ \ -c ../../llvm-gcc-4.2.src/gcc/config/darwin-crt3.c -o crt3.o :0: internal compiler error: in tree_low_cst, at tree.c:4646 Please submit a full bug report, with preprocessed source if appropriate. See http://developer.apple.com/bugreporter> for instructions. make[5]: *** [crt3.o] Error 1 make[4]: *** [extra] Error 2 make[3]: *** [stmp-multilib] Error 2 make[3]: *** Waiting for unfinished jobs rm gcov.pod gpl.pod fsf-funding.pod gfdl.pod cpp.pod gcc.pod make[2]: *** [all-stage2-gcc] Error 2 make[1]: *** [stage2-bubble] Error 2 make: *** [all] Error 2 I did a binary search and it landed at this patch. I know that this is scant information, but is there anything about this patch that you think could cause a miscompilation? (I'm compiling this on an x86 iMac running Leopard.) Thanks! -bw On Nov 30, 2007 11:51 PM, Duncan Sands <[EMAIL PROTECTED]> wrote: > Author: baldrick > Date: Sat Dec 1 01:51:45 2007 > New Revision: 44487 > > URL: http://llvm.org/viewvc/llvm-project?rev=44487&view=rev > Log: > Integrate the readonly/readnone logic more deeply > into alias analysis. This meant updating the API > which now has versions of the getModRefBehavior, > doesNotAccessMemory and onlyReadsMemory methods > which take a callsite parameter. These should be > used unless the callsite is not known, since in > general they can do a better job than the versions > that take a function. Also, users should no longer > call the version of getModRefBehavior that takes > both a function and a callsite. To reduce the > chance of misuse it is now protected. > > Modified: > llvm/trunk/include/llvm/Analysis/AliasAnalysis.h > llvm/trunk/lib/Analysis/AliasAnalysis.cpp > llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp > llvm/trunk/lib/Analysis/AliasSetTracker.cpp > llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp > llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp > llvm/trunk/lib/Analysis/LoadValueNumbering.cpp > llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp > llvm/trunk/lib/Transforms/Scalar/ADCE.cpp > llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp > llvm/trunk/lib/Transforms/Scalar/GVN.cpp > llvm/trunk/lib/Transforms/Scalar/LICM.cpp > > Modified: llvm/trunk/include/llvm/Analysis/AliasAnalysis.h > URL: > http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasAnalysis.h?rev=44487&r1=44486&r2=44487&view=diff > > == > --- llvm/trunk/include/llvm/Analysis/AliasAnalysis.h (original) > +++ llvm/trunk/include/llvm/Analysis/AliasAnalysis.h Sat Dec 1 01:51:45 2007 > @@ -186,40 +186,57 @@ > }; >}; > > - /// getModRefBehavior - Return the behavior of the specified function if > - /// called from the specified call site. The call site may be null in > which > - /// case the most generic behavior of this function should be returned. > - virtual ModRefBehavior getModRefBehavior(Function *F, CallSite CS, > - std::vector *Info = > 0); > - > - /// doesNotAccessMemory - If the specified function is known to never read > or > - /// write memory, return true. If the function only reads from > known-constant > - /// memory, it is also legal to return true. Functions that unwind the > stack > - /// are not legal for this predicate. > - /// > - /// Many optimizations (such as CSE and LICM) can be performed on calls to > it, > - /// without worrying about aliasing properties, and many functions have > this > - /// property (e.g. 'sin' and 'cos'). > + /// getModRefBehavior - Return the behavior when calling the given call > site. > + ModRefBehavior getModRefBehavior(CallSite CS, > + std::vector *Info = 0); > + > + /// getModRefBehavior - Return the behavior when calling the given > function. > + /// For use when the call site
[llvm-commits] [llvm-gcc-4.2] r44475 - /llvm-gcc-4.2/trunk/driverdriver.c
Author: void
Date: Fri Nov 30 17:13:52 2007
New Revision: 44475
URL: http://llvm.org/viewvc/llvm-project?rev=44475&view=rev
Log:
Change the prefix_len if it's not curr_dir.
Modified:
llvm-gcc-4.2/trunk/driverdriver.c
Modified: llvm-gcc-4.2/trunk/driverdriver.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/driverdriver.c?rev=44475&r1=44474&r2=44475&view=diff
==
--- llvm-gcc-4.2/trunk/driverdriver.c (original)
+++ llvm-gcc-4.2/trunk/driverdriver.c Fri Nov 30 17:13:52 2007
@@ -1196,6 +1196,7 @@
char *override_option_str = NULL;
char path_buffer[2*PATH_MAX+1];
int linklen;
+ int delete_prefix = 0;
total_argc = argc;
prog_len = 0;
@@ -1258,10 +1259,12 @@
size_t bin_dir_len = strlen (llvm_bin_dir);
if (curr_dir_len <= bin_dir_len ||
-strncmp (&curr_dir[curr_dir_len - bin_dir_len], llvm_bin_dir,
bin_dir_len) != 0)
+strncmp (&curr_dir[curr_dir_len - bin_dir_len], llvm_bin_dir,
bin_dir_len) != 0) {
driver_exec_prefix =
make_relative_prefix (argv[0], curr_dir, "/usr/llvm-gcc-4.2/bin/");
-else
+ delete_prefix = 1;
+ prefix_len = strlen (driver_exec_prefix);
+} else
driver_exec_prefix = curr_dir;
}
/* LLVM LOCAL end - These drivers live in /.../usr/llvm-gcc-4.2/bin */
@@ -1550,5 +1553,7 @@
final_cleanup ();
free (curr_dir);
+ if (delete_prefix)
+free (driver_exec_prefix);
return greatest_status;
}
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[llvm-commits] [llvm-gcc-4.0] r44474 - /llvm-gcc-4.0/trunk/driverdriver.c
Author: void
Date: Fri Nov 30 17:13:38 2007
New Revision: 44474
URL: http://llvm.org/viewvc/llvm-project?rev=44474&view=rev
Log:
Change the prefix_len if it's not curr_dir.
Modified:
llvm-gcc-4.0/trunk/driverdriver.c
Modified: llvm-gcc-4.0/trunk/driverdriver.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/driverdriver.c?rev=44474&r1=44473&r2=44474&view=diff
==
--- llvm-gcc-4.0/trunk/driverdriver.c (original)
+++ llvm-gcc-4.0/trunk/driverdriver.c Fri Nov 30 17:13:38 2007
@@ -1204,6 +1204,7 @@
char *override_option_str = NULL;
char path_buffer[2*PATH_MAX+1];
int linklen;
+ int delete_prefix = 0;
total_argc = argc;
prog_len = 0;
@@ -1266,10 +1267,12 @@
size_t bin_dir_len = strlen (llvm_bin_dir);
if (curr_dir_len <= bin_dir_len ||
-strncmp (&curr_dir[curr_dir_len - bin_dir_len], llvm_bin_dir,
bin_dir_len) != 0)
+strncmp (&curr_dir[curr_dir_len - bin_dir_len], llvm_bin_dir,
bin_dir_len) != 0) {
driver_exec_prefix =
make_relative_prefix (argv[0], curr_dir, "/usr/llvm-gcc-4.0/bin/");
-else
+ delete_prefix = 1;
+ prefix_len = strlen (driver_exec_prefix);
+} else
driver_exec_prefix = curr_dir;
}
/* LLVM LOCAL end - These drivers live in /.../usr/llvm-gcc-4.0/bin */
@@ -1559,5 +1562,7 @@
final_cleanup ();
free (curr_dir);
+ if (delete_prefix)
+free (driver_exec_prefix);
return greatest_status;
}
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[llvm-commits] [llvm-gcc-4.2] r44466 - /llvm-gcc-4.2/trunk/driverdriver.c
Author: void
Date: Fri Nov 30 15:18:29 2007
New Revision: 44466
URL: http://llvm.org/viewvc/llvm-project?rev=44466&view=rev
Log:
Ahem...that's 4.2, not 4.0...
Modified:
llvm-gcc-4.2/trunk/driverdriver.c
Modified: llvm-gcc-4.2/trunk/driverdriver.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/driverdriver.c?rev=44466&r1=44465&r2=44466&view=diff
==
--- llvm-gcc-4.2/trunk/driverdriver.c (original)
+++ llvm-gcc-4.2/trunk/driverdriver.c Fri Nov 30 15:18:29 2007
@@ -1251,20 +1251,20 @@
curr_dir = (char *) malloc (sizeof (char) * (prefix_len + 1));
strncpy (curr_dir, argv[0], prefix_len);
curr_dir[prefix_len] = '\0';
- /* LLVM LOCAL begin - These drivers live in /.../usr/llvm-gcc-4.0/bin */
+ /* LLVM LOCAL begin - These drivers live in /.../usr/llvm-gcc-4.2/bin */
{
size_t curr_dir_len = strlen (curr_dir);
-const char *llvm_bin_dir = "/usr/llvm-gcc-4.0/bin/";
+const char *llvm_bin_dir = "/usr/llvm-gcc-4.2/bin/";
size_t bin_dir_len = strlen (llvm_bin_dir);
if (curr_dir_len <= bin_dir_len ||
strncmp (&curr_dir[curr_dir_len - bin_dir_len], llvm_bin_dir,
bin_dir_len) != 0)
driver_exec_prefix =
-make_relative_prefix (argv[0], curr_dir, "/usr/llvm-gcc-4.0/bin/");
+make_relative_prefix (argv[0], curr_dir, "/usr/llvm-gcc-4.2/bin/");
else
driver_exec_prefix = curr_dir;
}
- /* LLVM LOCAL end - These drivers live in /.../usr/llvm-gcc-4.0/bin */
+ /* LLVM LOCAL end - These drivers live in /.../usr/llvm-gcc-4.2/bin */
#ifdef DEBUG
fprintf (stderr,"%s: full progname = %s\n", progname, argv[0]);
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[llvm-commits] [llvm-gcc-4.0] r44465 - /llvm-gcc-4.0/trunk/driverdriver.c
Author: void
Date: Fri Nov 30 15:13:49 2007
New Revision: 44465
URL: http://llvm.org/viewvc/llvm-project?rev=44465&view=rev
Log:
The drivers live in /Developer/usr/llvm-gcc-4.0/bin now instead of the current
directory. Use "make_relative_prefix" to create this.
Modified:
llvm-gcc-4.0/trunk/driverdriver.c
Modified: llvm-gcc-4.0/trunk/driverdriver.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/driverdriver.c?rev=44465&r1=44464&r2=44465&view=diff
==
--- llvm-gcc-4.0/trunk/driverdriver.c (original)
+++ llvm-gcc-4.0/trunk/driverdriver.c Fri Nov 30 15:13:49 2007
@@ -20,7 +20,6 @@
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
-
#include
#include
#include
@@ -1260,11 +1259,25 @@
curr_dir = (char *) malloc (sizeof (char) * (prefix_len + 1));
strncpy (curr_dir, argv[0], prefix_len);
curr_dir[prefix_len] = '\0';
- driver_exec_prefix = (argv[0], "/usr/bin", curr_dir);
+ /* LLVM LOCAL begin - These drivers live in /.../usr/llvm-gcc-4.0/bin */
+ {
+size_t curr_dir_len = strlen (curr_dir);
+const char *llvm_bin_dir = "/usr/llvm-gcc-4.0/bin/";
+size_t bin_dir_len = strlen (llvm_bin_dir);
+
+if (curr_dir_len <= bin_dir_len ||
+strncmp (&curr_dir[curr_dir_len - bin_dir_len], llvm_bin_dir,
bin_dir_len) != 0)
+ driver_exec_prefix =
+make_relative_prefix (argv[0], curr_dir, "/usr/llvm-gcc-4.0/bin/");
+else
+ driver_exec_prefix = curr_dir;
+ }
+ /* LLVM LOCAL end - These drivers live in /.../usr/llvm-gcc-4.0/bin */
#ifdef DEBUG
fprintf (stderr,"%s: full progname = %s\n", progname, argv[0]);
fprintf (stderr,"%s: progname = %s\n", progname, progname);
+ fprintf (stderr,"%s: curr_dir = %s\n", progname, curr_dir);
fprintf (stderr,"%s: driver_exec_prefix = %s\n", progname,
driver_exec_prefix);
#endif
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[llvm-commits] [llvm-gcc-4.2] r44464 - /llvm-gcc-4.2/trunk/driverdriver.c
Author: void
Date: Fri Nov 30 15:13:29 2007
New Revision: 44464
URL: http://llvm.org/viewvc/llvm-project?rev=44464&view=rev
Log:
The drivers live in /Developer/usr/llvm-gcc-4.2/bin now instead of the current
directory. Use "make_relative_prefix" to create this.
Modified:
llvm-gcc-4.2/trunk/driverdriver.c
Modified: llvm-gcc-4.2/trunk/driverdriver.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/driverdriver.c?rev=44464&r1=44463&r2=44464&view=diff
==
--- llvm-gcc-4.2/trunk/driverdriver.c (original)
+++ llvm-gcc-4.2/trunk/driverdriver.c Fri Nov 30 15:13:29 2007
@@ -1251,7 +1251,20 @@
curr_dir = (char *) malloc (sizeof (char) * (prefix_len + 1));
strncpy (curr_dir, argv[0], prefix_len);
curr_dir[prefix_len] = '\0';
- driver_exec_prefix = (argv[0], "/usr/bin", curr_dir);
+ /* LLVM LOCAL begin - These drivers live in /.../usr/llvm-gcc-4.0/bin */
+ {
+size_t curr_dir_len = strlen (curr_dir);
+const char *llvm_bin_dir = "/usr/llvm-gcc-4.0/bin/";
+size_t bin_dir_len = strlen (llvm_bin_dir);
+
+if (curr_dir_len <= bin_dir_len ||
+strncmp (&curr_dir[curr_dir_len - bin_dir_len], llvm_bin_dir,
bin_dir_len) != 0)
+ driver_exec_prefix =
+make_relative_prefix (argv[0], curr_dir, "/usr/llvm-gcc-4.0/bin/");
+else
+ driver_exec_prefix = curr_dir;
+ }
+ /* LLVM LOCAL end - These drivers live in /.../usr/llvm-gcc-4.0/bin */
#ifdef DEBUG
fprintf (stderr,"%s: full progname = %s\n", progname, argv[0]);
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Re: [llvm-commits] [llvm] r44384 - in /llvm/trunk: include/llvm/Analysis/LoopInfo.h include/llvm/CodeGen/MachineLoopInfo.h lib/CodeGen/MachineLoopInfo.cpp
Hi Owen,
Thanks! :-) A few comments:
> + // isLoopHeader - True if the block is a loop header node
You probably want a /// comment here.
> + virtual void print(std::ostream &O, const Module* M = 0) const {
> +if (O) LI->print(O, M);
> + }
I think that "if (O)" will always be true here, right?
> +// Allow clients to walk the list of nested loops...
> +template <> struct GraphTraits {
> + typedef const MachineLoop NodeType;
> + typedef std::vector::const_iterator ChildIteratorType;
Should this be:
typedef std::vector::const_iterator ChildIteratorType;
?
-bw
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[llvm-commits] [llvm-gcc-4.0] r44387 - /llvm-gcc-4.0/tags/Apple/llvmgcc40-2003/GNUmakefile
Author: void
Date: Tue Nov 27 19:36:42 2007
New Revision: 44387
URL: http://llvm.org/viewvc/llvm-project?rev=44387&view=rev
Log:
Line erroneously commented out
Modified:
llvm-gcc-4.0/tags/Apple/llvmgcc40-2003/GNUmakefile
Modified: llvm-gcc-4.0/tags/Apple/llvmgcc40-2003/GNUmakefile
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/tags/Apple/llvmgcc40-2003/GNUmakefile?rev=44387&r1=44386&r2=44387&view=diff
==
--- llvm-gcc-4.0/tags/Apple/llvmgcc40-2003/GNUmakefile (original)
+++ llvm-gcc-4.0/tags/Apple/llvmgcc40-2003/GNUmakefile Tue Nov 27 19:36:42 2007
@@ -39,7 +39,7 @@
ifndef DISABLE_LLVM
ENABLE_LLVM = true
# LLVM gets installed into /usr/local, not /usr.
-#ifndef DEVELOPER_DIR
+ifndef DEVELOPER_DIR
PREFIX = /Developer/usr/llvm-gcc-4.0
else
PREFIX = ${DEVELOPER_DIR}/usr/lvm-gcc-4.0
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[llvm-commits] [llvm-gcc-4.2] r44385 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2001/
Author: void Date: Tue Nov 27 19:07:53 2007 New Revision: 44385 URL: http://llvm.org/viewvc/llvm-project?rev=44385&view=rev Log: Creating llvmgcc42-2001 tag Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2001/ - copied from r44384, llvm-gcc-4.2/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.0] r44381 - /llvm-gcc-4.0/tags/Apple/llvmgcc40-2003/
Author: void Date: Tue Nov 27 16:37:18 2007 New Revision: 44381 URL: http://llvm.org/viewvc/llvm-project?rev=44381&view=rev Log: Creating tag llvmgcc40-2003 Added: llvm-gcc-4.0/tags/Apple/llvmgcc40-2003/ - copied from r44380, llvm-gcc-4.0/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44379 - /llvm/tags/Apple/llvmCore-2002/
Author: void Date: Tue Nov 27 16:32:59 2007 New Revision: 44379 URL: http://llvm.org/viewvc/llvm-project?rev=44379&view=rev Log: Creating llvmCore-2002 branch Added: llvm/tags/Apple/llvmCore-2002/ - copied from r44378, llvm/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44370 - in /llvm/trunk: lib/Target/Alpha/AlphaInstrInfo.td test/CodeGen/Alpha/2007-11-27-mulneg3.ll
Hi Andrew,
I'm getting this failure now:
FAIL: /Volumes/Gir/devel/llvm/llvm.src/test/CodeGen/Alpha/mul5.ll
Failed with exit(1) at line 1
while running: llvm-upgrade <
/Volumes/Gir/devel/llvm/llvm.src/test/CodeGen/Alpha/mul5.ll | llvm-as
| llc -march=alpha | not grep -i mul
mulq $16,$0,$0
mulq $16,252,$0
mulq $16,$0,$0
child process exited abnormally
Do you think that it's related to your patch?
-bw
On Nov 27, 2007 10:31 AM, Andrew Lenharth <[EMAIL PROTECTED]> wrote:
> Author: alenhar2
> Date: Tue Nov 27 12:31:30 2007
> New Revision: 44370
>
> URL: http://llvm.org/viewvc/llvm-project?rev=44370&view=rev
> Log:
> something wrong with this opt
>
> Added:
> llvm/trunk/test/CodeGen/Alpha/2007-11-27-mulneg3.ll
> Modified:
> llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td
>
> Modified: llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td?rev=44370&r1=44369&r2=44370&view=diff
>
> ==
> --- llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td Tue Nov 27 12:31:30 2007
> @@ -1086,16 +1086,18 @@
>(ADDQr (SLr GPRC:$RA, (nearP2X immRemP2:$imm)), (SLi GPRC:$RA,
> (nearP2RemX immRemP2:$imm)))>;
>
> //n is below a power of 2
> -def : Pat<(mul GPRC:$RA, immRem1n:$imm),
> - (SUBQr (SLr GPRC:$RA, (nearP2X immRem1n:$imm)), GPRC:$RA)>;
> -def : Pat<(mul GPRC:$RA, immRem2n:$imm),
> - (SUBQr (SLr GPRC:$RA, (nearP2X immRem2n:$imm)), (ADDQr GPRC:$RA,
> GPRC:$RA))>;
> -def : Pat<(mul GPRC:$RA, immRem3n:$imm),
> - (SUBQr (SLr GPRC:$RA, (nearP2X immRem3n:$imm)), (S4SUBQr GPRC:$RA,
> GPRC:$RA))>;
> -def : Pat<(mul GPRC:$RA, immRem4n:$imm),
> - (SUBQr (SLr GPRC:$RA, (nearP2X immRem4n:$imm)), (SLi GPRC:$RA,
> 2))>;
> -def : Pat<(mul GPRC:$RA, immRem5n:$imm),
> - (SUBQr (SLr GPRC:$RA, (nearP2X immRem5n:$imm)), (S4ADDQr GPRC:$RA,
> GPRC:$RA))>;
> -def : Pat<(mul GPRC:$RA, immRemP2n:$imm),
> - (SUBQr (SLr GPRC:$RA, (nearP2X immRemP2n:$imm)), (SLi GPRC:$RA,
> (nearP2RemX immRemP2n:$imm)))>;
> +//FIXME: figure out why something is truncating the imm to 32bits
> +// this will fix 2007-11-27-mulneg3
> +//def : Pat<(mul GPRC:$RA, immRem1n:$imm),
> +// (SUBQr (SLr GPRC:$RA, (nearP2X immRem1n:$imm)), GPRC:$RA)>;
> +//def : Pat<(mul GPRC:$RA, immRem2n:$imm),
> +// (SUBQr (SLr GPRC:$RA, (nearP2X immRem2n:$imm)), (ADDQr GPRC:$RA,
> GPRC:$RA))>;
> +//def : Pat<(mul GPRC:$RA, immRem3n:$imm),
> +// (SUBQr (SLr GPRC:$RA, (nearP2X immRem3n:$imm)), (S4SUBQr
> GPRC:$RA, GPRC:$RA))>;
> +//def : Pat<(mul GPRC:$RA, immRem4n:$imm),
> +// (SUBQr (SLr GPRC:$RA, (nearP2X immRem4n:$imm)), (SLi GPRC:$RA,
> 2))>;
> +//def : Pat<(mul GPRC:$RA, immRem5n:$imm),
> +// (SUBQr (SLr GPRC:$RA, (nearP2X immRem5n:$imm)), (S4ADDQr
> GPRC:$RA, GPRC:$RA))>;
> +//def : Pat<(mul GPRC:$RA, immRemP2n:$imm),
> +// (SUBQr (SLr GPRC:$RA, (nearP2X immRemP2n:$imm)), (SLi GPRC:$RA,
> (nearP2RemX immRemP2n:$imm)))>;
> } //Added complexity
>
> Added: llvm/trunk/test/CodeGen/Alpha/2007-11-27-mulneg3.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Alpha/2007-11-27-mulneg3.ll?rev=44370&view=auto
>
> ==
> --- llvm/trunk/test/CodeGen/Alpha/2007-11-27-mulneg3.ll (added)
> +++ llvm/trunk/test/CodeGen/Alpha/2007-11-27-mulneg3.ll Tue Nov 27 12:31:30
> 2007
> @@ -0,0 +1,13 @@
> +; RUN: llvm-as < %s | llc -march=alpha
> +
> +;FIXME: this should produce no mul inst. But not crashing will have to do
> for now
> +
> +; ModuleID = 'Output/bugpoint-train/bugpoint-reduced-simplified.bc'
> +target datalayout =
> "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
> +target triple = "alphaev6-unknown-linux-gnu"
> +
> +define fastcc i32 @getcount(i32 %s) {
> +cond_next43: ; preds = %bb27
> + %tmp431 = mul i32 %s, -3
> + ret i32 %tmp431
> +}
>
>
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Re: [llvm-commits] [llvm] r44166 - in /llvm/trunk: lib/CodeGen/LiveIntervalAnalysis.cpp test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll
Evan,
Awesome! Did you try to compile 4.2 after this patch?
-bw
Am 15.11.2007 um 00:13 schrieb Evan Cheng <[EMAIL PROTECTED]>:
> Author: evancheng
> Date: Thu Nov 15 02:13:29 2007
> New Revision: 44166
>
> URL: http://llvm.org/viewvc/llvm-project?rev=44166&view=rev
> Log:
> Fix a thinko in post-allocation coalescer.
>
> Added:
>llvm/trunk/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll
> Modified:
>llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
>
> Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=44166&r1=44165&r2=44166&view=diff
>
> ===
> ===
> ===
> =
> --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Nov 15
> 02:13:29 2007
> @@ -168,15 +168,22 @@
> if (index == end) break;
>
> MachineInstr *MI = getInstructionFromIndex(index);
> + unsigned SrcReg, DstReg;
> + if (tii_->isMoveInstr(*MI, SrcReg, DstReg))
> +if (SrcReg == li.reg || DstReg == li.reg)
> + continue;
> for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
> MachineOperand& mop = MI->getOperand(i);
> -if (!mop.isRegister() || !mop.isDef())
> +if (!mop.isRegister())
> continue;
> unsigned PhysReg = mop.getReg();
> -if (PhysReg == 0)
> +if (PhysReg == 0 || PhysReg == li.reg)
> continue;
> -if (MRegisterInfo::isVirtualRegister(PhysReg))
> +if (MRegisterInfo::isVirtualRegister(PhysReg)) {
> + if (!vrm.hasPhys(PhysReg))
> +continue;
> PhysReg = vrm.getPhys(PhysReg);
> +}
> if (PhysReg && mri_->regsOverlap(PhysReg, reg))
> return true;
> }
>
> Added: llvm/trunk/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll?rev=44166&view=auto
>
> ===
> ===
> ===
> =
> --- llvm/trunk/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll Thu Nov
> 15 02:13:29 2007
> @@ -0,0 +1,67 @@
> +; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep
> movl | grep 4
> +
> +%struct.double_int = type { i64, i64 }
> +%struct.tree_common = type <{ i8, [3 x i8] }>
> +%struct.tree_int_cst = type { %struct.tree_common, %
> struct.double_int }
> +%struct.tree_node = type { %struct.tree_int_cst }
> [EMAIL PROTECTED] = external constant [0 x i32]; <[0 x i32]*>
> [#uses=1]
> +
> +define i32 @simple_cst_equal(%struct.tree_node* %t1, %
> struct.tree_node* %t2) {
> +entry:
> +%tmp2526 = bitcast %struct.tree_node* %t1 to i32*;
> [#uses=1]
> +br i1 false, label %UnifiedReturnBlock, label %bb21
> +
> +bb21:; preds = %entry
> +%tmp27 = load i32* %tmp2526, align 4; [#uses=1]
> +%tmp29 = and i32 %tmp27, 255; [#uses=3]
> +%tmp2930 = trunc i32 %tmp29 to i8; [#uses=1]
> +%tmp37 = load i32* null, align 4; [#uses=1]
> +%tmp39 = and i32 %tmp37, 255; [#uses=2]
> +%tmp3940 = trunc i32 %tmp39 to i8; [#uses=1]
> +%tmp43 = add i32 %tmp29, -3; [#uses=1]
> +%tmp44 = icmp ult i32 %tmp43, 3; [#uses=1]
> +br i1 %tmp44, label %bb47.split, label %bb76
> +
> +bb47.split:; preds = %bb21
> +ret i32 0
> +
> +bb76:; preds = %bb21
> +br i1 false, label %bb82, label %bb146.split
> +
> +bb82:; preds = %bb76
> +%tmp94 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %
> tmp39; [#uses=1]
> +%tmp95 = load i32* %tmp94, align 4; [#uses=1]
> +%tmp9596 = trunc i32 %tmp95 to i8; [#uses=1]
> +%tmp98 = add i8 %tmp9596, -4; [#uses=1]
> +%tmp99 = icmp ugt i8 %tmp98, 5; [#uses=1]
> +br i1 %tmp99, label %bb102, label %bb106
> +
> +bb102:; preds = %bb82
> +ret i32 0
> +
> +bb106:; preds = %bb82
> +ret i32 0
> +
> +bb146.split:; preds = %bb76
> +%tmp149 = icmp eq i8 %tmp2930, %tmp3940; [#uses=1]
> +br i1 %tmp149, label %bb153, label %UnifiedReturnBlock
> +
> +bb153:; preds = %bb146.split
> +switch i32 %tmp29, label %UnifiedReturnBlock [
> + i32 0, label %bb155
> + i32 1, label %bb187
> +]
> +
> +bb155:; preds = %bb153
> +ret i32 0
> +
> +bb187:; preds = %bb153
> +%tmp198 = icmp eq %struct.tree_node* %t1, %t2;
> [#uses=1]
> +br i1 %tmp198, label %bb201, label %UnifiedReturnBlock
> +
> +bb201:; preds = %bb187
> +ret i32 0
> +
> +UnifiedReturnBlock:; preds = %bb187, %bb153, %bb146.split, %
> entry
> +ret i32 0
> +}
>
>
> _
[llvm-commits] [llvm] r44154 - /llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
Author: void
Date: Wed Nov 14 20:06:30 2007
New Revision: 44154
URL: http://llvm.org/viewvc/llvm-project?rev=44154&view=rev
Log:
Adding debug output during coalescing.
Modified:
llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=44154&r1=44153&r2=44154&view=diff
==
--- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Wed Nov 14 20:06:30 2007
@@ -233,6 +233,7 @@
// Try to coalesce.
if (!li_->conflictsWithPhysRegDef(cur, *vrm_, SrcReg)) {
+DOUT << "Coalescing: " << cur << " -> " << mri_->getName(SrcReg) << '\n';
vrm_->clearVirt(cur.reg);
vrm_->assignVirt2Phys(cur.reg, SrcReg);
++NumCoalesce;
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[llvm-commits] [llvm] r44153 - /llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
Author: void Date: Wed Nov 14 18:40:48 2007 New Revision: 44153 URL: http://llvm.org/viewvc/llvm-project?rev=44153&view=rev Log: Need to increment the iterator. Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=44153&r1=44152&r2=44153&view=diff == --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Wed Nov 14 18:40:48 2007 @@ -342,7 +342,7 @@ // expire any remaining inactive intervals DEBUG(for (IntervalPtrs::reverse_iterator - i = inactive_.rbegin(); i != inactive_.rend(); ) + i = inactive_.rbegin(); i != inactive_.rend(); ++i) DOUT << "\tinterval " << *i->first << " expired\n"); inactive_.clear(); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.0] r44151 - /llvm-gcc-4.0/tags/Apple/llvmgcc40-2002/
Author: void Date: Wed Nov 14 18:02:19 2007 New Revision: 44151 URL: http://llvm.org/viewvc/llvm-project?rev=44151&view=rev Log: Creating llvmgcc40-20002 Added: llvm-gcc-4.0/tags/Apple/llvmgcc40-2002/ - copied from r44150, llvm-gcc-4.0/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44150 - /llvm/tags/Apple/llvmCore-2001/
Author: void Date: Wed Nov 14 18:00:53 2007 New Revision: 44150 URL: http://llvm.org/viewvc/llvm-project?rev=44150&view=rev Log: Creating llvmCore-2001 tag Added: llvm/tags/Apple/llvmCore-2001/ - copied from r44148, llvm/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] RFC: Back Port of Duncan's Patch
On Nov 14, 2007, at 1:03 AM, Duncan Sands wrote:
Hi Bill,
Attached is a back port of Duncan's patch r43907
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-
Mon-20071105/055332.html
I would like people to review this and test it to make sure that it
doesn't fail.
it is nowhere near compiling. Try it and you will see what I mean!
Also, you forgot to fix up TargetIntrinsicLower in llvm-rs6000.cpp
(a mistake in the original patch).
Fixed. Please let me know.
-bw
Index: gcc/llvm-convert.cpp
===
--- gcc/llvm-convert.cpp(revision 44098)
+++ gcc/llvm-convert.cpp(working copy)
@@ -35,6 +35,7 @@
#include "llvm/Instructions.h"
#include "llvm/Module.h"
#include "llvm/Analysis/ConstantFolding.h"
+#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
@@ -758,7 +759,7 @@
}
-Value *TreeToLLVM::Emit(tree exp, Value *DestLoc) {
+Value *TreeToLLVM::Emit(tree exp, const MemRef *DestLoc) {
assert((isAggregateTreeType(TREE_TYPE(exp)) == (DestLoc != 0) ||
TREE_CODE(exp) == MODIFY_EXPR) &&
"Didn't pass DestLoc to an aggregate expr, or passed it to scalar!");
@@ -1108,6 +1109,15 @@
return new AllocaInst(Ty, 0, "memtmp", AllocaInsertionPoint);
}
+/// CreateTempLoc - Like CreateTemporary, but returns a MemRef.
+MemRef TreeToLLVM::CreateTempLoc(const Type *Ty) {
+ AllocaInst *AI = CreateTemporary(Ty);
+ // MemRefs do not allow alignment 0.
+ if (!AI->getAlignment())
+AI->setAlignment(TD.getPrefTypeAlignment(Ty));
+ return MemRef(AI, AI->getAlignment(), false);
+}
+
/// EmitBlock - Add the specified basic block to the end of the function. If
/// the previous block falls through into it, add an explicit branch. Also,
/// manage fixups for EH info.
@@ -1147,42 +1157,46 @@
/// CopyAggregate - Recursively traverse the potientially aggregate src/dest
/// ptrs, copying all of the elements.
-static void CopyAggregate(Value *DestPtr, Value *SrcPtr,
- bool isDstVolatile, bool isSrcVolatile,
- unsigned Alignment, LLVMBuilder &Builder) {
- assert(DestPtr->getType() == SrcPtr->getType() &&
+static void CopyAggregate(MemRef DestLoc, MemRef SrcLoc, LLVMBuilder &Builder)
{
+ assert(DestLoc.Ptr->getType() == SrcLoc.Ptr->getType() &&
"Cannot copy between two pointers of different type!");
- const Type *ElTy = cast(DestPtr->getType())->getElementType();
+ const Type *ElTy =
+cast(DestLoc.Ptr->getType())->getElementType();
- unsigned TypeAlign = getTargetData().getABITypeAlignment(ElTy);
- Alignment = MIN(Alignment, TypeAlign);
+ unsigned Alignment = std::min(DestLoc.Alignment, SrcLoc.Alignment);
if (ElTy->isFirstClassType()) {
-LoadInst *V = Builder.CreateLoad(SrcPtr, isSrcVolatile, "tmp");
-StoreInst *S = Builder.CreateStore(V, DestPtr, isDstVolatile);
+LoadInst *V = Builder.CreateLoad(SrcLoc.Ptr, SrcLoc.Volatile, "tmp");
+StoreInst *S = Builder.CreateStore(V, DestLoc.Ptr, DestLoc.Volatile);
V->setAlignment(Alignment);
S->setAlignment(Alignment);
} else if (const StructType *STy = dyn_cast(ElTy)) {
+const StructLayout *SL = getTargetData().getStructLayout(STy);
Constant *Zero = ConstantInt::get(Type::Int32Ty, 0);
for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) {
if (isPaddingElement(STy, i))
continue;
Constant *Idx = ConstantInt::get(Type::Int32Ty, i);
Value *Idxs[2] = { Zero, Idx };
- Value *DElPtr = Builder.CreateGEP(DestPtr, Idxs, Idxs + 2, "tmp");
- Value *SElPtr = Builder.CreateGEP(SrcPtr, Idxs, Idxs + 2, "tmp");
- CopyAggregate(DElPtr, SElPtr, isDstVolatile, isSrcVolatile, Alignment,
+ Value *DElPtr = Builder.CreateGEP(DestLoc.Ptr, Idxs, Idxs + 2, "tmp");
+ Value *SElPtr = Builder.CreateGEP(SrcLoc.Ptr, Idxs, Idxs + 2, "tmp");
+ unsigned Align = MinAlign(Alignment, SL->getElementOffset(i));
+ CopyAggregate(MemRef(DElPtr, Align, DestLoc.Volatile),
+MemRef(SElPtr, Align, SrcLoc.Volatile),
Builder);
}
} else {
const ArrayType *ATy = cast(ElTy);
Constant *Zero = ConstantInt::get(Type::Int32Ty, 0);
+unsigned EltSize = getTargetData().getABITypeSize(ATy->getElementType());
for (unsigned i = 0, e = ATy->getNumElements(); i != e; ++i) {
Constant *Idx = ConstantInt::get(Type::Int32Ty, i);
Value *Idxs[2] = { Zero, Idx };
- Value *DElPtr = Builder.CreateGEP(DestPtr, Idxs, Idxs + 2, "tmp");
- Value *SElPtr = Builder.CreateGEP(SrcPtr, Idxs, I
Re: [llvm-commits] RFC: Back Port of Duncan's Patch
On Nov 14, 2007, at 1:03 AM, Duncan Sands wrote: > Hi Bill, > >> Attached is a back port of Duncan's patch r43907 >> >> http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of- >> Mon-20071105/055332.html >> >> I would like people to review this and test it to make sure that it >> doesn't fail. > > it is nowhere near compiling. Try it and you will see what I mean! > Also, you forgot to fix up TargetIntrinsicLower in llvm-rs6000.cpp > (a mistake in the original patch). > *hits head* I was compiling the wrong tree. :-( ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44103 - in /llvm/trunk/test/CFrontend: 2007-11-07-CopyAggregateAlign.c 2007-11-07-ZeroAggregateAlign.c
Hi Duncan,
I just sent out an RFC for this back port. Could you take a look at
it to see if it works for you?
Thanks!
-bw
On Nov 13, 2007, at 11:42 PM, Duncan Sands wrote:
> Author: baldrick
> Date: Wed Nov 14 01:42:50 2007
> New Revision: 44103
>
> URL: http://llvm.org/viewvc/llvm-project?rev=44103&view=rev
> Log:
> XFAIL these tests until the fix gets backported
> from llvm-gcc-4.2 to 4.0.
>
> Modified:
> llvm/trunk/test/CFrontend/2007-11-07-CopyAggregateAlign.c
> llvm/trunk/test/CFrontend/2007-11-07-ZeroAggregateAlign.c
>
> Modified: llvm/trunk/test/CFrontend/2007-11-07-CopyAggregateAlign.c
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/
> 2007-11-07-CopyAggregateAlign.c?rev=44103&r1=44102&r2=44103&view=diff
>
> ==
>
> --- llvm/trunk/test/CFrontend/2007-11-07-CopyAggregateAlign.c
> (original)
> +++ llvm/trunk/test/CFrontend/2007-11-07-CopyAggregateAlign.c Wed
> Nov 14 01:42:50 2007
> @@ -1,3 +1,4 @@
> // RUN: %llvmgcc -S %s -o - | grep "align 2" | count 6
> +// XFAIL: *
> struct A { char s, t, u, v; short a; };
> void q() { struct A a, b; a = b; }
>
> Modified: llvm/trunk/test/CFrontend/2007-11-07-ZeroAggregateAlign.c
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/
> 2007-11-07-ZeroAggregateAlign.c?rev=44103&r1=44102&r2=44103&view=diff
>
> ==
>
> --- llvm/trunk/test/CFrontend/2007-11-07-ZeroAggregateAlign.c
> (original)
> +++ llvm/trunk/test/CFrontend/2007-11-07-ZeroAggregateAlign.c Wed
> Nov 14 01:42:50 2007
> @@ -1,3 +1,4 @@
> // RUN: %llvmgcc -S %s -o - | grep "align 2"
> +// XFAIL: *
> struct A { short s; short t; int i; };
> void q() { struct A a = {0}; }
>
>
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[llvm-commits] RFC: Back Port of Duncan's Patch
Hi,
Attached is a back port of Duncan's patch r43907
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-
Mon-20071105/055332.html
I would like people to review this and test it to make sure that it
doesn't fail.
-bw
Index: gcc/llvm-convert.cpp
===
--- gcc/llvm-convert.cpp(revision 44098)
+++ gcc/llvm-convert.cpp(working copy)
@@ -35,6 +35,7 @@
#include "llvm/Instructions.h"
#include "llvm/Module.h"
#include "llvm/Analysis/ConstantFolding.h"
+#include "llvm/Support/Alignment.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
@@ -758,7 +759,7 @@
}
-Value *TreeToLLVM::Emit(tree exp, Value *DestLoc) {
+Value *TreeToLLVM::Emit(tree exp, const MemRef *DestLoc) {
assert((isAggregateTreeType(TREE_TYPE(exp)) == (DestLoc != 0) ||
TREE_CODE(exp) == MODIFY_EXPR) &&
"Didn't pass DestLoc to an aggregate expr, or passed it to scalar!");
@@ -1108,6 +1109,15 @@
return new AllocaInst(Ty, 0, "memtmp", AllocaInsertionPoint);
}
+/// CreateTempLoc - Like CreateTemporary, but returns a MemRef.
+MemRef TreeToLLVM::CreateTempLoc(const Type *Ty) {
+ AllocaInst *AI = CreateTemporary(Ty);
+ // MemRefs do not allow alignment 0.
+ if (!AI->getAlignment())
+AI->setAlignment(TD.getPrefTypeAlignment(Ty));
+ return MemRef(AI, AI->getAlignment(), false);
+}
+
/// EmitBlock - Add the specified basic block to the end of the function. If
/// the previous block falls through into it, add an explicit branch. Also,
/// manage fixups for EH info.
@@ -1147,42 +1157,47 @@
/// CopyAggregate - Recursively traverse the potientially aggregate src/dest
/// ptrs, copying all of the elements.
-static void CopyAggregate(Value *DestPtr, Value *SrcPtr,
+static void CopyAggregate(MemRef DestLoc, MemRef SrcLoc,
bool isDstVolatile, bool isSrcVolatile,
unsigned Alignment, LLVMBuilder &Builder) {
- assert(DestPtr->getType() == SrcPtr->getType() &&
+ assert(DestLoc->getType() == SrcLoc->getType() &&
"Cannot copy between two pointers of different type!");
- const Type *ElTy = cast(DestPtr->getType())->getElementType();
+ const Type *ElTy = cast(DestLoc->getType())->getElementType();
- unsigned TypeAlign = getTargetData().getABITypeAlignment(ElTy);
- Alignment = MIN(Alignment, TypeAlign);
+ unsigned Alignment = std::min(DestLoc.Alignment, SrcLoc.Alignment);
if (ElTy->isFirstClassType()) {
-LoadInst *V = Builder.CreateLoad(SrcPtr, isSrcVolatile, "tmp");
-StoreInst *S = Builder.CreateStore(V, DestPtr, isDstVolatile);
+LoadInst *V = Builder.CreateLoad(SrcLoc.Ptr, SrcLoc.Volatile, "tmp");
+StoreInst *S = Builder.CreateStore(V, DestLoc.Ptr, DestLoc.Volatile);
V->setAlignment(Alignment);
S->setAlignment(Alignment);
} else if (const StructType *STy = dyn_cast(ElTy)) {
+const StructLayout *SL = getTargetData().getStructLayout(STy);
Constant *Zero = ConstantInt::get(Type::Int32Ty, 0);
for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) {
if (isPaddingElement(STy, i))
continue;
Constant *Idx = ConstantInt::get(Type::Int32Ty, i);
Value *Idxs[2] = { Zero, Idx };
- Value *DElPtr = Builder.CreateGEP(DestPtr, Idxs, Idxs + 2, "tmp");
- Value *SElPtr = Builder.CreateGEP(SrcPtr, Idxs, Idxs + 2, "tmp");
- CopyAggregate(DElPtr, SElPtr, isDstVolatile, isSrcVolatile, Alignment,
+ Value *DElPtr = Builder.CreateGEP(DestLoc.Ptr, Idxs, Idxs + 2, "tmp");
+ Value *SElPtr = Builder.CreateGEP(SrcLoc.Ptr, Idxs, Idxs + 2, "tmp");
+ unsigned Align = MinAlign(Alignment, SL->getElementOffset(i));
+ CopyAggregate(MemRef(DElPtr, Align, DestLoc.Volatile),
+MemRef(SElPtr, Align, SrcLoc.Volatile),
Builder);
}
} else {
const ArrayType *ATy = cast(ElTy);
Constant *Zero = ConstantInt::get(Type::Int32Ty, 0);
+unsigned EltSize = getTargetData().getABITypeSize(ATy->getElementType());
for (unsigned i = 0, e = ATy->getNumElements(); i != e; ++i) {
Constant *Idx = ConstantInt::get(Type::Int32Ty, i);
Value *Idxs[2] = { Zero, Idx };
- Value *DElPtr = Builder.CreateGEP(DestPtr, Idxs, Idxs + 2, "tmp");
- Value *SElPtr = Builder.CreateGEP(SrcPtr, Idxs, Idxs + 2, "tmp");
- CopyAggregate(DElPtr, SElPtr, isDstVolatile, isSrcVolatile, Alignment,
+ Value *DElPtr = Builder.CreateGEP(DestLoc.Ptr, Idxs, Idxs + 2, "tmp");
+ Value *SElPtr = Builder.CreateGEP(SrcLoc.Ptr, Idxs, Idxs + 2, "tmp");
+ unsigned Align = MinAlign(Alignment, i * EltSize);
+ CopyAggregate(MemRef(DElPtr, Align, DestLoc.Volatile),
+MemRef(SElPtr, Align, SrcLoc.Volatile),
Builder);
}
}
@@ -1208,12 +1223,10 @@
#define TARGET_LLVM_MIN_BYTES_COPY_BY_MEMCPY 64
#endif
-/// EmitAggregateCo
Re: [llvm-commits] make check failures
On Nov 13, 2007 4:42 PM, Chris Lattner <[EMAIL PROTECTED]> wrote: > > On Nov 13, 2007, at 3:06 PM, Duncan Sands wrote: > > > Hi Chris, > > > >>> test/CFrontend/2007-11-07-CopyAggregateAlign.c > >> > >> This still fails for me. Duncan, thoughts? Greping for align 2 > >> yields just two hits: > >> > >> %tmp14 = load i16* %tmp13, align 2 ; > >> [#uses=1] > >> store i16 %tmp14, i16* %tmp12, align 2 > >> > >> not 6. > > > > well I guess Bill hasn't back-ported the DestLoc patch from 4.2 to > > 4.0 yet. > > I can XFAIL it until he does if you like. > Doh! Thanks for reminding me! :-) -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r44086 - in /llvm-gcc-4.2/tags/Apple/llvmgcc42-2000: ./ gcc/ gcc/autom4te.cache/ gcc/config/ gcc/config/arm/ gcc/config/i386/ gcc/config/rs6000/ gcc/cp/ gcc/doc/ gcc/ginc
Author: void Date: Tue Nov 13 17:09:58 2007 New Revision: 44086 URL: http://llvm.org/viewvc/llvm-project?rev=44086&view=rev Log: Creating llvmgcc42-2000 tag Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/ - copied from r43921, llvm-gcc-4.2/trunk/ llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/GNUmakefile - copied unchanged from r44040, llvm-gcc-4.2/trunk/GNUmakefile llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/build_gcc - copied unchanged from r44071, llvm-gcc-4.2/trunk/build_gcc llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/configure - copied unchanged from r43990, llvm-gcc-4.2/trunk/configure llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/configure.in - copied unchanged from r43990, llvm-gcc-4.2/trunk/configure.in llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/ - copied from r43925, llvm-gcc-4.2/trunk/gcc/ llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/ChangeLog - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/ChangeLog llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/ChangeLog.apple - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/ChangeLog.apple llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/ChangeLog.lno - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/ChangeLog.lno llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/Makefile.in - copied unchanged from r43992, llvm-gcc-4.2/trunk/gcc/Makefile.in llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/autom4te.cache/ - copied from r44085, llvm-gcc-4.2/trunk/gcc/autom4te.cache/ llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/bitmap.h - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/bitmap.h llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/builtins.c - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/builtins.c llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/builtins.def - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/builtins.def llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/c-common.c - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/c-common.c llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/c-common.h - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/c-common.h llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/c-decl.c - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/c-decl.c llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/c-lex.c - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/c-lex.c llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/c-opts.c - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/c-opts.c llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/c-parser.c - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/c-parser.c llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/c-tree.h - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/c-tree.h llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/c-typeck.c - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/c-typeck.c llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/c.opt - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/c.opt llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/calls.c - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/calls.c llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/cfghooks.c - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/cfghooks.c llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/common.opt - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/common.opt llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config.gcc - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/config.gcc llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config/arm/arm-protos.h - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/config/arm/arm-protos.h llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config/arm/arm.c - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/config/arm/arm.c llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config/arm/arm.h - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/config/arm/arm.h llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config/arm/arm.md - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/config/arm/arm.md llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config/arm/arm.opt - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/config/arm/arm.opt llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config/arm/ieee754-df.S - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-df.S llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config/arm/ieee754-sf.S - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-sf.S llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config/arm/lib1funcs.asm - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config/arm/predicates.md - copied unchanged from r43927, llvm-gcc-4.2/trunk/gcc/config/arm/predicates.md llvm-gcc-4.2/tags/Apple/llvmgcc42-2000/gcc/config/asm.h - copied u
[llvm-commits] [llvm-gcc-4.2] r44085 - /llvm-gcc-4.2/tags/Apple/
Author: void Date: Tue Nov 13 17:07:43 2007 New Revision: 44085 URL: http://llvm.org/viewvc/llvm-project?rev=44085&view=rev Log: New directory for tags Added: llvm-gcc-4.2/tags/Apple/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r44071 - /llvm-gcc-4.2/trunk/build_gcc
Author: void
Date: Tue Nov 13 16:03:46 2007
New Revision: 44071
URL: http://llvm.org/viewvc/llvm-project?rev=44071&view=rev
Log:
Apple way build changes
Modified:
llvm-gcc-4.2/trunk/build_gcc
Modified: llvm-gcc-4.2/trunk/build_gcc
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/build_gcc?rev=44071&r1=44070&r2=44071&view=diff
==
--- llvm-gcc-4.2/trunk/build_gcc (original)
+++ llvm-gcc-4.2/trunk/build_gcc Tue Nov 13 16:03:46 2007
@@ -6,7 +6,9 @@
# -arch arguments are different than configure arguments. We need to
# translate them.
-TRANSLATE_ARCH="sed -e s/ppc/powerpc/ -e s/i386/i686/"
+TRANSLATE_ARCH="sed -e s/ppc/powerpc/ -e s/i386/i686/ -e s/ppc64/powerpc64/"
+TRANSLATE_TARGETS="sed -e s/ppc/powerpc/ -e s/i386/i686/ -e s/x86_64// \
+ -e s/powerpc64// -e s/ppc64//"
# Build GCC the "Apple way".
# Parameters:
@@ -20,7 +22,7 @@
# compilers will generate code for. If the current machine isn't in
# the list, a compiler for it will get built anyway, but won't be
# installed.
-TARGETS=`echo $2 | $TRANSLATE_ARCH`
+TARGETS=`echo $2 | $TRANSLATE_TARGETS`
# The GNU makefile target ('bootstrap' by default).
BOOTSTRAP=${BOOTSTRAP-bootstrap}
@@ -33,7 +35,11 @@
# $RC_NONARCH_CFLAGS (and mysteriously prepends '-pipe' thereto).
# We will allow this to override the default $CFLAGS and $CXXFLAGS.
-CFLAGS="-g -O2 ${RC_NONARCH_CFLAGS/-pipe/}"
+if [ "x$LLVM_DEBUG" == "x" ]; then
+CFLAGS="-g -O2 ${RC_NONARCH_CFLAGS/-pipe/}"
+else
+CFLAGS="-g"
+fi
# This isn't a parameter; it is the architecture of the current machine.
BUILD=`arch | $TRANSLATE_ARCH`
@@ -71,6 +77,13 @@
# LLVM_BIN_DIR - This is the place where llvm-gcc/llvm-g++ symlinks get
installed.
LLVM_BIN_DIR=/Developer/usr/bin
+# LLVM_ARCHS - This tells us which architectures we'd like the libraries to be
+# build for. The default is 4-way.
+if [ "x$LLVM_ARCHS" == "x" ]; then
+LLVM_ARCHS="ppc i386 ppc64 x86_64"
+fi
+
+# LLVM LOCAL end
# The current working directory is where the build will happen.
# It may already contain a partial result of an interrupted build,
@@ -109,18 +122,26 @@
mkdir $SRC_DIR || exit 1
ln -s $ORIG_SRC_DIR/* $SRC_DIR/ || exit 1
rm -rf $SRC_DIR/tcl $SRC_DIR/expect $SRC_DIR/dejagnu || exit 1
+
# Also remove libstdc++ since it is built from a separate project.
rm -rf $SRC_DIR/libstdc++-v3 || exit 1
# Clean out old specs files
rm -f /usr/lib/gcc/*/4.0.0/specs
# These are the configure and build flags that are used.
-CONFIGFLAGS="--disable-checking -enable-werror \
+
+if [ "x$LLVM_DEBUG" == "x" ]; then
+CHECKING_FLAGS="--disable-checking --enable-werror"
+else
+CHECKING_FLAGS="--enable-checking"
+fi
+
+CONFIGFLAGS="$CHECKING_FLAGS \
--prefix=$DEST_ROOT \
--mandir=\${prefix}/share/man \
--enable-languages=c,objc,c++,obj-c++ \
--program-prefix=llvm- \
- --program-suffix=-$MAJ_VERS \
+ --program-transform-name=/^[cg][^.-]*$/s/$/-$MAJ_VERS/ \
--with-gxx-include-dir=/usr/include/c++/$LIBSTDCXX_VERSION \
--with-slibdir=/usr/lib \
--build=$BUILD-apple-darwin$DARWIN_VERS"
@@ -129,6 +150,7 @@
if [ "$ENABLE_LLVM" == true ]; then
CONFIGFLAGS="$CONFIGFLAGS --enable-llvm=/usr/local"
fi
+# LLVM LOCAL end
# Figure out how many make processes to run.
SYSCTL=`sysctl -n hw.activecpu`
@@ -176,7 +198,7 @@
# Add the compiler we just built to the path, giving it appropriate names.
# LLVM LOCAL Support for non /usr $DEST_ROOT
D=$DIR/dst-$BUILD-$BUILD$DEST_ROOT/bin
-ln -f $D/gcc-$MAJ_VERS $D/gcc || exit 1
+ln -f $D/llvm-gcc $D/gcc || exit 1
ln -f $D/gcc $D/$BUILD-apple-darwin$DARWIN_VERS-gcc || exit 1
# LLVM LOCAL Support for non /usr $DEST_ROOT
PATH=$DIR/dst-$BUILD-$BUILD$DEST_ROOT/bin:$PATH
@@ -206,8 +228,17 @@
done
PATH=$DIR/bin:$PATH
+# Determine which cross-compilers we should build. If our build architecture
is
+# one of our hosts, add all of the targets to the list.
+if echo $HOSTS | grep $BUILD
+then
+ CROSS_TARGETS=`echo $TARGETS $HOSTS | tr ' ' '\n' | sort -u`
+else
+ CROSS_TARGETS="$HOSTS"
+fi
+
# Build the cross-compilers, using the compiler we just built.
-for t in $TARGETS ; do
+for t in $CROSS_TARGETS ; do
if [ $t != $BUILD ] ; then
mkdir -p $DIR/obj-$BUILD-$t $DIR/dst-$BUILD-$t || exit 1
cd $DIR/obj-$BUILD-$t || exit 1
@@ -220,16 +251,16 @@
make $MAKEFLAGS DESTDIR=$DIR/dst-$BUILD-$t install-gcc install-target \
CFLAGS="$CFLAGS" CXXFLAGS="$CFLAGS" || exit 1
-# Add the compiler we just built to the path.
-# LLVM LOCAL Support for non /usr $DEST_ROOT
+ # Add the compiler we just built to the path.
+ # LLVM LOCAL Support for non /usr $DEST_ROOT
PATH=$DIR/dst-$BUILD-$t/$DEST_ROOT/bin:$PATH
fi
done
# Rearrange various libraries, for no really good reason.
-for t in $TARGETS ; do
+for t in $CROSS_TARGETS ; do
DT=$DIR/dst-$BUILD-$t
-# LLVM LOCAL begin Support for non /usr $DEST_ROOT
+ # LLVM LOCAL begin Support for non /u
[llvm-commits] [llvm-gcc-4.0] r44046 - /llvm-gcc-4.0/tags/Apple/llvmgcc40-2001/
Author: void Date: Tue Nov 13 03:32:52 2007 New Revision: 44046 URL: http://llvm.org/viewvc/llvm-project?rev=44046&view=rev Log: Creating llvmgcc40-2001 Branch Added: llvm-gcc-4.0/tags/Apple/llvmgcc40-2001/ - copied from r44043, llvm-gcc-4.0/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44045 - in /llvm/trunk/lib/Target: ARM/ARMInstrInfo.td Alpha/AlphaInstrInfo.td Mips/MipsInstrInfo.td PowerPC/PPCInstrInfo.td Sparc/SparcInstrInfo.td TargetSelectionDAG.td X86/X8
Author: void
Date: Tue Nov 13 03:19:02 2007
New Revision: 44045
URL: http://llvm.org/viewvc/llvm-project?rev=44045&view=rev
Log:
Unifacalize the CALLSEQ{START,END} stuff.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td
llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td
llvm/trunk/lib/Target/TargetSelectionDAG.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=44045&r1=44044&r2=44045&view=diff
==
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Nov 13 03:19:02 2007
@@ -17,9 +17,8 @@
//
// Type profiles.
-def SDT_ARMCallSeq_start : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>;
-def SDT_ARMCallSeq_end : SDTypeProfile<0, 2, [ SDTCisVT<0, i32>,
- SDTCisVT<1, i32> ]>;
+def SDT_ARMCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>;
+def SDT_ARMCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>;
def SDT_ARMSaveCallPC : SDTypeProfile<0, 1, []>;
@@ -47,9 +46,9 @@
def ARMWrapper : SDNode<"ARMISD::Wrapper", SDTIntUnaryOp>;
def ARMWrapperJT : SDNode<"ARMISD::WrapperJT", SDTIntBinOp>;
-def ARMcallseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeq_start,
+def ARMcallseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeqStart,
[SDNPHasChain, SDNPOutFlag]>;
-def ARMcallseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeq_end,
+def ARMcallseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeqEnd,
[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
def ARMcall : SDNode<"ARMISD::CALL", SDT_ARMcall,
Modified: llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td?rev=44045&r1=44044&r2=44045&view=diff
==
--- llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td Tue Nov 13 03:19:02 2007
@@ -30,13 +30,13 @@
[SDNPHasChain, SDNPOptInFlag]>;
// These are target-independent nodes, but have target-specific formats.
-def SDT_AlphaCallSeq_start : SDTypeProfile<0, 1, [ SDTCisVT<0, i64> ]>;
-def SDT_AlphaCallSeq_end : SDTypeProfile<0, 2, [ SDTCisVT<0, i64>,
- SDTCisVT<1, i64> ]>;
+def SDT_AlphaCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i64> ]>;
+def SDT_AlphaCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i64>,
+ SDTCisVT<1, i64> ]>;
-def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_AlphaCallSeq_start,
+def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_AlphaCallSeqStart,
[SDNPHasChain, SDNPOutFlag]>;
-def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_AlphaCallSeq_end,
+def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_AlphaCallSeqEnd,
[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
//
Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=44045&r1=44044&r2=44045&view=diff
==
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Tue Nov 13 03:19:02 2007
@@ -34,13 +34,13 @@
SDNPOptInFlag]>;
// These are target-independent nodes, but have target-specific formats.
-def SDT_MipsCallSeq_start : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
-def SDT_MipsCallSeq_end : SDTypeProfile<0, 2, [SDTCisVT<0, i32>,
- SDTCisVT<1, i32>]>;
+def SDT_MipsCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>]>;
+def SDT_MipsCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>,
+ SDTCisVT<1, i32>]>;
-def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_MipsCallSeq_start,
+def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_MipsCallSeqStart,
[SDNPHasChain, SDNPOutFlag]>;
-def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_MipsCallSeq_end,
+def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_MipsCallSeqEnd,
[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
//===--===//
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInf
Re: [llvm-commits] [llvm] r44037 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sp
On Nov 12, 2007, at 7:20 PM, Evan Cheng wrote: > Can you use prcontext? There are several examples in the current test > suite. > I think the test would be very fragile. -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44037 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sp
On Nov 12, 2007, at 5:45 PM, Dale Johannesen wrote: > > On Nov 12, 2007, at 5:35 PM, Bill Wendling wrote: > >> On Nov 12, 2007 5:23 PM, Evan Cheng <[EMAIL PROTECTED]> wrote: >> >>> Also, where are the test case(s)? :-) >>> >> I knew someone would ask that. :-) >> >> It's hard to come up with a testcase because I need to check multiple >> lines of output to make sure that the stack pointer isn't modified >> while a call is taking place. Does anyone know how to do this? > > dejagnu is traditionally deficient here (it's hard to test for > scheduler bugs, too). > You might do something with grep -n, which prints line numbers, but > that's fragile > and I don't know how portable it is. > A grep with line numbers was a way I could think to do this also. I might be able to hack together a script to check that the stack pointer isn't modified during a function call...it would be a bit tricky to get correct, though. Maybe I could add something to llvm- test that would run successfully only when compiled correctly? -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
