[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.76 -> 1.77 --- Log message: Print predicate of the second instruction of the two-piece constant MI. --- Diffs of the changes: (+3 -1) ARMAsmPrinter.cpp |4 +++- 1 files changed, 3 insertions(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.76 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.77 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.76 Tue Jun 5 02:36:38 2007 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Jun 5 13:55:18 2007 @@ -361,7 +361,9 @@ unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImmedValue()); unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImmedValue()); printSOImm(O, ARM_AM::getSOImmVal(V1), TAI); - O << "\n\torr "; + O << "\n\torr"; + printPredicateOperand(MI, 2); + O << " "; printOperand(MI, 0); O << ", "; printOperand(MI, 0); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.75 -> 1.76
---
Log message:
PIC label asm printing cosmetic changes.
---
Diffs of the changes: (+9 -0)
ARMAsmPrinter.cpp |9 +
1 files changed, 9 insertions(+)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.75
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.76
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.75 Thu May 31 13:57:45 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Jun 5 02:36:38 2007
@@ -753,6 +753,15 @@
switch (Opc) {
case ARM::PICADD:
case ARM::PICLD:
+case ARM::PICLDZH:
+case ARM::PICLDZB:
+case ARM::PICLDH:
+case ARM::PICLDB:
+case ARM::PICLDSH:
+case ARM::PICLDSB:
+case ARM::PICSTR:
+case ARM::PICSTRH:
+case ARM::PICSTRB:
case ARM::tPICADD:
break;
default:
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.74 -> 1.75
---
Log message:
Fix the asmprinter so that a globalvalue can specify an explicit alignment
smaller than the preferred alignment, but so that the target can actually
specify a minimum alignment if needed. This fixes some objc protocol
failures Devang tracked down.
---
Diffs of the changes: (+1 -1)
ARMAsmPrinter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.74
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.75
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.74 Mon May 14 20:29:07 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu May 31 13:57:45 2007
@@ -218,7 +218,7 @@
O << VisibilityDirective << CurrentFnName << "\n";
if (AFI->isThumbFunction()) {
-EmitAlignment(AFI->getAlign(), F);
+EmitAlignment(1, F, AFI->getAlign());
O << "\t.code\t16\n";
O << "\t.thumb_func";
if (Subtarget->isTargetDarwin())
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMInstrInfo.td ARMInstrThumb.td ARMInstrVFP.td
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.72 -> 1.73
ARMInstrInfo.td updated: 1.99 -> 1.100
ARMInstrThumb.td updated: 1.25 -> 1.26
ARMInstrVFP.td updated: 1.4 -> 1.5
---
Log message:
Switch BCC, MOVCCr, etc. to PredicateOperand.
---
Diffs of the changes: (+22 -17)
ARMAsmPrinter.cpp |4 ++--
ARMInstrInfo.td | 23 ++-
ARMInstrThumb.td |4 ++--
ARMInstrVFP.td|8
4 files changed, 22 insertions(+), 17 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.72
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.73
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.72 Thu May 3 18:30:36 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue May 8 16:08:43 2007
@@ -101,7 +101,7 @@
void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
-void printCCOperand(const MachineInstr *MI, int opNum);
+void printPredicateOperand(const MachineInstr *MI, int opNum);
void printPCLabel(const MachineInstr *MI, int opNum);
void printRegisterList(const MachineInstr *MI, int opNum);
void printCPInstOperand(const MachineInstr *MI, int opNum,
@@ -613,7 +613,7 @@
O << "]";
}
-void ARMAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum) {
+void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) {
int CC = (int)MI->getOperand(opNum).getImmedValue();
O << ARMCondCodeToString((ARMCC::CondCodes)CC);
}
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.99
llvm/lib/Target/ARM/ARMInstrInfo.td:1.100
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.99Fri Apr 27 19:36:37 2007
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Tue May 8 16:08:43 2007
@@ -162,11 +162,6 @@
// Branch target.
def brtarget : Operand;
-// Operand for printing out a condition code.
-def CCOp : Operand {
- let PrintMethod = "printCCOperand";
-}
-
// A list of registers separated by comma. Used by load/store multiple.
def reglist : Operand {
let PrintMethod = "printRegisterList";
@@ -282,6 +277,16 @@
let MIOperandInfo = (ops GPR, i32imm);
}
+// ARM branch / cmov condition code operand.
+def ccop : PredicateOperand {
+ let PrintMethod = "printPredicateOperand";
+}
+
+// ARM Predicate operand. Default to 14 = always (AL).
+def pred : PredicateOperand {
+ let PrintMethod = "printPredicateOperand";
+}
+
//===--===//
// ARM Instruction flags. These need to match ARMInstrInfo.h.
//
@@ -579,7 +584,7 @@
}
let isBranch = 1, isTerminator = 1, noResults = 1, isBarrier = 1 in
- def Bcc : AI<(ops brtarget:$dst, CCOp:$cc), "b$cc $dst",
+ def Bcc : AI<(ops brtarget:$dst, ccop:$cc), "b$cc $dst",
[(ARMbrcond bb:$dst, imm:$cc)]>;
//===--===//
@@ -1041,17 +1046,17 @@
// Conditional moves
-def MOVCCr : AI<(ops GPR:$dst, GPR:$false, GPR:$true, CCOp:$cc),
+def MOVCCr : AI<(ops GPR:$dst, GPR:$false, GPR:$true, ccop:$cc),
"mov$cc $dst, $true",
[(set GPR:$dst, (ARMcmov GPR:$false, GPR:$true, imm:$cc))]>,
RegConstraint<"$false = $dst">;
-def MOVCCs : AI<(ops GPR:$dst, GPR:$false, so_reg:$true, CCOp:$cc),
+def MOVCCs : AI<(ops GPR:$dst, GPR:$false, so_reg:$true, ccop:$cc),
"mov$cc $dst, $true",
[(set GPR:$dst, (ARMcmov GPR:$false, so_reg:$true,imm:$cc))]>,
RegConstraint<"$false = $dst">;
-def MOVCCi : AI<(ops GPR:$dst, GPR:$false, so_imm:$true, CCOp:$cc),
+def MOVCCi : AI<(ops GPR:$dst, GPR:$false, so_imm:$true, ccop:$cc),
"mov$cc $dst, $true",
[(set GPR:$dst, (ARMcmov GPR:$false, so_imm:$true,imm:$cc))]>,
RegConstraint<"$false = $dst">;
Index: llvm/lib/Target/ARM/ARMInstrThumb.td
diff -u llvm/lib/Target/ARM/ARMInstrThumb.td:1.25
llvm/lib/Target/ARM/ARMInstrThumb.td:1.26
--- llvm/lib/Target/ARM/ARMInstrThumb.td:1.25 Tue May 1 15:27:19 2007
+++ llvm/lib/Target/ARM/ARMInstrThumb.tdTue May 8 16:08:43 2007
@@ -207,7 +207,7 @@
}
let isBranch = 1, isTerminator = 1, noResults = 1, isBarrier = 1 in
- def tBcc : TI<(ops brtarget:$dst, CCOp:$cc), "b$cc $dst",
+ def tBcc : TI<(ops brtarget:$dst, ccop:$cc), "b$cc $dst",
[(ARMbrcond bb:$dst, imm:$cc)]>;
//===--===//
@@ -503,7 +503,7 @@
// Expanded by the scheduler into a branch sequence.
let usesCustomDAGSchedInserter = 1 in // Expanded by the scheduler.
def tMOVCCr :
- PseudoInst<(ops GPR:$dst, GPR:$false, GPR:$true, CCOp:$cc),
+ PseudoInst<(ops GPR:$dst, GPR:$false, GPR:$true, ccop:$cc),
"@ tMOVCCr $cc",
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.71 -> 1.72
---
Log message:
Should never see an indexed load / store with zero offset.
---
Diffs of the changes: (+7 -5)
ARMAsmPrinter.cpp | 12 +++-
1 files changed, 7 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.71
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.72
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.71 Thu May 3 15:28:35 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu May 3 18:30:36 2007
@@ -433,10 +433,11 @@
const MachineOperand &MO2 = MI->getOperand(Op+1);
if (!MO1.getReg()) {
-if (ARM_AM::getAM2Offset(MO2.getImm())) // Don't print +0.
- O << "#"
-<< (char)ARM_AM::getAM2Op(MO2.getImm())
-<< ARM_AM::getAM2Offset(MO2.getImm());
+unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
+assert(ImmOffs && "Malformed indexed load / store!");
+O << "#"
+ << (char)ARM_AM::getAM2Op(MO2.getImm())
+ << ImmOffs;
return;
}
@@ -483,8 +484,9 @@
}
unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
+ assert(ImmOffs && "Malformed indexed load / store!");
O << "#"
- << (char)ARM_AM::getAM3Op(MO2.getImm())
+<< (char)ARM_AM::getAM3Op(MO2.getImm())
<< ImmOffs;
}
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelLowering.cpp ARMRegisterInfo.cpp ARMTargetAsmInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.70 -> 1.71
ARMISelLowering.cpp updated: 1.48 -> 1.49
ARMRegisterInfo.cpp updated: 1.92 -> 1.93
ARMTargetAsmInfo.cpp updated: 1.19 -> 1.20
---
Log message:
Debug support for arm-linux.
Patch by Raul Herbster.
---
Diffs of the changes: (+32 -18)
ARMAsmPrinter.cpp| 25 ++---
ARMISelLowering.cpp |3 ---
ARMRegisterInfo.cpp |5 +
ARMTargetAsmInfo.cpp | 17 +
4 files changed, 32 insertions(+), 18 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.70
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.71
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.70 Thu May 3 11:42:23 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu May 3 15:28:35 2007
@@ -175,9 +175,7 @@
bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
AFI = MF.getInfo();
- if (Subtarget->isTargetDarwin()) {
-DW.SetModuleInfo(&getAnalysis());
- }
+ DW.SetModuleInfo(&getAnalysis());
SetupMachineFunction(MF);
O << "\n";
@@ -231,10 +229,8 @@
EmitAlignment(2, F);
O << CurrentFnName << ":\n";
- if (Subtarget->isTargetDarwin()) {
-// Emit pre-function debug information.
-DW.BeginFunction(&MF);
- }
+ // Emit pre-function debug information.
+ DW.BeginFunction(&MF);
// Print out code for the function.
for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
@@ -254,10 +250,8 @@
if (TAI->hasDotTypeDotSizeDirective())
O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
- if (Subtarget->isTargetDarwin()) {
-// Emit post-function debug information.
-DW.EndFunction();
- }
+ // Emit post-function debug information.
+ DW.EndFunction();
return false;
}
@@ -769,10 +763,8 @@
}
bool ARMAsmPrinter::doInitialization(Module &M) {
- if (Subtarget->isTargetDarwin()) {
-// Emit initial debug information.
-DW.BeginModule(&M);
- }
+ // Emit initial debug information.
+ DW.BeginModule(&M);
return AsmPrinter::doInitialization(M);
}
@@ -998,6 +990,9 @@
// linker can safely perform dead code stripping. Since LLVM never
// generates code that does this, it is always safe to set.
O << "\t.subsections_via_symbols\n";
+ } else {
+// Emit final debug information for ELF.
+DW.EndModule();
}
AsmPrinter::doFinalization(M);
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.48
llvm/lib/Target/ARM/ARMISelLowering.cpp:1.49
--- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.48Wed May 2 21:00:18 2007
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp Thu May 3 15:28:35 2007
@@ -178,9 +178,6 @@
// Support label based line numbers.
setOperationAction(ISD::LOCATION, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
- // FIXME - use subtarget debug flags
- if (!Subtarget->isTargetDarwin())
-setOperationAction(ISD::LABEL, MVT::Other, Expand);
setOperationAction(ISD::RET, MVT::Other, Custom);
setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.92
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.93
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.92Tue May 1 04:13:03 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Thu May 3 15:28:35 2007
@@ -1373,6 +1373,11 @@
emitSPUpdate(MBB, MBBI, -NumBytes, isThumb, TII);
}
+ if(STI.isTargetELF() && hasFP(MF)) {
+MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() -
+ AFI->getFramePtrSpillOffset());
+ }
+
AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp
diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.19
llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.20
--- llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.19 Tue May 1 20:02:40 2007
+++ llvm/lib/Target/ARM/ARMTargetAsmInfo.cppThu May 3 15:28:35 2007
@@ -63,8 +63,25 @@
DwarfRangesSection = ".section __DWARF,__debug_ranges,regular,debug";
DwarfMacInfoSection = ".section __DWARF,__debug_macinfo,regular,debug";
} else {
+NeedsSet = false;
+HasLEB128 = true;
+AbsoluteDebugSectionOffsets = true;
+ReadOnlySection = "\t.section\t.rodata\n";
PrivateGlobalPrefix = ".L";
WeakRefDirective = "\t.weak\t";
+DwarfRequiresFrameSection = false;
+DwarfAbbrevSection = "\t.section\t.debug_abbrev,\"\",%progbits";
+DwarfInfoSection ="\t.section\t.debug_info,\"\",%progbits";
+DwarfLineSection ="\t.section\t.debug_line,\"\",%progbits";
+DwarfFrameSection = "\t.section\t.debug_frame,\"\",%progbits";
+DwarfPubNamesSection ="\t.section\t.debug_pubnames,\"\",%progbits";
+DwarfPubTypesSection ="\t.section
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.69 -> 1.70 --- Log message: add support for printing offset from global --- Diffs of the changes: (+6 -0) ARMAsmPrinter.cpp |6 ++ 1 files changed, 6 insertions(+) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.69 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.70 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.69 Sun Apr 29 19:23:51 2007 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu May 3 11:42:23 2007 @@ -294,6 +294,12 @@ FnStubs.insert(Name); } else O << Name; + +if (MO.getOffset() > 0) + O << '+' << MO.getOffset(); +else if (MO.getOffset() < 0) + O << MO.getOffset(); + if (isCallOp && Subtarget->isTargetELF() && TM.getRelocationModel() == Reloc::PIC_) O << "(PLT)"; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMTargetAsmInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.68 -> 1.69
ARMTargetAsmInfo.cpp updated: 1.16 -> 1.17
---
Log message:
Enable protected visibility on ARM.
---
Diffs of the changes: (+16 -4)
ARMAsmPrinter.cpp| 19 +++
ARMTargetAsmInfo.cpp |1 +
2 files changed, 16 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.68
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.69
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.68 Fri Apr 27 08:54:47 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Sun Apr 29 19:23:51 2007
@@ -210,9 +210,14 @@
break;
}
+ const char *VisibilityDirective = NULL;
if (F->hasHiddenVisibility())
-if (const char *Directive = TAI->getHiddenDirective())
- O << Directive << CurrentFnName << "\n";
+VisibilityDirective = TAI->getHiddenDirective();
+ else if (F->hasProtectedVisibility())
+VisibilityDirective = TAI->getProtectedDirective();
+
+ if (VisibilityDirective)
+O << VisibilityDirective << CurrentFnName << "\n";
if (AFI->isThumbFunction()) {
EmitAlignment(AFI->getAlign(), F);
@@ -791,9 +796,15 @@
unsigned Size = TD->getTypeSize(Type);
unsigned Align = TD->getPreferredAlignmentLog(I);
+const char *VisibilityDirective = NULL;
if (I->hasHiddenVisibility())
- if (const char *Directive = TAI->getHiddenDirective())
-O << Directive << name << "\n";
+ VisibilityDirective = TAI->getHiddenDirective();
+else if (I->hasProtectedVisibility())
+ VisibilityDirective = TAI->getProtectedDirective();
+
+if (VisibilityDirective)
+ O << VisibilityDirective << name << "\n";
+
if (Subtarget->isTargetELF())
O << "\t.type " << name << ",%object\n";
Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp
diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.16
llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.17
--- llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.16 Sun Apr 29 14:17:45 2007
+++ llvm/lib/Target/ARM/ARMTargetAsmInfo.cppSun Apr 29 19:23:51 2007
@@ -27,6 +27,7 @@
SetDirective = "\t.set";
WeakRefDirective = "\t.weak_reference\t";
HiddenDirective = "\t.private_extern\t";
+ProtectedDirective = NULL;
JumpTableDataSection = ".const";
CStringSection = "\t.cstring";
FourByteConstantSection = "\t.literal4\n";
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMConstantPoolValue.cpp ARMConstantPoolValue.h ARMISelLowering.cpp ARMISelLowering.h ARMInstrInfo.td ARMInstrThumb.td ARMTargetAsmInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.67 -> 1.68
ARMConstantPoolValue.cpp updated: 1.3 -> 1.4
ARMConstantPoolValue.h updated: 1.3 -> 1.4
ARMISelLowering.cpp updated: 1.46 -> 1.47
ARMISelLowering.h updated: 1.14 -> 1.15
ARMInstrInfo.td updated: 1.96 -> 1.97
ARMInstrThumb.td updated: 1.23 -> 1.24
ARMTargetAsmInfo.cpp updated: 1.14 -> 1.15
---
Log message:
ARM TLS: implement "general dynamic", "initial exec" and "local exec" models.
---
Diffs of the changes: (+157 -13)
ARMAsmPrinter.cpp| 16 ++--
ARMConstantPoolValue.cpp | 19 ++
ARMConstantPoolValue.h |8 +++-
ARMISelLowering.cpp | 89 +++
ARMISelLowering.h|9
ARMInstrInfo.td | 15 +++
ARMInstrThumb.td | 12 ++
ARMTargetAsmInfo.cpp |2 +
8 files changed, 157 insertions(+), 13 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.67
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.68
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.67 Wed Apr 25 09:50:40 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Fri Apr 27 08:54:47 2007
@@ -134,10 +134,14 @@
} else
O << Name;
if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
- if (ACPV->getPCAdjustment() != 0)
+ if (ACPV->getPCAdjustment() != 0) {
O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
<< utostr(ACPV->getLabelId())
- << "+" << (unsigned)ACPV->getPCAdjustment() << ")";
+ << "+" << (unsigned)ACPV->getPCAdjustment();
+ if (ACPV->mustAddCurrentAddress())
+ O << "-.";
+ O << ")";
+ }
O << "\n";
// If the constant pool value is a extern weak symbol, remember to emit
@@ -869,9 +873,13 @@
SwitchToDataSection(SectionName.c_str());
} else {
if (C->isNullValue() && !NoZerosInBSS && TAI->getBSSSection())
- SwitchToDataSection(TAI->getBSSSection(), I);
+ SwitchToDataSection(I->isThreadLocal() ? TAI->getTLSBSSSection() :
+ TAI->getBSSSection(), I);
else if (!I->isConstant())
- SwitchToDataSection(TAI->getDataSection(), I);
+ SwitchToDataSection(I->isThreadLocal() ? TAI->getTLSDataSection() :
+ TAI->getDataSection(), I);
+else if (I->isThreadLocal())
+ SwitchToDataSection(TAI->getTLSDataSection());
else {
// Read-only data.
bool HasReloc = C->ContainsRelocations();
Index: llvm/lib/Target/ARM/ARMConstantPoolValue.cpp
diff -u llvm/lib/Target/ARM/ARMConstantPoolValue.cpp:1.3
llvm/lib/Target/ARM/ARMConstantPoolValue.cpp:1.4
--- llvm/lib/Target/ARM/ARMConstantPoolValue.cpp:1.3Sat Apr 21 19:04:12 2007
+++ llvm/lib/Target/ARM/ARMConstantPoolValue.cppFri Apr 27 08:54:47 2007
@@ -20,18 +20,20 @@
ARMConstantPoolValue::ARMConstantPoolValue(GlobalValue *gv, unsigned id,
ARMCP::ARMCPKind k,
unsigned char PCAdj,
- const char *Modif)
+ const char *Modif,
+ bool AddCA)
: MachineConstantPoolValue((const Type*)gv->getType()),
GV(gv), S(NULL), LabelId(id), Kind(k), PCAdjust(PCAdj),
-Modifier(Modif) {}
+Modifier(Modif), AddCurrentAddress(AddCA) {}
ARMConstantPoolValue::ARMConstantPoolValue(const char *s, unsigned id,
ARMCP::ARMCPKind k,
unsigned char PCAdj,
- const char *Modif)
+ const char *Modif,
+ bool AddCA)
: MachineConstantPoolValue((const Type*)Type::Int32Ty),
GV(NULL), S(s), LabelId(id), Kind(k), PCAdjust(PCAdj),
-Modifier(Modif) {}
+Modifier(Modif), AddCurrentAddress(AddCA) {}
ARMConstantPoolValue::ARMConstantPoolValue(GlobalValue *gv,
ARMCP::ARMCPKind k,
@@ -78,6 +80,11 @@
if (isNonLazyPointer()) O << "$non_lazy_ptr";
else if (isStub()) O << "$stub";
if (Modifier) O << "(" << Modifier << ")";
- if (PCAdjust != 0) O << "-(LPIC" << LabelId << "+"
- << (unsigned)PCAdjust << ")";
+ if (PCAdjust != 0) {
+O << "-(LPIC" << LabelId << "+"
+ << (unsigned)PCAdjust;
+if (AddCurrentAddress)
+ O << "-.";
+O << ")";
+ }
}
Index: llvm/lib/Target/ARM/ARMConstantPoolValue.h
diff -u llvm/lib/Target/ARM/ARMConstantPoolValue.h:1.3
llvm/lib/Target/ARM/ARMConstantPoolValue.h:1.4
--- llvm/lib/Target/ARM/ARMConstantPoolValue.h:1.3 Sat Apr 21 19:04:12 2007
+++ llvm/lib/Target/ARM/ARMConstantPoolValue.h Fri Apr 27 08:54:47 2007
@@ -37,14 +37,17 @@
unsi
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.66 -> 1.67
---
Log message:
remember to emit weak reference in one more case.
---
Diffs of the changes: (+6 -1)
ARMAsmPrinter.cpp |7 ++-
1 files changed, 6 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.66
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.67
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.66 Mon Apr 23 15:07:25 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Apr 25 09:50:40 2007
@@ -639,8 +639,13 @@
if (MCPE.isMachineConstantPoolEntry())
EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
-else
+else {
EmitGlobalConstant(MCPE.Val.ConstVal);
+ // remember to emit the weak reference
+ if (const GlobalValue *GV = dyn_cast(MCPE.Val.ConstVal))
+if (GV->hasExternalWeakLinkage())
+ ExtWeakSymbols.insert(GV);
+}
}
}
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMConstantPoolValue.cpp ARMConstantPoolValue.h ARMISelLowering.cpp ARMISelLowering.h
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.64 -> 1.65
ARMConstantPoolValue.cpp updated: 1.2 -> 1.3
ARMConstantPoolValue.h updated: 1.2 -> 1.3
ARMISelLowering.cpp updated: 1.44 -> 1.45
ARMISelLowering.h updated: 1.13 -> 1.14
---
Log message:
Implement PIC for arm-linux.
---
Diffs of the changes: (+83 -12)
ARMAsmPrinter.cpp|8 ++-
ARMConstantPoolValue.cpp | 20 ++---
ARMConstantPoolValue.h | 10 +++-
ARMISelLowering.cpp | 53 +++
ARMISelLowering.h|4 ++-
5 files changed, 83 insertions(+), 12 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.64
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.65
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.64 Tue Apr 3 19:13:29 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Sat Apr 21 19:04:12 2007
@@ -133,6 +133,7 @@
O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
} else
O << Name;
+ if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
if (ACPV->getPCAdjustment() != 0)
O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
<< utostr(ACPV->getLabelId())
@@ -284,7 +285,9 @@
FnStubs.insert(Name);
} else
O << Name;
-
+if (isCallOp && Subtarget->isTargetELF() &&
+TM.getRelocationModel() == Reloc::PIC_)
+ O << "(PLT)";
if (GV->hasExternalWeakLinkage())
ExtWeakSymbols.insert(GV);
break;
@@ -299,6 +302,9 @@
FnStubs.insert(Name);
} else
O << Name;
+if (isCallOp && Subtarget->isTargetELF() &&
+TM.getRelocationModel() == Reloc::PIC_)
+ O << "(PLT)";
break;
}
case MachineOperand::MO_ConstantPoolIndex:
Index: llvm/lib/Target/ARM/ARMConstantPoolValue.cpp
diff -u llvm/lib/Target/ARM/ARMConstantPoolValue.cpp:1.2
llvm/lib/Target/ARM/ARMConstantPoolValue.cpp:1.3
--- llvm/lib/Target/ARM/ARMConstantPoolValue.cpp:1.2Tue Jan 30 14:37:08 2007
+++ llvm/lib/Target/ARM/ARMConstantPoolValue.cppSat Apr 21 19:04:12 2007
@@ -19,15 +19,26 @@
ARMConstantPoolValue::ARMConstantPoolValue(GlobalValue *gv, unsigned id,
ARMCP::ARMCPKind k,
- unsigned char PCAdj)
+ unsigned char PCAdj,
+ const char *Modif)
: MachineConstantPoolValue((const Type*)gv->getType()),
-GV(gv), S(NULL), LabelId(id), Kind(k), PCAdjust(PCAdj) {}
+GV(gv), S(NULL), LabelId(id), Kind(k), PCAdjust(PCAdj),
+Modifier(Modif) {}
ARMConstantPoolValue::ARMConstantPoolValue(const char *s, unsigned id,
ARMCP::ARMCPKind k,
- unsigned char PCAdj)
+ unsigned char PCAdj,
+ const char *Modif)
: MachineConstantPoolValue((const Type*)Type::Int32Ty),
-GV(NULL), S(s), LabelId(id), Kind(k), PCAdjust(PCAdj) {}
+GV(NULL), S(s), LabelId(id), Kind(k), PCAdjust(PCAdj),
+Modifier(Modif) {}
+
+ARMConstantPoolValue::ARMConstantPoolValue(GlobalValue *gv,
+ ARMCP::ARMCPKind k,
+ const char *Modif)
+ : MachineConstantPoolValue((const Type*)Type::Int32Ty),
+GV(gv), S(NULL), LabelId(0), Kind(k), PCAdjust(0),
+Modifier(Modif) {}
int ARMConstantPoolValue::getExistingMachineCPValue(MachineConstantPool *CP,
unsigned Alignment) {
@@ -66,6 +77,7 @@
O << S;
if (isNonLazyPointer()) O << "$non_lazy_ptr";
else if (isStub()) O << "$stub";
+ if (Modifier) O << "(" << Modifier << ")";
if (PCAdjust != 0) O << "-(LPIC" << LabelId << "+"
<< (unsigned)PCAdjust << ")";
}
Index: llvm/lib/Target/ARM/ARMConstantPoolValue.h
diff -u llvm/lib/Target/ARM/ARMConstantPoolValue.h:1.2
llvm/lib/Target/ARM/ARMConstantPoolValue.h:1.3
--- llvm/lib/Target/ARM/ARMConstantPoolValue.h:1.2 Tue Jan 30 14:37:08 2007
+++ llvm/lib/Target/ARM/ARMConstantPoolValue.h Sat Apr 21 19:04:12 2007
@@ -36,17 +36,23 @@
ARMCP::ARMCPKind Kind; // non_lazy_ptr or stub?
unsigned char PCAdjust; // Extra adjustment if constantpool is pc relative.
// 8 for ARM, 4 for Thumb.
+ const char *Modifier;// GV modifier i.e. (&GV(modifier)-(LPIC+8))
public:
ARMConstantPoolValue(GlobalValue *gv, unsigned id,
ARMCP::ARMCPKind Kind = ARMCP::CPValue,
- unsigned char PCAdj = 0);
+ unsigned char PCAdj = 0, const char *Modifier = NULL);
ARMConstantPoolValue(const char *s, unsigned id,
ARMCP::ARMCPKind Kind = ARMCP::CPValue,
- unsigned char PCAdj = 0
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.63 -> 1.64
---
Log message:
Implement inline asm modifier P.
---
Diffs of the changes: (+1 -0)
ARMAsmPrinter.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.63
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.64
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.63 Thu Mar 29 02:49:34 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Apr 3 19:13:29 2007
@@ -688,6 +688,7 @@
switch (ExtraCode[0]) {
default: return true; // Unknown modifier.
case 'c': // Don't print "$" before a global var name or constant.
+case 'P': // Print a VFP double precision register.
printOperand(MI, OpNo);
return false;
case 'Q':
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.62 -> 1.63
---
Log message:
Add support for hidden visibility to darwin/arm.
---
Diffs of the changes: (+4 -0)
ARMAsmPrinter.cpp |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.62
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.63
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.62 Tue Mar 20 03:11:30 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Mar 29 02:49:34 2007
@@ -205,6 +205,10 @@
break;
}
+ if (F->hasHiddenVisibility())
+if (const char *Directive = TAI->getHiddenDirective())
+ O << Directive << CurrentFnName << "\n";
+
if (AFI->isThumbFunction()) {
EmitAlignment(1, F);
O << "\t.code\t16\n";
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.61 -> 1.62
ARMInstrInfo.td updated: 1.91 -> 1.92
---
Log message:
Make two piece constant generation as a single instruction. It's
re-materialized as a load from constantpool.
---
Diffs of the changes: (+55 -30)
ARMAsmPrinter.cpp | 37 +
ARMInstrInfo.td | 48 ++--
2 files changed, 55 insertions(+), 30 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.61
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.62
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.61 Thu Mar 8 16:42:46 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Mar 20 03:11:30 2007
@@ -82,6 +82,7 @@
void printOperand(const MachineInstr *MI, int opNum,
const char *Modifier = 0);
void printSOImmOperand(const MachineInstr *MI, int opNum);
+void printSOImm2PartOperand(const MachineInstr *MI, int opNum);
void printSORegOperand(const MachineInstr *MI, int opNum);
void printAddrMode2Operand(const MachineInstr *MI, int OpNo);
void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo);
@@ -309,14 +310,10 @@
}
}
-/// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
-/// immediate in bits 0-7.
-void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
- const MachineOperand &MO = MI->getOperand(OpNum);
- assert(MO.isImmediate() && (MO.getImmedValue() < (1 << 12)) &&
- "Not a valid so_imm value!");
- unsigned Imm = ARM_AM::getSOImmValImm(MO.getImmedValue());
- unsigned Rot = ARM_AM::getSOImmValRot(MO.getImmedValue());
+static void printSOImm(std::ostream &O, int64_t V, const TargetAsmInfo *TAI) {
+ assert(V < (1 << 12) && "Not a valid so_imm value!");
+ unsigned Imm = ARM_AM::getSOImmValImm(V);
+ unsigned Rot = ARM_AM::getSOImmValRot(V);
// Print low-level immediate formation info, per
// A5.1.3: "Data-processing operands - Immediate".
@@ -329,6 +326,30 @@
}
}
+/// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
+/// immediate in bits 0-7.
+void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
+ const MachineOperand &MO = MI->getOperand(OpNum);
+ assert(MO.isImmediate() && "Not a valid so_imm value!");
+ printSOImm(O, MO.getImmedValue(), TAI);
+}
+
+/// printSOImm2PartOperand - SOImm is broken into two pieces using a mov
+/// followed by a or to materialize.
+void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
+ const MachineOperand &MO = MI->getOperand(OpNum);
+ assert(MO.isImmediate() && "Not a valid so_imm value!");
+ unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImmedValue());
+ unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImmedValue());
+ printSOImm(O, ARM_AM::getSOImmVal(V1), TAI);
+ O << "\n\torr ";
+ printOperand(MI, 0);
+ O << ", ";
+ printOperand(MI, 0);
+ O << ", ";
+ printSOImm(O, ARM_AM::getSOImmVal(V2), TAI);
+}
+
// so_reg is a 4-operand unit corresponding to register forms of the A5.1
// "Addressing Mode 1 - Data-processing operands" forms. This includes:
//REG 0 0- e.g. R5
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.91
llvm/lib/Target/ARM/ARMInstrInfo.td:1.92
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.91Mon Mar 19 02:48:02 2007
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Tue Mar 20 03:11:30 2007
@@ -147,24 +147,6 @@
}]>;
-// Break so_imm's up into two pieces. This handles immediates with up to 16
-// bits set in them. This uses so_imm2part to match and so_imm2part_[12] to
-// get the first/second pieces.
-def so_imm2part : PatLeaf<(imm), [{
- return ARM_AM::isSOImmTwoPartVal((unsigned)N->getValue());
-}]>;
-
-def so_imm2part_1 : SDNodeXFormgetValue());
- return CurDAG->getTargetConstant(ARM_AM::getSOImmVal(V), MVT::i32);
-}]>;
-
-def so_imm2part_2 : SDNodeXFormgetValue());
- return CurDAG->getTargetConstant(ARM_AM::getSOImmVal(V), MVT::i32);
-}]>;
-
-
//===--===//
// Operand Definitions.
@@ -217,6 +199,25 @@
let PrintMethod = "printSOImmOperand";
}
+// Break so_imm's up into two pieces. This handles immediates with up to 16
+// bits set in them. This uses so_imm2part to match and so_imm2part_[12] to
+// get the first/second pieces.
+def so_imm2part : Operand,
+ PatLeaf<(imm),
+ [{ return ARM_AM::isSOImmTwoPartVal((unsigned)N->getValue()); }]>
{
+ let PrintMethod = "printSOImm2PartOperand";
+}
+
+def so_imm2part_1 : SDNodeXFormgetValue());
+ return CurDAG->getTargetConstant(ARM_AM::getSOImmVal(V), MVT::i32);
+}]>;
+
+def so_imm2part_2 : SDNodeXFormgetValue());
+ return CurDAG->getTargetConstant(ARM_AM::getSOImmVal(V), MVT::i32);
+}]>;
+
// Define ARM specific addressing modes.
@@ -371,6 +372,8 @@
: I;
c
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.60 -> 1.61
---
Log message:
Implement inline asm modifier c.
---
Diffs of the changes: (+3 -0)
ARMAsmPrinter.cpp |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.60
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.61
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.60 Thu Mar 8 02:27:16 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Mar 8 16:42:46 2007
@@ -662,6 +662,9 @@
switch (ExtraCode[0]) {
default: return true; // Unknown modifier.
+case 'c': // Don't print "$" before a global var name or constant.
+ printOperand(MI, OpNo);
+ return false;
case 'Q':
if (TM.getTargetData()->isLittleEndian())
break;
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.59 -> 1.60
---
Log message:
Putting more constants which do not contain relocations into .literal{4|8|16}
---
Diffs of the changes: (+6 -5)
ARMAsmPrinter.cpp | 11 ++-
1 files changed, 6 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.59
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.60
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.59 Wed Mar 7 19:25:25 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Mar 8 02:27:16 2007
@@ -834,17 +834,18 @@
SwitchToDataSection(TAI->getDataSection(), I);
else {
// Read-only data.
- bool isIntFPLiteral = Type->isInteger() || Type->isFloatingPoint();
- if (C->ContainsRelocations() && Subtarget->isTargetDarwin() &&
+ bool HasReloc = C->ContainsRelocations();
+ if (HasReloc &&
+ Subtarget->isTargetDarwin() &&
TM.getRelocationModel() != Reloc::Static)
SwitchToDataSection("\t.const_data\n");
- else if (isIntFPLiteral && Size == 4 &&
+ else if (!HasReloc && Size == 4 &&
TAI->getFourByteConstantSection())
SwitchToDataSection(TAI->getFourByteConstantSection(), I);
- else if (isIntFPLiteral && Size == 8 &&
+ else if (!HasReloc && Size == 8 &&
TAI->getEightByteConstantSection())
SwitchToDataSection(TAI->getEightByteConstantSection(), I);
- else if (isIntFPLiteral && Size == 16 &&
+ else if (!HasReloc && Size == 16 &&
TAI->getSixteenByteConstantSection())
SwitchToDataSection(TAI->getSixteenByteConstantSection(), I);
else if (TAI->getReadOnlySection())
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMTargetAsmInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.58 -> 1.59
ARMTargetAsmInfo.cpp updated: 1.12 -> 1.13
---
Log message:
For Darwin, put constant data into .const, .const_data, .literal{4|8|16}
sections.
---
Diffs of the changes: (+26 -2)
ARMAsmPrinter.cpp| 25 +++--
ARMTargetAsmInfo.cpp |3 +++
2 files changed, 26 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.58
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.59
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.58 Thu Mar 1 00:05:39 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Mar 7 19:25:25 2007
@@ -743,7 +743,8 @@
std::string name = Mang->getValueName(I);
Constant *C = I->getInitializer();
-unsigned Size = TD->getTypeSize(C->getType());
+const Type *Type = C->getType();
+unsigned Size = TD->getTypeSize(Type);
unsigned Align = TD->getPreferredAlignmentLog(I);
if (I->hasHiddenVisibility())
@@ -829,8 +830,28 @@
} else {
if (C->isNullValue() && !NoZerosInBSS && TAI->getBSSSection())
SwitchToDataSection(TAI->getBSSSection(), I);
-else
+else if (!I->isConstant())
SwitchToDataSection(TAI->getDataSection(), I);
+else {
+ // Read-only data.
+ bool isIntFPLiteral = Type->isInteger() || Type->isFloatingPoint();
+ if (C->ContainsRelocations() && Subtarget->isTargetDarwin() &&
+ TM.getRelocationModel() != Reloc::Static)
+SwitchToDataSection("\t.const_data\n");
+ else if (isIntFPLiteral && Size == 4 &&
+ TAI->getFourByteConstantSection())
+SwitchToDataSection(TAI->getFourByteConstantSection(), I);
+ else if (isIntFPLiteral && Size == 8 &&
+ TAI->getEightByteConstantSection())
+SwitchToDataSection(TAI->getEightByteConstantSection(), I);
+ else if (isIntFPLiteral && Size == 16 &&
+ TAI->getSixteenByteConstantSection())
+SwitchToDataSection(TAI->getSixteenByteConstantSection(), I);
+ else if (TAI->getReadOnlySection())
+SwitchToDataSection(TAI->getReadOnlySection(), I);
+ else
+SwitchToDataSection(TAI->getDataSection(), I);
+}
}
break;
Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp
diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.12
llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.13
--- llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.12 Mon Mar 5 11:59:58 2007
+++ llvm/lib/Target/ARM/ARMTargetAsmInfo.cppWed Mar 7 19:25:25 2007
@@ -27,6 +27,9 @@
HiddenDirective = "\t.private_extern\t";
JumpTableDataSection = ".const";
CStringSection = "\t.cstring";
+FourByteConstantSection = "\t.literal4\n";
+EightByteConstantSection = "\t.literal8\n";
+ReadOnlySection = "\t.const\n";
HasDotTypeDotSizeDirective = false;
if (TM.getRelocationModel() == Reloc::Static) {
StaticCtorsSection = ".constructor";
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.57 -> 1.58 --- Log message: Get rid of verboten include. --- Diffs of the changes: (+0 -1) ARMAsmPrinter.cpp |1 - 1 files changed, 1 deletion(-) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.57 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.58 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.57 Thu Feb 1 12:25:34 2007 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Mar 1 00:05:39 2007 @@ -36,7 +36,6 @@ #include "llvm/Support/Mangler.h" #include "llvm/Support/MathExtras.h" #include -#include using namespace llvm; STATISTIC(EmittedInsts, "Number of machine instrs printed"); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.56 -> 1.57
---
Log message:
Fix .thumb_func directive on linux.
---
Diffs of the changes: (+4 -1)
ARMAsmPrinter.cpp |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.56
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.57
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.56 Wed Jan 31 17:39:39 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Feb 1 12:25:34 2007
@@ -208,7 +208,10 @@
if (AFI->isThumbFunction()) {
EmitAlignment(1, F);
O << "\t.code\t16\n";
-O << "\t.thumb_func\t" << CurrentFnName << "\n";
+O << "\t.thumb_func";
+if (Subtarget->isTargetDarwin())
+ O << "\t" << CurrentFnName;
+O << "\n";
InCPMode = false;
} else
EmitAlignment(2, F);
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.55 -> 1.56
---
Log message:
Don't emit unnecessary .align directive.
---
Diffs of the changes: (+1 -3)
ARMAsmPrinter.cpp |4 +---
1 files changed, 1 insertion(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.55
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.56
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.55 Tue Jan 30 14:37:08 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Jan 31 17:39:39 2007
@@ -694,10 +694,8 @@
}
break;
default: {
-if (InCPMode && AFI->isThumbFunction()) {
- EmitAlignment(1);
+if (InCPMode && AFI->isThumbFunction())
InCPMode = false;
-}
switch (Opc) {
case ARM::PICADD:
case ARM::PICLD:
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMConstantPoolValue.cpp ARMConstantPoolValue.h ARMISelLowering.cpp ARMISelLowering.h ARMInstrInfo.td ARMInstrThumb.td
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.54 -> 1.55
ARMConstantPoolValue.cpp updated: 1.1 -> 1.2
ARMConstantPoolValue.h updated: 1.1 -> 1.2
ARMISelLowering.cpp updated: 1.7 -> 1.8
ARMISelLowering.h updated: 1.1 -> 1.2
ARMInstrInfo.td updated: 1.86 -> 1.87
ARMInstrThumb.td updated: 1.9 -> 1.10
---
Log message:
- Fix codegen for pc relative constant (e.g. JT) in thumb mode:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
- In thumb mode, it's not possible to use .set generate a pc relative stub
address. The stub is ARM code which is in a different section from the thumb
code. Load the value from a constpool instead.
- Some asm printing clean up.
---
Diffs of the changes: (+96 -47)
ARMAsmPrinter.cpp| 28 ++--
ARMConstantPoolValue.cpp | 30 +++---
ARMConstantPoolValue.h | 21 ++---
ARMISelLowering.cpp | 36 ++--
ARMISelLowering.h|2 --
ARMInstrInfo.td |5 ++---
ARMInstrThumb.td | 21 +
7 files changed, 96 insertions(+), 47 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.54
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.55
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.54 Tue Jan 30 14:08:37 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Jan 30 14:37:08 2007
@@ -122,10 +122,15 @@
ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)MCPV;
GlobalValue *GV = ACPV->getGV();
- std::string Name = Mang->getValueName(GV);
+ std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
+ if (!GV)
+Name += ACPV->getSymbol();
if (ACPV->isNonLazyPointer()) {
GVNonLazyPtrs.insert(Name);
O << TAI->getPrivateGlobalPrefix() << Name << "$non_lazy_ptr";
+ } else if (ACPV->isStub()) {
+FnStubs.insert(Name);
+O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
} else
O << Name;
if (ACPV->getPCAdjustment() != 0)
@@ -136,7 +141,7 @@
// If the constant pool value is a extern weak symbol, remember to emit
// the weak reference.
- if (GV->hasExternalWeakLinkage())
+ if (GV && GV->hasExternalWeakLinkage())
ExtWeakSymbols.insert(GV);
}
@@ -680,18 +685,29 @@
void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
++EmittedInsts;
- if (MI->getOpcode() == ARM::CONSTPOOL_ENTRY) {
+ int Opc = MI->getOpcode();
+ switch (Opc) {
+ case ARM::CONSTPOOL_ENTRY:
if (!InCPMode && AFI->isThumbFunction()) {
EmitAlignment(2);
InCPMode = true;
}
- } else {
+break;
+ default: {
if (InCPMode && AFI->isThumbFunction()) {
EmitAlignment(1);
InCPMode = false;
}
-O << "\t";
- }
+switch (Opc) {
+case ARM::PICADD:
+case ARM::PICLD:
+case ARM::tPICADD:
+ break;
+default:
+ O << "\t";
+ break;
+}
+ }}
// Call the autogenerated instruction printer routines.
printInstruction(MI);
Index: llvm/lib/Target/ARM/ARMConstantPoolValue.cpp
diff -u llvm/lib/Target/ARM/ARMConstantPoolValue.cpp:1.1
llvm/lib/Target/ARM/ARMConstantPoolValue.cpp:1.2
--- llvm/lib/Target/ARM/ARMConstantPoolValue.cpp:1.1Fri Jan 19 01:51:42 2007
+++ llvm/lib/Target/ARM/ARMConstantPoolValue.cppTue Jan 30 14:37:08 2007
@@ -14,12 +14,20 @@
#include "ARMConstantPoolValue.h"
#include "llvm/ADT/FoldingSet.h"
#include "llvm/GlobalValue.h"
+#include "llvm/Type.h"
using namespace llvm;
ARMConstantPoolValue::ARMConstantPoolValue(GlobalValue *gv, unsigned id,
- bool isNonLazy, unsigned char PCAdj)
+ ARMCP::ARMCPKind k,
+ unsigned char PCAdj)
: MachineConstantPoolValue((const Type*)gv->getType()),
-GV(gv), LabelId(id), isNonLazyPtr(isNonLazy), PCAdjust(PCAdj) {}
+GV(gv), S(NULL), LabelId(id), Kind(k), PCAdjust(PCAdj) {}
+
+ARMConstantPoolValue::ARMConstantPoolValue(const char *s, unsigned id,
+ ARMCP::ARMCPKind k,
+ unsigned char PCAdj)
+ : MachineConstantPoolValue((const Type*)Type::Int32Ty),
+GV(NULL), S(s), LabelId(id), Kind(k), PCAdjust(PCAdj) {}
int ARMConstantPoolValue::getExistingMachineCPValue(MachineConstantPool *CP,
unsigned Alignment) {
@@ -30,8 +38,11 @@
(Constants[i].Offset & AlignMask) == 0) {
ARMConstantPoolValue *CPV =
(ARMConstantPoolValue *)Constants[i].Val.MachineCPVal
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelLowering.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.53 -> 1.54
ARMISelLowering.cpp updated: 1.6 -> 1.7
---
Log message:
For PR1136: http://llvm.org/PR1136 : Rename GlobalVariable::isExternal as
isDeclaration to avoid
confusion with external linkage types.
---
Diffs of the changes: (+3 -3)
ARMAsmPrinter.cpp |2 +-
ARMISelLowering.cpp |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.53
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.54
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.53 Tue Jan 30 02:04:53 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Jan 30 14:08:37 2007
@@ -264,7 +264,7 @@
bool isCallOp = Modifier && !strcmp(Modifier, "call");
GlobalValue *GV = MO.getGlobal();
std::string Name = Mang->getValueName(GV);
-bool isExt = (GV->isExternal() || GV->hasWeakLinkage() ||
+bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
GV->hasLinkOnceLinkage());
if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
TM.getRelocationModel() != Reloc::Static) {
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.6
llvm/lib/Target/ARM/ARMISelLowering.cpp:1.7
--- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.6 Mon Jan 29 16:58:52 2007
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp Tue Jan 30 14:08:37 2007
@@ -467,7 +467,7 @@
GlobalValue *GV = G->getGlobal();
Callee = DAG.getTargetGlobalAddress(GV, getPointerTy());
isDirect = true;
-bool isExt = (GV->isExternal() || GV->hasWeakLinkage() ||
+bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
GV->hasLinkOnceLinkage());
bool isStub = (isExt && Subtarget->isTargetDarwin()) &&
getTargetMachine().getRelocationModel() != Reloc::Static;
@@ -632,7 +632,7 @@
/// even in dynamic-no-pic mode.
static bool GVIsIndirectSymbol(GlobalValue *GV) {
return (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
- (GV->isExternal() && !GV->hasNotBeenReadFromBytecode()));
+ (GV->isDeclaration() && !GV->hasNotBeenReadFromBytecode()));
}
SDOperand ARMTargetLowering::LowerGlobalAddress(SDOperand Op,
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMTargetAsmInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.52 -> 1.53
ARMTargetAsmInfo.cpp updated: 1.9 -> 1.10
---
Log message:
Darwin -static should codegen static ctors / dtors to .constructor /
.destructor sections.
---
Diffs of the changes: (+16 -3)
ARMAsmPrinter.cpp| 10 +-
ARMTargetAsmInfo.cpp |9 +++--
2 files changed, 16 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.52
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.53
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.52 Mon Jan 29 20:35:32 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Jan 30 02:04:53 2007
@@ -714,8 +714,16 @@
if (!I->hasInitializer()) // External global require no code
continue;
-if (EmitSpecialLLVMGlobal(I))
+if (EmitSpecialLLVMGlobal(I)) {
+ if (Subtarget->isTargetDarwin() &&
+ TM.getRelocationModel() == Reloc::Static) {
+if (I->getName() == "llvm.global_ctors")
+ O << ".reference .constructors_used\n";
+else if (I->getName() == "llvm.global_dtors")
+ O << ".reference .destructors_used\n";
+ }
continue;
+}
std::string name = Mang->getValueName(I);
Constant *C = I->getInitializer();
Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp
diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.9
llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.10
--- llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.9Fri Jan 26 17:24:43 2007
+++ llvm/lib/Target/ARM/ARMTargetAsmInfo.cppTue Jan 30 02:04:53 2007
@@ -28,8 +28,13 @@
JumpTableDataSection = ".const";
CStringSection = "\t.cstring";
HasDotTypeDotSizeDirective = false;
-StaticCtorsSection = ".mod_init_func";
-StaticDtorsSection = ".mod_term_func";
+if (TM.getRelocationModel() == Reloc::Static) {
+ StaticCtorsSection = ".constructor";
+ StaticDtorsSection = ".destructor";
+} else {
+ StaticCtorsSection = ".mod_init_func";
+ StaticDtorsSection = ".mod_term_func";
+}
// In non-PIC modes, emit a special label before jump tables so that the
// linker can perform more accurate dead code stripping.
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMConstantIslandPass.cpp ARMInstrThumb.td
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.50 -> 1.51
ARMConstantIslandPass.cpp updated: 1.10 -> 1.11
ARMInstrThumb.td updated: 1.6 -> 1.7
---
Log message:
Thumb jumptable support.
---
Diffs of the changes: (+32 -3)
ARMAsmPrinter.cpp |3 ++-
ARMConstantIslandPass.cpp | 10 +-
ARMInstrThumb.td | 22 +-
3 files changed, 32 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.50
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.51
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.50 Fri Jan 26 15:22:28 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Fri Jan 26 20:29:44 2007
@@ -647,7 +647,8 @@
<< getFunctionNumber() << '_' << JTI << '_' << MO2.getImmedValue();
} else
printBasicBlockLabel(MBB, false, false);
-O << '\n';
+if (i != e-1)
+ O << '\n';
}
}
Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.10
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.11
--- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.10 Fri Jan 26 14:38:26 2007
+++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Fri Jan 26 20:29:45 2007
@@ -352,7 +352,8 @@
return MI->getOperand(2).getImm();
case ARM::BR_JTr:
case ARM::BR_JTm:
-case ARM::BR_JTadd: {
+case ARM::BR_JTadd:
+case ARM::tBR_JTr: {
// These are jumptable branches, i.e. a branch followed by an inlined
// jumptable. The size is 4 + 4 * number of entries.
unsigned JTI =
MI->getOperand(MI->getNumOperands()-2).getJumpTableIndex();
@@ -360,6 +361,13 @@
MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
const std::vector &JT = MJTI->getJumpTables();
assert(JTI < JT.size());
+ // Thumb instructions are 2 byte aligned, but JT entries are 4 byte
+ // 4 aligned. The assembler / linker may add 2 byte padding just before
+ // the JT entries. Use + 4 even for tBR_JTr to purposely over-estimate
+ // the size the jumptable.
+ // FIXME: If we know the size of the function is less than (1 << 16) *2
+ // bytes, we can use 16-bit entries instead. Then there won't be an
+ // alignment issue.
return getNumJTEntries(JT, JTI) * 4 + 4;
}
default:
Index: llvm/lib/Target/ARM/ARMInstrThumb.td
diff -u llvm/lib/Target/ARM/ARMInstrThumb.td:1.6
llvm/lib/Target/ARM/ARMInstrThumb.td:1.7
--- llvm/lib/Target/ARM/ARMInstrThumb.td:1.6Fri Jan 26 18:07:15 2007
+++ llvm/lib/Target/ARM/ARMInstrThumb.tdFri Jan 26 20:29:45 2007
@@ -56,6 +56,10 @@
class TIx2 pattern>
: ThumbI;
+// BR_JT instructions
+class TJTI pattern>
+ : ThumbI;
+
def imm_neg_XFORM : SDNodeXFormgetTargetConstant(-(int)N->getValue(), MVT::i32);
}]>;
@@ -188,9 +192,14 @@
[(ARMcall_nolink GPR:$dst)]>;
}
-let isBranch = 1, isTerminator = 1, isBarrier = 1 in
+let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
def tB : TI<(ops brtarget:$dst), "b $dst", [(br bb:$dst)]>;
+ def tBR_JTr : TJTI<(ops GPR:$dst, jtblock_operand:$jt, i32imm:$id),
+ "cpy pc, $dst \n\t.align\t2\n$jt",
+ [(ARMbrjt GPR:$dst, tjumptable:$jt, imm:$id)]>;
+}
+
let isBranch = 1, isTerminator = 1, noResults = 1, isBarrier = 1 in
def tBcc : TI<(ops brtarget:$dst, CCOp:$cc), "b$cc $dst",
[(ARMbrcond bb:$dst, imm:$cc)]>;
@@ -477,6 +486,13 @@
"add $dst, pc, #PCRELV${:uid}")),
[]>;
+def tLEApcrelJT : TI<(ops GPR:$dst, i32imm:$label, i32imm:$id),
+ !strconcat(!strconcat(".set PCRELV${:uid},
(${label}_${id:no_hash}-(",
+ "${:private}PCRELL${:uid}+4))\n"),
+ !strconcat("${:private}PCRELL${:uid}:\n\t",
+ "add $dst, pc, #PCRELV${:uid}")),
+ []>;
+
//===--===//
// Non-Instruction Patterns
//
@@ -489,6 +505,10 @@
def : ThumbPat<(ARMWrapperCall texternalsym:$dst),
(tLEApcrelCall texternalsym:$dst)>;
+// JumpTable
+def : ThumbPat<(ARMWrapperJT tjumptable:$dst, imm:$id),
+ (tLEApcrelJT tjumptable:$dst, imm:$id)>;
+
// Direct calls
def : ThumbPat<(ARMtcall texternalsym:$func), (tBL texternalsym:$func)>;
def : ThumbV5Pat<(ARMcall texternalsym:$func), (tBLXi texternalsym:$func)>;
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.49 -> 1.50
---
Log message:
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
for debugging and exception handling.
---
Diffs of the changes: (+3 -3)
ARMAsmPrinter.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.49
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.50
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.49 Fri Jan 26 13:51:32 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Fri Jan 26 15:22:28 2007
@@ -23,7 +23,7 @@
#include "llvm/Module.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/DwarfWriter.h"
-#include "llvm/CodeGen/MachineDebugInfo.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/Target/TargetAsmInfo.h"
@@ -142,7 +142,7 @@
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
- AU.addRequired();
+ AU.addRequired();
}
};
} // end of anonymous namespace
@@ -166,7 +166,7 @@
AFI = MF.getInfo();
if (Subtarget->isTargetDarwin()) {
-DW.SetDebugInfo(&getAnalysis());
+DW.SetModuleInfo(&getAnalysis());
}
SetupMachineFunction(MF);
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.48 -> 1.49
---
Log message:
If the constant pool value is a extern weak symbol, emit the weak reference.
---
Diffs of the changes: (+7 -1)
ARMAsmPrinter.cpp |8 +++-
1 files changed, 7 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.48
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.49
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.48 Thu Jan 25 14:11:04 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Fri Jan 26 13:51:32 2007
@@ -121,7 +121,8 @@
printDataDirective(MCPV->getType());
ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)MCPV;
- std::string Name = Mang->getValueName(ACPV->getGV());
+ GlobalValue *GV = ACPV->getGV();
+ std::string Name = Mang->getValueName(GV);
if (ACPV->isNonLazyPointer()) {
GVNonLazyPtrs.insert(Name);
O << TAI->getPrivateGlobalPrefix() << Name << "$non_lazy_ptr";
@@ -132,6 +133,11 @@
<< utostr(ACPV->getLabelId())
<< "+" << (unsigned)ACPV->getPCAdjustment() << ")";
O << "\n";
+
+ // If the constant pool value is a extern weak symbol, remember to emit
+ // the weak reference.
+ if (GV->hasExternalWeakLinkage())
+ExtWeakSymbols.insert(GV);
}
void getAnalysisUsage(AnalysisUsage &AU) const {
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.47 -> 1.48
---
Log message:
Fix elf object definition.
---
Diffs of the changes: (+1 -1)
ARMAsmPrinter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.47
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.48
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.47 Wed Jan 24 21:07:27 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Jan 25 14:11:04 2007
@@ -725,7 +725,7 @@
if (const char *Directive = TAI->getHiddenDirective())
O << Directive << name << "\n";
if (Subtarget->isTargetELF())
- O << "\t.type " << name << ",@object\n";
+ O << "\t.type " << name << ",%object\n";
if (C->isNullValue()) {
if (I->hasExternalLinkage()) {
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMMachineFunctionInfo.h ARMRegisterInfo.h
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.46 -> 1.47
ARMMachineFunctionInfo.h updated: 1.2 -> 1.3
ARMRegisterInfo.h updated: 1.6 -> 1.7
---
Log message:
Getting rid uses of evil std::set<>
---
Diffs of the changes: (+39 -23)
ARMAsmPrinter.cpp|1
ARMMachineFunctionInfo.h | 60 ++-
ARMRegisterInfo.h|1
3 files changed, 39 insertions(+), 23 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.46
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.47
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.46 Tue Jan 23 16:59:13 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Jan 24 21:07:27 2007
@@ -37,7 +37,6 @@
#include "llvm/Support/MathExtras.h"
#include
#include
-#include
using namespace llvm;
STATISTIC(EmittedInsts, "Number of machine instrs printed");
Index: llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
diff -u llvm/lib/Target/ARM/ARMMachineFunctionInfo.h:1.2
llvm/lib/Target/ARM/ARMMachineFunctionInfo.h:1.3
--- llvm/lib/Target/ARM/ARMMachineFunctionInfo.h:1.2Fri Jan 19 20:09:25 2007
+++ llvm/lib/Target/ARM/ARMMachineFunctionInfo.hWed Jan 24 21:07:27 2007
@@ -60,9 +60,9 @@
/// GPRCS1Frames, GPRCS2Frames, DPRCSFrames - Keeps track of frame indices
/// which belong to these spill areas.
- std::set GPRCS1Frames;
- std::set GPRCS2Frames;
- std::set DPRCSFrames;
+ std::vector GPRCS1Frames;
+ std::vector GPRCS2Frames;
+ std::vector DPRCSFrames;
/// JumpTableUId - Unique id for jumptables.
///
@@ -107,24 +107,42 @@
void setGPRCalleeSavedArea2Size(unsigned s) { GPRCS2Size = s; }
void setDPRCalleeSavedAreaSize(unsigned s) { DPRCSSize = s; }
- bool isGPRCalleeSavedArea1Frame(unsigned fi) const {
-return GPRCS1Frames.count(fi);
- }
- bool isGPRCalleeSavedArea2Frame(unsigned fi) const {
-return GPRCS2Frames.count(fi);
- }
- bool isDPRCalleeSavedAreaFrame(unsigned fi) const {
-return DPRCSFrames.count(fi);
- }
-
- void addGPRCalleeSavedArea1Frame(unsigned fi) {
-GPRCS1Frames.insert(fi);
- }
- void addGPRCalleeSavedArea2Frame(unsigned fi) {
-GPRCS2Frames.insert(fi);
- }
- void addDPRCalleeSavedAreaFrame(unsigned fi) {
-DPRCSFrames.insert(fi);
+ bool isGPRCalleeSavedArea1Frame(int fi) const {
+if (fi < 0 || fi >= (int)GPRCS1Frames.size())
+ return false;
+return GPRCS1Frames[fi];
+ }
+ bool isGPRCalleeSavedArea2Frame(int fi) const {
+if (fi < 0 || fi >= (int)GPRCS2Frames.size())
+ return false;
+return GPRCS2Frames[fi];
+ }
+ bool isDPRCalleeSavedAreaFrame(int fi) const {
+if (fi < 0 || fi >= (int)DPRCSFrames.size())
+ return false;
+return DPRCSFrames[fi];
+ }
+
+ void addGPRCalleeSavedArea1Frame(int fi) {
+if (fi >= 0) {
+ if (fi >= (int)GPRCS1Frames.size())
+GPRCS1Frames.resize(fi+1);
+ GPRCS1Frames[fi] = true;
+}
+ }
+ void addGPRCalleeSavedArea2Frame(int fi) {
+if (fi >= 0) {
+ if (fi >= (int)GPRCS2Frames.size())
+GPRCS2Frames.resize(fi+1);
+ GPRCS2Frames[fi] = true;
+}
+ }
+ void addDPRCalleeSavedAreaFrame(int fi) {
+if (fi >= 0) {
+ if (fi >= (int)DPRCSFrames.size())
+DPRCSFrames.resize(fi+1);
+ DPRCSFrames[fi] = true;
+}
}
unsigned createJumpTableUId() {
Index: llvm/lib/Target/ARM/ARMRegisterInfo.h
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.h:1.6
llvm/lib/Target/ARM/ARMRegisterInfo.h:1.7
--- llvm/lib/Target/ARM/ARMRegisterInfo.h:1.6 Mon Jan 22 18:52:44 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.h Wed Jan 24 21:07:27 2007
@@ -17,7 +17,6 @@
#include "llvm/Target/MRegisterInfo.h"
#include "ARMGenRegisterInfo.h.inc"
-#include
namespace llvm {
class TargetInstrInfo;
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrThumb.td
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.45 -> 1.46
ARMISelDAGToDAG.cpp updated: 1.99 -> 1.100
ARMInstrThumb.td updated: 1.1 -> 1.2
---
Log message:
- Reorg Thumb load / store instructions. Combine each rr and ri pair of
instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
address is not an add, materialize a 0 immediate into a register and use
it as the offset field.
---
Diffs of the changes: (+118 -110)
ARMAsmPrinter.cpp | 29 +++
ARMISelDAGToDAG.cpp | 67 --
ARMInstrThumb.td| 132 ++--
3 files changed, 118 insertions(+), 110 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.45
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.46
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.45 Fri Jan 19 13:25:36 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Jan 23 16:59:13 2007
@@ -98,9 +98,9 @@
void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo);
void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo,
unsigned Scale);
-void printThumbAddrModeRI5_1Operand(const MachineInstr *MI, int OpNo);
-void printThumbAddrModeRI5_2Operand(const MachineInstr *MI, int OpNo);
-void printThumbAddrModeRI5_4Operand(const MachineInstr *MI, int OpNo);
+void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo);
+void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
+void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
void printCCOperand(const MachineInstr *MI, int opNum);
void printPCLabel(const MachineInstr *MI, int opNum);
@@ -518,7 +518,7 @@
ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
unsigned Scale) {
const MachineOperand &MO1 = MI->getOperand(Op);
- const MachineOperand &MO2 = MI->getOperand(Op+1);
+ const MachineOperand &MO2 = MI->getOperand(Op+2);
if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
printOperand(MI, Op);
@@ -535,16 +535,25 @@
}
void
-ARMAsmPrinter::printThumbAddrModeRI5_1Operand(const MachineInstr *MI, int Op) {
- printThumbAddrModeRI5Operand(MI, Op, 1);
+ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
+ if (MI->getOperand(Op+1).getReg())
+printThumbAddrModeRROperand(MI, Op);
+ else
+printThumbAddrModeRI5Operand(MI, Op, 1);
}
void
-ARMAsmPrinter::printThumbAddrModeRI5_2Operand(const MachineInstr *MI, int Op) {
- printThumbAddrModeRI5Operand(MI, Op, 2);
+ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
+ if (MI->getOperand(Op+1).getReg())
+printThumbAddrModeRROperand(MI, Op);
+ else
+printThumbAddrModeRI5Operand(MI, Op, 2);
}
void
-ARMAsmPrinter::printThumbAddrModeRI5_4Operand(const MachineInstr *MI, int Op) {
- printThumbAddrModeRI5Operand(MI, Op, 4);
+ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
+ if (MI->getOperand(Op+1).getReg())
+printThumbAddrModeRROperand(MI, Op);
+ else
+printThumbAddrModeRI5Operand(MI, Op, 4);
}
void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op)
{
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.99
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.100
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.99Fri Jan 19 01:51:42 2007
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Jan 23 16:59:13 2007
@@ -71,12 +71,12 @@
bool SelectThumbAddrModeRR(SDOperand Op, SDOperand N, SDOperand &Base,
SDOperand &Offset);
- bool SelectThumbAddrModeRI5_1(SDOperand Op, SDOperand N, SDOperand &Base,
-SDOperand &Offset);
- bool SelectThumbAddrModeRI5_2(SDOperand Op, SDOperand N, SDOperand &Base,
-SDOperand &Offset);
- bool SelectThumbAddrModeRI5_4(SDOperand Op, SDOperand N, SDOperand &Base,
-SDOperand &Offset);
+ bool SelectThumbAddrModeS1(SDOperand Op, SDOperand N, SDOperand &Base,
+ SDOperand &Offset, SDOperand &OffImm);
+ bool SelectThumbAddrModeS2(SDOperand Op, SDOperand N, SDOperand &Base,
+ SDOperand &Offset, SDOperand &OffImm);
+ bool SelectThumbAddrModeS4(SDOperand Op, SDOperand N, SDOperand &Base,
+ SDOperand &Offset, SDOperand &OffImm);
bool SelectThumbAddrModeSP(SDOperand Op, SDOperand N, SDOperand &Base,
SDOperand &Offset);
@@ -340,8 +340,16 @@
bool ARMDAGToDAGISel::SelectThumbAddrModeRR(SDOperand Op, SDOperand N,
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.44 -> 1.45
---
Log message:
Restructure code a bit to make use of continue (simplifying things). Generalize
the .zerofill directive emission to not be darwin-specific.
---
Diffs of the changes: (+87 -64)
ARMAsmPrinter.cpp | 151 +++---
1 files changed, 87 insertions(+), 64 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.44
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.45
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.44 Fri Jan 19 11:33:22 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Fri Jan 19 13:25:36 2007
@@ -29,6 +29,7 @@
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/Compiler.h"
@@ -159,7 +160,7 @@
bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
AFI = MF.getInfo();
- if (Subtarget->isDarwin()) {
+ if (Subtarget->isTargetDarwin()) {
DW.SetDebugInfo(&getAnalysis());
}
@@ -183,7 +184,7 @@
break;
case Function::WeakLinkage:
case Function::LinkOnceLinkage:
-if (Subtarget->isDarwin()) {
+if (Subtarget->isTargetDarwin()) {
SwitchToTextSection(
".section __TEXT,__textcoal_nt,coalesced,pure_instructions",
F);
O << "\t.globl\t" << CurrentFnName << "\n";
@@ -203,7 +204,7 @@
EmitAlignment(2, F);
O << CurrentFnName << ":\n";
- if (Subtarget->isDarwin()) {
+ if (Subtarget->isTargetDarwin()) {
// Emit pre-function debug information.
DW.BeginFunction(&MF);
}
@@ -226,7 +227,7 @@
if (TAI->hasDotTypeDotSizeDirective())
O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
- if (Subtarget->isDarwin()) {
+ if (Subtarget->isTargetDarwin()) {
// Emit post-function debug information.
DW.EndFunction();
}
@@ -260,7 +261,7 @@
std::string Name = Mang->getValueName(GV);
bool isExt = (GV->isExternal() || GV->hasWeakLinkage() ||
GV->hasLinkOnceLinkage());
-if (isExt && isCallOp && Subtarget->isDarwin() &&
+if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
TM.getRelocationModel() != Reloc::Static) {
O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
FnStubs.insert(Name);
@@ -275,7 +276,7 @@
bool isCallOp = Modifier && !strcmp(Modifier, "call");
std::string Name(TAI->getGlobalPrefix());
Name += MO.getSymbolName();
-if (isCallOp && Subtarget->isDarwin() &&
+if (isCallOp && Subtarget->isTargetDarwin() &&
TM.getRelocationModel() != Reloc::Static) {
O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
FnStubs.insert(Name);
@@ -688,7 +689,7 @@
}
bool ARMAsmPrinter::doInitialization(Module &M) {
- if (Subtarget->isDarwin()) {
+ if (Subtarget->isTargetDarwin()) {
// Emit initial debug information.
DW.BeginModule(&M);
}
@@ -712,22 +713,34 @@
unsigned Size = TD->getTypeSize(C->getType());
unsigned Align = TD->getPreferredAlignmentLog(I);
-if (C->isNullValue() &&
-!I->hasSection() &&
-(I->hasInternalLinkage() || I->hasWeakLinkage() ||
- I->hasLinkOnceLinkage() ||
- (Subtarget->isDarwin() && I->hasExternalLinkage( {
- if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
+if (I->hasHiddenVisibility())
+ if (const char *Directive = TAI->getHiddenDirective())
+O << Directive << name << "\n";
+if (Subtarget->isTargetELF())
+ O << "\t.type " << name << ",@object\n";
+
+if (C->isNullValue()) {
if (I->hasExternalLinkage()) {
+if (const char *Directive = TAI->getZeroFillDirective()) {
O << "\t.globl\t" << name << "\n";
- O << "\t.zerofill __DATA__, __common, " << name << ", "
-<< Size << ", " << Align;
- } else {
-SwitchToDataSection(TAI->getDataSection(), I);
+ O << Directive << "__DATA__, __common, " << name << ", "
+<< Size << ", " << Align << "\n";
+ continue;
+}
+ }
+
+ if (!I->hasSection() &&
+ (I->hasInternalLinkage() || I->hasWeakLinkage() ||
+ I->hasLinkOnceLinkage())) {
+if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
+if (!NoZerosInBSS && TAI->getBSSSection())
+ SwitchToDataSection(TAI->getBSSSection(), I);
+else
+ SwitchToDataSection(TAI->getDataSection(), I);
if (TAI->getLCOMMDirective() != NULL) {
if (I->hasInternalLinkage()) {
O << TAI->getLCOMMDirective() << name << "," << Size;
-if (Subtarget->isDarwin())
+if (Subtarget->isTargetDarwin())
O << "," << Align;
} else
O << TAI->getCOMMDirec
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.43 -> 1.44
---
Log message:
Fix section definition.
---
Diffs of the changes: (+2 -2)
ARMAsmPrinter.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.43
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.44
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.43 Fri Jan 19 01:51:42 2007
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Fri Jan 19 11:33:22 2007
@@ -753,7 +753,7 @@
<< "\t.weak_definition " << name << "\n";
SwitchToDataSection("\t.section __DATA,__const_coal,coalesced", I);
} else {
- O << "\t.section\t.llvm.linkonce.d." << name << ",\"aw\",@progbits\n"
+ O << "\t.section\t.llvm.linkonce.d." << name << ",\"aw\",%progbits\n"
<< "\t.weak " << name << "\n";
}
break;
@@ -774,7 +774,7 @@
I->getSection() == ".dtors")) {
assert(!Subtarget->isDarwin());
std::string SectionName = ".section " + I->getSection();
- SectionName += ",\"aw\",@progbits";
+ SectionName += ",\"aw\",%progbits";
SwitchToDataSection(SectionName.c_str());
} else {
SwitchToDataSection(TAI->getDataSection(), I);
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.41 -> 1.42
---
Log message:
Fix for ARM weak symbols, patch by Lauro Ramos Venancio!
---
Diffs of the changes: (+14 -0)
ARMAsmPrinter.cpp | 14 ++
1 files changed, 14 insertions(+)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.41
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.42
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.41 Tue Dec 19 16:59:25 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Dec 21 16:59:58 2006
@@ -111,6 +111,20 @@
// Print out constants referenced by the function
EmitConstantPool(MF.getConstantPool());
+ const std::vector
+&CP = MF.getConstantPool()->getConstants();
+ for (unsigned i = 0, e = CP.size(); i != e; ++i) {
+MachineConstantPoolEntry CPE = CP[i];
+if (!CPE.isMachineConstantPoolEntry()){
+ Constant *CV = CPE.Val.ConstVal;
+ if (const GlobalValue *GV = dyn_cast(CV)) {
+if (GV->hasExternalWeakLinkage()) {
+ ExtWeakSymbols.insert(GV);
+}
+ }
+}
+ }
+
// Print out jump tables referenced by the function
EmitJumpTableInfo(MF.getJumpTableInfo(), MF);
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.40 -> 1.41
---
Log message:
eliminate static ctors for Statistic objects.
---
Diffs of the changes: (+4 -2)
ARMAsmPrinter.cpp |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.40
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.41
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.40 Sun Dec 17 21:37:18 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Dec 19 16:59:25 2006
@@ -13,6 +13,7 @@
//
//===--===//
+#define DEBUG_TYPE "asm-printer"
#include "ARM.h"
#include "ARMInstrInfo.h"
#include "llvm/Constants.h"
@@ -33,9 +34,9 @@
#include
using namespace llvm;
-namespace {
- Statistic EmittedInsts("asm-printer", "Number of machine instrs printed");
+STATISTIC(EmittedInsts, "Number of machine instrs printed");
+namespace {
static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
switch (CC) {
default: assert(0 && "Unknown condition code");
@@ -144,6 +145,7 @@
II != E; ++II) {
// Print the assembly for the instruction.
O << "\t";
+ ++EmittedInsts;
printInstruction(II);
}
}
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.39 -> 1.40
---
Log message:
move ExtWeakSymbols to AsmPrinter
---
Diffs of the changes: (+1 -10)
ARMAsmPrinter.cpp | 11 +--
1 files changed, 1 insertion(+), 10 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.39
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.40
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.39 Sat Dec 9 20:53:14 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Sun Dec 17 21:37:18 2006
@@ -62,8 +62,6 @@
: AsmPrinter(O, TM, T) {
}
-std::set ExtWeakSymbols;
-
/// We name each basic block in a Function with a unique number, so
/// that we can consistently refer to them later. This is cleared
/// at the beginning of each call to runOnMachineFunction().
@@ -246,7 +244,7 @@
std::string Name = Mang->getValueName(GV);
O << Name;
if (GV->hasExternalWeakLinkage()) {
- ExtWeakSymbols.insert(Name);
+ ExtWeakSymbols.insert(GV);
}
}
break;
@@ -337,13 +335,6 @@
}
}
- if (ExtWeakSymbols.begin() != ExtWeakSymbols.end())
-SwitchToDataSection("");
- for (std::set::iterator i = ExtWeakSymbols.begin(),
- e = ExtWeakSymbols.end(); i != e; ++i) {
-O << TAI->getWeakRefDirective() << *i << "\n";
- }
-
AsmPrinter::doFinalization(M);
return false; // success
}
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.38 -> 1.39
---
Log message:
.align is in bits
.comm is in bytes
:-(
---
Diffs of the changes: (+1 -1)
ARMAsmPrinter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.38
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.39
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.38 Fri Dec 8 16:06:02 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Sat Dec 9 20:53:14 2006
@@ -303,7 +303,7 @@
O << "\t.local " << name << "\n";
O << "\t.comm " << name << "," << Size
-<< "," << (unsigned)Align;
+<< "," << (unsigned) (1 << Align);
O << "\n";
} else {
switch (I->getLinkage()) {
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.37 -> 1.38
---
Log message:
%progbits not @progbits
---
Diffs of the changes: (+1 -1)
ARMAsmPrinter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.37
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.38
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.37 Fri Dec 8 15:24:58 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Fri Dec 8 16:06:02 2006
@@ -322,7 +322,7 @@
I->getSection() == ".dtors")) {
std::string SectionName = ".section " + I->getSection();
-SectionName += ",\"aw\",@progbits";
+SectionName += ",\"aw\",%progbits";
SwitchToDataSection(SectionName.c_str());
} else {
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.36 -> 1.37
---
Log message:
add \"aw\",@progbits" to ctors and dtors
---
Diffs of the changes: (+11 -4)
ARMAsmPrinter.cpp | 15 +++
1 files changed, 11 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.36
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.37
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.36 Thu Dec 7 16:38:06 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Fri Dec 8 15:24:58 2006
@@ -317,10 +317,17 @@
break;
}
- if (C->isNullValue())
-SwitchToDataSection(".bss", I);
- else
-SwitchToDataSection(".data", I);
+ if (I->hasSection() &&
+ (I->getSection() == ".ctors" ||
+ I->getSection() == ".dtors")) {
+std::string SectionName = ".section " + I->getSection();
+
+SectionName += ",\"aw\",@progbits";
+
+SwitchToDataSection(SectionName.c_str());
+ } else {
+SwitchToDataSection(TAI->getDataSection(), I);
+ }
EmitAlignment(Align, I);
O << "\t.type " << name << ", %object\n";
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.35 -> 1.36
---
Log message:
fix alignment
---
Diffs of the changes: (+3 -3)
ARMAsmPrinter.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.35
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.36
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.35 Thu Dec 7 16:21:48 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Dec 7 16:38:06 2006
@@ -292,7 +292,7 @@
std::string name = Mang->getValueName(I);
Constant *C = I->getInitializer();
unsigned Size = TD->getTypeSize(C->getType());
-unsigned Align = TD->getTypeAlignment(C->getType());
+unsigned Align = Log2_32(TD->getTypeAlignment(C->getType()));
if (C->isNullValue() &&
!I->hasSection() &&
@@ -302,8 +302,8 @@
if (I->hasInternalLinkage())
O << "\t.local " << name << "\n";
- O << "\t.comm " << name << "," << TD->getTypeSize(C->getType())
-<< "," << (unsigned)TD->getTypeAlignment(C->getType());
+ O << "\t.comm " << name << "," << Size
+<< "," << (unsigned)Align;
O << "\n";
} else {
switch (I->getLinkage()) {
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.34 -> 1.35
ARMISelDAGToDAG.cpp updated: 1.87 -> 1.88
ARMRegisterInfo.cpp updated: 1.27 -> 1.28
---
Log message:
What should be the last unnecessary s in the library.
---
Diffs of the changes: (+0 -3)
ARMAsmPrinter.cpp |1 -
ARMISelDAGToDAG.cpp |1 -
ARMRegisterInfo.cpp |1 -
3 files changed, 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.34
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.35
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.34 Thu Dec 7 12:33:58 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Dec 7 16:21:48 2006
@@ -31,7 +31,6 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/MathExtras.h"
#include
-#include
using namespace llvm;
namespace {
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.87
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.88
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.87Tue Dec 5 11:57:22 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Thu Dec 7 16:21:48 2006
@@ -27,7 +27,6 @@
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Support/Debug.h"
-#include
#include
using namespace llvm;
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.27
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.28
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.27Mon Nov 27 17:37:22 2006
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Thu Dec 7 16:21:48 2006
@@ -24,7 +24,6 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/ADT/STLExtras.h"
-#include
using namespace llvm;
// hasFP - Return true if the specified function should have a dedicated frame
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.33 -> 1.34
---
Log message:
make sure that we don't use a common symbol if a section was specified
---
Diffs of the changes: (+1 -0)
ARMAsmPrinter.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.33
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.34
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.33 Wed Dec 6 11:46:32 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Dec 7 12:33:58 2006
@@ -296,6 +296,7 @@
unsigned Align = TD->getTypeAlignment(C->getType());
if (C->isNullValue() &&
+!I->hasSection() &&
(I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
I->hasWeakLinkage())) {
SwitchToDataSection(".data", I);
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.32 -> 1.33
---
Log message:
Detemplatize the Statistic class. The only type it is instantiated with
is 'unsigned'.
---
Diffs of the changes: (+1 -1)
ARMAsmPrinter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.32
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.33
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.32 Wed Dec 6 07:35:10 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Dec 6 11:46:32 2006
@@ -35,7 +35,7 @@
using namespace llvm;
namespace {
- Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
+ Statistic EmittedInsts("asm-printer", "Number of machine instrs printed");
static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
switch (CC) {
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMTargetAsmInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.31 -> 1.32
ARMTargetAsmInfo.cpp updated: 1.1 -> 1.2
---
Log message:
print weak references
---
Diffs of the changes: (+14 -1)
ARMAsmPrinter.cpp| 14 +-
ARMTargetAsmInfo.cpp |1 +
2 files changed, 14 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.31
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.32
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.31 Wed Dec 6 00:13:25 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Dec 6 07:35:10 2006
@@ -63,6 +63,8 @@
: AsmPrinter(O, TM, T) {
}
+std::set ExtWeakSymbols;
+
/// We name each basic block in a Function with a unique number, so
/// that we can consistently refer to them later. This is cleared
/// at the beginning of each call to runOnMachineFunction().
@@ -127,7 +129,7 @@
break;
case Function::WeakLinkage:
case Function::LinkOnceLinkage:
-O << "\t.weak\t" << CurrentFnName << "\n";
+O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
break;
}
EmitAlignment(2, F);
@@ -244,6 +246,9 @@
GlobalValue *GV = MO.getGlobal();
std::string Name = Mang->getValueName(GV);
O << Name;
+if (GV->hasExternalWeakLinkage()) {
+ ExtWeakSymbols.insert(Name);
+}
}
break;
case MachineOperand::MO_ExternalSymbol:
@@ -325,6 +330,13 @@
}
}
+ if (ExtWeakSymbols.begin() != ExtWeakSymbols.end())
+SwitchToDataSection("");
+ for (std::set::iterator i = ExtWeakSymbols.begin(),
+ e = ExtWeakSymbols.end(); i != e; ++i) {
+O << TAI->getWeakRefDirective() << *i << "\n";
+ }
+
AsmPrinter::doFinalization(M);
return false; // success
}
Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp
diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.1
llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.2
--- llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.1Thu Sep 7 17:05:01 2006
+++ llvm/lib/Target/ARM/ARMTargetAsmInfo.cppWed Dec 6 07:35:10 2006
@@ -23,4 +23,5 @@
CommentString = "@";
ConstantPoolSection = "\t.text\n";
AlignmentIsInBytes = false;
+ WeakRefDirective = "\t.weak\t";
}
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.30 -> 1.31
---
Log message:
These asm printers shouldn't use assembly/writer.h
---
Diffs of the changes: (+0 -4)
ARMAsmPrinter.cpp |4
1 files changed, 4 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.30
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.31
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.30 Tue Dec 5 11:00:17 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Dec 6 00:13:25 2006
@@ -18,7 +18,6 @@
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Module.h"
-#include "llvm/Assembly/Writer.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineConstantPool.h"
@@ -300,9 +299,6 @@
O << "\t.comm " << name << "," << TD->getTypeSize(C->getType())
<< "," << (unsigned)TD->getTypeAlignment(C->getType());
- O << "\t\t";
- O << TAI->getCommentString() << " ";
- WriteAsOperand(O, I, true, true, &M);
O << "\n";
} else {
switch (I->getLinkage()) {
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.29 -> 1.30 --- Log message: add support for weak linkage --- Diffs of the changes: (+1 -1) ARMAsmPrinter.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.29 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.30 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.29 Thu Nov 9 07:58:55 2006 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Dec 5 11:00:17 2006 @@ -128,7 +128,7 @@ break; case Function::WeakLinkage: case Function::LinkOnceLinkage: -assert(0 && "Not implemented"); +O << "\t.weak\t" << CurrentFnName << "\n"; break; } EmitAlignment(2, F); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.td ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.28 -> 1.29
ARMISelDAGToDAG.cpp updated: 1.84 -> 1.85
ARMInstrInfo.td updated: 1.74 -> 1.75
ARMRegisterInfo.cpp updated: 1.25 -> 1.26
---
Log message:
implement load effective address similar to the alpha backend
remove lea_addri and the now unused memri addressing mode
---
Diffs of the changes: (+15 -82)
ARMAsmPrinter.cpp | 27 ---
ARMISelDAGToDAG.cpp | 45 +++--
ARMInstrInfo.td | 17 -
ARMRegisterInfo.cpp |8
4 files changed, 15 insertions(+), 82 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.28
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.29
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.28 Wed Nov 8 11:07:31 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Nov 9 07:58:55 2006
@@ -78,33 +78,6 @@
void printAddrMode1(const MachineInstr *MI, int opNum);
void printAddrMode2(const MachineInstr *MI, int opNum);
void printAddrMode5(const MachineInstr *MI, int opNum);
-
-void printMemRegImm(const MachineInstr *MI, int opNum,
- const char *Modifier = NULL) {
- const MachineOperand &MO1 = MI->getOperand(opNum);
- const MachineOperand &MO2 = MI->getOperand(opNum + 1);
- assert(MO1.isImmediate());
- bool arith = false;
- if (Modifier != NULL) {
- assert(strcmp(Modifier, "arith") == 0);
- arith = true;
- }
-
- if (MO2.isConstantPoolIndex()) {
- printOperand(MI, opNum + 1);
- } else if (MO2.isRegister()) {
- if(!arith)
- O << '[';
- printOperand(MI, opNum + 1);
- O << ", ";
- printOperand(MI, opNum);
- if(!arith)
- O << ']';
- } else {
- assert(0 && "Invalid Operand Type");
- }
-}
-
void printOperand(const MachineInstr *MI, int opNum);
void printMemOperand(const MachineInstr *MI, int opNum,
const char *Modifier = 0);
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.84
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.85
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.84Wed Nov 8 14:32:04 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Thu Nov 9 07:58:55 2006
@@ -751,8 +751,6 @@
SDNode *Select(SDOperand Op);
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
- bool SelectAddrRegImm(SDOperand Op, SDOperand N, SDOperand &Offset,
-SDOperand &Base);
bool SelectAddrMode1(SDOperand Op, SDOperand N, SDOperand &Arg,
SDOperand &Shift, SDOperand &ShiftType);
bool SelectAddrMode2(SDOperand Op, SDOperand N, SDOperand &Arg,
@@ -895,37 +893,6 @@
return true;
}
-//register plus/minus 12 bit offset
-bool ARMDAGToDAGISel::SelectAddrRegImm(SDOperand Op,
- SDOperand N, SDOperand &Offset,
- SDOperand &Base) {
- if (FrameIndexSDNode *FIN = dyn_cast(N)) {
-Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
-Offset = CurDAG->getTargetConstant(0, MVT::i32);
-return true;
- }
- if (N.getOpcode() == ISD::ADD) {
-short imm = 0;
-if (isInt12Immediate(N.getOperand(1), imm)) {
- Offset = CurDAG->getTargetConstant(imm, MVT::i32);
- if (FrameIndexSDNode *FI = dyn_cast(N.getOperand(0))) {
- Base = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType());
- } else {
- Base = N.getOperand(0);
- }
- return true; // [r+i]
-}
- }
-
- Offset = CurDAG->getTargetConstant(0, MVT::i32);
- if (FrameIndexSDNode *FI = dyn_cast(N)) {
-Base = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType());
- }
- else
-Base = N;
- return true; //any address fits in a register
-}
-
SDNode *ARMDAGToDAGISel::Select(SDOperand Op) {
SDNode *N = Op.Val;
@@ -933,8 +900,18 @@
default:
return SelectCode(Op);
break;
+ case ISD::FrameIndex: {
+int FI = cast(N)->getIndex();
+SDOperand Ops[] = {CurDAG->getTargetFrameIndex(FI, MVT::i32),
+ CurDAG->getTargetConstant(0, MVT::i32),
+ CurDAG->getTargetConstant(0, MVT::i32),
+ CurDAG->getTargetConstant(ARMShift::LSL, MVT::i32)};
+
+return CurDAG->SelectNodeTo(N, ARM::ADD, MVT::i32, Ops,
+sizeof(Ops)/sizeof(SDOperand));
+break;
+ }
}
- return NULL;
}
} // end anonymous namespace
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.74
llvm/lib/Target/ARM/ARMInstrInfo.td:1.75
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.74Wed Nov 8 11:07:32 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Thu Nov 9 07:58:55 2006
@@ -28,11 +28,6 @@
let MIOperandInfo = (ops ptr_rc, i32imm);
}
-def memri : Operand {
- let PrintMetho
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.td ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.27 -> 1.28
ARMISelDAGToDAG.cpp updated: 1.82 -> 1.83
ARMInstrInfo.td updated: 1.73 -> 1.74
ARMRegisterInfo.cpp updated: 1.24 -> 1.25
---
Log message:
initial implementation of addressing mode 2
TODO: fix lea_addri
---
Diffs of the changes: (+72 -15)
ARMAsmPrinter.cpp | 19 +++
ARMISelDAGToDAG.cpp | 32 +++-
ARMInstrInfo.td | 18 +-
ARMRegisterInfo.cpp | 18 +-
4 files changed, 72 insertions(+), 15 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.27
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.28
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.27 Thu Nov 2 09:00:02 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Nov 8 11:07:31 2006
@@ -76,6 +76,7 @@
}
void printAddrMode1(const MachineInstr *MI, int opNum);
+void printAddrMode2(const MachineInstr *MI, int opNum);
void printAddrMode5(const MachineInstr *MI, int opNum);
void printMemRegImm(const MachineInstr *MI, int opNum,
@@ -215,6 +216,24 @@
}
}
+void ARMAsmPrinter::printAddrMode2(const MachineInstr *MI, int opNum) {
+ const MachineOperand &Arg= MI->getOperand(opNum);
+ const MachineOperand &Offset = MI->getOperand(opNum + 1);
+ assert(Offset.isImmediate());
+
+ if (Arg.isConstantPoolIndex()) {
+assert(Offset.getImmedValue() == 0);
+printOperand(MI, opNum);
+ } else {
+assert(Arg.isRegister());
+O << '[';
+printOperand(MI, opNum);
+O << ", ";
+printOperand(MI, opNum + 1);
+O << ']';
+ }
+}
+
void ARMAsmPrinter::printAddrMode5(const MachineInstr *MI, int opNum) {
const MachineOperand &Arg= MI->getOperand(opNum);
const MachineOperand &Offset = MI->getOperand(opNum + 1);
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.82
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.83
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.82Thu Nov 2 09:00:02 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Wed Nov 8 11:07:32 2006
@@ -754,6 +754,7 @@
bool SelectAddrRegImm(SDOperand N, SDOperand &Offset, SDOperand &Base);
bool SelectAddrMode1(SDOperand N, SDOperand &Arg, SDOperand &Shift,
SDOperand &ShiftType);
+ bool SelectAddrMode2(SDOperand N, SDOperand &Arg, SDOperand &Offset);
bool SelectAddrMode5(SDOperand N, SDOperand &Arg, SDOperand &Offset);
// Include the pieces autogenerated from the target description.
@@ -820,7 +821,7 @@
int alignment = 2;
SDOperand Addr = CurDAG->getTargetConstantPool(C, MVT::i32, alignment);
SDOperandZ = CurDAG->getTargetConstant(0, MVT::i32);
- SDNode *n = CurDAG->getTargetNode(ARM::ldr, MVT::i32, Z, Addr);
+ SDNode *n = CurDAG->getTargetNode(ARM::LDR, MVT::i32, Addr, Z);
Arg= SDOperand(n, 0);
} else
Arg= CurDAG->getTargetConstant(val,MVT::i32);
@@ -852,6 +853,35 @@
return true;
}
+bool ARMDAGToDAGISel::SelectAddrMode2(SDOperand N, SDOperand &Arg,
+ SDOperand &Offset) {
+ //TODO: complete and cleanup!
+ SDOperand Zero = CurDAG->getTargetConstant(0, MVT::i32);
+ if (FrameIndexSDNode *FIN = dyn_cast(N)) {
+Arg= CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
+Offset = Zero;
+return true;
+ }
+ if (N.getOpcode() == ISD::ADD) {
+short imm = 0;
+if (isInt12Immediate(N.getOperand(1), imm)) {
+ Offset = CurDAG->getTargetConstant(imm, MVT::i32);
+ if (FrameIndexSDNode *FI = dyn_cast(N.getOperand(0))) {
+ Arg = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType());
+ } else {
+ Arg = N.getOperand(0);
+ }
+ return true; // [r+i]
+}
+ }
+ Offset = Zero;
+ if (FrameIndexSDNode *FI = dyn_cast(N))
+Arg = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType());
+ else
+Arg = N;
+ return true;
+}
+
bool ARMDAGToDAGISel::SelectAddrMode5(SDOperand N, SDOperand &Arg,
SDOperand &Offset) {
//TODO: detect offset
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.73
llvm/lib/Target/ARM/ARMInstrInfo.td:1.74
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.73Fri Nov 3 17:47:46 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Wed Nov 8 11:07:32 2006
@@ -18,6 +18,11 @@
let MIOperandInfo = (ops ptr_rc, ptr_rc, i32imm);
}
+def op_addr_mode2 : Operand {
+ let PrintMethod = "printAddrMode2";
+ let MIOperandInfo = (ops ptr_rc, i32imm);
+}
+
def op_addr_mode5 : Operand {
let PrintMethod = "printAddrMode5";
let MIOperandInfo = (ops ptr_rc, i32imm);
@@ -33,6 +38,9 @@
def addr_mode1 : ComplexPattern;
+//Addressing Mode 2: Load and Store Word or Unsigned Byte
+def addr_mode2 : ComplexPattern;
+
//Addressing Mode 5: VFP load/store
def addr
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.25 -> 1.26
---
Log message:
print null values in bss
---
Diffs of the changes: (+4 -2)
ARMAsmPrinter.cpp |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.25
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.26
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.25 Thu Oct 19 08:30:40 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Nov 1 08:26:44 2006
@@ -303,8 +303,10 @@
break;
}
- assert (!C->isNullValue());
- SwitchToDataSection(".data", I);
+ if (C->isNullValue())
+SwitchToDataSection(".bss", I);
+ else
+SwitchToDataSection(".data", I);
EmitAlignment(Align, I);
O << "\t.type " << name << ", %object\n";
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.24 -> 1.25
---
Log message:
print common symbols
---
Diffs of the changes: (+33 -17)
ARMAsmPrinter.cpp | 50 +-
1 files changed, 33 insertions(+), 17 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.24
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.25
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.24 Tue Oct 17 13:04:52 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Oct 19 08:30:40 2006
@@ -278,26 +278,42 @@
unsigned Size = TD->getTypeSize(C->getType());
unsigned Align = TD->getTypeAlignment(C->getType());
-switch (I->getLinkage()) {
-default:
- assert(0 && "Unknown linkage type!");
- break;
-case GlobalValue::ExternalLinkage:
- O << "\t.globl " << name << "\n";
- break;
-case GlobalValue::InternalLinkage:
- break;
-}
+if (C->isNullValue() &&
+(I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
+ I->hasWeakLinkage())) {
+ SwitchToDataSection(".data", I);
+ if (I->hasInternalLinkage())
+O << "\t.local " << name << "\n";
+
+ O << "\t.comm " << name << "," << TD->getTypeSize(C->getType())
+<< "," << (unsigned)TD->getTypeAlignment(C->getType());
+ O << "\t\t";
+ O << TAI->getCommentString() << " ";
+ WriteAsOperand(O, I, true, true, &M);
+ O << "\n";
+} else {
+ switch (I->getLinkage()) {
+ default:
+assert(0 && "Unknown linkage type!");
+break;
+ case GlobalValue::ExternalLinkage:
+O << "\t.globl " << name << "\n";
+break;
+ case GlobalValue::InternalLinkage:
+break;
+ }
-assert (!C->isNullValue());
-SwitchToDataSection(".data", I);
+ assert (!C->isNullValue());
+ SwitchToDataSection(".data", I);
-EmitAlignment(Align, I);
-O << "\t.type " << name << ", %object\n";
-O << "\t.size " << name << ", " << Size << "\n";
-O << name << ":\n";
-EmitGlobalConstant(C);
+ EmitAlignment(Align, I);
+ O << "\t.type " << name << ", %object\n";
+ O << "\t.size " << name << ", " << Size << "\n";
+ O << name << ":\n";
+ EmitGlobalConstant(C);
+}
}
+
AsmPrinter::doFinalization(M);
return false; // success
}
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.23 -> 1.24
ARMISelDAGToDAG.cpp updated: 1.71 -> 1.72
ARMInstrInfo.td updated: 1.60 -> 1.61
---
Log message:
initial implementation of addressing mode 5
---
Diffs of the changes: (+48 -11)
ARMAsmPrinter.cpp | 19 +++
ARMISelDAGToDAG.cpp |9 +
ARMInstrInfo.td | 31 ---
3 files changed, 48 insertions(+), 11 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.23
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.24
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.23 Mon Oct 16 16:10:32 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Oct 17 13:04:52 2006
@@ -55,6 +55,7 @@
}
void printAddrMode1(const MachineInstr *MI, int opNum);
+void printAddrMode5(const MachineInstr *MI, int opNum);
void printMemRegImm(const MachineInstr *MI, int opNum,
const char *Modifier = NULL) {
@@ -193,6 +194,24 @@
}
}
+void ARMAsmPrinter::printAddrMode5(const MachineInstr *MI, int opNum) {
+ const MachineOperand &Arg= MI->getOperand(opNum);
+ const MachineOperand &Offset = MI->getOperand(opNum + 1);
+ assert(Offset.isImmediate());
+
+ if (Arg.isConstantPoolIndex()) {
+assert(Offset.getImmedValue() == 0);
+printOperand(MI, opNum);
+ } else {
+assert(Arg.isRegister());
+O << '[';
+printOperand(MI, opNum);
+O << ", ";
+printOperand(MI, opNum + 1);
+O << ']';
+ }
+}
+
void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
const MachineOperand &MO = MI->getOperand (opNum);
const MRegisterInfo &RI = *TM.getRegisterInfo();
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.71
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.72
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.71Mon Oct 16 16:10:32 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Oct 17 13:04:52 2006
@@ -737,6 +737,7 @@
bool SelectAddrRegImm(SDOperand N, SDOperand &Offset, SDOperand &Base);
bool SelectAddrMode1(SDOperand N, SDOperand &Arg, SDOperand &Shift,
SDOperand &ShiftType);
+ bool SelectAddrMode5(SDOperand N, SDOperand &Arg, SDOperand &Offset);
// Include the pieces autogenerated from the target description.
#include "ARMGenDAGISel.inc"
@@ -835,6 +836,14 @@
return true;
}
+bool ARMDAGToDAGISel::SelectAddrMode5(SDOperand N, SDOperand &Arg,
+ SDOperand &Offset) {
+ //TODO: detect offset
+ Offset = CurDAG->getTargetConstant(0, MVT::i32);
+ Arg= N;
+ return true;
+}
+
//register plus/minus 12 bit offset
bool ARMDAGToDAGISel::SelectAddrRegImm(SDOperand N, SDOperand &Offset,
SDOperand &Base) {
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.60
llvm/lib/Target/ARM/ARMInstrInfo.td:1.61
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.60Tue Oct 17 08:36:07 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Tue Oct 17 13:04:52 2006
@@ -19,6 +19,12 @@
let MIOperandInfo = (ops ptr_rc, ptr_rc, i32imm);
}
+def op_addr_mode5 : Operand {
+ let PrintMethod = "printAddrMode5";
+ let NumMIOperands = 2;
+ let MIOperandInfo = (ops ptr_rc, i32imm);
+}
+
def memri : Operand {
let PrintMethod = "printMemRegImm";
let NumMIOperands = 2;
@@ -30,6 +36,9 @@
def addr_mode1 : ComplexPattern;
+//Addressing Mode 5: VFP load/store
+def addr_mode5 : ComplexPattern;
+
//register plus/minus 12 bit offset
def iaddr : ComplexPattern;
//register plus scaled register
@@ -285,22 +294,22 @@
def FDIVD : DFPBinOp<"fdivd", fdiv>;
// Floating Point Load
-def FLDS : InstARM<(ops FPRegs:$dst, IntRegs:$addr),
- "flds $dst, [$addr]",
- [(set FPRegs:$dst, (load IntRegs:$addr))]>;
-
-def FLDD : InstARM<(ops DFPRegs:$dst, IntRegs:$addr),
- "fldd $dst, [$addr]",
- [(set DFPRegs:$dst, (load IntRegs:$addr))]>;
+def FLDS : InstARM<(ops FPRegs:$dst, op_addr_mode5:$addr),
+ "flds $dst, $addr",
+ [(set FPRegs:$dst, (load addr_mode5:$addr))]>;
+
+def FLDD : InstARM<(ops DFPRegs:$dst, op_addr_mode5:$addr),
+ "fldd $dst, $addr",
+ [(set DFPRegs:$dst, (load addr_mode5:$addr))]>;
// Floating Point Store
-def FSTS: InstARM<(ops FPRegs:$src, IntRegs:$addr),
+def FSTS: InstARM<(ops FPRegs:$src, op_addr_mode5:$addr),
"fsts $src, [$addr]",
- [(store FPRegs:$src, IntRegs:$addr)]>;
+ [(store FPRegs:$src, addr_mode5:$addr)]>;
-def FSTD: InstARM<(ops DFPRegs:$src, IntRegs:$addr),
+def FSTD: InstARM<(ops DFPRegs:$src, op_addr_mode5:$addr),
"fstd $src, [$addr]",
- [(store DFPRegs:$src, IntRegs:$addr)]>;
+
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.22 -> 1.23
ARMISelDAGToDAG.cpp updated: 1.70 -> 1.71
ARMInstrInfo.td updated: 1.56 -> 1.57
---
Log message:
expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS
---
Diffs of the changes: (+20 -8)
ARMAsmPrinter.cpp |3 +--
ARMISelDAGToDAG.cpp | 15 +++
ARMInstrInfo.td | 10 --
3 files changed, 20 insertions(+), 8 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.22
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.23
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.22 Wed Oct 4 22:01:21 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Mon Oct 16 16:10:32 2006
@@ -216,8 +216,7 @@
}
break;
case MachineOperand::MO_ExternalSymbol:
-assert(0 && "not implemented");
-abort();
+O << TAI->getGlobalPrefix() << MO.getSymbolName();
break;
case MachineOperand::MO_ConstantPoolIndex:
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.70
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.71
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.70Sat Oct 14 12:59:54 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Oct 16 16:10:32 2006
@@ -72,6 +72,10 @@
setOperationAction(ISD::BRCOND,MVT::Other, Expand);
+ setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
+ setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
+ setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
+
setOperationAction(ISD::VASTART, MVT::Other, Custom);
setOperationAction(ISD::VAEND, MVT::Other, Expand);
@@ -321,11 +325,14 @@
Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
&MemOpChains[0], MemOpChains.size());
- // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
- // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
- // node so that legalize doesn't hack it.
+ // If the callee is a GlobalAddress node (quite common, every direct call is)
+ // turn it into a TargetGlobalAddress node so that legalize doesn't hack it.
+ // Likewise ExternalSymbol -> TargetExternalSymbol.
+ assert(Callee.getValueType() == MVT::i32);
if (GlobalAddressSDNode *G = dyn_cast(Callee))
-Callee = DAG.getTargetGlobalAddress(G->getGlobal(), Callee.getValueType());
+Callee = DAG.getTargetGlobalAddress(G->getGlobal(), MVT::i32);
+ else if (ExternalSymbolSDNode *E = dyn_cast(Callee))
+Callee = DAG.getTargetExternalSymbol(E->getSymbol(), MVT::i32);
// If this is a direct call, pass the chain and the callee.
assert (Callee.Val);
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.56
llvm/lib/Target/ARM/ARMInstrInfo.td:1.57
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.56Mon Oct 16 13:39:22 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Mon Oct 16 16:10:32 2006
@@ -128,8 +128,8 @@
def bx: InstARM<(ops), "bx r14", [(retflag)]>;
}
-let Defs = [R0, R1, R2, R3, R14] in {
- def bl: InstARM<(ops i32imm:$func, variable_ops), "bl $func", [(ARMcall
tglobaladdr:$func)]>;
+let noResults = 1, Defs = [R0, R1, R2, R3, R14] in {
+ def bl: InstARM<(ops i32imm:$func, variable_ops), "bl $func", []>;
}
def ldr : InstARM<(ops IntRegs:$dst, memri:$addr),
@@ -286,3 +286,9 @@
def FLDD : InstARM<(ops DFPRegs:$dst, IntRegs:$addr),
"fldd $dst, $addr",
[(set DFPRegs:$dst, (load IntRegs:$addr))]>;
+
+def : Pat<(ARMcall tglobaladdr:$dst),
+ (bl tglobaladdr:$dst)>;
+
+def : Pat<(ARMcall texternalsym:$dst),
+ (bl texternalsym:$dst)>;
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.21 -> 1.22 --- Log message: Pass the MachineFunction into EmitJumpTableInfo. --- Diffs of the changes: (+1 -1) ARMAsmPrinter.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.21 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.22 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.21 Wed Oct 4 21:49:23 2006 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Oct 4 22:01:21 2006 @@ -117,7 +117,7 @@ EmitConstantPool(MF.getConstantPool()); // Print out jump tables referenced by the function - EmitJumpTableInfo(MF.getJumpTableInfo()); + EmitJumpTableInfo(MF.getJumpTableInfo(), MF); // Print out labels for the function. const Function *F = MF.getFunction(); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.20 -> 1.21
---
Log message:
Use getSectionForFunction.
---
Diffs of the changes: (+2 -2)
ARMAsmPrinter.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.20
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.21
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.20 Wed Sep 13 07:09:43 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Oct 4 21:49:23 2006
@@ -121,13 +121,13 @@
// Print out labels for the function.
const Function *F = MF.getFunction();
+ SwitchToTextSection(getSectionForFunction(*F).c_str(), F);
+
switch (F->getLinkage()) {
default: assert(0 && "Unknown linkage type!");
case Function::InternalLinkage:
-SwitchToTextSection("\t.text", F);
break;
case Function::ExternalLinkage:
-SwitchToTextSection("\t.text", F);
O << "\t.globl\t" << CurrentFnName << "\n";
break;
case Function::WeakLinkage:
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.cpp ARMInstrInfo.td ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.18 -> 1.19
ARMISelDAGToDAG.cpp updated: 1.41 -> 1.42
ARMInstrInfo.cpp updated: 1.5 -> 1.6
ARMInstrInfo.td updated: 1.25 -> 1.26
ARMRegisterInfo.cpp updated: 1.17 -> 1.18
---
Log message:
partial implementation of the ARM Addressing Mode 1
---
Diffs of the changes: (+75 -38)
ARMAsmPrinter.cpp | 13 +++
ARMISelDAGToDAG.cpp | 21 ++-
ARMInstrInfo.cpp| 14 ++--
ARMInstrInfo.td | 57
ARMRegisterInfo.cpp |8 +++
5 files changed, 75 insertions(+), 38 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.18
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.19
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.18 Mon Sep 11 07:49:38 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Mon Sep 11 12:25:40 2006
@@ -54,6 +54,8 @@
return "ARM Assembly Printer";
}
+void printAddrMode1(const MachineInstr *MI, int opNum);
+
void printMemRegImm(const MachineInstr *MI, int opNum,
const char *Modifier = NULL) {
const MachineOperand &MO1 = MI->getOperand(opNum);
@@ -155,6 +157,17 @@
return false;
}
+void ARMAsmPrinter::printAddrMode1(const MachineInstr *MI, int opNum) {
+ const MachineOperand &MO1 = MI->getOperand(opNum);
+
+ if(MO1.isImmediate()) {
+printOperand(MI, opNum);
+ } else {
+assert(MO1.isRegister());
+printOperand(MI, opNum);
+ }
+}
+
void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
const MachineOperand &MO = MI->getOperand (opNum);
const MRegisterInfo &RI = *TM.getRegisterInfo();
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.41
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.42
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.41Mon Sep 4 14:05:01 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Sep 11 12:25:40 2006
@@ -386,7 +386,7 @@
SDOperandARMCC = DAG.getConstant(DAGCCToARMCC(CC), MVT::i32);
SDOperand Cmp = DAG.getNode(ARMISD::CMP, MVT::Flag, LHS, RHS);
- return DAG.getNode(ARMISD::SELECT, MVT::i32, FalseVal, TrueVal, ARMCC, Cmp);
+ return DAG.getNode(ARMISD::SELECT, MVT::i32, TrueVal, FalseVal, ARMCC, Cmp);
}
static SDOperand LowerBR_CC(SDOperand Op, SelectionDAG &DAG) {
@@ -445,6 +445,7 @@
SDNode *Select(SDOperand Op);
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
bool SelectAddrRegImm(SDOperand N, SDOperand &Offset, SDOperand &Base);
+ bool SelectAddrMode1(SDOperand N, SDOperand &Arg);
// Include the pieces autogenerated from the target description.
#include "ARMGenDAGISel.inc"
@@ -478,6 +479,24 @@
return isInt12Immediate(Op.Val, Imm);
}
+bool ARMDAGToDAGISel::SelectAddrMode1(SDOperand N,
+ SDOperand &Arg) {
+ switch(N.getOpcode()) {
+ case ISD::CopyFromReg:
+Arg= N;
+return true;
+ case ISD::Constant: {
+//TODO:check that we have a valid constant
+int32_t t = cast(N)->getValue();
+Arg = CurDAG->getTargetConstant(t, MVT::i32);
+return true;
+ }
+ default:
+std::cerr << "OpCode = " << N.getOpcode() << "\n";
+assert(0);
+ }
+}
+
//register plus/minus 12 bit offset
bool ARMDAGToDAGISel::SelectAddrRegImm(SDOperand N, SDOperand &Offset,
SDOperand &Base) {
Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp
diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.5
llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.6
--- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.5Tue Aug 8 15:35:03 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.cppMon Sep 11 12:25:40 2006
@@ -33,15 +33,15 @@
unsigned &SrcReg, unsigned &DstReg) const {
MachineOpCode oc = MI.getOpcode();
switch (oc) {
- default:
-return false;
- case ARM::movrr:
+ case ARM::MOV:
assert(MI.getNumOperands() == 2 &&
MI.getOperand(0).isRegister() &&
- MI.getOperand(1).isRegister() &&
"Invalid ARM MOV instruction");
-SrcReg = MI.getOperand(1).getReg();;
-DstReg = MI.getOperand(0).getReg();;
-return true;
+if (MI.getOperand(1).isRegister()) {
+ SrcReg = MI.getOperand(1).getReg();
+ DstReg = MI.getOperand(0).getReg();
+ return true;
+}
}
+ return false;
}
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.25
llvm/lib/Target/ARM/ARMInstrInfo.td:1.26
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.25Fri Sep 8 12:36:23 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Mon Sep 11 12:25:40 2006
@@ -13,6 +13,12 @@
//===--===//
// Address operands
+def op_addr_mode1 : Operand {
+ let PrintMethod = "printAddrMode1";
+ let NumMIOperands = 1;
+ let MIOperandInfo = (ops ptr_rc);
+}
+
def memri : Operand {
l
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.17 -> 1.18
---
Log message:
call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization
---
Diffs of the changes: (+1 -0)
ARMAsmPrinter.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.17
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.18
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.17 Sun Sep 10 16:17:03 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Mon Sep 11 07:49:38 2006
@@ -201,6 +201,7 @@
}
bool ARMAsmPrinter::doInitialization(Module &M) {
+ AsmPrinter::doInitialization(M);
return false; // success
}
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.16 -> 1.17
---
Log message:
Removed unnecessary Mangler creation.
---
Diffs of the changes: (+0 -1)
ARMAsmPrinter.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.16
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.17
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.16 Thu Sep 7 17:06:40 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Sun Sep 10 16:17:03 2006
@@ -201,7 +201,6 @@
}
bool ARMAsmPrinter::doInitialization(Module &M) {
- Mang = new Mangler(M);
return false; // success
}
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMTargetMachine.h
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.15 -> 1.16
ARMTargetMachine.h updated: 1.3 -> 1.4
---
Log message:
Make target asm info a property of the target machine.
---
Diffs of the changes: (+7 -15)
ARMAsmPrinter.cpp | 17 ++---
ARMTargetMachine.h |5 +
2 files changed, 7 insertions(+), 15 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.15
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.16
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.15 Wed Sep 6 13:34:40 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Sep 7 17:06:40 2006
@@ -38,20 +38,8 @@
namespace {
Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
- struct VISIBILITY_HIDDEN ARMTargetAsmInfo : public TargetAsmInfo {
-ARMTargetAsmInfo() {
- Data16bitsDirective = "\t.half\t";
- Data32bitsDirective = "\t.word\t";
- Data64bitsDirective = 0;
- ZeroDirective = "\t.skip\t";
- CommentString = "@";
- ConstantPoolSection = "\t.text\n";
- AlignmentIsInBytes = false;
-}
- };
-
struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
-ARMAsmPrinter(std::ostream &O, TargetMachine &TM, TargetAsmInfo *T)
+ARMAsmPrinter(std::ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
: AsmPrinter(O, TM, T) {
}
@@ -113,8 +101,7 @@
///
FunctionPass *llvm::createARMCodePrinterPass(std::ostream &o,
TargetMachine &tm) {
- ARMTargetAsmInfo *TAI = new ARMTargetAsmInfo();
- return new ARMAsmPrinter(o, tm, TAI);
+ return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo());
}
/// runOnMachineFunction - This uses the printMachineInstruction()
Index: llvm/lib/Target/ARM/ARMTargetMachine.h
diff -u llvm/lib/Target/ARM/ARMTargetMachine.h:1.3
llvm/lib/Target/ARM/ARMTargetMachine.h:1.4
--- llvm/lib/Target/ARM/ARMTargetMachine.h:1.3 Sun Sep 3 23:14:57 2006
+++ llvm/lib/Target/ARM/ARMTargetMachine.h Thu Sep 7 17:06:40 2006
@@ -20,6 +20,7 @@
#include "llvm/Target/TargetFrameInfo.h"
#include "ARMInstrInfo.h"
#include "ARMFrameInfo.h"
+#include "ARMTargetAsmInfo.h"
namespace llvm {
@@ -40,6 +41,10 @@
virtual const TargetData *getTargetData() const { return &DataLayout; }
static unsigned getModuleMatchQuality(const Module &M);
+ virtual const TargetAsmInfo *createTargetAsmInfo() const {
+return static_cast(new ARMTargetAsmInfo(*this));
+ }
+
// Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.14 -> 1.15
---
Log message:
Separate target specific asm properties from the asm printers.
---
Diffs of the changes: (+12 -4)
ARMAsmPrinter.cpp | 16
1 files changed, 12 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.14
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.15
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.14 Fri Aug 25 12:55:16 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Sep 6 13:34:40 2006
@@ -23,6 +23,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Mangler.h"
@@ -37,8 +38,8 @@
namespace {
Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
- struct ARMAsmPrinter : public AsmPrinter {
-ARMAsmPrinter(std::ostream &O, TargetMachine &TM) : AsmPrinter(O, TM) {
+ struct VISIBILITY_HIDDEN ARMTargetAsmInfo : public TargetAsmInfo {
+ARMTargetAsmInfo() {
Data16bitsDirective = "\t.half\t";
Data32bitsDirective = "\t.word\t";
Data64bitsDirective = 0;
@@ -47,6 +48,12 @@
ConstantPoolSection = "\t.text\n";
AlignmentIsInBytes = false;
}
+ };
+
+ struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
+ARMAsmPrinter(std::ostream &O, TargetMachine &TM, TargetAsmInfo *T)
+ : AsmPrinter(O, TM, T) {
+}
/// We name each basic block in a Function with a unique number, so
/// that we can consistently refer to them later. This is cleared
@@ -106,7 +113,8 @@
///
FunctionPass *llvm::createARMCodePrinterPass(std::ostream &o,
TargetMachine &tm) {
- return new ARMAsmPrinter(o, tm);
+ ARMTargetAsmInfo *TAI = new ARMTargetAsmInfo();
+ return new ARMAsmPrinter(o, tm, TAI);
}
/// runOnMachineFunction - This uses the printMachineInstruction()
@@ -187,7 +195,7 @@
abort();
break;
case MachineOperand::MO_ConstantPoolIndex:
-O << PrivateGlobalPrefix << "CPI" << getFunctionNumber()
+O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
<< '_' << MO.getConstantPoolIndex();
break;
default:
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMFrameInfo.h ARMISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.13 -> 1.14
ARMFrameInfo.h updated: 1.1 -> 1.2
ARMISelDAGToDAG.cpp updated: 1.36 -> 1.37
---
Log message:
use @ for comments
store LR in an arbitrary stack slot
add support for writing varargs functions
---
Diffs of the changes: (+61 -14)
ARMAsmPrinter.cpp |2 -
ARMFrameInfo.h |8 --
ARMISelDAGToDAG.cpp | 65
3 files changed, 61 insertions(+), 14 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.13
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.14
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.13 Thu Aug 24 11:13:15 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Fri Aug 25 12:55:16 2006
@@ -43,7 +43,7 @@
Data32bitsDirective = "\t.word\t";
Data64bitsDirective = 0;
ZeroDirective = "\t.skip\t";
- CommentString = "#";
+ CommentString = "@";
ConstantPoolSection = "\t.text\n";
AlignmentIsInBytes = false;
}
Index: llvm/lib/Target/ARM/ARMFrameInfo.h
diff -u llvm/lib/Target/ARM/ARMFrameInfo.h:1.1
llvm/lib/Target/ARM/ARMFrameInfo.h:1.2
--- llvm/lib/Target/ARM/ARMFrameInfo.h:1.1 Wed Aug 16 09:43:33 2006
+++ llvm/lib/Target/ARM/ARMFrameInfo.h Fri Aug 25 12:55:16 2006
@@ -22,20 +22,12 @@
namespace llvm {
class ARMFrameInfo: public TargetFrameInfo {
- std::pair LR[1];
public:
ARMFrameInfo()
: TargetFrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
-LR[0].first = ARM::R14;
-LR[0].second = -4;
}
- const std::pair *
- getCalleeSaveSpillSlots(unsigned &NumEntries) const {
-NumEntries = 1;
-return &LR[0];
- }
};
} // End llvm namespace
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.36
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.37
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.36Thu Aug 24 12:19:08 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Fri Aug 25 12:55:16 2006
@@ -32,6 +32,7 @@
namespace {
class ARMTargetLowering : public TargetLowering {
+int VarArgsFrameIndex;// FrameIndex for start of varargs area.
public:
ARMTargetLowering(TargetMachine &TM);
virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
@@ -55,6 +56,9 @@
setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
setOperationAction(ISD::BR_CC, MVT::i32, Custom);
+ setOperationAction(ISD::VASTART, MVT::Other, Custom);
+ setOperationAction(ISD::VAEND, MVT::Other, Expand);
+
setSchedulingPreference(SchedulingForRegPressure);
computeRegisterProperties();
}
@@ -238,6 +242,7 @@
}
static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
+ unsigned *vRegs,
unsigned ArgNo) {
MachineFunction &MF = DAG.getMachineFunction();
MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
@@ -253,6 +258,7 @@
if(ArgNo < num_regs) {
unsigned VReg = RegMap->createVirtualRegister(&ARM::IntRegsRegClass);
MF.addLiveIn(REGS[ArgNo], VReg);
+vRegs[ArgNo] = VReg;
return DAG.getCopyFromReg(Root, VReg, MVT::i32);
} else {
// If the argument is actually used, emit a load from the right stack
@@ -291,18 +297,65 @@
DAG.getSrcValue(NULL));
}
-static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) {
+static SDOperand LowerVASTART(SDOperand Op, SelectionDAG &DAG,
+ unsigned VarArgsFrameIndex) {
+ // vastart just stores the address of the VarArgsFrameIndex slot into the
+ // memory location argument.
+ MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
+ SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
+ return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR,
+ Op.getOperand(1), Op.getOperand(2));
+}
+
+static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
+ int &VarArgsFrameIndex) {
std::vector ArgValues;
SDOperand Root = Op.getOperand(0);
+ unsigned VRegs[4];
- for (unsigned ArgNo = 0, e = Op.Val->getNumValues()-1; ArgNo != e; ++ArgNo) {
-SDOperand ArgVal = LowerFORMAL_ARGUMENT(Op, DAG, ArgNo);
+ unsigned NumArgs = Op.Val->getNumValues()-1;
+ for (unsigned ArgNo = 0; ArgNo < NumArgs; ++ArgNo) {
+SDOperand ArgVal = LowerFORMAL_ARGUMENT(Op, DAG, VRegs, ArgNo);
ArgValues.push_back(ArgVal);
}
bool isVarArg = cast(Op.getOperand(2))->getValue() != 0;
- assert(!isVarArg);
+ if (isVarArg) {
+MachineFunction &MF = DAG.getMachineFunction();
+SSARegMap *RegMap = MF.getSSARegMap();
+MachineFrameInfo *MFI = MF.getFrameInfo();
+VarArgsFrameIndex = MFI->CreateFixedObject(MVT::getSizeInBits(MVT::i32)/8,
+ -16 + NumArgs * 4);
+
+
+static const unsigne
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.11 -> 1.12
ARMISelDAGToDAG.cpp updated: 1.33 -> 1.34
ARMInstrInfo.td updated: 1.18 -> 1.19
---
Log message:
initial support for branches
---
Diffs of the changes: (+30 -3)
ARMAsmPrinter.cpp |3 +--
ARMISelDAGToDAG.cpp | 21 -
ARMInstrInfo.td |9 +
3 files changed, 30 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.11
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.12
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.11 Thu Aug 17 12:09:40 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Aug 24 08:45:54 2006
@@ -174,8 +174,7 @@
O << "#" << (int)MO.getImmedValue();
break;
case MachineOperand::MO_MachineBasicBlock:
-assert(0 && "not implemented");
-abort();
+printBasicBlockLabel(MO.getMachineBasicBlock());
return;
case MachineOperand::MO_GlobalAddress: {
GlobalValue *GV = MO.getGlobal();
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.33
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.34
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.33Mon Aug 21 17:00:32 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Thu Aug 24 08:45:54 2006
@@ -53,6 +53,7 @@
setOperationAction(ISD::SETCC, MVT::i32, Expand);
setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
+ setOperationAction(ISD::BR_CC, MVT::i32, Custom);
setSchedulingPreference(SchedulingForRegPressure);
computeRegisterProperties();
@@ -71,7 +72,9 @@
CMP,
- SELECT
+ SELECT,
+
+ BR
};
}
}
@@ -83,6 +86,7 @@
case ARMISD::RET_FLAG: return "ARMISD::RET_FLAG";
case ARMISD::SELECT:return "ARMISD::SELECT";
case ARMISD::CMP: return "ARMISD::CMP";
+ case ARMISD::BR:return "ARMISD::BR";
}
}
@@ -312,6 +316,19 @@
return DAG.getNode(ARMISD::SELECT, MVT::i32, FalseVal, TrueVal, Cmp);
}
+static SDOperand LowerBR_CC(SDOperand Op, SelectionDAG &DAG) {
+ SDOperand Chain = Op.getOperand(0);
+ ISD::CondCode CC = cast(Op.getOperand(1))->get();
+ SDOperandLHS = Op.getOperand(2);
+ SDOperandRHS = Op.getOperand(3);
+ SDOperand Dest = Op.getOperand(4);
+
+ assert(CC == ISD::SETNE);
+
+ SDOperand Cmp = DAG.getNode(ARMISD::CMP, MVT::Flag, LHS, RHS);
+ return DAG.getNode(ARMISD::BR, MVT::Other, Chain, Dest, Cmp);
+}
+
SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
switch (Op.getOpcode()) {
default:
@@ -329,6 +346,8 @@
return LowerRET(Op, DAG);
case ISD::SELECT_CC:
return LowerSELECT_CC(Op, DAG);
+ case ISD::BR_CC:
+return LowerBR_CC(Op, DAG);
}
}
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.18
llvm/lib/Target/ARM/ARMInstrInfo.td:1.19
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.18Mon Aug 21 17:00:32 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Thu Aug 24 08:45:55 2006
@@ -37,6 +37,8 @@
let Pattern = pattern;
}
+def brtarget : Operand;
+
def SDT_ARMCallSeq : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>;
def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeq,
[SDNPHasChain, SDNPOutFlag]>;
@@ -50,6 +52,9 @@
[SDNPHasChain, SDNPOptInFlag]>;
def armselect : SDNode<"ARMISD::SELECT", SDTIntBinOp, [SDNPInFlag,
SDNPOutFlag]>;
+def SDTarmbr : SDTypeProfile<0, 1, [SDTCisVT<0, OtherVT>]>;
+def armbr : SDNode<"ARMISD::BR", SDTarmbr, [SDNPHasChain,
SDNPInFlag]>;
+
def SDTVoidBinOp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
def armcmp : SDNode<"ARMISD::CMP", SDTVoidBinOp, [SDNPOutFlag]>;
@@ -107,6 +112,10 @@
[(set IntRegs:$dst, (armselect IntRegs:$true,
IntRegs:$false))]>;
}
+def bne: InstARM<(ops brtarget:$dst),
+"bne $dst",
+[(armbr bb:$dst)]>;
+
def cmp : InstARM<(ops IntRegs:$a, IntRegs:$b),
"cmp $a, $b",
[(armcmp IntRegs:$a, IntRegs:$b)]>;
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.td ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.10 -> 1.11
ARMISelDAGToDAG.cpp updated: 1.30 -> 1.31
ARMInstrInfo.td updated: 1.15 -> 1.16
ARMRegisterInfo.cpp updated: 1.15 -> 1.16
---
Log message:
add a "load effective address"
---
Diffs of the changes: (+30 -10)
ARMAsmPrinter.cpp | 24
ARMISelDAGToDAG.cpp |5 +
ARMInstrInfo.td |8 +++-
ARMRegisterInfo.cpp |3 ++-
4 files changed, 30 insertions(+), 10 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.10
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.11
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.10 Tue Aug 1 13:53:10 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Aug 17 12:09:40 2006
@@ -59,19 +59,27 @@
return "ARM Assembly Printer";
}
-void printMemRegImm(const MachineInstr *MI, unsigned OpNo) {
- const MachineOperand &MO1 = MI->getOperand(OpNo);
- const MachineOperand &MO2 = MI->getOperand(OpNo + 1);
+void printMemRegImm(const MachineInstr *MI, int opNum,
+ const char *Modifier = NULL) {
+ const MachineOperand &MO1 = MI->getOperand(opNum);
+ const MachineOperand &MO2 = MI->getOperand(opNum + 1);
assert(MO1.isImmediate());
+ bool arith = false;
+ if (Modifier != NULL) {
+ assert(strcmp(Modifier, "arith") == 0);
+ arith = true;
+ }
if (MO2.isConstantPoolIndex()) {
- printOperand(MI, OpNo + 1);
+ printOperand(MI, opNum + 1);
} else if (MO2.isRegister()) {
- O << '[';
- printOperand(MI, OpNo + 1);
+ if(!arith)
+ O << '[';
+ printOperand(MI, opNum + 1);
O << ", ";
- printOperand(MI, OpNo);
- O << ']';
+ printOperand(MI, opNum);
+ if(!arith)
+ O << ']';
} else {
assert(0 && "Invalid Operand Type");
}
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.30
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.31
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.30Wed Aug 16 09:43:33 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Thu Aug 17 12:09:40 2006
@@ -358,6 +358,11 @@
//register plus/minus 12 bit offset
bool ARMDAGToDAGISel::SelectAddrRegImm(SDOperand N, SDOperand &Offset,
SDOperand &Base) {
+ if (FrameIndexSDNode *FIN = dyn_cast(N)) {
+Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
+Offset = CurDAG->getTargetConstant(0, MVT::i32);
+return true;
+ }
if (N.getOpcode() == ISD::ADD) {
short imm = 0;
if (isInt12Immediate(N.getOperand(1), imm)) {
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.15
llvm/lib/Target/ARM/ARMInstrInfo.td:1.16
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.15Wed Aug 16 09:43:33 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Thu Aug 17 12:09:40 2006
@@ -21,7 +21,7 @@
// Define ARM specific addressing mode.
//register plus/minus 12 bit offset
-def iaddr : ComplexPattern;
+def iaddr : ComplexPattern;
//register plus scaled register
//def raddr : ComplexPattern;
@@ -83,6 +83,12 @@
"add $dst, $a, $b",
[(set IntRegs:$dst, (add IntRegs:$a, imm:$b))]>;
+// "LEA" forms of add
+def lea_addri : InstARM<(ops IntRegs:$dst, memri:$addr),
+"add $dst, ${addr:arith}",
+[(set IntRegs:$dst, iaddr:$addr)]>;
+
+
def subri : InstARM<(ops IntRegs:$dst, IntRegs:$a, i32imm:$b),
"sub $dst, $a, $b",
[(set IntRegs:$dst, (sub IntRegs:$a, imm:$b))]>;
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.15
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.16
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.15Wed Aug 16 09:43:33 2006
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Thu Aug 17 12:09:40 2006
@@ -89,7 +89,8 @@
MachineFunction &MF = *MBB.getParent();
assert (MI.getOpcode() == ARM::ldr ||
- MI.getOpcode() == ARM::str);
+ MI.getOpcode() == ARM::str ||
+ MI.getOpcode() == ARM::lea_addri);
unsigned FrameIdx = 2;
unsigned OffIdx = 1;
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.9 -> 1.10
ARMInstrInfo.td updated: 1.10 -> 1.11
---
Log message:
start comments with #
move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save
---
Diffs of the changes: (+21 -7)
ARMAsmPrinter.cpp | 22 +-
ARMInstrInfo.td |6 --
2 files changed, 21 insertions(+), 7 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.9
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.10
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.9 Tue Aug 1 07:58:43 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Aug 1 13:53:10 2006
@@ -43,8 +43,8 @@
Data32bitsDirective = "\t.word\t";
Data64bitsDirective = 0;
ZeroDirective = "\t.skip\t";
- CommentString = "!";
- ConstantPoolSection = "\t.section \".rodata\",#alloc\n";
+ CommentString = "#";
+ ConstantPoolSection = "\t.text\n";
AlignmentIsInBytes = false;
}
@@ -60,9 +60,21 @@
}
void printMemRegImm(const MachineInstr *MI, unsigned OpNo) {
- printOperand(MI, OpNo + 1);
- O << ", ";
- printOperand(MI, OpNo);
+ const MachineOperand &MO1 = MI->getOperand(OpNo);
+ const MachineOperand &MO2 = MI->getOperand(OpNo + 1);
+ assert(MO1.isImmediate());
+
+ if (MO2.isConstantPoolIndex()) {
+ printOperand(MI, OpNo + 1);
+ } else if (MO2.isRegister()) {
+ O << '[';
+ printOperand(MI, OpNo + 1);
+ O << ", ";
+ printOperand(MI, OpNo);
+ O << ']';
+ } else {
+ assert(0 && "Invalid Operand Type");
+ }
}
void printOperand(const MachineInstr *MI, int opNum);
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.10
llvm/lib/Target/ARM/ARMInstrInfo.td:1.11
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.10Fri Jul 21 07:26:16 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Tue Aug 1 13:53:10 2006
@@ -57,10 +57,12 @@
def bx: InstARM<(ops IntRegs:$dst), "bx $dst", [(brind IntRegs:$dst)]>;
}
-def bl: InstARM<(ops i32imm:$func, variable_ops), "bl $func", [(ARMcall
tglobaladdr:$func)]>;
+let Defs = [R0, R1, R2, R3] in {
+ def bl: InstARM<(ops i32imm:$func, variable_ops), "bl $func", [(ARMcall
tglobaladdr:$func)]>;
+}
def ldr : InstARM<(ops IntRegs:$dst, memri:$addr),
- "ldr $dst, [$addr]",
+ "ldr $dst, $addr",
[(set IntRegs:$dst, (load iaddr:$addr))]>;
def str : InstARM<(ops IntRegs:$src, IntRegs:$addr),
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.8 -> 1.9
ARMISelDAGToDAG.cpp updated: 1.18 -> 1.19
---
Log message:
implement LowerConstantPool and LowerGlobalAddress
---
Diffs of the changes: (+26 -3)
ARMAsmPrinter.cpp |4 ++--
ARMISelDAGToDAG.cpp | 25 -
2 files changed, 26 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.8
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.9
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.8 Mon Jul 31 15:38:13 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Aug 1 07:58:43 2006
@@ -168,8 +168,8 @@
abort();
break;
case MachineOperand::MO_ConstantPoolIndex:
-assert(0 && "not implemented");
-abort();
+O << PrivateGlobalPrefix << "CPI" << getFunctionNumber()
+ << '_' << MO.getConstantPoolIndex();
break;
default:
O << ""; abort (); break;
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.18
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.19
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.18Thu Jul 27 19:46:15 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Aug 1 07:58:43 2006
@@ -41,7 +41,9 @@
ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
: TargetLowering(TM) {
- setOperationAction(ISD::RET, MVT::Other, Custom);
+ setOperationAction(ISD::RET, MVT::Other, Custom);
+ setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
+ setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
}
namespace llvm {
@@ -218,6 +220,23 @@
}
}
+static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) {
+ MVT::ValueType PtrVT = Op.getValueType();
+ ConstantPoolSDNode *CP = cast(Op);
+ Constant *C = CP->get();
+ SDOperand CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment());
+
+ return CPI;
+}
+
+static SDOperand LowerGlobalAddress(SDOperand Op,
+ SelectionDAG &DAG) {
+ GlobalValue *GV = cast(Op)->getGlobal();
+ SDOperand CPAddr = DAG.getConstantPool(GV, MVT::i32, 2);
+ return DAG.getLoad(MVT::i32, DAG.getEntryNode(), CPAddr,
+DAG.getSrcValue(NULL));
+}
+
static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) {
std::vector ArgValues;
SDOperand Root = Op.getOperand(0);
@@ -244,6 +263,10 @@
default:
assert(0 && "Should not custom lower this!");
abort();
+ case ISD::ConstantPool:
+return LowerConstantPool(Op, DAG);
+ case ISD::GlobalAddress:
+return LowerGlobalAddress(Op, DAG);
case ISD::FORMAL_ARGUMENTS:
return LowerFORMAL_ARGUMENTS(Op, DAG);
case ISD::CALL:
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.7 -> 1.8
---
Log message:
handle GlobalValue::InternalLinkage in doFinalization
---
Diffs of the changes: (+10 -2)
ARMAsmPrinter.cpp | 12 ++--
1 files changed, 10 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.7
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.8
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.7 Thu Jul 27 06:38:51 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Mon Jul 31 15:38:13 2006
@@ -207,8 +207,16 @@
unsigned Size = TD->getTypeSize(C->getType());
unsigned Align = TD->getTypeAlignment(C->getType());
-assert (I->getLinkage() == GlobalValue::ExternalLinkage);
-O << "\t.globl " << name << "\n";
+switch (I->getLinkage()) {
+default:
+ assert(0 && "Unknown linkage type!");
+ break;
+case GlobalValue::ExternalLinkage:
+ O << "\t.globl " << name << "\n";
+ break;
+case GlobalValue::InternalLinkage:
+ break;
+}
assert (!C->isNullValue());
SwitchToDataSection(".data", I);
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.6 -> 1.7
---
Log message:
emit global constants
---
Diffs of the changes: (+29 -0)
ARMAsmPrinter.cpp | 29 +
1 files changed, 29 insertions(+)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.6
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.7
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.6 Sat Jul 15 20:02:57 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu Jul 27 06:38:51 2006
@@ -23,6 +23,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Mangler.h"
#include "llvm/ADT/Statistic.h"
@@ -190,6 +191,34 @@
}
bool ARMAsmPrinter::doFinalization(Module &M) {
+ const TargetData *TD = TM.getTargetData();
+
+ for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
+ I != E; ++I) {
+if (!I->hasInitializer()) // External global require no code
+ continue;
+
+if (EmitSpecialLLVMGlobal(I))
+ continue;
+
+O << "\n\n";
+std::string name = Mang->getValueName(I);
+Constant *C = I->getInitializer();
+unsigned Size = TD->getTypeSize(C->getType());
+unsigned Align = TD->getTypeAlignment(C->getType());
+
+assert (I->getLinkage() == GlobalValue::ExternalLinkage);
+O << "\t.globl " << name << "\n";
+
+assert (!C->isNullValue());
+SwitchToDataSection(".data", I);
+
+EmitAlignment(Align, I);
+O << "\t.type " << name << ", %object\n";
+O << "\t.size " << name << ", " << Size << "\n";
+O << name << ":\n";
+EmitGlobalConstant(C);
+ }
AsmPrinter::doFinalization(M);
return false; // success
}
___
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.5 -> 1.6
ARMISelDAGToDAG.cpp updated: 1.15 -> 1.16
ARMInstrInfo.td updated: 1.7 -> 1.8
---
Log message:
skeleton of a lowerCall implementation for ARM
---
Diffs of the changes: (+79 -5)
ARMAsmPrinter.cpp |8 +++--
ARMISelDAGToDAG.cpp | 70 ++--
ARMInstrInfo.td |6
3 files changed, 79 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.5
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.6
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.5 Tue Jul 11 06:36:48 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Sat Jul 15 20:02:57 2006
@@ -156,9 +156,11 @@
assert(0 && "not implemented");
abort();
return;
- case MachineOperand::MO_GlobalAddress:
-assert(0 && "not implemented");
-abort();
+ case MachineOperand::MO_GlobalAddress: {
+GlobalValue *GV = MO.getGlobal();
+std::string Name = Mang->getValueName(GV);
+O << Name;
+ }
break;
case MachineOperand::MO_ExternalSymbol:
assert(0 && "not implemented");
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.15
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.16
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.15Tue Jul 11 06:36:48 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Sat Jul 15 20:02:57 2006
@@ -13,6 +13,7 @@
#include "ARM.h"
#include "ARMTargetMachine.h"
+#include "llvm/CallingConv.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Function.h"
#include "llvm/Intrinsics.h"
@@ -33,6 +34,7 @@
public:
ARMTargetLowering(TargetMachine &TM);
virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
+virtual const char *getTargetNodeName(unsigned Opcode) const;
};
}
@@ -42,9 +44,73 @@
setOperationAction(ISD::RET, MVT::Other, Custom);
}
+namespace llvm {
+ namespace ARMISD {
+enum NodeType {
+ // Start the numbering where the builting ops and target ops leave off.
+ FIRST_NUMBER = ISD::BUILTIN_OP_END+ARM::INSTRUCTION_LIST_END,
+ /// CALL - A direct function call.
+ CALL
+};
+ }
+}
+
+const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const {
+ switch (Opcode) {
+ default: return 0;
+ case ARMISD::CALL: return "ARMISD::CALL";
+ }
+}
+
+// This transforms a ISD::CALL node into a
+// callseq_star <- ARMISD:CALL <- callseq_end
+// chain
static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
- assert(0 && "Not implemented");
- abort();
+ SDOperand Chain= Op.getOperand(0);
+ unsigned CallConv = cast(Op.getOperand(1))->getValue();
+ assert(CallConv == CallingConv::C && "unknown calling convention");
+ bool isVarArg = cast(Op.getOperand(2))->getValue() != 0;
+ assert(isVarArg == false && "VarArg not supported");
+ bool isTailCall= cast(Op.getOperand(3))->getValue() != 0;
+ assert(isTailCall == false && "tail call not supported");
+ SDOperand Callee = Op.getOperand(4);
+ unsigned NumOps= (Op.getNumOperands() - 5) / 2;
+ assert(NumOps == 0);
+
+ // Count how many bytes are to be pushed on the stack. Initially
+ // only the link register.
+ unsigned NumBytes = 4;
+
+ // Adjust the stack pointer for the new arguments...
+ // These operations are automatically eliminated by the prolog/epilog pass
+ Chain = DAG.getCALLSEQ_START(Chain,
+ DAG.getConstant(NumBytes, MVT::i32));
+
+ std::vector NodeTys;
+ NodeTys.push_back(MVT::Other); // Returns a chain
+ NodeTys.push_back(MVT::Flag);// Returns a flag for retval copy to use.
+
+ // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
+ // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
+ // node so that legalize doesn't hack it.
+ if (GlobalAddressSDNode *G = dyn_cast(Callee))
+Callee = DAG.getTargetGlobalAddress(G->getGlobal(), Callee.getValueType());
+
+ // If this is a direct call, pass the chain and the callee.
+ assert (Callee.Val);
+ std::vector Ops;
+ Ops.push_back(Chain);
+ Ops.push_back(Callee);
+
+ unsigned CallOpc = ARMISD::CALL;
+ Chain = DAG.getNode(CallOpc, NodeTys, Ops);
+
+ assert(Op.Val->getValueType(0) == MVT::Other);
+
+ Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain,
+ DAG.getConstant(NumBytes, MVT::i32));
+
+ return Chain;
}
static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) {
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.7
llvm/lib/Target/ARM/ARMInstrInfo.td:1.8
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.7 Tue Jul 11 06:36:48 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Sat Jul 15 20:02:57 2006
@@ -41,6 +41,10 @@
def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeq,
[SDNPHasChain]>;
def callseq_end: SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeq,
[SDNP
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.td ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.4 -> 1.5
ARMISelDAGToDAG.cpp updated: 1.14 -> 1.15
ARMInstrInfo.td updated: 1.6 -> 1.7
ARMRegisterInfo.cpp updated: 1.6 -> 1.7
---
Log message:
add the memri memory operand
this makes it possible for ldr instructions with non-zero immediate
---
Diffs of the changes: (+42 -14)
ARMAsmPrinter.cpp |6 ++
ARMISelDAGToDAG.cpp |7 +--
ARMInstrInfo.td | 17 +
ARMRegisterInfo.cpp | 26 ++
4 files changed, 42 insertions(+), 14 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.4
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.5
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.4 Fri May 26 05:56:17 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Tue Jul 11 06:36:48 2006
@@ -58,6 +58,12 @@
return "ARM Assembly Printer";
}
+void printMemRegImm(const MachineInstr *MI, unsigned OpNo) {
+ printOperand(MI, OpNo + 1);
+ O << ", ";
+ printOperand(MI, OpNo);
+}
+
void printOperand(const MachineInstr *MI, int opNum);
void printMemOperand(const MachineInstr *MI, int opNum,
const char *Modifier = 0);
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.14
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.15
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.14Sun Jul 9 20:41:35 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Jul 11 06:36:48 2006
@@ -164,7 +164,7 @@
void Select(SDOperand &Result, SDOperand Op);
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
- bool SelectAddrReg(SDOperand N, SDOperand &Base);
+ bool SelectAddrRegImm(SDOperand N, SDOperand &Offset, SDOperand &Base);
// Include the pieces autogenerated from the target description.
#include "ARMGenDAGISel.inc"
@@ -183,7 +183,10 @@
ScheduleAndEmitDAG(DAG);
}
-bool ARMDAGToDAGISel::SelectAddrReg(SDOperand N, SDOperand &Base) {
+//register plus/minus 12 bit offset
+bool ARMDAGToDAGISel::SelectAddrRegImm(SDOperand N, SDOperand &Offset,
+ SDOperand &Base) {
+ Offset = CurDAG->getTargetConstant(0, MVT::i32);
if (FrameIndexSDNode *FI = dyn_cast(N)) {
Base = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType());
}
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.6
llvm/lib/Target/ARM/ARMInstrInfo.td:1.7
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.6 Sun Jul 9 20:41:35 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Tue Jul 11 06:36:48 2006
@@ -12,9 +12,18 @@
//
//===--===//
+// Address operands
+def memri : Operand {
+ let PrintMethod = "printMemRegImm";
+ let NumMIOperands = 2;
+ let MIOperandInfo = (ops i32imm, ptr_rc);
+}
+
// Define ARM specific addressing mode.
- //register or frame index
-def raddr : ComplexPattern;
+//register plus/minus 12 bit offset
+def iaddr : ComplexPattern;
+//register plus scaled register
+//def raddr : ComplexPattern;
//===--===//
// Instructions
@@ -42,9 +51,9 @@
def bxr: InstARM<(ops IntRegs:$dst), "bx $dst", [(brind IntRegs:$dst)]>;
-def ldr : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
+def ldr : InstARM<(ops IntRegs:$dst, memri:$addr),
"ldr $dst, [$addr]",
- [(set IntRegs:$dst, (load raddr:$addr))]>;
+ [(set IntRegs:$dst, (load iaddr:$addr))]>;
def str : InstARM<(ops IntRegs:$src, IntRegs:$addr),
"str $src, [$addr]",
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.6
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.7
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.6 Sun Jul 9 20:41:35 2006
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Tue Jul 11 06:36:48 2006
@@ -83,23 +83,33 @@
assert (MI.getOpcode() == ARM::ldr);
- unsigned FrameIdx = 1;
+ unsigned FrameIdx = 2;
+ unsigned OffIdx = 1;
int FrameIndex = MI.getOperand(FrameIdx).getFrameIndex();
int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
+ assert (MI.getOperand(OffIdx).getImmedValue() == 0);
unsigned StackSize = MF.getFrameInfo()->getStackSize();
Offset += StackSize;
- // Insert a set of r12 with the full address
- // r12 = r13 + offset
- MachineBasicBlock *MBB2 = MI.getParent();
- BuildMI(*MBB2, II, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(Offset);
-
- // Replace the FrameIndex with r12
- MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12);
+ assert (Offset >= 0);
+ if (Offset < 4096) {
+// Replace the FrameIndex with r13
+MI.getOperand(FrameIdx).ChangeToRegister(ARM::R13);
+// Replace the ldr offset with Offset
+MI.getOperand(OffIdx).ChangeToImmediate(Offset);
+ } else {
+
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.3 -> 1.4 ARMInstrInfo.td updated: 1.2 -> 1.3 --- Log message: On ARM, alignment is in bits Add lr as a hard coded operand of bx --- Diffs of the changes: (+7 -2) ARMAsmPrinter.cpp |3 ++- ARMInstrInfo.td |6 +- 2 files changed, 7 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.3 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.4 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.3 Thu May 25 07:57:06 2006 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Fri May 26 05:56:17 2006 @@ -44,6 +44,7 @@ ZeroDirective = "\t.skip\t"; CommentString = "!"; ConstantPoolSection = "\t.section \".rodata\",#alloc\n"; + AlignmentIsInBytes = false; } /// We name each basic block in a Function with a unique number, so @@ -110,7 +111,7 @@ assert(0 && "Not implemented"); break; } - EmitAlignment(4, F); + EmitAlignment(2, F); O << CurrentFnName << ":\n"; // Print out code for the function. Index: llvm/lib/Target/ARM/ARMInstrInfo.td diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.2 llvm/lib/Target/ARM/ARMInstrInfo.td:1.3 --- llvm/lib/Target/ARM/ARMInstrInfo.td:1.2 Thu May 18 16:45:49 2006 +++ llvm/lib/Target/ARM/ARMInstrInfo.td Fri May 26 05:56:17 2006 @@ -42,7 +42,11 @@ "!ADJCALLSTACKDOWN $amt", [(callseq_start imm:$amt)]>; -def BX: InstARM<(ops), "bx", [(retflag)]>; +//bx supports other registers as operands. So this looks like a +//hack. Maybe a ret should be expanded to a "branch lr" and bx +//declared as a regular instruction + +def BX: InstARM<(ops), "bx lr", [(retflag)]>; def ldr : InstARM<(ops IntRegs:$dst, IntRegs:$addr), "ldr $dst, [$addr]", ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.2 -> 1.3
---
Log message:
implement initial version of ARMAsmPrinter::printOperand
---
Diffs of the changes: (+31 -1)
ARMAsmPrinter.cpp | 32 +++-
1 files changed, 31 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.2
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.3
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.2 Mon May 22 21:48:20 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Thu May 25 07:57:06 2006
@@ -133,7 +133,37 @@
}
void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
- assert(0 && "not implemented");
+ const MachineOperand &MO = MI->getOperand (opNum);
+ const MRegisterInfo &RI = *TM.getRegisterInfo();
+ switch (MO.getType()) {
+ case MachineOperand::MO_Register:
+if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
+ O << LowercaseString (RI.get(MO.getReg()).Name);
+else
+ assert(0 && "not implemented");
+break;
+ case MachineOperand::MO_Immediate:
+O << "#" << (int)MO.getImmedValue();
+break;
+ case MachineOperand::MO_MachineBasicBlock:
+assert(0 && "not implemented");
+abort();
+return;
+ case MachineOperand::MO_GlobalAddress:
+assert(0 && "not implemented");
+abort();
+break;
+ case MachineOperand::MO_ExternalSymbol:
+assert(0 && "not implemented");
+abort();
+break;
+ case MachineOperand::MO_ConstantPoolIndex:
+assert(0 && "not implemented");
+abort();
+break;
+ default:
+O << ""; abort (); break;
+ }
}
void ARMAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp ARMISelDAGToDAG.cpp ARMInstrInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.1 -> 1.2
ARMISelDAGToDAG.cpp updated: 1.3 -> 1.4
ARMInstrInfo.cpp updated: 1.1 -> 1.2
---
Log message:
implement minimal versions of
ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr
---
Diffs of the changes: (+80 -9)
ARMAsmPrinter.cpp | 47 ---
ARMISelDAGToDAG.cpp | 37 -
ARMInstrInfo.cpp|5 -
3 files changed, 80 insertions(+), 9 deletions(-)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.1
llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.2
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.1 Sun May 14 17:18:28 2006
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Mon May 22 21:48:20 2006
@@ -85,8 +85,50 @@
/// method to print assembly for each instruction.
///
bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
- assert(0 && "not implemented");
- // We didn't modify anything.
+ SetupMachineFunction(MF);
+ O << "\n\n";
+
+ // Print out constants referenced by the function
+ EmitConstantPool(MF.getConstantPool());
+
+ // Print out jump tables referenced by the function
+ EmitJumpTableInfo(MF.getJumpTableInfo());
+
+ // Print out labels for the function.
+ const Function *F = MF.getFunction();
+ switch (F->getLinkage()) {
+ default: assert(0 && "Unknown linkage type!");
+ case Function::InternalLinkage:
+SwitchToTextSection("\t.text", F);
+break;
+ case Function::ExternalLinkage:
+SwitchToTextSection("\t.text", F);
+O << "\t.globl\t" << CurrentFnName << "\n";
+break;
+ case Function::WeakLinkage:
+ case Function::LinkOnceLinkage:
+assert(0 && "Not implemented");
+break;
+ }
+ EmitAlignment(4, F);
+ O << CurrentFnName << ":\n";
+
+ // Print out code for the function.
+ for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
+ I != E; ++I) {
+// Print a label for the basic block.
+if (I != MF.begin()) {
+ printBasicBlockLabel(I, true);
+ O << '\n';
+}
+for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
+ II != E; ++II) {
+ // Print the assembly for the instruction.
+ O << "\t";
+ printInstruction(II);
+}
+ }
+
return false;
}
@@ -109,7 +151,6 @@
}
bool ARMAsmPrinter::doFinalization(Module &M) {
- assert(0 && "not implemented");
AsmPrinter::doFinalization(M);
return false; // success
}
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.3
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.4
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.3 Thu May 18 16:45:49 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon May 22 21:48:20 2006
@@ -82,7 +82,42 @@
}
static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) {
- assert(0 && "Not implemented");
+ MachineFunction &MF = DAG.getMachineFunction();
+ SSARegMap *RegMap = MF.getSSARegMap();
+ std::vector ArgValues;
+ SDOperand Root = Op.getOperand(0);
+
+ unsigned reg_idx = 0;
+ unsigned num_regs = 4;
+
+ static const unsigned REGS[] = {
+ARM::R0, ARM::R1, ARM::R2, ARM::R3
+ };
+
+ for (unsigned ArgNo = 0, e = Op.Val->getNumValues()-1; ArgNo != e; ++ArgNo) {
+SDOperand ArgVal;
+
+MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
+assert (ObjectVT == MVT::i32);
+
+assert(reg_idx < num_regs);
+unsigned VReg = RegMap->createVirtualRegister(&ARM::IntRegsRegClass);
+MF.addLiveIn(REGS[reg_idx], VReg);
+ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i32);
+++reg_idx;
+
+ArgValues.push_back(ArgVal);
+ }
+
+ bool isVarArg = cast(Op.getOperand(2))->getValue() != 0;
+ assert(!isVarArg);
+
+ ArgValues.push_back(Root);
+
+ // Return the new list of results.
+ std::vector RetVT(Op.Val->value_begin(),
+Op.Val->value_end());
+ return DAG.getNode(ISD::MERGE_VALUES, RetVT, ArgValues);
}
SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp
diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.1
llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.2
--- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.1Sun May 14 17:18:28 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.cppMon May 22 21:48:20 2006
@@ -27,11 +27,6 @@
///
bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI,
unsigned &SrcReg, unsigned &DstReg) const {
- // We look for 3 kinds of patterns here:
- // or with G0 or 0
- // add with G0 or 0
- // fmovs or FpMOVD (pseudo double move).
- assert(0 && "not implemented");
return false;
}
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