[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp X86FloatingPoint.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.135 -> 1.136
X86FloatingPoint.cpp updated: 1.70 -> 1.71
---
Log message:
Drop 'const'
---
Diffs of the changes: (+4 -4)
X86CodeEmitter.cpp |4 ++--
X86FloatingPoint.cpp |4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.135
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.136
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.135Wed May 2 16:39:19 2007
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Wed May 2 20:11:54 2007
@@ -39,7 +39,7 @@
MachineCodeEmitter &MCE;
bool Is64BitMode;
public:
-static const char ID;
+static char ID;
explicit Emitter(TargetMachine &tm, MachineCodeEmitter &mce)
: MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm),
MCE(mce), Is64BitMode(false) {}
@@ -82,7 +82,7 @@
bool isX86_64ExtendedReg(const MachineOperand &MO);
unsigned determineREX(const MachineInstr &MI);
};
- const char Emitter::ID = 0;
+ char Emitter::ID = 0;
}
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
Index: llvm/lib/Target/X86/X86FloatingPoint.cpp
diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.70
llvm/lib/Target/X86/X86FloatingPoint.cpp:1.71
--- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.70 Wed May 2 16:39:19 2007
+++ llvm/lib/Target/X86/X86FloatingPoint.cppWed May 2 20:11:54 2007
@@ -52,7 +52,7 @@
namespace {
struct VISIBILITY_HIDDEN FPS : public MachineFunctionPass {
-static const char ID;
+static char ID;
FPS() : MachineFunctionPass((intptr_t)&ID) {}
virtual bool runOnMachineFunction(MachineFunction &MF);
@@ -154,7 +154,7 @@
void handleCondMovFP(MachineBasicBlock::iterator &I);
void handleSpecialFP(MachineBasicBlock::iterator &I);
};
- const char FPS::ID = 0;
+ char FPS::ID = 0;
}
FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS();
}
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[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp X86FloatingPoint.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.134 -> 1.135
X86FloatingPoint.cpp updated: 1.69 -> 1.70
---
Log message:
Use 'static const char' instead of 'static const int'.
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
---
Diffs of the changes: (+4 -4)
X86CodeEmitter.cpp |4 ++--
X86FloatingPoint.cpp |4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.134
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.135
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.134Tue May 1 16:15:46 2007
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Wed May 2 16:39:19 2007
@@ -39,7 +39,7 @@
MachineCodeEmitter &MCE;
bool Is64BitMode;
public:
-static const int ID;
+static const char ID;
explicit Emitter(TargetMachine &tm, MachineCodeEmitter &mce)
: MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm),
MCE(mce), Is64BitMode(false) {}
@@ -82,7 +82,7 @@
bool isX86_64ExtendedReg(const MachineOperand &MO);
unsigned determineREX(const MachineInstr &MI);
};
- const int Emitter::ID = 0;
+ const char Emitter::ID = 0;
}
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
Index: llvm/lib/Target/X86/X86FloatingPoint.cpp
diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.69
llvm/lib/Target/X86/X86FloatingPoint.cpp:1.70
--- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.69 Tue May 1 16:15:46 2007
+++ llvm/lib/Target/X86/X86FloatingPoint.cppWed May 2 16:39:19 2007
@@ -52,7 +52,7 @@
namespace {
struct VISIBILITY_HIDDEN FPS : public MachineFunctionPass {
-static const int ID;
+static const char ID;
FPS() : MachineFunctionPass((intptr_t)&ID) {}
virtual bool runOnMachineFunction(MachineFunction &MF);
@@ -154,7 +154,7 @@
void handleCondMovFP(MachineBasicBlock::iterator &I);
void handleSpecialFP(MachineBasicBlock::iterator &I);
};
- const int FPS::ID = 0;
+ const char FPS::ID = 0;
}
FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS();
}
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[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp X86FloatingPoint.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.133 -> 1.134
X86FloatingPoint.cpp updated: 1.68 -> 1.69
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+10 -2)
X86CodeEmitter.cpp |8 ++--
X86FloatingPoint.cpp |4
2 files changed, 10 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.133
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.134
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.133Mon Apr 16 13:10:23 2007
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Tue May 1 16:15:46 2007
@@ -39,11 +39,14 @@
MachineCodeEmitter &MCE;
bool Is64BitMode;
public:
+static const int ID;
explicit Emitter(TargetMachine &tm, MachineCodeEmitter &mce)
- : II(0), TD(0), TM(tm), MCE(mce), Is64BitMode(false) {}
+ : MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm),
+ MCE(mce), Is64BitMode(false) {}
Emitter(TargetMachine &tm, MachineCodeEmitter &mce,
const X86InstrInfo &ii, const TargetData &td, bool is64)
- : II(&ii), TD(&td), TM(tm), MCE(mce), Is64BitMode(is64) {}
+ : MachineFunctionPass((intptr_t)&ID), II(&ii), TD(&td), TM(tm),
+ MCE(mce), Is64BitMode(is64) {}
bool runOnMachineFunction(MachineFunction &MF);
@@ -79,6 +82,7 @@
bool isX86_64ExtendedReg(const MachineOperand &MO);
unsigned determineREX(const MachineInstr &MI);
};
+ const int Emitter::ID = 0;
}
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
Index: llvm/lib/Target/X86/X86FloatingPoint.cpp
diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.68
llvm/lib/Target/X86/X86FloatingPoint.cpp:1.69
--- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.68 Wed Apr 25 17:13:27 2007
+++ llvm/lib/Target/X86/X86FloatingPoint.cppTue May 1 16:15:46 2007
@@ -52,6 +52,9 @@
namespace {
struct VISIBILITY_HIDDEN FPS : public MachineFunctionPass {
+static const int ID;
+FPS() : MachineFunctionPass((intptr_t)&ID) {}
+
virtual bool runOnMachineFunction(MachineFunction &MF);
virtual const char *getPassName() const { return "X86 FP Stackifier"; }
@@ -151,6 +154,7 @@
void handleCondMovFP(MachineBasicBlock::iterator &I);
void handleSpecialFP(MachineBasicBlock::iterator &I);
};
+ const int FPS::ID = 0;
}
FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS();
}
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[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp X86FloatingPoint.cpp X86RegisterInfo.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.121 -> 1.122
X86FloatingPoint.cpp updated: 1.55 -> 1.56
X86RegisterInfo.cpp updated: 1.173 -> 1.174
---
Log message:
Use TargetInstrInfo::getNumOperands() instead of
MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.
---
Diffs of the changes: (+50 -34)
X86CodeEmitter.cpp | 42 ++
X86FloatingPoint.cpp | 22 --
X86RegisterInfo.cpp | 20
3 files changed, 50 insertions(+), 34 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.121
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.122
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.121Wed Nov 8 20:22:54 2006
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Thu Nov 9 19:28:43 2006
@@ -469,14 +469,15 @@
if (Desc.TSFlags & X86II::REX_W)
REX |= 1 << 3;
- if (MI.getNumOperands()) {
-bool isTwoAddr = II->getNumOperands(Opcode) > 1 &&
+ unsigned NumOps = II->getNumOperands(Opcode);
+ if (NumOps) {
+bool isTwoAddr = NumOps > 1 &&
II->getOperandConstraint(Opcode, 1, TargetInstrInfo::TIED_TO) != -1;
// If it accesses SPL, BPL, SIL, or DIL, then it requires a 0x40 REX
prefix.
bool isTrunc8 = isX86_64TruncToByte(Opcode);
unsigned i = isTwoAddr ? 1 : 0;
-for (unsigned e = MI.getNumOperands(); i != e; ++i) {
+for (unsigned e = NumOps; i != e; ++i) {
const MachineOperand& MO = MI.getOperand(i);
if (MO.isRegister()) {
unsigned Reg = MO.getReg();
@@ -498,7 +499,7 @@
if (isX86_64ExtendedReg(MI.getOperand(0)))
REX |= 1 << 2;
i = isTwoAddr ? 2 : 1;
- for (unsigned e = MI.getNumOperands(); i != e; ++i) {
+ for (unsigned e = NumOps; i != e; ++i) {
const MachineOperand& MO = MI.getOperand(i);
if (isX86_64ExtendedReg(MO))
REX |= 1 << 0;
@@ -510,7 +511,7 @@
REX |= 1 << 2;
unsigned Bit = 0;
i = isTwoAddr ? 2 : 1;
- for (; i != MI.getNumOperands(); ++i) {
+ for (; i != NumOps; ++i) {
const MachineOperand& MO = MI.getOperand(i);
if (MO.isRegister()) {
if (isX86_64ExtendedReg(MO))
@@ -527,7 +528,7 @@
case X86II::MRMDestMem: {
unsigned e = isTwoAddr ? 5 : 4;
i = isTwoAddr ? 1 : 0;
- if (MI.getNumOperands() > e && isX86_64ExtendedReg(MI.getOperand(e)))
+ if (NumOps > e && isX86_64ExtendedReg(MI.getOperand(e)))
REX |= 1 << 2;
unsigned Bit = 0;
for (; i != e; ++i) {
@@ -544,7 +545,7 @@
if (isX86_64ExtendedReg(MI.getOperand(0)))
REX |= 1 << 0;
i = isTwoAddr ? 2 : 1;
- for (unsigned e = MI.getNumOperands(); i != e; ++i) {
+ for (unsigned e = NumOps; i != e; ++i) {
const MachineOperand& MO = MI.getOperand(i);
if (isX86_64ExtendedReg(MO))
REX |= 1 << 2;
@@ -607,8 +608,9 @@
MCE.emitByte(0x0F);
// If this is a two-address instruction, skip one of the register operands.
+ unsigned NumOps = II->getNumOperands(Opcode);
unsigned CurOp = 0;
- if (II->getNumOperands(Opcode) > 1 &&
+ if (NumOps > 1 &&
II->getOperandConstraint(Opcode, 1, TargetInstrInfo::TIED_TO) != -1)
CurOp++;
@@ -637,12 +639,12 @@
break;
}
#endif
-CurOp = MI.getNumOperands();
+CurOp = NumOps;
break;
case X86II::RawFrm:
MCE.emitByte(BaseOpcode);
-if (CurOp != MI.getNumOperands()) {
+if (CurOp != NumOps) {
const MachineOperand &MO = MI.getOperand(CurOp++);
if (MO.isMachineBasicBlock()) {
emitPCRelativeBlockAddress(MO.getMachineBasicBlock());
@@ -663,7 +665,7 @@
case X86II::AddRegFrm:
MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(CurOp++).getReg()));
-if (CurOp != MI.getNumOperands()) {
+if (CurOp != NumOps) {
const MachineOperand &MO1 = MI.getOperand(CurOp++);
if (MO1.isGlobalAddress()) {
assert(sizeOfImm(Desc) == TD->getPointerSize() &&
@@ -688,7 +690,7 @@
emitRegModRMByte(MI.getOperand(CurOp).getReg(),
getX86RegNum(MI.getOperand(CurOp+1).getReg()));
CurOp += 2;
-if (CurOp != MI.getNumOperands())
+if (CurOp != NumOps)
emitConstant(MI.getOperand(CurOp++).getImm(), sizeOfImm(Desc));
break;
}
@@ -696,7 +698,7 @@
MCE.emitByte(BaseOpcode);
emitMemModRMByte(MI, CurOp, getX86RegNum(MI.getOperand(CurOp+4).getReg()));
CurOp += 5;
-if (CurOp != MI.getNumOperands())
+if (CurOp != NumOps)
emitConstant(MI.getOperand(CurOp++).getImm(), sizeOfImm(Desc));
break;
}
@@ -706,18 +708,18 @@
emitRegModRMByte(MI.getOperand(CurOp+1).getReg(),
getX86RegNum(MI.getOperand(CurOp).getReg()));
CurOp += 2;
-if (CurOp != MI.getNumOperands())
+if (CurOp != NumOps)
emitConstant(MI.getOperand(CurOp++).getImm(), sizeOfImm(Desc))
