Thanks Brian,
I ordered both boards from oshpark and will build them soon. I
appreciate the response and your work on the adapters.
On Thu, Nov 16, 2023 at 01:15:17AM -0500, Brian K. White wrote:
> On 11/15/23 16:29, runrin wrote:
> > Thanks for the info Brian, I really appreciate it.
> >
> > My plan is just to pop the ROM out when I need to reprogram it. I'm
> > actually more comfortable unscrewing the back from the system than
> > popping out the option ROM cover anyway, since the brass inserts are
> > probably more robust that the tight plastic snap on the back panel. It
> > freaks me out every time I pop that thing open :P
> >
> > A few Qs:
> >
> > 1. It seems like pin 27 (/CS) on the system ROM is normally pulled low by a
> > CPU read. /CS on the EEPROM should be fine if I just jumper /CS_IC to
> > /CS_BUS and skip the R2 pullup, right?
>
> R2 disables the chip when REX is connected.
>
> With a jumper installed, the bus overrides R2 and the chip works like a
> normal rom.
>
> With the REX wires installed, and the two wires connected to each other in
> the option rom compartment, that's just another form of jumper. The bus
> overrides R2 and the chip works like a normal rom.
>
> With the REX wires installed, and /CS_BUS wire connected to REX TP1 and
> /CS_IC wire unconnected, R2 keeps the flexrom chip always disabled so as to
> never conflict with the REX. When the bus tries to enable the main rom, the
> REX responds instead.
>
> If you want to hard-code everything and save a few cents, you can omit R2
> and solder bridge /CS_BUS to /CS_IC, and the result is like an ordinary rom.
>
> R1 still allows you to write to the chip by being a pullup instead of a hard
> trace. If you build the board normally with the /CS pins and R2 populated,
> you have to install a jumper on those pins for programming anyway, so a
> solder blob is the same. It just means you can't use the REX software main
> rom feature.
>
> To program, if you have a SOIC test clip, then you can just use that and JP2
> doesn't matter. If you don't have a SOIC test clip, then build the matching
> programming adapter and install a jumper onto JP2. Remove the jumper when
> not programming.
>
> The ALE pin is just a pin in this case. It's not really ALE, just a pin that
> the programming adapter uses to route pin 27 from the programmer ultimately
> back to pin 27 on the eeprom, but using pin 23 along the way because of
> having to work around the non-standard main rom pinout.
>
> The wikipedia page for the 8085 has a reasonable high level explanation:
> "The 8085 is supplied in a 40-pin DIP package. To maximise the functions on
> the available pins, the 8085 uses a multiplexed address/data (AD0-AD7) bus.
> However, an 8085 circuit requires an 8-bit address latch, so Intel
> manufactured several support chips with an address latch built in. These
> include the 8755, with an address latch, 2 KB of EPROM and 16 I/O pins, and
> the 8155 with 256 bytes of RAM, 22 I/O pins and a 14-bit programmable
> timer/counter. The multiplexed address/data bus reduced the number of PCB
> tracks between the 8085 and such memory and I/O chips."
>
> Basically A0-A7 and D0-D7 both use the same 8 physical pins, at different
> times. When ALE is high, those pins are address, when ALE is low, those pins
> are data.
>
> Basically the low 8 bits of the bus to be used for both address and data at
> different times. When ALE is high, AD0-AD7 are A0-A7. When ALE is low,
> AD0-AD7 are D0-D7.
>
> Why they bothered to route that line to the main rom and to the optrom
> sockets when those sockets have full normal separate non-conflicting address
> and data pins I don't know. You can use a bog standard 27C256 in both places
> (with the pinout rearranged) and totally ignore the ALE pin. Other logic
> supplies the correct /CE /OE signals at least for those sockets.
>
> --
> bkw
>
>
>
> >
> > I'll obviously still use the R1 pullup for /WE on the EEPROM. I was
> > considering using a DIP switch as a jumper for /WE to ALE instead of a
> > jumper if it fits in the case. That way I don't have to dig around for a
> > jumper every time I want to program the EEPROM.
> >
> > 2. More of a technical question about the m100 architecture:
> >
> > I'm curious if you know how ALE is normally being used by the CPU/system
> > ROM? It looks like it's being used by M1 and M25 as well. I haven't
> > encountered an address latch before, coming from mostly 6502 and Z80,
> > and I'm interested to understand its purpose.
> >
> > Thanks again!
> >
> > On Sun, Nov 12, 2023 at 10:05:44PM -0500, Brian K. White wrote:
> > > REX# does not provide any software main rom feature, only REX Classic
> > > does.
> > >
> > > You can use a FlexROM as just an ordinary re-writable rom to replace the
> > > stock one, but you would need to open up the machine to re-write the
> > > eeprom
> > > (or flash, there is also a flash version). You just install a jumper on
> > > the
> > > /CS pins which
