Mesa (master): r300g: mapping buffers for read should be unsynchronized

2011-12-24 Thread Marek Olšák
Module: Mesa
Branch: master
Commit: ec4851253bbf7fd7d11c5570f19f9733a885e471
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec4851253bbf7fd7d11c5570f19f9733a885e471

Author: Marek Olšák 
Date:   Sat Dec 24 11:43:10 2011 +0100

r300g: mapping buffers for read should be unsynchronized

The GPU never uses them for write.

---

 src/gallium/drivers/r300/r300_screen_buffer.c |   10 +-
 1 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/src/gallium/drivers/r300/r300_screen_buffer.c 
b/src/gallium/drivers/r300/r300_screen_buffer.c
index a8392d2..2e9e7d7 100644
--- a/src/gallium/drivers/r300/r300_screen_buffer.c
+++ b/src/gallium/drivers/r300/r300_screen_buffer.c
@@ -107,13 +107,21 @@ r300_buffer_transfer_map( struct pipe_context *pipe,
 struct radeon_winsys *rws = r300screen->rws;
 struct r300_resource *rbuf = r300_resource(transfer->resource);
 uint8_t *map;
+enum pipe_transfer_usage usage;
 
 if (rbuf->b.user_ptr)
 return (uint8_t *) rbuf->b.user_ptr + transfer->box.x;
 if (rbuf->constant_buffer)
 return (uint8_t *) rbuf->constant_buffer + transfer->box.x;
 
-map = rws->buffer_map(rbuf->buf, r300->cs, transfer->usage);
+/* Buffers are never used for write, therefore mapping for read can be
+ * unsynchronized. */
+usage = transfer->usage;
+if (!(usage & PIPE_TRANSFER_WRITE)) {
+   usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
+}
+
+map = rws->buffer_map(rbuf->buf, r300->cs, usage);
 
 if (map == NULL)
 return NULL;

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Mesa (master): winsys/radeon: move managing GEM domains back to drivers

2011-12-24 Thread Marek Olšák
Module: Mesa
Branch: master
Commit: 93f4e3cb6c1ca303ee1f5c2a2491a8eff33f2633
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=93f4e3cb6c1ca303ee1f5c2a2491a8eff33f2633

Author: Marek Olšák 
Date:   Sat Dec 24 08:15:40 2011 +0100

winsys/radeon: move managing GEM domains back to drivers

This partially reverts commit 363ff844753c46ac9c13866627e096b091ea81f8.

It caused severe performance drops in Nexuiz. Reported by Phoronix.

Tested by me on r300g and by IRC people on r600g.

---

 src/gallium/drivers/r300/r300_context.h |3 ++
 src/gallium/drivers/r300/r300_emit.c|   20 +++
 src/gallium/drivers/r300/r300_flush.c   |4 +-
 src/gallium/drivers/r300/r300_query.c   |2 +-
 src/gallium/drivers/r300/r300_screen_buffer.c   |   10 ++
 src/gallium/drivers/r300/r300_texture.c |   10 +-
 src/gallium/drivers/r600/r600.h |3 ++
 src/gallium/drivers/r600/r600_buffer.c  |   30 +++-
 src/gallium/drivers/r600/r600_hw_context_priv.h |2 +-
 src/gallium/drivers/r600/r600_texture.c |2 +
 src/gallium/winsys/radeon/drm/radeon_drm_bo.c   |   35 +++
 src/gallium/winsys/radeon/drm/radeon_drm_bo.h   |2 -
 src/gallium/winsys/radeon/drm/radeon_drm_cs.c   |   43 --
 src/gallium/winsys/radeon/drm/radeon_winsys.h   |   16 ++--
 14 files changed, 106 insertions(+), 76 deletions(-)

diff --git a/src/gallium/drivers/r300/r300_context.h 
b/src/gallium/drivers/r300/r300_context.h
index e1c12d9..5c0f53e 100644
--- a/src/gallium/drivers/r300/r300_context.h
+++ b/src/gallium/drivers/r300/r300_context.h
@@ -302,6 +302,8 @@ struct r300_surface {
 struct pb_buffer *buf;
 struct radeon_winsys_cs_handle *cs_buf;
 
+enum radeon_bo_domain domain;
+
 uint32_t offset;/* COLOROFFSET or DEPTHOFFSET. */
 uint32_t pitch; /* COLORPITCH or DEPTHPITCH. */
 uint32_t pitch_zmask; /* ZMASK_PITCH */
@@ -385,6 +387,7 @@ struct r300_resource
 /* Winsys buffer backing this resource. */
 struct pb_buffer *buf;
 struct radeon_winsys_cs_handle *cs_buf;
+enum radeon_bo_domain domain;
 
 /* Constant buffers are in user memory. */
 uint8_t *constant_buffer;
diff --git a/src/gallium/drivers/r300/r300_emit.c 
b/src/gallium/drivers/r300/r300_emit.c
index d93a578..3897e99 100644
--- a/src/gallium/drivers/r300/r300_emit.c
+++ b/src/gallium/drivers/r300/r300_emit.c
@@ -1190,14 +1190,16 @@ validate:
 tex = r300_resource(fb->cbufs[i]->texture);
 assert(tex && tex->buf && "cbuf is marked, but NULL!");
 r300->rws->cs_add_reloc(r300->cs, tex->cs_buf,
-RADEON_USAGE_READWRITE);
+RADEON_USAGE_READWRITE,
+r300_surface(fb->cbufs[i])->domain);
 }
 /* ...depth buffer... */
 if (fb->zsbuf) {
 tex = r300_resource(fb->zsbuf->texture);
 assert(tex && tex->buf && "zsbuf is marked, but NULL!");
 r300->rws->cs_add_reloc(r300->cs, tex->cs_buf,
-RADEON_USAGE_READWRITE);
+RADEON_USAGE_READWRITE,
+r300_surface(fb->zsbuf)->domain);
 }
 }
 if (r300->textures_state.dirty) {
@@ -1208,17 +1210,19 @@ validate:
 }
 
 tex = r300_resource(texstate->sampler_views[i]->base.texture);
-r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, RADEON_USAGE_READ);
+r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, RADEON_USAGE_READ,
+tex->domain);
 }
 }
 /* ...occlusion query buffer... */
 if (r300->query_current)
 r300->rws->cs_add_reloc(r300->cs, r300->query_current->cs_buf,
-RADEON_USAGE_WRITE);
+RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
 /* ...vertex buffer for SWTCL path... */
 if (r300->vbo)
 r300->rws->cs_add_reloc(r300->cs, r300_resource(r300->vbo)->cs_buf,
-RADEON_USAGE_READ);
+RADEON_USAGE_READ,
+r300_resource(r300->vbo)->domain);
 /* ...vertex buffers for HWTCL path... */
 if (do_validate_vertex_buffers && r300->vertex_arrays_dirty) {
 struct pipe_vertex_buffer *vbuf = r300->vbuf_mgr->real_vertex_buffer;
@@ -1231,13 +1235,15 @@ validate:
 continue;
 
 r300->rws->cs_add_reloc(r300->cs, r300_resource(buf)->cs_buf,
-RADEON_USAGE_READ);
+RADEON_USAGE_READ,
+r300_resource(buf)->domain);
 }
 }
 /* ...and index buffer for HWTCL path. */
 if (index_buffer)
 r300->rws->cs_add_reloc(r300->cs, r300_resource(index_buffer)->c

Mesa (master): i965 gen6: Fix incorrect order of dwords in gen6_update_sol_indices()

2011-12-24 Thread Paul Berry
Module: Mesa
Branch: master
Commit: e6e9becd5016df649d3c19a3e81e85bd63b895b7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6e9becd5016df649d3c19a3e81e85bd63b895b7

Author: Paul Berry 
Date:   Fri Dec 23 13:56:07 2011 -0800

i965 gen6: Fix incorrect order of dwords in gen6_update_sol_indices()

When updating SOL indices, we were accidentally putting the starting
index in dword 1 and the SVBI number to increment in dword 2--these
should be reversed.  Usually both of these values are zero, so we
didn't see any problem.  However, if a transform feedback operation
spans multiple batch buffers, the starting index will be nonzero.

Fixes piglit test "EXT_transform_feedback/intervening-read output".

Reviewed-by: Kenneth Graunke 

---

 src/mesa/drivers/dri/i965/gen6_sol.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c 
b/src/mesa/drivers/dri/i965/gen6_sol.c
index 437b3ae..f724802 100644
--- a/src/mesa/drivers/dri/i965/gen6_sol.c
+++ b/src/mesa/drivers/dri/i965/gen6_sol.c
@@ -82,8 +82,8 @@ gen6_update_sol_indices(struct brw_context *brw)
 
BEGIN_BATCH(4);
OUT_BATCH(_3DSTATE_GS_SVB_INDEX << 16 | (4 - 2));
-   OUT_BATCH(brw->sol.svbi_0_starting_index); /* BRW_NEW_SOL_INDICES */
OUT_BATCH(0);
+   OUT_BATCH(brw->sol.svbi_0_starting_index); /* BRW_NEW_SOL_INDICES */
OUT_BATCH(brw->sol.svbi_0_max_index); /* BRW_NEW_SOL_INDICES */
ADVANCE_BATCH();
 }

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Mesa (master): i965 gen6: Fix transform feedback of triangle strips.

2011-12-24 Thread Paul Berry
Module: Mesa
Branch: master
Commit: b31f62c9074cb88fbb2e0b327e053778dea5b83f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b31f62c9074cb88fbb2e0b327e053778dea5b83f

Author: Paul Berry 
Date:   Fri Dec 23 07:57:01 2011 -0800

i965 gen6: Fix transform feedback of triangle strips.

When rendering triangle strips, vertices come down the pipeline in the
order specified, even though this causes alternate triangles to have
reversed winding order.  For example, if the vertices are ABCDE, then
the GS is invoked on triangles ABC, BCD, and CDE, even though this
means that triangle BCD is in the reverse of the normal winding order.
The hardware automatically flags the triangles with reversed winding
order as _3DPRIM_TRISTRIP_REVERSE, so that face culling and two-sided
coloring can be adjusted to account for the reversed order.

In order to ensure that winding order is correct when streaming
vertices out to a transform feedback buffer, we need to alter the
ordering of BCD to BDC when the first provoking vertex convention is
in use, and to CBD when the last provoking vertex convention is in
use.

To do this, we precompute an array of indices indicating where each
vertex will be placed in the transform feedback buffer; normally this
is SVBI[0] + (0, 1, 2), indicating that vertex order should be
preserved.  When the primitive type is _3DPRIM_TRISTRIP_REVERSE, we
change this order to either SVBI[0] + (0, 2, 1) or SVBI[0] + (1, 0,
2), depending on the provoking vertex convention.

Fixes piglit tests "EXT_transform_feedback/tessellation
triangle_strip" on Gen6.

Reviewed-by: Kenneth Graunke 

---

 src/mesa/drivers/dri/i965/brw_gs.h  |6 ++
 src/mesa/drivers/dri/i965/brw_gs_emit.c |   84 ---
 2 files changed, 72 insertions(+), 18 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_gs.h 
b/src/mesa/drivers/dri/i965/brw_gs.h
index 7bf2248..2ab8b72 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.h
+++ b/src/mesa/drivers/dri/i965/brw_gs.h
@@ -83,6 +83,12 @@ struct brw_gs_compile {
   struct brw_reg vertex[MAX_GS_VERTS];
   struct brw_reg header;
   struct brw_reg temp;
+
+  /**
+   * Register holding destination indices for streamed buffer writes.
+   * Only used for SOL programs.
+   */
+  struct brw_reg destination_indices;
} reg;
 
/* Number of registers used to store vertex data */
diff --git a/src/mesa/drivers/dri/i965/brw_gs_emit.c 
b/src/mesa/drivers/dri/i965/brw_gs_emit.c
index 1f96a16..607ee75 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_emit.c
@@ -45,13 +45,16 @@
 /**
  * Allocate registers for GS.
  *
- * If svbi_payload_enable is true, then the thread will be spawned with the
- * "SVBI Payload Enable" bit set, so GRF 1 needs to be set aside to hold the
- * streamed vertex buffer indices.
+ * If sol_program is true, then:
+ *
+ * - The thread will be spawned with the "SVBI Payload Enable" bit set, so GRF
+ *   1 needs to be set aside to hold the streamed vertex buffer indices.
+ *
+ * - The thread will need to use the destination_indices register.
  */
 static void brw_gs_alloc_regs( struct brw_gs_compile *c,
   GLuint nr_verts,
-   bool svbi_payload_enable )
+   bool sol_program )
 {
GLuint i = 0,j;
 
@@ -60,7 +63,7 @@ static void brw_gs_alloc_regs( struct brw_gs_compile *c,
c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
 
/* Streamed vertex buffer indices */
-   if (svbi_payload_enable)
+   if (sol_program)
   c->reg.SVBI = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD);
 
/* Payload vertices plus space for more generated vertices:
@@ -73,6 +76,11 @@ static void brw_gs_alloc_regs( struct brw_gs_compile *c,
c->reg.header = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD);
c->reg.temp = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD);
 
+   if (sol_program) {
+  c->reg.destination_indices =
+ retype(brw_vec4_grf(i++, 0), BRW_REGISTER_TYPE_UD);
+   }
+
c->prog_data.urb_read_length = c->nr_regs; 
c->prog_data.total_grf = i;
 }
@@ -351,16 +359,17 @@ gen6_sol_program(struct brw_gs_compile *c, struct 
brw_gs_prog_key *key,
 
if (key->num_transform_feedback_bindings > 0) {
   unsigned vertex, binding;
+  struct brw_reg destination_indices_uw =
+ vec8(retype(c->reg.destination_indices, BRW_REGISTER_TYPE_UW));
+
   /* Note: since we use the binding table to keep track of buffer offsets
* and stride, the GS doesn't need to keep track of a separate pointer
* into each buffer; it uses a single pointer which increments by 1 for
* each vertex.  So we use SVBI0 for this pointer, regardless of whether
* transform feedback is in interleaved or separate attribs mode.
+   *
+   * Make sure that the buffers have enough room for all the vertices.
*/
-  brw_MOV(p, get_ele

Mesa (master): 31 new commits

2011-12-24 Thread Brian Paul
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c818c6277247468ccf69abda00f5bc220b59644
Author: Brian Paul 
Date:   Sat Dec 24 08:54:27 2011 -0700

mesa: consolidate texstore functions

The code for storing 1D, 2D and 3D tex images (whole or sub-images) was
all pretty similar.  This consolidates those six paths.

v2: rework switch statement to catch unexpected targets

Reviewed-by: José Fonseca 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=afebe13986e1ab69c8f80e957653b35aaee2269b
Author: Brian Paul 
Date:   Sat Dec 24 08:54:27 2011 -0700

mesa: fix _mesa_store_texsubimage2d() for GL_TEXTURE_1D_ARRAY

For 1D arrays, map each slice separately.  Note that this was handled
correctly in _mesa_store_teximage2d() but not here.

Reviewed-by: José Fonseca 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b26aa4c7af189b480b620926eed9560c8e63656
Author: Brian Paul 
Date:   Sat Dec 24 08:54:27 2011 -0700

mesa: update comment for MapTextureImage()

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c60ac7b17993d28af65b04f9bbbf3ee74c35358c
Author: Brian Paul 
Date:   Sat Dec 24 08:54:27 2011 -0700

swrast: rewrite glDrawPixels(GL_DEPTH) with zoom

This gets rid of another renderbuffer->PutRow() call and _DepthBuffer
usage.  We always work with 32-bit uint Z values now.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bf0c0ccbc9424fc73cb17ffb9c9b5feda7d33474
Author: Brian Paul 
Date:   Sat Dec 24 08:54:27 2011 -0700

swrast: stop using _DepthBuffer in triangle code

The only consequence is we can only use the occlusion_zless_16_triangle()
function with MESA_FORMAT_Z16.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7a7b521ff255f5511b6f42becf603c6893f8a51e
Author: Brian Paul 
Date:   Sat Dec 24 08:54:26 2011 -0700

mesa: remove gl_renderbuffer::PutRowRGB()

No longer used anywhere.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e7bc795784f13068e00c478b94740c8b27789e6
Author: Brian Paul 
Date:   Sat Dec 24 08:54:26 2011 -0700

swrast: stop using PutRowRGB() in triangle code

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=743c664c8c13a7d20beb17290316cd178681482e
Author: Brian Paul 
Date:   Sat Dec 24 08:54:26 2011 -0700

swrast: refactor/rewrite fast_draw_rgba_pixels()

Use Map/UnmapRenderbuffer() for the special, optimized cases we care about.

Note that we're dropping some seldom-used cases in the new fast-path
code: as CI->RGB conversion and zooming.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e66858fb67477db22139fe38d4f23530b7a142a7
Author: Brian Paul 
Date:   Sat Dec 24 08:54:26 2011 -0700

swrast: move swrast_render_start/finish() call in drawpixels code

We don't want to call these functions where we'll be using
Map/UnmapRenderbuffer().  So push them further down in the drawpixels
cases so that we can switch over to Map/UnmapRenderbuffer() step by step.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d9d0d4198f9c76774649b8cad3f10352fd7b5ea5
Author: Brian Paul 
Date:   Sat Dec 24 08:54:26 2011 -0700

swrast: new fast_draw_depth_stencil() for glDrawPixels(GL_DEPTH_STENCIL)

Stop using deprecated renderbuffer PutRow() function.  Note that we
aren't using Map/UnmapRenderbuffer() yet because this call is inside
a swrast_render_start/finish() pair.

v2: use _mesa_pack_uint_24_8_depth_stencil_row(), per Eric.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=826f36b1d8ae3881e6095d905fd10a7070742098
Author: Brian Paul 
Date:   Sat Dec 24 08:54:26 2011 -0700

swrast: remove the copy_depth_stencil_pixels() function

Hopefully glCopyPixels(GL_DEPTH_STENCIL) will be handled by the
fast copy function.  Otherwise, just do the copy with separate
depth + stencil copies.  That's effectively what the removed code
did anyway.

Reviewed-by: Eric Anholt 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6c6b1c147f5079a1608234294e2b6cd29dd2a64
Author: Brian Paul 
Date:   Sat Dec 24 08:54:26 2011 -0700

swrast: stop using depth/stencil wrappers in CopyPixels code

The functions that read depth/stencil values understand all (packed)
depth/stencil buffer formats now so there's no reason to use the
wrappers.

Also, improve the format checks in fast_copy_pixels() to catch mismatched
depth/stencil cases.

v2: fix the test for combined depth+stencil buffers, per Eric.

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd31fb346398ca350a5e251a5d104ee1c8b33454
Author: Brian Paul 
Date:   Sat Dec 24 08:54:26 2011 -0700

swrast: remove needless assignment in draw_depth_stencil_pixels()

Mesa (master): mesa: move the format and type check before select_tex_image ()

2011-12-24 Thread Brian Paul
Module: Mesa
Branch: master
Commit: 26195c8417e710e919352ec6b4dfff83fdc178e2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=26195c8417e710e919352ec6b4dfff83fdc178e2

Author: Jian Zhao 
Date:   Sat Dec 24 07:58:12 2011 -0700

mesa: move the format and type check before select_tex_image()

Move the format and type check before select_tex_image, or it will fail to
report the mismatch error if the teximage is null.

Reported-by: Anuj Phogat 
Signed-off-by: Jian Zhao 
Reviewed-by: Yuanhan Liu 
Signed-off-by: Brian Paul 

---

 src/mesa/main/texgetimage.c |   12 ++--
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index 3f24187..6ead871 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/texgetimage.c
@@ -702,12 +702,6 @@ getteximage_error_check(struct gl_context *ctx, GLenum 
target, GLint level,
   return GL_TRUE;
}
 
-   texImage = _mesa_select_tex_image(ctx, texObj, target, level);
-   if (!texImage) {
-  /* out of memory */
-  return GL_TRUE;
-   }
-
if (!_mesa_is_legal_format_and_type(ctx, format, type)) {
   /*GL_INVALID_OPERATION is generated by a format/type
* mismatch (see the 1.2 spec page 94, sec 3.6.4.)
@@ -716,6 +710,12 @@ getteximage_error_check(struct gl_context *ctx, GLenum 
target, GLint level,
   return GL_TRUE;
}
 
+   texImage = _mesa_select_tex_image(ctx, texObj, target, level);
+   if (!texImage) {
+  /* out of memory */
+  return GL_TRUE;
+   }
+
baseFormat = _mesa_get_format_base_format(texImage->TexFormat);
   
/* Make sure the requested image format is compatible with the

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Mesa (master): mesa: fix comments in getteximage_error_check()

2011-12-24 Thread Brian Paul
Module: Mesa
Branch: master
Commit: 5e6a6e49e99201abc2d6196001b457296b57427d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e6a6e49e99201abc2d6196001b457296b57427d

Author: Brian Paul 
Date:   Sat Dec 24 08:00:06 2011 -0700

mesa: fix comments in getteximage_error_check()

---

 src/mesa/main/texgetimage.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index 6ead871..073238a 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/texgetimage.c
@@ -703,7 +703,7 @@ getteximage_error_check(struct gl_context *ctx, GLenum 
target, GLint level,
}
 
if (!_mesa_is_legal_format_and_type(ctx, format, type)) {
-  /*GL_INVALID_OPERATION is generated by a format/type
+  /* GL_INVALID_OPERATION is generated by a format/type
* mismatch (see the 1.2 spec page 94, sec 3.6.4.)
*/
   _mesa_error(ctx, GL_INVALID_OPERATION, "glGetTexImage(target)");
@@ -712,7 +712,7 @@ getteximage_error_check(struct gl_context *ctx, GLenum 
target, GLint level,
 
texImage = _mesa_select_tex_image(ctx, texObj, target, level);
if (!texImage) {
-  /* out of memory */
+  /* non-existant texture image */
   return GL_TRUE;
}
 

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Mesa (master): vl: Fix inverted logic in vlc checks

2011-12-24 Thread Christian König
Module: Mesa
Branch: master
Commit: 1fdecef8868ce1a5ca6c2cb260294fb37d3bd69d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1fdecef8868ce1a5ca6c2cb260294fb37d3bd69d

Author: Maarten Lankhorst 
Date:   Sat Dec 24 12:33:30 2011 +0100

vl: Fix inverted logic in vlc checks

Reported-by: Andy Furniss 
Signed-off-by: Maarten Lankhorst 

---

 src/gallium/auxiliary/vl/vl_vlc.h |8 
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/gallium/auxiliary/vl/vl_vlc.h 
b/src/gallium/auxiliary/vl/vl_vlc.h
index ff0c4b5..baaa48a 100644
--- a/src/gallium/auxiliary/vl/vl_vlc.h
+++ b/src/gallium/auxiliary/vl/vl_vlc.h
@@ -215,7 +215,7 @@ vl_vlc_bits_left(struct vl_vlc *vlc)
 static INLINE unsigned
 vl_vlc_peekbits(struct vl_vlc *vlc, unsigned num_bits)
 {
-   assert(vl_vlc_valid_bits(vlc) <= num_bits || vlc->data >= vlc->end);
+   assert(vl_vlc_valid_bits(vlc) >= num_bits || vlc->data >= vlc->end);
return vlc->buffer >> (64 - num_bits);
 }
 
@@ -225,7 +225,7 @@ vl_vlc_peekbits(struct vl_vlc *vlc, unsigned num_bits)
 static INLINE void
 vl_vlc_eatbits(struct vl_vlc *vlc, unsigned num_bits)
 {
-   assert(vl_vlc_valid_bits(vlc) <= num_bits);
+   assert(vl_vlc_valid_bits(vlc) >= num_bits);
 
vlc->buffer <<= num_bits;
vlc->invalid_bits += num_bits;
@@ -239,7 +239,7 @@ vl_vlc_get_uimsbf(struct vl_vlc *vlc, unsigned num_bits)
 {
unsigned value;
 
-   assert(vl_vlc_valid_bits(vlc) <= num_bits);
+   assert(vl_vlc_valid_bits(vlc) >= num_bits);
 
value = vlc->buffer >> (64 - num_bits);
vl_vlc_eatbits(vlc, num_bits);
@@ -255,7 +255,7 @@ vl_vlc_get_simsbf(struct vl_vlc *vlc, unsigned num_bits)
 {
signed value;
 
-   assert(vl_vlc_valid_bits(vlc) <= num_bits);
+   assert(vl_vlc_valid_bits(vlc) >= num_bits);
 
value = ((int64_t)vlc->buffer) >> (64 - num_bits);
vl_vlc_eatbits(vlc, num_bits);

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Mesa (master): egl,glx,wgl: Fixes stapi->createContext usage

2011-12-24 Thread Jose Fonseca
Module: Mesa
Branch: master
Commit: 3258cd9e611bb188e4b21d23cd5dd6cb0c0ff1ef
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3258cd9e611bb188e4b21d23cd5dd6cb0c0ff1ef

Author: Alexandre Demers 
Date:   Sat Dec 24 11:06:19 2011 +

egl,glx,wgl: Fixes stapi->createContext usage

Fixed the build failure, fixed a warning where attributs and error arguments had
been
inverted and fixed another call that was missing an argument.

Signed-off-by: José Fonseca 

---

 .../state_trackers/egl/common/egl_g3d_api.c|5 +++--
 src/gallium/state_trackers/glx/xlib/xm_api.c   |5 +++--
 src/gallium/state_trackers/wgl/stw_context.c   |5 +++--
 3 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/src/gallium/state_trackers/egl/common/egl_g3d_api.c 
b/src/gallium/state_trackers/egl/common/egl_g3d_api.c
index 37903ce..58e772f 100644
--- a/src/gallium/state_trackers/egl/common/egl_g3d_api.c
+++ b/src/gallium/state_trackers/egl/common/egl_g3d_api.c
@@ -150,6 +150,7 @@ egl_g3d_create_context(_EGLDriver *drv, _EGLDisplay *dpy, 
_EGLConfig *conf,
struct egl_g3d_config *gconf = egl_g3d_config(conf);
struct egl_g3d_context *gctx;
struct st_context_attribs stattribs;
+   enum st_context_error ctx_err = 0;
 
gctx = CALLOC_STRUCT(egl_g3d_context);
if (!gctx) {
@@ -172,8 +173,8 @@ egl_g3d_create_context(_EGLDriver *drv, _EGLDisplay *dpy, 
_EGLConfig *conf,
   return NULL;
}
 
-   gctx->stctxi = gctx->stapi->create_context(gctx->stapi, gdpy->smapi,
- &stattribs, (gshare) ? gshare->stctxi : NULL);
+   gctx->stctxi = gctx->stapi->create_context(gctx->stapi, gdpy->smapi, 
+ &stattribs, &ctx_err, (gshare) ? gshare->stctxi : NULL);
if (!gctx->stctxi) {
   FREE(gctx);
   return NULL;
diff --git a/src/gallium/state_trackers/glx/xlib/xm_api.c 
b/src/gallium/state_trackers/glx/xlib/xm_api.c
index 5d99e5f..8f90704 100644
--- a/src/gallium/state_trackers/glx/xlib/xm_api.c
+++ b/src/gallium/state_trackers/glx/xlib/xm_api.c
@@ -863,6 +863,7 @@ XMesaContext XMesaCreateContext( XMesaVisual v, 
XMesaContext share_list,
 {
XMesaDisplay xmdpy = xmesa_init_display(v->display);
struct st_context_attribs attribs;
+   enum st_context_error ctx_err = 0;
XMesaContext c;
 
if (!xmdpy)
@@ -905,8 +906,8 @@ XMesaContext XMesaCreateContext( XMesaVisual v, 
XMesaContext share_list,
&& ((profileMask & GLX_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB) == 0))
   attribs.profile = ST_PROFILE_OPENGL_CORE;
 
-   c->st = stapi->create_context(stapi, xmdpy->smapi,
- &attribs, (share_list) ? share_list->st : NULL);
+   c->st = stapi->create_context(stapi, xmdpy->smapi, &attribs,
+ &ctx_err, (share_list) ? share_list->st : NULL);
if (c->st == NULL)
   goto fail;
 
diff --git a/src/gallium/state_trackers/wgl/stw_context.c 
b/src/gallium/state_trackers/wgl/stw_context.c
index 2c4fb0e..abdcf1e 100644
--- a/src/gallium/state_trackers/wgl/stw_context.c
+++ b/src/gallium/state_trackers/wgl/stw_context.c
@@ -142,6 +142,7 @@ stw_create_context_attribs(
struct st_context_attribs attribs;
struct stw_context *ctx = NULL;
struct stw_context *shareCtx = NULL;
+   enum st_context_error ctx_err = 0;
 
if (!stw_dev)
   return 0;
@@ -190,12 +191,12 @@ stw_create_context_attribs(
 * WGL_CONTEXT_CORE_PROFILE_BIT_ARB."
 */
attribs.profile = ST_PROFILE_DEFAULT;
-   if ((major > 3 || (major == 3 && minor >= 2))
+   if ((majorVersion > 3 || (majorVersion == 3 && minorVersion >= 2))
&& ((profileMask & WGL_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB) == 0))
   attribs.profile = ST_PROFILE_OPENGL_CORE;
 
ctx->st = stw_dev->stapi->create_context(stw_dev->stapi,
- stw_dev->smapi, &attribs, shareCtx ? shareCtx->st : NULL);
+ stw_dev->smapi, &attribs, &ctx_err, shareCtx ? shareCtx->st : NULL);
if (ctx->st == NULL)
   goto no_st_ctx;
 

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