Mesa (master): ilo: fold drm_intel_get_aperture_sizes() within probe_winsys()
Module: Mesa
Branch: master
Commit: f921131a5cebc233749a86cdd44b409c0cecc4ef
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f921131a5cebc233749a86cdd44b409c0cecc4ef
Author: Emil Velikov
Date: Tue Aug 19 10:02:35 2014 +0100
ilo: fold drm_intel_get_aperture_sizes() within probe_winsys()
... and store the value in intel_winsys_info/ilo_dev_info.
Suggested-by: Chia-I Wu
Signed-off-by: Emil Velikov
olv: check for errors and report raw values
---
src/gallium/drivers/ilo/ilo_common.h|2 ++
src/gallium/drivers/ilo/ilo_screen.c|5 +++--
src/gallium/winsys/intel/drm/intel_drm_winsys.c | 16 ++--
src/gallium/winsys/intel/intel_winsys.h |7 ---
4 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_common.h
b/src/gallium/drivers/ilo/ilo_common.h
index dd31f74..e4f28b3 100644
--- a/src/gallium/drivers/ilo/ilo_common.h
+++ b/src/gallium/drivers/ilo/ilo_common.h
@@ -68,6 +68,8 @@ enum ilo_debug {
struct ilo_dev_info {
/* these mirror intel_winsys_info */
int devid;
+ size_t aperture_total;
+ size_t aperture_mappable;
int max_batch_size;
bool has_llc;
bool has_address_swizzling;
diff --git a/src/gallium/drivers/ilo/ilo_screen.c
b/src/gallium/drivers/ilo/ilo_screen.c
index ad59d6d..72d66ac 100644
--- a/src/gallium/drivers/ilo/ilo_screen.c
+++ b/src/gallium/drivers/ilo/ilo_screen.c
@@ -448,8 +448,7 @@ ilo_get_param(struct pipe_screen *screen, enum pipe_cap
param)
* assume that there's some fragmentation, and we start doing extra
* flushing, etc. That's the big cliff apps will care about.
*/
- const int gpu_mappable_megabytes =
- intel_winsys_get_aperture_size(is->winsys) * 3 / 4;
+ const uint64_t gpu_mappable_megabytes = is->dev.aperture_total * 3 / 4;
uint64_t system_memory;
if (!os_get_total_physical_memory(&system_memory))
@@ -638,6 +637,8 @@ static bool
init_dev(struct ilo_dev_info *dev, const struct intel_winsys_info *info)
{
dev->devid = info->devid;
+ dev->aperture_total = info->aperture_total;
+ dev->aperture_mappable = info->aperture_mappable;
dev->max_batch_size = info->max_batch_size;
dev->has_llc = info->has_llc;
dev->has_address_swizzling = info->has_address_swizzling;
diff --git a/src/gallium/winsys/intel/drm/intel_drm_winsys.c
b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
index b394e5f..f94a1cb 100644
--- a/src/gallium/winsys/intel/drm/intel_drm_winsys.c
+++ b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
@@ -139,6 +139,12 @@ probe_winsys(struct intel_winsys *winsys)
info->devid = drm_intel_bufmgr_gem_get_devid(winsys->bufmgr);
+ if (drm_intel_get_aperture_sizes(winsys->fd,
+ &info->aperture_mappable, &info->aperture_total)) {
+ debug_error("failed to query aperture sizes");
+ return false;
+ }
+
info->max_batch_size = BATCH_SZ;
get_param(winsys, I915_PARAM_HAS_LLC, &val);
@@ -223,16 +229,6 @@ intel_winsys_get_info(const struct intel_winsys *winsys)
return &winsys->info;
}
-int
-intel_winsys_get_aperture_size(const struct intel_winsys *winsys)
-{
- size_t aper_size, mappable_size;
-
- drm_intel_get_aperture_sizes(winsys->fd, &mappable_size, &aper_size);
-
- return aper_size >> 20;
-}
-
struct intel_context *
intel_winsys_create_context(struct intel_winsys *winsys)
{
diff --git a/src/gallium/winsys/intel/intel_winsys.h
b/src/gallium/winsys/intel/intel_winsys.h
index 4bf9a16..679f248 100644
--- a/src/gallium/winsys/intel/intel_winsys.h
+++ b/src/gallium/winsys/intel/intel_winsys.h
@@ -69,6 +69,10 @@ struct intel_bo;
struct intel_winsys_info {
int devid;
+ /* the sizes of the aperture in bytes */
+ size_t aperture_total;
+ size_t aperture_mappable;
+
int max_batch_size;
bool has_llc;
bool has_address_swizzling;
@@ -91,9 +95,6 @@ intel_winsys_destroy(struct intel_winsys *winsys);
const struct intel_winsys_info *
intel_winsys_get_info(const struct intel_winsys *winsys);
-int
-intel_winsys_get_aperture_size(const struct intel_winsys *winsys);
-
/**
* Create a logical context for use with the render ring.
*/
___
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Mesa (master): r600g: copy IA_MULTI_VGT_PARAM programming from radeonsi for Cayman
Module: Mesa
Branch: master
Commit: 498dc676ea7efac9bce490006a4f5b7f81e9e458
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=498dc676ea7efac9bce490006a4f5b7f81e9e458
Author: Marek Olšák
Date: Mon Aug 18 23:16:08 2014 +0200
r600g: copy IA_MULTI_VGT_PARAM programming from radeonsi for Cayman
Reviewed-by: Alex Deucher
Reviewed-by: Michel Dänzer
---
src/gallium/drivers/r600/evergreen_state.c |2 --
src/gallium/drivers/r600/r600_pipe.h |2 +-
src/gallium/drivers/r600/r600_state_common.c | 24
src/gallium/drivers/r600/r600d.h | 11 +++
4 files changed, 36 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_state.c
b/src/gallium/drivers/r600/evergreen_state.c
index e6e9f49..841ad0c 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2243,8 +2243,6 @@ static void cayman_init_atom_start_cs(struct r600_context
*rctx)
r600_store_config_reg(cb, R_008A14_PA_CL_ENHANCE, (3 << 1) | 1);
- r600_store_context_reg(cb, CM_R_028AA8_IA_MULTI_VGT_PARAM,
S_028AA8_SWITCH_ON_EOP(1) | S_028AA8_PARTIAL_VS_WAVE_ON(1) |
S_028AA8_PRIMGROUP_SIZE(63));
-
r600_store_context_reg_seq(cb, CM_R_028BD4_PA_SC_CENTROID_PRIORITY_0,
2);
r600_store_value(cb, 0x76543210); /*
CM_R_028BD4_PA_SC_CENTROID_PRIORITY_0 */
r600_store_value(cb, 0xfedcba98); /*
CM_R_028BD8_PA_SC_CENTROID_PRIORITY_1 */
diff --git a/src/gallium/drivers/r600/r600_pipe.h
b/src/gallium/drivers/r600/r600_pipe.h
index ee836b7..e277269 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -40,7 +40,7 @@
/* the number of CS dwords for flushing and drawing */
#define R600_MAX_FLUSH_CS_DWORDS 16
-#define R600_MAX_DRAW_CS_DWORDS37
+#define R600_MAX_DRAW_CS_DWORDS40
#define R600_TRACE_CS_DWORDS 7
#define R600_MAX_USER_CONST_BUFFERS 13
diff --git a/src/gallium/drivers/r600/r600_state_common.c
b/src/gallium/drivers/r600/r600_state_common.c
index d2f0d17..7594d0e 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -1418,6 +1418,30 @@ static void r600_draw_vbo(struct pipe_context *ctx,
const struct pipe_draw_info
r600_emit_atom(rctx, rctx->atoms[i]);
}
+ if (rctx->b.chip_class == CAYMAN) {
+ /* Copied from radeonsi. */
+ unsigned primgroup_size = 128; /* recommended without a GS */
+ bool ia_switch_on_eop = false;
+ bool partial_vs_wave = false;
+
+ if (rctx->gs_shader)
+ primgroup_size = 64; /* recommended with a GS */
+
+ if ((rctx->rasterizer && rctx->rasterizer->pa_sc_line_stipple)
||
+ (rctx->b.screen->debug_flags & DBG_SWITCH_ON_EOP)) {
+ ia_switch_on_eop = true;
+ }
+
+ if (rctx->b.streamout.streamout_enabled ||
+ rctx->b.streamout.prims_gen_query_enabled)
+ partial_vs_wave = true;
+
+ r600_write_context_reg(cs, CM_R_028AA8_IA_MULTI_VGT_PARAM,
+ S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop)
|
+
S_028AA8_PARTIAL_VS_WAVE_ON(partial_vs_wave) |
+ S_028AA8_PRIMGROUP_SIZE(primgroup_size -
1));
+ }
+
/* On R6xx, CULL_FRONT=1 culls all points, lines, and rectangles,
* even though it should have no effect on those. */
if (rctx->b.chip_class == R600 && rctx->rasterizer) {
diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h
index 8405fbb..17568ab 100644
--- a/src/gallium/drivers/r600/r600d.h
+++ b/src/gallium/drivers/r600/r600d.h
@@ -3747,6 +3747,17 @@
#define SQ_TEX_INST_SAMPLE_C_G_LB 0x1E
#define SQ_TEX_INST_SAMPLE_C_G_LZ 0x1F
+#define CM_R_028AA8_IA_MULTI_VGT_PARAM0x028AA8
+#define S_028AA8_PRIMGROUP_SIZE(x) (((x) & 0x) << 0)
+#define G_028AA8_PRIMGROUP_SIZE(x) (((x) >> 0) & 0x)
+#define C_028AA8_PRIMGROUP_SIZE 0x
+#define S_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) & 0x1) << 16)
+#define G_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) >> 16) & 0x1)
+#define C_028AA8_PARTIAL_VS_WAVE_ON 0xFFFE
+#define S_028AA8_SWITCH_ON_EOP(x)(((x) & 0x1) << 17)
+#define G_028AA8_SWITCH_ON_EOP(x)(((x) >> 17) & 0x1)
+#define C_028AA8_SWITCH_ON_EOP 0xFFFD
+
/* async DMA packets */
#define DMA_PACKET(cmd, t, s, n) cmd) & 0xF) << 28) |\
(((t) & 0x1) << 23) | \
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Mesa (master): rbug: remove contexts from the list properly
Module: Mesa
Branch: master
Commit: 4a3f156dd1eda367407464d0123bd18bc140f655
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4a3f156dd1eda367407464d0123bd18bc140f655
Author: Marek Olšák
Date: Sun Aug 17 01:32:43 2014 +0200
rbug: remove contexts from the list properly
Reviewed-by: Roland Scheidegger
---
src/gallium/drivers/rbug/rbug_context.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/rbug/rbug_context.c
b/src/gallium/drivers/rbug/rbug_context.c
index 62fe543..ca94590 100644
--- a/src/gallium/drivers/rbug/rbug_context.c
+++ b/src/gallium/drivers/rbug/rbug_context.c
@@ -40,10 +40,12 @@
static void
rbug_destroy(struct pipe_context *_pipe)
{
+ struct rbug_screen *rb_screen = rbug_screen(_pipe->screen);
struct rbug_context *rb_pipe = rbug_context(_pipe);
struct pipe_context *pipe = rb_pipe->pipe;
- remove_from_list(&rb_pipe->list);
+ rbug_screen_remove_from_list(rb_screen, contexts, rb_pipe);
+
pipe_mutex_lock(rb_pipe->call_mutex);
pipe->destroy(pipe);
rb_pipe->pipe = NULL;
___
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Mesa (master): radeonsi: set IA_MULTI_VGT_PARAM on SI the same as on CIK ( v2)
Module: Mesa
Branch: master
Commit: 94e474f3c3cb9f846c0fd6443d154baa1baeaecb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=94e474f3c3cb9f846c0fd6443d154baa1baeaecb
Author: Marek Olšák
Date: Fri Aug 15 16:32:03 2014 +0200
radeonsi: set IA_MULTI_VGT_PARAM on SI the same as on CIK (v2)
Nothing's changed for CIK here.
Reviewed-by: Alex Deucher
Reviewed-by: Michel Dänzer
---
src/gallium/drivers/radeonsi/si_state.c |6 --
src/gallium/drivers/radeonsi/si_state_draw.c | 90 ++
2 files changed, 50 insertions(+), 46 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 4ab2b8b..571c487 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3044,12 +3044,6 @@ void si_init_config(struct si_context *sctx)
si_pm4_set_reg(pm4, R_028B90_VGT_GS_INSTANCE_CNT, 0);
si_pm4_set_reg(pm4, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 0x0);
- if (sctx->b.chip_class == SI) {
- si_pm4_set_reg(pm4, R_028AA8_IA_MULTI_VGT_PARAM,
- S_028AA8_SWITCH_ON_EOP(1) |
- S_028AA8_PARTIAL_VS_WAVE_ON(1) |
- S_028AA8_PRIMGROUP_SIZE(63));
- }
si_pm4_set_reg(pm4, R_028AB4_VGT_REUSE_OFF, 0x);
si_pm4_set_reg(pm4, R_028AB8_VGT_VTX_CNT_EN, 0x0);
if (sctx->b.chip_class < CIK)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/gallium/drivers/radeonsi/si_state_draw.c
index 573487c..2e999f6 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -379,6 +379,53 @@ static unsigned si_conv_prim_to_gs_out(unsigned mode)
return prim_conv[mode];
}
+static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
+ const struct pipe_draw_info *info)
+{
+ struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
+ unsigned prim = info->mode;
+ unsigned primgroup_size = 64;
+
+ /* SWITCH_ON_EOP(0) is always preferable. */
+ bool wd_switch_on_eop = false;
+ bool ia_switch_on_eop = false;
+
+ /* This is a hardware requirement. */
+ if ((rs && rs->line_stipple_enable) ||
+ (sctx->b.screen->debug_flags & DBG_SWITCH_ON_EOP)) {
+ ia_switch_on_eop = true;
+ wd_switch_on_eop = true;
+ }
+
+ if (sctx->b.chip_class >= CIK) {
+ /* WD_SWITCH_ON_EOP has no effect on GPUs with less than
+* 4 shader engines. Set 1 to pass the assertion below.
+* The other cases are hardware requirements. */
+ if (sctx->b.screen->info.max_se < 4 ||
+ prim == PIPE_PRIM_POLYGON ||
+ prim == PIPE_PRIM_LINE_LOOP ||
+ prim == PIPE_PRIM_TRIANGLE_FAN ||
+ prim == PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY ||
+ info->primitive_restart)
+ wd_switch_on_eop = true;
+
+ /* Hawaii hangs if instancing is enabled and WD_SWITCH_ON_EOP
is 0.
+* We don't know that for indirect drawing, so treat it as
+* always problematic. */
+ if (sctx->b.family == CHIP_HAWAII &&
+ (info->indirect || info->instance_count > 1))
+ wd_switch_on_eop = true;
+
+ /* If the WD switch is false, the IA switch must be false too.
*/
+ assert(wd_switch_on_eop || !ia_switch_on_eop);
+ }
+
+ return S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) |
+ S_028AA8_PARTIAL_VS_WAVE_ON(1) |
+ S_028AA8_PRIMGROUP_SIZE(primgroup_size - 1) |
+ S_028AA8_WD_SWITCH_ON_EOP(sctx->b.chip_class >= CIK ?
wd_switch_on_eop : 0);
+}
+
static bool si_update_draw_info_state(struct si_context *sctx,
const struct pipe_draw_info *info,
const struct pipe_index_buffer *ib)
@@ -391,6 +438,7 @@ static bool si_update_draw_info_state(struct si_context
*sctx,
sctx->gs_shader->current->shader.gs_output_prim :
info->mode);
unsigned ls_mask = 0;
+ unsigned ia_multi_vgt_param = si_get_ia_multi_vgt_param(sctx, info);
if (pm4 == NULL)
return false;
@@ -401,55 +449,17 @@ static bool si_update_draw_info_state(struct si_context
*sctx,
}
if (sctx->b.chip_class >= CIK) {
- struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
- unsigned primgroup_size = 64;
-
- /* SWITCH_ON_EOP(0) is always preferable. */
- bool wd_switch_on_eop = false;
- bool ia_switch_on_eop = false;
-
- /* WD_SWITCH_ON_EOP has no effect on GPUs
Mesa (master): radeonsi: save scissor state and sample mask for u_blitter
Module: Mesa
Branch: master
Commit: 7792f9858b60fd9f9f037f1aa15dd21cba30f2c4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7792f9858b60fd9f9f037f1aa15dd21cba30f2c4
Author: Marek Olšák
Date: Sun Aug 17 16:25:01 2014 +0200
radeonsi: save scissor state and sample mask for u_blitter
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Michel Dänzer
---
src/gallium/drivers/radeonsi/si_blit.c |7 +++
src/gallium/drivers/radeonsi/si_state.c | 16 ++--
src/gallium/drivers/radeonsi/si_state.h | 14 --
3 files changed, 29 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c
b/src/gallium/drivers/radeonsi/si_blit.c
index bc31dfd..9a7a2fe 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -59,9 +59,16 @@ static void si_blitter_begin(struct pipe_context *ctx, enum
si_blitter_op op)
util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader);
util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader);
util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
+ if (sctx->queued.named.sample_mask) {
+ util_blitter_save_sample_mask(sctx->blitter,
+
sctx->queued.named.sample_mask->sample_mask);
+ }
if (sctx->queued.named.viewport) {
util_blitter_save_viewport(sctx->blitter,
&sctx->queued.named.viewport->viewport);
}
+ if (sctx->queued.named.scissor) {
+ util_blitter_save_scissor(sctx->blitter,
&sctx->queued.named.scissor->scissor);
+ }
util_blitter_save_vertex_buffer_slot(sctx->blitter,
sctx->vertex_buffer);
util_blitter_save_so_targets(sctx->blitter,
sctx->b.streamout.num_targets,
(struct
pipe_stream_output_target**)sctx->b.streamout.targets);
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 98c19d6..fc928f3 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -458,18 +458,20 @@ static void si_set_scissor_states(struct pipe_context
*ctx,
const struct pipe_scissor_state *state)
{
struct si_context *sctx = (struct si_context *)ctx;
- struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
+ struct si_state_scissor *scissor = CALLOC_STRUCT(si_state_scissor);
+ struct si_pm4_state *pm4 = &scissor->pm4;
- if (pm4 == NULL)
+ if (scissor == NULL)
return;
+ scissor->scissor = *state;
si_pm4_set_reg(pm4, R_028250_PA_SC_VPORT_SCISSOR_0_TL,
S_028250_TL_X(state->minx) | S_028250_TL_Y(state->miny) |
S_028250_WINDOW_OFFSET_DISABLE(1));
si_pm4_set_reg(pm4, R_028254_PA_SC_VPORT_SCISSOR_0_BR,
S_028254_BR_X(state->maxx) | S_028254_BR_Y(state->maxy));
- si_pm4_set_state(sctx, scissor, pm4);
+ si_pm4_set_state(sctx, scissor, scissor);
}
static void si_set_viewport_states(struct pipe_context *ctx,
@@ -2774,16 +2776,18 @@ static void si_bind_sampler_states(struct pipe_context
*ctx, unsigned shader,
static void si_set_sample_mask(struct pipe_context *ctx, unsigned sample_mask)
{
struct si_context *sctx = (struct si_context *)ctx;
- struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
+ struct si_state_sample_mask *state =
CALLOC_STRUCT(si_state_sample_mask);
+ struct si_pm4_state *pm4 = &state->pm4;
uint16_t mask = sample_mask;
-if (pm4 == NULL)
+if (state == NULL)
return;
+ state->sample_mask = mask;
si_pm4_set_reg(pm4, R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, mask | (mask <<
16));
si_pm4_set_reg(pm4, R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1, mask | (mask <<
16));
- si_pm4_set_state(sctx, sample_mask, pm4);
+ si_pm4_set_state(sctx, sample_mask, state);
}
static void si_delete_sampler_state(struct pipe_context *ctx, void *state)
diff --git a/src/gallium/drivers/radeonsi/si_state.h
b/src/gallium/drivers/radeonsi/si_state.h
index 82bea79..ce18a27 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -38,6 +38,16 @@ struct si_state_blend {
boolalpha_to_one;
};
+struct si_state_sample_mask {
+ struct si_pm4_state pm4;
+ uint16_tsample_mask;
+};
+
+struct si_state_scissor {
+ struct si_pm4_state pm4;
+ struct pipe_scissor_state scissor;
+};
+
struct si_state_viewport {
struct si_pm4_state pm4;
struct pipe_viewport_state viewport;
@@ -82,8 +92,8 @@ union si_state {
struct si_state_blend *blend;
struct si_pm4_state *blend_color;
struct si_pm4_sta
Mesa (master): radeonsi: use r600_draw_rectangle from r600g
Module: Mesa
Branch: master
Commit: db51ab6d6ada69287dfe3a671ecc1b338917e7aa
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=db51ab6d6ada69287dfe3a671ecc1b338917e7aa
Author: Marek Olšák
Date: Mon Aug 18 00:55:40 2014 +0200
radeonsi: use r600_draw_rectangle from r600g
Rectangles are easier than triangles for the rasterizer.
Reviewed-by: Michel Dänzer
---
src/gallium/drivers/r600/r600_blit.c |1 -
src/gallium/drivers/r600/r600_pipe.c |1 -
src/gallium/drivers/r600/r600_pipe.h |4 --
src/gallium/drivers/r600/r600_state_common.c | 64 -
src/gallium/drivers/radeon/r600_pipe_common.c | 64 +
src/gallium/drivers/radeon/r600_pipe_common.h |8
src/gallium/drivers/radeonsi/si_blit.c|1 -
src/gallium/drivers/radeonsi/si_pipe.c|2 +-
src/gallium/drivers/radeonsi/si_state_draw.c |7 +--
9 files changed, 77 insertions(+), 75 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_blit.c
b/src/gallium/drivers/r600/r600_blit.c
index c98206f..a3cfdae 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -22,7 +22,6 @@
*/
#include "r600_pipe.h"
#include "util/u_surface.h"
-#include "util/u_blitter.h"
#include "util/u_format.h"
#include "evergreend.h"
diff --git a/src/gallium/drivers/r600/r600_pipe.c
b/src/gallium/drivers/r600/r600_pipe.c
index 4543347..226ad6e 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -30,7 +30,6 @@
#include
#include "pipe/p_shader_tokens.h"
-#include "util/u_blitter.h"
#include "util/u_debug.h"
#include "util/u_memory.h"
#include "util/u_simple_shaders.h"
diff --git a/src/gallium/drivers/r600/r600_pipe.h
b/src/gallium/drivers/r600/r600_pipe.h
index d04fef8..ee836b7 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -32,7 +32,6 @@
#include "r600_llvm.h"
#include "r600_public.h"
-#include "util/u_blitter.h"
#include "util/u_suballoc.h"
#include "util/u_double_list.h"
#include "util/u_transfer.h"
@@ -633,9 +632,6 @@ void r600_sampler_views_dirty(struct r600_context *rctx,
void r600_sampler_states_dirty(struct r600_context *rctx,
struct r600_sampler_states *state);
void r600_constant_buffers_dirty(struct r600_context *rctx, struct
r600_constbuf_state *state);
-void r600_draw_rectangle(struct blitter_context *blitter,
-int x1, int y1, int x2, int y2, float depth,
-enum blitter_attrib_type type, const union
pipe_color_union *attrib);
uint32_t r600_translate_stencil_op(int s_op);
uint32_t r600_translate_fill(uint32_t func);
unsigned r600_tex_wrap(unsigned wrap);
diff --git a/src/gallium/drivers/r600/r600_state_common.c
b/src/gallium/drivers/r600/r600_state_common.c
index d29e137..d2f0d17 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -28,7 +28,6 @@
#include "r600_shader.h"
#include "r600d.h"
-#include "util/u_draw_quad.h"
#include "util/u_format_s3tc.h"
#include "util/u_index_modify.h"
#include "util/u_memory.h"
@@ -36,8 +35,6 @@
#include "util/u_math.h"
#include "tgsi/tgsi_parse.h"
-#define R600_PRIM_RECTANGLE_LIST PIPE_PRIM_MAX
-
void r600_init_command_buffer(struct r600_command_buffer *cb, unsigned num_dw)
{
assert(!cb->buf);
@@ -1550,67 +1547,6 @@ static void r600_draw_vbo(struct pipe_context *ctx,
const struct pipe_draw_info
rctx->b.num_draw_calls++;
}
-void r600_draw_rectangle(struct blitter_context *blitter,
-int x1, int y1, int x2, int y2, float depth,
-enum blitter_attrib_type type, const union
pipe_color_union *attrib)
-{
- struct r600_context *rctx = (struct
r600_context*)util_blitter_get_pipe(blitter);
- struct pipe_viewport_state viewport;
- struct pipe_resource *buf = NULL;
- unsigned offset = 0;
- float *vb;
-
- if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) {
- util_blitter_draw_rectangle(blitter, x1, y1, x2, y2, depth,
type, attrib);
- return;
- }
-
- /* Some operations (like color resolve on r6xx) don't work
-* with the conventional primitive types.
-* One that works is PT_RECTLIST, which we use here. */
-
- /* setup viewport */
- viewport.scale[0] = 1.0f;
- viewport.scale[1] = 1.0f;
- viewport.scale[2] = 1.0f;
- viewport.scale[3] = 1.0f;
- viewport.translate[0] = 0.0f;
- viewport.translate[1] = 0.0f;
- viewport.translate[2] = 0.0f;
- viewport.translate[3] = 0.0f;
- rctx->b.b.set_viewport_states(&rctx->b.b, 0, 1, &viewport);
-
- /* Upload vertices. The hw rectangle has only 3 vertices,
-* I guess the 4th one is derived from the first 3.
-* The vertex specification should match u_blitte
Mesa (master): radeonsi: simplify si_num_banks function
Module: Mesa
Branch: master
Commit: a099796b8aabd72b17c39d8f12b9b5fa501c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a099796b8aabd72b17c39d8f12b9b5fa501c
Author: Marek Olšák
Date: Mon Aug 18 01:09:31 2014 +0200
radeonsi: simplify si_num_banks function
This makes it easier to use.
Reviewed-by: Michel Dänzer
---
src/gallium/drivers/radeonsi/si_dma.c |6 ++
src/gallium/drivers/radeonsi/si_state.c | 19 ++-
src/gallium/drivers/radeonsi/si_state.h |3 +--
3 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_dma.c
b/src/gallium/drivers/radeonsi/si_dma.c
index e908746..a69f533 100644
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -173,8 +173,7 @@ static void si_dma_copy_tile(struct si_context *ctx,
tile_split = cik_tile_split(rsrc->surface.tile_split);
tile_mode_index = si_tile_mode_index(rsrc, src_level,
util_format_has_stencil(util_format_description(src->format)));
- nbanks = si_num_banks(sscreen, rsrc->surface.bpe,
rsrc->surface.tile_split,
- tile_mode_index);
+ nbanks = si_num_banks(sscreen, rsrc);
base += rsrc->resource.gpu_address;
addr += rdst->resource.gpu_address;
} else {
@@ -202,8 +201,7 @@ static void si_dma_copy_tile(struct si_context *ctx,
tile_split = cik_tile_split(rdst->surface.tile_split);
tile_mode_index = si_tile_mode_index(rdst, dst_level,
util_format_has_stencil(util_format_description(dst->format)));
- nbanks = si_num_banks(sscreen, rdst->surface.bpe,
rdst->surface.tile_split,
- tile_mode_index);
+ nbanks = si_num_banks(sscreen, rdst);
base += rdst->resource.gpu_address;
addr += rsrc->resource.gpu_address;
}
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index fc928f3..4ab2b8b 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -47,15 +47,14 @@ static void si_init_atom(struct r600_atom *atom, struct
r600_atom **list_elem,
*list_elem = atom;
}
-uint32_t si_num_banks(struct si_screen *sscreen, unsigned bpe, unsigned
tile_split,
- unsigned tile_mode_index)
+uint32_t si_num_banks(struct si_screen *sscreen, struct r600_texture *tex)
{
- if ((sscreen->b.chip_class == CIK) &&
+ if (sscreen->b.chip_class == CIK &&
sscreen->b.info.cik_macrotile_mode_array_valid) {
unsigned index, tileb;
- tileb = 8 * 8 * bpe;
- tileb = MIN2(tile_split, tileb);
+ tileb = 8 * 8 * tex->surface.bpe;
+ tileb = MIN2(tex->surface.tile_split, tileb);
for (index = 0; tileb > 64; index++) {
tileb >>= 1;
@@ -65,11 +64,14 @@ uint32_t si_num_banks(struct si_screen *sscreen, unsigned
bpe, unsigned tile_spl
return (sscreen->b.info.cik_macrotile_mode_array[index] >> 6) &
0x3;
}
- if ((sscreen->b.chip_class == SI) &&
+ if (sscreen->b.chip_class == SI &&
sscreen->b.info.si_tile_mode_array_valid) {
+ /* Don't use stencil_tiling_index, because num_banks is always
+* read from the depth mode. */
+ unsigned tile_mode_index = tex->surface.tiling_index[0];
assert(tile_mode_index < 32);
- return (sscreen->b.info.si_tile_mode_array[tile_mode_index] >>
20) & 0x3;
+ return
G_009910_NUM_BANKS(sscreen->b.info.si_tile_mode_array[tile_mode_index]);
}
/* The old way. */
@@ -1820,8 +1822,7 @@ static void si_init_depth_surface(struct si_context *sctx,
macro_aspect = cik_macro_tile_aspect(macro_aspect);
bankw = cik_bank_wh(bankw);
bankh = cik_bank_wh(bankh);
- nbanks = si_num_banks(sscreen, rtex->surface.bpe,
rtex->surface.tile_split,
- ~0);
+ nbanks = si_num_banks(sscreen, rtex);
tile_mode_index = si_tile_mode_index(rtex, level, false);
pipe_config = cik_db_pipe_config(sscreen, tile_mode_index);
diff --git a/src/gallium/drivers/radeonsi/si_state.h
b/src/gallium/drivers/radeonsi/si_state.h
index ce18a27..7362ad1 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -263,8 +263,7 @@ unsigned cik_bank_wh(unsigned bankwh);
unsigned cik_db_pipe_config(struct si_screen *sscreen, unsigned tile_mode);
unsigned cik_macro_tile_aspect(unsigned macro_tile_aspect);
unsigned cik_tile_split(unsigned tile_split);
-uin
Mesa (master): rbug: fix a crash in sampler_view_destroy caused by incorrect context
Module: Mesa Branch: master Commit: ddcbe9c526060c91c3944ccdd5c8d4f70180d988 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ddcbe9c526060c91c3944ccdd5c8d4f70180d988 Author: Marek Olšák Date: Sun Aug 17 01:36:11 2014 +0200 rbug: fix a crash in sampler_view_destroy caused by incorrect context Reviewed-by: Roland Scheidegger --- src/gallium/drivers/rbug/rbug_objects.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/rbug/rbug_objects.c b/src/gallium/drivers/rbug/rbug_objects.c index c64b14c..2d80164 100644 --- a/src/gallium/drivers/rbug/rbug_objects.c +++ b/src/gallium/drivers/rbug/rbug_objects.c @@ -137,7 +137,7 @@ rbug_sampler_view_create(struct rbug_context *rb_context, rb_view->base.reference.count = 1; rb_view->base.texture = NULL; pipe_resource_reference(&rb_view->base.texture, &rb_resource->base); - rb_view->base.context = rb_context->pipe; + rb_view->base.context = &rb_context->base; rb_view->sampler_view = view; return &rb_view->base; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): gallium/util: handle PIPE_BUFFER in util_pipe_tex_to_tgsi_tex
Module: Mesa
Branch: master
Commit: 406ab1662cfc13c998c6c74fa425d11f062bdd40
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=406ab1662cfc13c998c6c74fa425d11f062bdd40
Author: Marek Olšák
Date: Sun Aug 17 01:46:31 2014 +0200
gallium/util: handle PIPE_BUFFER in util_pipe_tex_to_tgsi_tex
Reviewed-by: Roland Scheidegger
---
src/gallium/auxiliary/util/u_inlines.h |3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/auxiliary/util/u_inlines.h
b/src/gallium/auxiliary/util/u_inlines.h
index e952615..c80ec48 100644
--- a/src/gallium/auxiliary/util/u_inlines.h
+++ b/src/gallium/auxiliary/util/u_inlines.h
@@ -565,6 +565,9 @@ util_pipe_tex_to_tgsi_tex(enum pipe_texture_target
pipe_tex_target,
unsigned nr_samples)
{
switch (pipe_tex_target) {
+ case PIPE_BUFFER:
+ return TGSI_TEXTURE_BUFFER;
+
case PIPE_TEXTURE_1D:
assert(nr_samples <= 1);
return TGSI_TEXTURE_1D;
___
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Mesa (master): rbug: only add textures to the list
Module: Mesa
Branch: master
Commit: 8db7dacf29d1b87246d1f29696e34b1854a75bba
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8db7dacf29d1b87246d1f29696e34b1854a75bba
Author: Marek Olšák
Date: Sun Aug 17 01:36:57 2014 +0200
rbug: only add textures to the list
rbug-gui cannot display buffers, so it's pointless to add them.
Reviewed-by: Roland Scheidegger
---
src/gallium/drivers/rbug/rbug_objects.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/rbug/rbug_objects.c
b/src/gallium/drivers/rbug/rbug_objects.c
index 2d80164..db18f2e 100644
--- a/src/gallium/drivers/rbug/rbug_objects.c
+++ b/src/gallium/drivers/rbug/rbug_objects.c
@@ -58,7 +58,8 @@ rbug_resource_create(struct rbug_screen *rb_screen,
rb_resource->base.screen = &rb_screen->base;
rb_resource->resource = resource;
- rbug_screen_add_to_list(rb_screen, resources, rb_resource);
+ if (resource->target != PIPE_BUFFER)
+ rbug_screen_add_to_list(rb_screen, resources, rb_resource);
return &rb_resource->base;
@@ -71,7 +72,9 @@ void
rbug_resource_destroy(struct rbug_resource *rb_resource)
{
struct rbug_screen *rb_screen = rbug_screen(rb_resource->base.screen);
- rbug_screen_remove_from_list(rb_screen, resources, rb_resource);
+
+ if (rb_resource->base.target != PIPE_BUFFER)
+ rbug_screen_remove_from_list(rb_screen, resources, rb_resource);
pipe_resource_reference(&rb_resource->resource, NULL);
FREE(rb_resource);
___
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Mesa (master): radeonsi: set PARTIAL_VS_WAVE(0) when appropriate
Module: Mesa
Branch: master
Commit: 4be7ff5567fd200ab1a57c66f6003e99e2c5d7a7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4be7ff5567fd200ab1a57c66f6003e99e2c5d7a7
Author: Marek Olšák
Date: Fri Aug 15 22:45:10 2014 +0200
radeonsi: set PARTIAL_VS_WAVE(0) when appropriate
Reviewed-by: Alex Deucher
Reviewed-by: Michel Dänzer
---
src/gallium/drivers/radeonsi/si_state_draw.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/gallium/drivers/radeonsi/si_state_draw.c
index 2e999f6..f5d6550 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -389,6 +389,7 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context
*sctx,
/* SWITCH_ON_EOP(0) is always preferable. */
bool wd_switch_on_eop = false;
bool ia_switch_on_eop = false;
+ bool partial_vs_wave = false;
/* This is a hardware requirement. */
if ((rs && rs->line_stipple_enable) ||
@@ -397,6 +398,10 @@ static unsigned si_get_ia_multi_vgt_param(struct
si_context *sctx,
wd_switch_on_eop = true;
}
+ if (sctx->b.streamout.streamout_enabled ||
+ sctx->b.streamout.prims_gen_query_enabled)
+ partial_vs_wave = true;
+
if (sctx->b.chip_class >= CIK) {
/* WD_SWITCH_ON_EOP has no effect on GPUs with less than
* 4 shader engines. Set 1 to pass the assertion below.
@@ -421,7 +426,7 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context
*sctx,
}
return S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) |
- S_028AA8_PARTIAL_VS_WAVE_ON(1) |
+ S_028AA8_PARTIAL_VS_WAVE_ON(partial_vs_wave) |
S_028AA8_PRIMGROUP_SIZE(primgroup_size - 1) |
S_028AA8_WD_SWITCH_ON_EOP(sctx->b.chip_class >= CIK ?
wd_switch_on_eop : 0);
}
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Mesa (master): rbug: fix crash in set_vertex_buffers
Module: Mesa
Branch: master
Commit: b7b1ad9c6c6534757b3f30c493c425b9ffbfcf2e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7b1ad9c6c6534757b3f30c493c425b9ffbfcf2e
Author: Marek Olšák
Date: Sun Aug 17 01:33:27 2014 +0200
rbug: fix crash in set_vertex_buffers
Reviewed-by: Roland Scheidegger
---
src/gallium/drivers/rbug/rbug_context.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/rbug/rbug_context.c
b/src/gallium/drivers/rbug/rbug_context.c
index ca94590..d6fca2e 100644
--- a/src/gallium/drivers/rbug/rbug_context.c
+++ b/src/gallium/drivers/rbug/rbug_context.c
@@ -758,7 +758,7 @@ rbug_set_vertex_buffers(struct pipe_context *_pipe,
pipe_mutex_lock(rb_pipe->call_mutex);
- if (num_buffers) {
+ if (num_buffers && _buffers) {
memcpy(unwrapped_buffers, _buffers, num_buffers * sizeof(*_buffers));
for (i = 0; i < num_buffers; i++)
unwrapped_buffers[i].buffer =
rbug_resource_unwrap(_buffers[i].buffer);
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Mesa (master): radeonsi: don't set CB_SHADER_MASK= 1 if there are no color outputs
Module: Mesa Branch: master Commit: 25633c85e12f957e5f9e4b816f85697539b1da5f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=25633c85e12f957e5f9e4b816f85697539b1da5f Author: Marek Olšák Date: Mon Aug 18 00:51:47 2014 +0200 radeonsi: don't set CB_SHADER_MASK=1 if there are no color outputs This hack isn't needed anymore because of the previous u_blitter commit. Reviewed-by: Michel Dänzer --- src/gallium/drivers/radeonsi/si_shader.c |4 1 file changed, 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 3fcd314..08ba8b0 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1514,10 +1514,6 @@ static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context * bld_base) last_args[6]= uint->zero; last_args[7]= uint->zero; last_args[8]= uint->zero; - - si_shader_ctx->shader->spi_shader_col_format |= - V_028714_SPI_SHADER_32_ABGR; - si_shader_ctx->shader->cb_shader_mask |= S_02823C_OUTPUT0_ENABLE(0xf); } /* Specify whether the EXEC mask represents the valid mask */ ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): gallium/radeon: Do not use u_upload_mgr for buffer downloads
Module: Mesa
Branch: master
Commit: 5ae9bdafd4bd50c0a72abb7cca5f8407efcb4cba
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ae9bdafd4bd50c0a72abb7cca5f8407efcb4cba
Author: Niels Ole Salscheider
Date: Thu Aug 14 20:22:26 2014 +0200
gallium/radeon: Do not use u_upload_mgr for buffer downloads
Instead create a staging texture with pipe_buffer_create and
PIPE_USAGE_STAGING.
u_upload_mgr sets the usage of its staging buffer to PIPE_USAGE_STREAM.
But since 150ac07b855b5c5f879bf6ce9ca421ccd1a6c938 CPU -> GPU streaming buffers
are created in VRAM. Therefore the staging texture (in VRAM) does not offer any
performance improvements for buffer downloads.
Signed-off-by: Niels Ole Salscheider
Reviewed-by: Michel Dänzer
Signed-off-by: Marek Olšák
---
src/gallium/drivers/radeon/r600_buffer_common.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c
b/src/gallium/drivers/radeon/r600_buffer_common.c
index 22bc97e..ee05776 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -303,26 +303,22 @@ static void *r600_buffer_transfer_map(struct pipe_context
*ctx,
!(usage & PIPE_TRANSFER_WRITE) &&
rbuffer->domains == RADEON_DOMAIN_VRAM &&
r600_can_dma_copy_buffer(rctx, 0, box->x, box->width)) {
- unsigned offset;
- struct r600_resource *staging = NULL;
-
- u_upload_alloc(rctx->uploader, 0,
- box->width + (box->x %
R600_MAP_BUFFER_ALIGNMENT),
- &offset, (struct pipe_resource**)&staging,
(void**)&data);
+ struct r600_resource *staging;
+ staging = (struct r600_resource*) pipe_buffer_create(
+ ctx->screen, PIPE_BIND_TRANSFER_READ,
PIPE_USAGE_STAGING,
+ box->width + (box->x %
R600_MAP_BUFFER_ALIGNMENT));
if (staging) {
- data += box->x % R600_MAP_BUFFER_ALIGNMENT;
-
/* Copy the VRAM buffer to the staging buffer. */
rctx->dma_copy(ctx, &staging->b.b, 0,
- offset + box->x %
R600_MAP_BUFFER_ALIGNMENT,
+ box->x % R600_MAP_BUFFER_ALIGNMENT,
0, 0, resource, level, box);
- /* Just do the synchronization. The buffer is mapped
already. */
- r600_buffer_map_sync_with_rings(rctx, staging,
PIPE_TRANSFER_READ);
+ data = r600_buffer_map_sync_with_rings(rctx, staging,
PIPE_TRANSFER_READ);
+ data += box->x % R600_MAP_BUFFER_ALIGNMENT;
return r600_buffer_get_transfer(ctx, resource, level,
usage, box,
- ptransfer, data,
staging, offset);
+ ptransfer, data,
staging, 0);
}
}
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Mesa (master): gallium/u_blitter: don' t use an empty fragment shader if there's a colorbuffer
Module: Mesa Branch: master Commit: a6fcdbf560804ede8e5574d31ca152f9c400198a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6fcdbf560804ede8e5574d31ca152f9c400198a Author: Marek Olšák Date: Mon Aug 18 00:47:01 2014 +0200 gallium/u_blitter: don't use an empty fragment shader if there's a colorbuffer This is custom code used by some drivers. Reviewed-by: Roland Scheidegger --- src/gallium/auxiliary/util/u_blitter.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/util/u_blitter.c b/src/gallium/auxiliary/util/u_blitter.c index 20fbd80..609e02f 100644 --- a/src/gallium/auxiliary/util/u_blitter.c +++ b/src/gallium/auxiliary/util/u_blitter.c @@ -1799,7 +1799,7 @@ void util_blitter_custom_depth_stencil(struct blitter_context *blitter, pipe->bind_blend_state(pipe, cbsurf ? ctx->blend[PIPE_MASK_RGBA] : ctx->blend[0]); pipe->bind_depth_stencil_alpha_state(pipe, dsa_stage); - ctx->bind_fs_state(pipe, ctx->fs_empty); + ctx->bind_fs_state(pipe, cbsurf ? ctx->fs_write_one_cbuf : ctx->fs_empty); pipe->bind_vertex_elements_state(pipe, ctx->velem_state); /* set a framebuffer state */ ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): rbug: implement streamout context functions
Module: Mesa
Branch: master
Commit: 90d10f467f896a72f50de5ee22d8cb36cdb50ad6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=90d10f467f896a72f50de5ee22d8cb36cdb50ad6
Author: Marek Olšák
Date: Sun Aug 17 01:33:46 2014 +0200
rbug: implement streamout context functions
Reviewed-by: Roland Scheidegger
---
src/gallium/drivers/rbug/rbug_context.c | 46 +++
1 file changed, 46 insertions(+)
diff --git a/src/gallium/drivers/rbug/rbug_context.c
b/src/gallium/drivers/rbug/rbug_context.c
index d6fca2e..71bc216 100644
--- a/src/gallium/drivers/rbug/rbug_context.c
+++ b/src/gallium/drivers/rbug/rbug_context.c
@@ -803,6 +803,49 @@ rbug_set_sample_mask(struct pipe_context *_pipe,
pipe_mutex_unlock(rb_pipe->call_mutex);
}
+static struct pipe_stream_output_target *
+rbug_create_stream_output_target(struct pipe_context *_pipe,
+ struct pipe_resource *_res,
+ unsigned buffer_offset, unsigned buffer_size)
+{
+ struct rbug_context *rb_pipe = rbug_context(_pipe);
+ struct pipe_context *pipe = rb_pipe->pipe;
+ struct pipe_resource *res = rbug_resource_unwrap(_res);
+ struct pipe_stream_output_target *target;
+
+ pipe_mutex_lock(rb_pipe->call_mutex);
+ target = pipe->create_stream_output_target(pipe, res, buffer_offset,
+ buffer_size);
+ pipe_mutex_unlock(rb_pipe->call_mutex);
+ return target;
+}
+
+static void
+rbug_stream_output_target_destroy(struct pipe_context *_pipe,
+ struct pipe_stream_output_target *target)
+{
+ struct rbug_context *rb_pipe = rbug_context(_pipe);
+ struct pipe_context *pipe = rb_pipe->pipe;
+
+ pipe_mutex_lock(rb_pipe->call_mutex);
+ pipe->stream_output_target_destroy(pipe, target);
+ pipe_mutex_unlock(rb_pipe->call_mutex);
+}
+
+static void
+rbug_set_stream_output_targets(struct pipe_context *_pipe,
+ unsigned num_targets,
+ struct pipe_stream_output_target **targets,
+ const unsigned *offsets)
+{
+ struct rbug_context *rb_pipe = rbug_context(_pipe);
+ struct pipe_context *pipe = rb_pipe->pipe;
+
+ pipe_mutex_lock(rb_pipe->call_mutex);
+ pipe->set_stream_output_targets(pipe, num_targets, targets, offsets);
+ pipe_mutex_unlock(rb_pipe->call_mutex);
+}
+
static void
rbug_resource_copy_region(struct pipe_context *_pipe,
struct pipe_resource *_dst,
@@ -1174,6 +1217,9 @@ rbug_context_create(struct pipe_screen *_screen, struct
pipe_context *pipe)
rb_pipe->base.set_vertex_buffers = rbug_set_vertex_buffers;
rb_pipe->base.set_index_buffer = rbug_set_index_buffer;
rb_pipe->base.set_sample_mask = rbug_set_sample_mask;
+ rb_pipe->base.create_stream_output_target =
rbug_create_stream_output_target;
+ rb_pipe->base.stream_output_target_destroy =
rbug_stream_output_target_destroy;
+ rb_pipe->base.set_stream_output_targets = rbug_set_stream_output_targets;
rb_pipe->base.resource_copy_region = rbug_resource_copy_region;
rb_pipe->base.blit = rbug_blit;
rb_pipe->base.flush_resource = rbug_flush_resource;
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Mesa (master): rbug: send the actual number of layers to the client
Module: Mesa
Branch: master
Commit: ba81a3784b451d9c7af2bb15f54bfdfcba42
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba81a3784b451d9c7af2bb15f54bfdfcba42
Author: Marek Olšák
Date: Sun Aug 17 01:34:33 2014 +0200
rbug: send the actual number of layers to the client
This sends the correct value for array textures.
Reviewed-by: Roland Scheidegger
---
src/gallium/drivers/rbug/rbug_core.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/rbug/rbug_core.c
b/src/gallium/drivers/rbug/rbug_core.c
index c5b26b8..ece5e2f 100644
--- a/src/gallium/drivers/rbug/rbug_core.c
+++ b/src/gallium/drivers/rbug/rbug_core.c
@@ -204,6 +204,7 @@ rbug_texture_info(struct rbug_rbug *tr_rbug, struct
rbug_header *header, uint32_
struct rbug_proto_texture_info *gpti = (struct rbug_proto_texture_info
*)header;
struct rbug_list *ptr;
struct pipe_resource *t;
+ unsigned num_layers;
pipe_mutex_lock(rb_screen->list_mutex);
foreach(ptr, &rb_screen->resources) {
@@ -219,11 +220,13 @@ rbug_texture_info(struct rbug_rbug *tr_rbug, struct
rbug_header *header, uint32_
}
t = tr_tex->resource;
+ num_layers = util_max_layer(t, 0) + 1;
+
rbug_send_texture_info_reply(tr_rbug->con, serial,
t->target, t->format,
&t->width0, 1,
&t->height0, 1,
- &t->depth0, 1,
+ &num_layers, 1,
util_format_get_blockwidth(t->format),
util_format_get_blockheight(t->format),
util_format_get_blocksize(t->format),
___
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Mesa (master): radeonsi: bump PRIMGROUP_SIZE for some cases
Module: Mesa
Branch: master
Commit: f62f88274ae31065eaa331ad4c6c4adc0870df5d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f62f88274ae31065eaa331ad4c6c4adc0870df5d
Author: Marek Olšák
Date: Mon Aug 18 23:14:34 2014 +0200
radeonsi: bump PRIMGROUP_SIZE for some cases
Recommended by hw people.
Reviewed-by: Alex Deucher
Reviewed-by: Michel Dänzer
---
src/gallium/drivers/radeonsi/si_state_draw.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/gallium/drivers/radeonsi/si_state_draw.c
index f5d6550..0f700a8 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -384,13 +384,16 @@ static unsigned si_get_ia_multi_vgt_param(struct
si_context *sctx,
{
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
unsigned prim = info->mode;
- unsigned primgroup_size = 64;
+ unsigned primgroup_size = 128; /* recommended without a GS */
/* SWITCH_ON_EOP(0) is always preferable. */
bool wd_switch_on_eop = false;
bool ia_switch_on_eop = false;
bool partial_vs_wave = false;
+ if (sctx->gs_shader)
+ primgroup_size = 64; /* recommended with a GS */
+
/* This is a hardware requirement. */
if ((rs && rs->line_stipple_enable) ||
(sctx->b.screen->debug_flags & DBG_SWITCH_ON_EOP)) {
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Mesa (master): ilo: enable HiZ in more cases on GEN6
Module: Mesa
Branch: master
Commit: 17401896ddb6bdb670da0171ff4ba3705066f908
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=17401896ddb6bdb670da0171ff4ba3705066f908
Author: Chia-I Wu
Date: Sun Aug 17 14:13:35 2014 +0800
ilo: enable HiZ in more cases on GEN6
With layer offsetting killed, we no longer need to restrict HiZ to
non-mipmapped and non-arary depth buffers.
---
src/gallium/drivers/ilo/ilo_gpe_gen6.c | 16 +++
src/gallium/drivers/ilo/ilo_layout.c | 35 +++-
src/gallium/drivers/ilo/ilo_transfer.c | 24 ++
3 files changed, 44 insertions(+), 31 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_gpe_gen6.c
b/src/gallium/drivers/ilo/ilo_gpe_gen6.c
index 9c5c4c8..c3ba9e3 100644
--- a/src/gallium/drivers/ilo/ilo_gpe_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_gpe_gen6.c
@@ -1075,6 +1075,7 @@ zs_init_info(const struct ilo_dev_info *dev,
info->zs.bo = tex->bo;
info->zs.stride = tex->layout.bo_stride;
info->zs.tiling = tex->layout.tiling;
+ info->zs.offset = 0;
}
if (tex->separate_s8 || format == PIPE_FORMAT_S8_UINT) {
@@ -1095,12 +1096,27 @@ zs_init_info(const struct ilo_dev_info *dev,
info->stencil.stride = s8_tex->layout.bo_stride * 2;
info->stencil.tiling = s8_tex->layout.tiling;
+
+ if (dev->gen == ILO_GEN(6)) {
+ unsigned x, y;
+
+ assert(s8_tex->layout.walk == ILO_LAYOUT_WALK_LOD);
+
+ /* offset to the level */
+ ilo_layout_get_slice_pos(&s8_tex->layout, level, 0, &x, &y);
+ ilo_layout_pos_to_mem(&s8_tex->layout, x, y, &x, &y);
+ info->stencil.offset = ilo_layout_mem_to_raw(&s8_tex->layout, x, y);
+ }
}
if (ilo_texture_can_enable_hiz(tex, level, first_layer, num_layers)) {
info->hiz.bo = tex->aux_bo;
info->hiz.stride = tex->layout.aux_stride;
info->hiz.tiling = INTEL_TILING_Y;
+
+ /* offset to the level */
+ if (dev->gen == ILO_GEN(6))
+ info->hiz.offset = tex->layout.aux_offsets[level];
}
info->width = tex->layout.width0;
diff --git a/src/gallium/drivers/ilo/ilo_layout.c
b/src/gallium/drivers/ilo/ilo_layout.c
index b6e9585..070ee21 100644
--- a/src/gallium/drivers/ilo/ilo_layout.c
+++ b/src/gallium/drivers/ilo/ilo_layout.c
@@ -769,7 +769,6 @@ layout_want_hiz(const struct ilo_layout *layout,
const struct pipe_resource *templ = params->templ;
const struct util_format_description *desc =
util_format_description(templ->format);
- bool want_hiz = false;
if (ilo_debug & ILO_DEBUG_NOHIZ)
return false;
@@ -784,29 +783,19 @@ layout_want_hiz(const struct ilo_layout *layout,
if (templ->usage == PIPE_USAGE_STAGING)
return false;
- if (params->dev->gen >= ILO_GEN(7)) {
- want_hiz = true;
- } else {
- /*
- * From the Sandy Bridge PRM, volume 2 part 1, page 312:
- *
- * "The hierarchical depth buffer does not support the LOD field, it
- * is assumed by hardware to be zero. A separate hierarachical
- * depth buffer is required for each LOD used, and the
- * corresponding buffer's state delivered to hardware each time a
- * new depth buffer state with modified LOD is delivered."
- *
- * But we have a stronger requirement. Because of layer offsetting
- * (check out the callers of ilo_layout_get_slice_tile_offset()), we
- * already have to require the texture to be non-mipmapped and
- * non-array.
- */
- if (templ->last_level == 0 && templ->array_size == 1 &&
- templ->depth0 == 1)
- want_hiz = true;
- }
+ /*
+* As can be seen in layout_calculate_hiz_size(), HiZ may not be enabled
+* for every level. This is generally fine except on GEN6, where HiZ and
+* separate stencil are enabled and disabled at the same time. When the
+* format is PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, enabling and disabling HiZ
+* can result in incompatible formats.
+*/
+ if (params->dev->gen == ILO_GEN(6) &&
+ templ->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT &&
+ templ->last_level)
+ return false;
- return want_hiz;
+ return true;
}
static void
diff --git a/src/gallium/drivers/ilo/ilo_transfer.c
b/src/gallium/drivers/ilo/ilo_transfer.c
index d40dce8..a38708d 100644
--- a/src/gallium/drivers/ilo/ilo_transfer.c
+++ b/src/gallium/drivers/ilo/ilo_transfer.c
@@ -77,10 +77,12 @@
* correctly block when the resource is busy.
*/
static bool
-resource_get_transfer_method(struct pipe_resource *res, unsigned usage,
+resource_get_transfer_method(struct pipe_resource *res,
+ const struct pipe_transfer *transfer,
enum ilo_transfer_map_method *method)
{
const struct ilo_screen *is = ilo_screen(res->screen);
+ const unsigned usage = transfer->usage;
enum ilo_transfer_map_method m;
bool tiled;
@@ -
Mesa (master): ilo: migrate to ilo_layout
Module: Mesa Branch: master Commit: fb3d506431871fdb04fc84bbcc916d8f9d7c9954 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb3d506431871fdb04fc84bbcc916d8f9d7c9954 Author: Chia-I Wu Date: Fri Aug 8 15:36:36 2014 +0800 ilo: migrate to ilo_layout Embed an ilo_layout in ilo_texture, and remove now duplicated members. --- src/gallium/drivers/ilo/ilo_blitter_blt.c | 44 +- src/gallium/drivers/ilo/ilo_blitter_rectlist.c | 12 +- src/gallium/drivers/ilo/ilo_gpe_gen6.c | 47 +- src/gallium/drivers/ilo/ilo_gpe_gen7.c | 27 +- src/gallium/drivers/ilo/ilo_resource.c | 1381 ++-- src/gallium/drivers/ilo/ilo_resource.h | 54 +- src/gallium/drivers/ilo/ilo_state.c|2 +- src/gallium/drivers/ilo/ilo_transfer.c | 100 +- 8 files changed, 213 insertions(+), 1454 deletions(-) Diff: http://cgit.freedesktop.org/mesa/mesa/diff/?id=fb3d506431871fdb04fc84bbcc916d8f9d7c9954 ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: fix PIPE_CAP_VIDEO_MEMORY
Module: Mesa Branch: master Commit: 58511b62c478bd0f2546e2cfbe2a4563803fdc77 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=58511b62c478bd0f2546e2cfbe2a4563803fdc77 Author: Chia-I Wu Date: Tue Aug 19 19:52:07 2014 +0800 ilo: fix PIPE_CAP_VIDEO_MEMORY I changed Emil's patch in f921131a5cebc233749a86cdd44b409c0cecc4ef to report raw values in the winsys, but forgot to convert the values to megabytes in the pipe driver. --- src/gallium/drivers/ilo/ilo_screen.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/ilo/ilo_screen.c b/src/gallium/drivers/ilo/ilo_screen.c index 72d66ac..2a22a55 100644 --- a/src/gallium/drivers/ilo/ilo_screen.c +++ b/src/gallium/drivers/ilo/ilo_screen.c @@ -448,13 +448,13 @@ ilo_get_param(struct pipe_screen *screen, enum pipe_cap param) * assume that there's some fragmentation, and we start doing extra * flushing, etc. That's the big cliff apps will care about. */ - const uint64_t gpu_mappable_megabytes = is->dev.aperture_total * 3 / 4; + const uint64_t gpu_memory = is->dev.aperture_total * 3 / 4; uint64_t system_memory; if (!os_get_total_physical_memory(&system_memory)) return 0; - return MIN2(gpu_mappable_megabytes, (int)(system_memory >> 20)); + return (int) (MIN2(gpu_memory, system_memory) >> 20); } case PIPE_CAP_UMA: return true; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: add new resource layout code
Module: Mesa Branch: master Commit: 925359bc784399c1a65a46e2b136da3c4d30388d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=925359bc784399c1a65a46e2b136da3c4d30388d Author: Chia-I Wu Date: Fri Aug 8 12:42:50 2014 +0800 ilo: add new resource layout code Based on the old code, the new layout code describes the layout with the new, well-documented, ilo_layout. It also gains new features such as MCS support and extended ARYSPC_LOD0 that i965 comes up with (see 6345a94a9b134b1321b3b290bacde228b12af415). --- src/gallium/drivers/ilo/Makefile.sources |1 + src/gallium/drivers/ilo/ilo_layout.c | 1481 ++ src/gallium/drivers/ilo/ilo_layout.h | 297 ++ 3 files changed, 1779 insertions(+) Diff: http://cgit.freedesktop.org/mesa/mesa/diff/?id=925359bc784399c1a65a46e2b136da3c4d30388d ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: remove layer offsetting
Module: Mesa
Branch: master
Commit: 5b4fc5f156bff72e63e2f528004a48d008d3af6f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b4fc5f156bff72e63e2f528004a48d008d3af6f
Author: Chia-I Wu
Date: Sun Aug 17 14:09:43 2014 +0800
ilo: remove layer offsetting
Follow i965 to kill layer offsetting for GEN6.
---
src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c | 34 +---
src/gallium/drivers/ilo/ilo_gpe.h | 13 +-
src/gallium/drivers/ilo/ilo_gpe_gen6.c | 232 ++--
src/gallium/drivers/ilo/ilo_gpe_gen7.c | 45 +
src/gallium/drivers/ilo/ilo_layout.c | 83 -
src/gallium/drivers/ilo/ilo_layout.h |5 -
src/gallium/drivers/ilo/ilo_state.c|8 +-
7 files changed, 27 insertions(+), 393 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
b/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
index c2da385..227492a 100644
--- a/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
@@ -724,7 +724,6 @@ gen6_pipeline_wm_depth(struct ilo_3d_pipeline *p,
/* 3DSTATE_DEPTH_BUFFER and 3DSTATE_CLEAR_PARAMS */
if (DIRTY(FB) || session->batch_bo_changed) {
const struct ilo_zs_surface *zs;
- struct ilo_zs_surface layer;
uint32_t clear_params;
if (ilo->fb.state.zsbuf) {
@@ -734,22 +733,9 @@ gen6_pipeline_wm_depth(struct ilo_3d_pipeline *p,
ilo_texture_get_slice(ilo_texture(surface->base.texture),
surface->base.u.tex.level, surface->base.u.tex.first_layer);
- if (ilo->fb.offset_to_layers) {
-assert(surface->base.u.tex.first_layer ==
- surface->base.u.tex.last_layer);
-
-ilo_gpe_init_zs_surface(ilo->dev,
- ilo_texture(surface->base.texture),
- surface->base.format, surface->base.u.tex.level,
- surface->base.u.tex.first_layer, 1, true, &layer);
-
-zs = &layer;
- }
- else {
-assert(!surface->is_rt);
-zs = &surface->u.zs;
- }
+ assert(!surface->is_rt);
+ zs = &surface->u.zs;
clear_params = slice->clear_value;
}
else {
@@ -901,22 +887,6 @@ gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
surface_state[i] =
gen6_emit_SURFACE_STATE(p->dev, &fb->null_rt, true, p->cp);
}
- else if (fb->offset_to_layers) {
-struct ilo_view_surface layer;
-
-assert(surface->base.u.tex.first_layer ==
- surface->base.u.tex.last_layer);
-
-ilo_gpe_init_view_surface_for_texture(ilo->dev,
- ilo_texture(surface->base.texture),
- surface->base.format,
- surface->base.u.tex.level, 1,
- surface->base.u.tex.first_layer, 1,
- true, true, &layer);
-
-surface_state[i] =
- gen6_emit_SURFACE_STATE(p->dev, &layer, true, p->cp);
- }
else {
assert(surface && surface->is_rt);
surface_state[i] =
diff --git a/src/gallium/drivers/ilo/ilo_gpe.h
b/src/gallium/drivers/ilo/ilo_gpe.h
index 684626d..4c226fd 100644
--- a/src/gallium/drivers/ilo/ilo_gpe.h
+++ b/src/gallium/drivers/ilo/ilo_gpe.h
@@ -260,7 +260,6 @@ struct ilo_fb_state {
struct ilo_zs_surface null_zs;
unsigned num_samples;
- bool offset_to_layers;
};
struct ilo_global_binding {
@@ -383,7 +382,7 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct
ilo_dev_info *dev,
unsigned num_levels,
unsigned first_layer,
unsigned num_layers,
- bool is_rt, bool offset_to_layer,
+ bool is_rt,
struct ilo_view_surface *surf);
void
@@ -409,7 +408,7 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct
ilo_dev_info *dev,
unsigned num_levels,
unsigned first_layer,
unsigned num_layers,
- bool is_rt, bool offset_to_layer,
+ bool is_rt,
struct ilo_view_surface *surf);
static inline void
@@ -455,18 +454,18 @@ ilo_gpe_init_view_surface_for_texture(const struct
ilo_dev_info *dev,
unsigned num_levels,
unsigned first_layer,
unsigned num_layers,
- bool is_rt, bool offset_to_layer,
+ bool is_rt,
Mesa (master): docs: Update status of ARB_conditional_render_inverted
Module: Mesa Branch: master Commit: eed8b19aac4d66d8810956cf83dbd9a82704f32d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eed8b19aac4d66d8810956cf83dbd9a82704f32d Author: Tobias Klausmann Date: Sat Aug 16 03:43:19 2014 +0200 docs: Update status of ARB_conditional_render_inverted Done for: nvc0, softpipe and llvmpipe Reviewed-by: Ilia Mirkin Reviewed-by: Roland Scheidegger Signed-off-by: Tobias Klausmann --- docs/GL3.txt|2 +- docs/relnotes/10.3.html |3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index b38e42c..5549b30 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -186,7 +186,7 @@ GL 4.5, GLSL 4.50: GL_ARB_ES3_1_compatibility not started GL_ARB_clip_control not started - GL_ARB_conditional_render_inverted not started + GL_ARB_conditional_render_inverted DONE (nvc0, softpipe, llvmpipe) GL_ARB_cull_distance not started GL_ARB_derivative_controlDONE (i965, nv50, nvc0, r600) GL_ARB_direct_state_access not started diff --git a/docs/relnotes/10.3.html b/docs/relnotes/10.3.html index 124425e..5f4f8fd 100644 --- a/docs/relnotes/10.3.html +++ b/docs/relnotes/10.3.html @@ -47,6 +47,7 @@ Note: some of the new features are only available with certain drivers. GL_ARB_ES3_compatibility on nv50, nvc0, r600, radeonsi, softpipe, llvmpipe GL_ARB_clear_texture on i965 GL_ARB_compressed_texture_pixel_storage on all drivers +GL_ARB_conditional_render_inverted on nvc0, softpipe, llvmpipe GL_ARB_derivative_control on i965, nv50, nvc0, r600 GL_ARB_draw_indirect on nvc0, radeonsi GL_ARB_explicit_uniform_location (all drivers that support GLSL) @@ -68,7 +69,7 @@ Note: some of the new features are only available with certain drivers. GLX_MESA_query_renderer on nv30, nv50, nvc0, r300, r600, radeonsi, softpipe, llvmpipe A new software rasterizer driver (kms_swrast_dri.so) that works with DRM drivers that don't have a full-fledged GEM (such as qxl or simpledrm) -Distribute the Khronos GL/glcorearb.h header file. +Distribute the Khronos GL/glcorearb.h header file. ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nvc0: Handle ARB_conditional_render_inverted and enable it
Module: Mesa
Branch: master
Commit: a2fc85f5d0ffe4e46234bebcf24c5d24c5754b44
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a2fc85f5d0ffe4e46234bebcf24c5d24c5754b44
Author: Tobias Klausmann
Date: Sat Aug 16 03:44:26 2014 +0200
nvc0: Handle ARB_conditional_render_inverted and enable it
Reviewed-by: Ilia Mirkin
Signed-off-by: Tobias Klausmann
---
src/gallium/drivers/nouveau/nvc0/nvc0_context.h |3 +-
src/gallium/drivers/nouveau/nvc0/nvc0_query.c | 61 ---
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c |3 +-
src/gallium/drivers/nouveau/nvc0/nvc0_surface.c |2 +-
4 files changed, 37 insertions(+), 32 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
index ebeb8c4..8ae78e9 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
@@ -196,8 +196,9 @@ struct nvc0_context {
unsigned num_tfbbufs;
struct pipe_query *cond_query;
- boolean cond_cond;
+ boolean cond_cond; /* inverted rendering condition */
uint cond_mode;
+ uint32_t cond_condmode; /* the calculated condition */
struct nvc0_blitctx *blit;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
index 50cef1e..007f8c4 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
@@ -542,46 +542,51 @@ nvc0_render_condition(struct pipe_context *pipe,
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
struct nvc0_query *q;
uint32_t cond;
- boolean negated = FALSE;
boolean wait =
mode != PIPE_RENDER_COND_NO_WAIT &&
mode != PIPE_RENDER_COND_BY_REGION_NO_WAIT;
+ if (!pq) {
+ cond = NVC0_3D_COND_MODE_ALWAYS;
+ }
+ else {
+ q = nvc0_query(pq);
+ /* NOTE: comparison of 2 queries only works if both have completed */
+ switch (q->type) {
+ case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
+ cond = condition ? NVC0_3D_COND_MODE_EQUAL :
+ NVC0_3D_COND_MODE_NOT_EQUAL;
+ wait = TRUE;
+ break;
+ case PIPE_QUERY_OCCLUSION_COUNTER:
+ case PIPE_QUERY_OCCLUSION_PREDICATE:
+ if (likely(!condition)) {
+if (unlikely(q->nesting))
+ cond = wait ? NVC0_3D_COND_MODE_NOT_EQUAL :
+ NVC0_3D_COND_MODE_ALWAYS;
+else
+ cond = NVC0_3D_COND_MODE_RES_NON_ZERO;
+ } else {
+cond = wait ? NVC0_3D_COND_MODE_EQUAL : NVC0_3D_COND_MODE_ALWAYS;
+ }
+ break;
+ default:
+ assert(!"render condition query not a predicate");
+ cond = NVC0_3D_COND_MODE_ALWAYS;
+ break;
+ }
+ }
+
nvc0->cond_query = pq;
nvc0->cond_cond = condition;
+ nvc0->cond_condmode = cond;
nvc0->cond_mode = mode;
if (!pq) {
PUSH_SPACE(push, 1);
- IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS);
+ IMMED_NVC0(push, NVC0_3D(COND_MODE), cond);
return;
}
- q = nvc0_query(pq);
-
- /* NOTE: comparison of 2 queries only works if both have completed */
- switch (q->type) {
- case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
- cond = negated ? NVC0_3D_COND_MODE_EQUAL :
- NVC0_3D_COND_MODE_NOT_EQUAL;
- wait = TRUE;
- break;
- case PIPE_QUERY_OCCLUSION_COUNTER:
- case PIPE_QUERY_OCCLUSION_PREDICATE:
- if (likely(!negated)) {
- if (unlikely(q->nesting))
-cond = wait ? NVC0_3D_COND_MODE_NOT_EQUAL :
- NVC0_3D_COND_MODE_ALWAYS;
- else
-cond = NVC0_3D_COND_MODE_RES_NON_ZERO;
- } else {
- cond = wait ? NVC0_3D_COND_MODE_EQUAL : NVC0_3D_COND_MODE_ALWAYS;
- }
- break;
- default:
- assert(!"render condition query not a predicate");
- mode = NVC0_3D_COND_MODE_ALWAYS;
- break;
- }
if (wait)
nvc0_query_fifo_wait(push, pq);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 7c2f11a..84025ef 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -167,13 +167,12 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
+ case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
return 1;
case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
case PIPE_CAP_COMPUTE:
return (class_3d == NVE4_3D_CLASS) ? 1 : 0;
- case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
- return 0;
/* unsupported caps */
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
b/src/gallium/drivers/nouveau/nvc0/nv
Mesa (master): gallium: Add and handle PIPE_CAP_CONDITIONAL_RENDER_INVERTED
Module: Mesa Branch: master Commit: fd5edee7002fbaef96618603bfe831ec7cca128d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd5edee7002fbaef96618603bfe831ec7cca128d Author: Tobias Klausmann Date: Sun Aug 17 03:37:19 2014 +0200 gallium: Add and handle PIPE_CAP_CONDITIONAL_RENDER_INVERTED Reviewed-by: Ilia Mirkin Reviewed-by: Roland Scheidegger Signed-off-by: Tobias Klausmann --- src/gallium/docs/source/screen.rst |2 ++ src/gallium/drivers/freedreno/freedreno_screen.c |1 + src/gallium/drivers/i915/i915_screen.c |1 + src/gallium/drivers/ilo/ilo_screen.c |1 + src/gallium/drivers/llvmpipe/lp_screen.c |1 + src/gallium/drivers/nouveau/nv30/nv30_screen.c |1 + src/gallium/drivers/nouveau/nv50/nv50_screen.c |1 + src/gallium/drivers/nouveau/nvc0/nvc0_screen.c |2 ++ src/gallium/drivers/r300/r300_screen.c |1 + src/gallium/drivers/r600/r600_pipe.c |1 + src/gallium/drivers/radeonsi/si_pipe.c |1 + src/gallium/drivers/softpipe/sp_screen.c |2 ++ src/gallium/drivers/svga/svga_screen.c |1 + src/gallium/drivers/vc4/vc4_screen.c |1 + src/gallium/include/pipe/p_defines.h |1 + 15 files changed, 18 insertions(+) diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst index 2694923..eee254e 100644 --- a/src/gallium/docs/source/screen.rst +++ b/src/gallium/docs/source/screen.rst @@ -223,6 +223,8 @@ The integer capabilities: * ``PIPE_CAP_VIDEO_MEMORY``: The amount of video memory in megabytes. * ``PIPE_CAP_UMA``: If the device has a unified memory architecture or on-card memory and GART. +* ``PIPE_CAP_CONDITIONAL_RENDER_INVERTED``: Whether the driver supports inverted + condition for conditional rendering. .. _pipe_capf: diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index d797bb4..ab1a740 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -217,6 +217,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: case PIPE_CAP_DRAW_INDIRECT: case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: + case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: return 0; /* Stream output. */ diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c index 0dfd3bb..40976b3 100644 --- a/src/gallium/drivers/i915/i915_screen.c +++ b/src/gallium/drivers/i915/i915_screen.c @@ -222,6 +222,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap) case PIPE_CAP_SAMPLE_SHADING: case PIPE_CAP_TEXTURE_GATHER_OFFSETS: case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: + case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: return 0; case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: diff --git a/src/gallium/drivers/ilo/ilo_screen.c b/src/gallium/drivers/ilo/ilo_screen.c index 2a22a55..15658da 100644 --- a/src/gallium/drivers/ilo/ilo_screen.c +++ b/src/gallium/drivers/ilo/ilo_screen.c @@ -435,6 +435,7 @@ ilo_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_MAX_VERTEX_STREAMS: case PIPE_CAP_DRAW_INDIRECT: case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: + case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: return 0; case PIPE_CAP_VENDOR_ID: diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c index fe52a41..08597fa 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.c +++ b/src/gallium/drivers/llvmpipe/lp_screen.c @@ -250,6 +250,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_TEXTURE_GATHER_OFFSETS: case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: + case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: return 0; case PIPE_CAP_FAKE_SW_MSAA: return 1; diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c index aad242a..80d6943 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c @@ -152,6 +152,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_COMPUTE: case PIPE_CAP_DRAW_INDIRECT: case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: + case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: return 0; case PIPE_CAP_VENDOR_ID: diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c index 2b75e3e..99dcdc5 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c @@ -200,6 +200,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
Mesa (master): mesa/st: Support ARB_conditional_render_inverted modes
Module: Mesa
Branch: master
Commit: 7a48858fcb90534a4a7415a9fa2670499a11bc39
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7a48858fcb90534a4a7415a9fa2670499a11bc39
Author: Tobias Klausmann
Date: Mon Aug 18 00:41:12 2014 +0200
mesa/st: Support ARB_conditional_render_inverted modes
Reviewed-by: Ilia Mirkin
Reviewed-by: Roland Scheidegger
Signed-off-by: Tobias Klausmann
---
src/mesa/state_tracker/st_cb_condrender.c | 20 +++-
src/mesa/state_tracker/st_extensions.c|1 +
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_cb_condrender.c
b/src/mesa/state_tracker/st_cb_condrender.c
index 8776985..f02472a 100644
--- a/src/mesa/state_tracker/st_cb_condrender.c
+++ b/src/mesa/state_tracker/st_cb_condrender.c
@@ -55,6 +55,8 @@ st_BeginConditionalRender(struct gl_context *ctx, struct
gl_query_object *q,
struct st_query_object *stq = st_query_object(q);
struct st_context *st = st_context(ctx);
uint m;
+ /* Don't invert the condition for rendering by default */
+ boolean inverted = FALSE;
st_flush_bitmap_cache(st);
@@ -71,12 +73,28 @@ st_BeginConditionalRender(struct gl_context *ctx, struct
gl_query_object *q,
case GL_QUERY_BY_REGION_NO_WAIT:
m = PIPE_RENDER_COND_BY_REGION_NO_WAIT;
break;
+ case GL_QUERY_WAIT_INVERTED:
+ m = PIPE_RENDER_COND_WAIT;
+ inverted = TRUE;
+ break;
+ case GL_QUERY_NO_WAIT_INVERTED:
+ m = PIPE_RENDER_COND_NO_WAIT;
+ inverted = TRUE;
+ break;
+ case GL_QUERY_BY_REGION_WAIT_INVERTED:
+ m = PIPE_RENDER_COND_BY_REGION_WAIT;
+ inverted = TRUE;
+ break;
+ case GL_QUERY_BY_REGION_NO_WAIT_INVERTED:
+ m = PIPE_RENDER_COND_BY_REGION_NO_WAIT;
+ inverted = TRUE;
+ break;
default:
assert(0 && "bad mode in st_BeginConditionalRender");
m = PIPE_RENDER_COND_WAIT;
}
- cso_set_render_condition(st->cso_context, stq->pq, FALSE, m);
+ cso_set_render_condition(st->cso_context, stq->pq, inverted, m);
}
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index 24e886c..4110eb5 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -460,6 +460,7 @@ void st_init_extensions(struct pipe_screen *screen,
{ o(ARB_sample_shading), PIPE_CAP_SAMPLE_SHADING
},
{ o(ARB_draw_indirect),PIPE_CAP_DRAW_INDIRECT
},
{ o(ARB_derivative_control), PIPE_CAP_TGSI_FS_FINE_DERIVATIVE
},
+ { o(ARB_conditional_render_inverted),
PIPE_CAP_CONDITIONAL_RENDER_INVERTED },
};
/* Required: render target and sampler support */
___
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Mesa (master): llvmpipe/softpipe: enable ARB_conditional_render_inverted
Module: Mesa
Branch: master
Commit: 544c54114a39b890c525b0a2d1602b21e9e4c2ee
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=544c54114a39b890c525b0a2d1602b21e9e4c2ee
Author: Tobias Klausmann
Date: Sun Aug 17 17:16:08 2014 +0200
llvmpipe/softpipe: enable ARB_conditional_render_inverted
Reviewed-by: Ilia Mirkin
Reviewed-by: Roland Scheidegger
Signed-off-by: Tobias Klausmann
---
src/gallium/drivers/llvmpipe/lp_screen.c |3 ++-
src/gallium/drivers/softpipe/sp_screen.c |2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c
b/src/gallium/drivers/llvmpipe/lp_screen.c
index 08597fa..2a6e673 100644
--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -250,10 +250,11 @@ llvmpipe_get_param(struct pipe_screen *screen, enum
pipe_cap param)
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
- case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
return 0;
case PIPE_CAP_FAKE_SW_MSAA:
return 1;
+ case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
+ return 1;
case PIPE_CAP_VENDOR_ID:
return 0x;
diff --git a/src/gallium/drivers/softpipe/sp_screen.c
b/src/gallium/drivers/softpipe/sp_screen.c
index 8fd4a0d..d54112c 100644
--- a/src/gallium/drivers/softpipe/sp_screen.c
+++ b/src/gallium/drivers/softpipe/sp_screen.c
@@ -223,7 +223,7 @@ softpipe_get_param(struct pipe_screen *screen, enum
pipe_cap param)
case PIPE_CAP_UMA:
return 0;
case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
- return 0;
+ return 1;
}
/* should only get here on unhandled cases */
debug_printf("Unexpected PIPE_CAP %d query\n", param);
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Mesa (master): glapi: add GL_ARB_conditional_render_inverted
Module: Mesa
Branch: master
Commit: 1a51751e931668e36cb53fea377677347fb0fa38
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a51751e931668e36cb53fea377677347fb0fa38
Author: Tobias Klausmann
Date: Tue Aug 19 02:20:27 2014 +0200
glapi: add GL_ARB_conditional_render_inverted
Reviewed-by: Ilia Mirkin
Reviewed-by: Chris Forbes
Signed-off-by: Tobias Klausmann
---
src/mapi/glapi/gen/gl_API.xml| 11 ++-
src/mesa/main/tests/enum_strings.cpp |4
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index a37ee4f..73f2f75 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -8364,7 +8364,16 @@
http://www.w3.org/2001/XInclude"/>
-
+
+
+
+
+
+
+
+
+
+
http://www.w3.org/2001/XInclude"/>
diff --git a/src/mesa/main/tests/enum_strings.cpp
b/src/mesa/main/tests/enum_strings.cpp
index 7bcb758..dc5fe75 100644
--- a/src/mesa/main/tests/enum_strings.cpp
+++ b/src/mesa/main/tests/enum_strings.cpp
@@ -1746,6 +1746,10 @@ const struct enum_info everything[] = {
{ 0x8E14, "GL_QUERY_NO_WAIT" },
{ 0x8E15, "GL_QUERY_BY_REGION_WAIT" },
{ 0x8E16, "GL_QUERY_BY_REGION_NO_WAIT" },
+ { 0x8E17, "GL_QUERY_WAIT_INVERTED" },
+ { 0x8E18, "GL_QUERY_NO_WAIT_INVERTED" },
+ { 0x8E19, "GL_QUERY_BY_REGION_WAIT_INVERTED" },
+ { 0x8E1A, "GL_QUERY_BY_REGION_NO_WAIT_INVERTED" },
{ 0x8E22, "GL_TRANSFORM_FEEDBACK" },
{ 0x8E23, "GL_TRANSFORM_FEEDBACK_BUFFER_PAUSED" },
{ 0x8E24, "GL_TRANSFORM_FEEDBACK_BUFFER_ACTIVE" },
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Mesa (master): mesa: add ARB_conditional_render_inverted flags
Module: Mesa
Branch: master
Commit: 64cc1876fa2c9ecd2bee4363d1db27ffc487d5f2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=64cc1876fa2c9ecd2bee4363d1db27ffc487d5f2
Author: Tobias Klausmann
Date: Sat Aug 16 03:25:28 2014 +0200
mesa: add ARB_conditional_render_inverted flags
Also add an extension bit so we can safely enable
Reviewed-by: Ilia Mirkin
Reviewed-by: Roland Scheidegger
Reviewed-by: Chris Forbes
Signed-off-by: Tobias Klausmann
---
src/mesa/main/condrender.c | 10 --
src/mesa/main/extensions.c |1 +
src/mesa/main/mtypes.h |1 +
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/condrender.c b/src/mesa/main/condrender.c
index 0ad1e5c2..54cd423 100644
--- a/src/mesa/main/condrender.c
+++ b/src/mesa/main/condrender.c
@@ -77,8 +77,14 @@ _mesa_BeginConditionalRender(GLuint queryId, GLenum mode)
case GL_QUERY_NO_WAIT:
case GL_QUERY_BY_REGION_WAIT:
case GL_QUERY_BY_REGION_NO_WAIT:
- /* OK */
- break;
+ break; /* OK */
+ case GL_QUERY_WAIT_INVERTED:
+ case GL_QUERY_NO_WAIT_INVERTED:
+ case GL_QUERY_BY_REGION_WAIT_INVERTED:
+ case GL_QUERY_BY_REGION_NO_WAIT_INVERTED:
+ if (ctx->Extensions.ARB_conditional_render_inverted)
+ break; /* OK */
+ /* fallthrough - invalid */
default:
_mesa_error(ctx, GL_INVALID_ENUM, "glBeginConditionalRender(mode=%s)",
_mesa_lookup_enum_by_nr(mode));
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index c5bd7b3..553c01e 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -94,6 +94,7 @@ static const struct extension extension_table[] = {
{ "GL_ARB_color_buffer_float", o(ARB_color_buffer_float),
GL, 2004 },
{ "GL_ARB_compressed_texture_pixel_storage",o(dummy_true),
GL, 2011 },
{ "GL_ARB_compute_shader", o(ARB_compute_shader),
GL, 2012 },
+ { "GL_ARB_conditional_render_inverted",
o(ARB_conditional_render_inverted), GL, 2014 },
{ "GL_ARB_copy_buffer", o(dummy_true),
GL, 2008 },
{ "GL_ARB_copy_image", o(ARB_copy_image),
GL, 2012 },
{ "GL_ARB_conservative_depth", o(ARB_conservative_depth),
GL, 2011 },
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 97b1ad2..cb2a4df 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3553,6 +3553,7 @@ struct gl_extensions
GLboolean ARB_clear_texture;
GLboolean ARB_color_buffer_float;
GLboolean ARB_compute_shader;
+ GLboolean ARB_conditional_render_inverted;
GLboolean ARB_conservative_depth;
GLboolean ARB_copy_image;
GLboolean ARB_depth_buffer_float;
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Mesa (master): gallium/aux: Fill in Haiku get process name code
Module: Mesa Branch: master Commit: 8cbf01f12a1a0e1052386c13d7db1554f5df9d8d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8cbf01f12a1a0e1052386c13d7db1554f5df9d8d Author: Alexander von Gluck IV Date: Mon Aug 18 21:01:48 2014 + gallium/aux: Fill in Haiku get process name code Acked-by: Brian Paul --- src/gallium/auxiliary/os/os_process.c |7 +++ 1 file changed, 7 insertions(+) diff --git a/src/gallium/auxiliary/os/os_process.c b/src/gallium/auxiliary/os/os_process.c index 3e060b9..a626228 100644 --- a/src/gallium/auxiliary/os/os_process.c +++ b/src/gallium/auxiliary/os/os_process.c @@ -36,6 +36,9 @@ # include #elif defined(PIPE_OS_BSD) || defined(PIPE_OS_APPLE) # include +#elif defined(PIPE_OS_HAIKU) +# include +# include #else #warning unexpected platform in os_process.c #endif @@ -73,6 +76,10 @@ os_get_process_name(char *procname, size_t size) #elif defined(PIPE_OS_BSD) || defined(PIPE_OS_APPLE) /* *BSD and OS X */ name = getprogname(); +#elif defined(PIPE_OS_HAIKU) + image_info info; + get_image_info(B_CURRENT_TEAM, &info); + name = info.name; #else #warning unexpected platform in os_process.c return FALSE; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): gallium/target: Add needed mesautil lib to haiku-softpipe
Module: Mesa Branch: master Commit: ef1cf69cd34701ea005a244909c71357a3dddb06 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ef1cf69cd34701ea005a244909c71357a3dddb06 Author: Alexander von Gluck IV Date: Mon Aug 18 21:40:34 2014 + gallium/target: Add needed mesautil lib to haiku-softpipe Acked-by: Brian Paul --- src/gallium/targets/haiku-softpipe/SConscript |1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/targets/haiku-softpipe/SConscript b/src/gallium/targets/haiku-softpipe/SConscript index 0381d05..c730fde 100644 --- a/src/gallium/targets/haiku-softpipe/SConscript +++ b/src/gallium/targets/haiku-softpipe/SConscript @@ -4,6 +4,7 @@ env.Prepend(LIBS = [ ws_haiku, trace, rbug, +mesautil, mesa, glsl, gallium ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): haiku/swrast: Add missing src include search path for missing util/macros.h
Module: Mesa
Branch: master
Commit: 82c23dd9625883f872ae90a00798340229947392
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=82c23dd9625883f872ae90a00798340229947392
Author: Alexander von Gluck IV
Date: Mon Aug 18 19:47:24 2014 +
haiku/swrast: Add missing src include search path for missing util/macros.h
Acked-by: Brian Paul
---
src/mesa/drivers/haiku/swrast/SConscript |1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/haiku/swrast/SConscript
b/src/mesa/drivers/haiku/swrast/SConscript
index aef7300..2c25f72 100644
--- a/src/mesa/drivers/haiku/swrast/SConscript
+++ b/src/mesa/drivers/haiku/swrast/SConscript
@@ -3,6 +3,7 @@ Import('*')
env = env.Clone()
env.Append(CPPPATH = [
+'#/src',
'#/src/mapi',
'#/src/mesa',
'#/src/mesa/main',
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Mesa (master): r600g: Fix missing SET_TEXTURE_OFFSETS
Module: Mesa
Branch: master
Commit: dfa10ed2640a350a84e6e31edd22560155cd5016
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dfa10ed2640a350a84e6e31edd22560155cd5016
Author: Glenn Kennard
Date: Sun Aug 17 22:26:19 2014 +0200
r600g: Fix missing SET_TEXTURE_OFFSETS
SB needs a bit of special handling to handle
instructions without obvious side effects, to
avoid it deleting them.
Fixes failing non-const ARB_gpu_shader5
textureOffsets piglits with sb enabled.
Signed-off-by: Glenn Kennard
Signed-off-by: Marek Olšák
---
src/gallium/drivers/r600/r600_isa.h|9 +-
src/gallium/drivers/r600/sb/sb_bc_finalize.cpp | 119 ++--
src/gallium/drivers/r600/sb/sb_bc_parser.cpp | 13 ++-
src/gallium/drivers/r600/sb/sb_pass.h |3 +
4 files changed, 87 insertions(+), 57 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_isa.h
b/src/gallium/drivers/r600/r600_isa.h
index c6bb869..ec3f702 100644
--- a/src/gallium/drivers/r600/r600_isa.h
+++ b/src/gallium/drivers/r600/r600_isa.h
@@ -123,6 +123,9 @@ enum fetch_op_flags
FF_VTX = (1<<5),
FF_MEM = (1<<6),
+
+ FF_SET_TEXTURE_OFFSETS = (1<<7),
+ FF_USE_TEXTURE_OFFSETS = (1<<8),
};
/* flags for CF instructions */
@@ -523,7 +526,7 @@ static const struct fetch_op_info fetch_op_table[] = {
{"GET_GRADIENTS_H_FINE", { -1,-1,
0x000107, 0x000107 }, FF_GETGRAD },
{"GET_GRADIENTS_V_FINE", { -1,-1,
0x000108, 0x000108 }, FF_GETGRAD },
{"GET_LERP", { 0x09, 0x09,
-1,-1 }, 0 },
- {"SET_TEXTURE_OFFSETS", { -1,-1,
0x09, 0x09 }, 0 },
+ {"SET_TEXTURE_OFFSETS", { -1,-1,
0x09, 0x09 }, FF_SET_TEXTURE_OFFSETS },
{"KEEP_GRADIENTS",{ -1, 0x0A,
0x0A, 0x0A }, 0 },
{"SET_GRADIENTS_H", { 0x0B, 0x0B,
0x0B, 0x0B }, FF_SETGRAD },
{"SET_GRADIENTS_V", { 0x0C, 0x0C,
0x0C, 0x0C }, FF_SETGRAD },
@@ -550,7 +553,7 @@ static const struct fetch_op_info fetch_op_table[] = {
{"GATHER4", { -1,-1,
0x15, 0x15 }, FF_TEX },
{"SAMPLE_G_LB", { 0x16, 0x16,
0x16, 0x16 }, FF_TEX | FF_USEGRAD},
{"SAMPLE_G_LZ", { 0x17, 0x17,
-1,-1 }, FF_TEX | FF_USEGRAD},
- {"GATHER4_O", { -1,-1,
0x17, 0x17 }, FF_TEX },
+ {"GATHER4_O", { -1,-1,
0x17, 0x17 }, FF_TEX | FF_USE_TEXTURE_OFFSETS},
{"SAMPLE_C", { 0x18, 0x18,
0x18, 0x18 }, FF_TEX },
{"SAMPLE_C_L",{ 0x19, 0x19,
0x19, 0x19 }, FF_TEX },
{"SAMPLE_C_LB", { 0x1A, 0x1A,
0x1A, 0x1A }, FF_TEX },
@@ -560,7 +563,7 @@ static const struct fetch_op_info fetch_op_table[] = {
{"GATHER4_C", { -1,-1,
0x1D, 0x1D }, FF_TEX },
{"SAMPLE_C_G_LB", { 0x1E, 0x1E,
0x1E, 0x1E }, FF_TEX | FF_USEGRAD},
{"SAMPLE_C_G_LZ", { 0x1F, 0x1F,
-1,-1 }, FF_TEX | FF_USEGRAD},
- {"GATHER4_C_O", { -1,-1,
0x1F, 0x1F }, FF_TEX }
+ {"GATHER4_C_O", { -1,-1,
0x1F, 0x1F }, FF_TEX | FF_USE_TEXTURE_OFFSETS}
};
static const struct cf_op_info cf_op_table[] = {
diff --git a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
index 99a20eb..5c22f96 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
@@ -394,81 +394,96 @@ void bc_finalizer::finalize_alu_src(alu_group_node* g,
alu_node* a) {
}
}
-void bc_finalizer::emit_set_grad(fetch_node* f) {
+void bc_finalizer::copy_fetch_src(fetch_node &dst, fetch_node &src, unsigned
arg_start)
+{
+ int reg = -1;
- assert(f->src.size() == 12);
- unsigned ops[2] = { FETCH_OP_SET_GRADIENTS_V, FETCH_OP_SET_GRADIENTS_H
};
+ for (unsigned chan = 0; chan < 4; ++chan) {
- unsigned arg_start = 0;
+ dst.bc.dst_sel[chan] = SEL_MASK;
- for (unsigned op = 0; op < 2; ++op) {
- fetch_node *n = sh.create_fetch();
- n->bc.set_op(ops[op]);
+ unsigned sel = SEL_MASK;
- // FIXME extract this loop into a separate method and reuse it
+ val
Mesa (master): mesa: fix NULL pointer deref bug in _mesa_drawbuffers()
Module: Mesa
Branch: master
Commit: 31ce84a81f7166ded07e9cb41e5dfe212dd8fed1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=31ce84a81f7166ded07e9cb41e5dfe212dd8fed1
Author: Brian Paul
Date: Tue Aug 19 07:51:07 2014 -0600
mesa: fix NULL pointer deref bug in _mesa_drawbuffers()
This is a follow-on fix to commit 39b40ad144. Fixes a crash if the
user calls glDrawBuffers(0, NULL).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82814
Cc: "10.2"
Reviewed-by: Roland Scheidegger
---
src/mesa/main/buffers.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/buffers.c b/src/mesa/main/buffers.c
index 140cf6e..8a0852c 100644
--- a/src/mesa/main/buffers.c
+++ b/src/mesa/main/buffers.c
@@ -498,7 +498,7 @@ _mesa_drawbuffers(struct gl_context *ctx, GLuint n, const
GLenum *buffers,
* (ex: glDrawBuffer(GL_FRONT_AND_BACK)).
* Otherwise, destMask[x] can only have one bit set.
*/
- if (_mesa_bitcount(destMask[0]) > 1) {
+ if (n > 0 && _mesa_bitcount(destMask[0]) > 1) {
GLuint count = 0, destMask0 = destMask[0];
while (destMask0) {
GLint bufIndex = ffs(destMask0) - 1;
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Mesa (master): vc4: Avoid a null-deref if a sampler index isn't used.
Module: Mesa
Branch: master
Commit: c8097afe2902c89d6d8a90c1948051680eaca9ae
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8097afe2902c89d6d8a90c1948051680eaca9ae
Author: Eric Anholt
Date: Mon Aug 18 15:50:48 2014 -0700
vc4: Avoid a null-deref if a sampler index isn't used.
Part of fixing ARB_fragment_program/sparse-samplers
---
src/gallium/drivers/vc4/vc4_program.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index 20f7a44..fa59847 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -1270,8 +1270,11 @@ static void
vc4_setup_shared_key(struct vc4_key *key, struct vc4_texture_stateobj
*texstate)
{
for (int i = 0; i < texstate->num_textures; i++) {
-struct pipe_resource *prsc = texstate->textures[i]->texture;
-key->tex_format[i] = prsc->format;
+struct pipe_sampler_view *sampler = texstate->textures[i];
+if (sampler) {
+struct pipe_resource *prsc = sampler->texture;
+key->tex_format[i] = prsc->format;
+}
}
}
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Mesa (master): vc4: Plumb the texture index from TGSI through to the sampler uniforms.
Module: Mesa
Branch: master
Commit: 5833680e7a9b51d6402036fd2a9edfc3b0454df2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5833680e7a9b51d6402036fd2a9edfc3b0454df2
Author: Eric Anholt
Date: Mon Aug 18 15:51:47 2014 -0700
vc4: Plumb the texture index from TGSI through to the sampler uniforms.
This commit and the last one fix ARB_fragment_program/sparse-samplers and
6 other tests.
---
src/gallium/drivers/vc4/vc4_program.c | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index fa59847..c6a6a2e 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -327,7 +327,7 @@ tgsi_to_qir_tex(struct tgsi_to_qir *trans,
struct qreg s = src[0 * 4 + 0];
struct qreg t = src[0 * 4 + 1];
-uint32_t sampler = 0; /* XXX */
+uint32_t unit = tgsi_inst->Src[1].Register.Index;
if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXP) {
struct qreg proj = qir_RCP(c, src[0 * 4 + 3]);
@@ -343,19 +343,18 @@ tgsi_to_qir_tex(struct tgsi_to_qir *trans,
s = qir_FMUL(c, s,
get_temp_for_uniform(trans,
QUNIFORM_TEXRECT_SCALE_X,
- sampler));
+ unit));
t = qir_FMUL(c, t,
get_temp_for_uniform(trans,
QUNIFORM_TEXRECT_SCALE_Y,
- sampler));
+ unit));
}
-uint32_t tex_and_sampler = 0; /* XXX */
qir_TEX_T(c, t, add_uniform(trans, QUNIFORM_TEXTURE_CONFIG_P0,
-tex_and_sampler));
+unit));
struct qreg sampler_p1 = add_uniform(trans, QUNIFORM_TEXTURE_CONFIG_P1,
- tex_and_sampler);
+ unit);
if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXB) {
qir_TEX_B(c, src[0 * 4 + 3], sampler_p1);
qir_TEX_S(c, s, add_uniform(trans, QUNIFORM_CONSTANT, 0));
@@ -375,7 +374,7 @@ tgsi_to_qir_tex(struct tgsi_to_qir *trans,
if (!(tgsi_inst->Dst[0].Register.WriteMask & (1 << i)))
continue;
-enum pipe_format format = trans->key->tex_format[sampler];
+enum pipe_format format = trans->key->tex_format[unit];
const struct util_format_description *desc =
util_format_description(format);
@@ -1444,10 +1443,9 @@ static uint32_t translate_wrap(uint32_t p_wrap)
static void
write_texture_p0(struct vc4_context *vc4,
struct vc4_texture_stateobj *texstate,
- uint32_t tex_and_sampler)
+ uint32_t unit)
{
-uint32_t texi = (tex_and_sampler >> 0) & 0xff;
-struct pipe_sampler_view *texture = texstate->textures[texi];
+struct pipe_sampler_view *texture = texstate->textures[unit];
struct vc4_resource *rsc = vc4_resource(texture->texture);
cl_reloc(vc4, &vc4->uniforms, rsc->bo,
@@ -1457,12 +1455,10 @@ write_texture_p0(struct vc4_context *vc4,
static void
write_texture_p1(struct vc4_context *vc4,
struct vc4_texture_stateobj *texstate,
- uint32_t tex_and_sampler)
+ uint32_t unit)
{
-uint32_t texi = (tex_and_sampler >> 0) & 0xff;
-uint32_t sampi = (tex_and_sampler >> 8) & 0xff;
-struct pipe_sampler_view *texture = texstate->textures[texi];
-struct pipe_sampler_state *sampler = texstate->samplers[sampi];
+struct pipe_sampler_view *texture = texstate->textures[unit];
+struct pipe_sampler_state *sampler = texstate->samplers[unit];
static const uint32_t mipfilter_map[] = {
[PIPE_TEX_MIPFILTER_NEAREST] = 2,
[PIPE_TEX_MIPFILTER_LINEAR] = 4,
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Mesa (master): i965/vec4: Add a pass to reduce swizzles.
Module: Mesa
Branch: master
Commit: 9a071e3339afcf6fd937ae31121fa3b3face3bfe
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a071e3339afcf6fd937ae31121fa3b3face3bfe
Author: Matt Turner
Date: Sun Aug 17 15:13:54 2014 -0700
i965/vec4: Add a pass to reduce swizzles.
total instructions in shared programs: 4344280 -> 4288033 (-1.29%)
instructions in affected programs: 397468 -> 341221 (-14.15%)
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 98
src/mesa/drivers/dri/i965/brw_vec4.h |1 +
2 files changed, 99 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index bfb0fba..5477fe6 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -311,6 +311,103 @@ src_reg::equals(const src_reg &r) const
sizeof(fixed_hw_reg)) == 0);
}
+/* Replaces unused channels of a swizzle with channels that are used.
+ *
+ * For instance, this pass transforms
+ *
+ *mov vgrf4.yz, vgrf5.wxzy
+ *
+ * into
+ *
+ *mov vgrf4.yz, vgrf5.xxzx
+ *
+ * This eliminates false uses of some channels, letting dead code elimination
+ * remove the instructions that wrote them.
+ */
+bool
+vec4_visitor::opt_reduce_swizzle()
+{
+ bool progress = false;
+
+ foreach_in_list_safe(vec4_instruction, inst, &instructions) {
+ if (inst->dst.file == BAD_FILE || inst->dst.file == HW_REG)
+ continue;
+
+ int swizzle[4];
+
+ /* Determine which channels of the sources are read. */
+ switch (inst->opcode) {
+ case BRW_OPCODE_DP4:
+ case BRW_OPCODE_DPH: /* FINISHME: DPH reads only three channels of src0,
+* but all four of src1.
+*/
+ swizzle[0] = 0;
+ swizzle[1] = 1;
+ swizzle[2] = 2;
+ swizzle[3] = 3;
+ break;
+ case BRW_OPCODE_DP3:
+ swizzle[0] = 0;
+ swizzle[1] = 1;
+ swizzle[2] = 2;
+ swizzle[3] = -1;
+ break;
+ case BRW_OPCODE_DP2:
+ swizzle[0] = 0;
+ swizzle[1] = 1;
+ swizzle[2] = -1;
+ swizzle[3] = -1;
+ break;
+ default:
+ swizzle[0] = inst->dst.writemask & WRITEMASK_X ? 0 : -1;
+ swizzle[1] = inst->dst.writemask & WRITEMASK_Y ? 1 : -1;
+ swizzle[2] = inst->dst.writemask & WRITEMASK_Z ? 2 : -1;
+ swizzle[3] = inst->dst.writemask & WRITEMASK_W ? 3 : -1;
+ break;
+ }
+
+ /* Resolve unread channels (-1) by assigning them the swizzle of the
+ * first channel that is used.
+ */
+ int first_used_channel = 0;
+ for (int i = 0; i < 4; i++) {
+ if (swizzle[i] != -1) {
+first_used_channel = swizzle[i];
+break;
+ }
+ }
+ for (int i = 0; i < 4; i++) {
+ if (swizzle[i] == -1) {
+swizzle[i] = first_used_channel;
+ }
+ }
+
+ /* Update sources' swizzles. */
+ for (int i = 0; i < 3; i++) {
+ if (inst->src[i].file != GRF &&
+ inst->src[i].file != ATTR &&
+ inst->src[i].file != UNIFORM)
+continue;
+
+ int swiz[4];
+ for (int j = 0; j < 4; j++) {
+swiz[j] = BRW_GET_SWZ(inst->src[i].swizzle, swizzle[j]);
+ }
+
+ unsigned new_swizzle = BRW_SWIZZLE4(swiz[0], swiz[1], swiz[2],
swiz[3]);
+ if (inst->src[i].swizzle != new_swizzle) {
+inst->src[i].swizzle = new_swizzle;
+progress = true;
+ }
+ }
+ }
+
+ if (progress)
+ invalidate_live_intervals();
+
+ return progress;
+}
+
static bool
try_eliminate_instruction(vec4_instruction *inst, int new_writemask,
const struct brw_context *brw)
@@ -1699,6 +1796,7 @@ vec4_visitor::run()
iteration++;
int pass_num = 0;
+ OPT(opt_reduce_swizzle);
OPT(dead_code_eliminate);
OPT(dead_control_flow_eliminate, this);
OPT(opt_copy_propagation);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 517eab1..f0239cb 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -380,6 +380,7 @@ public:
void calculate_live_intervals();
void invalidate_live_intervals();
void split_virtual_grfs();
+ bool opt_reduce_swizzle();
bool dead_code_eliminate();
bool virtual_grf_interferes(int a, int b);
bool opt_copy_propagation();
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Mesa (master): i965: Enable ARB_conditional_render_inverted on Gen6+.
Module: Mesa Branch: master Commit: 06ca96daadf88713a74c58761cb14edc5867e9b4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=06ca96daadf88713a74c58761cb14edc5867e9b4 Author: Chris Forbes Date: Tue Aug 19 23:30:50 2014 +1200 i965: Enable ARB_conditional_render_inverted on Gen6+. The extension requires GL 3.0, so enable on just the generations exposing that. Signed-off-by: Chris Forbes Reviewed-by: Ilia Mirkin --- src/mesa/drivers/dri/i965/intel_extensions.c |1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 1d18c83..046d2a1 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -272,6 +272,7 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.ARB_texture_multisample = true; ctx->Extensions.ARB_sample_shading = true; ctx->Extensions.ARB_texture_gather = true; + ctx->Extensions.ARB_conditional_render_inverted = true; /* Test if the kernel has the ioctl. */ if (drm_intel_reg_read(brw->bufmgr, TIMESTAMP, &dummy) == 0) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): docs: Mark off ARB_conditional_render_inverted for i965
Module: Mesa Branch: master Commit: 1c4f141a542eb21f76df021464c3a9237ff0f376 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1c4f141a542eb21f76df021464c3a9237ff0f376 Author: Chris Forbes Date: Tue Aug 19 23:33:24 2014 +1200 docs: Mark off ARB_conditional_render_inverted for i965 Signed-off-by: Chris Forbes Reviewed-by: Ilia Mirkin --- docs/GL3.txt|2 +- docs/relnotes/10.3.html |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index 5549b30..76412c3 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -186,7 +186,7 @@ GL 4.5, GLSL 4.50: GL_ARB_ES3_1_compatibility not started GL_ARB_clip_control not started - GL_ARB_conditional_render_inverted DONE (nvc0, softpipe, llvmpipe) + GL_ARB_conditional_render_inverted DONE (i965, nvc0, softpipe, llvmpipe) GL_ARB_cull_distance not started GL_ARB_derivative_controlDONE (i965, nv50, nvc0, r600) GL_ARB_direct_state_access not started diff --git a/docs/relnotes/10.3.html b/docs/relnotes/10.3.html index 5f4f8fd..fa4ea23 100644 --- a/docs/relnotes/10.3.html +++ b/docs/relnotes/10.3.html @@ -47,7 +47,7 @@ Note: some of the new features are only available with certain drivers. GL_ARB_ES3_compatibility on nv50, nvc0, r600, radeonsi, softpipe, llvmpipe GL_ARB_clear_texture on i965 GL_ARB_compressed_texture_pixel_storage on all drivers -GL_ARB_conditional_render_inverted on nvc0, softpipe, llvmpipe +GL_ARB_conditional_render_inverted on i965, nvc0, softpipe, llvmpipe GL_ARB_derivative_control on i965, nv50, nvc0, r600 GL_ARB_draw_indirect on nvc0, radeonsi GL_ARB_explicit_uniform_location (all drivers that support GLSL) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): mesa: Add support for inverted s/w conditional rendering
Module: Mesa
Branch: master
Commit: 3f8ad326276d14f3e38b4b5a58547227911d1ee7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f8ad326276d14f3e38b4b5a58547227911d1ee7
Author: Chris Forbes
Date: Tue Aug 19 23:23:08 2014 +1200
mesa: Add support for inverted s/w conditional rendering
Signed-off-by: Chris Forbes
Reviewed-by: Ilia Mirkin
---
src/mesa/main/condrender.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/src/mesa/main/condrender.c b/src/mesa/main/condrender.c
index 54cd423..75f9d74 100644
--- a/src/mesa/main/condrender.c
+++ b/src/mesa/main/condrender.c
@@ -162,12 +162,25 @@ _mesa_check_conditional_render(struct gl_context *ctx)
ctx->Driver.WaitQuery(ctx, q);
}
return q->Result > 0;
+ case GL_QUERY_BY_REGION_WAIT_INVERTED:
+ /* fall-through */
+ case GL_QUERY_WAIT_INVERTED:
+ if (!q->Ready) {
+ ctx->Driver.WaitQuery(ctx, q);
+ }
+ return q->Result == 0;
case GL_QUERY_BY_REGION_NO_WAIT:
/* fall-through */
case GL_QUERY_NO_WAIT:
if (!q->Ready)
ctx->Driver.CheckQuery(ctx, q);
return q->Ready ? (q->Result > 0) : GL_TRUE;
+ case GL_QUERY_BY_REGION_NO_WAIT_INVERTED:
+ /* fall-through */
+ case GL_QUERY_NO_WAIT_INVERTED:
+ if (!q->Ready)
+ ctx->Driver.CheckQuery(ctx, q);
+ return q->Ready ? (q->Result == 0) : GL_TRUE;
default:
_mesa_problem(ctx, "Bad cond render mode %s in "
" _mesa_check_conditional_render()",
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Mesa (10.2): Update VERSION to 10.2.6
Module: Mesa Branch: 10.2 Commit: efc7aa3187238fd0dde62ea6f4b8fd803f8afd72 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=efc7aa3187238fd0dde62ea6f4b8fd803f8afd72 Author: Carl Worth Date: Tue Aug 19 13:58:32 2014 -0700 Update VERSION to 10.2.6 In preparation for the 10.2.6 release. --- VERSION |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/VERSION b/VERSION index 9b36ab7..9a6a89b 100644 --- a/VERSION +++ b/VERSION @@ -1 +1 @@ -10.2.5 +10.2.6 ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (10.2): docs: Add sha256 sums for the 10.2.6 release
Module: Mesa Branch: 10.2 Commit: 8b056fc48613b4cd1a32c29cdaffcf363860a62b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b056fc48613b4cd1a32c29cdaffcf363860a62b Author: Carl Worth Date: Tue Aug 19 15:17:50 2014 -0700 docs: Add sha256 sums for the 10.2.6 release --- docs/relnotes/10.2.6.html |3 +++ 1 file changed, 3 insertions(+) diff --git a/docs/relnotes/10.2.6.html b/docs/relnotes/10.2.6.html index d592618..73c1416 100644 --- a/docs/relnotes/10.2.6.html +++ b/docs/relnotes/10.2.6.html @@ -30,6 +30,9 @@ because compatibility contexts are not supported. SHA256 checksums +193314d2adba98e43697d726739ac46b4299aae324fa1821aa226890c28ac806 MesaLib-10.2.6.tar.bz2 +f7a45a5977b485eb95ac024205c584a0c112fe3951c2313c797579bb16a7a448 MesaLib-10.2.6.tar.gz +6d086d6fcda8f317adfaaae40011decf2f2e2dc80819c4a7a77c76f73512e8d8 MesaLib-10.2.6.zip New features ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (10.2): Add release notes for the 10.2.6 release
Module: Mesa Branch: 10.2 Commit: 346dda24bf3d8268edc82a569c0c482dac1bf93c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=346dda24bf3d8268edc82a569c0c482dac1bf93c Author: Carl Worth Date: Tue Aug 19 14:01:02 2014 -0700 Add release notes for the 10.2.6 release Listing bugs fixed and changes made. --- docs/relnotes/10.2.6.html | 115 + 1 file changed, 115 insertions(+) diff --git a/docs/relnotes/10.2.6.html b/docs/relnotes/10.2.6.html new file mode 100644 index 000..d592618 --- /dev/null +++ b/docs/relnotes/10.2.6.html @@ -0,0 +1,115 @@ +http://www.w3.org/TR/html4/loose.dtd";> + + + + Mesa Release Notes + + + + + + The Mesa 3D Graphics Library + + + + + +Mesa 10.2.6 Release Notes / August 19, 2014 + + +Mesa 10.2.6 is a bug fix release which fixes bugs found since the 10.2.5 release. + + +Mesa 10.2.6 implements the OpenGL 3.3 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 3.3. OpenGL +3.3 is only available if requested at context creation +because compatibility contexts are not supported. + + +SHA256 checksums + + + +New features +None + +Bug fixes + +This list is likely incomplete. + + + +https://bugs.freedesktop.org/show_bug.cgi?id=81450";>Bug 81450 - [BDW]Piglit spec_glsl-1.30_execution_tex-miplevel-selection_textureGrad_1DArray cases intel_do_flush_locked failed + + + +Changes + +Anuj Phogat (15): + + mesa: Fix error condition for valid texture targets in glTexStorage* functions + mesa: Turn target_can_be_compressed() in to a utility function + mesa: Add error condition for using compressed internalformat in glTexStorage3D() + mesa: Fix condition for using compressed internalformat in glCompressedTexImage3D() + mesa: Add utility function _mesa_is_enum_format_snorm() + mesa: Don't allow snorm internal formats in glCopyTexImage*() in GLES3 + mesa: Add a helper function _mesa_is_enum_format_unsized() + mesa: Add a gles3 error condition for sized internalformat in glCopyTexImage*() + mesa: Add gles3 error condition for GL_RGBA10_A2 buffer format in glCopyTexImage*() + mesa: Add utility function _mesa_is_enum_format_unorm() + mesa: Add gles3 condition for normalized internal formats in glCopyTexImage*() + mesa: Allow GL_TEXTURE_CUBE_MAP target with compressed internal formats + meta: Use _mesa_get_format_bits() to get the GL_RED_BITS + egl: Fix OpenGL ES version checks in _eglParseContextAttribList() + meta: Fix datatype computation in get_temp_image_type() + + +Brian Paul (1): + + mesa: fix assertion in _mesa_drawbuffers() + + +Carl Worth (2): + + docs: Add sha256 sums to the 10.2.5 release notes + Update VERSION to 10.2.6 + + +Ilia Mirkin (1): + + mesa/st: only convert AND(a, NOT(b)) into MAD when not using native integers + + +Jordan Justen (1): + + i965/miptree: Layout 1D Array as 2D Array with height of 1 + + +Maarten Lankhorst (1): + + configure.ac: Do not require llvm on x32 + + +Marek Olšák (4): + + st/mesa: fix blit-based partial TexSubImage for 1D arrays + radeon,r200: fix buffer validation after CS flush + radeonsi: fix a hang with instancing in Unigine Heaven/Valley on Hawaii + radeonsi: fix CMASK and HTILE allocation on Tahiti + + +Pali Rohár (1): + + configure: check for dladdr via AC_CHECK_FUNC/AC_CHECK_LIB + + +Roland Scheidegger (1): + + gallivm: fix up out-of-bounds level when using conformant out-of-bound behavior + + + + + ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa: tag mesa-10.2.6: Mesa 10.2.6 release
Module: Mesa Branch: refs/tags/mesa-10.2.6 Tag:1d329590143b4236e8c706b80b6551502f5cb780 URL: http://cgit.freedesktop.org/mesa/mesa/tag/?id=1d329590143b4236e8c706b80b6551502f5cb780 Tagger: Carl Worth Date: Tue Aug 19 15:17:13 2014 -0700 Mesa 10.2.6 release ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): docs: Import 10.2.6 release notes, add news item.
Module: Mesa Branch: master Commit: 8791cfeddeb13c31bce62c7a472712cb05d14aec URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8791cfeddeb13c31bce62c7a472712cb05d14aec Author: Carl Worth Date: Tue Aug 19 15:21:09 2014 -0700 docs: Import 10.2.6 release notes, add news item. --- docs/index.html |6 +++ docs/relnotes.html|1 + docs/relnotes/10.2.6.html | 118 + 3 files changed, 125 insertions(+) diff --git a/docs/index.html b/docs/index.html index 584bc4e..5fb5567 100644 --- a/docs/index.html +++ b/docs/index.html @@ -16,6 +16,12 @@ News +August 19, 2014 + +Mesa 10.2.6 is released. +This is a bug-fix release. + + August 2, 2014 Mesa 10.2.5 is released. diff --git a/docs/relnotes.html b/docs/relnotes.html index c7e0983..b84f498 100644 --- a/docs/relnotes.html +++ b/docs/relnotes.html @@ -21,6 +21,7 @@ The release notes summarize what's new or changed in each Mesa release. +10.2.6 release notes 10.2.5 release notes 10.2.4 release notes 10.2.3 release notes diff --git a/docs/relnotes/10.2.6.html b/docs/relnotes/10.2.6.html new file mode 100644 index 000..73c1416 --- /dev/null +++ b/docs/relnotes/10.2.6.html @@ -0,0 +1,118 @@ +http://www.w3.org/TR/html4/loose.dtd";> + + + + Mesa Release Notes + + + + + + The Mesa 3D Graphics Library + + + + + +Mesa 10.2.6 Release Notes / August 19, 2014 + + +Mesa 10.2.6 is a bug fix release which fixes bugs found since the 10.2.5 release. + + +Mesa 10.2.6 implements the OpenGL 3.3 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 3.3. OpenGL +3.3 is only available if requested at context creation +because compatibility contexts are not supported. + + +SHA256 checksums + +193314d2adba98e43697d726739ac46b4299aae324fa1821aa226890c28ac806 MesaLib-10.2.6.tar.bz2 +f7a45a5977b485eb95ac024205c584a0c112fe3951c2313c797579bb16a7a448 MesaLib-10.2.6.tar.gz +6d086d6fcda8f317adfaaae40011decf2f2e2dc80819c4a7a77c76f73512e8d8 MesaLib-10.2.6.zip + + +New features +None + +Bug fixes + +This list is likely incomplete. + + + +https://bugs.freedesktop.org/show_bug.cgi?id=81450";>Bug 81450 - [BDW]Piglit spec_glsl-1.30_execution_tex-miplevel-selection_textureGrad_1DArray cases intel_do_flush_locked failed + + + +Changes + +Anuj Phogat (15): + + mesa: Fix error condition for valid texture targets in glTexStorage* functions + mesa: Turn target_can_be_compressed() in to a utility function + mesa: Add error condition for using compressed internalformat in glTexStorage3D() + mesa: Fix condition for using compressed internalformat in glCompressedTexImage3D() + mesa: Add utility function _mesa_is_enum_format_snorm() + mesa: Don't allow snorm internal formats in glCopyTexImage*() in GLES3 + mesa: Add a helper function _mesa_is_enum_format_unsized() + mesa: Add a gles3 error condition for sized internalformat in glCopyTexImage*() + mesa: Add gles3 error condition for GL_RGBA10_A2 buffer format in glCopyTexImage*() + mesa: Add utility function _mesa_is_enum_format_unorm() + mesa: Add gles3 condition for normalized internal formats in glCopyTexImage*() + mesa: Allow GL_TEXTURE_CUBE_MAP target with compressed internal formats + meta: Use _mesa_get_format_bits() to get the GL_RED_BITS + egl: Fix OpenGL ES version checks in _eglParseContextAttribList() + meta: Fix datatype computation in get_temp_image_type() + + +Brian Paul (1): + + mesa: fix assertion in _mesa_drawbuffers() + + +Carl Worth (2): + + docs: Add sha256 sums to the 10.2.5 release notes + Update VERSION to 10.2.6 + + +Ilia Mirkin (1): + + mesa/st: only convert AND(a, NOT(b)) into MAD when not using native integers + + +Jordan Justen (1): + + i965/miptree: Layout 1D Array as 2D Array with height of 1 + + +Maarten Lankhorst (1): + + configure.ac: Do not require llvm on x32 + + +Marek Olšák (4): + + st/mesa: fix blit-based partial TexSubImage for 1D arrays + radeon,r200: fix buffer validation after CS flush + radeonsi: fix a hang with instancing in Unigine Heaven/Valley on Hawaii + radeonsi: fix CMASK and HTILE allocation on Tahiti + + +Pali Rohár (1): + + configure: check for dladdr via AC_CHECK_FUNC/AC_CHECK_LIB + + +Roland Scheidegger (1): + + gallivm: fix up out-of-bounds level when using conformant out-of-bound behavior + + + + + ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (10.2): mesa: Handle uninitialized textures like other textures in get_tex_level_parameter_image
Module: Mesa
Branch: 10.2
Commit: d82ca4e2b2bd5de93179d29f484bba7e97bcd985
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d82ca4e2b2bd5de93179d29f484bba7e97bcd985
Author: Ian Romanick
Date: Tue Jun 17 14:58:14 2014 -0700
mesa: Handle uninitialized textures like other textures in
get_tex_level_parameter_image
Instead of catching the special case early, handle it by constructing a
fake gl_texture_image that will cause the values required by the OpenGL
4.0 spec to be returned.
Previously, calling
glGenTextures(1, &t);
glBindTexture(GL_TEXTURE_2D, t);
glGetTexLevelParameteriv(GL_TEXTURE_2D, 0, 0xDEADBEEF, &value);
would not generate an error.
Signed-off-by: Ian Romanick
Reviewed-by: Brian Paul
Suggested-by: Brian Paul
Cc: "10.2"
Cc: Anuj Phogat
(cherry picked from commit ee58c71a65bb5b769a03e4b25bd13c57a6b742d8)
---
src/mesa/main/texparam.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/mesa/main/texparam.c b/src/mesa/main/texparam.c
index 3a0c57f..30dd0b9 100644
--- a/src/mesa/main/texparam.c
+++ b/src/mesa/main/texparam.c
@@ -1051,6 +1051,7 @@ get_tex_level_parameter_image(struct gl_context *ctx,
GLenum pname, GLint *params)
{
const struct gl_texture_image *img = NULL;
+ struct gl_texture_image dummy_image;
mesa_format texFormat;
img = _mesa_select_tex_image(ctx, texObj, target, level);
@@ -1062,12 +1063,12 @@ get_tex_level_parameter_image(struct gl_context *ctx,
* instead of 1. TEXTURE_COMPONENTS is deprecated; always
* use TEXTURE_INTERNAL_FORMAT."
*/
+ memset(&dummy_image, 0, sizeof(dummy_image));
+ dummy_image.TexFormat = MESA_FORMAT_NONE;
+ dummy_image.InternalFormat = GL_RGBA;
+ dummy_image._BaseFormat = GL_NONE;
- if (pname == GL_TEXTURE_INTERNAL_FORMAT)
- *params = GL_RGBA;
- else
- *params = 0;
- return;
+ img = &dummy_image;
}
texFormat = img->TexFormat;
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Mesa (master): i965: Flush the RC and TC before doing a fast clear resolve
Module: Mesa Branch: master Commit: e6a53533b7aa790f66b044f77deaac450aa39fde URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6a53533b7aa790f66b044f77deaac450aa39fde Author: Kristian Høgsberg Date: Mon Aug 18 12:31:14 2014 -0700 i965: Flush the RC and TC before doing a fast clear resolve The docs say "When performing a render target resolve, PIPE_CONTROL with end of pipe sync must be delivered.", which doesn't actually tell us whether we need to do it before or after. Blorp did it before and after, and doing it before certainly makes sense. The resolve operation needs to read from the MCS and if we don't flush the render cache it won't get up-to-date data. On the other hand, doing it after should not be necessary, since we call brw_render_cache_set_check_flush() after the resolve. Fixes rendering corruption in kwin's cover switch effect and various steam games. Missing flush spotted by Ken. Reviewed-by: Kenneth Graunke Reviewed-by: Chris Forbes Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c index 5f3817b..4fb20d7 100644 --- a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c +++ b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c @@ -661,6 +661,8 @@ brw_meta_resolve_color(struct brw_context *brw, GLuint fbo, rbo; struct rect rect; + intel_batchbuffer_emit_mi_flush(brw); + _mesa_meta_begin(ctx, MESA_META_ALL); _mesa_GenFramebuffers(1, &fbo); @@ -693,8 +695,6 @@ brw_meta_resolve_color(struct brw_context *brw, _mesa_meta_end(ctx); - intel_batchbuffer_emit_mi_flush(brw); - /* We're typically called from intel_update_state() and we're supposed to * return with the state all updated to what it was before * brw_meta_resolve_color() was called. The meta rendering will have ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): glsl: Use the without_array predicate in some more places
Module: Mesa
Branch: master
Commit: a1853eaea7fa5caf59b52567cc49f964ce5293ec
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a1853eaea7fa5caf59b52567cc49f964ce5293ec
Author: Timothy Arceri
Date: Tue Aug 19 13:56:42 2014 -1000
glsl: Use the without_array predicate in some more places
Reviewed-by: Matt Turner
Signed-off-by: Timothy Arceri
---
src/glsl/link_uniform_initializers.cpp |3 +--
src/mesa/program/ir_to_mesa.cpp|3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/glsl/link_uniform_initializers.cpp
b/src/glsl/link_uniform_initializers.cpp
index a745c7c..f6a60bc 100644
--- a/src/glsl/link_uniform_initializers.cpp
+++ b/src/glsl/link_uniform_initializers.cpp
@@ -259,8 +259,7 @@ link_set_uniform_initializers(struct gl_shader_program
*prog,
if (var->data.explicit_binding) {
const glsl_type *const type = var->type;
-if (type->is_sampler()
-|| (type->is_array() && type->fields.array->is_sampler())) {
+if (type->without_array()->is_sampler()) {
linker::set_sampler_binding(prog, var->name, var->data.binding);
} else if (var->is_in_uniform_block()) {
const glsl_type *const iface_type = var->get_interface_type();
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 011ffed..e5844c3 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -2432,8 +2432,7 @@ add_uniform_to_shader::visit_field(const glsl_type *type,
const char *name,
}
gl_register_file file;
- if (type->is_sampler() ||
- (type->is_array() && type->fields.array->is_sampler())) {
+ if (type->without_array()->is_sampler()) {
file = PROGRAM_SAMPLER;
} else {
file = PROGRAM_UNIFORM;
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Mesa (master): gallivm: Fix build with LLVM >= 3.6 r215967.
Module: Mesa Branch: master Commit: c04a6d5c298f102469df45a7dbe81f40c6faed5f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c04a6d5c298f102469df45a7dbe81f40c6faed5f Author: Vinson Lee Date: Tue Aug 19 23:17:40 2014 -0700 gallivm: Fix build with LLVM >= 3.6 r215967. This LLVM 3.6 commit changed EngineBuilder constructor. commit 3f4ed32b4398eaf4fe0080d8001ba01e6c2f43c8 Author: Rafael Espindola Date: Tue Aug 19 04:04:25 2014 + Make it explicit that ExecutionEngine takes ownership of the modules. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215967 91177308-0d34-0410-b5e6-96231b3b80d8 Signed-off-by: Vinson Lee Reviewed-and-Tested-by: Michel Dänzer --- src/gallium/auxiliary/gallivm/lp_bld_misc.cpp |4 1 file changed, 4 insertions(+) diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp index 6bea964..55aa8b9 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp +++ b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp @@ -421,7 +421,11 @@ lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT, using namespace llvm; std::string Error; +#if HAVE_LLVM >= 0x0306 + EngineBuilder builder(std::unique_ptr(unwrap(M))); +#else EngineBuilder builder(unwrap(M)); +#endif /** * LLVM 3.1+ haven't more "extern unsigned llvm::StackAlignmentOverride" and ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
