Mesa (master): radeon: add streamout status 1-3 queries.
Module: Mesa
Branch: master
Commit: bf4019a1c89755af94218055e86544f7823dc4ac
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bf4019a1c89755af94218055e86544f7823dc4ac
Author: Dave Airlie airl...@redhat.com
Date: Thu Jul 9 16:33:59 2015 +1000
radeon: add streamout status 1-3 queries.
This adds support for queries against the non-0 vertex streams.
Reviewed-by: Marek Olšák marek.ol...@amd.com
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/gallium/drivers/radeon/r600_query.c | 18 --
src/gallium/drivers/radeon/r600d_common.h |3 +++
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_query.c
b/src/gallium/drivers/radeon/r600_query.c
index 6bf0271..909d502 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -54,6 +54,8 @@ struct r600_query {
uint64_t end_result;
/* Fence for GPU_FINISHED. */
struct pipe_fence_handle *fence;
+ /* For transform feedback: which stream the query is for */
+ unsigned stream;
};
@@ -155,6 +157,17 @@ static void r600_update_occlusion_query_state(struct
r600_common_context *rctx,
}
}
+static unsigned event_type_for_stream(struct r600_query *query)
+{
+ switch (query-stream) {
+ default:
+ case 0: return EVENT_TYPE_SAMPLE_STREAMOUTSTATS;
+ case 1: return EVENT_TYPE_SAMPLE_STREAMOUTSTATS1;
+ case 2: return EVENT_TYPE_SAMPLE_STREAMOUTSTATS2;
+ case 3: return EVENT_TYPE_SAMPLE_STREAMOUTSTATS3;
+ }
+}
+
static void r600_emit_query_begin(struct r600_common_context *ctx, struct
r600_query *query)
{
struct radeon_winsys_cs *cs = ctx-rings.gfx.cs;
@@ -189,7 +202,7 @@ static void r600_emit_query_begin(struct
r600_common_context *ctx, struct r600_q
case PIPE_QUERY_SO_STATISTICS:
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
- radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_STREAMOUTSTATS) |
EVENT_INDEX(3));
+ radeon_emit(cs, EVENT_TYPE(event_type_for_stream(query)) |
EVENT_INDEX(3));
radeon_emit(cs, va);
radeon_emit(cs, (va 32UL) 0xFF);
break;
@@ -246,7 +259,7 @@ static void r600_emit_query_end(struct r600_common_context
*ctx, struct r600_que
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
va += query-buffer.results_end + query-result_size/2;
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
- radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_STREAMOUTSTATS) |
EVENT_INDEX(3));
+ radeon_emit(cs, EVENT_TYPE(event_type_for_stream(query)) |
EVENT_INDEX(3));
radeon_emit(cs, va);
radeon_emit(cs, (va 32UL) 0xFF);
break;
@@ -371,6 +384,7 @@ static struct pipe_query *r600_create_query(struct
pipe_context *ctx, unsigned q
/* NumPrimitivesWritten, PrimitiveStorageNeeded. */
query-result_size = 32;
query-num_cs_dw = 6;
+ query-stream = index;
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
/* 11 values on EG, 8 on R600. */
diff --git a/src/gallium/drivers/radeon/r600d_common.h
b/src/gallium/drivers/radeon/r600d_common.h
index 74c8d87..5a56a54 100644
--- a/src/gallium/drivers/radeon/r600d_common.h
+++ b/src/gallium/drivers/radeon/r600d_common.h
@@ -66,6 +66,9 @@
#define PKT3_SET_SH_REG0x76 /* SI and later */
#define PKT3_SET_UCONFIG_REG 0x79 /* CIK and later */
+#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS1 0x1 /* EG and later */
+#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS2 0x2 /* EG and later */
+#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS3 0x3 /* EG and later */
#define EVENT_TYPE_PS_PARTIAL_FLUSH0x10
#define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14
#define EVENT_TYPE_ZPASS_DONE 0x15
___
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Mesa (master): meta/copy_image: Stash off the scissor
Module: Mesa Branch: master Commit: 736c6f3cfc2c69e3c29268d4ebb7110dd36ac97f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=736c6f3cfc2c69e3c29268d4ebb7110dd36ac97f Author: Jason Ekstrand jason.ekstr...@intel.com Date: Thu Jul 23 17:26:56 2015 -0700 meta/copy_image: Stash off the scissor The meta CopyImageSubData path uses BlitFramebuffers to do the actual copy. The only thing that can affect BlitFramebuffers other than the currently bound framebuffers is the scissor so we need to save that off and reset it. If we don't do this, applications that use a scissor together with CopyImageSubData will get accidentally scissored copies. Tested-by: Markus Wick markus at selfnet.de Reviewed-by: Anuj Phogat anuj.pho...@gmail.com --- src/mesa/drivers/common/meta_copy_image.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/common/meta_copy_image.c b/src/mesa/drivers/common/meta_copy_image.c index 1729766..149ed18 100644 --- a/src/mesa/drivers/common/meta_copy_image.c +++ b/src/mesa/drivers/common/meta_copy_image.c @@ -138,8 +138,8 @@ _mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx, goto cleanup; } - /* We really only need to stash the bound framebuffers. */ - _mesa_meta_begin(ctx, 0); + /* We really only need to stash the bound framebuffers and scissor. */ + _mesa_meta_begin(ctx, MESA_META_SCISSOR); _mesa_GenFramebuffers(2, fbos); _mesa_BindFramebuffer(GL_READ_FRAMEBUFFER, fbos[0]); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Keep the validated shader around for the simulator execution.
Module: Mesa
Branch: master
Commit: 044f7bbda077ea7029fb1004183b29127307bd84
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=044f7bbda077ea7029fb1004183b29127307bd84
Author: Eric Anholt e...@anholt.net
Date: Tue Jul 28 10:11:08 2015 -0700
vc4: Keep the validated shader around for the simulator execution.
This more closely matches the kernel behavior on shader validation now.
---
src/gallium/drivers/vc4/kernel/vc4_validate.c| 19 ++-
src/gallium/drivers/vc4/vc4_simulator.c | 10 ++
src/gallium/drivers/vc4/vc4_simulator_validate.h |1 +
3 files changed, 17 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index 321e811..49bb648 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -750,7 +750,6 @@ validate_gl_shader_rec(struct drm_device *dev,
struct drm_gem_cma_object *bo[shader_reloc_count + 8];
uint32_t nr_attributes, nr_relocs, packet_size;
int i;
- struct vc4_validated_shader_info *validated_shader = NULL;
nr_attributes = state-addr 0x7;
if (nr_attributes == 0)
@@ -799,6 +798,7 @@ validate_gl_shader_rec(struct drm_device *dev,
}
for (i = 0; i shader_reloc_count; i++) {
+ struct vc4_validated_shader_info *validated_shader;
uint32_t o = shader_reloc_offsets[i];
uint32_t src_offset = *(uint32_t *)(pkt_u + o);
uint32_t *texture_handles_u;
@@ -810,18 +810,17 @@ validate_gl_shader_rec(struct drm_device *dev,
if (src_offset != 0) {
DRM_ERROR(Shaders must be at offset 0 of
the BO.\n);
- goto fail;
+ return -EINVAL;
}
- kfree(validated_shader);
- validated_shader = vc4_validate_shader(bo[i]);
+ validated_shader = to_vc4_bo(bo[i]-base)-validated_shader;
if (!validated_shader)
- goto fail;
+ return -EINVAL;
if (validated_shader-uniforms_src_size
exec-uniforms_size) {
DRM_ERROR(Uniforms src buffer overflow\n);
- goto fail;
+ return -EINVAL;
}
texture_handles_u = exec-uniforms_u;
@@ -838,7 +837,7 @@ validate_gl_shader_rec(struct drm_device *dev,
uniform_data_u,
validated_shader-texture_samples[tex],
texture_handles_u[tex])) {
- goto fail;
+ return -EINVAL;
}
}
@@ -881,13 +880,7 @@ validate_gl_shader_rec(struct drm_device *dev,
*(uint32_t *)(pkt_v + o) = vbo-paddr + offset;
}
- kfree(validated_shader);
-
return 0;
-
-fail:
- kfree(validated_shader);
- return -EINVAL;
}
int
diff --git a/src/gallium/drivers/vc4/vc4_simulator.c
b/src/gallium/drivers/vc4/vc4_simulator.c
index b58013d..4097dce 100644
--- a/src/gallium/drivers/vc4/vc4_simulator.c
+++ b/src/gallium/drivers/vc4/vc4_simulator.c
@@ -79,6 +79,7 @@ vc4_simulator_pin_bos(struct drm_device *dev, struct
vc4_exec_info *exec)
struct vc4_bo *bo = bos[i];
struct drm_gem_cma_object *obj = vc4_wrap_bo_with_cma(dev, bo);
+struct drm_vc4_bo *drm_bo = to_vc4_bo(obj-base);
#if 0
fprintf(stderr, bo hindex %d: %s\n, i, bo-name);
#endif
@@ -87,6 +88,15 @@ vc4_simulator_pin_bos(struct drm_device *dev, struct
vc4_exec_info *exec)
memcpy(obj-vaddr, bo-map, bo-size);
exec-bo[i].bo = obj;
+
+/* The kernel does this validation at shader create ioctl
+ * time.
+ */
+if (strcmp(bo-name, code) == 0) {
+drm_bo-validated_shader = vc4_validate_shader(obj);
+if (!drm_bo-validated_shader)
+abort();
+}
}
return 0;
}
diff --git a/src/gallium/drivers/vc4/vc4_simulator_validate.h
b/src/gallium/drivers/vc4/vc4_simulator_validate.h
index 2bb36b2..68ace02 100644
--- a/src/gallium/drivers/vc4/vc4_simulator_validate.h
+++ b/src/gallium/drivers/vc4/vc4_simulator_validate.h
@@ -78,6 +78,7 @@ struct drm_gem_cma_object {
struct drm_vc4_bo {
struct drm_gem_cma_object base;
struct vc4_bo *bo;
+struct vc4_validated_shader_info *validated_shader;
struct list_head unref_head;
};
___
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Mesa (master): vc4: Skip re-emitting the shader_rec if it's unchanged.
Module: Mesa
Branch: master
Commit: 2e04492a142102823dfb8fc8599cfd417b84c97a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e04492a142102823dfb8fc8599cfd417b84c97a
Author: Eric Anholt e...@anholt.net
Date: Tue Jul 28 11:00:58 2015 -0700
vc4: Skip re-emitting the shader_rec if it's unchanged.
It's a bunch of work for us to emit it (and its uniforms), more work for
the kernel to validate it, and additional work for the CLE to read
it. Improves es2gears framerate by about 50%.
Signed-off-by: Eric Anholt e...@anholt.net
---
src/gallium/drivers/vc4/vc4_context.h | 16 -
src/gallium/drivers/vc4/vc4_draw.c | 112
src/gallium/drivers/vc4/vc4_program.c | 17 -
src/gallium/drivers/vc4/vc4_resource.c |8 +++
src/gallium/drivers/vc4/vc4_uniforms.c | 48 ++
5 files changed, 158 insertions(+), 43 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_context.h
b/src/gallium/drivers/vc4/vc4_context.h
index 7faf522..30fb285 100644
--- a/src/gallium/drivers/vc4/vc4_context.h
+++ b/src/gallium/drivers/vc4/vc4_context.h
@@ -67,7 +67,9 @@
#define VC4_DIRTY_CLIP (1 20)
#define VC4_DIRTY_UNCOMPILED_VS (1 21)
#define VC4_DIRTY_UNCOMPILED_FS (1 22)
-#define VC4_DIRTY_COMPILED_FS (1 24)
+#define VC4_DIRTY_COMPILED_CS (1 23)
+#define VC4_DIRTY_COMPILED_VS (1 24)
+#define VC4_DIRTY_COMPILED_FS (1 25)
struct vc4_sampler_view {
struct pipe_sampler_view base;
@@ -132,6 +134,12 @@ struct vc4_compiled_shader {
struct vc4_ubo_range *ubo_ranges;
uint32_t num_ubo_ranges;
uint32_t ubo_size;
+/**
+ * VC4_DIRTY_* flags that, when set in vc4-dirty, mean that the
+ * uniforms have to be rewritten (and therefore the shader state
+ * reemitted).
+ */
+uint32_t uniform_dirty_bits;
/** bitmask of which inputs are color inputs, for flat shade handling.
*/
uint32_t color_inputs;
@@ -249,6 +257,11 @@ struct vc4_context {
*/
bool draw_call_queued;
+/** Maximum index buffer valid for the current shader_rec. */
+uint32_t max_index;
+/** Last index bias baked into the current shader_rec. */
+uint32_t last_index_bias;
+
struct primconvert_context *primconvert;
struct hash_table *fs_cache, *vs_cache;
@@ -360,6 +373,7 @@ void vc4_simulator_init(struct vc4_screen *screen);
int vc4_simulator_flush(struct vc4_context *vc4,
struct drm_vc4_submit_cl *args);
+void vc4_set_shader_uniform_dirty_flags(struct vc4_compiled_shader *shader);
void vc4_write_uniforms(struct vc4_context *vc4,
struct vc4_compiled_shader *shader,
struct vc4_constbuf_stateobj *cb,
diff --git a/src/gallium/drivers/vc4/vc4_draw.c
b/src/gallium/drivers/vc4/vc4_draw.c
index ff749fd..22ae8f2 100644
--- a/src/gallium/drivers/vc4/vc4_draw.c
+++ b/src/gallium/drivers/vc4/vc4_draw.c
@@ -122,49 +122,13 @@ vc4_update_shadow_textures(struct pipe_context *pctx,
}
static void
-vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
+vc4_emit_gl_shader_state(struct vc4_context *vc4, const struct pipe_draw_info
*info)
{
-struct vc4_context *vc4 = vc4_context(pctx);
-
-if (info-mode = PIPE_PRIM_QUADS) {
-util_primconvert_save_index_buffer(vc4-primconvert,
vc4-indexbuf);
-util_primconvert_save_rasterizer_state(vc4-primconvert,
vc4-rasterizer-base);
-util_primconvert_draw_vbo(vc4-primconvert, info);
-perf_debug(Fallback conversion for %d %s vertices\n,
- info-count, u_prim_name(info-mode));
-return;
-}
-
-/* Before setting up the draw, do any fixup blits necessary. */
-vc4_update_shadow_textures(pctx, vc4-verttex);
-vc4_update_shadow_textures(pctx, vc4-fragtex);
-
-vc4_get_draw_cl_space(vc4);
-
+/* VC4_DIRTY_VTXSTATE */
struct vc4_vertex_stateobj *vtx = vc4-vtx;
+/* VC4_DIRTY_VTXBUF */
struct vc4_vertexbuf_stateobj *vertexbuf = vc4-vertexbuf;
-if (vc4-prim_mode != info-mode) {
-vc4-prim_mode = info-mode;
-vc4-dirty |= VC4_DIRTY_PRIM_MODE;
-}
-
-vc4_start_draw(vc4);
-vc4_update_compiled_shaders(vc4, info-mode);
-
-vc4_emit_state(pctx);
-vc4-dirty = 0;
-
-vc4_write_uniforms(vc4, vc4-prog.fs,
- vc4-constbuf[PIPE_SHADER_FRAGMENT],
- vc4-fragtex);
-vc4_write_uniforms(vc4, vc4-prog.vs,
- vc4-constbuf[PIPE_SHADER_VERTEX],
- vc4-verttex);
-vc4_write_uniforms(vc4, vc4-prog.cs,
- vc4-constbuf[PIPE_SHADER_VERTEX],
- vc4-verttex);
-
/* The simulator throws a fit if
Mesa (master): vc4: Simplify vc4_use_bo and make sure it's not a shader.
Module: Mesa
Branch: master
Commit: 1f5e070dd7ddd344a913f2f5daddebb4c51abb8a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f5e070dd7ddd344a913f2f5daddebb4c51abb8a
Author: Eric Anholt e...@anholt.net
Date: Tue Jul 28 10:20:10 2015 -0700
vc4: Simplify vc4_use_bo and make sure it's not a shader.
Since the conversion to keeping validated shaders around for the BO's
lifetime, we haven't been checking that rendering doesn't happen to
shaders. Make vc4_use_bo check that always, and just don't use it for the
VC4_MODE_SHADER case (so now modes are unused)
---
src/gallium/drivers/vc4/kernel/vc4_drv.h | 16 ++
src/gallium/drivers/vc4/kernel/vc4_render_cl.c |4 +--
src/gallium/drivers/vc4/kernel/vc4_validate.c | 39
src/gallium/drivers/vc4/vc4_simulator.c|6 ++--
4 files changed, 26 insertions(+), 39 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_drv.h
b/src/gallium/drivers/vc4/kernel/vc4_drv.h
index 127a366..ffc9737 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_drv.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_drv.h
@@ -26,17 +26,6 @@
#include vc4_simulator_validate.h
-enum vc4_bo_mode {
- VC4_MODE_UNDECIDED,
- VC4_MODE_RENDER,
- VC4_MODE_SHADER,
-};
-
-struct vc4_bo_exec_state {
- struct drm_gem_cma_object *bo;
- enum vc4_bo_mode mode;
-};
-
struct vc4_exec_info {
/* Sequence number for this bin/render job. */
uint64_t seqno;
@@ -47,7 +36,7 @@ struct vc4_exec_info {
/* This is the array of BOs that were looked up at the start of exec.
* Command validation will use indices into this array.
*/
- struct vc4_bo_exec_state *bo;
+ struct drm_gem_cma_object **bo;
uint32_t bo_count;
/* List of other BOs used in the job that need to be released
@@ -172,8 +161,7 @@ struct vc4_validated_shader_info *
vc4_validate_shader(struct drm_gem_cma_object *shader_obj);
struct drm_gem_cma_object *vc4_use_bo(struct vc4_exec_info *exec,
- uint32_t hindex,
- enum vc4_bo_mode mode);
+ uint32_t hindex);
int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec);
diff --git a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
index a068104..b827eb7 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
@@ -286,7 +286,7 @@ static int vc4_rcl_surface_setup(struct vc4_exec_info *exec,
if (surf-hindex == ~0)
return 0;
- *obj = vc4_use_bo(exec, surf-hindex, VC4_MODE_RENDER);
+ *obj = vc4_use_bo(exec, surf-hindex);
if (!*obj)
return -EINVAL;
@@ -366,7 +366,7 @@ vc4_rcl_ms_surface_setup(struct vc4_exec_info *exec,
if (surf-hindex == ~0)
return 0;
- *obj = vc4_use_bo(exec, surf-hindex, VC4_MODE_RENDER);
+ *obj = vc4_use_bo(exec, surf-hindex);
if (!*obj)
return -EINVAL;
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index 49bb648..e81dd99 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -95,38 +95,32 @@ size_is_lt(uint32_t width, uint32_t height, int cpp)
}
struct drm_gem_cma_object *
-vc4_use_bo(struct vc4_exec_info *exec,
- uint32_t hindex,
- enum vc4_bo_mode mode)
+vc4_use_bo(struct vc4_exec_info *exec, uint32_t hindex)
{
struct drm_gem_cma_object *obj;
+ struct drm_vc4_bo *bo;
if (hindex = exec-bo_count) {
DRM_ERROR(BO index %d greater than BO count %d\n,
hindex, exec-bo_count);
return NULL;
}
- obj = exec-bo[hindex].bo;
+ obj = exec-bo[hindex];
+ bo = to_vc4_bo(obj-base);
- if (exec-bo[hindex].mode != mode) {
- if (exec-bo[hindex].mode == VC4_MODE_UNDECIDED) {
- exec-bo[hindex].mode = mode;
- } else {
- DRM_ERROR(BO index %d reused with mode %d vs %d\n,
- hindex, exec-bo[hindex].mode, mode);
- return NULL;
- }
+ if (bo-validated_shader) {
+ DRM_ERROR(Trying to use shader BO as something other than
+ a shader\n);
+ return NULL;
}
return obj;
}
static struct drm_gem_cma_object *
-vc4_use_handle(struct vc4_exec_info *exec,
- uint32_t gem_handles_packet_index,
- enum vc4_bo_mode mode)
+vc4_use_handle(struct vc4_exec_info *exec, uint32_t gem_handles_packet_index)
{
- return vc4_use_bo(exec, exec-bo_index[gem_handles_packet_index], mode);
+ return vc4_use_bo(exec,
Mesa (master): vc4: Drop NV shader reloc validation.
Module: Mesa
Branch: master
Commit: 601733da6708722ceedd35afc7727c28779012f7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=601733da6708722ceedd35afc7727c28779012f7
Author: Eric Anholt e...@anholt.net
Date: Tue Jul 28 00:05:33 2015 -0700
vc4: Drop NV shader reloc validation.
It wasn't validating enough, and we don't need the packet.
---
src/gallium/drivers/vc4/kernel/vc4_drv.h |1 -
src/gallium/drivers/vc4/kernel/vc4_validate.c | 179 +
2 files changed, 60 insertions(+), 120 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_drv.h
b/src/gallium/drivers/vc4/kernel/vc4_drv.h
index 1fd8aa9..8dc3c11 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_drv.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_drv.h
@@ -72,7 +72,6 @@ struct vc4_exec_info {
* command lists.
*/
struct vc4_shader_state {
- uint8_t packet;
uint32_t addr;
/* Maximum vertex index referenced by any primitive using this
* shader state.
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index 1d457b8..b3d4621 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -329,7 +329,6 @@ validate_gl_shader_state(VALIDATE_ARGS)
return -EINVAL;
}
- exec-shader_state[i].packet = VC4_PACKET_GL_SHADER_STATE;
exec-shader_state[i].addr = *(uint32_t *)untrusted;
exec-shader_state[i].max_index = 0;
@@ -348,31 +347,6 @@ validate_gl_shader_state(VALIDATE_ARGS)
}
static int
-validate_nv_shader_state(VALIDATE_ARGS)
-{
- uint32_t i = exec-shader_state_count++;
-
- if (i = exec-shader_state_size) {
- DRM_ERROR(More requests for shader states than declared\n);
- return -EINVAL;
- }
-
- exec-shader_state[i].packet = VC4_PACKET_NV_SHADER_STATE;
- exec-shader_state[i].addr = *(uint32_t *)untrusted;
-
- if (exec-shader_state[i].addr 15) {
- DRM_ERROR(NV shader state address 0x%08x misaligned\n,
- exec-shader_state[i].addr);
- return -EINVAL;
- }
-
- *(uint32_t *)validated = (exec-shader_state[i].addr +
- exec-shader_rec_p);
-
- return 0;
-}
-
-static int
validate_tile_binning_config(VALIDATE_ARGS)
{
struct drm_device *dev = exec-exec_bo-base.dev;
@@ -488,7 +462,7 @@ static const struct cmd_info {
VC4_DEFINE_PACKET(VC4_PACKET_PRIMITIVE_LIST_FORMAT, primitive list
format, NULL),
VC4_DEFINE_PACKET(VC4_PACKET_GL_SHADER_STATE, GL Shader State,
validate_gl_shader_state),
- VC4_DEFINE_PACKET(VC4_PACKET_NV_SHADER_STATE, NV Shader State,
validate_nv_shader_state),
+ /* We don't support validating NV shader states. */
VC4_DEFINE_PACKET(VC4_PACKET_CONFIGURATION_BITS, configuration bits,
NULL),
VC4_DEFINE_PACKET(VC4_PACKET_FLAT_SHADE_FLAGS, flat shade flags,
NULL),
@@ -758,51 +732,29 @@ reloc_tex(struct vc4_exec_info *exec,
}
static int
-validate_shader_rec(struct drm_device *dev,
- struct vc4_exec_info *exec,
- struct vc4_shader_state *state)
+validate_gl_shader_rec(struct drm_device *dev,
+ struct vc4_exec_info *exec,
+ struct vc4_shader_state *state)
{
uint32_t *src_handles;
void *pkt_u, *pkt_v;
- enum shader_rec_reloc_type {
- RELOC_CODE,
- RELOC_VBO,
+ static const uint32_t shader_reloc_offsets[] = {
+ 4, /* fs */
+ 16, /* vs */
+ 28, /* cs */
};
- struct shader_rec_reloc {
- enum shader_rec_reloc_type type;
- uint32_t offset;
- };
- static const struct shader_rec_reloc gl_relocs[] = {
- { RELOC_CODE, 4 }, /* fs */
- { RELOC_CODE, 16 }, /* vs */
- { RELOC_CODE, 28 }, /* cs */
- };
- static const struct shader_rec_reloc nv_relocs[] = {
- { RELOC_CODE, 4 }, /* fs */
- { RELOC_VBO, 12 }
- };
- const struct shader_rec_reloc *relocs;
- struct drm_gem_cma_object *bo[ARRAY_SIZE(gl_relocs) + 8];
- uint32_t nr_attributes = 0, nr_fixed_relocs, nr_relocs, packet_size;
+ uint32_t shader_reloc_count = ARRAY_SIZE(shader_reloc_offsets);
+ struct drm_gem_cma_object *bo[shader_reloc_count + 8];
+ uint32_t nr_attributes, nr_relocs, packet_size;
int i;
struct vc4_validated_shader_info *validated_shader = NULL;
- if (state-packet == VC4_PACKET_NV_SHADER_STATE) {
- relocs = nv_relocs;
- nr_fixed_relocs = ARRAY_SIZE(nv_relocs);
-
- packet_size = 16;
- } else {
- relocs = gl_relocs;
- nr_fixed_relocs =
Mesa (master): vc4: Drop unused vpm_offset value.
Module: Mesa
Branch: master
Commit: aefec4fa226d06e4b414170739be18dd24d3eed7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aefec4fa226d06e4b414170739be18dd24d3eed7
Author: Eric Anholt e...@anholt.net
Date: Tue Jul 28 19:59:45 2015 -0700
vc4: Drop unused vpm_offset value.
It's been dead since we started doing VS/CS attr offset setup during
shader compile.
---
src/gallium/drivers/vc4/vc4_draw.c |3 ---
1 file changed, 3 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_draw.c
b/src/gallium/drivers/vc4/vc4_draw.c
index 1c7f3b1..ff749fd 100644
--- a/src/gallium/drivers/vc4/vc4_draw.c
+++ b/src/gallium/drivers/vc4/vc4_draw.c
@@ -195,7 +195,6 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct
pipe_draw_info *info)
cl_u32(shader_rec, 0); /* UBO offset written by kernel */
uint32_t max_index = 0x;
-uint32_t vpm_offset = 0;
for (int i = 0; i vtx-num_elements; i++) {
struct pipe_vertex_element *elem = vtx-pipe[i];
struct pipe_vertex_buffer *vb =
@@ -214,8 +213,6 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct
pipe_draw_info *info)
cl_u8(shader_rec, vc4-prog.vs-vattr_offsets[i]);
cl_u8(shader_rec, vc4-prog.cs-vattr_offsets[i]);
-vpm_offset += align(elem_size, 4);
-
if (vb-stride 0) {
max_index = MIN2(max_index,
(vb_size - elem_size) / vb-stride);
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Mesa (master): vc4: Ensure that the bin CL is properly capped by increment /flush.
Module: Mesa
Branch: master
Commit: cbb7477e8a796211b664ff7e47334cb1b642556d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cbb7477e8a796211b664ff7e47334cb1b642556d
Author: Eric Anholt e...@anholt.net
Date: Tue Jul 28 00:29:31 2015 -0700
vc4: Ensure that the bin CL is properly capped by increment/flush.
We don't want anything to appear after we've kicked off the render (and
thus job flush), since that might then get written out to the tile
allocation state.
Signed-off-by: Eric Anholt e...@anholt.net
---
src/gallium/drivers/vc4/kernel/vc4_drv.h |4 ++
src/gallium/drivers/vc4/kernel/vc4_gem.c |2 +
src/gallium/drivers/vc4/kernel/vc4_validate.c | 56 +
3 files changed, 36 insertions(+), 26 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_drv.h
b/src/gallium/drivers/vc4/kernel/vc4_drv.h
index 8dc3c11..5c86179 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_drv.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_drv.h
@@ -87,6 +87,7 @@ struct vc4_exec_info {
bool found_tile_binning_mode_config_packet;
bool found_start_tile_binning_packet;
bool found_increment_semaphore_packet;
+ bool found_flush;
uint8_t bin_tiles_x, bin_tiles_y;
struct drm_gem_cma_object *tile_bo;
uint32_t tile_alloc_offset;
@@ -98,6 +99,9 @@ struct vc4_exec_info {
uint32_t ct0ca, ct0ea;
uint32_t ct1ca, ct1ea;
+ /* Pointer to the unvalidated bin CL (if present). */
+ void *bin_u;
+
/* Pointers to the shader recs. These paddr gets incremented as CL
* packets are relocated in validate_gl_shader_state, and the vaddrs
* (u and v) get incremented and size decremented as the shader recs
diff --git a/src/gallium/drivers/vc4/kernel/vc4_gem.c
b/src/gallium/drivers/vc4/kernel/vc4_gem.c
index e4b7fea..93f9ec7 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_gem.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_gem.c
@@ -112,6 +112,8 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info
*exec)
exec-ct0ca = exec-exec_bo-paddr + bin_offset;
+ exec-bin_u = bin;
+
exec-shader_rec_v = exec-exec_bo-vaddr + shader_rec_offset;
exec-shader_rec_p = exec-exec_bo-paddr + shader_rec_offset;
exec-shader_rec_size = args-shader_rec_size;
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index b3d4621..c57ebec 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -132,6 +132,15 @@ vc4_use_handle(struct vc4_exec_info *exec,
mode, obj);
}
+static bool
+validate_bin_pos(struct vc4_exec_info *exec, void *untrusted, uint32_t pos)
+{
+ /* Note that the untrusted pointer passed to these functions is
+* incremented past the packet byte.
+*/
+ return (untrusted - 1 == exec-bin_u + pos);
+}
+
static uint32_t
gl_shader_rec_size(uint32_t pointer_bits)
{
@@ -201,14 +210,15 @@ vc4_check_tex_size(struct vc4_exec_info *exec, struct
drm_gem_cma_object *fbo,
return true;
}
+
static int
-validate_flush_all(VALIDATE_ARGS)
+validate_flush(VALIDATE_ARGS)
{
- if (exec-found_increment_semaphore_packet) {
- DRM_ERROR(VC4_PACKET_FLUSH_ALL after
- VC4_PACKET_INCREMENT_SEMAPHORE\n);
- return -EINVAL;
+ if (!validate_bin_pos(exec, untrusted, exec-args-bin_cl_size - 1)) {
+ DRM_ERROR(Bin CL must end with VC4_PACKET_FLUSH\n);
+ return false;
}
+ exec-found_flush = true;
return 0;
}
@@ -233,17 +243,13 @@ validate_start_tile_binning(VALIDATE_ARGS)
static int
validate_increment_semaphore(VALIDATE_ARGS)
{
- if (exec-found_increment_semaphore_packet) {
- DRM_ERROR(Duplicate VC4_PACKET_INCREMENT_SEMAPHORE\n);
+ if (!validate_bin_pos(exec, untrusted, exec-args-bin_cl_size - 2)) {
+ DRM_ERROR(Bin CL must end with
+ VC4_PACKET_INCREMENT_SEMAPHORE\n);
return -EINVAL;
}
exec-found_increment_semaphore_packet = true;
- /* Once we've found the semaphore increment, there should be one FLUSH
-* then the end of the command list. The FLUSH actually triggers the
-* increment, so we only need to make sure there
-*/
-
return 0;
}
@@ -257,11 +263,6 @@ validate_indexed_prim_list(VALIDATE_ARGS)
uint32_t index_size = (*(uint8_t *)(untrusted + 0) 4) ? 2 : 1;
struct vc4_shader_state *shader_state;
- if (exec-found_increment_semaphore_packet) {
- DRM_ERROR(Drawing after VC4_PACKET_INCREMENT_SEMAPHORE\n);
- return -EINVAL;
- }
-
/* Check overflow condition */
if (exec-shader_state_count == 0) {
DRM_ERROR(shader state must precede primitives\n);
@@ -295,11 +296,6 @@
Mesa (master): vc4: Make the object be the return value from vc4_use_bo().
Module: Mesa
Branch: master
Commit: 22954db71cd1d8d9ef6e5a16f568e4b3c7845777
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=22954db71cd1d8d9ef6e5a16f568e4b3c7845777
Author: Eric Anholt e...@anholt.net
Date: Tue Jul 28 09:51:37 2015 -0700
vc4: Make the object be the return value from vc4_use_bo().
Drops 40 bytes of code from validation.
---
src/gallium/drivers/vc4/kernel/vc4_drv.h |7 ++---
src/gallium/drivers/vc4/kernel/vc4_render_cl.c |6 ++--
src/gallium/drivers/vc4/kernel/vc4_validate.c | 35
3 files changed, 25 insertions(+), 23 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_drv.h
b/src/gallium/drivers/vc4/kernel/vc4_drv.h
index 5c86179..127a366 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_drv.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_drv.h
@@ -171,10 +171,9 @@ vc4_validate_shader_recs(struct drm_device *dev, struct
vc4_exec_info *exec);
struct vc4_validated_shader_info *
vc4_validate_shader(struct drm_gem_cma_object *shader_obj);
-bool vc4_use_bo(struct vc4_exec_info *exec,
- uint32_t hindex,
- enum vc4_bo_mode mode,
- struct drm_gem_cma_object **obj);
+struct drm_gem_cma_object *vc4_use_bo(struct vc4_exec_info *exec,
+ uint32_t hindex,
+ enum vc4_bo_mode mode);
int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec);
diff --git a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
index f55ffe5..a068104 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
@@ -286,7 +286,8 @@ static int vc4_rcl_surface_setup(struct vc4_exec_info *exec,
if (surf-hindex == ~0)
return 0;
- if (!vc4_use_bo(exec, surf-hindex, VC4_MODE_RENDER, obj))
+ *obj = vc4_use_bo(exec, surf-hindex, VC4_MODE_RENDER);
+ if (!*obj)
return -EINVAL;
if (surf-bits ~(VC4_LOADSTORE_TILE_BUFFER_TILING_MASK |
@@ -365,7 +366,8 @@ vc4_rcl_ms_surface_setup(struct vc4_exec_info *exec,
if (surf-hindex == ~0)
return 0;
- if (!vc4_use_bo(exec, surf-hindex, VC4_MODE_RENDER, obj))
+ *obj = vc4_use_bo(exec, surf-hindex, VC4_MODE_RENDER);
+ if (!*obj)
return -EINVAL;
if (tiling VC4_TILING_FORMAT_LT) {
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index c57ebec..321e811 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -94,19 +94,19 @@ size_is_lt(uint32_t width, uint32_t height, int cpp)
height = 4 * utile_height(cpp));
}
-bool
+struct drm_gem_cma_object *
vc4_use_bo(struct vc4_exec_info *exec,
uint32_t hindex,
- enum vc4_bo_mode mode,
- struct drm_gem_cma_object **obj)
+ enum vc4_bo_mode mode)
{
- *obj = NULL;
+ struct drm_gem_cma_object *obj;
if (hindex = exec-bo_count) {
DRM_ERROR(BO index %d greater than BO count %d\n,
hindex, exec-bo_count);
- return false;
+ return NULL;
}
+ obj = exec-bo[hindex].bo;
if (exec-bo[hindex].mode != mode) {
if (exec-bo[hindex].mode == VC4_MODE_UNDECIDED) {
@@ -114,22 +114,19 @@ vc4_use_bo(struct vc4_exec_info *exec,
} else {
DRM_ERROR(BO index %d reused with mode %d vs %d\n,
hindex, exec-bo[hindex].mode, mode);
- return false;
+ return NULL;
}
}
- *obj = exec-bo[hindex].bo;
- return true;
+ return obj;
}
-static bool
+static struct drm_gem_cma_object *
vc4_use_handle(struct vc4_exec_info *exec,
uint32_t gem_handles_packet_index,
- enum vc4_bo_mode mode,
- struct drm_gem_cma_object **obj)
+ enum vc4_bo_mode mode)
{
- return vc4_use_bo(exec, exec-bo_index[gem_handles_packet_index],
- mode, obj);
+ return vc4_use_bo(exec, exec-bo_index[gem_handles_packet_index], mode);
}
static bool
@@ -273,7 +270,8 @@ validate_indexed_prim_list(VALIDATE_ARGS)
if (max_index shader_state-max_index)
shader_state-max_index = max_index;
- if (!vc4_use_handle(exec, 0, VC4_MODE_RENDER, ib))
+ ib = vc4_use_handle(exec, 0, VC4_MODE_RENDER);
+ if (!ib)
return -EINVAL;
if (offset ib-base.size ||
@@ -590,7 +588,8 @@ reloc_tex(struct vc4_exec_info *exec,
uint32_t cube_map_stride = 0;
enum vc4_texture_data_type type;
- if (!vc4_use_bo(exec, texture_handle_index, VC4_MODE_RENDER, tex))
+ tex = vc4_use_bo(exec, texture_handle_index,
Mesa (master): vc4: Fix raster surface shadow updates under DRI2.
Module: Mesa
Branch: master
Commit: 95faf2c6397ce231e94176d18cf8fd2c3265bb8a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=95faf2c6397ce231e94176d18cf8fd2c3265bb8a
Author: Eric Anholt e...@anholt.net
Date: Mon Jul 27 23:23:57 2015 -0700
vc4: Fix raster surface shadow updates under DRI2.
Glamor asks GBM for the handle of the BO, then flinks it itself. We
were marking the bo non-private in the flink and dmabuf (DRI3) paths,
but not the GEM handle path. As a result, non-pageflipping DRI2
swapbuffers (EGL apps, in particular) were never updating the texture.
---
src/gallium/drivers/vc4/vc4_screen.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/vc4/vc4_screen.c
b/src/gallium/drivers/vc4/vc4_screen.c
index c069454..a20818d 100644
--- a/src/gallium/drivers/vc4/vc4_screen.c
+++ b/src/gallium/drivers/vc4/vc4_screen.c
@@ -490,6 +490,12 @@ vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
{
whandle-stride = stride;
+/* If we're passing some reference to our BO out to some other part of
+ * the system, then we can't do any optimizations about only us being
+ * the ones seeing it (like BO caching or shadow update avoidance).
+ */
+bo-private = false;
+
switch (whandle-type) {
case DRM_API_HANDLE_TYPE_SHARED:
return vc4_bo_flink(bo, whandle-handle);
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Mesa (master): vc4: Fix bus errors on dumping CL on hardware.
Module: Mesa Branch: master Commit: b0193adbe9403545b0d9f7c7f24a1c30f1491a48 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0193adbe9403545b0d9f7c7f24a1c30f1491a48 Author: Eric Anholt e...@anholt.net Date: Mon Jul 27 23:15:39 2015 -0700 vc4: Fix bus errors on dumping CL on hardware. The kernel can't fixup unaligned float traps for us, so deref as a uint32_t first. --- src/gallium/drivers/vc4/vc4_cl_dump.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/vc4/vc4_cl_dump.c b/src/gallium/drivers/vc4/vc4_cl_dump.c index 64de79c..e153a24 100644 --- a/src/gallium/drivers/vc4/vc4_cl_dump.c +++ b/src/gallium/drivers/vc4/vc4_cl_dump.c @@ -34,7 +34,7 @@ dump_float(void *cl, uint32_t offset, uint32_t hw_offset) void *f = cl + offset; fprintf(stderr, 0x%08x 0x%08x: %f (0x%08x)\n, -offset, hw_offset, *(float *)f, *(uint32_t *)f); +offset, hw_offset, uif(*(uint32_t *)f), *(uint32_t *)f); } static void ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): glsl: move max_index calc to assign_attribute_or_color_locations
Module: Mesa
Branch: master
Commit: b868971e786b849e70675852a0043538bcce0739
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b868971e786b849e70675852a0043538bcce0739
Author: Tapani Pälli tapani.pa...@intel.com
Date: Mon Jul 27 13:29:20 2015 +0300
glsl: move max_index calc to assign_attribute_or_color_locations
Change function to get all gl_constants for inspection, this is used
by follow-up patch.
v2: rebase, update function documentation
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
Reviewed-by: Anuj Phogat anuj.pho...@gmail.com
Reviewed-by: Timothy Arceri t_arc...@yahoo.com.au
---
src/glsl/linker.cpp | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index 8f2c8ee..c8d2e8e 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -2313,12 +2313,10 @@ find_available_slots(unsigned used_mask, unsigned
needed_count)
* Assign locations for either VS inputs or FS outputs
*
* \param prog Shader program whose variables need locations assigned
+ * \param constants Driver specific constant values for the program.
* \param target_index Selector for the program target to receive location
* assignmnets. Must be either \c MESA_SHADER_VERTEX or
* \c MESA_SHADER_FRAGMENT.
- * \param max_index Maximum number of generic locations. This corresponds
- * to either the maximum number of draw buffers or the
- * maximum number of generic attributes.
*
* \return
* If locations are successfully assigned, true is returned. Otherwise an
@@ -2326,9 +2324,17 @@ find_available_slots(unsigned used_mask, unsigned
needed_count)
*/
bool
assign_attribute_or_color_locations(gl_shader_program *prog,
- unsigned target_index,
- unsigned max_index)
+struct gl_constants *constants,
+unsigned target_index)
{
+ /* Maximum number of generic locations. This corresponds to either the
+* maximum number of draw buffers or the maximum number of generic
+* attributes.
+*/
+ unsigned max_index = (target_index == MESA_SHADER_VERTEX) ?
+ constants-Program[target_index].MaxAttribs :
+ MAX2(constants-MaxDrawBuffers, constants-MaxDualSourceDrawBuffers);
+
/* Mark invalid locations as being used.
*/
unsigned used_locations = (max_index = 32)
@@ -3648,12 +3654,13 @@ link_shaders(struct gl_context *ctx, struct
gl_shader_program *prog)
}
}
- if (!assign_attribute_or_color_locations(prog, MESA_SHADER_VERTEX,
-
ctx-Const.Program[MESA_SHADER_VERTEX].MaxAttribs)) {
+ if (!assign_attribute_or_color_locations(prog, ctx-Const,
+MESA_SHADER_VERTEX)) {
goto done;
}
- if (!assign_attribute_or_color_locations(prog, MESA_SHADER_FRAGMENT,
MAX2(ctx-Const.MaxDrawBuffers, ctx-Const.MaxDualSourceDrawBuffers))) {
+ if (!assign_attribute_or_color_locations(prog, ctx-Const,
+MESA_SHADER_FRAGMENT)) {
goto done;
}
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Mesa (master): glsl: verify location when dual source blending
Module: Mesa
Branch: master
Commit: e17056f5a20beb752a530180fce1aba0e68877b6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e17056f5a20beb752a530180fce1aba0e68877b6
Author: Tapani Pälli tapani.pa...@intel.com
Date: Fri Jul 3 10:19:23 2015 +0300
glsl: verify location when dual source blending
Same check is made for glBindFragDataLocationIndexed but it was missing
when using layout qualifiers.
Fixes following Piglit test:
arb_blend_func_extended-output-location
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
Reviewed-by: Anuj Phogat anuj.pho...@gmail.com
Reviewed-by: Timothy Arceri t_arc...@yahoo.com.au
---
src/glsl/linker.cpp | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index c8d2e8e..a781211 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -2431,6 +2431,25 @@ assign_attribute_or_color_locations(gl_shader_program
*prog,
}
}
+ /* From GL4.5 core spec, section 15.2 (Shader Execution):
+ *
+ * Output binding assignments will cause LinkProgram to fail:
+ * ...
+ * If the program has an active output assigned to a location greater
+ * than or equal to the value of MAX_DUAL_SOURCE_DRAW_BUFFERS and has
+ * an active output assigned an index greater than or equal to one;
+ */
+ if (target_index == MESA_SHADER_FRAGMENT var-data.index = 1
+ var-data.location - generic_base =
+ (int) constants-MaxDualSourceDrawBuffers) {
+ linker_error(prog,
+ output location %d = GL_MAX_DUAL_SOURCE_DRAW_BUFFERS
+ with index %u for %s\n,
+ var-data.location - generic_base, var-data.index,
+ var-name);
+ return false;
+ }
+
const unsigned slots = var-type-count_attribute_slots();
/* From GL4.5 core spec, section 11.1.1 (Vertex Attributes):
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Mesa (master): i965: Support importing R8 and GR88 dma_bufs
Module: Mesa
Branch: master
Commit: 56f1f47eda881d6281e9c7531bc17e72b25d9bb9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=56f1f47eda881d6281e9c7531bc17e72b25d9bb9
Author: Chad Versace chad.vers...@intel.com
Date: Tue Jun 23 15:48:40 2015 -0700
i965: Support importing R8 and GR88 dma_bufs
EGL_EXT_image_dma_buf_import now supports those formats.
Tests:
- Tested by Piglit ext_image_dma_buf_import-transcode-nv12-as-r8-gr88.
- Tested by Peter in Kodi/XBMC to obtain 60fps NV12 transcode at 4K.
Tested-by: Peter Frühberger peter.fruehber...@gmail.com
Signed-off-by: Chad Versace chad.vers...@intel.com
---
include/GL/internal/dri_interface.h |9 +++--
src/mesa/drivers/dri/i965/intel_screen.c |6 ++
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/include/GL/internal/dri_interface.h
b/include/GL/internal/dri_interface.h
index f17b7b1..e7cf50d 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -1094,12 +1094,15 @@ struct __DRIdri2ExtensionRec {
/**
- * Four CC formats that matches with WL_DRM_FORMAT_* from wayland_drm.h
- * and GBM_FORMAT_* from gbm.h, used with createImageFromNames.
+ * Four CC formats that matches with WL_DRM_FORMAT_* from wayland_drm.h,
+ * GBM_FORMAT_* from gbm.h, and DRM_FORMAT_* from drm_fourcc.h. Used with
+ * createImageFromNames.
*
* \since 5
*/
+#define __DRI_IMAGE_FOURCC_R8 0x20203852
+#define __DRI_IMAGE_FOURCC_GR880x38385247
#define __DRI_IMAGE_FOURCC_RGB565 0x36314752
#define __DRI_IMAGE_FOURCC_ARGB0x34325241
#define __DRI_IMAGE_FOURCC_XRGB0x34325258
@@ -1134,6 +1137,8 @@ struct __DRIdri2ExtensionRec {
#define __DRI_IMAGE_COMPONENTS_Y_U_V 0x3003
#define __DRI_IMAGE_COMPONENTS_Y_UV0x3004
#define __DRI_IMAGE_COMPONENTS_Y_XUXV 0x3005
+#define __DRI_IMAGE_COMPONENTS_R 0x3006
+#define __DRI_IMAGE_COMPONENTS_RG 0x3007
/**
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_screen.c
index 65a1766..147fa1e 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -229,6 +229,12 @@ static struct intel_image_format intel_image_formats[] = {
{ __DRI_IMAGE_FOURCC_RGB565, __DRI_IMAGE_COMPONENTS_RGB, 1,
{ { 0, 0, 0, __DRI_IMAGE_FORMAT_RGB565, 2 } } },
+ { __DRI_IMAGE_FOURCC_R8, __DRI_IMAGE_COMPONENTS_R, 1,
+ { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 }, } },
+
+ { __DRI_IMAGE_FOURCC_GR88, __DRI_IMAGE_COMPONENTS_RG, 1,
+ { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 }, } },
+
{ __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
{ { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
{ 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
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Mesa (master): egl: Add support for DRM_FORMAT_R8, RG88, and GR88
Module: Mesa
Branch: master
Commit: fd865d56d2229d8c5d7ea893ac1dba525d88e647
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd865d56d2229d8c5d7ea893ac1dba525d88e647
Author: Chad Versace chad.vers...@intel.com
Date: Tue Jun 23 15:48:17 2015 -0700
egl: Add support for DRM_FORMAT_R8, RG88, and GR88
The Kodi/XBMC developers want to transcode NV12 to RGB with OpenGL shaders,
importing the two source planes through EGL_EXT_image_dma_buf_import. That
requires importing the Y plane as an R8 EGLImage and the UV plane as either an
RG88 or GR88 EGLImage.
This patch teaches the driver-independent part of EGL about the new
formats. Real driver support is left for follow-up patches.
The new formats landed in airlied's kernel branch 'drm-next' on July 24.
Tested-by: Peter Frühberger peter.fruehber...@gmail.com
Signed-off-by: Chad Versace chad.vers...@intel.com
---
src/egl/drivers/dri2/egl_dri2.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index e5aa396..e3afab4 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -54,6 +54,22 @@
#include egl_dri2.h
#include ../util/u_atomic.h
+/* The kernel header drm_fourcc.h defines the DRM formats below. We duplicate
+ * some of the definitions here so that building Mesa won't bleeding-edge
+ * kernel headers.
+ */
+#ifndef DRM_FORMAT_R8
+#define DRM_FORMAT_R8fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+#endif
+
+#ifndef DRM_FORMAT_RG88
+#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G
8:8 little endian */
+#endif
+
+#ifndef DRM_FORMAT_GR88
+#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R
8:8 little endian */
+#endif
+
const __DRIuseInvalidateExtension use_invalidate = {
.base = { __DRI_USE_INVALIDATE, 1 }
};
@@ -1727,6 +1743,9 @@ dri2_check_dma_buf_format(const _EGLImageAttribs *attrs)
unsigned i, plane_n;
switch (attrs-DMABufFourCC.Value) {
+ case DRM_FORMAT_R8:
+ case DRM_FORMAT_RG88:
+ case DRM_FORMAT_GR88:
case DRM_FORMAT_RGB332:
case DRM_FORMAT_BGR233:
case DRM_FORMAT_XRGB:
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Mesa (master): nvc0/ir: trim out barrier sync for non-compute shaders
Module: Mesa
Branch: master
Commit: 313940b03cf7c857143b9e3ec0ab969ce4472c83
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=313940b03cf7c857143b9e3ec0ab969ce4472c83
Author: Ilia Mirkin imir...@alum.mit.edu
Date: Tue Jul 28 02:37:51 2015 -0400
nvc0/ir: trim out barrier sync for non-compute shaders
It seems like they're never necessary, and actively cause harm. This
fixes some of the barrier-related piglits.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp |6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 710f53d..c632e30 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -559,6 +559,12 @@ NVC0LegalizePostRA::visit(BasicBlock *bb)
} else
if (i-isNop()) {
bb-remove(i);
+ } else
+ if (i-op == OP_BAR i-subOp == NV50_IR_SUBOP_BAR_SYNC
+ prog-getType() != Program::TYPE_COMPUTE) {
+ // It seems like barriers are never required for tessellation since
+ // the warp size is 32, and there are always at most 32 tcs threads.
+ bb-remove(i);
} else {
// TODO: Move this to before register allocation for operations that
// need the $c register !
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Mesa (master): nvc0/ir: fix barrier emission
Module: Mesa
Branch: master
Commit: ab63610a3603ae1e40a36d238b5938621bb9e8cc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab63610a3603ae1e40a36d238b5938621bb9e8cc
Author: Ilia Mirkin imir...@alum.mit.edu
Date: Tue Jul 28 02:00:20 2015 -0400
nvc0/ir: fix barrier emission
immediate arguments require a flag to be set for each one
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp |2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index 3ed815b..f607f3b 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
@@ -1451,6 +1451,7 @@ CodeEmitterNVC0::emitBAR(const Instruction *i)
ImmediateValue *imm = i-getSrc(0)-asImm();
assert(imm);
code[0] |= imm-reg.data.u32 20;
+ code[1] |= 0x8000;
}
// thread count
@@ -1461,6 +1462,7 @@ CodeEmitterNVC0::emitBAR(const Instruction *i)
assert(imm);
code[0] |= imm-reg.data.u32 26;
code[1] |= imm-reg.data.u32 6;
+ code[1] |= 0x4000;
}
if (i-srcExists(2) (i-predSrc != 2)) {
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Mesa (master): radeonsi: add support for interpolateAt functions (v2)
Module: Mesa
Branch: master
Commit: aa25a2c1ba2ea14efdab405707f15dace323cd48
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa25a2c1ba2ea14efdab405707f15dace323cd48
Author: Dave Airlie airl...@redhat.com
Date: Fri Jul 17 04:44:18 2015 +0100
radeonsi: add support for interpolateAt functions (v2)
This is part of ARB_gpu_shader5, and this passes
all the piglit tests currently available.
v2: use macros from the fine derivs commit.
add comments.
Reviewed-by: Marek Olšák marek.ol...@amd.com
Signed-off-by: Dave Airlie airl...@redhat.com
---
docs/GL3.txt |2 +-
src/gallium/drivers/radeonsi/si_shader.c | 241 +-
2 files changed, 241 insertions(+), 2 deletions(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 15bb57f..258a6fb 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -107,7 +107,7 @@ GL 4.0, GLSL 4.00:
- Geometry shader instancing DONE (r600, radeonsi,
llvmpipe, softpipe)
- Geometry shader multiple streams DONE ()
- Enhanced per-sample shadingDONE (r600, radeonsi)
- - Interpolation functionsDONE (r600)
+ - Interpolation functionsDONE (r600, radeonsi)
- New overload resolution rules DONE
GL_ARB_gpu_shader_fp64 DONE (nvc0, radeonsi,
llvmpipe, softpipe)
GL_ARB_sample_shadingDONE (i965, nv50, nvc0,
r600, radeonsi)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 27b3c72..fa31f73 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2960,6 +2960,234 @@ static void si_llvm_emit_ddxy(
emit_data-output[0] = lp_build_gather_values(gallivm, result, 4);
}
+/*
+ * this takes an I,J coordinate pair,
+ * and works out the X and Y derivatives.
+ * it returns DDX(I), DDX(J), DDY(I), DDY(J).
+ */
+static LLVMValueRef si_llvm_emit_ddxy_interp(
+ struct lp_build_tgsi_context *bld_base,
+ LLVMValueRef interp_ij)
+{
+ struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
+ struct gallivm_state *gallivm = bld_base-base.gallivm;
+ struct lp_build_context *base = bld_base-base;
+ LLVMValueRef indices[2];
+ LLVMValueRef store_ptr, load_ptr_x, load_ptr_y, load_ptr_ddx,
load_ptr_ddy, temp, temp2;
+ LLVMValueRef tl, tr, bl, result[4];
+ LLVMTypeRef i32;
+ unsigned c;
+
+ i32 = LLVMInt32TypeInContext(gallivm-context);
+
+ indices[0] = bld_base-uint_bld.zero;
+ indices[1] = build_intrinsic(gallivm-builder, llvm.SI.tid, i32,
+NULL, 0, LLVMReadNoneAttribute);
+ store_ptr = LLVMBuildGEP(gallivm-builder, si_shader_ctx-lds,
+indices, 2, );
+
+ temp = LLVMBuildAnd(gallivm-builder, indices[1],
+ lp_build_const_int32(gallivm, TID_MASK_LEFT), );
+
+ temp2 = LLVMBuildAnd(gallivm-builder, indices[1],
+lp_build_const_int32(gallivm, TID_MASK_TOP), );
+
+ indices[1] = temp;
+ load_ptr_x = LLVMBuildGEP(gallivm-builder, si_shader_ctx-lds,
+ indices, 2, );
+
+ indices[1] = temp2;
+ load_ptr_y = LLVMBuildGEP(gallivm-builder, si_shader_ctx-lds,
+ indices, 2, );
+
+ indices[1] = LLVMBuildAdd(gallivm-builder, temp,
+ lp_build_const_int32(gallivm, 1), );
+ load_ptr_ddx = LLVMBuildGEP(gallivm-builder, si_shader_ctx-lds,
+ indices, 2, );
+
+ indices[1] = LLVMBuildAdd(gallivm-builder, temp2,
+ lp_build_const_int32(gallivm, 2), );
+ load_ptr_ddy = LLVMBuildGEP(gallivm-builder, si_shader_ctx-lds,
+ indices, 2, );
+
+ for (c = 0; c 2; ++c) {
+ LLVMValueRef store_val;
+ LLVMValueRef c_ll = lp_build_const_int32(gallivm, c);
+
+ store_val = LLVMBuildExtractElement(gallivm-builder,
+ interp_ij, c_ll, );
+ LLVMBuildStore(gallivm-builder,
+ store_val,
+ store_ptr);
+
+ tl = LLVMBuildLoad(gallivm-builder, load_ptr_x, );
+ tl = LLVMBuildBitCast(gallivm-builder, tl, base-elem_type,
);
+
+ tr = LLVMBuildLoad(gallivm-builder, load_ptr_ddx, );
+ tr = LLVMBuildBitCast(gallivm-builder, tr, base-elem_type,
);
+
+ result[c] = LLVMBuildFSub(gallivm-builder, tr, tl, );
+
+ tl = LLVMBuildLoad(gallivm-builder, load_ptr_y, );
+ tl = LLVMBuildBitCast(gallivm-builder, tl, base-elem_type,
);
+
+ bl =
Mesa (master): st/mesa: remove st_finalize_textures atom
Module: Mesa
Branch: master
Commit: 72f31c63d7b73abcdf47bc303d09987f299aff7a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=72f31c63d7b73abcdf47bc303d09987f299aff7a
Author: Marek Olšák marek.ol...@amd.com
Date: Sat Jul 25 17:26:10 2015 +0200
st/mesa: remove st_finalize_textures atom
It only checks fragment textures and ignores other shaders, which makes it
incomplete, and textures are already finalized in update_single_texture.
There are no piglit regressions.
Reviewed-by: Brian Paul bri...@vmware.com
---
src/mesa/state_tracker/st_atom.c |1 -
src/mesa/state_tracker/st_atom.h |1 -
src/mesa/state_tracker/st_atom_texture.c | 45 --
3 files changed, 47 deletions(-)
diff --git a/src/mesa/state_tracker/st_atom.c b/src/mesa/state_tracker/st_atom.c
index 5fc1a77..43dbadd 100644
--- a/src/mesa/state_tracker/st_atom.c
+++ b/src/mesa/state_tracker/st_atom.c
@@ -46,7 +46,6 @@ static const struct st_tracked_state *atoms[] =
st_update_depth_stencil_alpha,
st_update_clip,
- st_finalize_textures,
st_update_fp,
st_update_gp,
st_update_tep,
diff --git a/src/mesa/state_tracker/st_atom.h b/src/mesa/state_tracker/st_atom.h
index 5735ca6..a24842b 100644
--- a/src/mesa/state_tracker/st_atom.h
+++ b/src/mesa/state_tracker/st_atom.h
@@ -68,7 +68,6 @@ extern const struct st_tracked_state st_update_vertex_texture;
extern const struct st_tracked_state st_update_geometry_texture;
extern const struct st_tracked_state st_update_tessctrl_texture;
extern const struct st_tracked_state st_update_tesseval_texture;
-extern const struct st_tracked_state st_finalize_textures;
extern const struct st_tracked_state st_update_fs_constants;
extern const struct st_tracked_state st_update_gs_constants;
extern const struct st_tracked_state st_update_tes_constants;
diff --git a/src/mesa/state_tracker/st_atom_texture.c
b/src/mesa/state_tracker/st_atom_texture.c
index 4422d9a..31e0f6b 100644
--- a/src/mesa/state_tracker/st_atom_texture.c
+++ b/src/mesa/state_tracker/st_atom_texture.c
@@ -582,48 +582,3 @@ const struct st_tracked_state st_update_tesseval_texture =
{
},
update_tesseval_textures/* update */
};
-
-
-
-static void
-finalize_textures(struct st_context *st)
-{
- struct gl_context *ctx = st-ctx;
- struct gl_fragment_program *fprog = ctx-FragmentProgram._Current;
- const GLboolean prev_missing_textures = st-missing_textures;
- GLuint su;
-
- st-missing_textures = GL_FALSE;
-
- for (su = 0; su ctx-Const.MaxTextureCoordUnits; su++) {
- if (fprog-Base.SamplersUsed (1 su)) {
- const GLuint texUnit = fprog-Base.SamplerUnits[su];
- struct gl_texture_object *texObj
-= ctx-Texture.Unit[texUnit]._Current;
-
- if (texObj) {
-GLboolean retval;
-
-retval = st_finalize_texture(ctx, st-pipe, texObj);
-if (!retval) {
- /* out of mem */
- st-missing_textures = GL_TRUE;
- continue;
-}
- }
- }
- }
-
- if (prev_missing_textures != st-missing_textures)
- st-dirty.st |= ST_NEW_FRAGMENT_PROGRAM;
-}
-
-
-const struct st_tracked_state st_finalize_textures = {
- st_finalize_textures, /* name */
- { /* dirty */
- _NEW_TEXTURE,/* mesa */
- 0, /* st */
- },
- finalize_textures /* update */
-};
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Mesa (master): st/mesa: fix GLSL 1.30 texture shadow functions with the GL_ALPHA depth mode (v2)
Module: Mesa
Branch: master
Commit: 768b4a25b95b95989dae3ff2f5a06172a2f4ab85
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=768b4a25b95b95989dae3ff2f5a06172a2f4ab85
Author: Marek Olšák marek.ol...@amd.com
Date: Thu Jul 23 21:57:19 2015 +0200
st/mesa: fix GLSL 1.30 texture shadow functions with the GL_ALPHA depth mode
(v2)
Fixes piglit:
spec@glsl-1.30@execution@fs-texture-sampler2dshadow-10
spec@glsl-1.30@execution@fs-texture-sampler2dshadow-11
v2: use st_shader_stage_to_ptarget
Reviewed-by: Brian Paul bri...@vmware.com
---
src/mesa/state_tracker/st_atom_texture.c | 74 +++-
src/mesa/state_tracker/st_context.h| 23 +
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 27 +-
3 files changed, 77 insertions(+), 47 deletions(-)
diff --git a/src/mesa/state_tracker/st_atom_texture.c
b/src/mesa/state_tracker/st_atom_texture.c
index e80f989..4422d9a 100644
--- a/src/mesa/state_tracker/st_atom_texture.c
+++ b/src/mesa/state_tracker/st_atom_texture.c
@@ -103,7 +103,8 @@ swizzle_swizzle(unsigned swizzle1, unsigned swizzle2)
*/
static unsigned
compute_texture_format_swizzle(GLenum baseFormat, GLenum depthMode,
- enum pipe_format actualFormat)
+ enum pipe_format actualFormat,
+ unsigned glsl_version)
{
switch (baseFormat) {
case GL_RGBA:
@@ -157,8 +158,26 @@ compute_texture_format_swizzle(GLenum baseFormat, GLenum
depthMode,
case GL_INTENSITY:
return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X);
case GL_ALPHA:
- return MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_ZERO,
- SWIZZLE_ZERO, SWIZZLE_X);
+ /* The texture(sampler*Shadow) functions from GLSL 1.30 ignore
+ * the depth mode and return float, while older shadow* functions
+ * and ARB_fp instructions return vec4 according to the depth mode.
+ *
+ * The problem with the GLSL 1.30 functions is that GL_ALPHA forces
+ * them to return 0, breaking them completely.
+ *
+ * A proper fix would increase code complexity and that's not worth
+ * it for a rarely used feature such as the GL_ALPHA depth mode
+ * in GL3. Therefore, change GL_ALPHA to GL_INTENSITY for all
+ * shaders that use GLSL 1.30 or later.
+ *
+ * BTW, it's required that sampler views are updated when
+ * shaders change (check_sampler_swizzle takes care of that).
+ */
+ if (glsl_version glsl_version = 130)
+return SWIZZLE_;
+ else
+return MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_ZERO,
+ SWIZZLE_ZERO, SWIZZLE_X);
case GL_RED:
return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_ZERO,
SWIZZLE_ZERO, SWIZZLE_ONE);
@@ -174,7 +193,8 @@ compute_texture_format_swizzle(GLenum baseFormat, GLenum
depthMode,
static unsigned
-get_texture_format_swizzle(const struct st_texture_object *stObj)
+get_texture_format_swizzle(const struct st_texture_object *stObj,
+ unsigned glsl_version)
{
GLenum baseFormat = _mesa_texture_base_format(stObj-base);
unsigned tex_swizzle;
@@ -182,7 +202,8 @@ get_texture_format_swizzle(const struct st_texture_object
*stObj)
if (baseFormat != GL_NONE) {
tex_swizzle = compute_texture_format_swizzle(baseFormat,
stObj-base.DepthMode,
- stObj-pt-format);
+ stObj-pt-format,
+ glsl_version);
}
else {
tex_swizzle = SWIZZLE_XYZW;
@@ -201,9 +222,9 @@ get_texture_format_swizzle(const struct st_texture_object
*stObj)
*/
static boolean
check_sampler_swizzle(const struct st_texture_object *stObj,
- struct pipe_sampler_view *sv)
+ struct pipe_sampler_view *sv, unsigned glsl_version)
{
- unsigned swizzle = get_texture_format_swizzle(stObj);
+ unsigned swizzle = get_texture_format_swizzle(stObj, glsl_version);
return ((sv-swizzle_r != GET_SWZ(swizzle, 0)) ||
(sv-swizzle_g != GET_SWZ(swizzle, 1)) ||
@@ -232,10 +253,11 @@ static unsigned last_layer(struct st_texture_object
*stObj)
static struct pipe_sampler_view *
st_create_texture_sampler_view_from_stobj(struct pipe_context *pipe,
struct st_texture_object *stObj,
- enum pipe_format format)
+ enum pipe_format format,
+ unsigned glsl_version)
{
struct pipe_sampler_view templ;
- unsigned swizzle = get_texture_format_swizzle(stObj);
+ unsigned swizzle =
Mesa (master): r600,radeonsi: GL_ARB_conditional_render_inverted
Module: Mesa
Branch: master
Commit: 82546729e3533c9a5ec0392585a60833bd93acca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=82546729e3533c9a5ec0392585a60833bd93acca
Author: Edward O'Callaghan eocallag...@alterapraxis.com
Date: Mon Jul 27 11:01:47 2015 +1000
r600,radeonsi: GL_ARB_conditional_render_inverted
By using 'Tobias Klausmann' piglit test-suite patch. We obtain
a full 12/12 passes using this patch. By 'faking' to claim
support for this extension we obtain 7 fails and 5 passes.
Signed-off-by: Edward O'Callaghan eocallag...@alterapraxis.com
Tested-by: Furkan Alaca fal...@gmail.com
Signed-off-by: Marek Olšák marek.ol...@amd.com
---
docs/GL3.txt|2 +-
docs/relnotes/10.7.0.html |1 +
src/gallium/drivers/r600/r600_pipe.c|2 +-
src/gallium/drivers/radeon/r600_query.c | 22 +-
src/gallium/drivers/radeonsi/si_pipe.c |2 +-
5 files changed, 17 insertions(+), 12 deletions(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 258a6fb..d438403 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -189,7 +189,7 @@ GL 4.5, GLSL 4.50:
GL_ARB_ES3_1_compatibility not started
GL_ARB_clip_control DONE (i965, nv50, nvc0,
r600, radeonsi, llvmpipe, softpipe)
- GL_ARB_conditional_render_inverted DONE (i965, nv50, nvc0,
llvmpipe, softpipe)
+ GL_ARB_conditional_render_inverted DONE (i965, nv50, nvc0,
r600, radeonsi, llvmpipe, softpipe)
GL_ARB_cull_distance in progress (Tobias)
GL_ARB_derivative_controlDONE (i965, nv50, nvc0,
r600, radeonsi)
GL_ARB_direct_state_access DONE (all drivers)
diff --git a/docs/relnotes/10.7.0.html b/docs/relnotes/10.7.0.html
index afef525..2df18c0 100644
--- a/docs/relnotes/10.7.0.html
+++ b/docs/relnotes/10.7.0.html
@@ -45,6 +45,7 @@ Note: some of the new features are only available with
certain drivers.
ul
liGL_AMD_vertex_shader_viewport_index on radeonsi/li
+liGL_ARB_conditional_render_inverted on r600, radeonsi/li
liGL_ARB_derivative_control on radeonsi/li
liGL_ARB_fragment_layer_viewport on radeonsi/li
liGL_ARB_framebuffer_no_attachments on i965/li
diff --git a/src/gallium/drivers/r600/r600_pipe.c
b/src/gallium/drivers/r600/r600_pipe.c
index e845928..e755784 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -268,6 +268,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum
pipe_cap param)
case PIPE_CAP_SAMPLE_SHADING:
case PIPE_CAP_CLIP_HALFZ:
case PIPE_CAP_POLYGON_OFFSET_CLAMP:
+ case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
return 1;
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
@@ -332,7 +333,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum
pipe_cap param)
case PIPE_CAP_VERTEX_COLOR_CLAMPED:
case PIPE_CAP_USER_VERTEX_BUFFERS:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
- case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
case PIPE_CAP_SAMPLER_VIEW_TARGET:
case PIPE_CAP_VERTEXID_NOBASE:
case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
diff --git a/src/gallium/drivers/radeon/r600_query.c
b/src/gallium/drivers/radeon/r600_query.c
index a1d8241..6bf0271 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -290,6 +290,13 @@ static void r600_emit_query_predication(struct
r600_common_context *ctx, struct
int operation, bool flag_wait)
{
struct radeon_winsys_cs *cs = ctx-rings.gfx.cs;
+ uint32_t op = PRED_OP(operation);
+
+ /* if true then invert, see GL_ARB_conditional_render_inverted */
+ if (ctx-current_render_cond_cond)
+ op |= PREDICATION_DRAW_NOT_VISIBLE; /* Draw if not
visable/overflow */
+ else
+ op |= PREDICATION_DRAW_VISIBLE; /* Draw if visable/overflow */
if (operation == PREDICATION_OP_CLEAR) {
ctx-need_gfx_cs_space(ctx-b, 3, FALSE);
@@ -300,24 +307,21 @@ static void r600_emit_query_predication(struct
r600_common_context *ctx, struct
} else {
struct r600_query_buffer *qbuf;
unsigned count;
- uint32_t op;
-
/* Find how many results there are. */
count = 0;
for (qbuf = query-buffer; qbuf; qbuf = qbuf-previous) {
count += qbuf-results_end / query-result_size;
}
-
+
ctx-need_gfx_cs_space(ctx-b, 5 * count, TRUE);
-
- op = PRED_OP(operation) | PREDICATION_DRAW_VISIBLE |
- (flag_wait ? PREDICATION_HINT_WAIT :
PREDICATION_HINT_NOWAIT_DRAW);
-
+
+ op |= flag_wait ? PREDICATION_HINT_WAIT :
PREDICATION_HINT_NOWAIT_DRAW;
+
Mesa (master): st/mesa: add shader dumping for shader-db
Module: Mesa
Branch: master
Commit: 6ca3ff982a9e6a54286158b457d479715be5ab17
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ca3ff982a9e6a54286158b457d479715be5ab17
Author: Marek Olšák marek.ol...@amd.com
Date: Sat Jul 25 20:25:18 2015 +0200
st/mesa: add shader dumping for shader-db
Reviewed-by: Brian Paul bri...@vmware.com
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 66
1 file changed, 66 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 4c6e48a..6f00727 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -5877,6 +5877,71 @@ get_mesa_program(struct gl_context *ctx,
extern C {
+static void
+st_dump_program_for_shader_db(struct gl_context *ctx,
+ struct gl_shader_program *prog)
+{
+ /* Dump only successfully compiled and linked shaders to the specified
+* file. This is for shader-db.
+*
+* These options allow some pre-processing of shaders while dumping,
+* because some apps have ill-formed shaders.
+*/
+ const char *dump_filename = os_get_option(ST_DUMP_SHADERS);
+ const char *insert_directives = os_get_option(ST_DUMP_INSERT);
+
+ if (dump_filename prog-Name != 0) {
+ FILE *f = fopen(dump_filename, a);
+
+ if (f) {
+ for (unsigned i = 0; i prog-NumShaders; i++) {
+const struct gl_shader *sh = prog-Shaders[i];
+const char *source;
+bool skip_version = false;
+
+if (!sh)
+ continue;
+
+source = sh-Source;
+
+/* This string mustn't be changed. shader-db uses it to find
+ * where the shader begins.
+ */
+fprintf(f, GLSL %s shader %d source for linked program %d:\n,
+_mesa_shader_stage_to_string(sh-Stage),
+i, prog-Name);
+
+/* Dump the forced version if set. */
+if (ctx-Const.ForceGLSLVersion) {
+ fprintf(f, #version %i\n, ctx-Const.ForceGLSLVersion);
+ skip_version = true;
+}
+
+/* Insert directives (optional). */
+if (insert_directives) {
+ if (!ctx-Const.ForceGLSLVersion prog-Version)
+ fprintf(f, #version %i\n, prog-Version);
+ fprintf(f, %s\n, insert_directives);
+ skip_version = true;
+}
+
+if (skip_version strncmp(source, #version , 9) == 0) {
+ const char *next_line = strstr(source, \n);
+
+ if (next_line)
+ source = next_line + 1;
+ else
+ continue;
+}
+
+fprintf(f, %s, source);
+fprintf(f, \n);
+ }
+ fclose(f);
+ }
+ }
+}
+
/**
* Link a shader.
* Called via ctx-Driver.LinkShader()
@@ -5997,6 +6062,7 @@ st_link_shader(struct gl_context *ctx, struct
gl_shader_program *prog)
_mesa_reference_program(ctx, linked_prog, NULL);
}
+ st_dump_program_for_shader_db(ctx, prog);
return GL_TRUE;
}
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Mesa (master): st/mesa: remove st_context:: missing textures and get_passthrough_fs
Module: Mesa
Branch: master
Commit: 5142564734bd68f165b02e29e384ebbcf91cce38
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5142564734bd68f165b02e29e384ebbcf91cce38
Author: Marek Olšák marek.ol...@amd.com
Date: Tue Jul 28 20:41:16 2015 +0200
st/mesa: remove st_context::missing textures and get_passthrough_fs
Reviewed-by: Brian Paul bri...@vmware.com
---
src/mesa/state_tracker/st_atom_shader.c | 29 ++---
src/mesa/state_tracker/st_context.h |1 -
2 files changed, 2 insertions(+), 28 deletions(-)
diff --git a/src/mesa/state_tracker/st_atom_shader.c
b/src/mesa/state_tracker/st_atom_shader.c
index d27882d..fee15a9 100644
--- a/src/mesa/state_tracker/st_atom_shader.c
+++ b/src/mesa/state_tracker/st_atom_shader.c
@@ -50,24 +50,6 @@
/**
- * Return pointer to a pass-through fragment shader.
- * This shader is used when a texture is missing/incomplete.
- */
-static void *
-get_passthrough_fs(struct st_context *st)
-{
- if (!st-passthrough_fs) {
- st-passthrough_fs =
- util_make_fragment_passthrough_shader(st-pipe, TGSI_SEMANTIC_COLOR,
- TGSI_INTERPOLATE_PERSPECTIVE,
- TRUE);
- }
-
- return st-passthrough_fs;
-}
-
-
-/**
* Update fragment program state/atom. This involves translating the
* Mesa fragment program into a gallium fragment program and binding it.
*/
@@ -96,15 +78,8 @@ update_fp( struct st_context *st )
st_reference_fragprog(st, st-fp, stfp);
- if (st-missing_textures) {
- /* use a pass-through frag shader that uses no textures */
- void *fs = get_passthrough_fs(st);
- cso_set_fragment_shader_handle(st-cso_context, fs);
- }
- else {
- cso_set_fragment_shader_handle(st-cso_context,
- st-fp_variant-driver_shader);
- }
+ cso_set_fragment_shader_handle(st-cso_context,
+ st-fp_variant-driver_shader);
}
diff --git a/src/mesa/state_tracker/st_context.h
b/src/mesa/state_tracker/st_context.h
index 48c9b6f..81d5480 100644
--- a/src/mesa/state_tracker/st_context.h
+++ b/src/mesa/state_tracker/st_context.h
@@ -140,7 +140,6 @@ struct st_context
struct st_state_flags dirty;
- GLboolean missing_textures;
GLboolean vertdata_edgeflags;
GLboolean edgeflag_culls_prims;
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