Mesa (master): mesa: simplify and inline _mesa_lookup_parameter_index()
Module: Mesa
Branch: master
Commit: fa9bd6b663a1c78d5a17e3ad5407ff5530fbb0c9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa9bd6b663a1c78d5a17e3ad5407ff5530fbb0c9
Author: Timothy Arceri
Date: Fri Mar 18 11:21:13 2016 +1100
mesa: simplify and inline _mesa_lookup_parameter_index()
The function has only one user and strings are always null terminated.
Reviewed-by: Matt Turner
---
src/mesa/program/ir_to_mesa.cpp | 2 +-
src/mesa/program/prog_parameter.c | 38 --
src/mesa/program/prog_parameter.h | 19 +--
3 files changed, 18 insertions(+), 41 deletions(-)
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 10d931c..1d9047e 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -2356,7 +2356,7 @@ add_uniform_to_shader::visit_field(const glsl_type *type,
const char *name,
file = PROGRAM_UNIFORM;
}
- int index = _mesa_lookup_parameter_index(params, -1, name);
+ int index = _mesa_lookup_parameter_index(params, name);
if (index < 0) {
index = _mesa_add_parameter(params, file, name, size, type->gl_type,
NULL, NULL);
diff --git a/src/mesa/program/prog_parameter.c
b/src/mesa/program/prog_parameter.c
index 19b57ee..25d3835 100644
--- a/src/mesa/program/prog_parameter.c
+++ b/src/mesa/program/prog_parameter.c
@@ -415,41 +415,3 @@ _mesa_add_state_reference(struct gl_program_parameter_list
*paramList,
return index;
}
-
-
-/**
- * Given a program parameter name, find its position in the list of parameters.
- * \param paramList the parameter list to search
- * \param nameLen length of name (in chars).
- * If length is negative, assume that name is null-terminated.
- * \param name the name to search for
- * \return index of parameter in the list.
- */
-GLint
-_mesa_lookup_parameter_index(const struct gl_program_parameter_list *paramList,
- GLsizei nameLen, const char *name)
-{
- GLint i;
-
- if (!paramList)
- return -1;
-
- if (nameLen == -1) {
- /* name is null-terminated */
- for (i = 0; i < (GLint) paramList->NumParameters; i++) {
- if (paramList->Parameters[i].Name &&
-strcmp(paramList->Parameters[i].Name, name) == 0)
-return i;
- }
- }
- else {
- /* name is not null-terminated, use nameLen */
- for (i = 0; i < (GLint) paramList->NumParameters; i++) {
- if (paramList->Parameters[i].Name &&
-strncmp(paramList->Parameters[i].Name, name, nameLen) == 0
- && strlen(paramList->Parameters[i].Name) == (size_t)nameLen)
-return i;
- }
- }
- return -1;
-}
diff --git a/src/mesa/program/prog_parameter.h
b/src/mesa/program/prog_parameter.h
index c17d703..b4b24a1 100644
--- a/src/mesa/program/prog_parameter.h
+++ b/src/mesa/program/prog_parameter.h
@@ -34,6 +34,7 @@
#include "main/mtypes.h"
#include "prog_statevars.h"
+#include
#ifdef __cplusplus
extern "C" {
@@ -124,9 +125,23 @@ extern GLint
_mesa_add_state_reference(struct gl_program_parameter_list *paramList,
const gl_state_index stateTokens[STATE_LENGTH]);
-extern GLint
+
+static inline GLint
_mesa_lookup_parameter_index(const struct gl_program_parameter_list *paramList,
- GLsizei nameLen, const char *name);
+ const char *name)
+{
+ if (!paramList)
+ return -1;
+
+ /* name must be null-terminated */
+ for (GLint i = 0; i < (GLint) paramList->NumParameters; i++) {
+ if (paramList->Parameters[i].Name &&
+ strcmp(paramList->Parameters[i].Name, name) == 0)
+ return i;
+ }
+
+ return -1;
+}
#ifdef __cplusplus
}
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Mesa (master): st/mesa: simplify bitmap shader code with tgsi transform helper functions
Module: Mesa
Branch: master
Commit: 373910f4e764179ec3c970a9ed13435cd6087631
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=373910f4e764179ec3c970a9ed13435cd6087631
Author: Brian Paul
Date: Wed Mar 16 15:49:34 2016 -0600
st/mesa: simplify bitmap shader code with tgsi transform helper functions
Reviewed-by: Charmaine Lee
---
src/mesa/state_tracker/st_cb_bitmap_shader.c | 45 +---
1 file changed, 8 insertions(+), 37 deletions(-)
diff --git a/src/mesa/state_tracker/st_cb_bitmap_shader.c
b/src/mesa/state_tracker/st_cb_bitmap_shader.c
index cddea36..88779bc 100644
--- a/src/mesa/state_tracker/st_cb_bitmap_shader.c
+++ b/src/mesa/state_tracker/st_cb_bitmap_shader.c
@@ -52,7 +52,6 @@ transform_instr(struct tgsi_transform_context *tctx,
struct tgsi_full_instruction *current_inst)
{
struct tgsi_bitmap_transform *ctx = tgsi_bitmap_transform(tctx);
- struct tgsi_full_declaration decl;
struct tgsi_full_instruction inst;
unsigned i, semantic;
int texcoord_index = -1;
@@ -66,9 +65,7 @@ transform_instr(struct tgsi_transform_context *tctx,
/* Add TEMP[0] if it's missing. */
if (ctx->info.file_max[TGSI_FILE_TEMPORARY] == -1) {
- decl = tgsi_default_full_declaration();
- decl.Declaration.File = TGSI_FILE_TEMPORARY;
- tctx->emit_declaration(tctx, &decl);
+ tgsi_transform_temp_decl(tctx, 0);
}
/* Add TEXCOORD[0] if it's missing. */
@@ -83,45 +80,19 @@ transform_instr(struct tgsi_transform_context *tctx,
}
if (texcoord_index == -1) {
- decl = tgsi_default_full_declaration();
- decl.Declaration.File = TGSI_FILE_INPUT;
- decl.Declaration.Semantic = 1;
- decl.Semantic.Name = semantic;
- decl.Declaration.Interpolate = 1;
- decl.Interp.Interpolate = TGSI_INTERPOLATE_PERSPECTIVE;
- decl.Range.First = decl.Range.Last = ctx->info.num_inputs;
texcoord_index = ctx->info.num_inputs;
- tctx->emit_declaration(tctx, &decl);
+ tgsi_transform_input_decl(tctx, texcoord_index,
+semantic, 0, TGSI_INTERPOLATE_PERSPECTIVE);
}
/* Declare the sampler. */
- decl = tgsi_default_full_declaration();
- decl.Declaration.File = TGSI_FILE_SAMPLER;
- decl.Range.First = decl.Range.Last = ctx->sampler_index;
- tctx->emit_declaration(tctx, &decl);
+ tgsi_transform_sampler_decl(tctx, ctx->sampler_index);
/* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
- inst = tgsi_default_full_instruction();
- inst.Instruction.Opcode = TGSI_OPCODE_TEX;
- inst.Instruction.Texture = 1;
- inst.Texture.Texture = TGSI_TEXTURE_2D;
-
- inst.Instruction.NumDstRegs = 1;
- inst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
- inst.Dst[0].Register.Index = 0;
- inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
-
- inst.Instruction.NumSrcRegs = 2;
- inst.Src[0].Register.File = TGSI_FILE_INPUT;
- inst.Src[0].Register.Index = texcoord_index;
- inst.Src[0].Register.SwizzleX = TGSI_SWIZZLE_X;
- inst.Src[0].Register.SwizzleY = TGSI_SWIZZLE_Y;
- inst.Src[0].Register.SwizzleZ = TGSI_SWIZZLE_Z;
- inst.Src[0].Register.SwizzleW = TGSI_SWIZZLE_W;
- inst.Src[1].Register.File = TGSI_FILE_SAMPLER;
- inst.Src[1].Register.Index = ctx->sampler_index;
-
- tctx->emit_instruction(tctx, &inst);
+ tgsi_transform_tex_2d_inst(tctx,
+ TGSI_FILE_TEMPORARY, 0,
+ TGSI_FILE_INPUT, texcoord_index,
+ ctx->sampler_index);
/* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
inst = tgsi_default_full_instruction();
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Mesa (master): vc4: Don't make a temporary for setting flags.
Module: Mesa
Branch: master
Commit: 7c9fc439150188612c7fe595cbe0180fcea3e705
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c9fc439150188612c7fe595cbe0180fcea3e705
Author: Eric Anholt
Date: Tue Mar 15 18:58:43 2016 -0700
vc4: Don't make a temporary for setting flags.
The register allocator doesn't really do anything about the temp, so it
doesn't seem like it should matter. However, the scheduler would think
that a new def is being created.
This doesn't change anything yet, but it avoids a bunch of regressions in
the next commit.
---
src/gallium/drivers/vc4/vc4_qir.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_qir.c
b/src/gallium/drivers/vc4/vc4_qir.c
index fd1192f..125a952 100644
--- a/src/gallium/drivers/vc4/vc4_qir.c
+++ b/src/gallium/drivers/vc4/vc4_qir.c
@@ -495,7 +495,8 @@ qir_SF(struct vc4_compile *c, struct qreg src)
!c->defs[src.index] ||
last_inst != c->defs[src.index] ||
qir_is_multi_instruction(last_inst)) {
-src = qir_MOV(c, src);
+struct qreg null = { QFILE_NULL, 0 };
+last_inst = qir_MOV_dest(c, null, src);
last_inst = (struct qinst *)c->instructions.prev;
}
last_inst->sf = true;
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Mesa (master): nir: Add compute shader shared variable storage class
Module: Mesa
Branch: master
Commit: 3c807607df4ab457037f2daa5ea9e5ce18392b7b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c807607df4ab457037f2daa5ea9e5ce18392b7b
Author: Jordan Justen
Date: Fri Jan 8 17:16:29 2016 -0800
nir: Add compute shader shared variable storage class
Previously we were receiving shared variable accesses via a lowered
intrinsic function from glsl. This change allows us to send in
variables instead. For example, when converting from SPIR-V.
Signed-off-by: Jordan Justen
Reviewed-by: Jason Ekstrand
---
src/compiler/nir/nir.c | 6 ++
src/compiler/nir/nir.h | 6 +-
src/compiler/nir/nir_clone.c | 1 +
src/compiler/nir/nir_lower_atomics.c | 3 ++-
src/compiler/nir/nir_print.c | 7 ++-
src/compiler/nir/nir_sweep.c | 1 +
src/compiler/nir/nir_validate.c | 5 +
7 files changed, 26 insertions(+), 3 deletions(-)
diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
index cd78475..386cdaf 100644
--- a/src/compiler/nir/nir.c
+++ b/src/compiler/nir/nir.c
@@ -39,6 +39,7 @@ nir_shader_create(void *mem_ctx,
exec_list_make_empty(&shader->uniforms);
exec_list_make_empty(&shader->inputs);
exec_list_make_empty(&shader->outputs);
+ exec_list_make_empty(&shader->shared);
shader->options = options;
memset(&shader->info, 0, sizeof(shader->info));
@@ -136,6 +137,11 @@ nir_shader_add_variable(nir_shader *shader, nir_variable
*var)
exec_list_push_tail(&shader->uniforms, &var->node);
break;
+ case nir_var_shared:
+ assert(shader->stage == MESA_SHADER_COMPUTE);
+ exec_list_push_tail(&shader->shared, &var->node);
+ break;
+
case nir_var_system_value:
exec_list_push_tail(&shader->system_values, &var->node);
break;
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 34f31eb..7d2bd03 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -90,6 +90,7 @@ typedef enum {
nir_var_shader_storage,
nir_var_system_value,
nir_var_param,
+ nir_var_shared,
} nir_variable_mode;
/**
@@ -172,7 +173,7 @@ typedef struct nir_variable {
*
* \sa nir_variable_mode
*/
- nir_variable_mode mode:4;
+ nir_variable_mode mode:5;
/**
* Interpolation mode for shader inputs / outputs
@@ -1660,6 +1661,9 @@ typedef struct nir_shader {
/** list of outputs (nir_variable) */
struct exec_list outputs;
+ /** list of shared compute variables (nir_variable) */
+ struct exec_list shared;
+
/** Set of driver-specific options for the shader.
*
* The memory for the options is expected to be kept in a single static
diff --git a/src/compiler/nir/nir_clone.c b/src/compiler/nir/nir_clone.c
index 198ca8b..d17d384 100644
--- a/src/compiler/nir/nir_clone.c
+++ b/src/compiler/nir/nir_clone.c
@@ -675,6 +675,7 @@ nir_shader_clone(void *mem_ctx, const nir_shader *s)
clone_var_list(&state, &ns->uniforms, &s->uniforms);
clone_var_list(&state, &ns->inputs, &s->inputs);
clone_var_list(&state, &ns->outputs, &s->outputs);
+ clone_var_list(&state, &ns->shared, &s->shared);
clone_var_list(&state, &ns->globals, &s->globals);
clone_var_list(&state, &ns->system_values, &s->system_values);
diff --git a/src/compiler/nir/nir_lower_atomics.c
b/src/compiler/nir/nir_lower_atomics.c
index 1935a52..eefcb55 100644
--- a/src/compiler/nir/nir_lower_atomics.c
+++ b/src/compiler/nir/nir_lower_atomics.c
@@ -63,7 +63,8 @@ lower_instr(nir_intrinsic_instr *instr,
}
if (instr->variables[0]->var->data.mode != nir_var_uniform &&
- instr->variables[0]->var->data.mode != nir_var_shader_storage)
+ instr->variables[0]->var->data.mode != nir_var_shader_storage &&
+ instr->variables[0]->var->data.mode != nir_var_shared)
return; /* atomics passed as function arguments can't be lowered */
void *mem_ctx = ralloc_parent(instr);
diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c
index 231a4f5..644a214 100644
--- a/src/compiler/nir/nir_print.c
+++ b/src/compiler/nir/nir_print.c
@@ -312,7 +312,8 @@ print_var_decl(nir_variable *var, print_state *state)
const char *const patch = (var->data.patch) ? "patch " : "";
const char *const inv = (var->data.invariant) ? "invariant " : "";
const char *const mode[] = { "shader_in ", "shader_out ", "", "",
-"uniform ", "shader_storage ", "system " };
+"uniform ", "shader_storage ", "shared ",
+"system "};
fprintf(fp, "%s%s%s%s%s%s ",
cent, samp, patch, inv, mode[var->data.mode],
@@ -1069,6 +1070,10 @@ nir_print_shader(nir_shader *shader, FILE *fp)
print_var_decl(var, &state);
}
+ nir_foreach_variable(var, &shader->shared) {
+ print_var_decl(var, &state);
+ }
+
nir_foreach_variable(var, &shader->globals) {
print_var_decl(var, &state);
Mesa (master): i965/eu: set execution size for SEND message in brw_send_indirect_message
Module: Mesa Branch: master Commit: 31a86042522f4f836b503679be8a120e302fb68a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=31a86042522f4f836b503679be8a120e302fb68a Author: Iago Toral Quiroga Date: Thu Dec 3 11:10:12 2015 +0100 i965/eu: set execution size for SEND message in brw_send_indirect_message Reviewed-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_eu_emit.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index e8d80cc..6852459 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -2563,6 +2563,9 @@ brw_send_indirect_message(struct brw_codegen *p, brw_set_src1(p, send, addr); } + if (dst.width < BRW_EXECUTE_8) + brw_inst_set_exec_size(devinfo, send, dst.width); + brw_set_dest(p, send, dst); brw_set_src0(p, send, retype(payload, BRW_REGISTER_TYPE_UD)); brw_inst_set_sfid(devinfo, send, sfid); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): doc: add 'vec4' option in INTEL_DEBUG
Module: Mesa Branch: master Commit: 7a712e64d6d59c3543fd307f9e029ad0886be622 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7a712e64d6d59c3543fd307f9e029ad0886be622 Author: Juan A. Suarez Romero Date: Fri Mar 18 17:29:55 2016 +0100 doc: add 'vec4' option in INTEL_DEBUG Reviewed-by: Iago Toral Quiroga --- docs/envvars.html | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/envvars.html b/docs/envvars.html index 06aa0ac..e21b7c1 100644 --- a/docs/envvars.html +++ b/docs/envvars.html @@ -163,6 +163,7 @@ See the Xlib software driver page for details. blorp - emit messages about the blorp operations (blits & clears) nodualobj - suppress generation of dual-object geometry shader code optimizer - dump shader assembly to files at each optimization pass and iteration that make progress + vec4 - force vec4 mode in vertex shader ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nir: update opcode definitions for different bit sizes
Module: Mesa
Branch: master
Commit: 9076c4e289de0debf1fb2a7237bdeb9c11002347
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9076c4e289de0debf1fb2a7237bdeb9c11002347
Author: Connor Abbott
Date: Fri Aug 14 10:45:06 2015 -0700
nir: update opcode definitions for different bit sizes
Some opcodes need explicit bitsizes, and sometimes we need to use the
double version when constant folding.
v2: fix output type for u2f (Iago)
v3: do not change vecN opcodes to be float. The next commit will add
infrastructure to enable 64-bit integer constant folding so this is isn't
really necessary. Also, that created problems with source modifiers in
some cases (Iago)
v4 (Jason):
- do not change bcsel to work in terms of floats
- leave ldexp generic
Squashed changes to handle different bit sizes when constant
folding since otherwise we would break the build.
v2:
- Use the bit-size information from the opcode information if defined (Iago)
- Use helpers to get type size and base type of nir_alu_type enum (Sam)
- Do not fallback to sized types to guess bit-size information. (Jason)
Squashed changes in i965 and gallium/nir drivers to support sized types.
These functions should only see sized types, but we can't make that change
until we make sure that nir uses the sized versions in all the relevant places.
A later commit will address this.
Signed-off-by: Iago Toral Quiroga
Signed-off-by: Samuel Iglesias Gonsálvez
Reviewed-by: Jason Ekstrand
Reviewed-by: Samuel Iglesias Gonsálvez
Reviewed-by: Iago Toral Quiroga
---
src/compiler/nir/nir.h | 4 +
src/compiler/nir/nir_constant_expressions.h | 2 +-
src/compiler/nir/nir_constant_expressions.py | 246 +--
src/compiler/nir/nir_opcodes.py | 138 +++
src/compiler/nir/nir_opt_constant_folding.c | 29 +++-
src/gallium/drivers/vc4/vc4_program.c| 4 +-
src/mesa/drivers/dri/i965/brw_nir.c | 18 ++
7 files changed, 283 insertions(+), 158 deletions(-)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 6413f43..824f4e2 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -101,6 +101,7 @@ union nir_constant_data {
int i[16];
float f[16];
bool b[16];
+ double d[16];
};
typedef struct nir_constant {
@@ -1209,8 +1210,11 @@ nir_tex_instr_src_index(nir_tex_instr *instr,
nir_tex_src_type type)
typedef struct {
union {
float f[4];
+ double d[4];
int32_t i[4];
uint32_t u[4];
+ int64_t l[4];
+ uint64_t ul[4];
};
} nir_const_value;
diff --git a/src/compiler/nir/nir_constant_expressions.h
b/src/compiler/nir/nir_constant_expressions.h
index 97997f2..201f278 100644
--- a/src/compiler/nir/nir_constant_expressions.h
+++ b/src/compiler/nir/nir_constant_expressions.h
@@ -28,4 +28,4 @@
#include "nir.h"
nir_const_value nir_eval_const_opcode(nir_op op, unsigned num_components,
- nir_const_value *src);
+ unsigned bit_size, nir_const_value *src);
diff --git a/src/compiler/nir/nir_constant_expressions.py
b/src/compiler/nir/nir_constant_expressions.py
index 32784f6..972d281 100644
--- a/src/compiler/nir/nir_constant_expressions.py
+++ b/src/compiler/nir/nir_constant_expressions.py
@@ -1,4 +1,43 @@
#! /usr/bin/python2
+
+def type_has_size(type_):
+return type_[-1:].isdigit()
+
+def type_sizes(type_):
+if type_.endswith("8"):
+return [8]
+elif type_.endswith("16"):
+return [16]
+elif type_.endswith("32"):
+return [32]
+elif type_.endswith("64"):
+return [64]
+else:
+return [32, 64]
+
+def type_add_size(type_, size):
+if type_has_size(type_):
+return type_
+return type_ + str(size)
+
+def get_const_field(type_):
+if type_ == "int32":
+return "i"
+if type_ == "uint32":
+return "u"
+if type_ == "int64":
+return "l"
+if type_ == "uint64":
+return "ul"
+if type_ == "bool32":
+return "b"
+if type_ == "float32":
+return "f"
+if type_ == "float64":
+return "d"
+raise Exception(str(type_))
+assert(0)
+
template = """\
/*
* Copyright (C) 2014 Intel Corporation
@@ -205,110 +244,140 @@ unpack_half_1x16(uint16_t u)
}
/* Some typed vector structures to make things like src0.y work */
-% for type in ["float", "int", "uint", "bool"]:
-struct ${type}_vec {
- ${type} x;
- ${type} y;
- ${type} z;
- ${type} w;
+typedef float float32_t;
+typedef double float64_t;
+typedef bool bool32_t;
+% for type in ["float", "int", "uint"]:
+% for width in [32, 64]:
+struct ${type}${width}_vec {
+ ${type}${width}_t x;
+ ${type}${width}_t y;
+ ${type}${width}_t z;
+ ${type}${width}_t w;
};
% endfor
+% endfor
+
+struct bool32_vec {
+bool x;
+bool y;
+bool z;
+bool w;
+};
% for name, op in sorted(opcodes.iteritems()):
static nir_
Mesa (master): i965: Stop XY clipping point and line primitives.
Module: Mesa
Branch: master
Commit: 88d28aa4d9edec33ef7bcf1f56b77fbb756a24f8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=88d28aa4d9edec33ef7bcf1f56b77fbb756a24f8
Author: Kenneth Graunke
Date: Thu Mar 10 14:36:25 2016 -0800
i965: Stop XY clipping point and line primitives.
Wide points and lines are not supposed to be clipped by the viewport.
Rather, they should be rendered, and any fragments outside of the
viewport should be discarded.
The traditional use case for this behavior is rendering moving wide
point particles. When the center of the point approaches the viewport
edge, clipping would make it pop out of view early.
Fixes:
- dEQP-GLES2.functional.clipping.point.wide_point_clip
- dEQP-GLES3.functional.clipping.point.wide_point_clip
- dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_center
- dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_corner
- dEQP-GLES3.functional.clipping.line.wide_line_clip_viewport_center
- dEQP-GLES3.functional.clipping.line.wide_line_clip_viewport_corner
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94453
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94454
Signed-off-by: Kenneth Graunke
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/gen6_clip_state.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c
b/src/mesa/drivers/dri/i965/gen6_clip_state.c
index 9a29366..004eceb 100644
--- a/src/mesa/drivers/dri/i965/gen6_clip_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
@@ -174,12 +174,14 @@ upload_clip_state(struct brw_context *brw)
else
enable = GEN6_CLIP_ENABLE;
+ if (!is_drawing_points(brw) && !is_drawing_lines(brw))
+ dw2 |= GEN6_CLIP_XY_TEST;
+
BEGIN_BATCH(4);
OUT_BATCH(_3DSTATE_CLIP << 16 | (4 - 2));
OUT_BATCH(dw1);
OUT_BATCH(enable |
GEN6_CLIP_MODE_NORMAL |
-GEN6_CLIP_XY_TEST |
dw2);
OUT_BATCH(U_FIXED(0.125, 3) << GEN6_CLIP_MIN_POINT_WIDTH_SHIFT |
U_FIXED(255.875, 3) << GEN6_CLIP_MAX_POINT_WIDTH_SHIFT |
@@ -195,7 +197,9 @@ const struct brw_tracked_state gen6_clip_state = {
_NEW_TRANSFORM,
.brw = BRW_NEW_CONTEXT |
BRW_NEW_FS_PROG_DATA |
+ BRW_NEW_GEOMETRY_PROGRAM |
BRW_NEW_META_IN_PROGRESS |
+ BRW_NEW_PRIMITIVE |
BRW_NEW_RASTERIZER_DISCARD,
},
.emit = upload_clip_state,
@@ -209,7 +213,9 @@ const struct brw_tracked_state gen7_clip_state = {
_NEW_TRANSFORM,
.brw = BRW_NEW_CONTEXT |
BRW_NEW_FS_PROG_DATA |
+ BRW_NEW_GEOMETRY_PROGRAM |
BRW_NEW_META_IN_PROGRESS |
+ BRW_NEW_PRIMITIVE |
BRW_NEW_RASTERIZER_DISCARD,
},
.emit = upload_clip_state,
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Mesa (master): i965: Include the viewport in the scissor rectangle.
Module: Mesa
Branch: master
Commit: d000a4989f66921832a33742ea07fa191393231b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d000a4989f66921832a33742ea07fa191393231b
Author: Kenneth Graunke
Date: Thu Mar 10 16:04:01 2016 -0800
i965: Include the viewport in the scissor rectangle.
We'll need to use scissoring to restrict fragments to the viewport
soon. It seems harmless to include it generally, so let's do that.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94453
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94454
Signed-off-by: Kenneth Graunke
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/gen6_scissor_state.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_scissor_state.c
b/src/mesa/drivers/dri/i965/gen6_scissor_state.c
index 17b4a7f..a206732 100644
--- a/src/mesa/drivers/dri/i965/gen6_scissor_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_scissor_state.c
@@ -58,10 +58,10 @@ gen6_upload_scissor_state(struct brw_context *brw)
for (unsigned i = 0; i < ctx->Const.MaxViewports; i++) {
int bbox[4];
- bbox[0] = 0;
- bbox[1] = fb_width;
- bbox[2] = 0;
- bbox[3] = fb_height;
+ bbox[0] = MAX2(ctx->ViewportArray[i].X, 0);
+ bbox[1] = MIN2(bbox[0] + ctx->ViewportArray[i].Width, fb_width);
+ bbox[2] = MAX2(ctx->ViewportArray[i].Y, 0);
+ bbox[3] = MIN2(bbox[2] + ctx->ViewportArray[i].Height, fb_height);
_mesa_intersect_scissor_bounding_box(ctx, i, bbox);
if (bbox[0] == bbox[1] || bbox[2] == bbox[3]) {
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Mesa (master): mesa: Add color renderable/ texture filterable format info for ES 3.x.
Module: Mesa
Branch: master
Commit: f1b05735108c6733893dfbe762366f2676501c0d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1b05735108c6733893dfbe762366f2676501c0d
Author: Kenneth Graunke
Date: Tue Mar 15 00:30:05 2016 -0700
mesa: Add color renderable/texture filterable format info for ES 3.x.
OpenGL ES 3.x contains a table of sized internal formats and their
required properties. In particular, each format is marked as
"Color Renderable" or "Texture Filterable".
This patch introduces two functions that can be used to query the
information from that table.
Signed-off-by: Kenneth Graunke
Reviewed-by: Jordan Justen
---
src/mesa/main/glformats.c | 83 +++
src/mesa/main/glformats.h | 7
2 files changed, 90 insertions(+)
diff --git a/src/mesa/main/glformats.c b/src/mesa/main/glformats.c
index cf64958..96ab393 100644
--- a/src/mesa/main/glformats.c
+++ b/src/mesa/main/glformats.c
@@ -3556,3 +3556,86 @@ _mesa_format_from_format_and_type(GLenum format, GLenum
type)
*/
unreachable("Unsupported format");
}
+
+/**
+ * Returns true if \p internal_format is a sized internal format that
+ * is marked "Color Renderable" in Table 8.10 of the ES 3.2 specification.
+ */
+bool
+_mesa_is_es3_color_renderable(GLenum internal_format)
+{
+ switch (internal_format) {
+ case GL_R8:
+ case GL_RG8:
+ case GL_RGB8:
+ case GL_RGB565:
+ case GL_RGBA4:
+ case GL_RGB5_A1:
+ case GL_RGBA8:
+ case GL_RGB10_A2:
+ case GL_RGB10_A2UI:
+ case GL_SRGB8_ALPHA8:
+ case GL_R16F:
+ case GL_RG16F:
+ case GL_RGBA16F:
+ case GL_R32F:
+ case GL_RG32F:
+ case GL_RGBA32F:
+ case GL_R11F_G11F_B10F:
+ case GL_R8I:
+ case GL_R8UI:
+ case GL_R16I:
+ case GL_R16UI:
+ case GL_R32I:
+ case GL_R32UI:
+ case GL_RG8I:
+ case GL_RG8UI:
+ case GL_RG16I:
+ case GL_RG16UI:
+ case GL_RG32I:
+ case GL_RG32UI:
+ case GL_RGBA8I:
+ case GL_RGBA8UI:
+ case GL_RGBA16I:
+ case GL_RGBA16UI:
+ case GL_RGBA32I:
+ case GL_RGBA32UI:
+ return true;
+ default:
+ return false;
+ }
+}
+
+/**
+ * Returns true if \p internal_format is a sized internal format that
+ * is marked "Texture Filterable" in Table 8.10 of the ES 3.2 specification.
+ */
+bool
+_mesa_is_es3_texture_filterable(GLenum internal_format)
+{
+ switch (internal_format) {
+ case GL_R8:
+ case GL_R8_SNORM:
+ case GL_RG8:
+ case GL_RG8_SNORM:
+ case GL_RGB8:
+ case GL_RGB8_SNORM:
+ case GL_RGB565:
+ case GL_RGBA4:
+ case GL_RGB5_A1:
+ case GL_RGBA8:
+ case GL_RGBA8_SNORM:
+ case GL_RGB10_A2:
+ case GL_SRGB8:
+ case GL_SRGB8_ALPHA8:
+ case GL_R16F:
+ case GL_RG16F:
+ case GL_RGB16F:
+ case GL_RGBA16F:
+ case GL_R11F_G11F_B10F:
+ case GL_RGB9_E5:
+ return true;
+ default:
+ return false;
+ }
+}
diff --git a/src/mesa/main/glformats.h b/src/mesa/main/glformats.h
index 00d2767..c73f464 100644
--- a/src/mesa/main/glformats.h
+++ b/src/mesa/main/glformats.h
@@ -28,6 +28,7 @@
#define GLFORMATS_H
+#include
#include
@@ -144,6 +145,12 @@ _mesa_base_tex_format(const struct gl_context *ctx, GLint
internalFormat );
extern uint32_t
_mesa_format_from_format_and_type(GLenum format, GLenum type);
+extern bool
+_mesa_is_es3_color_renderable(GLenum internal_format);
+
+extern bool
+_mesa_is_es3_texture_filterable(GLenum internal_format);
+
#ifdef __cplusplus
}
#endif
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Mesa (master): i965: Move is_drawing_points to brw_state.h.
Module: Mesa
Branch: master
Commit: 757674e8d00772ce091e75df186e6c27821bd53d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=757674e8d00772ce091e75df186e6c27821bd53d
Author: Kenneth Graunke
Date: Thu Mar 10 15:46:34 2016 -0800
i965: Move is_drawing_points to brw_state.h.
I need to use this in multiple source files.
v2: Rebase on TES output domain fix.
Signed-off-by: Kenneth Graunke
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_state.h | 24
src/mesa/drivers/dri/i965/gen6_sf_state.c | 24
2 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index 6b85eac..79ee502 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -34,6 +34,7 @@
#define BRW_STATE_H
#include "brw_context.h"
+#include "brw_defines.h"
#ifdef __cplusplus
extern "C" {
@@ -406,6 +407,29 @@ void gen7_reset_hw_bt_pool_offsets(struct brw_context
*brw);
void
gen7_restore_default_l3_config(struct brw_context *brw);
+static inline bool
+is_drawing_points(const struct brw_context *brw)
+{
+ /* Determine if the primitives *reaching the SF* are points */
+ /* _NEW_POLYGON */
+ if (brw->ctx.Polygon.FrontMode == GL_POINT ||
+ brw->ctx.Polygon.BackMode == GL_POINT) {
+ return true;
+ }
+
+ if (brw->geometry_program) {
+ /* BRW_NEW_GEOMETRY_PROGRAM */
+ return brw->geometry_program->OutputType == GL_POINTS;
+ } else if (brw->tes.prog_data) {
+ /* BRW_NEW_TES_PROG_DATA */
+ return brw->tes.prog_data->output_topology ==
+ BRW_TESS_OUTPUT_TOPOLOGY_POINT;
+ } else {
+ /* BRW_NEW_PRIMITIVE */
+ return brw->primitive == _3DPRIM_POINTLIST;
+ }
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c
b/src/mesa/drivers/dri/i965/gen6_sf_state.c
index 7de2e8e..3a337e8 100644
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
@@ -147,30 +147,6 @@ get_attr_override(const struct brw_vue_map *vue_map, int
urb_entry_read_offset,
}
-static bool
-is_drawing_points(const struct brw_context *brw)
-{
- /* Determine if the primitives *reaching the SF* are points */
- /* _NEW_POLYGON */
- if (brw->ctx.Polygon.FrontMode == GL_POINT ||
- brw->ctx.Polygon.BackMode == GL_POINT) {
- return true;
- }
-
- if (brw->geometry_program) {
- /* BRW_NEW_GEOMETRY_PROGRAM */
- return brw->geometry_program->OutputType == GL_POINTS;
- } else if (brw->tes.prog_data) {
- /* BRW_NEW_TES_PROG_DATA */
- return brw->tes.prog_data->output_topology ==
- BRW_TESS_OUTPUT_TOPOLOGY_POINT;
- } else {
- /* BRW_NEW_PRIMITIVE */
- return brw->primitive == _3DPRIM_POINTLIST;
- }
-}
-
-
/**
* Create the mapping from the FS inputs we produce to the previous pipeline
* stage (GS or VS) outputs they source from.
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Mesa (master): i965: Introduce an is_drawing_lines() helper.
Module: Mesa
Branch: master
Commit: 47be5a64c786e04578bebe21601b3c0821be75a0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=47be5a64c786e04578bebe21601b3c0821be75a0
Author: Kenneth Graunke
Date: Thu Mar 10 15:51:56 2016 -0800
i965: Introduce an is_drawing_lines() helper.
Similar to is_drawing_points().
v2: Account for isoline tessellation output topology.
Signed-off-by: Kenneth Graunke
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_state.h | 30 ++
1 file changed, 30 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index 79ee502..783af78 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -430,6 +430,36 @@ is_drawing_points(const struct brw_context *brw)
}
}
+static inline bool
+is_drawing_lines(const struct brw_context *brw)
+{
+ /* Determine if the primitives *reaching the SF* are points */
+ /* _NEW_POLYGON */
+ if (brw->ctx.Polygon.FrontMode == GL_LINE ||
+ brw->ctx.Polygon.BackMode == GL_LINE) {
+ return true;
+ }
+
+ if (brw->geometry_program) {
+ /* BRW_NEW_GEOMETRY_PROGRAM */
+ return brw->geometry_program->OutputType == GL_LINE_STRIP;
+ } else if (brw->tes.prog_data) {
+ /* BRW_NEW_TES_PROG_DATA */
+ return brw->tes.prog_data->output_topology ==
+ BRW_TESS_OUTPUT_TOPOLOGY_LINE;
+ } else {
+ /* BRW_NEW_PRIMITIVE */
+ switch (brw->primitive) {
+ case _3DPRIM_LINELIST:
+ case _3DPRIM_LINESTRIP:
+ case _3DPRIM_LINELOOP:
+ return true;
+ }
+ }
+ return false;
+}
+
+
#ifdef __cplusplus
}
#endif
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Mesa (master): i965: Scissor to the viewport when rendering points/lines.
Module: Mesa
Branch: master
Commit: 0de64ab7881cc4d343fecf8a2b5b9b9ca7b34416
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0de64ab7881cc4d343fecf8a2b5b9b9ca7b34416
Author: Kenneth Graunke
Date: Thu Mar 10 15:30:36 2016 -0800
i965: Scissor to the viewport when rendering points/lines.
We're about to start allowing wide points/lines whose vertices are
outside the viewport past the clipper. This scissoring hack ensures
that any fragments generated are still restricted to the viewport.
It is not necessary on Gen8+ as those platforms already discard
fragments which are outside the viewport.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94453
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94454
Signed-off-by: Kenneth Graunke
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/gen6_sf_state.c | 5 +++--
src/mesa/drivers/dri/i965/gen7_sf_state.c | 8 +---
2 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c
b/src/mesa/drivers/dri/i965/gen6_sf_state.c
index 3a337e8..42f9a5c 100644
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
@@ -351,8 +351,9 @@ upload_sf_state(struct brw_context *brw)
unreachable("not reached");
}
- /* _NEW_SCISSOR */
- if (ctx->Scissor.EnableFlags)
+ /* _NEW_SCISSOR _NEW_POLYGON BRW_NEW_GEOMETRY_PROGRAM BRW_NEW_PRIMITIVE */
+ if (ctx->Scissor.EnableFlags ||
+ is_drawing_points(brw) || is_drawing_lines(brw))
dw3 |= GEN6_SF_SCISSOR_ENABLE;
/* _NEW_POLYGON */
diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c
b/src/mesa/drivers/dri/i965/gen7_sf_state.c
index b1f13ac..7c98c73 100644
--- a/src/mesa/drivers/dri/i965/gen7_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c
@@ -188,8 +188,9 @@ upload_sf_state(struct brw_context *brw)
dw2 |= GEN6_SF_CULL_NONE;
}
- /* _NEW_SCISSOR */
- if (ctx->Scissor.EnableFlags)
+ /* _NEW_SCISSOR _NEW_POLYGON BRW_NEW_GEOMETRY_PROGRAM BRW_NEW_PRIMITIVE */
+ if (ctx->Scissor.EnableFlags ||
+ is_drawing_points(brw) || is_drawing_lines(brw))
dw2 |= GEN6_SF_SCISSOR_ENABLE;
/* _NEW_LINE */
@@ -254,7 +255,8 @@ const struct brw_tracked_state gen7_sf_state = {
_NEW_POLYGON |
_NEW_PROGRAM |
_NEW_SCISSOR,
- .brw = BRW_NEW_CONTEXT,
+ .brw = BRW_NEW_CONTEXT |
+ BRW_NEW_PRIMITIVE,
},
.emit = upload_sf_state,
};
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Mesa (master): mesa: Do proper format error checks for GenerateMipmap in ES 3.x.
Module: Mesa
Branch: master
Commit: 46610238e0a8db47c293f75ad8d667747d6256af
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=46610238e0a8db47c293f75ad8d667747d6256af
Author: Kenneth Graunke
Date: Tue Mar 15 00:41:16 2016 -0700
mesa: Do proper format error checks for GenerateMipmap in ES 3.x.
According to the OpenGL ES 3.2 spec's description of GenerateMipmap:
"An INVALID_OPERATION error is generated if the levelbase array was not
specified with an unsized internal format from table 8.3 or a sized
internal format that is both color-renderable and texture-filterable
according to table 8.10."
Similar text exists in the ES 3.0 specification as well.
Our existing rules are pretty close, but miss a few things. The
OpenGL specification actually doesn't have any text about internal
format checking - our existing code comes from a Khronos bug report.
The ES 3.x spec provides a clearer description.
Fixes dEQP-GLES3.functional.negative_api.texture.generatemipmap and
dEQP-GLES2.functional.negative_api.texture.generatemipmap_zero_level
_array_compressed.
Signed-off-by: Kenneth Graunke
Reviewed-by: Jordan Justen
---
src/mesa/main/genmipmap.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/src/mesa/main/genmipmap.c b/src/mesa/main/genmipmap.c
index 6eacd42..1a6ae9a 100644
--- a/src/mesa/main/genmipmap.c
+++ b/src/mesa/main/genmipmap.c
@@ -79,6 +79,20 @@ bool
_mesa_is_valid_generate_texture_mipmap_internalformat(struct gl_context *ctx,
GLenum internalformat)
{
+ if (_mesa_is_gles3(ctx)) {
+ /* From the ES 3.2 specification's description of GenerateMipmap():
+ * "An INVALID_OPERATION error is generated if the levelbase array was
+ * not specified with an unsized internal format from table 8.3 or a
+ * sized internal format that is both color-renderable and
+ * texture-filterable according to table 8.10."
+ */
+ return internalformat == GL_RGBA || internalformat == GL_RGB ||
+ internalformat == GL_LUMINANCE_ALPHA ||
+ internalformat == GL_LUMINANCE || internalformat == GL_ALPHA ||
+ (_mesa_is_es3_color_renderable(internalformat) &&
+ _mesa_is_es3_texture_filterable(internalformat));
+ }
+
return (!_mesa_is_enum_format_integer(internalformat) &&
!_mesa_is_depthstencil_format(internalformat) &&
!_mesa_is_astc_format(internalformat) &&
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Mesa (master): nv50,nvc0: Fix invalid constant.
Module: Mesa
Branch: master
Commit: a100d89d09981d2ebb42a7e4643a48e78db8dfe3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a100d89d09981d2ebb42a7e4643a48e78db8dfe3
Author: Vinson Lee
Date: Fri Mar 18 18:28:28 2016 -0700
nv50,nvc0: Fix invalid constant.
Fix clang build error.
CXX codegen/nv50_ir_lowering_nvc0.lo
codegen/nv50_ir_lowering_nvc0.cpp:1783:42: error: invalid suffix 'd' on
floating constant
Value *zero = bld.loadImm(NULL, 0.0d);
^
Fixes: c1e4a6bfbf01 ("nv50,nvc0: handle SQRT lowering inside the driver")
Signed-off-by: Vinson Lee
Reviewed-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index d0936d8..01364b3 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -1780,7 +1780,7 @@ NVC0LoweringPass::handleSQRT(Instruction *i)
{
if (i->dType == TYPE_F64) {
Value *pred = bld.getSSA(1, FILE_PREDICATE);
- Value *zero = bld.loadImm(NULL, 0.0d);
+ Value *zero = bld.loadImm(NULL, 0);
Value *dst = bld.getSSA(8);
bld.mkOp1(OP_RSQ, i->dType, dst, i->getSrc(0));
bld.mkCmp(OP_SET, CC_LE, i->dType, pred, i->dType, i->getSrc(0), zero);
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Mesa (master): radeonsi: fix Hyper-Z hangs on P2 configs
Module: Mesa
Branch: master
Commit: 4ab2ac334921ae9bbd1791adaf8977fccf744580
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ab2ac334921ae9bbd1791adaf8977fccf744580
Author: Marek Olšák
Date: Tue Mar 15 21:49:54 2016 +0100
radeonsi: fix Hyper-Z hangs on P2 configs
Cc: 11.1 11.2
Reviewed-by: Nicolai Hähnle
---
src/gallium/drivers/radeon/r600_texture.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index 1ad7076..c573b43 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -638,8 +638,14 @@ static unsigned r600_texture_get_htile_size(struct
r600_common_screen *rscreen,
rscreen->info.drm_major == 2 && rscreen->info.drm_minor < 38)
return 0;
- /* Overalign HTILE on Stoney to fix
piglit/depthstencil-render-miplevels 585. */
- if (rscreen->family == CHIP_STONEY)
+ /* Overalign HTILE on P2 configs to work around GPU hangs in
+* piglit/depthstencil-render-miplevels 585.
+*
+* This has been confirmed to help Kabini & Stoney, where the hangs
+* are always reproducible. I think I have seen the test hang
+* on Carrizo too, though it was very rare there.
+*/
+ if (rscreen->chip_class >= CIK && num_pipes < 4)
num_pipes = 4;
switch (num_pipes) {
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Mesa (master): radeon/winsys: add offset support for BO import/export
Module: Mesa
Branch: master
Commit: 04bc082f6a8bfc3b3774bb102d3200317609432e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=04bc082f6a8bfc3b3774bb102d3200317609432e
Author: Christian König
Date: Tue Jan 12 15:59:11 2016 +0100
radeon/winsys: add offset support for BO import/export
Add offset support to handle NV12 offsets as well.
Signed-off-by: Christian König
Reviewed-by: Marek Olšák
---
src/gallium/drivers/r300/r300_texture.c | 6 +++---
src/gallium/drivers/radeon/r600_texture.c | 23 ---
src/gallium/drivers/radeon/radeon_winsys.h| 4 ++--
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 9 ++---
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 9 ++---
5 files changed, 33 insertions(+), 18 deletions(-)
diff --git a/src/gallium/drivers/r300/r300_texture.c
b/src/gallium/drivers/r300/r300_texture.c
index 57456c6..22a613f 100644
--- a/src/gallium/drivers/r300/r300_texture.c
+++ b/src/gallium/drivers/r300/r300_texture.c
@@ -981,8 +981,8 @@ boolean r300_resource_get_handle(struct pipe_screen* screen,
return FALSE;
}
-return rws->buffer_get_handle(tex->buf,
- tex->tex.stride_in_bytes[0], whandle);
+return rws->buffer_get_handle(tex->buf, tex->tex.stride_in_bytes[0],
+ 0, whandle);
}
static const struct u_resource_vtbl r300_texture_vtbl =
@@ -1116,7 +1116,7 @@ struct pipe_resource *r300_texture_from_handle(struct
pipe_screen *screen,
return NULL;
}
-buffer = rws->buffer_from_handle(rws, whandle, &stride);
+buffer = rws->buffer_from_handle(rws, whandle, &stride, NULL);
if (!buffer)
return NULL;
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index 115c728..15818aa 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -201,9 +201,11 @@ static int r600_init_surface(struct r600_common_screen
*rscreen,
static int r600_setup_surface(struct pipe_screen *screen,
struct r600_texture *rtex,
- unsigned pitch_in_bytes_override)
+ unsigned pitch_in_bytes_override,
+ unsigned offset)
{
struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
+ unsigned i;
int r;
r = rscreen->ws->surface_init(rscreen->ws, &rtex->surface);
@@ -225,6 +227,11 @@ static int r600_setup_surface(struct pipe_screen *screen,
rtex->surface.stencil_level[0].offset =
rtex->surface.level[0].slice_size;
}
}
+
+ if (offset) {
+ for (i = 0; i < Elements(rtex->surface.level); ++i)
+ rtex->surface.level[i].offset += offset;
+ }
return 0;
}
@@ -366,6 +373,7 @@ static boolean r600_texture_get_handle(struct pipe_screen*
screen,
return rscreen->ws->buffer_get_handle(res->buf,
rtex->surface.level[0].pitch_bytes,
+ rtex->surface.level[0].offset,
whandle);
}
@@ -791,6 +799,7 @@ static struct r600_texture *
r600_texture_create_object(struct pipe_screen *screen,
const struct pipe_resource *base,
unsigned pitch_in_bytes_override,
+ unsigned offset,
struct pb_buffer *buf,
struct radeon_surf *surface)
{
@@ -812,7 +821,7 @@ r600_texture_create_object(struct pipe_screen *screen,
rtex->is_depth =
util_format_has_depth(util_format_description(rtex->resource.b.b.format));
rtex->surface = *surface;
- if (r600_setup_surface(screen, rtex, pitch_in_bytes_override)) {
+ if (r600_setup_surface(screen, rtex, pitch_in_bytes_override, offset)) {
FREE(rtex);
return NULL;
}
@@ -979,7 +988,7 @@ struct pipe_resource *r600_texture_create(struct
pipe_screen *screen,
if (r) {
return NULL;
}
- return (struct pipe_resource *)r600_texture_create_object(screen, templ,
+ return (struct pipe_resource *)r600_texture_create_object(screen,
templ, 0,
0, NULL,
&surface);
}
@@ -990,7 +999,7 @@ static struct pipe_resource
*r600_texture_from_handle(struct pipe_screen *screen
{
struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
struct pb_buffer *buf = NULL;
- unsigned stride = 0;
+ unsigned stride = 0, offset = 0;
unsigned array_mode;
struct radeon_surf surface;
int r;
@@ -1002,7 +1011,7 @@ static struct pipe_resource
*r600_texture_from_handle(struct pipe_screen *screen
templ->depth
Mesa (master): tgsi: add tgsi_transform_op3_inst() function
Module: Mesa
Branch: master
Commit: e9d5e68d1b3f2ce21486a17799e2345bb54116f6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9d5e68d1b3f2ce21486a17799e2345bb54116f6
Author: Brian Paul
Date: Wed Mar 16 15:47:41 2016 -0600
tgsi: add tgsi_transform_op3_inst() function
Reviewed-by: Charmaine Lee
---
src/gallium/auxiliary/tgsi/tgsi_transform.h | 34 +
1 file changed, 34 insertions(+)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_transform.h
b/src/gallium/auxiliary/tgsi/tgsi_transform.h
index 27e6179..4dd7dda 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_transform.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_transform.h
@@ -302,6 +302,40 @@ tgsi_transform_op2_inst(struct tgsi_transform_context *ctx,
static inline void
+tgsi_transform_op3_inst(struct tgsi_transform_context *ctx,
+unsigned opcode,
+unsigned dst_file,
+unsigned dst_index,
+unsigned dst_writemask,
+unsigned src0_file,
+unsigned src0_index,
+unsigned src1_file,
+unsigned src1_index,
+unsigned src2_file,
+unsigned src2_index)
+{
+ struct tgsi_full_instruction inst;
+
+ inst = tgsi_default_full_instruction();
+ inst.Instruction.Opcode = opcode;
+ inst.Instruction.NumDstRegs = 1;
+ inst.Dst[0].Register.File = dst_file,
+ inst.Dst[0].Register.Index = dst_index;
+ inst.Dst[0].Register.WriteMask = dst_writemask;
+ inst.Instruction.NumSrcRegs = 3;
+ inst.Src[0].Register.File = src0_file;
+ inst.Src[0].Register.Index = src0_index;
+ inst.Src[1].Register.File = src1_file;
+ inst.Src[1].Register.Index = src1_index;
+ inst.Src[2].Register.File = src2_file;
+ inst.Src[2].Register.Index = src2_index;
+
+ ctx->emit_instruction(ctx, &inst);
+}
+
+
+
+static inline void
tgsi_transform_op1_swz_inst(struct tgsi_transform_context *ctx,
unsigned opcode,
unsigned dst_file,
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Mesa (master): nv50: Mark compute states as dirty on context switch
Module: Mesa Branch: master Commit: 1282146d4e41eb3b73678a71389706f16c245979 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1282146d4e41eb3b73678a71389706f16c245979 Author: Pierre Moreau Date: Sun Mar 13 22:11:42 2016 +0100 nv50: Mark compute states as dirty on context switch Signed-off-by: Pierre Moreau [ Samuel Pitoiset: Trivial rebase conflict ] Reviewed-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nv50/nv50_state_validate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c index e7631bb..5120493 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c @@ -437,6 +437,7 @@ nv50_switch_pipe_context(struct nv50_context *ctx_to) ctx_to->state = ctx_to->screen->save_state; ctx_to->dirty_3d = ~0; + ctx_to->dirty_cp = ~0; ctx_to->viewports_dirty = ~0; ctx_to->scissors_dirty = ~0; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
