Mesa (master): gallium/util: fix some 4-space indentation in blitter code
Module: Mesa
Branch: master
Commit: e0dc3c5f19f6bc98361f923e9093baac69285403
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0dc3c5f19f6bc98361f923e9093baac69285403
Author: Brian Paul
Date: Mon Jun 20 13:00:28 2016 -0600
gallium/util: fix some 4-space indentation in blitter code
Reviewed-by: Marek Olšák
Reviewed-by: Charmaine Lee
---
src/gallium/auxiliary/util/u_blitter.c | 42 +-
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_blitter.c
b/src/gallium/auxiliary/util/u_blitter.c
index 1257bb6..d06b3a8 100644
--- a/src/gallium/auxiliary/util/u_blitter.c
+++ b/src/gallium/auxiliary/util/u_blitter.c
@@ -1332,9 +1332,9 @@ void util_blitter_custom_clear_depth(struct
blitter_context *blitter,
unsigned width, unsigned height,
double depth, void *custom_dsa)
{
-static const union pipe_color_union color;
-util_blitter_clear_custom(blitter, width, height, 0, 0, &color, depth, 0,
- NULL, custom_dsa);
+ static const union pipe_color_union color;
+ util_blitter_clear_custom(blitter, width, height, 0, 0, &color, depth, 0,
+ NULL, custom_dsa);
}
void util_blitter_default_dst_texture(struct pipe_surface *dst_templ,
@@ -1342,11 +1342,11 @@ void util_blitter_default_dst_texture(struct
pipe_surface *dst_templ,
unsigned dstlevel,
unsigned dstz)
{
-memset(dst_templ, 0, sizeof(*dst_templ));
-dst_templ->format = util_format_linear(dst->format);
-dst_templ->u.tex.level = dstlevel;
-dst_templ->u.tex.first_layer = dstz;
-dst_templ->u.tex.last_layer = dstz;
+ memset(dst_templ, 0, sizeof(*dst_templ));
+ dst_templ->format = util_format_linear(dst->format);
+ dst_templ->u.tex.level = dstlevel;
+ dst_templ->u.tex.first_layer = dstz;
+ dst_templ->u.tex.last_layer = dstz;
}
static struct pipe_surface *
@@ -1368,19 +1368,19 @@ void util_blitter_default_src_texture(struct
pipe_sampler_view *src_templ,
struct pipe_resource *src,
unsigned srclevel)
{
-memset(src_templ, 0, sizeof(*src_templ));
-src_templ->target = src->target;
-src_templ->format = util_format_linear(src->format);
-src_templ->u.tex.first_level = srclevel;
-src_templ->u.tex.last_level = srclevel;
-src_templ->u.tex.first_layer = 0;
-src_templ->u.tex.last_layer =
-src->target == PIPE_TEXTURE_3D ? u_minify(src->depth0, srclevel) - 1
- : src->array_size - 1;
-src_templ->swizzle_r = PIPE_SWIZZLE_X;
-src_templ->swizzle_g = PIPE_SWIZZLE_Y;
-src_templ->swizzle_b = PIPE_SWIZZLE_Z;
-src_templ->swizzle_a = PIPE_SWIZZLE_W;
+ memset(src_templ, 0, sizeof(*src_templ));
+ src_templ->target = src->target;
+ src_templ->format = util_format_linear(src->format);
+ src_templ->u.tex.first_level = srclevel;
+ src_templ->u.tex.last_level = srclevel;
+ src_templ->u.tex.first_layer = 0;
+ src_templ->u.tex.last_layer =
+ src->target == PIPE_TEXTURE_3D ? u_minify(src->depth0, srclevel) - 1
+ : src->array_size - 1;
+ src_templ->swizzle_r = PIPE_SWIZZLE_X;
+ src_templ->swizzle_g = PIPE_SWIZZLE_Y;
+ src_templ->swizzle_b = PIPE_SWIZZLE_Z;
+ src_templ->swizzle_a = PIPE_SWIZZLE_W;
}
static boolean is_blit_generic_supported(struct blitter_context *blitter,
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Mesa (master): svga: fix index/vertex buffer surface reference at draw
Module: Mesa
Branch: master
Commit: d4a77254cb491c8e4a90ecefb0c9ae430bb0278a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4a77254cb491c8e4a90ecefb0c9ae430bb0278a
Author: Charmaine Lee
Date: Mon May 16 15:12:57 2016 -0700
svga: fix index/vertex buffer surface reference at draw
Currently with the SetVertexBuffers optimization, we avoid emitting
redundant DXSetVertexBuffers commands. However, these buffers surfaces
will still need to be referenced, otherwise, in the case of linux,
the subsequent surface discard map will map to the existing mob instead
of a new one, causing rendering artifacts.
With this patch, we'll call resource_rebind() to reference the resources
even if we are avoiding the actual set command. This fixes the
rendering artifacts in the window title area running with unity in
Ubuntu 14.04
Tested with piglit, glretrace.
Reviewed-by: Brian Paul
Reviewed-by: Sinclair Yeh
---
src/gallium/drivers/svga/svga_draw.c | 20
1 file changed, 20 insertions(+)
diff --git a/src/gallium/drivers/svga/svga_draw.c
b/src/gallium/drivers/svga/svga_draw.c
index 872dd7f..600df89 100644
--- a/src/gallium/drivers/svga/svga_draw.c
+++ b/src/gallium/drivers/svga/svga_draw.c
@@ -577,6 +577,17 @@ draw_vgpu10(struct svga_hwtnl *hwtnl,
}
}
}
+ else {
+ /* Even though we can avoid emitting the redundant SetVertexBuffers
+ * command, we still need to reference the vertex buffers surfaces.
+ */
+ for (i = 0; i < vbuf_count; i++) {
+ret = svga->swc->resource_rebind(svga->swc, vbuffer_handles[i],
+ NULL, SVGA_RELOC_READ);
+if (ret != PIPE_OK)
+ return ret;
+ }
+ }
}
/* Set primitive type (line, tri, etc) */
@@ -609,6 +620,15 @@ draw_vgpu10(struct svga_hwtnl *hwtnl,
svga->state.hw_draw.ib_format = indexFormat;
svga->state.hw_draw.ib_offset = range->indexArray.offset;
}
+ else {
+ /* Even though we can avoid emitting the redundant SetIndexBuffer
+ * command, we still need to reference the index buffer surface.
+ */
+ ret = svga->swc->resource_rebind(svga->swc, ib_handle,
+ NULL, SVGA_RELOC_READ);
+ if (ret != PIPE_OK)
+return ret;
+ }
if (instance_count > 1) {
ret = SVGA3D_vgpu10_DrawIndexedInstanced(svga->swc,
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Mesa (master): svga: fix index buffer reference in the hw state
Module: Mesa
Branch: master
Commit: a1d74f5528f4bab6679fc08b1a25055336c85089
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a1d74f5528f4bab6679fc08b1a25055336c85089
Author: Charmaine Lee
Date: Mon May 2 18:12:24 2016 -0700
svga: fix index buffer reference in the hw state
Instead of copy the index buffer resource handle to the hw state in
the context structure, use pipe_resource_reference to properly reference
the index buffer resource in the context.
Reviewed-by: Brian Paul
---
src/gallium/drivers/svga/svga_context.h | 2 +-
src/gallium/drivers/svga/svga_draw.c| 18 +-
src/gallium/drivers/svga/svga_pipe_vertex.c | 2 ++
3 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_context.h
b/src/gallium/drivers/svga/svga_context.h
index 007d5bc..01f290e 100644
--- a/src/gallium/drivers/svga/svga_context.h
+++ b/src/gallium/drivers/svga/svga_context.h
@@ -361,7 +361,7 @@ struct svga_hw_draw_state
struct svga_winsys_surface *vbuffer_handles[PIPE_MAX_ATTRIBS];
unsigned num_vbuffers;
- struct svga_winsys_surface *ib; /**< index buffer for drawing */
+ struct pipe_resource *ib; /**< index buffer for drawing */
SVGA3dSurfaceFormat ib_format;
unsigned ib_offset;
diff --git a/src/gallium/drivers/svga/svga_draw.c
b/src/gallium/drivers/svga/svga_draw.c
index f314d55..b6de7af 100644
--- a/src/gallium/drivers/svga/svga_draw.c
+++ b/src/gallium/drivers/svga/svga_draw.c
@@ -441,6 +441,7 @@ draw_vgpu10(struct svga_hwtnl *hwtnl,
const unsigned vbuf_count = hwtnl->cmd.vbuf_count;
enum pipe_error ret;
unsigned i;
+ boolean rebind_ib = FALSE;
assert(svga_have_vgpu10(svga));
assert(hwtnl->cmd.prim_count == 0);
@@ -465,7 +466,7 @@ draw_vgpu10(struct svga_hwtnl *hwtnl,
return ret;
/* Force rebinding the index buffer when needed */
- svga->state.hw_draw.ib = NULL;
+ rebind_ib = TRUE;
}
ret = validate_sampler_resources(svga);
@@ -563,15 +564,19 @@ draw_vgpu10(struct svga_hwtnl *hwtnl,
SVGA3dSurfaceFormat indexFormat = xlate_index_format(range->indexWidth);
/* setup index buffer */
- if (ib_handle != svga->state.hw_draw.ib ||
+ if (rebind_ib ||
+ ib != svga->state.hw_draw.ib ||
indexFormat != svga->state.hw_draw.ib_format ||
range->indexArray.offset != svga->state.hw_draw.ib_offset) {
+
+ assert(indexFormat != SVGA3D_FORMAT_INVALID);
ret = SVGA3D_vgpu10_SetIndexBuffer(svga->swc, ib_handle,
indexFormat,
range->indexArray.offset);
if (ret != PIPE_OK)
return ret;
- svga->state.hw_draw.ib = ib_handle;
+
+ pipe_resource_reference(&svga->state.hw_draw.ib, ib);
svga->state.hw_draw.ib_format = indexFormat;
svga->state.hw_draw.ib_offset = range->indexArray.offset;
}
@@ -598,16 +603,19 @@ draw_vgpu10(struct svga_hwtnl *hwtnl,
}
else {
/* non-indexed drawing */
- if (svga->state.hw_draw.ib_format != SVGA3D_FORMAT_INVALID) {
+ if (svga->state.hw_draw.ib_format != SVGA3D_FORMAT_INVALID ||
+ svga->state.hw_draw.ib != NULL) {
/* Unbind previously bound index buffer */
ret = SVGA3D_vgpu10_SetIndexBuffer(svga->swc, NULL,
SVGA3D_FORMAT_INVALID, 0);
if (ret != PIPE_OK)
return ret;
svga->state.hw_draw.ib_format = SVGA3D_FORMAT_INVALID;
- svga->state.hw_draw.ib = NULL;
+ pipe_resource_reference(&svga->state.hw_draw.ib, NULL);
}
+ assert(svga->state.hw_draw.ib == NULL);
+
if (instance_count > 1) {
ret = SVGA3D_vgpu10_DrawInstanced(svga->swc,
vcount,
diff --git a/src/gallium/drivers/svga/svga_pipe_vertex.c
b/src/gallium/drivers/svga/svga_pipe_vertex.c
index 99757e4..4692f76 100644
--- a/src/gallium/drivers/svga/svga_pipe_vertex.c
+++ b/src/gallium/drivers/svga/svga_pipe_vertex.c
@@ -327,6 +327,8 @@ void svga_cleanup_vertex_state( struct svga_context *svga )
for (i = 0 ; i < svga->curr.num_vertex_buffers; i++)
pipe_resource_reference(&svga->curr.vb[i].buffer, NULL);
+
+ pipe_resource_reference(&svga->state.hw_draw.ib, NULL);
}
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Mesa (master): svga: rename svga_surface_copy() to svga_resource_copy_region()
Module: Mesa
Branch: master
Commit: 4f5d513755be8608eb0a01973eec16f28c6b4b40
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f5d513755be8608eb0a01973eec16f28c6b4b40
Author: Brian Paul
Date: Mon Jun 20 12:41:23 2016 -0600
svga: rename svga_surface_copy() to svga_resource_copy_region()
To be consistent with the pipe_context function name.
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_pipe_blit.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_pipe_blit.c
b/src/gallium/drivers/svga/svga_pipe_blit.c
index 8050b13..4eec927 100644
--- a/src/gallium/drivers/svga/svga_pipe_blit.c
+++ b/src/gallium/drivers/svga/svga_pipe_blit.c
@@ -37,14 +37,14 @@
static void
-svga_surface_copy(struct pipe_context *pipe,
- struct pipe_resource* dst_tex,
- unsigned dst_level,
- unsigned dstx, unsigned dsty, unsigned dstz,
- struct pipe_resource* src_tex,
- unsigned src_level,
- const struct pipe_box *src_box)
- {
+svga_resource_copy_region(struct pipe_context *pipe,
+ struct pipe_resource* dst_tex,
+ unsigned dst_level,
+ unsigned dstx, unsigned dsty, unsigned dstz,
+ struct pipe_resource* src_tex,
+ unsigned src_level,
+ const struct pipe_box *src_box)
+{
struct svga_context *svga = svga_context(pipe);
struct svga_texture *stex, *dtex;
unsigned dst_face_layer, dst_z, src_face_layer, src_z;
@@ -167,7 +167,7 @@ svga_flush_resource(struct pipe_context *pipe,
void
svga_init_blit_functions(struct svga_context *svga)
{
- svga->pipe.resource_copy_region = svga_surface_copy;
+ svga->pipe.resource_copy_region = svga_resource_copy_region;
svga->pipe.blit = svga_blit;
svga->pipe.flush_resource = svga_flush_resource;
}
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Mesa (master): svga: don't copy blit_info into local var
Module: Mesa
Branch: master
Commit: 743ff588f27dc3c4a69c63da2a76c69631704ebf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=743ff588f27dc3c4a69c63da2a76c69631704ebf
Author: Brian Paul
Date: Mon Jun 20 12:39:55 2016 -0600
svga: don't copy blit_info into local var
There's no reason for doing so.
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_pipe_blit.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_pipe_blit.c
b/src/gallium/drivers/svga/svga_pipe_blit.c
index 526018a..8050b13 100644
--- a/src/gallium/drivers/svga/svga_pipe_blit.c
+++ b/src/gallium/drivers/svga/svga_pipe_blit.c
@@ -105,26 +105,25 @@ svga_blit(struct pipe_context *pipe,
const struct pipe_blit_info *blit_info)
{
struct svga_context *svga = svga_context(pipe);
- struct pipe_blit_info info = *blit_info;
if (!svga_have_vgpu10(svga) &&
- info.src.resource->nr_samples > 1 &&
- info.dst.resource->nr_samples <= 1 &&
- !util_format_is_depth_or_stencil(info.src.resource->format) &&
- !util_format_is_pure_integer(info.src.resource->format)) {
+ blit_info->src.resource->nr_samples > 1 &&
+ blit_info->dst.resource->nr_samples <= 1 &&
+ !util_format_is_depth_or_stencil(blit_info->src.resource->format) &&
+ !util_format_is_pure_integer(blit_info->src.resource->format)) {
debug_printf("svga: color resolve unimplemented\n");
return;
}
- if (util_try_blit_via_copy_region(pipe, &info)) {
+ if (util_try_blit_via_copy_region(pipe, blit_info)) {
return; /* done */
}
- if ((info.mask & PIPE_MASK_S) ||
- !util_blitter_is_blit_supported(svga->blitter, &info)) {
+ if ((blit_info->mask & PIPE_MASK_S) ||
+ !util_blitter_is_blit_supported(svga->blitter, blit_info)) {
debug_printf("svga: blit unsupported %s -> %s\n",
- util_format_short_name(info.src.resource->format),
- util_format_short_name(info.dst.resource->format));
+ util_format_short_name(blit_info->src.resource->format),
+ util_format_short_name(blit_info->dst.resource->format));
return;
}
@@ -154,7 +153,7 @@ svga_blit(struct pipe_context *pipe,
svga->curr.sampler_views[PIPE_SHADER_FRAGMENT]);
/*util_blitter_save_render_condition(svga->blitter, svga->render_cond_query,
svga->render_cond_cond,
svga->render_cond_mode);*/
- util_blitter_blit(svga->blitter, &info);
+ util_blitter_blit(svga->blitter, blit_info);
}
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Mesa (master): svga: fix vertex buffer references in the hw state
Module: Mesa
Branch: master
Commit: 2b81e31d4488ada643560a640aa4c0f6372e9ca7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b81e31d4488ada643560a640aa4c0f6372e9ca7
Author: Charmaine Lee
Date: Mon May 2 18:17:48 2016 -0700
svga: fix vertex buffer references in the hw state
This patch fixes three issues with vertex buffer references:
(1) Instead of copy the vertex buffer resource handles to the hw state
in the context structure, use pipe_resource_reference to properly
reference the vertex buffer resources in the context.
(2) Make sure to unbind those unused vertex buffer resources.
(3) Force to rebind the vertex buffer resources at the first draw of each
command buffer to make sure the vertex buffer resources are paged in.
Reviewed-by: Brian Paul
---
src/gallium/drivers/svga/svga_context.c | 5 ++
src/gallium/drivers/svga/svga_context.h | 4 +-
src/gallium/drivers/svga/svga_draw.c| 79 -
src/gallium/drivers/svga/svga_pipe_vertex.c | 3 ++
4 files changed, 64 insertions(+), 27 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_context.c
b/src/gallium/drivers/svga/svga_context.c
index 32dc209..fa6406c 100644
--- a/src/gallium/drivers/svga/svga_context.c
+++ b/src/gallium/drivers/svga/svga_context.c
@@ -241,6 +241,8 @@ struct pipe_context *svga_context_create(struct pipe_screen
*screen,
svga->state.hw_draw.vs = NULL;
svga->state.hw_draw.gs = NULL;
svga->state.hw_draw.fs = NULL;
+
+ /* Initialize the currently bound buffer resources */
memset(svga->state.hw_draw.constbuf, 0,
sizeof(svga->state.hw_draw.constbuf));
memset(svga->state.hw_draw.default_constbuf_size, 0,
@@ -248,6 +250,9 @@ struct pipe_context *svga_context_create(struct pipe_screen
*screen,
memset(svga->state.hw_draw.enabled_constbufs, 0,
sizeof(svga->state.hw_draw.enabled_constbufs));
svga->state.hw_draw.ib = NULL;
+ svga->state.hw_draw.num_vbuffers = 0;
+ memset(svga->state.hw_draw.vbuffers, 0,
+ sizeof(svga->state.hw_draw.vbuffers));
/* Create a no-operation blend state which we will bind whenever the
* requested blend state is impossible (e.g. due to having an integer
diff --git a/src/gallium/drivers/svga/svga_context.h
b/src/gallium/drivers/svga/svga_context.h
index 01f290e..4f1c07e 100644
--- a/src/gallium/drivers/svga/svga_context.h
+++ b/src/gallium/drivers/svga/svga_context.h
@@ -357,8 +357,8 @@ struct svga_hw_draw_state
SVGA3dPrimitiveType topology;
/** Vertex buffer state */
- SVGA3dVertexBuffer vbuffers[PIPE_MAX_ATTRIBS];
- struct svga_winsys_surface *vbuffer_handles[PIPE_MAX_ATTRIBS];
+ SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS];
+ struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS];
unsigned num_vbuffers;
struct pipe_resource *ib; /**< index buffer for drawing */
diff --git a/src/gallium/drivers/svga/svga_draw.c
b/src/gallium/drivers/svga/svga_draw.c
index b6de7af..872dd7f 100644
--- a/src/gallium/drivers/svga/svga_draw.c
+++ b/src/gallium/drivers/svga/svga_draw.c
@@ -436,12 +436,14 @@ draw_vgpu10(struct svga_hwtnl *hwtnl,
unsigned start_instance, unsigned instance_count)
{
struct svga_context *svga = hwtnl->svga;
- struct svga_winsys_surface *vb_handle[SVGA3D_INPUTREG_MAX];
+ struct pipe_resource *vbuffers[SVGA3D_INPUTREG_MAX];
+ struct svga_winsys_surface *vbuffer_handles[SVGA3D_INPUTREG_MAX];
struct svga_winsys_surface *ib_handle;
const unsigned vbuf_count = hwtnl->cmd.vbuf_count;
enum pipe_error ret;
unsigned i;
boolean rebind_ib = FALSE;
+ boolean rebind_vbuf = FALSE;
assert(svga_have_vgpu10(svga));
assert(hwtnl->cmd.prim_count == 0);
@@ -467,6 +469,9 @@ draw_vgpu10(struct svga_hwtnl *hwtnl,
/* Force rebinding the index buffer when needed */
rebind_ib = TRUE;
+
+ /* Force rebinding the vertex buffers */
+ rebind_vbuf = TRUE;
}
ret = validate_sampler_resources(svga);
@@ -483,16 +488,23 @@ draw_vgpu10(struct svga_hwtnl *hwtnl,
if (sbuf) {
assert(sbuf->key.flags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER);
- vb_handle[i] = svga_buffer_handle(svga, &sbuf->b.b);
- if (vb_handle[i] == NULL)
+ vbuffer_handles[i] = svga_buffer_handle(svga, &sbuf->b.b);
+ if (vbuffer_handles[i] == NULL)
return PIPE_ERROR_OUT_OF_MEMORY;
+ vbuffers[i] = &sbuf->b.b;
}
else {
- vb_handle[i] = NULL;
+ vbuffers[i] = NULL;
+ vbuffer_handles[i] = NULL;
}
}
- /* Get handles for the index buffers */
+ for (; i < svga->state.hw_draw.num_vbuffers; i++) {
+ vbuffers[i] = NULL;
+ vbuffer_handles[i] = NULL;
+ }
+
+ /* Get handle for the index buffer */
if (ib) {
struct svga_buffer *sbuf = svga_buffer(ib);
@@ -519,33 +531,50 @@ draw_vgpu10(struct svga_hwtnl *hwtnl,
/* setup vertex buffers */
{
- SVGA3dVertexBuffer buffers
Mesa (master): svga: fix texture array update regression
Module: Mesa
Branch: master
Commit: 2aa9ff0cda1f6ad97c83d5583fab7a84efabe19e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2aa9ff0cda1f6ad97c83d5583fab7a84efabe19e
Author: Charmaine Lee
Date: Tue Jun 21 10:12:22 2016 -0700
svga: fix texture array update regression
With commit fb9fe35, we start using transfer_inline_write
for memcpy TexSubImage path, but that triggers a regression with
texture array in the svga driver.
With this patch, the direct map code will update the texture array
correctly.
Fixes VMware bug 1679293.
Tested with MTT piglit, glretrace, conform.
Reviewed-by: Brian Paul
---
src/gallium/drivers/svga/svga_resource_texture.c | 33 +++-
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_resource_texture.c
b/src/gallium/drivers/svga/svga_resource_texture.c
index b2c3028..f8305d5 100644
--- a/src/gallium/drivers/svga/svga_resource_texture.c
+++ b/src/gallium/drivers/svga/svga_resource_texture.c
@@ -547,6 +547,13 @@ svga_texture_transfer_map(struct pipe_context *pipe,
baseLevelSize.height = tex->b.b.height0;
baseLevelSize.depth = tex->b.b.depth0;
+ if ((tex->b.b.target == PIPE_TEXTURE_1D_ARRAY) ||
+ (tex->b.b.target == PIPE_TEXTURE_2D_ARRAY)) {
+ st->base.layer_stride =
+svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
+ tex->b.b.last_level + 1, 1, 0);
+ }
+
offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
tex->b.b.last_level + 1, /*
numMips */
st->slice, level);
@@ -673,27 +680,35 @@ svga_texture_transfer_unmap(struct pipe_context *pipe,
svga_texture(transfer->resource)->handle;
SVGA3dBox box;
enum pipe_error ret;
+ unsigned nlayers = 1;
assert(svga_have_gb_objects(svga));
/* update the effected region */
box.x = transfer->box.x;
box.y = transfer->box.y;
+ box.w = transfer->box.width;
+ box.h = transfer->box.height;
+ box.d = transfer->box.depth;
+
switch (tex->b.b.target) {
case PIPE_TEXTURE_CUBE:
+ box.z = 0;
+ break;
case PIPE_TEXTURE_2D_ARRAY:
+ nlayers = box.d;
box.z = 0;
+ box.d = 1;
break;
case PIPE_TEXTURE_1D_ARRAY:
+ nlayers = box.d;
box.y = box.z = 0;
+ box.d = 1;
break;
default:
box.z = transfer->box.z;
break;
}
- box.w = transfer->box.width;
- box.h = transfer->box.height;
- box.d = transfer->box.depth;
if (0)
debug_printf("%s %d, %d, %d %d x %d x %d\n",
@@ -702,15 +717,21 @@ svga_texture_transfer_unmap(struct pipe_context *pipe,
box.w, box.h, box.d);
if (svga_have_vgpu10(svga)) {
- ret = update_image_vgpu10(svga, surf, &box, st->slice,
transfer->level,
- tex->b.b.last_level + 1);
+ unsigned i;
+ for (i = 0; i < nlayers; i++) {
+ret = update_image_vgpu10(svga, surf, &box,
+ st->slice + i, transfer->level,
+ tex->b.b.last_level + 1);
+assert(ret == PIPE_OK);
+ }
} else {
+ assert(nlayers == 1);
ret = update_image_vgpu9(svga, surf, &box, st->slice,
transfer->level);
+ assert(ret == PIPE_OK);
}
svga->hud.num_resource_updates++;
- assert(ret == PIPE_OK);
(void) ret;
}
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Mesa (master): include: Require MSVC 2013 Update 4.
Module: Mesa Branch: master Commit: 805dbdf06d98e6dcfe0b24e38cc13c88eb5f36be URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=805dbdf06d98e6dcfe0b24e38cc13c88eb5f36be Author: Jose Fonseca Date: Thu Jun 23 11:18:21 2016 +0100 include: Require MSVC 2013 Update 4. Earlier MSVC 2013 releases have troubles compiling some of our C99 code, so make sure we have Update 4 to avoid confusion. Cc: mesa-sta...@lists.freedesktop.org Reviewed-by: Brian Paul --- include/c99_compat.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/c99_compat.h b/include/c99_compat.h index bfe655b..24e96e0 100644 --- a/include/c99_compat.h +++ b/include/c99_compat.h @@ -36,8 +36,8 @@ */ #if defined(_MSC_VER) -# if _MSC_VER < 1800 -#error "Microsoft Visual Studio 2013 or higher required" +# if _MSC_VER < 1800 || (_MSC_FULL_VER < 180031101 && !defined(__clang__)) +#error "Microsoft Visual Studio 2013 Update 4 or higher required" # endif /* ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): swr: push/pop DEBUG macro around llvm includes
Module: Mesa
Branch: master
Commit: 9ca741c64524a57f972ce050919a0e2dec3e64f3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ca741c64524a57f972ce050919a0e2dec3e64f3
Author: Tim Rowley
Date: Thu Jun 16 21:09:35 2016 -0500
swr: push/pop DEBUG macro around llvm includes
llvm redefines DEBUG; adding push/pop prevents a undefined reference
to debug_refcnt_state in llvm-3.7+.
v2: add undef DEBUG
Cc: "12.0"
Reviewed-by: Bruce Cherniak
---
src/gallium/drivers/swr/swr_shader.cpp | 10 +++---
src/gallium/drivers/swr/swr_state.cpp | 7 ++-
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/swr/swr_shader.cpp
b/src/gallium/drivers/swr/swr_shader.cpp
index 8af0700..4d1b604 100644
--- a/src/gallium/drivers/swr/swr_shader.cpp
+++ b/src/gallium/drivers/swr/swr_shader.cpp
@@ -21,14 +21,18 @@
* IN THE SOFTWARE.
***/
+// llvm redefines DEBUG
+#pragma push_macro("DEBUG")
+#undef DEBUG
#include "JitManager.h"
+#include "llvm-c/Core.h"
+#include "llvm/Support/CBindingWrapping.h"
+#pragma pop_macro("DEBUG")
+
#include "state.h"
#include "state_llvm.h"
#include "builder.h"
-#include "llvm-c/Core.h"
-#include "llvm/Support/CBindingWrapping.h"
-
#include "tgsi/tgsi_strings.h"
#include "gallivm/lp_bld_init.h"
#include "gallivm/lp_bld_flow.h"
diff --git a/src/gallium/drivers/swr/swr_state.cpp
b/src/gallium/drivers/swr/swr_state.cpp
index 31745fca..5caaa5c 100644
--- a/src/gallium/drivers/swr/swr_state.cpp
+++ b/src/gallium/drivers/swr/swr_state.cpp
@@ -21,9 +21,14 @@
* IN THE SOFTWARE.
***/
+// llvm redefines DEBUG
+#pragma push_macro("DEBUG")
+#undef DEBUG
+#include "JitManager.h"
+#pragma pop_macro("DEBUG")
+
#include "common/os.h"
#include "jit_api.h"
-#include "JitManager.h"
#include "state_llvm.h"
#include "gallivm/lp_bld_tgsi.h"
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Mesa (master): swr: [rasterizer core] fix dependency bug
Module: Mesa
Branch: master
Commit: a16d274032cc1ee264b14de39be1bbb3f923bfb0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a16d274032cc1ee264b14de39be1bbb3f923bfb0
Author: Tim Rowley
Date: Tue Jun 14 17:54:34 2016 -0600
swr: [rasterizer core] fix dependency bug
Never be dependent on "draw 0", instead have a bool that makes the draw
dependent on the previous draw or not dependent at all.
Reviewed-by: Bruce Cherniak
---
src/gallium/drivers/swr/rasterizer/core/api.cpp | 6 +++---
src/gallium/drivers/swr/rasterizer/core/context.h| 4 ++--
src/gallium/drivers/swr/rasterizer/core/ringbuffer.h | 8
src/gallium/drivers/swr/rasterizer/core/threads.cpp | 2 +-
4 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/core/api.cpp
b/src/gallium/drivers/swr/rasterizer/core/api.cpp
index b63d547..edde918 100644
--- a/src/gallium/drivers/swr/rasterizer/core/api.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/api.cpp
@@ -322,7 +322,7 @@ DRAW_CONTEXT* GetDrawContext(SWR_CONTEXT *pContext, bool
isSplitDraw = false)
SWR_ASSERT(pCurDrawContext->pArena->IsEmpty() == true);
-pCurDrawContext->dependency = 0;
+pCurDrawContext->dependent = false;
pCurDrawContext->pContext = pContext;
pCurDrawContext->isCompute = false; // Dispatch has to set this to
true.
@@ -406,7 +406,7 @@ void SwrSync(HANDLE hContext, PFN_CALLBACK_FUNC pfnFunc,
uint64_t userData, uint
pDC->FeWork.desc.sync.userData3 = userData3;
// cannot execute until all previous draws have completed
-pDC->dependency = pDC->drawId - 1;
+pDC->dependent = true;
//enqueue
QueueDraw(pContext);
@@ -1500,7 +1500,7 @@ void SwrGetStats(
pDC->FeWork.desc.queryStats.pStats = pStats;
// cannot execute until all previous draws have completed
-pDC->dependency = pDC->drawId - 1;
+pDC->dependent = true;
//enqueue
QueueDraw(pContext);
diff --git a/src/gallium/drivers/swr/rasterizer/core/context.h
b/src/gallium/drivers/swr/rasterizer/core/context.h
index 08eadf4..be4c2e9 100644
--- a/src/gallium/drivers/swr/rasterizer/core/context.h
+++ b/src/gallium/drivers/swr/rasterizer/core/context.h
@@ -381,8 +381,6 @@ struct DRAW_STATE
struct DRAW_CONTEXT
{
SWR_CONTEXT*pContext;
-uint32_tdrawId;
-uint32_tdependency;
union
{
MacroTileMgr* pTileMgr;
@@ -391,6 +389,8 @@ struct DRAW_CONTEXT
DRAW_STATE* pState;
CachingArena* pArena;
+uint32_tdrawId;
+booldependent;
boolisCompute; // Is this DC a compute context?
boolcleanupState; // True if this is the last draw using an
entry in the state ring.
volatile bool doneFE; // Is FE work done for this draw?
diff --git a/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h
b/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h
index 97f75c6..f1bef21 100644
--- a/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h
+++ b/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h
@@ -46,6 +46,7 @@ public:
void Init(uint32_t numEntries)
{
SWR_ASSERT(numEntries > 0);
+SWR_ASSERT(((1ULL << 32) % numEntries) == 0, "%d is not evenly
divisible into 2 ^ 32. Wrap errors will occur!", numEntries);
mNumEntries = numEntries;
mpRingBuffer = (T*)AlignedMalloc(sizeof(T)*numEntries, 64);
SWR_ASSERT(mpRingBuffer != nullptr);
@@ -67,6 +68,8 @@ public:
INLINE void Enqueue()
{
mRingHead++; // There's only one producer.
+// Assert to find wrap-around cases, NEVER ENABLE DURING CHECKIN!!
+// SWR_REL_ASSERT(mRingHead);
}
INLINE void Dequeue()
@@ -81,10 +84,7 @@ public:
INLINE bool IsFull()
{
-///@note We don't handle wrap case due to using 64-bit indices.
-/// It would take 11 million years to wrap at 50,000 DCs per sec.
-/// If we used 32-bit indices then its about 23 hours to wrap.
-uint64_t numEnqueued = GetHead() - GetTail();
+uint32_t numEnqueued = GetHead() - GetTail();
SWR_ASSERT(numEnqueued <= mNumEntries);
return (numEnqueued == mNumEntries);
diff --git a/src/gallium/drivers/swr/rasterizer/core/threads.cpp
b/src/gallium/drivers/swr/rasterizer/core/threads.cpp
index fe164a0..9671f77 100644
--- a/src/gallium/drivers/swr/rasterizer/core/threads.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/threads.cpp
@@ -317,7 +317,7 @@ bool IDComparesLess(uint32_t a, uint32_t b)
INLINE
bool CheckDependency(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint32_t
lastRetiredDraw)
{
-return IDComparesLess(lastRetiredDraw, pDC->dependency);
+return pDC->dependent && IDComparesLess(lastRetiredDraw, pDC->drawId - 1);
}
// inlined-only version
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Mesa (master): swr: [rasterizer common] fix include for Intel compiler
Module: Mesa Branch: master Commit: 695af2a7e20bd38aafedf3ab32f5b258248cd360 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=695af2a7e20bd38aafedf3ab32f5b258248cd360 Author: Tim Rowley Date: Fri May 27 16:17:47 2016 -0600 swr: [rasterizer common] fix include for Intel compiler Reviewed-by: Bruce Cherniak --- src/gallium/drivers/swr/rasterizer/common/os.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/common/os.h b/src/gallium/drivers/swr/rasterizer/common/os.h index 370c619..45517f6 100644 --- a/src/gallium/drivers/swr/rasterizer/common/os.h +++ b/src/gallium/drivers/swr/rasterizer/common/os.h @@ -34,7 +34,7 @@ #ifndef NOMINMAX #define NOMINMAX #endif -#include "Windows.h" +#include #include #include ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): swr: [rasterizer core] stop single threaded crash exit crash
Module: Mesa
Branch: master
Commit: c867c22d855163ecbf18d5606b27c9d2cb50a148
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c867c22d855163ecbf18d5606b27c9d2cb50a148
Author: Tim Rowley
Date: Fri Jun 10 10:18:45 2016 -0600
swr: [rasterizer core] stop single threaded crash exit crash
Function static destructors were getting called by exit
handlers before context teardown.
Reviewed-by: Bruce Cherniak
---
src/gallium/drivers/swr/rasterizer/core/api.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/core/api.cpp
b/src/gallium/drivers/swr/rasterizer/core/api.cpp
index 2e6f8b3..22a94fb 100644
--- a/src/gallium/drivers/swr/rasterizer/core/api.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/api.cpp
@@ -181,6 +181,8 @@ void WakeAllThreads(SWR_CONTEXT *pContext)
pContext->FifosNotEmpty.notify_all();
}
+static TileSet gSingleThreadLockedTiles;
+
template
void QueueWork(SWR_CONTEXT *pContext)
{
@@ -213,10 +215,9 @@ void QueueWork(SWR_CONTEXT *pContext)
if (IsDraw)
{
-static TileSet lockedTiles;
uint64_t curDraw[2] = { pContext->pCurDrawContext->drawId,
pContext->pCurDrawContext->drawId };
WorkOnFifoFE(pContext, 0, curDraw[0]);
-WorkOnFifoBE(pContext, 0, curDraw[1], lockedTiles, 0, 0);
+WorkOnFifoBE(pContext, 0, curDraw[1], gSingleThreadLockedTiles, 0,
0);
}
else
{
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Mesa (master): swr: [rasterizer core] track whether GS outputs viewport array index
Module: Mesa Branch: master Commit: 35935ca4f2b204c497cc416f7ff82250235ccd9a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=35935ca4f2b204c497cc416f7ff82250235ccd9a Author: Tim Rowley Date: Tue Jun 14 10:25:02 2016 -0600 swr: [rasterizer core] track whether GS outputs viewport array index So we can skip the index gather in PA. Reviewed-by: Bruce Cherniak --- src/gallium/drivers/swr/rasterizer/core/state.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/swr/rasterizer/core/state.h b/src/gallium/drivers/swr/rasterizer/core/state.h index 29048f1..bfa9929 100644 --- a/src/gallium/drivers/swr/rasterizer/core/state.h +++ b/src/gallium/drivers/swr/rasterizer/core/state.h @@ -676,6 +676,9 @@ struct SWR_GS_STATE // geometry shader emits PrimitiveID bool emitsPrimitiveID; +// geometry shader emits ViewportArrayIndex +bool emitsViewportArrayIndex; + // if true, geometry shader emits a single stream, with separate cut buffer. // if false, geometry shader emits vertices for multiple streams to the stream buffer, with a separate StreamID buffer // to map vertices to streams ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): swr: [rasterizer core] remove old comment
Module: Mesa Branch: master Commit: eca877f27b5612048cc30e2f23c04f73c3ad20c8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eca877f27b5612048cc30e2f23c04f73c3ad20c8 Author: Tim Rowley Date: Tue Jun 7 13:03:27 2016 -0600 swr: [rasterizer core] remove old comment Reviewed-by: Bruce Cherniak --- src/gallium/drivers/swr/rasterizer/core/frontend.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/src/gallium/drivers/swr/rasterizer/core/frontend.cpp b/src/gallium/drivers/swr/rasterizer/core/frontend.cpp index 6e1bc0e..f86f8fa 100644 --- a/src/gallium/drivers/swr/rasterizer/core/frontend.cpp +++ b/src/gallium/drivers/swr/rasterizer/core/frontend.cpp @@ -1613,7 +1613,6 @@ void BinTriangles( const SWR_GS_STATE& gsState = state.gsState; MacroTileMgr *pTileMgr = pDC->pTileMgr; -// Simple wireframe mode for debugging purposes only simdscalar vRecipW0 = _simd_set1_ps(1.0f); simdscalar vRecipW1 = _simd_set1_ps(1.0f); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): swr: [rasterizer common] workaround clang for windows __cpuid() bug
Module: Mesa
Branch: master
Commit: 95f21a97666d5eb112fffc4d724e54229e06ebf8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=95f21a97666d5eb112fffc4d724e54229e06ebf8
Author: Tim Rowley
Date: Thu May 26 10:51:48 2016 -0600
swr: [rasterizer common] workaround clang for windows __cpuid() bug
Reviewed-by: Bruce Cherniak
---
src/gallium/drivers/swr/rasterizer/common/isa.hpp | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/common/isa.hpp
b/src/gallium/drivers/swr/rasterizer/common/isa.hpp
index ef38179..a62350f 100644
--- a/src/gallium/drivers/swr/rasterizer/common/isa.hpp
+++ b/src/gallium/drivers/swr/rasterizer/common/isa.hpp
@@ -30,7 +30,11 @@
#include
#include
-#if defined(_WIN32)
+// Clang for Windows does supply an intrin.h with __cpuid intrinsics,
however...
+// It seems to not realize that a write to "b" (ebx) will kill the value in
rbx.
+// This attempts to use the "native" clang / gcc intrinsics instead of the
windows
+// compatible ones.
+#if defined(_MSC_VER) && !defined(__clang__)
#include
#else
#include
@@ -128,7 +132,7 @@ private:
// Calling __cpuid with 0x0 as the function_id argument
// gets the number of the highest valid function ID.
-#if defined(_WIN32)
+#if defined(_MSC_VER) && !defined(__clang__)
__cpuid(cpui.data(), 0);
nIds_ = cpui[0];
#else
@@ -137,7 +141,7 @@ private:
for (int i = 0; i <= nIds_; ++i)
{
-#if defined(_WIN32)
+#if defined(_MSC_VER) && !defined(__clang__)
__cpuidex(cpui.data(), i, 0);
#else
int *data = cpui.data();
@@ -178,7 +182,7 @@ private:
// Calling __cpuid with 0x8000 as the function_id argument
// gets the number of the highest valid extended ID.
-#if defined(_WIN32)
+#if defined(_MSC_VER) && !defined(__clang__)
__cpuid(cpui.data(), 0x8000);
nExIds_ = cpui[0];
#else
@@ -190,7 +194,7 @@ private:
for (unsigned i = 0x8000; i <= nExIds_; ++i)
{
-#if defined(_WIN32)
+#if defined(_MSC_VER) && !defined(__clang__)
__cpuidex(cpui.data(), i, 0);
#else
int *data = cpui.data();
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Mesa (master): swr: [rasterizer core] conservative rasterization frontend support
Module: Mesa
Branch: master
Commit: c7cd33b605f0238464a3250a11f7134e4b7d22a6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7cd33b605f0238464a3250a11f7134e4b7d22a6
Author: Tim Rowley
Date: Fri Jun 10 11:31:16 2016 -0600
swr: [rasterizer core] conservative rasterization frontend support
Reviewed-by: Bruce Cherniak
---
src/gallium/drivers/swr/Makefile.sources | 1 +
src/gallium/drivers/swr/rasterizer/core/api.cpp| 13 +-
src/gallium/drivers/swr/rasterizer/core/clip.h | 4 +-
.../drivers/swr/rasterizer/core/conservativeRast.h | 120 +++
src/gallium/drivers/swr/rasterizer/core/context.h | 2 +
.../drivers/swr/rasterizer/core/frontend.cpp | 163 +++--
src/gallium/drivers/swr/rasterizer/core/frontend.h | 43 +-
.../drivers/swr/rasterizer/core/rasterizer.h | 8 +
src/gallium/drivers/swr/rasterizer/core/state.h| 4 +-
src/gallium/drivers/swr/rasterizer/core/utils.h| 30
10 files changed, 325 insertions(+), 63 deletions(-)
diff --git a/src/gallium/drivers/swr/Makefile.sources
b/src/gallium/drivers/swr/Makefile.sources
index f9448ee..8d97a75 100644
--- a/src/gallium/drivers/swr/Makefile.sources
+++ b/src/gallium/drivers/swr/Makefile.sources
@@ -67,6 +67,7 @@ CORE_CXX_SOURCES := \
rasterizer/core/blend.h \
rasterizer/core/clip.cpp \
rasterizer/core/clip.h \
+ rasterizer/core/conservativeRast.h \
rasterizer/core/context.h \
rasterizer/core/depthstencil.h \
rasterizer/core/fifo.hpp \
diff --git a/src/gallium/drivers/swr/rasterizer/core/api.cpp
b/src/gallium/drivers/swr/rasterizer/core/api.cpp
index 22a94fb..cec4519 100644
--- a/src/gallium/drivers/swr/rasterizer/core/api.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/api.cpp
@@ -780,10 +780,7 @@ void SetupPipeline(DRAW_CONTEXT *pDC)
const bool bMultisampleEnable = ((rastState.sampleCount >
SWR_MULTISAMPLE_1X) || rastState.forcedSampleCount) ? 1 : 0;
const uint32_t centroid = ((psState.barycentricsMask &
SWR_BARYCENTRIC_CENTROID_MASK) > 0) ? 1 : 0;
const uint32_t canEarlyZ = (psState.forceEarlyZ ||
(!psState.writesODepth && !psState.usesSourceDepth && !psState.usesUAV)) ? 1 :
0;
-
-// currently only support 'normal' input coverage
-SWR_ASSERT(psState.inputCoverage == SWR_INPUT_COVERAGE_NORMAL ||
- psState.inputCoverage == SWR_INPUT_COVERAGE_NONE);
+const uint32_t inputCoverage = (psState.inputCoverage !=
SWR_INPUT_COVERAGE_NONE);
SWR_BARYCENTRICS_MASK barycentricsMask =
(SWR_BARYCENTRICS_MASK)psState.barycentricsMask;
@@ -795,20 +792,20 @@ void SetupPipeline(DRAW_CONTEXT *pDC)
{
// always need to generate I & J per sample for Z interpolation
barycentricsMask = (SWR_BARYCENTRICS_MASK)(barycentricsMask |
SWR_BARYCENTRIC_PER_SAMPLE_MASK);
-backendFuncs.pfnBackend =
gBackendPixelRateTable[rastState.sampleCount][rastState.samplePattern][psState.inputCoverage][centroid][forcedSampleCount][canEarlyZ];
+backendFuncs.pfnBackend =
gBackendPixelRateTable[rastState.sampleCount][rastState.samplePattern][inputCoverage][centroid][forcedSampleCount][canEarlyZ];
}
else
{
// always need to generate I & J per pixel for Z interpolation
barycentricsMask = (SWR_BARYCENTRICS_MASK)(barycentricsMask |
SWR_BARYCENTRIC_PER_PIXEL_MASK);
-backendFuncs.pfnBackend =
gBackendSingleSample[psState.inputCoverage][centroid][canEarlyZ];
+backendFuncs.pfnBackend =
gBackendSingleSample[inputCoverage][centroid][canEarlyZ];
}
break;
case SWR_SHADING_RATE_SAMPLE:
SWR_ASSERT(rastState.samplePattern == SWR_MSAA_STANDARD_PATTERN);
// always need to generate I & J per sample for Z interpolation
barycentricsMask = (SWR_BARYCENTRICS_MASK)(barycentricsMask |
SWR_BARYCENTRIC_PER_SAMPLE_MASK);
-backendFuncs.pfnBackend =
gBackendSampleRateTable[rastState.sampleCount][psState.inputCoverage][centroid][canEarlyZ];
+backendFuncs.pfnBackend =
gBackendSampleRateTable[rastState.sampleCount][inputCoverage][centroid][canEarlyZ];
break;
default:
SWR_ASSERT(0 && "Invalid shading rate");
@@ -833,7 +830,7 @@ void SetupPipeline(DRAW_CONTEXT *pDC)
break;
default:
pState->pfnProcessPrims = ClipTriangles;
-pfnBinner = BinTriangles;
+pfnBinner = GetBinTrianglesFunc((rastState.conservativeRast > 0));
break;
};
diff --git a/src/gallium/drivers/swr/rasterizer/core/clip.h
b/src/gallium/drivers/swr/rasterizer/core/clip.h
index 67a4c4f..1a6fc6d 100644
--- a/src/gallium/drivers/swr/rasterizer/core/clip.h
+++ b/src/gallium/drivers/swr/rasterizer/core/clip.h
@@ -385,7 +385,7 @@ public:
PRIMITIVE_T
Mesa (master): swr: [rasterizer jitter] cleanup supporting different llvm versions
Module: Mesa
Branch: master
Commit: d3d97f8395513bf365d2fe8e4292c8098290586f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3d97f8395513bf365d2fe8e4292c8098290586f
Author: Tim Rowley
Date: Mon Jun 6 19:13:22 2016 -0600
swr: [rasterizer jitter] cleanup supporting different llvm versions
Reviewed-by: Bruce Cherniak
---
.../drivers/swr/rasterizer/jitter/JitManager.cpp | 9 +--
.../drivers/swr/rasterizer/jitter/JitManager.h | 7 -
.../drivers/swr/rasterizer/jitter/blend_jit.cpp| 8 +-
.../drivers/swr/rasterizer/jitter/builder_misc.cpp | 31 +++---
.../drivers/swr/rasterizer/jitter/builder_misc.h | 6 +
.../drivers/swr/rasterizer/jitter/fetch_jit.cpp| 15 ++-
.../jitter/scripts/gen_llvm_ir_macros.py | 24 -
.../swr/rasterizer/jitter/streamout_jit.cpp| 7 +
8 files changed, 73 insertions(+), 34 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp
b/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp
index 4bbd9ad..6e00a70 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp
@@ -35,11 +35,13 @@
#include "JitManager.h"
#include "fetch_jit.h"
+#pragma push_macro("DEBUG")
+#undef DEBUG
+
#if defined(_WIN32)
#include "llvm/ADT/Triple.h"
#endif
#include "llvm/IR/Function.h"
-#include "llvm/Support/DynamicLibrary.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/SourceMgr.h"
@@ -53,6 +55,8 @@
#include "llvm/ExecutionEngine/JITEventListener.h"
#endif
+#pragma pop_macro("DEBUG")
+
#include "core/state.h"
#include "state_llvm.h"
@@ -237,6 +241,8 @@ bool JitManager::SetupModuleFromIR(const uint8_t *pIR)
return false;
}
+newModule->setDataLayout(mpExec->getDataLayout());
+
mpCurrentModule = newModule.get();
#if defined(_WIN32)
// Needed for MCJIT on windows
@@ -251,7 +257,6 @@ bool JitManager::SetupModuleFromIR(const uint8_t *pIR)
return true;
}
-
//
/// @brief Dump function x86 assembly to file.
/// @note This should only be called after the module has been jitted to x86
and the
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/JitManager.h
b/src/gallium/drivers/swr/rasterizer/jitter/JitManager.h
index 14ba893..354bfe8 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/JitManager.h
+++ b/src/gallium/drivers/swr/rasterizer/jitter/JitManager.h
@@ -54,7 +54,7 @@
#endif
#ifndef HAVE_LLVM
-#define HAVE_LLVM (LLVM_VERSION_MAJOR << 8) || LLVM_VERSION_MINOR
+#define HAVE_LLVM ((LLVM_VERSION_MAJOR << 8) | LLVM_VERSION_MINOR)
#endif
#include "llvm/IR/Verifier.h"
@@ -66,8 +66,12 @@
#if HAVE_LLVM == 0x306
#include "llvm/PassManager.h"
+using FunctionPassManager = llvm::FunctionPassManager;
+using PassManager = llvm::PassManager;
#else
#include "llvm/IR/LegacyPassManager.h"
+using FunctionPassManager = llvm::legacy::FunctionPassManager;
+using PassManager = llvm::legacy::PassManager;
#endif
#include "llvm/CodeGen/Passes.h"
@@ -77,6 +81,7 @@
#include "llvm/Transforms/IPO.h"
#include "llvm/Transforms/Scalar.h"
#include "llvm/Support/Host.h"
+#include "llvm/Support/DynamicLibrary.h"
#pragma pop_macro("DEBUG")
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp
b/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp
index 1b5290c..940399c 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp
@@ -31,7 +31,6 @@
#include "blend_jit.h"
#include "builder.h"
#include "state_llvm.h"
-#include "llvm/IR/DataLayout.h"
#include
@@ -725,12 +724,7 @@ struct BlendJit : public Builder
JitManager::DumpToFile(blendFunc, "");
-#if HAVE_LLVM == 0x306
-FunctionPassManager
-#else
-llvm::legacy::FunctionPassManager
-#endif
-passes(JM()->mpCurrentModule);
+::FunctionPassManager passes(JM()->mpCurrentModule);
passes.add(createBreakCriticalEdgesPass());
passes.add(createCFGSimplificationPass());
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
b/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
index 2f4fa38..671178f 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp
@@ -30,8 +30,6 @@
#include "builder.h"
#include "common/rdtsc_buckets.h"
-#include "llvm/Support/DynamicLibrary.h"
-
void __cdecl CallPrint(const char* fmt, ...);
//
@@ -322,6 +320,32 @@ CallInst *Builder::CALL(Value *Callee, const
std::initializer_list &args
return CALLA(Callee, args);
}
+#if HAVE_LLVM > 0x306
+CallInst *Builder::CALL(Value *Callee, Value* arg)
+{
+std::vector args;
+args.push_back(a
Mesa (master): swr: [rasterizer jitter] add support for component packing for 'odd' formats
Module: Mesa
Branch: master
Commit: dd189536dc012dc793e9aa666514106cb6d93914
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd189536dc012dc793e9aa666514106cb6d93914
Author: Tim Rowley
Date: Tue Jun 14 12:57:31 2016 -0600
swr: [rasterizer jitter] add support for component packing for 'odd' formats
Add early-out if no components are enabled. Add asserts.
Reviewed-by: Bruce Cherniak
---
.../drivers/swr/rasterizer/jitter/fetch_jit.cpp| 27 ++
1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
index bc471a5..fd4bf15 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
@@ -269,6 +269,9 @@ void FetchJit::JitLoadVertices(const FETCH_COMPILE_STATE
&fetchState, Value* fet
uint32_tnumComponents = info.numComps;
uint32_t bpc = info.bpp / info.numComps; ///@todo Code below assumes
all components are same size. Need to fix.
+// load path doesn't support component packing
+SWR_ASSERT(ied.ComponentPacking == ComponentEnable::XYZW, "Fetch load
path doesn't support component packing.");
+
vectors.clear();
Value *vCurIndices;
@@ -699,6 +702,13 @@ void FetchJit::JitGatherVertices(const FETCH_COMPILE_STATE
&fetchState, Value* f
for(uint32_t nInputElt = 0; nInputElt < fetchState.numAttribs; ++nInputElt)
{
const INPUT_ELEMENT_DESC& ied = fetchState.layout[nInputElt];
+
+// skip element if all components are disabled
+if (ied.ComponentPacking == ComponentEnable::NONE)
+{
+continue;
+}
+
const SWR_FORMAT_INFO &info = GetFormatInfo((SWR_FORMAT)ied.Format);
SWR_ASSERT((info.bpp != 0), "Unsupported format in
JitGatherVertices.");
uint32_t bpc = info.bpp / info.numComps; ///@todo Code below assumes
all components are same size. Need to fix.
@@ -789,14 +799,23 @@ void FetchJit::JitGatherVertices(const
FETCH_COMPILE_STATE &fetchState, Value* f
// Special gather/conversion for formats without equal component sizes
if (IsOddFormat((SWR_FORMAT)ied.Format))
{
-// Only full 4 component fetch is supported for odd formats
-SWR_ASSERT(compMask == XYZW);
Value* pResults[4];
CreateGatherOddFormats((SWR_FORMAT)ied.Format, pStreamBase,
vOffsets, pResults);
ConvertFormat((SWR_FORMAT)ied.Format, pResults);
-StoreVertexElements(pVtxOut, outputElt++, 4, pResults);
-currentVertexElement = 0;
+for (uint32_t c = 0; c < 4; ++c)
+{
+if (isComponentEnabled(compMask, c))
+{
+vVertexElements[currentVertexElement++] = pResults[c];
+if (currentVertexElement > 3)
+{
+StoreVertexElements(pVtxOut, outputElt++, 4,
vVertexElements);
+// reset to the next vVertexElement to output
+currentVertexElement = 0;
+}
+}
+}
}
else if(info.type[0] == SWR_TYPE_FLOAT)
{
___
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mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): swr: [rasterizer] add support for building avx512 version
Module: Mesa
Branch: master
Commit: b6d2c9685154a6bed5c42d90af39213e9c274b59
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6d2c9685154a6bed5c42d90af39213e9c274b59
Author: Tim Rowley
Date: Tue May 31 20:01:40 2016 -0600
swr: [rasterizer] add support for building avx512 version
Currently, most code paths between AVX2 and AVX512 are identical
(see changes to knobs.h).
Reviewed-by: Bruce Cherniak
---
src/gallium/drivers/swr/rasterizer/common/simdintrin.h | 4 ++--
src/gallium/drivers/swr/rasterizer/core/format_types.h | 8
src/gallium/drivers/swr/rasterizer/core/knobs.h | 15 ++-
src/gallium/drivers/swr/rasterizer/memory/Convert.h | 4 ++--
src/gallium/drivers/swr/rasterizer/memory/StoreTile.cpp | 4 ++--
5 files changed, 20 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/common/simdintrin.h
b/src/gallium/drivers/swr/rasterizer/common/simdintrin.h
index 5ec1f71..cc29b5d 100644
--- a/src/gallium/drivers/swr/rasterizer/common/simdintrin.h
+++ b/src/gallium/drivers/swr/rasterizer/common/simdintrin.h
@@ -1002,7 +1002,7 @@ static INLINE simdscalar _simd_abs_ps(simdscalar a)
INLINE
UINT pdep_u32(UINT a, UINT mask)
{
-#if KNOB_ARCH==KNOB_ARCH_AVX2
+#if KNOB_ARCH >= KNOB_ARCH_AVX2
return _pdep_u32(a, mask);
#else
UINT result = 0;
@@ -1035,7 +1035,7 @@ UINT pdep_u32(UINT a, UINT mask)
INLINE
UINT pext_u32(UINT a, UINT mask)
{
-#if KNOB_ARCH==KNOB_ARCH_AVX2
+#if KNOB_ARCH >= KNOB_ARCH_AVX2
return _pext_u32(a, mask);
#else
UINT result = 0;
diff --git a/src/gallium/drivers/swr/rasterizer/core/format_types.h
b/src/gallium/drivers/swr/rasterizer/core/format_types.h
index afb6337..6612c83 100644
--- a/src/gallium/drivers/swr/rasterizer/core/format_types.h
+++ b/src/gallium/drivers/swr/rasterizer/core/format_types.h
@@ -98,7 +98,7 @@ struct PackTraits<8, false>
__m256i result = _mm256_castsi128_si256(resLo);
result = _mm256_insertf128_si256(result, resHi, 1);
return _mm256_castsi256_ps(result);
-#elif KNOB_ARCH==KNOB_ARCH_AVX2
+#elif KNOB_ARCH>=KNOB_ARCH_AVX2
return
_mm256_castsi256_ps(_mm256_cvtepu8_epi32(_mm_castps_si128(_mm256_castps256_ps128(in;
#endif
#else
@@ -161,7 +161,7 @@ struct PackTraits<8, true>
__m256i result = _mm256_castsi128_si256(resLo);
result = _mm256_insertf128_si256(result, resHi, 1);
return _mm256_castsi256_ps(result);
-#elif KNOB_ARCH==KNOB_ARCH_AVX2
+#elif KNOB_ARCH>=KNOB_ARCH_AVX2
return
_mm256_castsi256_ps(_mm256_cvtepi8_epi32(_mm_castps_si128(_mm256_castps256_ps128(in;
#endif
#else
@@ -223,7 +223,7 @@ struct PackTraits<16, false>
__m256i result = _mm256_castsi128_si256(resLo);
result = _mm256_insertf128_si256(result, resHi, 1);
return _mm256_castsi256_ps(result);
-#elif KNOB_ARCH==KNOB_ARCH_AVX2
+#elif KNOB_ARCH>=KNOB_ARCH_AVX2
return
_mm256_castsi256_ps(_mm256_cvtepu16_epi32(_mm_castps_si128(_mm256_castps256_ps128(in;
#endif
#else
@@ -285,7 +285,7 @@ struct PackTraits<16, true>
__m256i result = _mm256_castsi128_si256(resLo);
result = _mm256_insertf128_si256(result, resHi, 1);
return _mm256_castsi256_ps(result);
-#elif KNOB_ARCH==KNOB_ARCH_AVX2
+#elif KNOB_ARCH>=KNOB_ARCH_AVX2
return
_mm256_castsi256_ps(_mm256_cvtepi16_epi32(_mm_castps_si128(_mm256_castps256_ps128(in;
#endif
#else
diff --git a/src/gallium/drivers/swr/rasterizer/core/knobs.h
b/src/gallium/drivers/swr/rasterizer/core/knobs.h
index 55a22a6..2629276 100644
--- a/src/gallium/drivers/swr/rasterizer/core/knobs.h
+++ b/src/gallium/drivers/swr/rasterizer/core/knobs.h
@@ -52,11 +52,16 @@
#define KNOB_SIMD_WIDTH 8
#define KNOB_SIMD_BYTES 32
#elif (KNOB_ARCH == KNOB_ARCH_AVX512)
-#define KNOB_ARCH_ISA AVX512F
-#define KNOB_ARCH_STR "AVX512"
-#define KNOB_SIMD_WIDTH 16
-#define KNOB_SIMD_BYTES 64
-#error "AVX512 not yet supported"
+#define KNOB_ARCH_ISA AVX2
+#define KNOB_ARCH_STR "AVX2"
+#define KNOB_SIMD_WIDTH 8
+#define KNOB_SIMD_BYTES 32
+// Disable AVX512 for now...
+//#define KNOB_ARCH_ISA AVX512F
+//#define KNOB_ARCH_STR "AVX512"
+//#define KNOB_SIMD_WIDTH 16
+//#define KNOB_SIMD_BYTES 64
+//#error "AVX512 not yet supported"
#else
#error "Unknown architecture"
#endif
diff --git a/src/gallium/drivers/swr/rasterizer/memory/Convert.h
b/src/gallium/drivers/swr/rasterizer/memory/Convert.h
index 42b973c..b790d35 100644
--- a/src/gallium/drivers/swr/rasterizer/memory/Convert.h
+++ b/src/gallium/drivers/swr/rasterizer/memory/Convert.h
@@ -336,7 +336,7 @@ static void ConvertPixelFromFloat(
// Convert from 32-bit float to 16-bit float using _mm_cvtps_ph
// @todo 16bit float instruction support is orthogonal to avx
support. need to
// add check for F16C support instead.
-#if KNOB_ARCH == KNOB_ARCH_AVX2
+#if KNOB_ARCH >= KNOB_ARCH_AVX2
__m128 src128 = _mm_set1_ps(src);
Mesa (master): swr: [rasterizer core] use wrap-around safe compares for dependency checking
Module: Mesa
Branch: master
Commit: 73a9154bdef807330ec3d75a79610532e33edb75
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=73a9154bdef807330ec3d75a79610532e33edb75
Author: Tim Rowley
Date: Tue Jun 14 17:02:11 2016 -0600
swr: [rasterizer core] use wrap-around safe compares for dependency checking
Move drawIDs from 64-bit to 32-bit to increase perf.
Reviewed-by: Bruce Cherniak
---
src/gallium/drivers/swr/rasterizer/core/api.cpp| 4 +-
src/gallium/drivers/swr/rasterizer/core/context.h | 4 +-
.../drivers/swr/rasterizer/core/ringbuffer.h | 8 ++--
.../drivers/swr/rasterizer/core/threads.cpp| 54 +-
src/gallium/drivers/swr/rasterizer/core/threads.h | 6 +--
.../drivers/swr/rasterizer/scripts/knob_defs.py| 5 +-
6 files changed, 45 insertions(+), 36 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/core/api.cpp
b/src/gallium/drivers/swr/rasterizer/core/api.cpp
index cec4519..b63d547 100644
--- a/src/gallium/drivers/swr/rasterizer/core/api.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/api.cpp
@@ -215,13 +215,13 @@ void QueueWork(SWR_CONTEXT *pContext)
if (IsDraw)
{
-uint64_t curDraw[2] = { pContext->pCurDrawContext->drawId,
pContext->pCurDrawContext->drawId };
+uint32_t curDraw[2] = { pContext->pCurDrawContext->drawId,
pContext->pCurDrawContext->drawId };
WorkOnFifoFE(pContext, 0, curDraw[0]);
WorkOnFifoBE(pContext, 0, curDraw[1], gSingleThreadLockedTiles, 0,
0);
}
else
{
-uint64_t curDispatch = pContext->pCurDrawContext->drawId;
+uint32_t curDispatch = pContext->pCurDrawContext->drawId;
WorkOnCompute(pContext, 0, curDispatch);
}
diff --git a/src/gallium/drivers/swr/rasterizer/core/context.h
b/src/gallium/drivers/swr/rasterizer/core/context.h
index 3204352..08eadf4 100644
--- a/src/gallium/drivers/swr/rasterizer/core/context.h
+++ b/src/gallium/drivers/swr/rasterizer/core/context.h
@@ -381,13 +381,13 @@ struct DRAW_STATE
struct DRAW_CONTEXT
{
SWR_CONTEXT*pContext;
-uint64_tdrawId;
+uint32_tdrawId;
+uint32_tdependency;
union
{
MacroTileMgr* pTileMgr;
DispatchQueue* pDispatch; // Queue for thread groups. (isCompute)
};
-uint64_tdependency;
DRAW_STATE* pState;
CachingArena* pArena;
diff --git a/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h
b/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h
index b9076de..97f75c6 100644
--- a/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h
+++ b/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h
@@ -90,13 +90,13 @@ public:
return (numEnqueued == mNumEntries);
}
-INLINE uint64_t GetTail() volatile { return mRingTail; }
-INLINE uint64_t GetHead() volatile { return mRingHead; }
+INLINE uint32_t GetTail() volatile { return mRingTail; }
+INLINE uint32_t GetHead() volatile { return mRingHead; }
protected:
T* mpRingBuffer;
uint32_t mNumEntries;
-OSALIGNLINE(volatile uint64_t) mRingHead; // Consumer Counter
-OSALIGNLINE(volatile uint64_t) mRingTail; // Producer Counter
+OSALIGNLINE(volatile uint32_t) mRingHead; // Consumer Counter
+OSALIGNLINE(volatile uint32_t) mRingTail; // Producer Counter
};
diff --git a/src/gallium/drivers/swr/rasterizer/core/threads.cpp
b/src/gallium/drivers/swr/rasterizer/core/threads.cpp
index 17bf616..fe164a0 100644
--- a/src/gallium/drivers/swr/rasterizer/core/threads.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/threads.cpp
@@ -294,22 +294,30 @@ void bindThread(uint32_t threadId, uint32_t procGroupId =
0, bool bindProcGroup=
}
INLINE
-uint64_t GetEnqueuedDraw(SWR_CONTEXT *pContext)
+uint32_t GetEnqueuedDraw(SWR_CONTEXT *pContext)
{
return pContext->dcRing.GetHead();
}
INLINE
-DRAW_CONTEXT *GetDC(SWR_CONTEXT *pContext, uint64_t drawId)
+DRAW_CONTEXT *GetDC(SWR_CONTEXT *pContext, uint32_t drawId)
{
return &pContext->dcRing[(drawId-1) % KNOB_MAX_DRAWS_IN_FLIGHT];
}
+INLINE
+bool IDComparesLess(uint32_t a, uint32_t b)
+{
+// Use signed delta to ensure that wrap-around to 0 is correctly handled.
+int32_t delta = int32_t(a - b);
+return (delta < 0);
+}
+
// returns true if dependency not met
INLINE
-bool CheckDependency(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint64_t
lastRetiredDraw)
+bool CheckDependency(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint32_t
lastRetiredDraw)
{
-return (pDC->dependency > lastRetiredDraw);
+return IDComparesLess(lastRetiredDraw, pDC->dependency);
}
// inlined-only version
@@ -345,11 +353,11 @@ int64_t CompleteDrawContext(SWR_CONTEXT* pContext,
DRAW_CONTEXT* pDC)
return CompleteDrawContextInl(pContext, pDC);
}
-INLINE bool FindFirstIncompleteDraw(SWR_CONTEXT* pContext, uint64_t&
curDrawBE, uint64_t& drawEnqueued)
+INLINE bool FindFirstInc
Mesa (master): swr: [rasterizer core] GS viewport array index attribute
Module: Mesa
Branch: master
Commit: 2d80295a6eb6e83d1cc84a009f14ad3dba8e96f8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d80295a6eb6e83d1cc84a009f14ad3dba8e96f8
Author: Tim Rowley
Date: Mon Jun 13 09:19:38 2016 -0600
swr: [rasterizer core] GS viewport array index attribute
Only adds the attribute mapping to the jitter; no implementation yet.
Reviewed-by: Bruce Cherniak
---
src/gallium/drivers/swr/rasterizer/core/knobs.h | 2 +-
src/gallium/drivers/swr/rasterizer/core/state.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/swr/rasterizer/core/knobs.h
b/src/gallium/drivers/swr/rasterizer/core/knobs.h
index 2629276..bac2525 100644
--- a/src/gallium/drivers/swr/rasterizer/core/knobs.h
+++ b/src/gallium/drivers/swr/rasterizer/core/knobs.h
@@ -77,7 +77,7 @@
#define KNOB_NUM_STREAMS32
// Maximum supported number of attributes per vertex
-#define KNOB_NUM_ATTRIBUTES 38
+#define KNOB_NUM_ATTRIBUTES 39
// Maximum supported active viewports and scissors
#define KNOB_NUM_VIEWPORTS_SCISSORS 16
diff --git a/src/gallium/drivers/swr/rasterizer/core/state.h
b/src/gallium/drivers/swr/rasterizer/core/state.h
index 05735b3..29048f1 100644
--- a/src/gallium/drivers/swr/rasterizer/core/state.h
+++ b/src/gallium/drivers/swr/rasterizer/core/state.h
@@ -197,6 +197,7 @@ enum SWR_OUTER_TESSFACTOR_ID
#define VERTEX_CLIPCULL_DIST_LO_SLOT 35 // VS writes lower 4 clip/cull dist
#define VERTEX_CLIPCULL_DIST_HI_SLOT 36 // VS writes upper 4 clip/cull dist
#define VERTEX_POINT_SIZE_SLOT 37 // VS writes point size here
+#define VERTEX_VIEWPORT_ARRAY_INDEX_SLOT 38
// SoAoSoA
struct simdvertex
{
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Mesa (master): swr: [rasterizer jitter] small fetch jit cleanup
Module: Mesa
Branch: master
Commit: 0f025eb478bfcca3f13c52fe7bc77f510bfc4486
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f025eb478bfcca3f13c52fe7bc77f510bfc4486
Author: Tim Rowley
Date: Thu Jun 9 15:17:49 2016 -0600
swr: [rasterizer jitter] small fetch jit cleanup
Handle SGV stores separate from the stream fetch code.
Because of this change, there is a potential to jit an extra unused store.
Reviewed-by: Bruce Cherniak
---
.../drivers/swr/rasterizer/jitter/fetch_jit.cpp| 170 +
1 file changed, 36 insertions(+), 134 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
index fbd8ecb..bc471a5 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
@@ -61,12 +61,11 @@ struct FetchJit : public Builder
// package up Shuffle*bpcGatherd args into a tuple for convenience
typedef std::tuple
Shuffle8bpcArgs;
+const uint32_t(&)[4]> Shuffle8bpcArgs;
void Shuffle8bpcGatherd(Shuffle8bpcArgs &args);
typedef std::tuple Shuffle16bpcArgs;
+uint32_t&, uint32_t&, const ComponentEnable, const
ComponentControl(&)[4], Value*(&)[4]> Shuffle16bpcArgs;
void Shuffle16bpcGather(Shuffle16bpcArgs &args);
void StoreVertexElements(Value* pVtxOut, const uint32_t outputElt, const
uint32_t numEltsToStore, Value* (&vVertexElements)[4]);
@@ -82,6 +81,7 @@ struct FetchJit : public Builder
void CreateGatherOddFormats(SWR_FORMAT format, Value* pBase, Value*
offsets, Value* result[4]);
void ConvertFormat(SWR_FORMAT format, Value *texels[4]);
+void StoreSGVs(const FETCH_COMPILE_STATE& fetchState, Value* pFetchInfo,
Value* pVtxOut);
};
Function* FetchJit::Create(const FETCH_COMPILE_STATE& fetchState)
@@ -174,6 +174,9 @@ Function* FetchJit::Create(const FETCH_COMPILE_STATE&
fetchState)
(fetchState.bDisableVGATHER) ? JitLoadVertices(fetchState, fetchInfo,
streams, vIndices, pVtxOut)
: JitGatherVertices(fetchState, fetchInfo,
streams, vIndices, pVtxOut);
+// Store out SGVs if enabled
+StoreSGVs(fetchState, fetchInfo, pVtxOut);
+
RET_VOID();
JitManager::DumpToFile(fetch, "src");
@@ -211,11 +214,29 @@ Function* FetchJit::Create(const FETCH_COMPILE_STATE&
fetchState)
return fetch;
}
+// store vertex ID and instance ID if enabled
+void FetchJit::StoreSGVs(const FETCH_COMPILE_STATE& fetchState, Value*
pFetchInfo, Value* pVtxOut)
+{
+if (fetchState.InstanceIdEnable)
+{
+Value* pId = BITCAST(VBROADCAST(LOAD(GEP(pFetchInfo, { 0,
SWR_FETCH_CONTEXT_CurInstance }))), mSimdFP32Ty);
+Value* pDest = GEP(pVtxOut, C(fetchState.InstanceIdElementOffset * 4 +
fetchState.InstanceIdComponentNumber), "instanceID");
+STORE(pId, pDest);
+}
+
+if (fetchState.VertexIdEnable)
+{
+Value* pId = BITCAST(LOAD(GEP(pFetchInfo, { 0,
SWR_FETCH_CONTEXT_VertexID })), mSimdFP32Ty);
+Value* pDest = GEP(pVtxOut, C(fetchState.VertexIdElementOffset * 4 +
fetchState.VertexIdComponentNumber), "vertexID");
+STORE(pId, pDest);
+}
+}
+
//
/// @brief Loads attributes from memory using LOADs, shuffling the
/// components into SOA form.
/// *Note* currently does not support component control,
-/// component packing, instancing, InstanceID SGVs, or VertexID SGVs
+/// component packing, instancing
/// @param fetchState - info about attributes to be fetched from memory
/// @param streams - value pointer to the current vertex stream
/// @param vIndices - vector value of indices to load
@@ -774,23 +795,6 @@ void FetchJit::JitGatherVertices(const FETCH_COMPILE_STATE
&fetchState, Value* f
CreateGatherOddFormats((SWR_FORMAT)ied.Format, pStreamBase,
vOffsets, pResults);
ConvertFormat((SWR_FORMAT)ied.Format, pResults);
-// check for InstanceID SGV
-if (fetchState.InstanceIdEnable &&
(fetchState.InstanceIdElementOffset == nInputElt))
-{
-SWR_ASSERT(fetchState.InstanceIdComponentNumber <
(sizeof(pResults) / sizeof(pResults[0])));
-
-// Load a SIMD of InstanceIDs
-pResults[fetchState.InstanceIdComponentNumber] =
VBROADCAST(LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance })));//
InstanceID
-}
-// check for VertexID SGV
-else if (fetchState.VertexIdEnable &&
(fetchState.VertexIdElementOffset == nInputElt))
-{
-SWR_ASSERT(fetchState.VertexIdComponentNumber <
(sizeof(pResults) / sizeof(pResults[0])));
-
-// Load a SIMD of VertexIDs
-pResults[fetchState.VertexIdComponentNumber] =
LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID }));
-}
-
StoreVertexElement
Mesa (master): swr: [rasterizer jitter] unitialized component fix in fetch jit
Module: Mesa
Branch: master
Commit: 42215e61168edb01482cbfe4dcf5031613e5e4c5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=42215e61168edb01482cbfe4dcf5031613e5e4c5
Author: Tim Rowley
Date: Thu Jun 2 15:24:34 2016 -0600
swr: [rasterizer jitter] unitialized component fix in fetch jit
Was trying to store an extra uninitialized component.
Only affects component packing, which isn't enabled (yet).
Reviewed-by: Bruce Cherniak
---
src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
index 71f1a3a..bae0f24 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
@@ -1073,7 +1073,7 @@ void FetchJit::JitGatherVertices(const
FETCH_COMPILE_STATE &fetchState, Value* f
// if we have a partially filled vVertexElement struct, output it
if(currentVertexElement > 0){
-StoreVertexElements(pVtxOut, outputElt++, currentVertexElement+1,
vVertexElements);
+StoreVertexElements(pVtxOut, outputElt++, currentVertexElement,
vVertexElements);
}
}
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Mesa (master): i965: Avoid division by zero.
Module: Mesa
Branch: master
Commit: 01c89ccc5d1529aa1efbae80c8ef641a59abbd93
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=01c89ccc5d1529aa1efbae80c8ef641a59abbd93
Author: Ardinartsev Nikita
Date: Wed Jun 22 18:28:11 2016 -0700
i965: Avoid division by zero.
Fixes regression introduced by af5ca43f2676bff7499f93277f908b681cb821d0
Cc: "12.0 11.2"
Reviewed-by: Matt Turner
Reviewed-by: Kenneth Graunke
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95419
---
src/mesa/drivers/dri/i965/gen7_urb.c | 26 +++---
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c
b/src/mesa/drivers/dri/i965/gen7_urb.c
index 387ed2e..797d1b6 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -300,17 +300,21 @@ gen7_upload_urb(struct brw_context *brw)
remaining_space -= vs_additional;
total_wants -= vs_wants;
- unsigned hs_additional = (unsigned)
- round(hs_wants * (((double) remaining_space) / total_wants));
- hs_chunks += hs_additional;
- remaining_space -= hs_additional;
- total_wants -= hs_wants;
-
- unsigned ds_additional = (unsigned)
- round(ds_wants * (((double) remaining_space) / total_wants));
- ds_chunks += ds_additional;
- remaining_space -= ds_additional;
- total_wants -= ds_wants;
+ if (total_wants > 0) {
+ unsigned hs_additional = (unsigned)
+round(hs_wants * (((double) remaining_space) / total_wants));
+ hs_chunks += hs_additional;
+ remaining_space -= hs_additional;
+ total_wants -= hs_wants;
+ }
+
+ if (total_wants > 0) {
+ unsigned ds_additional = (unsigned)
+round(ds_wants * (((double) remaining_space) / total_wants));
+ ds_chunks += ds_additional;
+ remaining_space -= ds_additional;
+ total_wants -= ds_wants;
+ }
gs_chunks += remaining_space;
}
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Mesa (master): i965/blorp: Use prog data counters to guide sf/sbe setup
Module: Mesa
Branch: master
Commit: f5e8575ab474f0b30e37b527b47ebb0b03bf6997
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f5e8575ab474f0b30e37b527b47ebb0b03bf6997
Author: Topi Pohjolainen
Date: Sun May 15 11:34:37 2016 +0300
i965/blorp: Use prog data counters to guide sf/sbe setup
just as core upload logic does.
Signed-off-by: Topi Pohjolainen
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_blorp.c | 3 ++-
src/mesa/drivers/dri/i965/brw_blorp.h | 8 +++-
src/mesa/drivers/dri/i965/gen6_blorp.c | 10 --
src/mesa/drivers/dri/i965/gen7_blorp.c | 10 --
src/mesa/drivers/dri/i965/gen8_blorp.c | 15 ---
5 files changed, 37 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 9590968..ce37838 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -142,7 +142,6 @@ brw_blorp_params_init(struct brw_blorp_params *params)
memset(params, 0, sizeof(*params));
params->hiz_op = GEN6_HIZ_OP_NONE;
params->fast_clear_op = 0;
- params->num_varyings = 0;
params->num_draw_buffers = 1;
params->num_layers = 1;
}
@@ -232,6 +231,8 @@ brw_blorp_compile_nir_shader(struct brw_context *brw,
struct nir_shader *nir,
prog_data->first_curbe_grf_2 = wm_prog_data.dispatch_grf_start_reg_2;
prog_data->ksp_offset_2 = wm_prog_data.prog_offset_2;
prog_data->persample_msaa_dispatch = wm_prog_data.persample_dispatch;
+ prog_data->flat_inputs = wm_prog_data.flat_inputs;
+ prog_data->num_varying_inputs = wm_prog_data.num_varying_inputs;
prog_data->nr_params = wm_prog_data.base.nr_params;
for (unsigned i = 0; i < ARRAY_SIZE(param); i++)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
b/src/mesa/drivers/dri/i965/brw_blorp.h
index 7ec5875..b895e39 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -223,6 +223,13 @@ struct brw_blorp_prog_data
*/
bool persample_msaa_dispatch;
+ /**
+* Mask of which FS inputs are marked flat by the shader source. This is
+* needed for setting up 3DSTATE_SF/SBE.
+*/
+ uint32_t flat_inputs;
+ unsigned num_varying_inputs;
+
/* The compiler will re-arrange push constants and store the upload order
* here. Given an index 'i' in the final upload buffer, param[i] gives the
* index in the uniform store. In other words, the value to be uploaded can
@@ -249,7 +256,6 @@ struct brw_blorp_params
};
bool color_write_disable[4];
struct brw_blorp_wm_push_constants wm_push_consts;
- unsigned num_varyings;
unsigned num_draw_buffers;
unsigned num_layers;
uint32_t wm_prog_kernel;
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.c
b/src/mesa/drivers/dri/i965/gen6_blorp.c
index 5f84ab0..317a5f2 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.c
@@ -597,16 +597,22 @@ static void
gen6_blorp_emit_sf_config(struct brw_context *brw,
const struct brw_blorp_params *params)
{
+ const unsigned num_varyings =
+ params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0;
+
BEGIN_BATCH(20);
OUT_BATCH(_3DSTATE_SF << 16 | (20 - 2));
- OUT_BATCH(params->num_varyings << GEN6_SF_NUM_OUTPUTS_SHIFT |
+ OUT_BATCH(num_varyings << GEN6_SF_NUM_OUTPUTS_SHIFT |
1 << GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT |
BRW_SF_URB_ENTRY_READ_OFFSET <<
GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT);
OUT_BATCH(0); /* dw2 */
OUT_BATCH(params->dst.num_samples > 1 ? GEN6_SF_MSRAST_ON_PATTERN : 0);
- for (int i = 0; i < 16; ++i)
+ for (int i = 0; i < 13; ++i)
OUT_BATCH(0);
+ OUT_BATCH(params->wm_prog_data ? params->wm_prog_data->flat_inputs : 0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
ADVANCE_BATCH();
}
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.c
b/src/mesa/drivers/dri/i965/gen7_blorp.c
index 235f0b5..92617db 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.c
@@ -443,15 +443,21 @@ gen7_blorp_emit_sf_config(struct brw_context *brw,
/* 3DSTATE_SBE */
{
+ const unsigned num_varyings =
+ params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0;
+
BEGIN_BATCH(14);
OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2));
OUT_BATCH(GEN7_SBE_SWIZZLE_ENABLE |
-params->num_varyings << GEN7_SBE_NUM_OUTPUTS_SHIFT |
+num_varyings << GEN7_SBE_NUM_OUTPUTS_SHIFT |
1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
BRW_SF_URB_ENTRY_READ_OFFSET <<
GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT);
- for (int i = 0; i < 12; ++i)
+ for (int i = 0; i < 9; ++i)
OUT_BATCH(0);
+ OUT_BATCH(params->wm_prog_data ? params->wm_prog_data->flat_inputs : 0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
ADVANCE_BATCH
Mesa (master): i965/blorp: Disable vertex element swizzling
Module: Mesa Branch: master Commit: 3487d2e7bfc3625eee8bf87cee28cf2950e314cc URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3487d2e7bfc3625eee8bf87cee28cf2950e314cc Author: Topi Pohjolainen Date: Wed May 18 16:18:59 2016 +0300 i965/blorp: Disable vertex element swizzling Without vertex elements originating directly from vertex fetcher are not passed to wm-state correctly. Signed-off-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen7_blorp.c | 11 +-- src/mesa/drivers/dri/i965/gen8_blorp.c | 11 +-- 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.c b/src/mesa/drivers/dri/i965/gen7_blorp.c index e114586..3a8643f 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.c +++ b/src/mesa/drivers/dri/i965/gen7_blorp.c @@ -448,8 +448,15 @@ gen7_blorp_emit_sf_config(struct brw_context *brw, BEGIN_BATCH(14); OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2)); - OUT_BATCH(GEN7_SBE_SWIZZLE_ENABLE | -num_varyings << GEN7_SBE_NUM_OUTPUTS_SHIFT | + + /* There is no need for swizzling (GEN7_SBE_SWIZZLE_ENABLE). All the + * vertex data coming from vertex fetcher is taken as unmodified + * (i.e., passed through). Vertex shader state is disabled and vertex + * fetcher builds complete vertex entries including VUE header. + * This is for unknown reason really needed to be disabled when more + * than one vec4 worth of vertex attributes are needed. + */ + OUT_BATCH(num_varyings << GEN7_SBE_NUM_OUTPUTS_SHIFT | 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | BRW_SF_URB_ENTRY_READ_OFFSET << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT); diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.c b/src/mesa/drivers/dri/i965/gen8_blorp.c index a7c6ff0..77ec11f 100644 --- a/src/mesa/drivers/dri/i965/gen8_blorp.c +++ b/src/mesa/drivers/dri/i965/gen8_blorp.c @@ -301,8 +301,15 @@ gen8_blorp_emit_sbe_state(struct brw_context *brw, const unsigned sbe_cmd_length = brw->gen == 8 ? 4 : 6; BEGIN_BATCH(sbe_cmd_length); OUT_BATCH(_3DSTATE_SBE << 16 | (sbe_cmd_length - 2)); - OUT_BATCH(GEN7_SBE_SWIZZLE_ENABLE | -num_varyings << GEN7_SBE_NUM_OUTPUTS_SHIFT | + + /* There is no need for swizzling (GEN7_SBE_SWIZZLE_ENABLE). All the + * vertex data coming from vertex fetcher is taken as unmodified + * (i.e., passed through). Vertex shader state is disabled and vertex + * fetcher builds complete vertex entries including VUE header. + * This is for unknown reason really needed to be disabled when more + * than one vec4 worth of vertex attributes are needed. + */ + OUT_BATCH(num_varyings << GEN7_SBE_NUM_OUTPUTS_SHIFT | 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | BRW_SF_URB_ENTRY_READ_OFFSET << GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT | ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i965/blorp: Use prog data counters to guide wm/ps setup
Module: Mesa
Branch: master
Commit: 874f2e952363a070f373f44c849ef9d1ededeabc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=874f2e952363a070f373f44c849ef9d1ededeabc
Author: Topi Pohjolainen
Date: Wed May 18 16:09:49 2016 +0300
i965/blorp: Use prog data counters to guide wm/ps setup
just as core upload logic does.
Signed-off-by: Topi Pohjolainen
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/gen6_blorp.c | 4 +++-
src/mesa/drivers/dri/i965/gen7_blorp.c | 2 ++
src/mesa/drivers/dri/i965/gen8_blorp.c | 5 +++--
3 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.c
b/src/mesa/drivers/dri/i965/gen6_blorp.c
index 317a5f2..3fc1d57 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.c
@@ -656,7 +656,9 @@ gen6_blorp_emit_wm_config(struct brw_context *brw,
dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5;
dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
dw6 |= 0 << GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT; /* No interp */
- dw6 |= 0 << GEN6_WM_NUM_SF_OUTPUTS_SHIFT; /* No inputs from SF */
+ dw6 |= (params->wm_prog_data ? prog_data->num_varying_inputs : 0) <<
+ GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
+
if (params->wm_prog_data) {
dw5 |= GEN6_WM_DISPATCH_ENABLE; /* We are rendering */
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.c
b/src/mesa/drivers/dri/i965/gen7_blorp.c
index 92617db..bb760e7 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.c
@@ -555,6 +555,8 @@ gen7_blorp_emit_ps_config(struct brw_context *brw,
dw4 |= GEN7_PS_8_DISPATCH_ENABLE;
if (params->wm_prog_data->dispatch_16)
dw4 |= GEN7_PS_16_DISPATCH_ENABLE;
+ if (params->wm_prog_data->num_varying_inputs)
+ dw4 |= GEN7_PS_ATTRIBUTE_ENABLE;
} else {
/* The hardware gets angry if we don't enable at least one dispatch
* mode, so just enable 16-pixel dispatch if we don't have a program.
diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.c
b/src/mesa/drivers/dri/i965/gen8_blorp.c
index 8d696cf..1df2e3b 100644
--- a/src/mesa/drivers/dri/i965/gen8_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen8_blorp.c
@@ -452,10 +452,11 @@ gen8_blorp_emit_ps_extra(struct brw_context *brw,
dw1 |= GEN8_PSX_PIXEL_SHADER_VALID;
- if (params->src.mt) {
+ if (params->src.mt)
dw1 |= GEN8_PSX_KILL_ENABLE;
+
+ if (params->wm_prog_data->num_varying_inputs)
dw1 |= GEN8_PSX_ATTRIBUTE_ENABLE;
- }
if (params->dst.num_samples > 1 && prog_data &&
prog_data->persample_msaa_dispatch)
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Mesa (master): i965/blorp: Let program data tell if push constants are needed
Module: Mesa
Branch: master
Commit: 12783aac506e25e10f28c26429c9b500d908af41
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=12783aac506e25e10f28c26429c9b500d908af41
Author: Topi Pohjolainen
Date: Mon May 16 10:18:53 2016 +0300
i965/blorp: Let program data tell if push constants are needed
Signed-off-by: Topi Pohjolainen
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/gen6_blorp.c | 8 ++--
src/mesa/drivers/dri/i965/gen7_blorp.c | 16 +++-
src/mesa/drivers/dri/i965/gen8_blorp.c | 26 ++
3 files changed, 35 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.c
b/src/mesa/drivers/dri/i965/gen6_blorp.c
index 3fc1d57..7871a01 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.c
@@ -1022,7 +1022,11 @@ gen6_blorp_exec(struct brw_context *brw,
if (params->wm_prog_data) {
uint32_t wm_surf_offset_renderbuffer;
uint32_t wm_surf_offset_texture = 0;
- wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params);
+
+ if (params->wm_prog_data->nr_params) {
+ wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params);
+ }
+
intel_miptree_used_for_rendering(params->dst.mt);
wm_surf_offset_renderbuffer =
gen6_blorp_emit_surface_state(brw, params, ¶ms->dst,
@@ -1048,7 +1052,7 @@ gen6_blorp_exec(struct brw_context *brw,
gen6_blorp_emit_gs_disable(brw, params);
gen6_blorp_emit_clip_disable(brw);
gen6_blorp_emit_sf_config(brw, params);
- if (params->wm_prog_data)
+ if (params->wm_prog_data && params->wm_prog_data->nr_params)
gen6_blorp_emit_constant_ps(brw, params, wm_push_const_offset);
else
gen6_blorp_emit_constant_ps_disable(brw, params);
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.c
b/src/mesa/drivers/dri/i965/gen7_blorp.c
index bb760e7..e114586 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.c
@@ -543,7 +543,8 @@ gen7_blorp_emit_ps_config(struct brw_context *brw,
if (brw->is_haswell)
dw4 |= SET_FIELD(1, HSW_PS_SAMPLE_MASK); /* 1 sample for now */
if (params->wm_prog_data) {
- dw4 |= GEN7_PS_PUSH_CONSTANT_ENABLE;
+ if (params->wm_prog_data->nr_params)
+ dw4 |= GEN7_PS_PUSH_CONSTANT_ENABLE;
dw5 |= prog_data->first_curbe_grf_0 <<
GEN7_PS_DISPATCH_START_GRF_SHIFT_0;
dw5 |= prog_data->first_curbe_grf_2 <<
GEN7_PS_DISPATCH_START_GRF_SHIFT_2;
@@ -847,7 +848,11 @@ gen7_blorp_exec(struct brw_context *brw,
if (params->wm_prog_data) {
uint32_t wm_surf_offset_renderbuffer;
uint32_t wm_surf_offset_texture = 0;
- wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params);
+
+ if (params->wm_prog_data->nr_params) {
+ wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params);
+ }
+
intel_miptree_used_for_rendering(params->dst.mt);
wm_surf_offset_renderbuffer =
gen7_blorp_emit_surface_state(brw, ¶ms->dst,
@@ -874,12 +879,13 @@ gen7_blorp_exec(struct brw_context *brw,
gen6_blorp_emit_clip_disable(brw);
gen7_blorp_emit_sf_config(brw, params);
gen7_blorp_emit_wm_config(brw, params);
- if (params->wm_prog_data) {
+ if (params->wm_prog_data)
gen7_blorp_emit_binding_table_pointers_ps(brw, wm_bind_bo_offset);
+
+ if (params->wm_prog_data && params->wm_prog_data->nr_params)
gen7_blorp_emit_constant_ps(brw, wm_push_const_offset);
- } else {
+ else
gen7_blorp_emit_constant_ps_disable(brw);
- }
if (params->src.mt) {
const uint32_t sampler_offset =
diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.c
b/src/mesa/drivers/dri/i965/gen8_blorp.c
index 1df2e3b..a7c6ff0 100644
--- a/src/mesa/drivers/dri/i965/gen8_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen8_blorp.c
@@ -393,7 +393,9 @@ gen8_blorp_emit_ps_config(struct brw_context *brw,
dw3 |= 1 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT; /* One surface */
}
- dw6 |= GEN7_PS_PUSH_CONSTANT_ENABLE;
+ if (prog_data->nr_params)
+ dw6 |= GEN7_PS_PUSH_CONSTANT_ENABLE;
+
dw7 |= prog_data->first_curbe_grf_0 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0;
dw7 |= prog_data->first_curbe_grf_2 << GEN7_PS_DISPATCH_START_GRF_SHIFT_2;
@@ -563,6 +565,7 @@ gen8_blorp_emit_depth_stencil_state(struct brw_context *brw,
static void
gen8_blorp_emit_constant_ps(struct brw_context *brw,
+const struct brw_blorp_params *params,
uint32_t wm_push_const_offset)
{
const int dwords = brw->gen >= 8 ? 11 : 7;
@@ -571,9 +574,9 @@ gen8_blorp_emit_constant_ps(struct brw_context *brw,
if (brw->gen >= 9) {
OUT_BATCH(0);
- OUT_BATCH(BRW_BLORP_NUM_PUSH_CONST_REGS);
+ OUT_BATCH(params->wm_prog_data->nr_params);
} else {
- OUT_BATCH(BRW_BLORP_NUM_PUSH_CONST_REGS);
+ OUT_BATCH(params->wm_prog_data->nr_params);
OUT_BATCH(0);
}
Mesa (master): glsl: Make lower_const_arrays_to_uniforms work directly on constants.
Module: Mesa Branch: master Commit: ef78df8d3b0cf540e5f08c8c2f6caa338b64a6c7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ef78df8d3b0cf540e5f08c8c2f6caa338b64a6c7 Author: Kenneth Graunke Date: Fri Apr 29 18:05:26 2016 -0700 glsl: Make lower_const_arrays_to_uniforms work directly on constants. There's really no point in looking at ir_dereference_array of a constant. It also misses cases like: (assign () (var_ref tmp) (constant (array ...) ...)) No changes in shader-db, but keeps it working after the next commit. Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Kenneth Graunke Reviewed-by: Timothy Arceri --- src/compiler/glsl/lower_const_arrays_to_uniforms.cpp | 11 +++ 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/src/compiler/glsl/lower_const_arrays_to_uniforms.cpp b/src/compiler/glsl/lower_const_arrays_to_uniforms.cpp index 2d024d4..9948150 100644 --- a/src/compiler/glsl/lower_const_arrays_to_uniforms.cpp +++ b/src/compiler/glsl/lower_const_arrays_to_uniforms.cpp @@ -70,17 +70,13 @@ lower_const_array_visitor::handle_rvalue(ir_rvalue **rvalue) if (!*rvalue) return; - ir_dereference_array *dra = (*rvalue)->as_dereference_array(); - if (!dra) - return; - - ir_constant *con = dra->array->as_constant(); + ir_constant *con = (*rvalue)->as_constant(); if (!con || !con->type->is_array()) return; void *mem_ctx = ralloc_parent(con); - char *uniform_name = ralloc_asprintf(mem_ctx, "constarray__%p", dra); + char *uniform_name = ralloc_asprintf(mem_ctx, "constarray__%p", con); ir_variable *uni = new(mem_ctx) ir_variable(con->type, uniform_name, ir_var_uniform); @@ -93,8 +89,7 @@ lower_const_array_visitor::handle_rvalue(ir_rvalue **rvalue) uni->data.max_array_access = uni->type->length - 1; instructions->push_head(uni); - ir_dereference_variable *varref = new(mem_ctx) ir_dereference_variable(uni); - *rvalue = new(mem_ctx) ir_dereference_array(varref, dra->array_index); + *rvalue = new(mem_ctx) ir_dereference_variable(uni); progress = true; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): glsl: Split arrays even in the presence of whole-array copies.
Module: Mesa
Branch: master
Commit: c264fdbc073a0dfc393f53a8be880f535fd4b988
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c264fdbc073a0dfc393f53a8be880f535fd4b988
Author: Kenneth Graunke
Date: Mon Jun 20 11:20:51 2016 -0700
glsl: Split arrays even in the presence of whole-array copies.
Previously, we failed to split constant arrays. Code such as
int[2] numbers = int[](1, 2);
would generates a whole-array assignment:
(assign () (var_ref numbers)
(constant (array int 4) (constant int 1) (constant int 2)))
opt_array_splitting generally tried to visit ir_dereference_array nodes,
and avoid recursing into the inner ir_dereference_variable. So if it
ever saw a ir_dereference_variable, it assumed this was a whole-array
read and bailed. However, in the above case, there's no array deref,
and we can totally handle it - we just have to "unroll" the assignment,
creating assignments for each element.
This was mitigated by the fact that we constant propagate whole arrays,
so a dereference of a single component would usually get the desired
single value anyway. However, I plan to stop doing that shortly;
early experiments with disabling constant propagation of arrays
revealed this shortcoming.
This patch causes some arrays in Gl32GSCloth's geometry shaders to be
split, which allows other optimizations to eliminate unused GS inputs.
The VS then doesn't have to write them, which eliminates the entire VS
(5 -> 2 instructions). It still renders correctly.
No other change in shader-db.
v2: Drop !AOA check and improve a comment (feedback from Tim Arceri).
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
Reviewed-by: Timothy Arceri
---
src/compiler/glsl/opt_array_splitting.cpp | 55 +++
1 file changed, 55 insertions(+)
diff --git a/src/compiler/glsl/opt_array_splitting.cpp
b/src/compiler/glsl/opt_array_splitting.cpp
index a294da5..e3073b0 100644
--- a/src/compiler/glsl/opt_array_splitting.cpp
+++ b/src/compiler/glsl/opt_array_splitting.cpp
@@ -93,6 +93,7 @@ public:
{
this->mem_ctx = ralloc_context(NULL);
this->variable_list.make_empty();
+ this->in_whole_array_copy = false;
}
~ir_array_reference_visitor(void)
@@ -104,6 +105,8 @@ public:
virtual ir_visitor_status visit(ir_variable *);
virtual ir_visitor_status visit(ir_dereference_variable *);
+ virtual ir_visitor_status visit_enter(ir_assignment *);
+ virtual ir_visitor_status visit_leave(ir_assignment *);
virtual ir_visitor_status visit_enter(ir_dereference_array *);
virtual ir_visitor_status visit_enter(ir_function_signature *);
@@ -113,6 +116,8 @@ public:
exec_list variable_list;
void *mem_ctx;
+
+ bool in_whole_array_copy;
};
} /* namespace */
@@ -158,10 +163,33 @@ ir_array_reference_visitor::visit(ir_variable *ir)
}
ir_visitor_status
+ir_array_reference_visitor::visit_enter(ir_assignment *ir)
+{
+ in_whole_array_copy =
+ ir->lhs->type->is_array() && ir->whole_variable_written();
+
+ return visit_continue;
+}
+
+ir_visitor_status
+ir_array_reference_visitor::visit_leave(ir_assignment *ir)
+{
+ in_whole_array_copy = false;
+
+ return visit_continue;
+}
+
+ir_visitor_status
ir_array_reference_visitor::visit(ir_dereference_variable *ir)
{
variable_entry *entry = this->get_variable_entry(ir->var);
+ /* Allow whole-array assignments on the LHS. We can split those
+* by "unrolling" the assignment into component-wise assignments.
+*/
+ if (in_assignee && in_whole_array_copy)
+ return visit_continue;
+
/* If we made it to here without seeing an ir_dereference_array,
* then the dereference of this array didn't have a constant index
* (see the visit_continue_with_parent below), so we can't split
@@ -350,6 +378,33 @@ ir_array_splitting_visitor::visit_leave(ir_assignment *ir)
*/
ir_rvalue *lhs = ir->lhs;
+ /* "Unroll" any whole array assignments, creating assignments for
+* each array element. Then, do splitting on each new assignment.
+*/
+ if (lhs->type->is_array() && ir->whole_variable_written() &&
+ get_splitting_entry(ir->whole_variable_written())) {
+ void *mem_ctx = ralloc_parent(ir);
+
+ for (unsigned i = 0; i < lhs->type->length; i++) {
+ ir_rvalue *lhs_i =
+new(mem_ctx) ir_dereference_array(ir->lhs->clone(mem_ctx, NULL),
+ new(mem_ctx) ir_constant(i));
+ ir_rvalue *rhs_i =
+new(mem_ctx) ir_dereference_array(ir->rhs->clone(mem_ctx, NULL),
+ new(mem_ctx) ir_constant(i));
+ ir_rvalue *condition_i =
+ir->condition ? ir->condition->clone(mem_ctx, NULL) : NULL;
+
+ ir_assignment *assign_i =
+new(mem_ctx) ir_assignment(lhs_i, rhs_i, condition_i);
+
+ ir->insert_before(assign_i);
+ assign_i->accept(this);
+ }
+ ir->remov
Mesa (master): i965: Copy propagate before doing variable index lowering.
Module: Mesa Branch: master Commit: f7741c521119ce147215d94a4c238e84fc8b1130 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7741c521119ce147215d94a4c238e84fc8b1130 Author: Kenneth Graunke Date: Fri Apr 29 21:12:15 2016 -0700 i965: Copy propagate before doing variable index lowering. The scalar backend currently doesn't support variable indexing on temporary arrays, but it does support it on uniform arrays, and some stages support it for input arrays. Make sure these are propagated through before exploding indirects into piles of if-ladders unnecessarily. On Broadwell, no instruction count change in shader-db. total cycles in shared programs: 80675652 -> 80674928 (-0.00%) cycles in affected programs: 649972 -> 649248 (-0.11%) helped: 386 HURT: 165 This will help avoid code quality regressions in a future commit. Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Kenneth Graunke Reviewed-by: Timothy Arceri --- src/mesa/drivers/dri/i965/brw_link.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp index 3bb04fa..76c580b 100644 --- a/src/mesa/drivers/dri/i965/brw_link.cpp +++ b/src/mesa/drivers/dri/i965/brw_link.cpp @@ -130,6 +130,8 @@ process_glsl_ir(gl_shader_stage stage, lower_noise(shader->ir); lower_quadop_vector(shader->ir, false); + do_copy_propagation(shader->ir); + bool lowered_variable_indexing = lower_variable_index_to_cond_assign((gl_shader_stage)stage, shader->ir, ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): glsl: Propagate invariant/ precise after lowering const arrays.
Module: Mesa Branch: master Commit: 586f4a42e78f171c28c3ae37adb8671e09bd74b4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=586f4a42e78f171c28c3ae37adb8671e09bd74b4 Author: Kenneth Graunke Date: Tue Jun 21 17:42:59 2016 -0700 glsl: Propagate invariant/precise after lowering const arrays. The new uniform may need precise as well. Fixes copy propagation of constant array uniforms in Tomb Raider shaders. Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Kenneth Graunke Reviewed-by: Timothy Arceri --- src/compiler/glsl/linker.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp index c7cf56e..3bcb907 100644 --- a/src/compiler/glsl/linker.cpp +++ b/src/compiler/glsl/linker.cpp @@ -4760,6 +4760,7 @@ link_shaders(struct gl_context *ctx, struct gl_shader_program *prog) ; lower_const_arrays_to_uniforms(prog->_LinkedShaders[i]->ir); + propagate_invariance(prog->_LinkedShaders[i]->ir); } /* Validation for special cases where we allow sampler array indexing ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): glsl: Make constant propagation' s folder not propagate into an LHS.
Module: Mesa
Branch: master
Commit: acf544404472488eec85fff249cbface7fa477b1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=acf544404472488eec85fff249cbface7fa477b1
Author: Kenneth Graunke
Date: Mon Jun 20 16:48:02 2016 -0700
glsl: Make constant propagation's folder not propagate into an LHS.
opt_constant_propagation.cpp contains constant folding code which can
actually do constant propagation in some cases. It was happily
propagating constants into the left-hand-side of assignments.
For example,
(assign () (var_ref temp) (constant ...))
would brilliantly be turned into:
(assign () (constant ...) (constant ))
This is a bigger hammer than necessary - it prevents propagation
into the left-hand-side altogether. We could certainly do better
someday. Notably, the constant propagation pass itself already
takes this approach - it's just the constant propagation pass's
built-in constant folding code (which actually propagates, too)
that was broken.
No change in shader-db, but prevents regressions after future commits.
It seems plausible that this could be hit today, but I haven't seen it
happen.
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
Reviewed-by: Timothy Arceri
---
src/compiler/glsl/opt_constant_propagation.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/glsl/opt_constant_propagation.cpp
b/src/compiler/glsl/opt_constant_propagation.cpp
index fbc22b0..6ec4ab4 100644
--- a/src/compiler/glsl/opt_constant_propagation.cpp
+++ b/src/compiler/glsl/opt_constant_propagation.cpp
@@ -138,7 +138,7 @@ public:
void
ir_constant_propagation_visitor::constant_folding(ir_rvalue **rvalue)
{
- if (*rvalue == NULL)
+ if (this->in_assignee || *rvalue == NULL)
return;
if (ir_constant_fold(rvalue))
___
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Mesa (master): glsl: Don't constant propagate arrays.
Module: Mesa
Branch: master
Commit: fb857b5eea43640bfe19dcc12a88a09a6448e55a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb857b5eea43640bfe19dcc12a88a09a6448e55a
Author: Kenneth Graunke
Date: Fri Apr 29 17:57:46 2016 -0700
glsl: Don't constant propagate arrays.
Constant propagation on arrays doesn't make a lot of sense. If the
array is only accessed with constant indexes, then opt_array_splitting
would split it up. Otherwise, we have variable indexing. If there's
multiple accesses, then constant propagation would end up replicating
the data.
The lower_const_arrays_to_uniforms pass creates uniforms for each
ir_constant with array type that it encounters. This means that it
creates redundant uniforms for each copy of the constant, which means
uploading too much data. It can even mean exceeding the maximum number
of uniform components, causing link failures.
We could try and teach the pass to de-duplicate the data by hashing
constants, but it makes more sense to avoid duplicating it in the first
place. We should promote constant arrays to uniforms, then propagate
the uniform access.
Fixes the TressFX shaders from Tomb Raider, which exceeded the maximum
number of uniform components by a huge margin and failed to link.
On Broadwell:
total instructions in shared programs: 9067702 -> 9068202 (0.01%)
instructions in affected programs: 10335 -> 10835 (4.84%)
helped: 10 (Hoard, Shadow of Mordor, Amnesia: The Dark Descent)
HURT: 20 (Natural Selection 2)
loops in affected programs: 4 -> 0
The hurt programs appear to no longer have a constarray uniform, as
all constants were successfully propagated. Apparently before this
patch, we successfully unrolled a loop containing array access, but
only after promoting constant arrays to uniforms. With this patch,
we unroll it first, so all array access is direct, and the array
is split up, and individual constants are propagated. This seems
better.
Cc: mesa-sta...@lists.freedesktop.org
Reported-by: Karol Herbst
Signed-off-by: Kenneth Graunke
Reviewed-by: Timothy Arceri
---
src/compiler/glsl/opt_constant_propagation.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/glsl/opt_constant_propagation.cpp
b/src/compiler/glsl/opt_constant_propagation.cpp
index 6ec4ab4..69bca74 100644
--- a/src/compiler/glsl/opt_constant_propagation.cpp
+++ b/src/compiler/glsl/opt_constant_propagation.cpp
@@ -145,7 +145,7 @@ ir_constant_propagation_visitor::constant_folding(ir_rvalue
**rvalue)
this->progress = true;
ir_dereference_variable *var_ref = (*rvalue)->as_dereference_variable();
- if (var_ref) {
+ if (var_ref && !var_ref->type->is_array()) {
ir_constant *constant = var_ref->constant_expression_value();
if (constant) {
*rvalue = constant;
___
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Mesa (master): i965: Implement rasterizer discard via SOL unless required for queries.
Module: Mesa
Branch: master
Commit: b0629e6894513a2c49a018bc3342a4e55435a236
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0629e6894513a2c49a018bc3342a4e55435a236
Author: Kenneth Graunke
Date: Wed Jun 22 11:25:26 2016 -0700
i965: Implement rasterizer discard via SOL unless required for queries.
We currently use CL_INVOCATION_COUNT for the GL_PRIMITIVES_GENERATED
query, which involves passing all primitives to the clipper. When
rasterizer discard is enabled, we program the clipper in REJECT_ALL
mode, rather than using the SOL stage's "Rendering Disable" feature.
See commit f09b91f78247409f54c975f56cb10d5f350fe64e for an explanation
of why we implement GL_PRIMITIVES_GENERATED this way.
Apparently the SOL stage's "Rendering Disable" feature is a lot faster
than having the clipper reject all primitives. It's safe to use when
no GL_PRIMITIVES_GENERATED query is active, as we don't care about
CL_INVOCATION_COUNT incrementing.
This patch makes us use SO_RENDERING_DISABLE when no query is active,
but continues falling back to the clipper in REJECT_ALL mode when the
queries are enabled. It brings back the perf_debug for the clipper
case (which I removed in commit 1f9445ff57b, thinking it wasn't useful).
Improves performance in Gl32GSCloth by 84.8303% +/- 2.07132% (n = 10)
on my Broadwell GT2 laptop.
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
Reviewed-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/gen6_queryobj.c | 4
src/mesa/drivers/dri/i965/gen7_sol_state.c | 17 +
2 files changed, 21 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/gen6_queryobj.c
b/src/mesa/drivers/dri/i965/gen6_queryobj.c
index f36f095..96db5e9 100644
--- a/src/mesa/drivers/dri/i965/gen6_queryobj.c
+++ b/src/mesa/drivers/dri/i965/gen6_queryobj.c
@@ -307,6 +307,8 @@ gen6_begin_query(struct gl_context *ctx, struct
gl_query_object *q)
case GL_PRIMITIVES_GENERATED:
write_primitives_generated(brw, query->bo, query->Base.Stream, 0);
+ if (query->Base.Stream == 0)
+ ctx->NewDriverState |= BRW_NEW_RASTERIZER_DISCARD;
break;
case GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN:
@@ -359,6 +361,8 @@ gen6_end_query(struct gl_context *ctx, struct
gl_query_object *q)
case GL_PRIMITIVES_GENERATED:
write_primitives_generated(brw, query->bo, query->Base.Stream, 1);
+ if (query->Base.Stream == 0)
+ ctx->NewDriverState |= BRW_NEW_RASTERIZER_DISCARD;
break;
case GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN:
diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c
b/src/mesa/drivers/dri/i965/gen7_sol_state.c
index 6f51040..1775274 100644
--- a/src/mesa/drivers/dri/i965/gen7_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c
@@ -214,6 +214,12 @@ gen7_upload_3dstate_so_decl_list(struct brw_context *brw,
ADVANCE_BATCH();
}
+static bool
+query_active(struct gl_query_object *q)
+{
+ return q && q->Active;
+}
+
static void
upload_3dstate_streamout(struct brw_context *brw, bool active,
const struct brw_vue_map *vue_map)
@@ -235,6 +241,16 @@ upload_3dstate_streamout(struct brw_context *brw, bool
active,
dw1 |= SO_FUNCTION_ENABLE;
dw1 |= SO_STATISTICS_ENABLE;
+ /* BRW_NEW_RASTERIZER_DISCARD */
+ if (ctx->RasterDiscard) {
+ if (!query_active(ctx->Query.PrimitivesGenerated[0])) {
+dw1 |= SO_RENDERING_DISABLE;
+ } else {
+perf_debug("Rasterizer discard with a GL_PRIMITIVES_GENERATED "
+ "query active relies on the clipper.");
+ }
+ }
+
/* _NEW_LIGHT */
if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION)
dw1 |= SO_REORDER_TRAILING;
@@ -319,6 +335,7 @@ const struct brw_tracked_state gen7_sol_state = {
.mesa = _NEW_LIGHT,
.brw = BRW_NEW_BATCH |
BRW_NEW_BLORP |
+ BRW_NEW_RASTERIZER_DISCARD |
BRW_NEW_VUE_MAP_GEOM_OUT |
BRW_NEW_TRANSFORM_FEEDBACK,
},
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Mesa (master): i965: Combine 3DSTATE_STREAMOUT emitters and genX_sol_state atoms.
Module: Mesa
Branch: master
Commit: 4db98f8beb990676be0833dda6c37566d0283911
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4db98f8beb990676be0833dda6c37566d0283911
Author: Kenneth Graunke
Date: Wed Jun 22 00:33:46 2016 -0700
i965: Combine 3DSTATE_STREAMOUT emitters and genX_sol_state atoms.
They're basically the same. Let's avoid the code duplication.
v2: Fix SO_BUFFER_ENABLE stuff to only happen on Gen < 8 (caught
by Jason Ekstrand).
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
Reviewed-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_state.h| 2 +-
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 +-
src/mesa/drivers/dri/i965/gen7_sol_state.c | 42 ++---
src/mesa/drivers/dri/i965/gen8_sol_state.c | 90 +---
4 files changed, 37 insertions(+), 99 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index b29412e..a16e876 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -166,7 +166,6 @@ extern const struct brw_tracked_state gen8_wm_state;
extern const struct brw_tracked_state gen8_raster_state;
extern const struct brw_tracked_state gen8_sbe_state;
extern const struct brw_tracked_state gen8_sf_state;
-extern const struct brw_tracked_state gen8_sol_state;
extern const struct brw_tracked_state gen8_sf_clip_viewport;
extern const struct brw_tracked_state gen8_vertices;
extern const struct brw_tracked_state gen8_vf_topology;
@@ -303,6 +302,7 @@ void gen8_upload_ps_extra(struct brw_context *brw,
/* gen7_sol_state.c */
void gen7_upload_3dstate_so_decl_list(struct brw_context *brw,
const struct brw_vue_map *vue_map);
+void gen8_upload_3dstate_so_buffers(struct brw_context *brw);
/* gen8_surface_state.c */
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 0b47ebe..4a20821 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -337,7 +337,7 @@ static const struct brw_tracked_state *gen8_render_atoms[] =
&gen7_te_state,
&gen8_ds_state,
&gen8_gs_state,
- &gen8_sol_state,
+ &gen7_sol_state,
&gen6_clip_state,
&gen8_raster_state,
&gen8_sbe_state,
diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c
b/src/mesa/drivers/dri/i965/gen7_sol_state.c
index 4749cc8..6f51040 100644
--- a/src/mesa/drivers/dri/i965/gen7_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c
@@ -222,7 +222,9 @@ upload_3dstate_streamout(struct brw_context *brw, bool
active,
/* BRW_NEW_TRANSFORM_FEEDBACK */
struct gl_transform_feedback_object *xfb_obj =
ctx->TransformFeedback.CurrentObject;
- uint32_t dw1 = 0, dw2 = 0;
+ const struct gl_transform_feedback_info *linked_xfb_info =
+ &xfb_obj->shader_program->LinkedTransformFeedback;
+ uint32_t dw1 = 0, dw2 = 0, dw3 = 0, dw4 = 0;
int i;
if (active) {
@@ -237,10 +239,12 @@ upload_3dstate_streamout(struct brw_context *brw, bool
active,
if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION)
dw1 |= SO_REORDER_TRAILING;
- for (i = 0; i < 4; i++) {
-if (xfb_obj->Buffers[i]) {
- dw1 |= SO_BUFFER_ENABLE(i);
-}
+ if (brw->gen < 8) {
+ for (i = 0; i < 4; i++) {
+if (xfb_obj->Buffers[i]) {
+ dw1 |= SO_BUFFER_ENABLE(i);
+}
+ }
}
/* We always read the whole vertex. This could be reduced at some
@@ -258,12 +262,30 @@ upload_3dstate_streamout(struct brw_context *brw, bool
active,
dw2 |= SET_FIELD(urb_entry_read_offset, SO_STREAM_3_VERTEX_READ_OFFSET);
dw2 |= SET_FIELD(urb_entry_read_length - 1,
SO_STREAM_3_VERTEX_READ_LENGTH);
+
+ if (brw->gen >= 8) {
+/* Set buffer pitches; 0 means unbound. */
+if (xfb_obj->Buffers[0])
+ dw3 |= linked_xfb_info->Buffers[0].Stride * 4;
+if (xfb_obj->Buffers[1])
+ dw3 |= (linked_xfb_info->Buffers[1].Stride * 4) << 16;
+if (xfb_obj->Buffers[2])
+ dw4 |= linked_xfb_info->Buffers[2].Stride * 4;
+if (xfb_obj->Buffers[3])
+ dw4 |= (linked_xfb_info->Buffers[3].Stride * 4) << 16;
+ }
}
- BEGIN_BATCH(3);
- OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (3 - 2));
+ const int dwords = brw->gen >= 8 ? 5 : 3;
+
+ BEGIN_BATCH(dwords);
+ OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (dwords - 2));
OUT_BATCH(dw1);
OUT_BATCH(dw2);
+ if (dwords > 3) {
+ OUT_BATCH(dw3);
+ OUT_BATCH(dw4);
+ }
ADVANCE_BATCH();
}
@@ -275,7 +297,11 @@ upload_sol_state(struct brw_context *brw)
bool active = _mesa_is_xfb_active_and_unpaused(ctx);
if (active) {
- upload_3dstate_so_buffers(brw);
+ if (brw->gen >= 8)
+ gen8_upload_3dstate_so_buffers(brw);
+ else
+ upload_3dstate_so_buffe
Mesa (master): svga: minor code simplification in svga_context_finish()
Module: Mesa Branch: master Commit: db721da5a366039ec88e2ab2b64e0ea1c551e028 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db721da5a366039ec88e2ab2b64e0ea1c551e028 Author: Brian Paul Date: Wed Jun 22 16:51:15 2016 -0600 svga: minor code simplification in svga_context_finish() Signed-off-by: Brian Paul Reviewed-by: Charmaine Lee --- src/gallium/drivers/svga/svga_context.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/svga/svga_context.c b/src/gallium/drivers/svga/svga_context.c index fa6406c..c7f4aae 100644 --- a/src/gallium/drivers/svga/svga_context.c +++ b/src/gallium/drivers/svga/svga_context.c @@ -369,7 +369,7 @@ svga_context_finish(struct svga_context *svga) struct pipe_fence_handle *fence = NULL; svga_context_flush(svga, &fence); - svga->pipe.screen->fence_finish(screen, fence, PIPE_TIMEOUT_INFINITE); + screen->fence_finish(screen, fence, PIPE_TIMEOUT_INFINITE); screen->fence_reference(screen, &fence, NULL); } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): svga: update some comments in svga_buffer_handle()
Module: Mesa
Branch: master
Commit: 5d0799831725e67a224ef3cbb4ead39e2cebc7e6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d0799831725e67a224ef3cbb4ead39e2cebc7e6
Author: Brian Paul
Date: Wed Jun 22 17:24:12 2016 -0600
svga: update some comments in svga_buffer_handle()
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_resource_buffer_upload.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_resource_buffer_upload.c
b/src/gallium/drivers/svga/svga_resource_buffer_upload.c
index 87d77c5..be4c694 100644
--- a/src/gallium/drivers/svga/svga_resource_buffer_upload.c
+++ b/src/gallium/drivers/svga/svga_resource_buffer_upload.c
@@ -786,19 +786,12 @@ svga_buffer_handle(struct svga_context *svga,
if (sbuf->map.num_ranges) {
if (!sbuf->dma.pending) {
- /*
- * No pending DMA upload yet, so insert a DMA upload command now.
- */
+ /* No pending DMA/update commands yet. */
- /*
- * Migrate the data from swbuf -> hwbuf if necessary.
- */
+ /* Migrate the data from swbuf -> hwbuf if necessary */
ret = svga_buffer_update_hw(svga, sbuf);
if (ret == PIPE_OK) {
-/*
- * Queue a dma command.
- */
-
+/* Emit DMA or UpdateGBImage commands */
ret = svga_buffer_upload_command(svga, sbuf);
if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
svga_context_flush(svga, NULL);
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Mesa (master): svga: minor code refactor for svga_buffer_upload_command()
Module: Mesa
Branch: master
Commit: e82fa96d196ca141e1fd6c215b43219695931684
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e82fa96d196ca141e1fd6c215b43219695931684
Author: Brian Paul
Date: Wed Jun 22 17:18:17 2016 -0600
svga: minor code refactor for svga_buffer_upload_command()
Put the HBS code into a separate function.
Reviewed-by: Charmaine Lee
---
.../drivers/svga/svga_resource_buffer_upload.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_resource_buffer_upload.c
b/src/gallium/drivers/svga/svga_resource_buffer_upload.c
index 1121b78..a89225d 100644
--- a/src/gallium/drivers/svga/svga_resource_buffer_upload.c
+++ b/src/gallium/drivers/svga/svga_resource_buffer_upload.c
@@ -223,6 +223,7 @@ svga_buffer_upload_gb_command(struct svga_context *svga,
struct pipe_resource *dummy;
unsigned i;
+ assert(svga_have_gb_objects(svga));
assert(numBoxes);
assert(sbuf->dma.updates == NULL);
@@ -318,11 +319,13 @@ svga_buffer_upload_gb_command(struct svga_context *svga,
/**
- * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
+ * Issue DMA commands to transfer guest memory to the host.
+ * Note that the memory segments (offset, size) will be patched in
+ * later in the svga_buffer_upload_flush() function.
*/
static enum pipe_error
-svga_buffer_upload_command(struct svga_context *svga,
- struct svga_buffer *sbuf)
+svga_buffer_upload_hb_command(struct svga_context *svga,
+ struct svga_buffer *sbuf)
{
struct svga_winsys_context *swc = svga->swc;
struct svga_winsys_buffer *guest = sbuf->hwbuf;
@@ -336,8 +339,7 @@ svga_buffer_upload_command(struct svga_context *svga,
unsigned surface_flags;
struct pipe_resource *dummy;
- if (svga_have_gb_objects(svga))
- return svga_buffer_upload_gb_command(svga, sbuf);
+ assert(!svga_have_gb_objects(svga));
if (transfer == SVGA3D_WRITE_HOST_VRAM) {
region_flags = SVGA_RELOC_READ;
@@ -394,6 +396,20 @@ svga_buffer_upload_command(struct svga_context *svga,
/**
+ * Issue commands to transfer guest memory to the host.
+ */
+static enum pipe_error
+svga_buffer_upload_command(struct svga_context *svga, struct svga_buffer *sbuf)
+{
+ if (svga_have_gb_objects(svga)) {
+ return svga_buffer_upload_gb_command(svga, sbuf);
+ } else {
+ return svga_buffer_upload_hb_command(svga, sbuf);
+ }
+}
+
+
+/**
* Patch up the upload DMA command reserved by svga_buffer_upload_command
* with the final ranges.
*/
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Mesa (master): svga: add a const qualifier in svga_buffer_upload_piecewise ()
Module: Mesa
Branch: master
Commit: fe762128732df1fafef862a391b4d04ee0467c55
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe762128732df1fafef862a391b4d04ee0467c55
Author: Brian Paul
Date: Wed Jun 22 17:19:58 2016 -0600
svga: add a const qualifier in svga_buffer_upload_piecewise()
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_resource_buffer_upload.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/svga/svga_resource_buffer_upload.c
b/src/gallium/drivers/svga/svga_resource_buffer_upload.c
index a89225d..87d77c5 100644
--- a/src/gallium/drivers/svga/svga_resource_buffer_upload.c
+++ b/src/gallium/drivers/svga/svga_resource_buffer_upload.c
@@ -689,7 +689,7 @@ svga_buffer_upload_piecewise(struct svga_screen *ss,
SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
for (i = 0; i < sbuf->map.num_ranges; ++i) {
- struct svga_buffer_range *range = &sbuf->map.ranges[i];
+ const struct svga_buffer_range *range = &sbuf->map.ranges[i];
unsigned offset = range->start;
unsigned size = range->end - range->start;
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Mesa (master): gbm: Fix comments
Module: Mesa Branch: master Commit: 15d3777b743939062b4f5626cf921631bb764e44 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=15d3777b743939062b4f5626cf921631bb764e44 Author: Gurkirpal Singh Date: Thu Jun 23 16:12:11 2016 +0530 gbm: Fix comments Reviewed-by: Chad Versace --- src/gbm/main/gbm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gbm/main/gbm.c b/src/gbm/main/gbm.c index a464f3c..5a6e758 100644 --- a/src/gbm/main/gbm.c +++ b/src/gbm/main/gbm.c @@ -132,7 +132,7 @@ _gbm_mesa_get_device(int fd) * the file descriptor returned when opening a device such as \c * /dev/dri/card0 * - * \param fd The file descriptor for an backend specific device + * \param fd The file descriptor for a backend specific device * \return The newly created struct gbm_device. The resources associated with * the device should be freed with gbm_device_destroy() when it is no longer * needed. If the creation of the device failed NULL will be returned. @@ -522,7 +522,7 @@ gbm_surface_release_buffer(struct gbm_surface *surf, struct gbm_bo *bo) * * Before starting a new frame, the surface must have a buffer * available for rendering. Initially, a gbm surface will have a free - * buffer, but after one of more buffers have been locked (\sa + * buffer, but after one or more buffers have been locked (\sa * gbm_surface_lock_front_buffer()), the application must check for a * free buffer before rendering. * ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): Remove wrongly repeated words in comments
Module: Mesa
Branch: master
Commit: 60a27ad122128145d28be37e9c0b0bc86a8e5181
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=60a27ad122128145d28be37e9c0b0bc86a8e5181
Author: Giuseppe Bilotta
Date: Thu Jun 23 19:20:18 2016 +0200
Remove wrongly repeated words in comments
Clean up misrepetitions ('if if', 'the the' etc) found throughout the
comments. This has been done manually, after grepping
case-insensitively for duplicate if, is, the, then, do, for, an,
plus a few other typos corrected in fly-by
v2:
* proper commit message and non-joke title;
* replace two 'as is' followed by 'is' to 'as-is'.
v3:
* 'a integer' => 'an integer' and similar (originally spotted by
Jason Ekstrand, I fixed a few other similar ones while at it)
Signed-off-by: Giuseppe Bilotta
Reviewed-by: Chad Versace
---
include/GL/mesa_glinterop.h | 6 +++---
src/compiler/glsl/ast_to_hir.cpp | 2 +-
src/compiler/glsl/glsl_to_nir.cpp | 2 +-
src/compiler/nir/nir.h| 2 +-
src/compiler/nir/nir_instr_set.c | 2 +-
src/compiler/nir/nir_intrinsics.h | 4 ++--
src/compiler/nir/nir_lower_vars_to_ssa.c | 2 +-
src/compiler/nir/nir_lower_wpos_ytransform.c | 2 +-
src/compiler/nir/nir_opt_dead_cf.c| 2 +-
src/compiler/spirv/spirv_to_nir.c | 2 +-
src/gallium/docs/source/context.rst | 2 +-
src/gallium/drivers/freedreno/freedreno_texture.h | 2 +-
src/gallium/drivers/freedreno/ir3/ir3.c | 2 +-
src/gallium/drivers/llvmpipe/lp_state_derived.c | 2 +-
src/gallium/drivers/nouveau/codegen/nv50_ir_util.h| 2 +-
src/gallium/drivers/nouveau/nouveau_buffer.c | 2 +-
src/gallium/drivers/r300/compiler/radeon_dataflow.c | 2 +-
src/gallium/drivers/r300/compiler/radeon_vert_fc.c| 2 +-
src/gallium/drivers/softpipe/sp_state_derived.c | 4 ++--
src/gallium/drivers/svga/svga_format.c| 2 +-
src/gallium/drivers/svga/svga_tgsi_vgpu10.c | 2 +-
src/gallium/drivers/swr/rasterizer/core/backend.h | 4 ++--
src/gallium/drivers/swr/rasterizer/core/state.h | 2 +-
src/gallium/drivers/swr/rasterizer/core/threads.cpp | 2 +-
src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c | 2 +-
src/gallium/drivers/vc4/vc4_qir_schedule.c| 2 +-
src/gallium/include/pipe/p_video_codec.h | 6 +++---
src/gallium/state_trackers/nine/device9.c | 2 +-
src/gbm/main/gbm.c| 2 +-
src/glx/indirect_glx.c| 2 +-
src/gtest/include/gtest/internal/gtest-port.h | 2 +-
src/gtest/src/gtest.cc| 2 +-
src/mesa/drivers/dri/i965/brw_device_info.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c | 2 +-
src/mesa/drivers/dri/i965/brw_performance_monitor.c | 2 +-
src/mesa/drivers/x11/xm_buffer.c | 2 +-
src/mesa/main/dlist.c | 2 +-
src/mesa/main/formatquery.c | 2 +-
src/mesa/main/imports.h | 2 +-
src/mesa/main/texobj.c| 2 +-
src/mesa/program/ir_to_mesa.cpp | 2 +-
src/mesa/state_tracker/st_atom_msaa.c | 2 +-
src/mesa/state_tracker/st_cb_fbo.c| 2 +-
src/mesa/state_tracker/st_glsl_to_tgsi.cpp| 4 ++--
src/mesa/state_tracker/st_mesa_to_tgsi.c | 2 +-
46 files changed, 54 insertions(+), 54 deletions(-)
diff --git a/include/GL/mesa_glinterop.h b/include/GL/mesa_glinterop.h
index c0c20d6..383d7f9 100644
--- a/include/GL/mesa_glinterop.h
+++ b/include/GL/mesa_glinterop.h
@@ -97,7 +97,7 @@ struct mesa_glinterop_device_info {
/* The callee will overwrite it if it supports a lower version.
*
* The caller should check the value and access up-to the version supported
-* by the the callee.
+* by the callee.
*/
/* NOTE: Do not use the MESA_GLINTEROP_DEVICE_INFO_VERSION macro */
uint32_t version;
@@ -125,7 +125,7 @@ struct mesa_glinterop_export_in {
/* The callee will overwrite it if it supports a lower version.
*
* The caller should check the value and access up-to the version supported
-* by the the callee.
+* by the callee.
*/
/* NOTE: Do not use the MESA_GLINTEROP_EXPORT_IN_VERSION macro */
uint32_t version;
@@ -190,7 +190,7 @@ struct mesa_glinterop_export_out {
/* The callee will overwrite it if it supports a lower version.
*
* The caller should check the value and access up-to the version supported
-* by the the callee.
+* by the callee.
*/
/* NOTE: Do not use the MESA_GLINTEROP_EXPORT_OUT_VERSION macro */
uint32_t version;
Mesa (master): gbm: doc fixes
Module: Mesa
Branch: master
Commit: b293e8b470506f3077b1e5db12308ec929d896e7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b293e8b470506f3077b1e5db12308ec929d896e7
Author: Eric Engestrom
Date: Thu Jun 23 12:00:44 2016 +0100
gbm: doc fixes
Signed-off-by: Eric Engestrom
Reviewed-by: Chad Versace
---
src/gbm/main/gbm.c | 6 +++---
src/gbm/main/gbm.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gbm/main/gbm.c b/src/gbm/main/gbm.c
index 6be5b69..a464f3c 100644
--- a/src/gbm/main/gbm.c
+++ b/src/gbm/main/gbm.c
@@ -232,7 +232,7 @@ gbm_bo_get_handle(struct gbm_bo *bo)
/** Get a DMA-BUF file descriptor for the buffer object
*
* This function creates a DMA-BUF (also known as PRIME) file descriptor
- * handle for the buffer object. Eeach call to gbm_bo_get_fd() returns a new
+ * handle for the buffer object. Each call to gbm_bo_get_fd() returns a new
* file descriptor and the caller is responsible for closing the file
* descriptor.
@@ -249,8 +249,8 @@ gbm_bo_get_fd(struct gbm_bo *bo)
/** Write data into the buffer object
*
* If the buffer object was created with the GBM_BO_USE_WRITE flag,
- * this function can used to write data into the buffer object. The
- * data is copied directly into the object and it's the responsiblity
+ * this function can be used to write data into the buffer object. The
+ * data is copied directly into the object and it's the responsibility
* of the caller to make sure the data represents valid pixel data,
* according to the width, height, stride and format of the buffer object.
*
diff --git a/src/gbm/main/gbm.h b/src/gbm/main/gbm.h
index 8a2f2a6..293cae6 100644
--- a/src/gbm/main/gbm.h
+++ b/src/gbm/main/gbm.h
@@ -207,7 +207,7 @@ enum gbm_bo_flags {
GBM_BO_USE_RENDERING= (1 << 2),
/**
* Buffer can be used for gbm_bo_write. This is guaranteed to work
-* with GBM_BO_USE_CURSOR. but may not work for other combinations.
+* with GBM_BO_USE_CURSOR, but may not work for other combinations.
*/
GBM_BO_USE_WRITE= (1 << 3),
/**
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Mesa (master): anv: Add anv_render_pass_attachment::store_op
Module: Mesa
Branch: master
Commit: a0f3c3c9d4002ffc1dd987c816a1462e4a91a5f4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0f3c3c9d4002ffc1dd987c816a1462e4a91a5f4
Author: Chad Versace
Date: Wed Jun 22 09:17:41 2016 -0700
anv: Add anv_render_pass_attachment::store_op
Will be needed for resolving auxiliary surfaces.
I didn't add anv_render_pass_attachment::stencil_store_op, as the driver
would likely never use it, as stencil surfaces never have auxiliary
surfaces.
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_pass.c| 3 +--
src/intel/vulkan/anv_private.h | 1 +
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_pass.c b/src/intel/vulkan/anv_pass.c
index b740754..69c3c7e 100644
--- a/src/intel/vulkan/anv_pass.c
+++ b/src/intel/vulkan/anv_pass.c
@@ -60,9 +60,8 @@ VkResult anv_CreateRenderPass(
att->format = pCreateInfo->pAttachments[i].format;
att->samples = pCreateInfo->pAttachments[i].samples;
att->load_op = pCreateInfo->pAttachments[i].loadOp;
+ att->store_op = pCreateInfo->pAttachments[i].storeOp;
att->stencil_load_op = pCreateInfo->pAttachments[i].stencilLoadOp;
- // att->store_op = pCreateInfo->pAttachments[i].storeOp;
- // att->stencil_store_op = pCreateInfo->pAttachments[i].stencilStoreOp;
}
uint32_t subpass_attachment_count = 0, *p;
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 50b860c..8c2ffd8 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1812,6 +1812,7 @@ struct anv_render_pass_attachment {
VkFormat format;
uint32_t samples;
VkAttachmentLoadOp load_op;
+ VkAttachmentStoreOp store_op;
VkAttachmentLoadOp stencil_load_op;
};
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Mesa (master): i965: Preserve the internal format of the dri image
Module: Mesa
Branch: master
Commit: c36a363a2d305a987ef2ea843fe9fc860b576eed
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c36a363a2d305a987ef2ea843fe9fc860b576eed
Author: Jordan Justen
Date: Wed Jun 22 17:34:08 2016 +
i965: Preserve the internal format of the dri image
Since the OpenGLES API is strict about the internal format matching
the for many operations, we need to preserve it.
See _mesa_es3_error_check_format_and_type in
src/mesa/main/glformats.c.
Fixes ES2-CTS.gtf.GL2ExtensionTests.egl_image.egl_image
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96351
Reported-by: Mark Janes
Signed-off-by: Jordan Justen
Cc: Kristian Høgsberg
Cc: Chad Versace
Cc: "12.0"
Reviewed-by: Chad Versace
---
src/mesa/drivers/dri/i965/intel_tex_image.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c
b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 9cc426c..958f8bd 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -138,10 +138,10 @@ intelTexImage(struct gl_context * ctx,
static void
intel_set_texture_image_mt(struct brw_context *brw,
struct gl_texture_image *image,
+ GLenum internal_format,
struct intel_mipmap_tree *mt)
{
- const uint32_t internal_format = _mesa_get_format_base_format(mt->format);
struct gl_texture_object *texobj = image->TexObject;
struct intel_texture_object *intel_texobj = intel_texture_object(texobj);
struct intel_texture_image *intel_image = intel_texture_image(image);
@@ -264,6 +264,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target,
struct gl_texture_image *texImage;
mesa_format texFormat = MESA_FORMAT_NONE;
struct intel_mipmap_tree *mt;
+ GLenum internal_format = 0;
texObj = _mesa_get_current_tex_object(ctx, target);
@@ -283,12 +284,15 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target,
if (rb->mt->cpp == 4) {
if (texture_format == __DRI_TEXTURE_FORMAT_RGB) {
+ internal_format = GL_RGB;
texFormat = MESA_FORMAT_B8G8R8X8_UNORM;
}
else {
+ internal_format = GL_RGBA;
texFormat = MESA_FORMAT_B8G8R8A8_UNORM;
}
} else if (rb->mt->cpp == 2) {
+ internal_format = GL_RGB;
texFormat = MESA_FORMAT_B5G6R5_UNORM;
}
@@ -305,7 +309,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target,
_mesa_lock_texture(&brw->ctx, texObj);
texImage = _mesa_get_tex_image(ctx, texObj, target, 0);
- intel_set_texture_image_mt(brw, texImage, mt);
+ intel_set_texture_image_mt(brw, texImage, internal_format, mt);
intel_miptree_release(&mt);
_mesa_unlock_texture(&brw->ctx, texObj);
}
@@ -399,7 +403,10 @@ intel_image_target_texture_2d(struct gl_context *ctx,
GLenum target,
struct intel_texture_object *intel_texobj = intel_texture_object(texObj);
intel_texobj->planar_format = image->planar_format;
- intel_set_texture_image_mt(brw, texImage, mt);
+ const GLenum internal_format =
+ image->internal_format != 0 ?
+ image->internal_format : _mesa_get_format_base_format(mt->format);
+ intel_set_texture_image_mt(brw, texImage, internal_format, mt);
intel_miptree_release(&mt);
}
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