Mesa (master): isl: Allow multisampled array textures
Module: Mesa
Branch: master
Commit: fb895510477a9ce809cf5890afb1ea84ced6771e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb895510477a9ce809cf5890afb1ea84ced6771e
Author: Jason Ekstrand
Date: Thu Aug 25 15:07:31 2016 -0700
isl: Allow multisampled array textures
This probably isn't the only thing that needs to be done to get
multisampled array textures working in Vulkan but I think this is all that
ISL really needs and it does fix 8 of the new CTS tests.
Signed-off-by: Jason Ekstrand
Cc: "12.0"
Reviewed-by: Topi Pohjolainen
Reviewed-by: Chad Versace
---
src/intel/isl/isl.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 59429fb..c4989dd 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -557,27 +557,27 @@ isl_calc_phys_level0_extent_sa(const struct isl_device
*dev,
case ISL_MSAA_LAYOUT_ARRAY:
assert(info->depth == 1);
- assert(info->array_len == 1);
+ assert(info->levels == 1);
assert(!isl_format_is_compressed(info->format));
*phys_level0_sa = (struct isl_extent4d) {
.w = info->width,
.h = info->height,
.d = 1,
-.a = info->samples,
+.a = info->array_len * info->samples,
};
break;
case ISL_MSAA_LAYOUT_INTERLEAVED:
assert(info->depth == 1);
- assert(info->array_len == 1);
+ assert(info->levels == 1);
assert(!isl_format_is_compressed(info->format));
*phys_level0_sa = (struct isl_extent4d) {
.w = info->width,
.h = info->height,
.d = 1,
-.a = 1,
+.a = info->array_len,
};
isl_msaa_interleaved_scale_px_to_sa(info->samples,
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Mesa (master): 21 new commits
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf7be70aa77b09d4cce5832006efe69852ce457b Author: Ian Romanick Date: Thu Aug 18 09:21:21 2016 +0100 mesa/version: OpenGL ES 3.2 depends on OES_texture_cube_map_array This has a separate enable from ARB_texture_cube_map_array. Signed-off-by: Ian Romanick Reviewed-by: Ilia Mirkin Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b387bc90c8f5f14cec4f909ce0d53455bc34ed1c Author: Ian Romanick Date: Wed Aug 17 10:26:25 2016 +0100 i965: Enable OES_texture_cube_map_array on Gen8+ These are the only platforms that current expose OES_geometry_shader. Once OpenGL ES 3.1 and OES_geometry_shader are enabled on Gen7, this extension can be enabled there as well. Gen6 will never get OpenGL ES 3.1, so it will never get this extension... even though it has the desktop OpenGL extension. Alas. NOTE: This causes a failure on Gen8+ platforms in ES3-CTS.gtf.GL3Tests.texture_storage.texture_storage_texture_targets. The test only fails because it doesn't know that 0x9009 is a valid value when the extension exists. Signed-off-by: Ian Romanick Reviewed-by: Ilia Mirkin Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc4f53b68308bbd79932470cf4613037f7e95fb7 Author: Ian Romanick Date: Wed Aug 17 10:20:34 2016 +0100 mesa: Add support for OES_texture_cube_map_array This has a separate enable flag because this extension also requires OES_geometry_shader. It is possible that some drivers may support OpenGL ES 3.1 and ARB_texture_cube_map but not support OES_geometry_shader. Signed-off-by: Ian Romanick Reviewed-by: Ilia Mirkin Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=87fa462ffd6754144f89163a2692eff005beef9c Author: Ian Romanick Date: Thu Aug 18 11:11:04 2016 +0100 mesa: Add and use _mesa_has_texture_cube_map_array helper Signed-off-by: Ian Romanick Reviewed-by: Ilia Mirkin Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=66b988d09af1a505b428cf2a32c7ee11fb832982 Author: Ian Romanick Date: Thu Aug 18 10:09:41 2016 +0100 mesa: Use _mesa_has_ARB_texture_cube_map_array instead of open-coding it Signed-off-by: Ian Romanick Reviewed-by: Ilia Mirkin Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=daf1a61e1147fcd5d6849920d4836bee7118c406 Author: Ian Romanick Date: Thu Aug 18 09:57:54 2016 +0100 mesa: Cosmetic changes in legal_texobj_target Use bool instead of GLboolean and constify ctx. Signed-off-by: Ian Romanick Reviewed-by: Ilia Mirkin Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d79c950eebc3614d44e688172ffeb59fb6cfd3fa Author: Ian Romanick Date: Thu Aug 18 09:55:49 2016 +0100 mesa: Rearrange legal_texobj_target to look more like _mesa_legal_get_tex_level_parameter_target This makes it a bit easier to add support for more features in different APIs. Signed-off-by: Ian Romanick Reviewed-by: Ilia Mirkin Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ef5bad09c4623892a358046b7ece4dcb273ad700 Author: Ian Romanick Date: Wed Aug 17 10:13:24 2016 +0100 glsl: Add and use has_texture_cube_map_array helper Signed-off-by: Ian Romanick Reviewed-by: Ilia Mirkin Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c879dbc4e4184511cb3d831b66380c087216d850 Author: Ian Romanick Date: Wed Aug 17 10:10:56 2016 +0100 glsl: Mark cube map array sampler types as reserved in GLSL ES 3.10 All the GLSL 4.x keywords were added to the list of reserved keywords in GLSL ES 3.10. As far as I can tell, these are the only ones that were missed. Signed-off-by: Ian Romanick Cc: mesa-sta...@lists.freedesktop.org Reviewed-by: Ilia Mirkin Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8fb4af77897385b0245becaa60f88e005d7b2006 Author: Ian Romanick Date: Thu Jun 16 20:35:44 2016 -0700 glsl: Silence unused parameter warning glsl/lower_buffer_access.cpp:324:55: warning: unused parameter ‘var’ [-Wunused-parameter] ir_variable *var, ^ Signed-off-by: Ian Romanick Reviewed-by: Ilia Mirkin Reviewed-by: Kenneth Graunke URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=63af53dcd31cea89e5c8905e2a4898a5cb3d9ed4 Author: Ian Romanick Date: Mon May 23 12:45:09 2016 -0700 i965: Enable GL_OES_geometry_shader on Gen8+ Gen7 can get this extension (and GL
Mesa (master): docs: add links to clarify patch mailing section
Module: Mesa Branch: master Commit: d0a4c36dd6b0b6917128e3b3bab8810f1cd50876 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0a4c36dd6b0b6917128e3b3bab8810f1cd50876 Author: Nicholas Bishop Date: Fri Aug 26 16:38:51 2016 -0400 docs: add links to clarify patch mailing section * Changed "Mesa mailing list" to "mesa-dev mailing list" to clarify which list patches should be sent to * Added an explicit link to https://lists.freedesktop.org/mailman/listinfo/mesa-dev to show where to subscribe to the list * Added a link to https://git-scm.com/docs/git-send-email to help new users of that command v2: add signed-off-by Signed-off-by: Nicholas Bishop Reviewed-by: Eric Engestrom Reviewed-by: Chad Versace --- docs/devinfo.html | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/docs/devinfo.html b/docs/devinfo.html index 489d263..afd92fd 100644 --- a/docs/devinfo.html +++ b/docs/devinfo.html @@ -252,10 +252,14 @@ check for regressions. Mailing Patches -Patches should be sent to the Mesa mailing list for review. -When submitting a patch make sure to use git send-email rather than attaching -patches to emails. Sending patches as attachments prevents people from being -able to provide in-line review comments. +Patches should be sent to the mesa-dev mailing list for review: +https://lists.freedesktop.org/mailman/listinfo/mesa-dev";> +mesa-...@lists.freedesktop.org. +When submitting a patch make sure to use +https://git-scm.com/docs/git-send-email";>git send-email +rather than attaching patches to emails. Sending patches as +attachments prevents people from being able to provide in-line review +comments. ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): svga: simplify surface propagation code in svga_set_framebuffer_state()
Module: Mesa
Branch: master
Commit: 1a10b37ac3ff7adaf8e876a893cbd6fa0486426f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a10b37ac3ff7adaf8e876a893cbd6fa0486426f
Author: Brian Paul
Date: Thu Aug 25 18:08:07 2016 -0600
svga: simplify surface propagation code in svga_set_framebuffer_state()
Rewrite the comment too.
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_pipe_misc.c | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_pipe_misc.c
b/src/gallium/drivers/svga/svga_pipe_misc.c
index a26e577..7160154 100644
--- a/src/gallium/drivers/svga/svga_pipe_misc.c
+++ b/src/gallium/drivers/svga/svga_pipe_misc.c
@@ -108,7 +108,6 @@ static void svga_set_framebuffer_state(struct pipe_context
*pipe,
{
struct svga_context *svga = svga_context(pipe);
struct pipe_framebuffer_state *dst = &svga->curr.framebuffer;
- boolean propagate = FALSE;
unsigned i;
/* make sure any pending drawing calls are flushed before changing
@@ -120,22 +119,15 @@ static void svga_set_framebuffer_state(struct
pipe_context *pipe,
dst->height = fb->height;
dst->nr_cbufs = fb->nr_cbufs;
- /* check if we need to propagate any of the target surfaces */
+ /* Check if we need to propagate any of the render targets which we may
+* be unbinding.
+*/
for (i = 0; i < dst->nr_cbufs; i++) {
struct pipe_surface *s = i < fb->nr_cbufs ? fb->cbufs[i] : NULL;
if (dst->cbufs[i] && dst->cbufs[i] != s) {
if (svga_surface_needs_propagation(dst->cbufs[i])) {
-propagate = TRUE;
-break;
- }
- }
- }
-
- if (propagate) {
- for (i = 0; i < dst->nr_cbufs; i++) {
- struct pipe_surface *s = i < fb->nr_cbufs ? fb->cbufs[i] : NULL;
- if (dst->cbufs[i] && dst->cbufs[i] != s)
svga_propagate_surface(svga, dst->cbufs[i]);
+ }
}
}
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Mesa (master): svga: move some assignments in svga_texture_transfer_map()
Module: Mesa
Branch: master
Commit: 09d2780b3979c23e2bddc9b2754d6e93009f4428
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=09d2780b3979c23e2bddc9b2754d6e93009f4428
Author: Brian Paul
Date: Thu Aug 25 15:15:31 2016 -0600
svga: move some assignments in svga_texture_transfer_map()
Put near other assignments to the svga_transfer variable.
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_resource_texture.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_resource_texture.c
b/src/gallium/drivers/svga/svga_resource_texture.c
index 243b942..9104b0a 100644
--- a/src/gallium/drivers/svga/svga_resource_texture.c
+++ b/src/gallium/drivers/svga/svga_resource_texture.c
@@ -397,6 +397,10 @@ svga_texture_transfer_map(struct pipe_context *pipe,
st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
st->base.layer_stride = st->base.stride * nblocksy;
+ st->use_direct_map = use_direct_map;
+
+ *ptransfer = &st->base;
+
if (usage & PIPE_TRANSFER_WRITE) {
/* record texture upload for HUD */
@@ -510,10 +514,6 @@ svga_texture_transfer_map(struct pipe_context *pipe,
}
}
- st->use_direct_map = use_direct_map;
-
- *ptransfer = &st->base;
-
/*
* Begin mapping code
*/
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Mesa (master): svga: use new svga_check_sampler_framebuffer_resource_collision()
Module: Mesa
Branch: master
Commit: dcf63339e7f95c206f05d64fa5df27340188ac12
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dcf63339e7f95c206f05d64fa5df27340188ac12
Author: Brian Paul
Date: Thu Aug 25 18:02:43 2016 -0600
svga: use new svga_check_sampler_framebuffer_resource_collision()
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_pipe_sampler.c | 21 +++--
1 file changed, 3 insertions(+), 18 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_pipe_sampler.c
b/src/gallium/drivers/svga/svga_pipe_sampler.c
index 59609b8..42e4fa5 100644
--- a/src/gallium/drivers/svga/svga_pipe_sampler.c
+++ b/src/gallium/drivers/svga/svga_pipe_sampler.c
@@ -511,27 +511,12 @@ svga_set_sampler_views(struct pipe_context *pipe,
}
/* Check if any of the sampler view resources collide with the framebuffer
-* color buffers or depth stencil resource. If so, enable the
NEW_FRAME_BUFFER
+* color buffers or depth stencil resource. If so, set the NEW_FRAME_BUFFER
* dirty bit so that emit_framebuffer can be invoked to create backed view
* for the conflicted surface view.
*/
- for (i = 0; i < svga->curr.framebuffer.nr_cbufs; i++) {
- if (svga->curr.framebuffer.cbufs[i]) {
- struct svga_surface *s =
svga_surface(svga->curr.framebuffer.cbufs[i]);
- if (svga_check_sampler_view_resource_collision(svga, s->handle,
shader)) {
-svga->dirty |= SVGA_NEW_FRAME_BUFFER;
-break;
- }
- }
- }
-
- if (svga->curr.framebuffer.zsbuf) {
- struct svga_surface *s = svga_surface(svga->curr.framebuffer.zsbuf);
- if (s) {
- if (svga_check_sampler_view_resource_collision(svga, s->handle,
shader)) {
-svga->dirty |= SVGA_NEW_FRAME_BUFFER;
- }
- }
+ if (svga_check_sampler_framebuffer_resource_collision(svga, shader)) {
+ svga->dirty |= SVGA_NEW_FRAME_BUFFER;
}
done:
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Mesa (master): svga: minor simplifications in svga_texture_transfer_map()
Module: Mesa
Branch: master
Commit: 4a525126668b4bcfa11919d327bb04c4e618d51d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4a525126668b4bcfa11919d327bb04c4e618d51d
Author: Brian Paul
Date: Thu Aug 25 15:11:17 2016 -0600
svga: minor simplifications in svga_texture_transfer_map()
Use local vars instead of jumping through a pointer.
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_resource_texture.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_resource_texture.c
b/src/gallium/drivers/svga/svga_resource_texture.c
index eaab49d..243b942 100644
--- a/src/gallium/drivers/svga/svga_resource_texture.c
+++ b/src/gallium/drivers/svga/svga_resource_texture.c
@@ -467,10 +467,10 @@ svga_texture_transfer_map(struct pipe_context *pipe,
svga_surfaces_flush(svga);
if (svga_have_vgpu10(svga)) {
-ret = readback_image_vgpu10(svga, surf, st->slice, transfer->level,
+ret = readback_image_vgpu10(svga, surf, st->slice, level,
tex->b.b.last_level + 1);
} else {
-ret = readback_image_vgpu9(svga, surf, st->slice, transfer->level);
+ret = readback_image_vgpu9(svga, surf, st->slice, level);
}
svga->hud.num_readbacks++;
@@ -485,12 +485,12 @@ svga_texture_transfer_map(struct pipe_context *pipe,
* Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
* we could potentially clear the flag for all faces/layers/mips.
*/
- svga_clear_texture_rendered_to(tex, st->slice, transfer->level);
+ svga_clear_texture_rendered_to(tex, st->slice, level);
}
else {
-assert(transfer->usage & PIPE_TRANSFER_WRITE);
-if ((transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
-if (svga_is_texture_dirty(tex, st->slice, transfer->level)) {
+assert(usage & PIPE_TRANSFER_WRITE);
+if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
+if (svga_is_texture_dirty(tex, st->slice, level)) {
/*
* do a surface flush if the subresource has been modified
* in this command buffer.
@@ -504,9 +504,9 @@ svga_texture_transfer_map(struct pipe_context *pipe,
}
}
}
- if (transfer->usage & PIPE_TRANSFER_WRITE) {
+ if (usage & PIPE_TRANSFER_WRITE) {
/* mark this texture level as dirty */
- svga_set_texture_dirty(tex, st->slice, transfer->level);
+ svga_set_texture_dirty(tex, st->slice, level);
}
}
@@ -520,7 +520,7 @@ svga_texture_transfer_map(struct pipe_context *pipe,
if (st->swbuf) {
returnVal = st->swbuf;
}
- else if (!st->use_direct_map) {
+ else if (!use_direct_map) {
returnVal = sws->buffer_map(sws, st->hwbuf, usage);
}
else {
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Mesa (master): svga: rewrite svga_buffer() cast wrapper
Module: Mesa
Branch: master
Commit: e206f672612d08bc0353a021336440a5523d1d18
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e206f672612d08bc0353a021336440a5523d1d18
Author: Brian Paul
Date: Thu Aug 25 15:05:27 2016 -0600
svga: rewrite svga_buffer() cast wrapper
To make it symmetric with the svga_texture() cast wrapper.
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_resource_buffer.h | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_resource_buffer.h
b/src/gallium/drivers/svga/svga_resource_buffer.h
index 0591f89..daf9c18 100644
--- a/src/gallium/drivers/svga/svga_resource_buffer.h
+++ b/src/gallium/drivers/svga/svga_resource_buffer.h
@@ -196,13 +196,11 @@ struct svga_buffer
static inline struct svga_buffer *
-svga_buffer(struct pipe_resource *buffer)
+svga_buffer(struct pipe_resource *resource)
{
- if (buffer) {
- assert(((struct svga_buffer *)buffer)->b.vtbl == &svga_buffer_vtbl);
- return (struct svga_buffer *)buffer;
- }
- return NULL;
+ struct svga_buffer *buf = (struct svga_buffer *) resource;
+ assert(buf == NULL || buf->b.vtbl == &svga_buffer_vtbl);
+ return buf;
}
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Mesa (master): svga: remove assertions in svga_surface cast wrappers
Module: Mesa
Branch: master
Commit: d3d20d650dcf9916691e5e8bc4ef8bca3b2ce2ed
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3d20d650dcf9916691e5e8bc4ef8bca3b2ce2ed
Author: Brian Paul
Date: Thu Aug 25 17:43:40 2016 -0600
svga: remove assertions in svga_surface cast wrappers
We don't do this for other cast wrappers. And this will simplify some
code at call sites.
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_surface.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_surface.h
b/src/gallium/drivers/svga/svga_surface.h
index 0e5794b..c166791 100644
--- a/src/gallium/drivers/svga/svga_surface.h
+++ b/src/gallium/drivers/svga/svga_surface.h
@@ -93,7 +93,6 @@ svga_texture_copy_handle(struct svga_context *svga,
static inline struct svga_surface *
svga_surface(struct pipe_surface *surface)
{
- assert(surface);
return (struct svga_surface *)surface;
}
@@ -101,7 +100,6 @@ svga_surface(struct pipe_surface *surface)
static inline const struct svga_surface *
svga_surface_const(const struct pipe_surface *surface)
{
- assert(surface);
return (const struct svga_surface *)surface;
}
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Mesa (master): svga: reformat some expressions in svga_texture_transfer_map()
Module: Mesa
Branch: master
Commit: fe5a2704ecd447068c6b75bf78f12630219d3117
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe5a2704ecd447068c6b75bf78f12630219d3117
Author: Brian Paul
Date: Thu Aug 25 15:43:23 2016 -0600
svga: reformat some expressions in svga_texture_transfer_map()
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_resource_texture.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_resource_texture.c
b/src/gallium/drivers/svga/svga_resource_texture.c
index 450ed2b..aff6fb1 100644
--- a/src/gallium/drivers/svga/svga_resource_texture.c
+++ b/src/gallium/drivers/svga/svga_resource_texture.c
@@ -431,9 +431,9 @@ svga_texture_transfer_map(struct pipe_context *pipe,
debug_printf("%s: failed to allocate %u KB of DMA, "
"splitting into %u x %u KB DMA transfers\n",
__FUNCTION__,
- (nblocksy*st->base.stride + 1023)/1024,
- (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
- (st->hw_nblocksy*st->base.stride + 1023)/1024);
+ (nblocksy * st->base.stride + 1023) / 1024,
+ (nblocksy + st->hw_nblocksy - 1) / st->hw_nblocksy,
+ (st->hw_nblocksy * st->base.stride + 1023) / 1024);
}
st->swbuf = MALLOC(nblocksy * st->base.stride * d);
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Mesa (master): svga: minor code simplification in svga_texture_transfer_unmap()
Module: Mesa
Branch: master
Commit: c6e89fa2153fcd32dd606fee3c5c812e12daa694
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6e89fa2153fcd32dd606fee3c5c812e12daa694
Author: Brian Paul
Date: Thu Aug 25 16:15:23 2016 -0600
svga: minor code simplification in svga_texture_transfer_unmap()
Use the tex variable instead of using svga_texture() again.
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_resource_texture.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_resource_texture.c
b/src/gallium/drivers/svga/svga_resource_texture.c
index aff6fb1..1f1a76b 100644
--- a/src/gallium/drivers/svga/svga_resource_texture.c
+++ b/src/gallium/drivers/svga/svga_resource_texture.c
@@ -692,8 +692,7 @@ svga_texture_transfer_unmap(struct pipe_context *pipe,
svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
} else if (transfer->usage & PIPE_TRANSFER_WRITE) {
- struct svga_winsys_surface *surf =
-svga_texture(transfer->resource)->handle;
+ struct svga_winsys_surface *surf = tex->handle;
SVGA3dBox box;
enum pipe_error ret;
unsigned nlayers = 1;
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Mesa (master): svga: minor whitespace, etc clean-ups in svga_pipe_misc.c
Module: Mesa
Branch: master
Commit: ea33df7b586807142f48f01380a77805d0e5be8f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea33df7b586807142f48f01380a77805d0e5be8f
Author: Brian Paul
Date: Fri Aug 26 09:36:29 2016 -0600
svga: minor whitespace, etc clean-ups in svga_pipe_misc.c
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_pipe_misc.c | 49 +++
1 file changed, 23 insertions(+), 26 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_pipe_misc.c
b/src/gallium/drivers/svga/svga_pipe_misc.c
index 7160154..a8c04bd 100644
--- a/src/gallium/drivers/svga/svga_pipe_misc.c
+++ b/src/gallium/drivers/svga/svga_pipe_misc.c
@@ -23,26 +23,26 @@
*
**/
-#include "svga_cmd.h"
-
#include "util/u_framebuffer.h"
#include "util/u_inlines.h"
#include "util/u_pstipple.h"
+#include "svga_cmd.h"
#include "svga_context.h"
#include "svga_screen.h"
#include "svga_surface.h"
#include "svga_resource_texture.h"
-static void svga_set_scissor_states( struct pipe_context *pipe,
- unsigned start_slot,
- unsigned num_scissors,
- const struct pipe_scissor_state *scissors
)
+static void
+svga_set_scissor_states(struct pipe_context *pipe,
+unsigned start_slot,
+unsigned num_scissors,
+const struct pipe_scissor_state *scissors)
{
struct svga_context *svga = svga_context(pipe);
- memcpy( &svga->curr.scissor, scissors, sizeof(*scissors) );
+ memcpy(&svga->curr.scissor, scissors, sizeof(*scissors));
svga->dirty |= SVGA_NEW_SCISSOR;
}
@@ -81,7 +81,8 @@ svga_set_polygon_stipple(struct pipe_context *pipe,
}
-void svga_cleanup_framebuffer(struct svga_context *svga)
+void
+svga_cleanup_framebuffer(struct svga_context *svga)
{
struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
struct pipe_framebuffer_state *curr = &svga->curr.framebuffer;
@@ -103,8 +104,9 @@ void svga_cleanup_framebuffer(struct svga_context *svga)
#define DEPTH_BIAS_SCALE_FACTOR_D32((float)(1<<31))
-static void svga_set_framebuffer_state(struct pipe_context *pipe,
- const struct pipe_framebuffer_state *fb)
+static void
+svga_set_framebuffer_state(struct pipe_context *pipe,
+ const struct pipe_framebuffer_state *fb)
{
struct svga_context *svga = svga_context(pipe);
struct pipe_framebuffer_state *dst = &svga->curr.framebuffer;
@@ -169,8 +171,7 @@ static void svga_set_framebuffer_state(struct pipe_context
*pipe,
}
}
- if (svga->curr.framebuffer.zsbuf)
- {
+ if (svga->curr.framebuffer.zsbuf) {
switch (svga->curr.framebuffer.zsbuf->format) {
case PIPE_FORMAT_Z16_UNORM:
svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D16;
@@ -207,9 +208,9 @@ static void svga_set_framebuffer_state(struct pipe_context
*pipe,
}
-
-static void svga_set_clip_state( struct pipe_context *pipe,
- const struct pipe_clip_state *clip )
+static void
+svga_set_clip_state(struct pipe_context *pipe,
+const struct pipe_clip_state *clip)
{
struct svga_context *svga = svga_context(pipe);
@@ -219,14 +220,11 @@ static void svga_set_clip_state( struct pipe_context
*pipe,
}
-
-/* Called when driver state tracker notices changes to the viewport
- * matrix:
- */
-static void svga_set_viewport_states( struct pipe_context *pipe,
- unsigned start_slot,
- unsigned num_viewports,
- const struct pipe_viewport_state
*viewports )
+static void
+svga_set_viewport_states(struct pipe_context *pipe,
+ unsigned start_slot,
+ unsigned num_viewports,
+ const struct pipe_viewport_state *viewports)
{
struct svga_context *svga = svga_context(pipe);
@@ -256,7 +254,8 @@ svga_set_debug_callback(struct pipe_context *pipe,
}
-void svga_init_misc_functions( struct svga_context *svga )
+void
+svga_init_misc_functions(struct svga_context *svga)
{
svga->pipe.set_scissor_states = svga_set_scissor_states;
svga->pipe.set_polygon_stipple = svga_set_polygon_stipple;
@@ -265,5 +264,3 @@ void svga_init_misc_functions( struct svga_context *svga )
svga->pipe.set_viewport_states = svga_set_viewport_states;
svga->pipe.set_debug_callback = svga_set_debug_callback;
}
-
-
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Mesa (master): svga: move some code in svga_propagate_surface()
Module: Mesa
Branch: master
Commit: 8433b433378fce3b578b9fcf47e0ed6b92b68a59
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8433b433378fce3b578b9fcf47e0ed6b92b68a59
Author: Brian Paul
Date: Fri Aug 26 07:00:48 2016 -0600
svga: move some code in svga_propagate_surface()
Move computation of zslice, layer inside the conditional where they're
used.
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_surface.c | 37 +
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_surface.c
b/src/gallium/drivers/svga/svga_surface.c
index 4b0b56c..00e9cbc 100644
--- a/src/gallium/drivers/svga/svga_surface.c
+++ b/src/gallium/drivers/svga/svga_surface.c
@@ -607,35 +607,36 @@ svga_propagate_surface(struct svga_context *svga, struct
pipe_surface *surf)
struct svga_surface *s = svga_surface(surf);
struct svga_texture *tex = svga_texture(surf->texture);
struct svga_screen *ss = svga_screen(surf->texture->screen);
- unsigned zslice, layer;
- unsigned nlayers = 1;
- unsigned i;
if (!s->dirty)
return;
SVGA_STATS_TIME_PUSH(ss->sws, SVGA_STATS_TIME_PROPAGATESURFACE);
- if (surf->texture->target == PIPE_TEXTURE_CUBE) {
- zslice = 0;
- layer = surf->u.tex.first_layer;
- }
- else if (surf->texture->target == PIPE_TEXTURE_1D_ARRAY ||
-surf->texture->target == PIPE_TEXTURE_2D_ARRAY) {
- zslice = 0;
- layer = surf->u.tex.first_layer;
- nlayers = surf->u.tex.last_layer - surf->u.tex.first_layer + 1;
- }
- else {
- zslice = surf->u.tex.first_layer;
- layer = 0;
- }
-
s->dirty = FALSE;
ss->texture_timestamp++;
svga_age_texture_view(tex, surf->u.tex.level);
if (s->handle != tex->handle) {
+ unsigned zslice, layer;
+ unsigned nlayers = 1;
+ unsigned i;
+
+ if (surf->texture->target == PIPE_TEXTURE_CUBE) {
+ zslice = 0;
+ layer = surf->u.tex.first_layer;
+ }
+ else if (surf->texture->target == PIPE_TEXTURE_1D_ARRAY ||
+ surf->texture->target == PIPE_TEXTURE_2D_ARRAY) {
+ zslice = 0;
+ layer = surf->u.tex.first_layer;
+ nlayers = surf->u.tex.last_layer - surf->u.tex.first_layer + 1;
+ }
+ else {
+ zslice = surf->u.tex.first_layer;
+ layer = 0;
+ }
+
SVGA_DBG(DEBUG_VIEWS,
"svga: Surface propagate: tex %p, level %u, from %p\n",
tex, surf->u.tex.level, surf);
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Mesa (master): svga: add some comments in the svga_surface struct
Module: Mesa Branch: master Commit: bb7f094b3711614953ee699950c7b728efc48c54 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb7f094b3711614953ee699950c7b728efc48c54 Author: Brian Paul Date: Thu Aug 25 18:04:51 2016 -0600 svga: add some comments in the svga_surface struct Give more info about backing resources/surfaces. Reviewed-by: Neha Bhende --- src/gallium/drivers/svga/svga_surface.h | 16 1 file changed, 16 insertions(+) diff --git a/src/gallium/drivers/svga/svga_surface.h b/src/gallium/drivers/svga/svga_surface.h index c166791..2f003b2 100644 --- a/src/gallium/drivers/svga/svga_surface.h +++ b/src/gallium/drivers/svga/svga_surface.h @@ -45,6 +45,12 @@ struct svga_surface struct pipe_surface base; struct svga_host_surface_cache_key key; + + /* +* Note that the handle may point at a secondary / backing resource +* created by svga_texture_view_surface() which is something other +* than svga_texture(base->texture)->handle. +*/ struct svga_winsys_surface *handle; unsigned real_layer; @@ -55,6 +61,16 @@ struct svga_surface /* VGPU10 */ SVGA3dRenderTargetViewId view_id; + + /* +* As with 'handle' above, this may point to a secondary / backing resource. +* We can't have one resource bound as both a render target and a shader +* resource at the same time. But we sometimes want to do that, such as +* for mipmap generation where we sample from one level and render into +* another. +* In this situation, the backed surface is the render target while the +* original surface is the shader resource. +*/ struct svga_surface *backed; }; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): svga: minor reformatting of svga_texture() cast wrapper
Module: Mesa
Branch: master
Commit: 088dd8f45e70504aa5f5a35e9970c8c14f2cf8fc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=088dd8f45e70504aa5f5a35e9970c8c14f2cf8fc
Author: Brian Paul
Date: Thu Aug 25 15:06:18 2016 -0600
svga: minor reformatting of svga_texture() cast wrapper
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_resource_texture.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/svga/svga_resource_texture.h
b/src/gallium/drivers/svga/svga_resource_texture.h
index e779f19..ffd5fea 100644
--- a/src/gallium/drivers/svga/svga_resource_texture.h
+++ b/src/gallium/drivers/svga/svga_resource_texture.h
@@ -117,7 +117,8 @@ struct svga_transfer
};
-static inline struct svga_texture *svga_texture( struct pipe_resource
*resource )
+static inline struct svga_texture *
+svga_texture(struct pipe_resource *resource)
{
struct svga_texture *tex = (struct svga_texture *)resource;
assert(tex == NULL || tex->b.vtbl == &svga_texture_vtbl);
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Mesa (master): svga: add new svga_check_sampler_framebuffer_resource_collision()
Module: Mesa
Branch: master
Commit: ff500ed5a1287eadc06fc19661f0aad8767b664d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ff500ed5a1287eadc06fc19661f0aad8767b664d
Author: Brian Paul
Date: Thu Aug 25 18:01:57 2016 -0600
svga: add new svga_check_sampler_framebuffer_resource_collision()
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_sampler_view.h | 4
src/gallium/drivers/svga/svga_state_sampler.c | 33 ++-
2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/svga/svga_sampler_view.h
b/src/gallium/drivers/svga/svga_sampler_view.h
index 15f2313..b36f089 100644
--- a/src/gallium/drivers/svga/svga_sampler_view.h
+++ b/src/gallium/drivers/svga/svga_sampler_view.h
@@ -104,6 +104,10 @@ svga_check_sampler_view_resource_collision(struct
svga_context *svga,
struct svga_winsys_surface *res,
unsigned shader);
+boolean
+svga_check_sampler_framebuffer_resource_collision(struct svga_context *svga,
+ enum pipe_shader_type
shader);
+
enum pipe_error
svga_validate_pipe_sampler_view(struct svga_context *svga,
struct svga_pipe_sampler_view *sv);
diff --git a/src/gallium/drivers/svga/svga_state_sampler.c
b/src/gallium/drivers/svga/svga_state_sampler.c
index 420a566..55bed02 100644
--- a/src/gallium/drivers/svga/svga_state_sampler.c
+++ b/src/gallium/drivers/svga/svga_state_sampler.c
@@ -40,9 +40,10 @@
#include "svga_format.h"
#include "svga_resource_buffer.h"
#include "svga_resource_texture.h"
+#include "svga_sampler_view.h"
#include "svga_shader.h"
#include "svga_state.h"
-#include "svga_sampler_view.h"
+#include "svga_surface.h"
/** Get resource handle for a texture or buffer */
@@ -88,6 +89,36 @@ svga_check_sampler_view_resource_collision(struct
svga_context *svga,
/**
+ * Check if there are any resources that are both bound to a render target
+ * and bound as a shader resource for the given type of shader.
+ */
+boolean
+svga_check_sampler_framebuffer_resource_collision(struct svga_context *svga,
+ enum pipe_shader_type shader)
+{
+ struct svga_surface *surf;
+ unsigned i;
+
+ for (i = 0; i < svga->curr.framebuffer.nr_cbufs; i++) {
+ surf = svga_surface(svga->curr.framebuffer.cbufs[i]);
+ if (surf &&
+ svga_check_sampler_view_resource_collision(svga, surf->handle,
+ shader)) {
+ return TRUE;
+ }
+ }
+
+ surf = svga_surface(svga->curr.framebuffer.zsbuf);
+ if (surf &&
+ svga_check_sampler_view_resource_collision(svga, surf->handle, shader))
{
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+
+/**
* Create a DX ShaderResourceSamplerView for the given pipe_sampler_view,
* if needed.
*/
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Mesa (master): svga: remove duplicated variable in svga_texture_transfer_map()
Module: Mesa
Branch: master
Commit: 10ef6ddcf97c1f7e42345b5d5b090f1db93a795d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=10ef6ddcf97c1f7e42345b5d5b090f1db93a795d
Author: Brian Paul
Date: Thu Aug 25 15:17:05 2016 -0600
svga: remove duplicated variable in svga_texture_transfer_map()
tex was already declared at the function body scope.
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_resource_texture.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/gallium/drivers/svga/svga_resource_texture.c
b/src/gallium/drivers/svga/svga_resource_texture.c
index 9104b0a..450ed2b 100644
--- a/src/gallium/drivers/svga/svga_resource_texture.c
+++ b/src/gallium/drivers/svga/svga_resource_texture.c
@@ -525,7 +525,6 @@ svga_texture_transfer_map(struct pipe_context *pipe,
}
else {
SVGA3dSize baseLevelSize;
- struct svga_texture *tex = svga_texture(texture);
struct svga_winsys_surface *surf = tex->handle;
uint8_t *map;
boolean retry;
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Mesa (master): svga: remove local variable in create_backed_surface_view()
Module: Mesa
Branch: master
Commit: c72dcd9a718628638957bfd99549bf788c2e6b36
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c72dcd9a718628638957bfd99549bf788c2e6b36
Author: Brian Paul
Date: Thu Aug 25 15:04:52 2016 -0600
svga: remove local variable in create_backed_surface_view()
To simplify the code a bit.
Reviewed-by: Neha Bhende
---
src/gallium/drivers/svga/svga_surface.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_surface.c
b/src/gallium/drivers/svga/svga_surface.c
index 43a00c3..4b0b56c 100644
--- a/src/gallium/drivers/svga/svga_surface.c
+++ b/src/gallium/drivers/svga/svga_surface.c
@@ -370,12 +370,10 @@ svga_create_surface(struct pipe_context *pipe,
static struct svga_surface *
create_backed_surface_view(struct svga_context *svga, struct svga_surface *s)
{
- struct svga_surface *bs = s->backed;
-
SVGA_STATS_TIME_PUSH(svga_sws(svga),
SVGA_STATS_TIME_CREATEBACKEDSURFACEVIEW);
- if (!bs) {
+ if (!s->backed) {
struct svga_texture *tex = svga_texture(s->base.texture);
struct pipe_surface *backed_view;
@@ -386,15 +384,14 @@ create_backed_surface_view(struct svga_context *svga,
struct svga_surface *s)
if (!backed_view)
return NULL;
- bs = svga_surface(backed_view);
- s->backed = bs;
+ s->backed = svga_surface(backed_view);
}
- svga_mark_surface_dirty(&bs->base);
+ svga_mark_surface_dirty(&s->backed->base);
SVGA_STATS_TIME_POP(svga_sws(svga));
- return bs;
+ return s->backed;
}
/**
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Mesa (master): docs: Add GL_KHR_blend_equation_advanced to relnotes.
Module: Mesa Branch: master Commit: bc13e5f42afb57d3e6864ebe18caa8eb74b521ec URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc13e5f42afb57d3e6864ebe18caa8eb74b521ec Author: Kenneth Graunke Date: Fri Aug 26 13:17:22 2016 -0700 docs: Add GL_KHR_blend_equation_advanced to relnotes. --- docs/relnotes/12.1.0.html | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/relnotes/12.1.0.html b/docs/relnotes/12.1.0.html index 2643a0c..f744864 100644 --- a/docs/relnotes/12.1.0.html +++ b/docs/relnotes/12.1.0.html @@ -56,6 +56,7 @@ Note: some of the new features are only available with certain drivers. GL_ARB_stencil_texturing on i965/hsw GL_ARB_texture_stencil8 on i965/hsw OpenGL ES 3.1 on i965/hsw +GL_KHR_blend_equation_advanced on i965 Bug fixes ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): r600: increase performance for DRI PRIME offloading if 2nd GPU is Evergreen+
Module: Mesa
Branch: master
Commit: 2cc880cba54d687a122298c8187ecc31b4a0ee2d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2cc880cba54d687a122298c8187ecc31b4a0ee2d
Author: Mario Kleiner
Date: Fri Aug 26 18:59:05 2016 +0200
r600: increase performance for DRI PRIME offloading if 2nd GPU is Evergreen+
This is a direct port of Marek Olšáks patch
"radeonsi: increase performance for DRI PRIME
offloading if 2nd GPU is CIK or VI" to r600.
It uses SDMA for the detiling blit from renderoffload VRAM
to GTT, as SDMA is much faster for tiled->linear blits from
VRAM to GTT.
Testing on a dual Radeon HD-5770 setup reduced the time
for the render offload gpu to get its rendering into
system RAM from approximately 16 msecs for simple rendering
at 1920x1080 pixel 32 bpp to 5 msecs, a > 3x speedup!
This was measured using ftrace to trace the time the radeon kms
driver waited on the dmabuf fence of the renderoffload gpu to
complete.
All in all this brought the time for a flip down from 20 msecs
to 9 msecs, so the prime setup can display at full 60 fps instead
of barely 30 fps vsync'ed.
The current r600 implementation supports SDMA on Evergreen and
later, but not R600/R700 due to some bugs apparently present
in their SDMA implementation.
Signed-off-by: Mario Kleiner
Cc: Marek Olšák
Signed-off-by: Marek Olšák
---
src/gallium/drivers/r600/r600_blit.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/gallium/drivers/r600/r600_blit.c
b/src/gallium/drivers/r600/r600_blit.c
index adf616e..8fdc51c 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -850,11 +850,30 @@ static void r600_blit(struct pipe_context *ctx,
const struct pipe_blit_info *info)
{
struct r600_context *rctx = (struct r600_context*)ctx;
+ struct r600_texture *rdst = (struct r600_texture *)info->dst.resource;
if (do_hardware_msaa_resolve(ctx, info)) {
return;
}
+ /* Using SDMA for copying to a linear texture in GTT is much faster.
+* This improves DRI PRIME performance.
+*
+* resource_copy_region can't do this yet, because dma_copy calls it
+* on failure (recursion).
+*/
+ if (rdst->surface.level[info->dst.level].mode ==
+ RADEON_SURF_MODE_LINEAR_ALIGNED &&
+ rctx->b.dma_copy &&
+ util_can_blit_via_copy_region(info, false)) {
+ rctx->b.dma_copy(ctx, info->dst.resource, info->dst.level,
+info->dst.box.x, info->dst.box.y,
+info->dst.box.z,
+info->src.resource, info->src.level,
+&info->src.box);
+ return;
+ }
+
assert(util_blitter_is_blit_supported(rctx->blitter, info));
/* The driver doesn't decompress resources automatically while
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Mesa (master): i965/gen7: Use R8_UINT stencil copy when sampling the stencil texture
Module: Mesa
Branch: master
Commit: 751682434ecb0489df3945f88e565079ecbe9f31
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=751682434ecb0489df3945f88e565079ecbe9f31
Author: Jordan Justen
Date: Sat Jun 11 16:41:18 2016 -0700
i965/gen7: Use R8_UINT stencil copy when sampling the stencil texture
v2:
* Check gen <= 7, rather than gen == 7. (Ian)
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 023b1ff..bfd973b 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -499,8 +499,16 @@ brw_update_texture_surface(struct gl_context *ctx,
}
if (obj->StencilSampling && firstImage->_BaseFormat == GL_DEPTH_STENCIL)
{
- assert(brw->gen >= 8);
- mt = mt->stencil_mt;
+ if (brw->gen <= 7) {
+assert(mt->r8stencil_mt &&
!mt->stencil_mt->r8stencil_needs_update);
+mt = mt->r8stencil_mt;
+ } else {
+mt = mt->stencil_mt;
+ }
+ format = BRW_SURFACEFORMAT_R8_UINT;
+ } else if (brw->gen <= 7 && mt->format == MESA_FORMAT_S_UINT8) {
+ assert(mt->r8stencil_mt && !mt->r8stencil_needs_update);
+ mt = mt->r8stencil_mt;
format = BRW_SURFACEFORMAT_R8_UINT;
}
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Mesa (master): main: Add MESA_VERBOSE=api support for glClearStencil
Module: Mesa
Branch: master
Commit: 861c9cbee3d741ea332a9ceee8ae64db49f114c2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=861c9cbee3d741ea332a9ceee8ae64db49f114c2
Author: Jordan Justen
Date: Sat Jun 11 16:23:44 2016 -0700
main: Add MESA_VERBOSE=api support for glClearStencil
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
---
src/mesa/main/stencil.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/main/stencil.c b/src/mesa/main/stencil.c
index 409b2f0..b303bb7 100644
--- a/src/mesa/main/stencil.c
+++ b/src/mesa/main/stencil.c
@@ -109,6 +109,9 @@ _mesa_ClearStencil( GLint s )
{
GET_CURRENT_CONTEXT(ctx);
+ if (MESA_VERBOSE & VERBOSE_API)
+ _mesa_debug(ctx, "glClearStencil(%d)\n", s);
+
ctx->Stencil.Clear = (GLuint) s;
}
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Mesa (master): i965/hsw: Don' t advertise more than 64 threads for compute shaders
Module: Mesa
Branch: master
Commit: 30fee52036ac5e0180073ace4a8fd760556495be
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=30fee52036ac5e0180073ace4a8fd760556495be
Author: Jordan Justen
Date: Tue Jun 14 15:04:34 2016 -0700
i965/hsw: Don't advertise more than 64 threads for compute shaders
thread_width_max in the GPGPU walker command limits us to a maximum of
64 threads.
This fixes a crash on Haswell in the OpenGLES 3.1 conformance test
suite which tests the advertised limits of the max invocation counts.
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_context.c | 39 +
1 file changed, 25 insertions(+), 14 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 1364393..58cd03d 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -769,12 +769,35 @@ brw_initialize_context_constants(struct brw_context *brw)
}
static void
-brw_initialize_cs_context_constants(struct brw_context *brw, unsigned
max_threads)
+brw_initialize_cs_context_constants(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
+ const struct intel_screen *screen = brw->intelScreen;
+ const struct brw_device_info *devinfo = screen->devinfo;
+
+ /* FINISHME: Do this for all platforms that the kernel supports */
+ if (brw->is_cherryview &&
+ screen->subslice_total > 0 && screen->eu_total > 0) {
+ /* Logical CS threads = EUs per subslice * 7 threads per EU */
+ brw->max_cs_threads = screen->eu_total / screen->subslice_total * 7;
+
+ /* Fuse configurations may give more threads than expected, never less.
*/
+ if (brw->max_cs_threads < devinfo->max_cs_threads)
+ brw->max_cs_threads = devinfo->max_cs_threads;
+ } else {
+ brw->max_cs_threads = devinfo->max_cs_threads;
+ }
+
/* Maximum number of scalar compute shader invocations that can be run in
* parallel in the same subslice assuming SIMD32 dispatch.
+*
+* We don't advertise more than 64 threads, because we are limited to 64 by
+* our usage of thread_width_max in the gpgpu walker command. This only
+* currently impacts Haswell, which otherwise might be able to advertise 70
+* threads. With SIMD32 and 64 threads, Haswell still provides twice the
+* required the number of invocation needed for ARB_compute_shader.
*/
+ const unsigned max_threads = MIN2(64, brw->max_cs_threads);
const uint32_t max_invocations = 32 * max_threads;
ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
@@ -978,7 +1001,7 @@ brwCreateContext(gl_api api,
if (INTEL_DEBUG & DEBUG_PERF)
brw->perf_debug = true;
- brw_initialize_cs_context_constants(brw, devinfo->max_cs_threads);
+ brw_initialize_cs_context_constants(brw);
brw_initialize_context_constants(brw);
ctx->Const.ResetStrategy = notify_reset
@@ -1025,18 +1048,6 @@ brwCreateContext(gl_api api,
brw->max_ds_threads = devinfo->max_ds_threads;
brw->max_gs_threads = devinfo->max_gs_threads;
brw->max_wm_threads = devinfo->max_wm_threads;
- /* FINISHME: Do this for all platforms that the kernel supports */
- if (brw->is_cherryview &&
- screen->subslice_total > 0 && screen->eu_total > 0) {
- /* Logical CS threads = EUs per subslice * 7 threads per EU */
- brw->max_cs_threads = screen->eu_total / screen->subslice_total * 7;
-
- /* Fuse configurations may give more threads than expected, never less.
*/
- if (brw->max_cs_threads < devinfo->max_cs_threads)
- brw->max_cs_threads = devinfo->max_cs_threads;
- } else {
- brw->max_cs_threads = devinfo->max_cs_threads;
- }
brw->urb.size = devinfo->urb.size;
brw->urb.min_vs_entries = devinfo->urb.min_vs_entries;
brw->urb.max_vs_entries = devinfo->urb.max_vs_entries;
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Mesa (master): i965: Enable ARB_stencil_texturing for Haswell
Module: Mesa
Branch: master
Commit: f20f616324a79b8be91b84b6d965a0bc0096789c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f20f616324a79b8be91b84b6d965a0bc0096789c
Author: Jordan Justen
Date: Wed Jun 8 13:21:10 2016 -0700
i965: Enable ARB_stencil_texturing for Haswell
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_extensions.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index dd0d240..be004a2 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -373,6 +373,10 @@ intelInitExtensions(struct gl_context *ctx)
}
}
+ if (brw->gen >= 8 || brw->is_haswell) {
+ ctx->Extensions.ARB_stencil_texturing = true;
+ }
+
if (brw->gen >= 8 || brw->is_haswell || brw->is_baytrail) {
ctx->Extensions.ARB_robust_buffer_access_behavior = true;
}
@@ -391,7 +395,6 @@ intelInitExtensions(struct gl_context *ctx)
if (brw->gen >= 8) {
ctx->Extensions.ARB_shader_precision = true;
- ctx->Extensions.ARB_stencil_texturing = true;
ctx->Extensions.ARB_texture_stencil8 = true;
ctx->Extensions.ARB_gpu_shader_fp64 = true;
ctx->Extensions.ARB_vertex_attrib_64bit = true;
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Mesa (master): i965/hsw: Adjust uploading default color for stencil surfaces
Module: Mesa
Branch: master
Commit: b82bb98441609579c753351295a9f5317b572604
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b82bb98441609579c753351295a9f5317b572604
Author: Jordan Justen
Date: Mon Aug 22 22:47:50 2016 -0700
i965/hsw: Adjust uploading default color for stencil surfaces
v2:
* has_component (Ken); const bits_per_channel (Topi)
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_sampler_state.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c
b/src/mesa/drivers/dri/i965/brw_sampler_state.c
index 9f56c81..0eed8f9 100644
--- a/src/mesa/drivers/dri/i965/brw_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sampler_state.c
@@ -196,6 +196,16 @@ wrap_mode_needs_border_color(unsigned wrap_mode)
wrap_mode == GEN8_TEXCOORDMODE_HALF_BORDER;
}
+static bool
+has_component(mesa_format format, int i)
+{
+ if (_mesa_is_format_color_format(format))
+ return _mesa_format_has_color_component(format, i);
+
+ /* depth and stencil have only one component */
+ return i == 0;
+}
+
/**
* Upload SAMPLER_BORDER_COLOR_STATE.
*/
@@ -281,7 +291,10 @@ upload_default_color(struct brw_context *brw,
memset(sdc, 0, 20 * 4);
sdc = &sdc[16];
- int bits_per_channel = _mesa_get_format_bits(format, GL_RED_BITS);
+ const int bits_per_channel =
+ _mesa_get_format_bits(format,
+ format == MESA_FORMAT_S_UINT8 ?
+ GL_STENCIL_BITS : GL_RED_BITS);
/* From the Haswell PRM, "Command Reference: Structures", Page 36:
* "If any color channel is missing from the surface format,
@@ -291,7 +304,7 @@ upload_default_color(struct brw_context *brw,
*/
unsigned c[4] = { 0, 0, 0, 1 };
for (int i = 0; i < 4; i++) {
- if (_mesa_format_has_color_component(format, i))
+ if (has_component(format, i))
c[i] = color.ui[i];
}
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Mesa (master): i965: Add function to copy a stencil miptree to an R8_UINT miptree
Module: Mesa
Branch: master
Commit: 7af51b8f0359131dbb11cf64c54638029aebad84
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7af51b8f0359131dbb11cf64c54638029aebad84
Author: Jordan Justen
Date: Sat Jun 11 16:44:27 2016 -0700
i965: Add function to copy a stencil miptree to an R8_UINT miptree
v2:
* Cleanups suggested by Ian, Matt and Topi
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
Reviewed-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 57 ++-
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4 ++
2 files changed, 60 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index d4f6c34..c33d8fc 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -674,7 +674,6 @@ miptree_create(struct brw_context *brw,
etc_format = (format != tex_format) ? tex_format : MESA_FORMAT_NONE;
- assert((layout_flags & MIPTREE_LAYOUT_DISABLE_AUX) == 0);
assert((layout_flags & MIPTREE_LAYOUT_FOR_BO) == 0);
mt = intel_miptree_create_layout(brw, target, format,
first_level, last_level, width0,
@@ -2286,6 +2285,62 @@ intel_miptree_updownsample(struct brw_context *brw,
}
}
+void
+intel_update_r8stencil(struct brw_context *brw,
+ struct intel_mipmap_tree *mt)
+{
+ assert(brw->gen >= 7);
+ struct intel_mipmap_tree *src =
+ mt->format == MESA_FORMAT_S_UINT8 ? mt : mt->stencil_mt;
+ if (!src || brw->gen >= 8 || !src->r8stencil_needs_update)
+ return;
+
+ if (!mt->r8stencil_mt) {
+ const uint32_t r8stencil_flags =
+ MIPTREE_LAYOUT_ACCELERATED_UPLOAD | MIPTREE_LAYOUT_TILING_Y |
+ MIPTREE_LAYOUT_DISABLE_AUX;
+ assert(brw->gen > 6); /* Handle MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD */
+ mt->r8stencil_mt = intel_miptree_create(brw,
+ src->target,
+ MESA_FORMAT_R_UINT8,
+ src->first_level,
+ src->last_level,
+ src->logical_width0,
+ src->logical_height0,
+ src->logical_depth0,
+ src->num_samples,
+ r8stencil_flags);
+ assert(mt->r8stencil_mt);
+ }
+
+ struct intel_mipmap_tree *dst = mt->r8stencil_mt;
+
+ for (int level = src->first_level; level <= src->last_level; level++) {
+ const unsigned depth = src->level[level].depth;
+ const int layers_per_blit =
+ (dst->msaa_layout == INTEL_MSAA_LAYOUT_UMS ||
+ dst->msaa_layout == INTEL_MSAA_LAYOUT_CMS) ?
+ dst->num_samples : 1;
+
+ for (unsigned layer = 0; layer < depth; layer++) {
+ brw_blorp_blit_miptrees(brw,
+ src, level, layer,
+ src->format, SWIZZLE_X,
+ dst, level, layers_per_blit * layer,
+ MESA_FORMAT_R_UNORM8,
+ 0, 0,
+ src->logical_width0, src->logical_height0,
+ 0, 0,
+ dst->logical_width0, dst->logical_height0,
+ GL_NEAREST, false, false /*mirror x, y*/,
+ false, false /* decode/encode srgb */);
+ }
+ }
+
+ brw_render_cache_set_check_flush(brw, dst->bo);
+ src->r8stencil_needs_update = false;
+}
+
static void *
intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt)
{
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 4473126..e7d4de0 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -974,6 +974,10 @@ intel_miptree_updownsample(struct brw_context *brw,
struct intel_mipmap_tree *src,
struct intel_mipmap_tree *dst);
+void
+intel_update_r8stencil(struct brw_context *brw,
+ struct intel_mipmap_tree *mt);
+
/**
* Horizontal distance from one slice to the next in the two-dimensional
* miptree layout.
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Mesa (master): i965: Track that the stencil data was updated when clearing
Module: Mesa
Branch: master
Commit: 7bd87c1e6e168b048cdf2318af8848d07caa6706
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7bd87c1e6e168b048cdf2318af8848d07caa6706
Author: Jordan Justen
Date: Sat Jun 11 16:27:48 2016 -0700
i965: Track that the stencil data was updated when clearing
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
Reviewed-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_clear.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c
b/src/mesa/drivers/dri/i965/brw_clear.c
index 1dfff09..18b8fcb 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -239,6 +239,14 @@ brw_clear(struct gl_context *ctx, GLbitfield mask)
}
}
+ if (mask & BUFFER_BIT_STENCIL) {
+ struct intel_renderbuffer *stencil_irb =
+ intel_get_renderbuffer(fb, BUFFER_STENCIL);
+ struct intel_mipmap_tree *mt = stencil_irb->mt;
+ if (mt && mt->stencil_mt)
+ mt->stencil_mt->r8stencil_needs_update = true;
+ }
+
/* BLORP is currently only supported on Gen6+. */
if (brw->gen >= 6 && (mask & BUFFER_BITS_COLOR)) {
const bool encode_srgb = ctx->Color.sRGBEnabled;
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Mesa (master): docs: Update stencil texturing & ES 3.1 status for i965 Haswell
Module: Mesa Branch: master Commit: 7970238fcff37c2450aebaae76e84b5c446d1b46 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7970238fcff37c2450aebaae76e84b5c446d1b46 Author: Jordan Justen Date: Thu Aug 18 15:05:13 2016 -0700 docs: Update stencil texturing & ES 3.1 status for i965 Haswell Signed-off-by: Jordan Justen Reviewed-by: Ian Romanick --- docs/GL3.txt | 6 +++--- docs/relnotes/12.1.0.html | 3 +++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index 084c17e..5dd9e41 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -180,7 +180,7 @@ GL 4.3, GLSL 4.30 -- all DONE: nvc0, radeonsi GL_ARB_robust_buffer_access_behavior DONE (i965) GL_ARB_shader_image_size DONE (i965, softpipe) GL_ARB_shader_storage_buffer_object DONE (i965, softpipe) - GL_ARB_stencil_texturing DONE (i965/gen8+, nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_stencil_texturing DONE (i965/hsw+, nv50, r600, llvmpipe, softpipe, swr) GL_ARB_texture_buffer_range DONE (nv50, i965, r600, llvmpipe) GL_ARB_texture_query_levels DONE (all drivers that support GLSL 1.30) GL_ARB_texture_storage_multisampleDONE (all drivers that support GL_ARB_texture_multisample) @@ -203,7 +203,7 @@ GL 4.4, GLSL 4.40: GL_ARB_multi_bind DONE (all drivers) GL_ARB_query_buffer_objectDONE (i965/hsw+, nvc0) GL_ARB_texture_mirror_clamp_to_edge DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_texture_stencil8 DONE (i965/gen8+, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) + GL_ARB_texture_stencil8 DONE (i965/hsw+, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) GL_ARB_vertex_type_10f_11f_11f_revDONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) GL 4.5, GLSL 4.50: @@ -222,7 +222,7 @@ GL 4.5, GLSL 4.50: GL_EXT_shader_integer_mix DONE (all drivers that support GLSL) These are the extensions cherry-picked to make GLES 3.1 -GLES3.1, GLSL ES 3.1 -- all DONE: i965/gen8+, nvc0, radeonsi +GLES3.1, GLSL ES 3.1 -- all DONE: i965/hsw+, nvc0, radeonsi GL_ARB_arrays_of_arrays DONE (all drivers that support GLSL 1.30) GL_ARB_compute_shader DONE (i965/gen7+, softpipe) diff --git a/docs/relnotes/12.1.0.html b/docs/relnotes/12.1.0.html index 5181fa0..2643a0c 100644 --- a/docs/relnotes/12.1.0.html +++ b/docs/relnotes/12.1.0.html @@ -53,6 +53,9 @@ Note: some of the new features are only available with certain drivers. GL_EXT_window_rectangles on nv50, nvc0 GL_KHR_texture_compression_astc_sliced_3d on i965 GL_OES_copy_image on nv50, nvc0, r600, radeonsi, softpipe, llvmpipe +GL_ARB_stencil_texturing on i965/hsw +GL_ARB_texture_stencil8 on i965/hsw +OpenGL ES 3.1 on i965/hsw Bug fixes ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i965: Enable ARB_texture_stencil8 for Haswell
Module: Mesa
Branch: master
Commit: 116b6e12d4d6f08d1c86475f5a2655d074804d6f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=116b6e12d4d6f08d1c86475f5a2655d074804d6f
Author: Jordan Justen
Date: Tue Jun 14 15:57:49 2016 -0700
i965: Enable ARB_texture_stencil8 for Haswell
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_extensions.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index be004a2..15009b0 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -375,6 +375,7 @@ intelInitExtensions(struct gl_context *ctx)
if (brw->gen >= 8 || brw->is_haswell) {
ctx->Extensions.ARB_stencil_texturing = true;
+ ctx->Extensions.ARB_texture_stencil8 = true;
}
if (brw->gen >= 8 || brw->is_haswell || brw->is_baytrail) {
@@ -395,7 +396,6 @@ intelInitExtensions(struct gl_context *ctx)
if (brw->gen >= 8) {
ctx->Extensions.ARB_shader_precision = true;
- ctx->Extensions.ARB_texture_stencil8 = true;
ctx->Extensions.ARB_gpu_shader_fp64 = true;
ctx->Extensions.ARB_vertex_attrib_64bit = true;
ctx->Extensions.OES_shader_io_blocks = true;
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Mesa (master): i965/gen7: Add R8_UINT stencil miptree copy for sampling
Module: Mesa
Branch: master
Commit: 2a9c65a01d133fe196fd6e40affb431295d0b9cc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2a9c65a01d133fe196fd6e40affb431295d0b9cc
Author: Jordan Justen
Date: Sat Jun 11 16:21:36 2016 -0700
i965/gen7: Add R8_UINT stencil miptree copy for sampling
For gen < 8, we can't sample from the stencil buffer, which is
required for the ARB_stencil_texturing extension. We'll make a copy of
the stencil data into a new texture that we can sample using the
R8_UINT surface type.
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
Reviewed-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 ++
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 12
2 files changed, 14 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 5fe6e47..d4f6c34 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -534,6 +534,7 @@ intel_miptree_create_layout(struct brw_context *brw,
intel_miptree_release(&mt);
return NULL;
}
+ mt->stencil_mt->r8stencil_needs_update = true;
/* Fix up the Z miptree format for how we're splitting out separate
* stencil. Gen7 expects there to be no stencil bits in its depth
buffer.
@@ -997,6 +998,7 @@ intel_miptree_release(struct intel_mipmap_tree **mt)
drm_intel_bo_unreference((*mt)->bo);
intel_miptree_release(&(*mt)->stencil_mt);
+ intel_miptree_release(&(*mt)->r8stencil_mt);
if ((*mt)->hiz_buf) {
if ((*mt)->hiz_buf->mt)
intel_miptree_release(&(*mt)->hiz_buf->mt);
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index a49da8c..4473126 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -615,6 +615,18 @@ struct intel_mipmap_tree
struct intel_mipmap_tree *stencil_mt;
/**
+* \brief Stencil texturing miptree for sampling from a stencil texture
+*
+* Some hardware doesn't support sampling from the stencil texture as
+* required by the GL_ARB_stencil_texturing extenion. To workaround this we
+* blit the texture into a new texture that can be sampled.
+*
+* \see intel_update_r8stencil()
+*/
+ struct intel_mipmap_tree *r8stencil_mt;
+ bool r8stencil_needs_update;
+
+ /**
* \brief MCS miptree.
*
* This miptree contains the "multisample control surface", which stores
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Mesa (master): i965: Enable OpenGLES 3.1 for Haswell
Module: Mesa Branch: master Commit: 93f5eb7ae75b68d1091c725912e576d533e91b2d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=93f5eb7ae75b68d1091c725912e576d533e91b2d Author: Jordan Justen Date: Wed Jun 8 13:17:41 2016 -0700 i965: Enable OpenGLES 3.1 for Haswell Signed-off-by: Jordan Justen Reviewed-by: Ian Romanick --- src/mesa/drivers/dri/i965/intel_screen.c | 5 + 1 file changed, 5 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index cb007d7..84977a7 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -1432,6 +1432,11 @@ set_max_gl_versions(struct intel_screen *screen) psp->max_gl_es2_version = 31; break; case 7: + psp->max_gl_core_version = 33; + psp->max_gl_compat_version = 30; + psp->max_gl_es1_version = 11; + psp->max_gl_es2_version = screen->devinfo->is_haswell ? 31 : 30; + break; case 6: psp->max_gl_core_version = 33; psp->max_gl_compat_version = 30; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i965: Fix assert with multisampling and cubemaps
Module: Mesa
Branch: master
Commit: 91627d1956a7e82a5821500a0bca537ffd6e5157
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=91627d1956a7e82a5821500a0bca537ffd6e5157
Author: Jordan Justen
Date: Tue Aug 23 21:46:58 2016 -0700
i965: Fix assert with multisampling and cubemaps
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index e7aa631..5fe6e47 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -384,6 +384,7 @@ intel_miptree_create_layout(struct brw_context *brw,
mt->msaa_layout = INTEL_MSAA_LAYOUT_NONE;
mt->refcount = 1;
+ int depth_multiply = 1;
if (num_samples > 1) {
/* Adjust width/height/depth for MSAA */
mt->msaa_layout = compute_msaa_layout(brw, format,
@@ -470,7 +471,8 @@ intel_miptree_create_layout(struct brw_context *brw,
}
} else {
/* Non-interleaved */
- depth0 *= num_samples;
+ depth_multiply = num_samples;
+ depth0 *= depth_multiply;
}
}
@@ -500,7 +502,7 @@ intel_miptree_create_layout(struct brw_context *brw,
}
if (target == GL_TEXTURE_CUBE_MAP)
- assert(depth0 == 6);
+ assert(depth0 == 6 * depth_multiply);
mt->physical_width0 = width0;
mt->physical_height0 = height0;
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Mesa (master): i965: Track that the stencil data was updated when rendering
Module: Mesa
Branch: master
Commit: 101b56bab26d13691cde877075fb13554ac780f9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=101b56bab26d13691cde877075fb13554ac780f9
Author: Jordan Justen
Date: Sat Jun 11 16:29:36 2016 -0700
i965: Track that the stencil data was updated when rendering
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
Reviewed-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen7_misc_state.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c
b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index ffdf6f2..271d962 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -166,6 +166,7 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
OUT_BATCH(0);
ADVANCE_BATCH();
} else {
+ stencil_mt->r8stencil_needs_update = true;
const int enabled = brw->is_haswell ? HSW_STENCIL_ENABLED : 0;
BEGIN_BATCH(3);
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Mesa (master): i965: Track that the stencil data was updated when using Tex*Image
Module: Mesa
Branch: master
Commit: c8194dc737464d19521c948aa555d936f47f381a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8194dc737464d19521c948aa555d936f47f381a
Author: Jordan Justen
Date: Wed Jul 6 15:50:34 2016 -0700
i965: Track that the stencil data was updated when using Tex*Image
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
Reviewed-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_tex_image.c| 3 +++
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 7 +--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c
b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 958f8bd..7affe08 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -108,6 +108,9 @@ intelTexImage(struct gl_context * ctx,
assert(intelImage->mt);
+ if (intelImage->mt->format == MESA_FORMAT_S_UINT8)
+ intelImage->mt->r8stencil_needs_update = true;
+
ok = _mesa_meta_pbo_TexSubImage(ctx, dims, texImage, 0, 0, 0,
texImage->Width, texImage->Height,
texImage->Depth,
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index 9561968..74d4c57 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
@@ -199,10 +199,13 @@ intelTexSubImage(struct gl_context * ctx,
const GLvoid * pixels,
const struct gl_pixelstore_attrib *packing)
{
- struct intel_texture_image *intelImage = intel_texture_image(texImage);
+ struct intel_mipmap_tree *mt = intel_texture_image(texImage)->mt;
bool ok;
- bool tex_busy = intelImage->mt && drm_intel_bo_busy(intelImage->mt->bo);
+ bool tex_busy = mt && drm_intel_bo_busy(mt->bo);
+
+ if (mt && mt->format == MESA_FORMAT_S_UINT8)
+ mt->r8stencil_needs_update = true;
DBG("%s mesa_format %s target %s format %s type %s level %d %dx%dx%d\n",
__func__, _mesa_get_format_name(texImage->TexFormat),
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Mesa (master): i965/gen7: Copy stencil when sampling the stencil texture
Module: Mesa
Branch: master
Commit: 8d78b096f8bbcad5e15000539ee475a8733140ca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d78b096f8bbcad5e15000539ee475a8733140ca
Author: Jordan Justen
Date: Sat Jun 11 16:46:13 2016 -0700
i965/gen7: Copy stencil when sampling the stencil texture
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_context.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 58cd03d..888097d 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -235,6 +235,11 @@ intel_update_state(struct gl_context * ctx, GLuint
new_state)
0 : INTEL_MIPTREE_IGNORE_CCS_E;
intel_miptree_resolve_color(brw, tex_obj->mt, flags);
brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
+
+ if (tex_obj->base.StencilSampling ||
+ tex_obj->mt->format == MESA_FORMAT_S_UINT8) {
+ intel_update_r8stencil(brw, tex_obj->mt);
+ }
}
/* Resolve color for each active shader image. */
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Mesa (master): main: Add MESA_VERBOSE=api support for glTexImage
Module: Mesa
Branch: master
Commit: 9a1f950bef862776cb81255b442be0a7e64cb5dd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a1f950bef862776cb81255b442be0a7e64cb5dd
Author: Jordan Justen
Date: Fri Jul 15 18:03:29 2016 -0700
main: Add MESA_VERBOSE=api support for glTexImage
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
---
src/mesa/main/teximage.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index 8869b3d..efde114 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -5341,6 +5341,11 @@ texture_image_multisample(struct gl_context *ctx, GLuint
dims,
GLenum sample_count_error;
bool dsa = strstr(func, "ture") ? true : false;
+ if (MESA_VERBOSE & (VERBOSE_API|VERBOSE_TEXTURE)) {
+ _mesa_debug(ctx, "%s(target=%s, samples=%d)\n", func,
+ _mesa_enum_to_string(target), samples);
+ }
+
if (!((ctx->Extensions.ARB_texture_multisample
&& _mesa_is_desktop_gl(ctx))) && !_mesa_is_gles31(ctx)) {
_mesa_error(ctx, GL_INVALID_OPERATION, "%s(unsupported)", func);
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Mesa (master): svga: add guest statistic gathering interface
Module: Mesa Branch: master Commit: 0035f7f13650680df1f09fc86c0c1c8c0b39f010 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0035f7f13650680df1f09fc86c0c1c8c0b39f010 Author: Charmaine Lee Date: Fri Aug 26 07:58:59 2016 -0600 svga: add guest statistic gathering interface This file was supposed to be added with the previous "svga: add guest statistic gathering interface" patch but went MIA for some reason. Reviewed-by: Brian Paul --- src/gallium/drivers/svga/svga_mksstats.h | 49 1 file changed, 49 insertions(+) diff --git a/src/gallium/drivers/svga/svga_mksstats.h b/src/gallium/drivers/svga/svga_mksstats.h new file mode 100644 index 000..a1c1573 --- /dev/null +++ b/src/gallium/drivers/svga/svga_mksstats.h @@ -0,0 +1,49 @@ +/** + * Copyright 2016 VMware, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **/ + +#ifndef _SVGA_MKSSTATS_H +#define _SVGA_MKSSTATS_H + +#include "svga_winsys.h" + +#ifdef VMX86_STATS +#define SVGA_STATS_COUNT_INC(_sws, _stat)\ + _sws->stats_inc(_stat); + +#define SVGA_STATS_TIME_PUSH(_sws, _stat)\ + struct svga_winsys_stats_timeframe timeFrame; \ + _sws->stats_time_push(_stat, &timeFrame); + +#define SVGA_STATS_TIME_POP(_sws)\ + _sws->stats_time_pop(); + +#else + +#define SVGA_STATS_COUNT_INC(_sws, _stat) +#define SVGA_STATS_TIME_PUSH(_sws, _stat) +#define SVGA_STATS_TIME_POP(_sws) + +#endif +#endif /* _SVGA_MKSSTATS_H */ ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): radeonsi: disable CE on SI + AMDGPU
Module: Mesa
Branch: master
Commit: 49c798e902be6c95ae44422cb05c98e1e8f6f1ca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=49c798e902be6c95ae44422cb05c98e1e8f6f1ca
Author: Marek Olšák
Date: Fri Aug 19 01:37:34 2016 +0200
radeonsi: disable CE on SI + AMDGPU
Reviewed-by: Edward O'Callaghan
Reviewed-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeonsi/si_pipe.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index 67c3a26..8e7d021 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -186,7 +186,9 @@ static struct pipe_context *si_create_context(struct
pipe_screen *screen,
sctx->b.gfx.cs = ws->cs_create(sctx->b.ctx, RING_GFX,
si_context_gfx_flush, sctx);
- if (!(sscreen->b.debug_flags & DBG_NO_CE) && ws->cs_add_const_ib) {
+ /* SI + AMDGPU + CE = GPU hang */
+ if (!(sscreen->b.debug_flags & DBG_NO_CE) && ws->cs_add_const_ib &&
+ sscreen->b.chip_class != SI) {
sctx->ce_ib = ws->cs_add_const_ib(sctx->b.gfx.cs);
if (!sctx->ce_ib)
goto fail;
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Mesa (master): winsys/amdgpu: finish up SI addrlib integration
Module: Mesa
Branch: master
Commit: a6869e7c06e362749219c83bc9b106cda89b9bc0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6869e7c06e362749219c83bc9b106cda89b9bc0
Author: Marek Olšák
Date: Fri Aug 19 01:40:29 2016 +0200
winsys/amdgpu: finish up SI addrlib integration
Reviewed-by: Edward O'Callaghan
---
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 30 +-
1 file changed, 25 insertions(+), 5 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
index 9466e7c..8bfea45 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
@@ -369,7 +369,8 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
* - Mipmapped array textures have low performance (discovered by a closed
* driver team).
*/
- AddrSurfInfoIn.flags.dccCompatible = !(surf->flags &
RADEON_SURF_Z_OR_SBUFFER) &&
+ AddrSurfInfoIn.flags.dccCompatible = ws->info.chip_class >= VI &&
+!(surf->flags &
RADEON_SURF_Z_OR_SBUFFER) &&
!(surf->flags &
RADEON_SURF_DISABLE_DCC) &&
!compressed && AddrDccIn.numSamples <=
1 &&
((surf->array_size == 1 &&
surf->npix_z == 1) ||
@@ -414,10 +415,29 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
assert(!(surf->flags & RADEON_SURF_Z_OR_SBUFFER));
assert(AddrSurfInfoIn.tileMode == ADDR_TM_2D_TILED_THIN1);
- if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE)
- AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */
- else
- AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */
+ if (ws->info.chip_class == SI) {
+ if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE) {
+if (surf->bpe == 2)
+ AddrSurfInfoIn.tileIndex = 11; /* 16bpp */
+else
+ AddrSurfInfoIn.tileIndex = 12; /* 32bpp */
+ } else {
+if (surf->bpe == 1)
+ AddrSurfInfoIn.tileIndex = 14; /* 8bpp */
+else if (surf->bpe == 2)
+ AddrSurfInfoIn.tileIndex = 15; /* 16bpp */
+else if (surf->bpe == 4)
+ AddrSurfInfoIn.tileIndex = 16; /* 32bpp */
+else
+ AddrSurfInfoIn.tileIndex = 17; /* 64bpp (and 128bpp) */
+ }
+ } else {
+ /* CIK - VI */
+ if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE)
+AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */
+ else
+AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */
+ }
}
surf->bo_size = 0;
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Mesa (master): radeonsi: fix printing shaders and states on a VM fault
Module: Mesa
Branch: master
Commit: 7172906c0c5943141cbf23bc15de0aba8e565dae
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7172906c0c5943141cbf23bc15de0aba8e565dae
Author: Marek Olšák
Date: Thu Aug 18 15:24:41 2016 +0200
radeonsi: fix printing shaders and states on a VM fault
This was missed while rewriting the PIPE_DUMP flags.
Reviewed-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeonsi/si_debug.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_debug.c
b/src/gallium/drivers/radeonsi/si_debug.c
index 7e75d3f..8ce9caf 100644
--- a/src/gallium/drivers/radeonsi/si_debug.c
+++ b/src/gallium/drivers/radeonsi/si_debug.c
@@ -827,7 +827,9 @@ void si_check_vm_faults(struct r600_common_context *ctx,
switch (ring) {
case RING_GFX:
- si_dump_debug_state(&sctx->b.b, f, 0);
+ si_dump_debug_state(&sctx->b.b, f,
+ PIPE_DUMP_CURRENT_STATES |
+ PIPE_DUMP_CURRENT_SHADERS);
break;
case RING_DMA:
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Mesa (master): gallium/radeon: add a driver query for AMDGPU_INFO_NUM_EVICTIONS
Module: Mesa
Branch: master
Commit: 971ef7518fe06033222b53ea843792d3018c6ab2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=971ef7518fe06033222b53ea843792d3018c6ab2
Author: Marek Olšák
Date: Thu Aug 18 01:18:14 2016 +0200
gallium/radeon: add a driver query for AMDGPU_INFO_NUM_EVICTIONS
If the kernel driver doesn't support it, it returns 0.
Reviewed-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeon/r600_query.c | 8 ++--
src/gallium/drivers/radeon/r600_query.h | 1 +
src/gallium/drivers/radeon/radeon_winsys.h| 1 +
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 7 +++
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 2 ++
5 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_query.c
b/src/gallium/drivers/radeon/r600_query.c
index 5825e8b..bd0a906 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -56,6 +56,7 @@ static enum radeon_value_id winsys_id_from_type(unsigned type)
case R600_QUERY_BUFFER_WAIT_TIME: return RADEON_BUFFER_WAIT_TIME_NS;
case R600_QUERY_NUM_CS_FLUSHES: return RADEON_NUM_CS_FLUSHES;
case R600_QUERY_NUM_BYTES_MOVED: return RADEON_NUM_BYTES_MOVED;
+ case R600_QUERY_NUM_EVICTIONS: return RADEON_NUM_EVICTIONS;
case R600_QUERY_VRAM_USAGE: return RADEON_VRAM_USAGE;
case R600_QUERY_GTT_USAGE: return RADEON_GTT_USAGE;
case R600_QUERY_GPU_TEMPERATURE: return RADEON_GPU_TEMPERATURE;
@@ -103,7 +104,8 @@ static bool r600_query_sw_begin(struct r600_common_context
*rctx,
break;
case R600_QUERY_BUFFER_WAIT_TIME:
case R600_QUERY_NUM_CS_FLUSHES:
- case R600_QUERY_NUM_BYTES_MOVED: {
+ case R600_QUERY_NUM_BYTES_MOVED:
+ case R600_QUERY_NUM_EVICTIONS: {
enum radeon_value_id ws_id = winsys_id_from_type(query->b.type);
query->begin_result = rctx->ws->query_value(rctx->ws, ws_id);
break;
@@ -167,7 +169,8 @@ static bool r600_query_sw_end(struct r600_common_context
*rctx,
case R600_QUERY_CURRENT_GPU_MCLK:
case R600_QUERY_BUFFER_WAIT_TIME:
case R600_QUERY_NUM_CS_FLUSHES:
- case R600_QUERY_NUM_BYTES_MOVED: {
+ case R600_QUERY_NUM_BYTES_MOVED:
+ case R600_QUERY_NUM_EVICTIONS: {
enum radeon_value_id ws_id = winsys_id_from_type(query->b.type);
query->end_result = rctx->ws->query_value(rctx->ws, ws_id);
break;
@@ -1186,6 +1189,7 @@ static struct pipe_driver_query_info
r600_driver_query_list[] = {
X("buffer-wait-time", BUFFER_WAIT_TIME, MICROSECONDS,
CUMULATIVE),
X("num-cs-flushes", NUM_CS_FLUSHES, UINT64,
AVERAGE),
X("num-bytes-moved",NUM_BYTES_MOVED,BYTES,
CUMULATIVE),
+ X("num-evictions", NUM_EVICTIONS, UINT64,
CUMULATIVE),
X("VRAM-usage", VRAM_USAGE, BYTES, AVERAGE),
X("GTT-usage", GTT_USAGE, BYTES, AVERAGE),
X("back-buffer-ps-draw-ratio", BACK_BUFFER_PS_DRAW_RATIO, UINT64,
AVERAGE),
diff --git a/src/gallium/drivers/radeon/r600_query.h
b/src/gallium/drivers/radeon/r600_query.h
index 7aa684c..0bb7cdd 100644
--- a/src/gallium/drivers/radeon/r600_query.h
+++ b/src/gallium/drivers/radeon/r600_query.h
@@ -53,6 +53,7 @@ enum {
R600_QUERY_BUFFER_WAIT_TIME,
R600_QUERY_NUM_CS_FLUSHES,
R600_QUERY_NUM_BYTES_MOVED,
+ R600_QUERY_NUM_EVICTIONS,
R600_QUERY_VRAM_USAGE,
R600_QUERY_GTT_USAGE,
R600_QUERY_GPU_TEMPERATURE,
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h
b/src/gallium/drivers/radeon/radeon_winsys.h
index f4e3773..741dc99 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -160,6 +160,7 @@ enum radeon_value_id {
RADEON_TIMESTAMP,
RADEON_NUM_CS_FLUSHES,
RADEON_NUM_BYTES_MOVED,
+RADEON_NUM_EVICTIONS,
RADEON_VRAM_USAGE,
RADEON_GTT_USAGE,
RADEON_GPU_TEMPERATURE, /* DRM 2.42.0 */
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index 9556777..d8aed8b 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -59,6 +59,10 @@
#define CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_8X16 16
#define CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_16X16 17
+#ifndef AMDGPU_INFO_NUM_EVICTIONS
+#define AMDGPU_INFO_NUM_EVICTIONS 0x18
+#endif
+
static struct util_hash_table *dev_tab = NULL;
pipe_static_mutex(dev_tab_mutex);
@@ -393,6 +397,9 @@ static uint64_t amdgpu_query_value(struct radeon_winsys
*rws,
case RADEON_NUM_BYTES_MOVED:
amdgpu_query_info(ws->dev, AMDGPU_INFO_NUM_BYTES_MOVED, 8, &retval);
return retval;
+ case RADEON_NUM_EVICTIONS:
+
Mesa (master): radeonsi: enable SDMA on CIK
Module: Mesa Branch: master Commit: 0241d8300f66ee2c6c2c55fe64ac88d76440c591 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0241d8300f66ee2c6c2c55fe64ac88d76440c591 Author: Marek Olšák Date: Thu Aug 18 13:03:26 2016 +0200 radeonsi: enable SDMA on CIK It passes R600_DEBUG=testdma on Bonaire/radeon. Reviewed-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/cik_sdma.c | 4 1 file changed, 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/cik_sdma.c b/src/gallium/drivers/radeonsi/cik_sdma.c index d15d8dc..e1fd050 100644 --- a/src/gallium/drivers/radeonsi/cik_sdma.c +++ b/src/gallium/drivers/radeonsi/cik_sdma.c @@ -165,10 +165,6 @@ static bool cik_sdma_copy_texture(struct si_context *sctx, src_slice_pitch * bpp * (srcz + src_box->depth) <= rsrc->resource.buf->size); - /* Test CIK with radeon and amdgpu before enabling this. */ - if (sctx->b.chip_class == CIK) - return false; - if (!r600_prepare_for_dma_blit(&sctx->b, rdst, dst_level, dstx, dsty, dstz, rsrc, src_level, src_box)) return false; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): radeonsi: increase performance for DRI PRIME offloading if 2nd GPU is CIK or VI
Module: Mesa
Branch: master
Commit: 5ee3cac1380fec6971e9d25267589a586da0ecd8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ee3cac1380fec6971e9d25267589a586da0ecd8
Author: Marek Olšák
Date: Thu Aug 18 13:05:29 2016 +0200
radeonsi: increase performance for DRI PRIME offloading if 2nd GPU is CIK or VI
SDMA is much faster for tiled->linear blits from VRAM to GTT.
I have Bonaire in my second PCIe slot.
$ glxinfo | grep OpenGL.renderer
OpenGL renderer string: Gallium 0.4 on AMD TONGA ...
$ DRI_PRIME=1 glxinfo | grep OpenGL.renderer
OpenGL renderer string: Gallium 0.4 on AMD BONAIRE ...
Without SDMA:
$ DRI_PRIME=1 glxgears
8796 frames in 5.0 seconds = 1759.074 FPS
8899 frames in 5.0 seconds = 1779.672 FPS
With SDMA:
$ DRI_PRIME=1 glxgears
12765 frames in 5.0 seconds = 2552.788 FPS
12888 frames in 5.0 seconds = 2577.495 FPS
The 1st GPU is irrelevant. The improvement should be much lower at 60 fps,
but definitely measurable.
SI will get this once we add SDMA blit support for it.
Reviewed-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeonsi/si_blit.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c
b/src/gallium/drivers/radeonsi/si_blit.c
index 3cfd011..1147b5b 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -1096,11 +1096,30 @@ static void si_blit(struct pipe_context *ctx,
const struct pipe_blit_info *info)
{
struct si_context *sctx = (struct si_context*)ctx;
+ struct r600_texture *rdst = (struct r600_texture *)info->dst.resource;
if (do_hardware_msaa_resolve(ctx, info)) {
return;
}
+ /* Using SDMA for copying to a linear texture in GTT is much faster.
+* This improves DRI PRIME performance.
+*
+* resource_copy_region can't do this yet, because dma_copy calls it
+* on failure (recursion).
+*/
+ if (rdst->surface.level[info->dst.level].mode ==
+ RADEON_SURF_MODE_LINEAR_ALIGNED &&
+ sctx->b.dma_copy &&
+ util_can_blit_via_copy_region(info, false)) {
+ sctx->b.dma_copy(ctx, info->dst.resource, info->dst.level,
+info->dst.box.x, info->dst.box.y,
+info->dst.box.z,
+info->src.resource, info->src.level,
+&info->src.box);
+ return;
+ }
+
assert(util_blitter_is_blit_supported(sctx->blitter, info));
/* The driver doesn't decompress resources automatically while
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Mesa (master): winsys/amdgpu: initial SI support
Module: Mesa
Branch: master
Commit: 97b55243fbea9b5d0e76217e986e85b96fd09f93
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=97b55243fbea9b5d0e76217e986e85b96fd09f93
Author: Ronie Salgado
Date: Thu Feb 11 06:17:33 2016 -0300
winsys/amdgpu: initial SI support
Signed-off-by: Marek Olšák
Reviewed-by: Edward O'Callaghan
---
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 18 ++
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 9 +++--
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 25 +
3 files changed, 46 insertions(+), 6 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index b171cc5..bf3e306 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -980,13 +980,23 @@ static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs,
switch (cs->ring_type) {
case RING_DMA:
/* pad DMA ring to 8 DWs */
- while (rcs->current.cdw & 7)
- OUT_CS(rcs, 0x); /* NOP packet */
+ if (ws->info.chip_class <= SI) {
+ while (rcs->current.cdw & 7)
+OUT_CS(rcs, 0xf000); /* NOP packet */
+ } else {
+ while (rcs->current.cdw & 7)
+OUT_CS(rcs, 0x); /* NOP packet */
+ }
break;
case RING_GFX:
/* pad GFX ring to 8 DWs to meet CP fetch alignment requirements */
- while (rcs->current.cdw & 7)
- OUT_CS(rcs, 0x1000); /* type3 nop packet */
+ if (ws->info.gfx_ib_pad_with_type2) {
+ while (rcs->current.cdw & 7)
+OUT_CS(rcs, 0x8000); /* type2 nop packet */
+ } else {
+ while (rcs->current.cdw & 7)
+OUT_CS(rcs, 0x1000); /* type3 nop packet */
+ }
/* Also pad the const IB. */
if (cs->const_ib.ib_mapped)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
index 615d5a2..9466e7c 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
@@ -126,8 +126,13 @@ ADDR_HANDLE amdgpu_addr_create(struct amdgpu_winsys *ws)
regValue.backendDisables = ws->amdinfo.backend_disable[0];
regValue.pTileConfig = ws->amdinfo.gb_tile_mode;
regValue.noOfEntries = ARRAY_SIZE(ws->amdinfo.gb_tile_mode);
- regValue.pMacroTileConfig = ws->amdinfo.gb_macro_tile_mode;
- regValue.noOfMacroEntries = ARRAY_SIZE(ws->amdinfo.gb_macro_tile_mode);
+ if (ws->info.chip_class == SI) {
+ regValue.pMacroTileConfig = NULL;
+ regValue.noOfMacroEntries = 0;
+ } else {
+ regValue.pMacroTileConfig = ws->amdinfo.gb_macro_tile_mode;
+ regValue.noOfMacroEntries = ARRAY_SIZE(ws->amdinfo.gb_macro_tile_mode);
+ }
createFlags.value = 0;
createFlags.useTileIndex = 1;
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index d8aed8b..0ae1861 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -215,6 +215,8 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
ws->info.chip_class = VI;
else if (ws->info.family >= CHIP_BONAIRE)
ws->info.chip_class = CIK;
+ else if (ws->info.family >= CHIP_TAHITI)
+ ws->info.chip_class = SI;
else {
fprintf(stderr, "amdgpu: Unknown family.\n");
goto fail;
@@ -230,6 +232,26 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int
fd)
/* family and rev_id are for addrlib */
switch (ws->info.family) {
+ case CHIP_TAHITI:
+ ws->family = FAMILY_SI;
+ ws->rev_id = SI_TAHITI_P_A0;
+ break;
+ case CHIP_PITCAIRN:
+ ws->family = FAMILY_SI;
+ ws->rev_id = SI_PITCAIRN_PM_A0;
+ break;
+ case CHIP_VERDE:
+ ws->family = FAMILY_SI;
+ ws->rev_id = SI_CAPEVERDE_M_A0;
+ break;
+ case CHIP_OLAND:
+ ws->family = FAMILY_SI;
+ ws->rev_id = SI_OLAND_M_A0;
+ break;
+ case CHIP_HAINAN:
+ ws->family = FAMILY_SI;
+ ws->rev_id = SI_HAINAN_V_A0;
+ break;
case CHIP_BONAIRE:
ws->family = FAMILY_CI;
ws->rev_id = CI_BONAIRE_M_A0;
@@ -331,6 +353,9 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
ws->info.gart_page_size = alignment_info.size_remote;
+ if (ws->info.chip_class == SI)
+ ws->info.gfx_ib_pad_with_type2 = TRUE;
+
ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") !=
NULL;
return true;
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Mesa (master): gallium/radeon: increase priority for shader binaries
Module: Mesa
Branch: master
Commit: bcfd49e5119a0c315aebf4773e7c50fe282339b2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bcfd49e5119a0c315aebf4773e7c50fe282339b2
Author: Marek Olšák
Date: Wed Aug 17 14:24:26 2016 +0200
gallium/radeon: increase priority for shader binaries
Reviewed-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeon/radeon_winsys.h | 2 +-
src/gallium/drivers/radeonsi/si_debug.c| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h
b/src/gallium/drivers/radeon/radeon_winsys.h
index cbab406..f4e3773 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -186,7 +186,6 @@ enum radeon_bo_priority {
RADEON_PRIO_SDMA_TEXTURE,
RADEON_PRIO_CP_DMA = 12,
-RADEON_PRIO_SHADER_BINARY,
RADEON_PRIO_CONST_BUFFER = 16,
RADEON_PRIO_DESCRIPTORS,
@@ -214,6 +213,7 @@ enum radeon_bo_priority {
RADEON_PRIO_CMASK = 52,
RADEON_PRIO_DCC,
RADEON_PRIO_HTILE,
+RADEON_PRIO_SHADER_BINARY, /* the hw can't hide instruction cache misses */
RADEON_PRIO_SHADER_RINGS = 56,
diff --git a/src/gallium/drivers/radeonsi/si_debug.c
b/src/gallium/drivers/radeonsi/si_debug.c
index 4b500cf..7e75d3f 100644
--- a/src/gallium/drivers/radeonsi/si_debug.c
+++ b/src/gallium/drivers/radeonsi/si_debug.c
@@ -553,7 +553,6 @@ static const char *priority_to_string(enum
radeon_bo_priority priority)
ITEM(SDMA_BUFFER),
ITEM(SDMA_TEXTURE),
ITEM(CP_DMA),
- ITEM(SHADER_BINARY),
ITEM(CONST_BUFFER),
ITEM(DESCRIPTORS),
ITEM(BORDER_COLORS),
@@ -571,6 +570,7 @@ static const char *priority_to_string(enum
radeon_bo_priority priority)
ITEM(CMASK),
ITEM(DCC),
ITEM(HTILE),
+ ITEM(SHADER_BINARY),
ITEM(SHADER_RINGS),
ITEM(SCRATCH_BUFFER),
};
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Mesa (master): winsys/amdgpu: disable IB chaining on SI
Module: Mesa
Branch: master
Commit: 281f1a5980e86b7f9083c23ac451591fa9c7e361
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=281f1a5980e86b7f9083c23ac451591fa9c7e361
Author: Marek Olšák
Date: Fri Jun 24 18:13:21 2016 +0200
winsys/amdgpu: disable IB chaining on SI
Reviewed-by: Edward O'Callaghan
Reviewed-by: Bas Nieuwenhuizen
---
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index bf3e306..e246f81 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -249,9 +249,10 @@ static bool amdgpu_cs_has_user_fence(struct
amdgpu_cs_context *cs)
cs->request.ip_type != AMDGPU_HW_IP_VCE;
}
-static bool amdgpu_cs_has_chaining(enum ring_type ring_type)
+static bool amdgpu_cs_has_chaining(struct amdgpu_cs *cs)
{
- return ring_type == RING_GFX;
+ return cs->ctx->ws->info.chip_class >= CIK &&
+ cs->ring_type == RING_GFX;
}
static unsigned amdgpu_cs_epilog_dws(enum ring_type ring_type)
@@ -384,7 +385,7 @@ static bool amdgpu_ib_new_buffer(struct amdgpu_winsys *ws,
struct amdgpu_ib *ib)
* is the largest power of two that fits into the size field of the
* INDIRECT_BUFFER packet.
*/
- if (amdgpu_cs_has_chaining(amdgpu_cs_from_ib(ib)->ring_type))
+ if (amdgpu_cs_has_chaining(amdgpu_cs_from_ib(ib)))
buffer_size = 4 *util_next_power_of_two(ib->max_ib_size);
else
buffer_size = 4 *util_next_power_of_two(4 * ib->max_ib_size);
@@ -477,7 +478,7 @@ static bool amdgpu_get_new_ib(struct radeon_winsys *ws,
struct amdgpu_cs *cs,
unreachable("unhandled IB type");
}
- if (!amdgpu_cs_has_chaining(cs->ring_type)) {
+ if (!amdgpu_cs_has_chaining(cs)) {
ib_size = MAX2(ib_size,
4 * MIN2(util_next_power_of_two(ib->max_ib_size),
amdgpu_ib_max_submit_dwords(ib_type)));
@@ -741,7 +742,7 @@ static bool amdgpu_cs_check_space(struct radeon_winsys_cs
*rcs, unsigned dw)
if (rcs->current.max_dw - rcs->current.cdw >= dw)
return true;
- if (!amdgpu_cs_has_chaining(cs->ring_type))
+ if (!amdgpu_cs_has_chaining(cs))
return false;
/* Allocate a new chunk */
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Mesa (master): gallium/radeon: merge USER_SHADER and INTERNAL_SHADER priority flags
Module: Mesa
Branch: master
Commit: c3f716fe6749c65c7a75e48b57d0bdccb93526ef
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3f716fe6749c65c7a75e48b57d0bdccb93526ef
Author: Marek Olšák
Date: Wed Aug 17 14:22:11 2016 +0200
gallium/radeon: merge USER_SHADER and INTERNAL_SHADER priority flags
there's no reason to separate these
Reviewed-by: Bas Nieuwenhuizen
---
src/gallium/drivers/r600/evergreen_compute.c| 2 +-
src/gallium/drivers/r600/evergreen_state.c | 2 +-
src/gallium/drivers/r600/r600_state.c | 2 +-
src/gallium/drivers/r600/r600_state_common.c| 2 +-
src/gallium/drivers/radeon/radeon_winsys.h | 3 +--
src/gallium/drivers/radeonsi/si_compute.c | 2 +-
src/gallium/drivers/radeonsi/si_debug.c | 3 +--
src/gallium/drivers/radeonsi/si_state_shaders.c | 12 ++--
8 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_compute.c
b/src/gallium/drivers/r600/evergreen_compute.c
index 292b5e3..fe43f37 100644
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -584,7 +584,7 @@ void evergreen_emit_cs_shader(struct r600_context *rctx,
radeon_emit(cs, PKT3C(PKT3_NOP, 0, 0));
radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx,
code_bo, RADEON_USAGE_READ,
- RADEON_PRIO_USER_SHADER));
+ RADEON_PRIO_SHADER_BINARY));
}
static void evergreen_launch_grid(struct pipe_context *ctx,
diff --git a/src/gallium/drivers/r600/evergreen_state.c
b/src/gallium/drivers/r600/evergreen_state.c
index 3d1a19d..11c8161 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2156,7 +2156,7 @@ static void evergreen_emit_vertex_fetch_shader(struct
r600_context *rctx, struct
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx,
shader->buffer,
RADEON_USAGE_READ,
-
RADEON_PRIO_INTERNAL_SHADER));
+ RADEON_PRIO_SHADER_BINARY));
}
static void evergreen_emit_shader_stages(struct r600_context *rctx, struct
r600_atom *a)
diff --git a/src/gallium/drivers/r600/r600_state.c
b/src/gallium/drivers/r600/r600_state.c
index 62b1c2c..fb2861a 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1909,7 +1909,7 @@ static void r600_emit_vertex_fetch_shader(struct
r600_context *rctx, struct r600
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx,
shader->buffer,
RADEON_USAGE_READ,
-
RADEON_PRIO_INTERNAL_SHADER));
+ RADEON_PRIO_SHADER_BINARY));
}
static void r600_emit_shader_stages(struct r600_context *rctx, struct
r600_atom *a)
diff --git a/src/gallium/drivers/r600/r600_state_common.c
b/src/gallium/drivers/r600/r600_state_common.c
index 9008a4a..a5341c3 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -2156,7 +2156,7 @@ void r600_emit_shader(struct r600_context *rctx, struct
r600_atom *a)
r600_emit_command_buffer(cs, &shader->command_buffer);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx,
shader->bo,
- RADEON_USAGE_READ,
RADEON_PRIO_USER_SHADER));
+ RADEON_USAGE_READ,
RADEON_PRIO_SHADER_BINARY));
}
unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format,
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h
b/src/gallium/drivers/radeon/radeon_winsys.h
index c65b9a4..cbab406 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -186,8 +186,7 @@ enum radeon_bo_priority {
RADEON_PRIO_SDMA_TEXTURE,
RADEON_PRIO_CP_DMA = 12,
-RADEON_PRIO_USER_SHADER,
-RADEON_PRIO_INTERNAL_SHADER, /* fetch shader, etc. */
+RADEON_PRIO_SHADER_BINARY,
RADEON_PRIO_CONST_BUFFER = 16,
RADEON_PRIO_DESCRIPTORS,
diff --git a/src/gallium/drivers/radeonsi/si_compute.c
b/src/gallium/drivers/radeonsi/si_compute.c
index c3e8a35..17a4125 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -288,7 +288,7 @@ static bool si_switch_compute_shader(struct si_context
*sctx,
shader_va = shader->bo->gpu_address + offset;
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, shader->bo,
- RA
Mesa (master): svga: avoid emitting redundant DXSetSamplers command
Module: Mesa
Branch: master
Commit: 3f51a3f6ac2aad0400e25ef6f772ff9c4b240d5f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f51a3f6ac2aad0400e25ef6f772ff9c4b240d5f
Author: Charmaine Lee
Date: Mon Aug 15 18:35:28 2016 -0700
svga: avoid emitting redundant DXSetSamplers command
This patch avoid emitting redundant DXSetSamplers command.
Tested with Lightsmark2008, Heaven, MTT piglit, glretrace, viewperf.
Reviewed-by: Brian Paul
---
src/gallium/drivers/svga/svga_context.c | 2 ++
src/gallium/drivers/svga/svga_state_sampler.c | 31 ---
2 files changed, 25 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_context.c
b/src/gallium/drivers/svga/svga_context.c
index d422aec..7ac90f7 100644
--- a/src/gallium/drivers/svga/svga_context.c
+++ b/src/gallium/drivers/svga/svga_context.c
@@ -232,6 +232,8 @@ struct pipe_context *svga_context_create(struct pipe_screen
*screen,
memset(&svga->state.hw_draw, 0xcd, sizeof(svga->state.hw_draw));
memset(&svga->state.hw_draw.views, 0x0, sizeof(svga->state.hw_draw.views));
+ memset(&svga->state.hw_draw.num_samplers, 0,
+ sizeof(svga->state.hw_draw.num_samplers));
memset(&svga->state.hw_draw.num_sampler_views, 0,
sizeof(svga->state.hw_draw.num_sampler_views));
svga->state.hw_draw.num_views = 0;
diff --git a/src/gallium/drivers/svga/svga_state_sampler.c
b/src/gallium/drivers/svga/svga_state_sampler.c
index 2f0f838..216ab81 100644
--- a/src/gallium/drivers/svga/svga_state_sampler.c
+++ b/src/gallium/drivers/svga/svga_state_sampler.c
@@ -304,6 +304,7 @@ update_samplers(struct svga_context *svga, unsigned dirty )
const unsigned count = svga->curr.num_samplers[shader];
SVGA3dSamplerId ids[PIPE_MAX_SAMPLERS];
unsigned i;
+ unsigned nsamplers;
for (i = 0; i < count; i++) {
if (svga->curr.sampler[shader][i]) {
@@ -315,20 +316,25 @@ update_samplers(struct svga_context *svga, unsigned dirty
)
}
}
- if (count > 0) {
+ for (; i < svga->state.hw_draw.num_samplers[shader]; i++) {
+ ids[i] = SVGA3D_INVALID_ID;
+ }
+
+ nsamplers = MAX2(svga->state.hw_draw.num_samplers[shader], count);
+ if (nsamplers > 0) {
if (count != svga->state.hw_draw.num_samplers[shader] ||
memcmp(ids, svga->state.hw_draw.samplers[shader],
count * sizeof(ids[0])) != 0) {
/* HW state is really changing */
ret = SVGA3D_vgpu10_SetSamplers(svga->swc,
-count,
+nsamplers,
0, /* start
*/
svga_shader_type(shader), /* type
*/
ids);
if (ret != PIPE_OK)
return ret;
memcpy(svga->state.hw_draw.samplers[shader], ids,
- count * sizeof(ids[0]));
+ nsamplers * sizeof(ids[0]));
svga->state.hw_draw.num_samplers[shader] = count;
}
}
@@ -344,11 +350,20 @@ update_samplers(struct svga_context *svga, unsigned dirty
)
return PIPE_OK; /* probably out of memory */
}
- ret = SVGA3D_vgpu10_SetSamplers(svga->swc,
- 1, /* count */
- unit, /* start */
- SVGA3D_SHADERTYPE_PS,
- &sampler->id);
+ if (svga->state.hw_draw.samplers[PIPE_SHADER_FRAGMENT][unit]
+ != sampler->id) {
+ ret = SVGA3D_vgpu10_SetSamplers(svga->swc,
+ 1, /* count */
+ unit, /* start */
+ SVGA3D_SHADERTYPE_PS,
+ &sampler->id);
+ if (ret != PIPE_OK)
+return ret;
+
+ /* save the polygon stipple sampler in the hw draw state */
+ svga->state.hw_draw.samplers[PIPE_SHADER_FRAGMENT][unit] =
+sampler->id;
+ }
}
return ret;
___
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Mesa (master): svga: use local variable blit instead of pointer
Module: Mesa
Branch: master
Commit: 3b7341d5476fbeda7df673216d86d062fefd2a55
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b7341d5476fbeda7df673216d86d062fefd2a55
Author: Neha Bhende
Date: Fri Aug 19 13:52:57 2016 -0600
svga: use local variable blit instead of pointer
Reviewed-by: Brian Paul
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_pipe_blit.c | 59 ---
1 file changed, 30 insertions(+), 29 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_pipe_blit.c
b/src/gallium/drivers/svga/svga_pipe_blit.c
index 9d8c4fe..ea0b396 100644
--- a/src/gallium/drivers/svga/svga_pipe_blit.c
+++ b/src/gallium/drivers/svga/svga_pipe_blit.c
@@ -258,12 +258,13 @@ svga_blit(struct pipe_context *pipe,
const struct pipe_blit_info *blit_info)
{
struct svga_context *svga = svga_context(pipe);
+ struct pipe_blit_info blit = *blit_info;
if (!svga_have_vgpu10(svga) &&
- blit_info->src.resource->nr_samples > 1 &&
- blit_info->dst.resource->nr_samples <= 1 &&
- !util_format_is_depth_or_stencil(blit_info->src.resource->format) &&
- !util_format_is_pure_integer(blit_info->src.resource->format)) {
+ blit.src.resource->nr_samples > 1 &&
+ blit.dst.resource->nr_samples <= 1 &&
+ !util_format_is_depth_or_stencil(blit.src.resource->format) &&
+ !util_format_is_pure_integer(blit.src.resource->format)) {
debug_printf("svga: color resolve unimplemented\n");
return;
}
@@ -271,53 +272,53 @@ svga_blit(struct pipe_context *pipe,
if (can_blit_via_copy_region_vgpu10(svga, blit_info)) {
unsigned src_face, src_z, dst_face, dst_z;
- if (blit_info->src.resource->target == PIPE_TEXTURE_CUBE) {
- src_face = blit_info->src.box.z;
+ if (blit.src.resource->target == PIPE_TEXTURE_CUBE) {
+ src_face = blit.src.box.z;
src_z = 0;
- assert(blit_info->src.box.depth == 1);
+ assert(blit.src.box.depth == 1);
}
else {
src_face = 0;
- src_z = blit_info->src.box.z;
+ src_z = blit.src.box.z;
}
- if (blit_info->dst.resource->target == PIPE_TEXTURE_CUBE) {
- dst_face = blit_info->dst.box.z;
+ if (blit.dst.resource->target == PIPE_TEXTURE_CUBE) {
+ dst_face = blit.dst.box.z;
dst_z = 0;
- assert(blit_info->src.box.depth == 1);
+ assert(blit.src.box.depth == 1);
}
else {
dst_face = 0;
- dst_z = blit_info->dst.box.z;
+ dst_z = blit.dst.box.z;
}
copy_region_vgpu10(svga,
- blit_info->src.resource,
- blit_info->src.box.x, blit_info->src.box.y, src_z,
- blit_info->src.level, src_face,
- blit_info->dst.resource,
- blit_info->dst.box.x, blit_info->dst.box.y, dst_z,
- blit_info->dst.level, dst_face,
- blit_info->src.box.width, blit_info->src.box.height,
- blit_info->src.box.depth);
+ blit.src.resource,
+ blit.src.box.x, blit.src.box.y, src_z,
+ blit.src.level, src_face,
+ blit.dst.resource,
+ blit.dst.box.x, blit.dst.box.y, dst_z,
+ blit.dst.level, dst_face,
+ blit.src.box.width, blit.src.box.height,
+ blit.src.box.depth);
return;
}
if (util_can_blit_via_copy_region(blit_info, TRUE) ||
util_can_blit_via_copy_region(blit_info, FALSE)) {
- util_resource_copy_region(pipe, blit_info->dst.resource,
-blit_info->dst.level,
-blit_info->dst.box.x, blit_info->dst.box.y,
-blit_info->dst.box.z, blit_info->src.resource,
-blit_info->src.level, &blit_info->src.box);
+ util_resource_copy_region(pipe, blit.dst.resource,
+blit.dst.level,
+blit.dst.box.x, blit.dst.box.y,
+blit.dst.box.z, blit.src.resource,
+blit.src.level, &blit.src.box);
return; /* done */
}
- if ((blit_info->mask & PIPE_MASK_S) ||
+ if ((blit.mask & PIPE_MASK_S) ||
!util_blitter_is_blit_supported(svga->blitter, blit_info)) {
debug_printf("svga: blit unsupported %s -> %s\n",
- util_format_short_name(blit_info->src.resource->format),
- util_format_short_name(blit_info->dst.resource->format));
+ util_format_short_name(blit.src.resource->format),
+ util_format_short_name(blit.dst.resource->format));
return;
}
@@ -347,7 +348,7 @@ svga_blit(struct pipe_context *pipe,
Mesa (master): svga: add comment about unsupported blend modes
Module: Mesa
Branch: master
Commit: 93779b87a1b69ed1f49cd18c08edd2d6ecb9196f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=93779b87a1b69ed1f49cd18c08edd2d6ecb9196f
Author: Brian Paul
Date: Fri Aug 19 09:36:02 2016 -0600
svga: add comment about unsupported blend modes
---
src/gallium/drivers/svga/svga_pipe_blend.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/svga/svga_pipe_blend.c
b/src/gallium/drivers/svga/svga_pipe_blend.c
index a9f1c4f..408e175 100644
--- a/src/gallium/drivers/svga/svga_pipe_blend.c
+++ b/src/gallium/drivers/svga/svga_pipe_blend.c
@@ -37,6 +37,9 @@
static inline unsigned
svga_translate_blend_factor(const struct svga_context *svga, unsigned factor)
{
+ /* Note: there is no SVGA3D_BLENDOP_[INV]BLENDFACTORALPHA so
+* we can't translate PIPE_BLENDFACTOR_[INV_]CONST_ALPHA properly.
+*/
switch (factor) {
case PIPE_BLENDFACTOR_ZERO:return SVGA3D_BLENDOP_ZERO;
case PIPE_BLENDFACTOR_SRC_ALPHA: return SVGA3D_BLENDOP_SRCALPHA;
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Mesa (master): svga: add new function svga_clear_texture()
Module: Mesa
Branch: master
Commit: 52d88b67be1dad07e1c5f4a6e1c5c13c70f0c937
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=52d88b67be1dad07e1c5f4a6e1c5c13c70f0c937
Author: Neha Bhende
Date: Thu Aug 11 16:37:24 2016 -0700
svga: add new function svga_clear_texture()
To clear texture this function can be used. This is part of
ARB_clear_texture extension. Basically this extension allows you to
clear texture with given color values.
Reviewed-by: Brian Paul
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_pipe_clear.c | 188 +
1 file changed, 188 insertions(+)
diff --git a/src/gallium/drivers/svga/svga_pipe_clear.c
b/src/gallium/drivers/svga/svga_pipe_clear.c
index 1eb3757..abf110c 100644
--- a/src/gallium/drivers/svga/svga_pipe_clear.c
+++ b/src/gallium/drivers/svga/svga_pipe_clear.c
@@ -28,6 +28,7 @@
#include "pipe/p_defines.h"
#include "util/u_pack_color.h"
+#include "util/u_surface.h"
#include "svga_context.h"
#include "svga_state.h"
@@ -264,3 +265,190 @@ svga_clear(struct pipe_context *pipe, unsigned buffers,
assert (ret == PIPE_OK);
}
+
+
+static void
+svga_clear_texture(struct pipe_context *pipe,
+ struct pipe_resource *res,
+ unsigned level,
+ const struct pipe_box *box,
+ const void *data)
+{
+ struct svga_context *svga = svga_context(pipe);
+ struct svga_surface *svga_surface_dst;
+ enum pipe_error ret;
+ struct pipe_surface tmpl;
+ struct pipe_surface *surface;
+
+ memset(&tmpl, 0, sizeof(tmpl));
+ tmpl.format = res->format;
+ tmpl.u.tex.first_layer = box->z;
+ tmpl.u.tex.last_layer = box->z + box->depth - 1;
+ tmpl.u.tex.level = level;
+
+ surface = pipe->create_surface(pipe, res, &tmpl);
+ if (surface == NULL) {
+ debug_printf("failed to create surface\n");
+ return;
+ }
+ svga_surface_dst = svga_surface(surface);
+
+ union pipe_color_union color;
+ const struct util_format_description *desc =
+ util_format_description(surface->format);
+
+ if (util_format_is_depth_or_stencil(surface->format)) {
+ float depth;
+ uint8_t stencil;
+ unsigned clear_flags = 0;
+
+ /* If data is NULL, then set depthValue and stencilValue to zeros */
+ if (data == NULL) {
+ depth = 0.0;
+ stencil = 0;
+ }
+ else {
+ desc->unpack_z_float(&depth, 0, data, 0, 1, 1);
+ desc->unpack_s_8uint(&stencil, 0, data, 0, 1, 1);
+ }
+
+ if (util_format_has_depth(desc)) {
+ clear_flags |= PIPE_CLEAR_DEPTH;
+ }
+ if (util_format_has_stencil(desc)) {
+ clear_flags |= PIPE_CLEAR_STENCIL;
+ }
+
+ /* Setup depth stencil view */
+ struct pipe_surface *dsv =
+ svga_validate_surface_view(svga, svga_surface_dst);
+
+ if (!dsv)
+ return;
+
+ if (box->x == 0 && box->y == 0 && box->width == surface->width &&
+ box->height == surface->height) {
+ /* clearing whole surface, use direct VGPU10 command */
+
+
+ ret = SVGA3D_vgpu10_ClearDepthStencilView(svga->swc, dsv,
+ clear_flags,
+ stencil, depth);
+ if (ret != PIPE_OK) {
+/* flush and try again */
+svga_context_flush(svga, NULL);
+ret = SVGA3D_vgpu10_ClearDepthStencilView(svga->swc, dsv,
+ clear_flags,
+ stencil, depth);
+assert(ret == PIPE_OK);
+ }
+ }
+ else {
+ /* To clear subtexture use software fallback */
+
+ util_blitter_save_framebuffer(svga->blitter,
+ &svga->curr.framebuffer);
+ begin_blit(svga);
+ util_blitter_clear_depth_stencil(svga->blitter,
+ dsv, clear_flags,
+ depth,stencil,
+ box->x, box->y,
+ box->width, box->height);
+ }
+ }
+ else {
+ /* non depth-stencil formats */
+
+ if (data == NULL) {
+ /* If data is NULL, the texture image is filled with zeros */
+ color.f[0] = color.f[1] = color.f[2] = color.f[3] = 0;
+ }
+ else {
+ if (util_format_is_pure_sint(surface->format)) {
+/* signed integer */
+desc->unpack_rgba_sint(color.i, 0, data, 0, 1, 1);
+ }
+ else if (util_format_is_pure_uint(surface->format)) {
+/* unsigned integer */
+desc->unpack_rgba_uint(color.ui, 0, data, 0, 1, 1);
+ }
+ else {
+/* floating point */
+desc->unpack_rgba_float(color.f, 0, data, 0, 1, 1);
+ }
+ }
+
+ /* Setup render target view */
+ struct pipe_surface *rtv =
Mesa (master): svga: add a cleanup function to clean up sampler state
Module: Mesa
Branch: master
Commit: 5313b294e68f6b03e6b26930c68fbb30ae16e7c4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5313b294e68f6b03e6b26930c68fbb30ae16e7c4
Author: Charmaine Lee
Date: Wed Aug 17 14:53:38 2016 -0700
svga: add a cleanup function to clean up sampler state
This patch adds a cleanup function to clean up sampler state at
context destruction time.
Reviewed-by: Brian Paul
---
src/gallium/drivers/svga/svga_context.c | 12 +---
src/gallium/drivers/svga/svga_context.h | 1 +
src/gallium/drivers/svga/svga_pipe_sampler.c | 20
3 files changed, 22 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_context.c
b/src/gallium/drivers/svga/svga_context.c
index 7ac90f7..475b2b5 100644
--- a/src/gallium/drivers/svga/svga_context.c
+++ b/src/gallium/drivers/svga/svga_context.c
@@ -66,16 +66,6 @@ static void svga_destroy( struct pipe_context *pipe )
}
}
- /* free polygon stipple state */
- if (svga->polygon_stipple.sampler) {
- pipe->delete_sampler_state(pipe, svga->polygon_stipple.sampler);
- }
- if (svga->polygon_stipple.sampler_view) {
- pipe->sampler_view_destroy(pipe,
- &svga->polygon_stipple.sampler_view->base);
- }
- pipe_resource_reference(&svga->polygon_stipple.texture, NULL);
-
/* free HW constant buffers */
for (shader = 0; shader < ARRAY_SIZE(svga->state.hw_draw.constbuf);
shader++) {
pipe_resource_reference(&svga->state.hw_draw.constbuf[shader], NULL);
@@ -91,9 +81,9 @@ static void svga_destroy( struct pipe_context *pipe )
util_blitter_destroy(svga->blitter);
+ svga_cleanup_sampler_state(svga);
svga_cleanup_framebuffer( svga );
svga_cleanup_tss_binding( svga );
-
svga_cleanup_vertex_state(svga);
svga_destroy_swtnl( svga );
diff --git a/src/gallium/drivers/svga/svga_context.h
b/src/gallium/drivers/svga/svga_context.h
index 8ed612d..a5ec78c 100644
--- a/src/gallium/drivers/svga/svga_context.h
+++ b/src/gallium/drivers/svga/svga_context.h
@@ -639,6 +639,7 @@ void svga_init_stream_output_functions( struct svga_context
*svga );
void svga_init_clear_functions( struct svga_context *svga );
void svga_cleanup_vertex_state( struct svga_context *svga );
+void svga_cleanup_sampler_state( struct svga_context *svga );
void svga_cleanup_tss_binding( struct svga_context *svga );
void svga_cleanup_framebuffer( struct svga_context *svga );
diff --git a/src/gallium/drivers/svga/svga_pipe_sampler.c
b/src/gallium/drivers/svga/svga_pipe_sampler.c
index 326519c..ae19b7e 100644
--- a/src/gallium/drivers/svga/svga_pipe_sampler.c
+++ b/src/gallium/drivers/svga/svga_pipe_sampler.c
@@ -538,6 +538,26 @@ done:
SVGA_STATS_TIME_POP(svga_sws(svga));
}
+/**
+ * Clean up sampler, sampler view state at context destruction time
+ */
+void
+svga_cleanup_sampler_state(struct svga_context *svga)
+{
+ if (!svga_have_vgpu10(svga))
+ return;
+
+ /* free polygon stipple state */
+ if (svga->polygon_stipple.sampler) {
+ svga->pipe.delete_sampler_state(&svga->pipe,
svga->polygon_stipple.sampler);
+ }
+
+ if (svga->polygon_stipple.sampler_view) {
+ svga->pipe.sampler_view_destroy(&svga->pipe,
+
&svga->polygon_stipple.sampler_view->base);
+ }
+ pipe_resource_reference(&svga->polygon_stipple.texture, NULL);
+}
void
svga_init_sampler_functions( struct svga_context *svga )
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Mesa (master): svga: add svga_init_clear_functions()
Module: Mesa
Branch: master
Commit: 40557ae07c34bedba083ad142601c4cf8691a5a3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=40557ae07c34bedba083ad142601c4cf8691a5a3
Author: Neha Bhende
Date: Thu Aug 11 16:43:03 2016 -0700
svga: add svga_init_clear_functions()
define svga_init_clear_functions()
and svga_clear_texture as svga->pipe.clear_texture. This is part of
ARB_clear_texture extension
Reviewed-by: Brian Paul
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_context.c| 1 +
src/gallium/drivers/svga/svga_context.h| 1 +
src/gallium/drivers/svga/svga_pipe_clear.c | 4
3 files changed, 6 insertions(+)
diff --git a/src/gallium/drivers/svga/svga_context.c
b/src/gallium/drivers/svga/svga_context.c
index cbc312e..04acc00 100644
--- a/src/gallium/drivers/svga/svga_context.c
+++ b/src/gallium/drivers/svga/svga_context.c
@@ -164,6 +164,7 @@ struct pipe_context *svga_context_create(struct pipe_screen
*screen,
svga_init_query_functions(svga);
svga_init_surface_functions(svga);
svga_init_stream_output_functions(svga);
+ svga_init_clear_functions(svga);
/* init misc state */
svga->curr.sample_mask = ~0;
diff --git a/src/gallium/drivers/svga/svga_context.h
b/src/gallium/drivers/svga/svga_context.h
index 4316c44..300c741 100644
--- a/src/gallium/drivers/svga/svga_context.h
+++ b/src/gallium/drivers/svga/svga_context.h
@@ -645,6 +645,7 @@ void svga_init_draw_functions( struct svga_context *svga );
void svga_init_query_functions( struct svga_context *svga );
void svga_init_surface_functions(struct svga_context *svga);
void svga_init_stream_output_functions( struct svga_context *svga );
+void svga_init_clear_functions( struct svga_context *svga );
void svga_cleanup_vertex_state( struct svga_context *svga );
void svga_cleanup_tss_binding( struct svga_context *svga );
diff --git a/src/gallium/drivers/svga/svga_pipe_clear.c
b/src/gallium/drivers/svga/svga_pipe_clear.c
index abf110c..174d02c 100644
--- a/src/gallium/drivers/svga/svga_pipe_clear.c
+++ b/src/gallium/drivers/svga/svga_pipe_clear.c
@@ -452,3 +452,7 @@ svga_clear_texture(struct pipe_context *pipe,
}
+void svga_init_clear_functions(struct svga_context *svga)
+{
+ svga->pipe.clear_texture = svga_clear_texture;
+}
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Mesa (master): vbo: set draw_id
Module: Mesa Branch: master Commit: b9ac72b5116d25529fc19bd849e85d5d91413f66 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9ac72b5116d25529fc19bd849e85d5d91413f66 Author: Miklós Máté Date: Fri Aug 26 06:48:00 2016 -0600 vbo: set draw_id Fixes conditional jump depending on uninitialized value in si_state_draw.c:593 Cc: Signed-off-by: Miklós Máté Reviewed-by: Brian Paul --- src/mesa/vbo/vbo_exec_array.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c index 1997039..46543f8 100644 --- a/src/mesa/vbo/vbo_exec_array.c +++ b/src/mesa/vbo/vbo_exec_array.c @@ -778,6 +778,7 @@ vbo_validated_drawrangeelements(struct gl_context *ctx, GLenum mode, prim[0].basevertex = basevertex; prim[0].num_instances = numInstances; prim[0].base_instance = baseInstance; + prim[0].draw_id = 0; /* Need to give special consideration to rendering a range of * indices starting somewhere above zero. Typically the ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): gallium/hud: move signo declaration inside PIPE_OS_UNIX block
Module: Mesa
Branch: master
Commit: d221a6545cc0778716f1abf45fd096d6cd5a1b8e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d221a6545cc0778716f1abf45fd096d6cd5a1b8e
Author: Brian Paul
Date: Wed Aug 17 08:29:55 2016 -0600
gallium/hud: move signo declaration inside PIPE_OS_UNIX block
To silence unused var warning with MSVC, MinGW.
Reviewed-by: Marek Olšák
---
src/gallium/auxiliary/hud/hud_context.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/hud/hud_context.c
b/src/gallium/auxiliary/hud/hud_context.c
index 3453bda..f1a1cee 100644
--- a/src/gallium/auxiliary/hud/hud_context.c
+++ b/src/gallium/auxiliary/hud/hud_context.c
@@ -1242,8 +1242,8 @@ hud_create(struct pipe_context *pipe, struct cso_context
*cso)
struct pipe_sampler_view view_templ;
unsigned i;
const char *env = debug_get_option("GALLIUM_HUD", NULL);
- unsigned signo = debug_get_num_option("GALLIUM_HUD_TOGGLE_SIGNAL", 0);
#ifdef PIPE_OS_UNIX
+ unsigned signo = debug_get_num_option("GALLIUM_HUD_TOGGLE_SIGNAL", 0);
static boolean sig_handled = FALSE;
struct sigaction action = {};
#endif
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Mesa (master): svga: s/INDEX_0D/INDEX_IMMEDIATE32/
Module: Mesa
Branch: master
Commit: b09e4ab13cdde9b0d465c214e6e30452c690eeb1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b09e4ab13cdde9b0d465c214e6e30452c690eeb1
Author: Brian Paul
Date: Fri Aug 19 09:37:11 2016 -0600
svga: s/INDEX_0D/INDEX_IMMEDIATE32/
Both are zero, but the later is the right token.
---
src/gallium/drivers/svga/svga_tgsi_vgpu10.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
index ef5d78e..981251a 100644
--- a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
+++ b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
@@ -745,7 +745,7 @@ setup_operand0_indexing(struct svga_shader_emitter_v10
*emit,
boolean indirect, boolean index2D,
unsigned tempArrayID)
{
- unsigned indexDim, index0Rep, index1Rep = VGPU10_OPERAND_INDEX_0D;
+ unsigned indexDim, index0Rep, index1Rep = VGPU10_OPERAND_INDEX_IMMEDIATE32;
/*
* Compute index dimensions
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Mesa (master): svga: fix vgpu10 query fencing
Module: Mesa
Branch: master
Commit: 99d8fe20abe1fe55ea357bfc6f8d9a7af946cfc5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=99d8fe20abe1fe55ea357bfc6f8d9a7af946cfc5
Author: Brian Paul
Date: Thu Aug 18 10:15:46 2016 -0600
svga: fix vgpu10 query fencing
We don't want to flush the command buffer or sync on the fence when ending
a query (that kind of defeats the whole purpose of async queries). Do that
instead in get_query_result().
Tested with Piglit, arbocclude, Sauerbraten game, Nobel Clinician Viewer,
ETQW.
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_pipe_query.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_pipe_query.c
b/src/gallium/drivers/svga/svga_pipe_query.c
index 33822e6..f09590a 100644
--- a/src/gallium/drivers/svga/svga_pipe_query.c
+++ b/src/gallium/drivers/svga/svga_pipe_query.c
@@ -610,7 +610,6 @@ begin_query_vgpu10(struct svga_context *svga, struct
svga_query *sq)
static enum pipe_error
end_query_vgpu10(struct svga_context *svga, struct svga_query *sq)
{
- struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
enum pipe_error ret = PIPE_OK;
if (svga->rebind.flags.query) {
@@ -623,15 +622,6 @@ end_query_vgpu10(struct svga_context *svga, struct
svga_query *sq)
ret = SVGA3D_vgpu10_EndQuery(svga->swc, sq->id);
}
- /* Finish fence is copied here from get_query_result_vgpu10. This helps
-* with cases where svga_begin_query might be called again before
-* svga_get_query_result, such as GL_TIME_ELAPSED.
-*/
- if (!sq->fence) {
- svga_context_flush(svga, &sq->fence);
- }
- sws->fence_finish(sws, sq->fence, SVGA_FENCE_FLAG_QUERY);
-
return ret;
}
@@ -648,7 +638,17 @@ get_query_result_vgpu10(struct svga_context *svga, struct
svga_query *sq,
sws->query_get_result(sws, sq->gb_query, sq->offset, &queryState, result,
resultLen);
- if (queryState == SVGA3D_QUERYSTATE_PENDING) {
+ if (queryState == SVGA3D_QUERYSTATE_NEW && !sq->fence) {
+ /* The query hasn't been submitted yet. We need to submit it now
+ * since the GL spec says "Querying the state for a given occlusion
+ * query forces that occlusion query to complete within a finite amount
+ * of time."
+ */
+ svga_context_flush(svga, &sq->fence);
+ }
+
+ if (queryState == SVGA3D_QUERYSTATE_PENDING ||
+ queryState == SVGA3D_QUERYSTATE_NEW) {
if (!wait)
return FALSE;
sws->fence_finish(sws, sq->fence, SVGA_FENCE_FLAG_QUERY);
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Mesa (master): svga: fix regression related to srgb
Module: Mesa
Branch: master
Commit: 10f6e08549660ee66395fc075cea9c7d0bba4e04
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=10f6e08549660ee66395fc075cea9c7d0bba4e04
Author: Neha Bhende
Date: Thu Aug 18 15:27:45 2016 -0700
svga: fix regression related to srgb
This regression is caused because of commit
3190c7ee9727161d627f107c2e7f8ec3a11941c1
Regression caused by following OpenGL 4.4 spec rules relates to
GL_FRAMEBUFFER_SRGB in Mesa.
Reviewed-by: Brian Paul
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_pipe_blit.c | 12
1 file changed, 12 insertions(+)
diff --git a/src/gallium/drivers/svga/svga_pipe_blit.c
b/src/gallium/drivers/svga/svga_pipe_blit.c
index ea0b396..e1a4c06 100644
--- a/src/gallium/drivers/svga/svga_pipe_blit.c
+++ b/src/gallium/drivers/svga/svga_pipe_blit.c
@@ -322,6 +322,18 @@ svga_blit(struct pipe_context *pipe,
return;
}
+ /**
+* When there is blit from srgb to linear format or vice versa, we change
+* src.format to srgb or linear, respectively
+*/
+
+ if (util_format_is_srgb(blit.dst.format)) {
+ blit.src.format = util_format_srgb(blit.src.format);
+ }
+ else {
+ blit.src.format = util_format_linear(blit.src.format);
+ }
+
/* XXX turn off occlusion and streamout queries */
util_blitter_save_vertex_buffer_slot(svga->blitter, svga->curr.vb);
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Mesa (master): svga: fix ordering of mksstats counter strings
Module: Mesa
Branch: master
Commit: b1772651b728fd231b0c5885415b35f43a307c7f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b1772651b728fd231b0c5885415b35f43a307c7f
Author: Charmaine Lee
Date: Thu Aug 18 18:02:17 2016 -0700
svga: fix ordering of mksstats counter strings
String for SVGA_STATS_COUNT_TEXREADBACK was swapped
with the string for SVGA_STATS_COUNT_SURFACEWRITEFLUSH.
Trivial fix.
---
src/gallium/drivers/svga/svga_winsys.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/svga/svga_winsys.h
b/src/gallium/drivers/svga/svga_winsys.h
index 5eb7308..a7b25ab 100644
--- a/src/gallium/drivers/svga/svga_winsys.h
+++ b/src/gallium/drivers/svga/svga_winsys.h
@@ -169,8 +169,8 @@ enum svga_stats_time {
SVGA_STATS_PREFIX "RasterizerState", \
SVGA_STATS_PREFIX "Sampler", \
SVGA_STATS_PREFIX "SamplerView", \
- SVGA_STATS_PREFIX "TextureReadback", \
SVGA_STATS_PREFIX "SurfaceWriteFlush", \
+ SVGA_STATS_PREFIX "TextureReadback", \
SVGA_STATS_PREFIX "VertexElement" \
#define SVGA_STATS_TIME_NAMES \
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Mesa (master): svga: define svga_clear() in svga_init_clear_functions()
Module: Mesa
Branch: master
Commit: 2111795d51aa63c46019327d222efb66ded9348e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2111795d51aa63c46019327d222efb66ded9348e
Author: Neha Bhende
Date: Thu Aug 11 16:53:04 2016 -0700
svga: define svga_clear() in svga_init_clear_functions()
Put all the clearing related functions in svga_init_clear_functions()
Reviewed-by: Brian Paul
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_context.c| 1 -
src/gallium/drivers/svga/svga_context.h| 9 -
src/gallium/drivers/svga/svga_pipe_clear.c | 3 ++-
3 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_context.c
b/src/gallium/drivers/svga/svga_context.c
index 04acc00..d422aec 100644
--- a/src/gallium/drivers/svga/svga_context.c
+++ b/src/gallium/drivers/svga/svga_context.c
@@ -141,7 +141,6 @@ struct pipe_context *svga_context_create(struct pipe_screen
*screen,
svga->pipe.screen = screen;
svga->pipe.priv = priv;
svga->pipe.destroy = svga_destroy;
- svga->pipe.clear = svga_clear;
svga->swc = svgascreen->sws->context_create(svgascreen->sws);
if (!svga->swc)
diff --git a/src/gallium/drivers/svga/svga_context.h
b/src/gallium/drivers/svga/svga_context.h
index 300c741..8ed612d 100644
--- a/src/gallium/drivers/svga/svga_context.h
+++ b/src/gallium/drivers/svga/svga_context.h
@@ -608,15 +608,6 @@ struct svga_context
-/***
- * svga_clear.c:
- */
-void svga_clear(struct pipe_context *pipe,
-unsigned buffers,
-const union pipe_color_union *color,
-double depth,
-unsigned stencil);
-
/***
* svga_screen_texture.c:
diff --git a/src/gallium/drivers/svga/svga_pipe_clear.c
b/src/gallium/drivers/svga/svga_pipe_clear.c
index 174d02c..12f3050 100644
--- a/src/gallium/drivers/svga/svga_pipe_clear.c
+++ b/src/gallium/drivers/svga/svga_pipe_clear.c
@@ -228,7 +228,7 @@ try_clear(struct svga_context *svga,
* Clear the given surface to the specified value.
* No masking, no scissor (clear entire buffer).
*/
-void
+static void
svga_clear(struct pipe_context *pipe, unsigned buffers,
const union pipe_color_union *color,
double depth, unsigned stencil)
@@ -455,4 +455,5 @@ svga_clear_texture(struct pipe_context *pipe,
void svga_init_clear_functions(struct svga_context *svga)
{
svga->pipe.clear_texture = svga_clear_texture;
+ svga->pipe.clear = svga_clear;
}
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Mesa (master): svga: add new begin_blit()
Module: Mesa
Branch: master
Commit: 1da538f85bc327f4ae5e1a5b90c15b99f8cf48df
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1da538f85bc327f4ae5e1a5b90c15b99f8cf48df
Author: Neha Bhende
Date: Thu Aug 11 16:30:14 2016 -0700
svga: add new begin_blit()
Saving all blitter states will be done in begin_blit() so that
begin_blit() can be used before performing any blit operation.
Reviewed-by: Brian Paul
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_pipe_clear.c | 27 ++-
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_pipe_clear.c
b/src/gallium/drivers/svga/svga_pipe_clear.c
index c874726..1eb3757 100644
--- a/src/gallium/drivers/svga/svga_pipe_clear.c
+++ b/src/gallium/drivers/svga/svga_pipe_clear.c
@@ -35,18 +35,11 @@
/**
- * Clear the whole color buffer(s) by drawing a quad. For VGPU10 we use
- * this when clearing integer render targets. We'll also clear the
- * depth and/or stencil buffers if the clear_buffers mask specifies them.
+ * Saving blitter states before doing any blitter operation
*/
static void
-clear_buffers_with_quad(struct svga_context *svga,
-unsigned clear_buffers,
-const union pipe_color_union *color,
-double depth, unsigned stencil)
+begin_blit(struct svga_context *svga)
{
- const struct pipe_framebuffer_state *fb = &svga->curr.framebuffer;
-
util_blitter_save_vertex_buffer_slot(svga->blitter, svga->curr.vb);
util_blitter_save_vertex_elements(svga->blitter, (void*)svga->curr.velems);
util_blitter_save_vertex_shader(svga->blitter, svga->curr.vs);
@@ -62,7 +55,23 @@ clear_buffers_with_quad(struct svga_context *svga,
(void*)svga->curr.depth);
util_blitter_save_stencil_ref(svga->blitter, &svga->curr.stencil_ref);
util_blitter_save_sample_mask(svga->blitter, svga->curr.sample_mask);
+}
+
+
+/**
+ * Clear the whole color buffer(s) by drawing a quad. For VGPU10 we use
+ * this when clearing integer render targets. We'll also clear the
+ * depth and/or stencil buffers if the clear_buffers mask specifies them.
+ */
+static void
+clear_buffers_with_quad(struct svga_context *svga,
+unsigned clear_buffers,
+const union pipe_color_union *color,
+double depth, unsigned stencil)
+{
+ const struct pipe_framebuffer_state *fb = &svga->curr.framebuffer;
+ begin_blit(svga);
util_blitter_clear(svga->blitter,
fb->width, fb->height,
1, /* num_layers */
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Mesa (master): svga: enable ARB_clear_texture extension in the driver.
Module: Mesa Branch: master Commit: 6a43148e202806b210c6aaf5c65b92916bc01581 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6a43148e202806b210c6aaf5c65b92916bc01581 Author: Neha Bhende Date: Thu Aug 11 16:56:01 2016 -0700 svga: enable ARB_clear_texture extension in the driver. Reviewed-by: Brian Paul Reviewed-by: Charmaine Lee --- src/gallium/drivers/svga/svga_screen.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c index 80d25cf..ec29ae9 100644 --- a/src/gallium/drivers/svga/svga_screen.c +++ b/src/gallium/drivers/svga/svga_screen.c @@ -393,6 +393,8 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param) return 1; case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: return sws->have_vgpu10; + case PIPE_CAP_CLEAR_TEXTURE: + return sws->have_vgpu10; case PIPE_CAP_UMA: case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: @@ -403,7 +405,6 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: - case PIPE_CAP_CLEAR_TEXTURE: case PIPE_CAP_DRAW_PARAMETERS: case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL: ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): svga: avoid emitting redundant SetShaderResource command
Module: Mesa
Branch: master
Commit: 2781d603753148771c1a706150b7a9a54592befe
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2781d603753148771c1a706150b7a9a54592befe
Author: Charmaine Lee
Date: Wed Aug 17 16:50:23 2016 -0700
svga: avoid emitting redundant SetShaderResource command
Tested with Lightsmark2008, Heaven, MTT piglit, glretrace, viewperf, conform.
Reviewed-by: Brian Paul
---
src/gallium/drivers/svga/svga_context.c | 2 +
src/gallium/drivers/svga/svga_context.h | 5 +-
src/gallium/drivers/svga/svga_pipe_sampler.c | 11
src/gallium/drivers/svga/svga_state_sampler.c | 79 ---
4 files changed, 63 insertions(+), 34 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_context.c
b/src/gallium/drivers/svga/svga_context.c
index 475b2b5..ffecef5 100644
--- a/src/gallium/drivers/svga/svga_context.c
+++ b/src/gallium/drivers/svga/svga_context.c
@@ -226,6 +226,8 @@ struct pipe_context *svga_context_create(struct pipe_screen
*screen,
sizeof(svga->state.hw_draw.num_samplers));
memset(&svga->state.hw_draw.num_sampler_views, 0,
sizeof(svga->state.hw_draw.num_sampler_views));
+ memset(svga->state.hw_draw.sampler_views, 0,
+ sizeof(svga->state.hw_draw.sampler_views));
svga->state.hw_draw.num_views = 0;
/* Initialize the shader pointers */
diff --git a/src/gallium/drivers/svga/svga_context.h
b/src/gallium/drivers/svga/svga_context.h
index a5ec78c..a635ef1 100644
--- a/src/gallium/drivers/svga/svga_context.h
+++ b/src/gallium/drivers/svga/svga_context.h
@@ -377,12 +377,15 @@ struct svga_hw_draw_state
unsigned num_samplers[PIPE_SHADER_TYPES];
SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
+ unsigned num_sampler_views[PIPE_SHADER_TYPES];
+ struct pipe_sampler_view
+ *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
+
unsigned num_rendertargets;
struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS];
struct pipe_surface *dsv;
/* used for rebinding */
- unsigned num_sampler_views[PIPE_SHADER_TYPES];
unsigned default_constbuf_size[PIPE_SHADER_TYPES];
};
diff --git a/src/gallium/drivers/svga/svga_pipe_sampler.c
b/src/gallium/drivers/svga/svga_pipe_sampler.c
index ae19b7e..59609b8 100644
--- a/src/gallium/drivers/svga/svga_pipe_sampler.c
+++ b/src/gallium/drivers/svga/svga_pipe_sampler.c
@@ -544,9 +544,20 @@ done:
void
svga_cleanup_sampler_state(struct svga_context *svga)
{
+ unsigned shader;
+
if (!svga_have_vgpu10(svga))
return;
+ for (shader = 0; shader <= PIPE_SHADER_GEOMETRY; shader++) {
+ unsigned i;
+
+ for (i = 0; i < svga->state.hw_draw.num_sampler_views[shader]; i++) {
+ pipe_sampler_view_release(&svga->pipe,
+
&svga->state.hw_draw.sampler_views[shader][i]);
+ }
+ }
+
/* free polygon stipple state */
if (svga->polygon_stipple.sampler) {
svga->pipe.delete_sampler_state(&svga->pipe,
svga->polygon_stipple.sampler);
diff --git a/src/gallium/drivers/svga/svga_state_sampler.c
b/src/gallium/drivers/svga/svga_state_sampler.c
index 216ab81..420a566 100644
--- a/src/gallium/drivers/svga/svga_state_sampler.c
+++ b/src/gallium/drivers/svga/svga_state_sampler.c
@@ -205,6 +205,7 @@ update_sampler_resources(struct svga_context *svga,
unsigned dirty)
for (shader = PIPE_SHADER_VERTEX; shader <= PIPE_SHADER_GEOMETRY; shader++)
{
SVGA3dShaderResourceViewId ids[PIPE_MAX_SAMPLERS];
struct svga_winsys_surface *surfaces[PIPE_MAX_SAMPLERS];
+ struct pipe_sampler_view *sampler_views[PIPE_MAX_SAMPLERS];
unsigned count;
unsigned nviews;
unsigned i;
@@ -213,10 +214,9 @@ update_sampler_resources(struct svga_context *svga,
unsigned dirty)
for (i = 0; i < count; i++) {
struct svga_pipe_sampler_view *sv =
svga_pipe_sampler_view(svga->curr.sampler_views[shader][i]);
- struct svga_winsys_surface *surface;
if (sv) {
-surface = svga_resource_handle(sv->base.texture);
+surfaces[i] = svga_resource_handle(sv->base.texture);
ret = svga_validate_pipe_sampler_view(svga, sv);
if (ret != PIPE_OK)
@@ -224,39 +224,19 @@ update_sampler_resources(struct svga_context *svga,
unsigned dirty)
assert(sv->id != SVGA3D_INVALID_ID);
ids[i] = sv->id;
+sampler_views[i] = &sv->base;
}
else {
-surface = NULL;
+surfaces[i] = NULL;
ids[i] = SVGA3D_INVALID_ID;
+sampler_views[i] = NULL;
}
- surfaces[i] = surface;
}
- for (; i < ARRAY_SIZE(ids); i++) {
+ for (; i < svga->state.hw_draw.num_sampler_views[shader]; i++) {
ids[i] = SVGA3D_INVALID_ID;
surfaces[i] = NULL;
- }
-
- if (shader == PIPE_SHADER_FRAGMENT) {
- /* Handle polygon stipple sampler view */
- if (svga->curr.r
Mesa (master): svga: add guest statistic gathering interface
Module: Mesa Branch: master Commit: 2e1cfcc431471c68ba79c9323716bed7da79c909 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e1cfcc431471c68ba79c9323716bed7da79c909 Author: Charmaine Lee Date: Fri Aug 19 08:49:17 2016 -0600 svga: add guest statistic gathering interface With this patch, guest statistic gathering interface is added to svga winsys interface that can be used to gather svga driver statistic. The winsys module can then share the statistic info with the VMX host via the mksstats interface. The statistic enums used in the svga driver are defined in svga_stats_count and svga_stats_time in svga_winsys.h Reviewed-by: Brian Paul --- src/gallium/drivers/svga/svga_context.c| 7 + src/gallium/drivers/svga/svga_context.h| 5 + src/gallium/drivers/svga/svga_draw.c | 16 ++- src/gallium/drivers/svga/svga_draw_arrays.c| 22 +-- src/gallium/drivers/svga/svga_draw_elements.c | 13 +- src/gallium/drivers/svga/svga_pipe_blend.c | 2 + src/gallium/drivers/svga/svga_pipe_depthstencil.c | 3 + src/gallium/drivers/svga/svga_pipe_draw.c | 42 -- src/gallium/drivers/svga/svga_pipe_fs.c| 3 + src/gallium/drivers/svga/svga_pipe_gs.c| 3 + src/gallium/drivers/svga/svga_pipe_rasterizer.c| 2 + src/gallium/drivers/svga/svga_pipe_sampler.c | 11 +- src/gallium/drivers/svga/svga_pipe_vertex.c| 2 + src/gallium/drivers/svga/svga_pipe_vs.c| 3 + src/gallium/drivers/svga/svga_resource_buffer.c| 19 ++- .../drivers/svga/svga_resource_buffer_upload.c | 4 + src/gallium/drivers/svga/svga_resource_texture.c | 37 +++-- src/gallium/drivers/svga/svga_screen.c | 19 ++- src/gallium/drivers/svga/svga_shader.c | 11 +- src/gallium/drivers/svga/svga_state.c | 8 +- src/gallium/drivers/svga/svga_state_fs.c | 12 +- src/gallium/drivers/svga/svga_state_gs.c | 12 +- src/gallium/drivers/svga/svga_state_vs.c | 10 +- src/gallium/drivers/svga/svga_surface.c| 46 ++- src/gallium/drivers/svga/svga_swtnl_backend.c | 35 - src/gallium/drivers/svga/svga_swtnl_draw.c | 3 + src/gallium/drivers/svga/svga_swtnl_state.c| 13 +- src/gallium/drivers/svga/svga_tgsi.c | 12 +- src/gallium/drivers/svga/svga_tgsi_vgpu10.c| 5 +- src/gallium/drivers/svga/svga_winsys.h | 153 + src/gallium/winsys/svga/drm/vmw_screen_svga.c | 20 +++ 31 files changed, 468 insertions(+), 85 deletions(-) Diff: http://cgit.freedesktop.org/mesa/mesa/diff/?id=2e1cfcc431471c68ba79c9323716bed7da79c909 ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): svga: loosen the condition to flush in get_query_result_vgpu10()
Module: Mesa
Branch: master
Commit: e292f38c6c2aba28299b988ec4654b7c02d9adb8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e292f38c6c2aba28299b988ec4654b7c02d9adb8
Author: Brian Paul
Date: Fri Aug 19 10:15:14 2016 -0600
svga: loosen the condition to flush in get_query_result_vgpu10()
Fixes piglit spec/ext_transform_feedback/overflow-edge-cases segfaults
because the query's fence pointer was null.
Tested with Piglit, Sauerbraten, ETQW.
Reviewed-by: Charmaine Lee
---
src/gallium/drivers/svga/svga_pipe_query.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/svga/svga_pipe_query.c
b/src/gallium/drivers/svga/svga_pipe_query.c
index f09590a..dcb26eb 100644
--- a/src/gallium/drivers/svga/svga_pipe_query.c
+++ b/src/gallium/drivers/svga/svga_pipe_query.c
@@ -638,7 +638,7 @@ get_query_result_vgpu10(struct svga_context *svga, struct
svga_query *sq,
sws->query_get_result(sws, sq->gb_query, sq->offset, &queryState, result,
resultLen);
- if (queryState == SVGA3D_QUERYSTATE_NEW && !sq->fence) {
+ if (!sq->fence) {
/* The query hasn't been submitted yet. We need to submit it now
* since the GL spec says "Querying the state for a given occlusion
* query forces that occlusion query to complete within a finite amount
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Mesa (master): svga: add opt to the list of valid build types
Module: Mesa
Branch: master
Commit: a5fd54f8bf6713312fa5efd7ef5cd125557a0ffe
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5fd54f8bf6713312fa5efd7ef5cd125557a0ffe
Author: Charmaine Lee
Date: Thu Aug 11 18:41:52 2016 -0700
svga: add opt to the list of valid build types
For opt build, add VMX86_STATS to the list of cpp defines.
Reviewed-by: Brian Paul
---
common.py | 2 +-
scons/gallium.py | 8 +---
src/gallium/drivers/svga/svga_screen.c | 2 ++
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/common.py b/common.py
index 70e6708..fb0884e 100644
--- a/common.py
+++ b/common.py
@@ -86,7 +86,7 @@ def AddOptions(opts):
from SCons.Options.EnumOption import EnumOption
opts.Add(EnumOption('build', 'build type', 'debug',
allowed_values=('debug', 'checked', 'profile',
-'release')))
+'release', 'opt')))
opts.Add(BoolOption('verbose', 'verbose output', 'no'))
opts.Add(EnumOption('machine', 'use machine-specific assembly code',
default_machine,
diff --git a/scons/gallium.py b/scons/gallium.py
index 5fc082d..7260daa 100755
--- a/scons/gallium.py
+++ b/scons/gallium.py
@@ -256,7 +256,7 @@ def generate(env):
if env['build'] == 'profile':
env['debug'] = False
env['profile'] = True
-if env['build'] == 'release':
+if env['build'] in ('release', 'opt'):
env['debug'] = False
env['profile'] = False
@@ -301,6 +301,8 @@ def generate(env):
cppdefines += ['NDEBUG']
if env['build'] == 'profile':
cppdefines += ['PROFILE']
+if env['build'] in ('opt', 'profile'):
+cppdefines += ['VMX86_STATS']
if env['platform'] in ('posix', 'linux', 'freebsd', 'darwin'):
cppdefines += [
'_POSIX_SOURCE',
@@ -450,7 +452,7 @@ def generate(env):
ccflags += [
'/O2', # optimize for speed
]
-if env['build'] == 'release':
+if env['build'] in ('release', 'opt'):
if not env['clang']:
ccflags += [
'/GL', # enable whole program optimization
@@ -561,7 +563,7 @@ def generate(env):
shlinkflags += ['-Wl,--enable-stdcall-fixup']
#shlinkflags += ['-Wl,--kill-at']
if msvc:
-if env['build'] == 'release' and not env['clang']:
+if env['build'] in ('release', 'opt') and not env['clang']:
# enable Link-time Code Generation
linkflags += ['/LTCG']
env.Append(ARFLAGS = ['/LTCG'])
diff --git a/src/gallium/drivers/svga/svga_screen.c
b/src/gallium/drivers/svga/svga_screen.c
index 7567af7..80d25cf 100644
--- a/src/gallium/drivers/svga/svga_screen.c
+++ b/src/gallium/drivers/svga/svga_screen.c
@@ -86,6 +86,8 @@ svga_get_name( struct pipe_screen *pscreen )
*/
build = "build: DEBUG;";
mutex = "mutex: " PIPE_ATOMIC ";";
+#elif defined(VMX86_STATS)
+ build = "build: OPT;";
#else
build = "build: RELEASE;";
#endif
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Mesa (master): svga: fix indirect non-indexable temp access
Module: Mesa
Branch: master
Commit: 479199180871432030d3eebc2822bd7cb3dc6fd6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=479199180871432030d3eebc2822bd7cb3dc6fd6
Author: Charmaine Lee
Date: Tue Aug 25 14:53:51 2015 -0700
svga: fix indirect non-indexable temp access
If the shader has indirect access to non-indexable temporaries,
convert these non-indexable temporaries to indexable temporary array.
This works around a bug in the GLSL->TGSI translator.
Fixes glsl-1.20/execution/fs-const-array-of-struct-of-array.shader_test
on DX11Renderer.
Reviewed-by: Brian Paul
---
src/gallium/drivers/svga/svga_tgsi_vgpu10.c | 27 +--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
index dcd8f2c..3b44730 100644
--- a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
+++ b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
@@ -2631,6 +2631,28 @@ emit_temporaries_declaration(struct
svga_shader_emitter_v10 *emit)
total_temps = emit->num_shader_temps;
+ /* If there is indirect access to non-indexable temps in the shader,
+* convert those temps to indexable temps. This works around a bug
+* in the GLSL->TGSI translator exposed in piglit test
+* glsl-1.20/execution/fs-const-array-of-struct-of-array.shader_test.
+* Internal temps added by the driver remain as non-indexable temps.
+*/
+ if ((emit->info.indirect_files & (1 << TGSI_FILE_TEMPORARY)) &&
+ emit->num_temp_arrays == 0) {
+ unsigned arrayID;
+
+ arrayID = 1;
+ emit->num_temp_arrays = arrayID + 1;
+ emit->temp_arrays[arrayID].start = 0;
+ emit->temp_arrays[arrayID].size = total_temps;
+
+ /* Fill in the temp_map entries for this temp array */
+ for (i = 0; i < total_temps; i++) {
+ emit->temp_map[i].arrayId = arrayID;
+ emit->temp_map[i].index = i;
+ }
+ }
+
/* Allocate extra temps for specially-implemented instructions,
* such as LIT.
*/
@@ -2740,16 +2762,17 @@ emit_temporaries_declaration(struct
svga_shader_emitter_v10 *emit)
emit->temp_map[i].index = reg++;
}
}
- total_temps = reg;
if (0) {
debug_printf("total_temps %u\n", total_temps);
- for (i = 0; i < 30; i++) {
+ for (i = 0; i < total_temps; i++) {
debug_printf("temp %u -> array %u index %u\n",
i, emit->temp_map[i].arrayId, emit->temp_map[i].index);
}
}
+ total_temps = reg;
+
/* Emit declaration of ordinary temp registers */
if (total_temps > 0) {
VGPU10OpcodeToken0 opcode0;
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Mesa (master): i965: Embrace "unlimited" GTT mmap support
Module: Mesa
Branch: master
Commit: f92a87a14068dd17a32b41b1586421cef6eaa37f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f92a87a14068dd17a32b41b1586421cef6eaa37f
Author: Chris Wilson
Date: Wed Aug 24 20:35:46 2016 +0100
i965: Embrace "unlimited" GTT mmap support
From about kernel 4.9, GTT mmaps are virtually unlimited. A new
parameter, I915_PARAM_MMAP_GTT_VERSION, is added to advertise the
feature so query it and use it to avoid limiting tiled allocations to
only fit within the mappable aperture.
A couple of caveats:
- fence support is still limited by stride to 262144 and the stride
needs to be a multiple of tile_width (as before, and same limitation as
the current 3D pipeline in hardware)
- the max_gtt_map_object_size forcing untiled may be hiding a few bugs
in handling of large objects, though none were spotted in piglits.
See kernel commit 4cc6907501ed ("drm/i915: Add I915_PARAM_MMAP_GTT_VERSION
to advertise unlimited mmaps").
v2: Include some commentary on mmap virtual space vs CPU addressable
space.
Signed-off-by: Chris Wilson
Cc: Kenneth Graunke
Reviewed-by: Kenneth Graunke
Reviewed-by: Daniel Vetter
---
src/mesa/drivers/dri/i965/brw_context.c | 17 ++-
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/intel_screen.c | 48
src/mesa/drivers/dri/i965/intel_screen.h | 2 ++
4 files changed, 53 insertions(+), 16 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index d6f0d7b..1364393 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1044,21 +1044,6 @@ brwCreateContext(gl_api api,
brw->urb.max_ds_entries = devinfo->urb.max_ds_entries;
brw->urb.max_gs_entries = devinfo->urb.max_gs_entries;
- /* Estimate the size of the mappable aperture into the GTT. There's an
-* ioctl to get the whole GTT size, but not one to get the mappable subset.
-* It turns out it's basically always 256MB, though some ancient hardware
-* was smaller.
-*/
- uint32_t gtt_size = 256 * 1024 * 1024;
-
- /* We don't want to map two objects such that a memcpy between them would
-* just fault one mapping in and then the other over and over forever. So
-* we would need to divide the GTT size by 2. Additionally, some GTT is
-* taken up by things like the framebuffer and the ringbuffer and such, so
-* be more conservative.
-*/
- brw->max_gtt_map_object_size = gtt_size / 4;
-
if (brw->gen == 6)
brw->urb.gs_present = false;
@@ -1069,6 +1054,8 @@ brwCreateContext(gl_api api,
brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
+ brw->max_gtt_map_object_size = screen->max_gtt_map_object_size;
+
brw->use_resource_streamer = screen->has_resource_streamer &&
(env_var_as_boolean("INTEL_USE_HW_BT", false) ||
env_var_as_boolean("INTEL_USE_GATHER", false));
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index e0f7000..1a4efa3 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -853,7 +853,7 @@ struct brw_context
*/
bool perf_debug;
- uint32_t max_gtt_map_object_size;
+ uint64_t max_gtt_map_object_size;
int gen;
int gt;
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_screen.c
index 7876652..cb007d7 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -995,6 +995,17 @@ intel_get_boolean(struct intel_screen *screen, int param)
return (intel_get_param(screen, param, &value) == 0) && value;
}
+static int
+intel_get_integer(struct intel_screen *screen, int param)
+{
+ int value = -1;
+
+ if (intel_get_param(screen, param, &value) == 0)
+ return value;
+
+ return -1;
+}
+
static void
intelDestroyScreen(__DRIscreen * sPriv)
{
@@ -1565,6 +1576,43 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
if (INTEL_DEBUG & DEBUG_AUB)
drm_intel_bufmgr_gem_set_aub_dump(intelScreen->bufmgr, true);
+#ifndef I915_PARAM_MMAP_GTT_VERSION
+#define I915_PARAM_MMAP_GTT_VERSION 40 /* XXX delete me with new libdrm */
+#endif
+ if (intel_get_integer(intelScreen, I915_PARAM_MMAP_GTT_VERSION) >= 1) {
+ /* Theorectically unlimited! At least for individual objects...
+ *
+ * Currently the entire (global) address space for all GTT maps is
+ * limited to 64bits. That is all objects on the system that are
+ * setup for GTT mmapping must fit within 64bits. An attempt to use
+ * one that exceeds the limit with fail in drm_intel_bo_map_gtt().
+ *
+ * Long before we hit that limit, we will be practically limited by
+ * that any single object must fit in physical memory (RAM). The upper
+ * limit on the CPU's address space is currently 48bits (Skylake), of
+ * which only 39bi
