Mesa (master): radv: fix samples_identical return value.
Module: Mesa Branch: master Commit: 67c91ef2a228b0843bdbb4b7b7128ef45e3dd71f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=67c91ef2a228b0843bdbb4b7b7128ef45e3dd71f Author: Dave Airlie Date: Wed Oct 19 15:43:26 2016 +1000 radv: fix samples_identical return value. This was returning an inversion, so not doing as it should have. We need to compare the fmask value with 0, and return the result from that. --- src/amd/common/ac_nir_to_llvm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index ad32e15..e2f6bca 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -3410,6 +3410,9 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr) txf_address, txf_count, 0xf); result = build_tex_intrinsic(ctx, instr, &txf_info); + + result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, ""); + result = LLVMBuildICmp(ctx->builder, LLVMIntEQ, result, ctx->i32zero, ""); goto write_result; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): radv: decompress fmask before reading using texture unit
Module: Mesa
Branch: master
Commit: 86c4575a813bb57d1af3e3a0bb0c3eb44f27aedf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=86c4575a813bb57d1af3e3a0bb0c3eb44f27aedf
Author: Dave Airlie
Date: Wed Oct 19 17:34:28 2016 +1000
radv: decompress fmask before reading using texture unit
Before we can read the fmask using the compute shader, we need
to decompress the fmask in place.
This fixes a bunch of remaining failure and hopefully multisampling
in Talos.
---
src/amd/vulkan/radv_cmd_buffer.c | 3 +++
src/amd/vulkan/radv_meta_fast_clear.c | 6 --
src/amd/vulkan/radv_meta_resolve.c| 2 ++
3 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 690c739..3f1a6f4 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2163,6 +2163,9 @@ static void radv_handle_cmask_image_transition(struct
radv_cmd_buffer *cmd_buffe
radv_initialise_cmask(cmd_buffer, image, 0xu);
} else if (radv_layout_has_cmask(image, src_layout) &&
!radv_layout_has_cmask(image, dst_layout)) {
+
+ if (!cmd_buffer->device->allow_fast_clears)
+ return;
radv_fast_clear_flush_image_inplace(cmd_buffer, image);
}
}
diff --git a/src/amd/vulkan/radv_meta_fast_clear.c
b/src/amd/vulkan/radv_meta_fast_clear.c
index c0fa922..15c9bbcb 100644
--- a/src/amd/vulkan/radv_meta_fast_clear.c
+++ b/src/amd/vulkan/radv_meta_fast_clear.c
@@ -419,12 +419,6 @@ radv_fast_clear_flush_image_inplace(struct radv_cmd_buffer
*cmd_buffer,
VkDevice device_h = radv_device_to_handle(cmd_buffer->device);
VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
- if (!image->cmask.size)
- return;
-
- if (!cmd_buffer->device->allow_fast_clears)
- return;
-
radv_meta_save_pass(&saved_pass_state, cmd_buffer);
radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer);
diff --git a/src/amd/vulkan/radv_meta_resolve.c
b/src/amd/vulkan/radv_meta_resolve.c
index 6b0540f..da813eb 100644
--- a/src/amd/vulkan/radv_meta_resolve.c
+++ b/src/amd/vulkan/radv_meta_resolve.c
@@ -439,6 +439,8 @@ void radv_CmdResolveImage(
use_compute_resolve = true;
if (use_compute_resolve) {
+
+ radv_fast_clear_flush_image_inplace(cmd_buffer, src_image);
radv_meta_resolve_compute_image(cmd_buffer,
src_image,
src_image_layout,
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Mesa (master): i965: fix subnr overflow in suboffset()
Module: Mesa
Branch: master
Commit: 66d8bd3b7e577b7ae4d0b29186dce95d615e2c40
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=66d8bd3b7e577b7ae4d0b29186dce95d615e2c40
Author: Iago Toral Quiroga
Date: Tue Sep 27 12:23:44 2016 +0200
i965: fix subnr overflow in suboffset()
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_reg.h | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h
b/src/mesa/drivers/dri/i965/brw_reg.h
index 3b46d27..8907c9c 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -520,14 +520,6 @@ sechalf(struct brw_reg reg)
}
static inline struct brw_reg
-suboffset(struct brw_reg reg, unsigned delta)
-{
- reg.subnr += delta * type_sz(reg.type);
- return reg;
-}
-
-
-static inline struct brw_reg
offset(struct brw_reg reg, unsigned delta)
{
reg.nr += delta;
@@ -544,6 +536,11 @@ byte_offset(struct brw_reg reg, unsigned bytes)
return reg;
}
+static inline struct brw_reg
+suboffset(struct brw_reg reg, unsigned delta)
+{
+ return byte_offset(reg, delta * type_sz(reg.type));
+}
/** Construct unsigned word[16] register */
static inline struct brw_reg
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Mesa (master): egl: bring back the default glapi.so name
Module: Mesa
Branch: master
Commit: 8acb79dfac3495d9786f747f2052d6a8084cca6a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8acb79dfac3495d9786f747f2052d6a8084cca6a
Author: Eric Engestrom
Date: Wed Oct 19 15:09:26 2016 +0100
egl: bring back the default glapi.so name
Earlier commit replaced the default platform specific libglapi.so name
with an #error.
This may have been overzealous since the name is the correct for the BSD
platforms, at least. Reinstate the hunk - bringing back OpenBSD, et al.
to a successful build state.
Fixes: 7a9c92d071d ("egl/dri2: non-shared glapi cleanups")
[Emil Velikov: format the patch from Eric, add commit message and tag.]
Signed-off-by: Emil Velikov
---
src/egl/drivers/dri2/egl_dri2.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 8785e31..4ed8c12 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -2808,10 +2808,8 @@ dri2_load(_EGLDriver *drv)
const char *libname = "libglapi.0.dylib";
#elif defined(__CYGWIN__)
const char *libname = "cygglapi-0.dll";
-#elif defined(__linux__)
- const char *libname = "libglapi.so.0";
#else
-#error Unknown glapi provider for this platform
+ const char *libname = "libglapi.so.0";
#endif
void *handle;
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Mesa (master): reviewers: Throw myself on the GLX grenade
Module: Mesa Branch: master Commit: 4276b5c16a360c3fc5cf17f4ff569d83925146a2 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4276b5c16a360c3fc5cf17f4ff569d83925146a2 Author: Adam Jackson Date: Thu Oct 6 15:37:54 2016 -0400 reviewers: Throw myself on the GLX grenade Signed-off-by: Adam Jackson Reviewed-by: Ian Romanick --- REVIEWERS | 4 1 file changed, 4 insertions(+) diff --git a/REVIEWERS b/REVIEWERS index f7574b3..f822421 100644 --- a/REVIEWERS +++ b/REVIEWERS @@ -104,3 +104,7 @@ F: src/egl/drivers/dri2/platform_wayland.c FREEDRENO R: Rob Clark F: src/gallium/drivers/freedreno/ + +GLX +R: Adam Jackson +F: src/glx/ ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): mesa_to_tgsi: drop support for instructions that can' t occur here
Module: Mesa Branch: master Commit: 82f4c0126d6d6eb0edfe3269c103ddf2df8cc9a1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=82f4c0126d6d6eb0edfe3269c103ddf2df8cc9a1 Author: Marek Olšák Date: Mon Oct 17 00:07:01 2016 +0200 mesa_to_tgsi: drop support for instructions that can't occur here Reviewed-by: Ilia Mirkin Reviewed-by: Ian Romanick Reviewed-by: Nicolai Hähnle --- src/mesa/state_tracker/st_mesa_to_tgsi.c | 72 1 file changed, 72 deletions(-) diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c index b989257..c8ed26c 100644 --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c @@ -505,26 +505,10 @@ translate_opcode( unsigned op ) return TGSI_OPCODE_ABS; case OPCODE_ADD: return TGSI_OPCODE_ADD; - case OPCODE_BGNLOOP: - return TGSI_OPCODE_BGNLOOP; - case OPCODE_BGNSUB: - return TGSI_OPCODE_BGNSUB; - case OPCODE_BRK: - return TGSI_OPCODE_BRK; - case OPCODE_CAL: - return TGSI_OPCODE_CAL; case OPCODE_CMP: return TGSI_OPCODE_CMP; - case OPCODE_CONT: - return TGSI_OPCODE_CONT; case OPCODE_COS: return TGSI_OPCODE_COS; - case OPCODE_DDX: - return TGSI_OPCODE_DDX; - case OPCODE_DDY: - return TGSI_OPCODE_DDY; - case OPCODE_DP2: - return TGSI_OPCODE_DP2; case OPCODE_DP3: return TGSI_OPCODE_DP3; case OPCODE_DP4: @@ -533,14 +517,6 @@ translate_opcode( unsigned op ) return TGSI_OPCODE_DPH; case OPCODE_DST: return TGSI_OPCODE_DST; - case OPCODE_ELSE: - return TGSI_OPCODE_ELSE; - case OPCODE_ENDIF: - return TGSI_OPCODE_ENDIF; - case OPCODE_ENDLOOP: - return TGSI_OPCODE_ENDLOOP; - case OPCODE_ENDSUB: - return TGSI_OPCODE_ENDSUB; case OPCODE_EX2: return TGSI_OPCODE_EX2; case OPCODE_EXP: @@ -549,10 +525,6 @@ translate_opcode( unsigned op ) return TGSI_OPCODE_FLR; case OPCODE_FRC: return TGSI_OPCODE_FRC; - case OPCODE_IF: - return TGSI_OPCODE_IF; - case OPCODE_TRUNC: - return TGSI_OPCODE_TRUNC; case OPCODE_KIL: return TGSI_OPCODE_KILL_IF; case OPCODE_LG2: @@ -573,14 +545,10 @@ translate_opcode( unsigned op ) return TGSI_OPCODE_MOV; case OPCODE_MUL: return TGSI_OPCODE_MUL; - case OPCODE_NOP: - return TGSI_OPCODE_NOP; case OPCODE_POW: return TGSI_OPCODE_POW; case OPCODE_RCP: return TGSI_OPCODE_RCP; - case OPCODE_RET: - return TGSI_OPCODE_RET; case OPCODE_SCS: return TGSI_OPCODE_SCS; case OPCODE_SGE: @@ -589,18 +557,12 @@ translate_opcode( unsigned op ) return TGSI_OPCODE_SIN; case OPCODE_SLT: return TGSI_OPCODE_SLT; - case OPCODE_SSG: - return TGSI_OPCODE_SSG; case OPCODE_SUB: return TGSI_OPCODE_SUB; case OPCODE_TEX: return TGSI_OPCODE_TEX; case OPCODE_TXB: return TGSI_OPCODE_TXB; - case OPCODE_TXD: - return TGSI_OPCODE_TXD; - case OPCODE_TXL: - return TGSI_OPCODE_TXL; case OPCODE_TXP: return TGSI_OPCODE_TXP; case OPCODE_XPD: @@ -643,29 +605,8 @@ compile_instruction( emit_swz( t, dst[0], &inst->SrcReg[0] ); return; - case OPCODE_BGNLOOP: - case OPCODE_CAL: - case OPCODE_ELSE: - case OPCODE_ENDLOOP: - debug_assert(num_dst == 0); - ureg_label_insn( ureg, - translate_opcode( inst->Opcode ), - src, num_src, - get_label( t, inst->BranchTarget )); - return; - - case OPCODE_IF: - debug_assert(num_dst == 0); - ureg_label_insn( ureg, - ctx->Const.NativeIntegers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF, - src, num_src, - get_label( t, inst->BranchTarget )); - return; - case OPCODE_TEX: case OPCODE_TXB: - case OPCODE_TXD: - case OPCODE_TXL: case OPCODE_TXP: src[num_src++] = t->samplers[inst->TexSrcUnit]; ureg_tex_insn( ureg, @@ -693,19 +634,6 @@ compile_instruction( src, num_src ); break; - case OPCODE_NOISE1: - case OPCODE_NOISE2: - case OPCODE_NOISE3: - case OPCODE_NOISE4: - /* At some point, a motivated person could add a better - * implementation of noise. Currently not even the nvidia - * binary drivers do anything more than this. In any case, the - * place to do this is in the GL state tracker, not the poor - * driver. - */ - ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) ); - break; - case OPCODE_RSQ: ureg_RSQ( ureg, dst[0], ureg_abs(src[0]) ); break; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): glsl_to_tgsi: reduce the size of glsl_to_tgsi_instruction using bitfields
Module: Mesa
Branch: master
Commit: dbf64ea28bb20bafe5a7daa4b5b179965725247e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dbf64ea28bb20bafe5a7daa4b5b179965725247e
Author: Marek Olšák
Date: Sun Oct 16 21:58:13 2016 +0200
glsl_to_tgsi: reduce the size of glsl_to_tgsi_instruction using bitfields
sizeof(glsl_to_tgsi_instruction): 464 -> 416
Reviewed-by: Ilia Mirkin
Reviewed-by: Dave Airlie
Reviewed-by: Nicolai Hähnle
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 36 --
1 file changed, 19 insertions(+), 17 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index cb5eab5..bc58670 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -270,28 +270,27 @@ class glsl_to_tgsi_instruction : public exec_node {
public:
DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
- unsigned op;
st_dst_reg dst[2];
st_src_reg src[4];
- /** Pointer to the ir source this tree came from for debugging */
- ir_instruction *ir;
- GLboolean cond_update;
- bool saturate;
- bool is_64bit_expanded;
st_src_reg sampler; /**< sampler register */
- int sampler_base;
- int sampler_array_size; /**< 1-based size of sampler array, 1 if not array
*/
- int tex_target; /**< One of TEXTURE_*_INDEX */
- glsl_base_type tex_type;
- GLboolean tex_shadow;
- unsigned image_format;
-
st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
- unsigned tex_offset_num_offset;
- int dead_mask; /**< Used in dead code elimination */
-
st_src_reg buffer; /**< buffer register */
- unsigned buffer_access; /**< buffer access type */
+
+ /** Pointer to the ir source this tree came from for debugging */
+ ir_instruction *ir;
+
+ unsigned op:8; /**< TGSI opcode */
+ unsigned saturate:1;
+ unsigned is_64bit_expanded:1;
+ unsigned sampler_base:5;
+ unsigned sampler_array_size:6; /**< 1-based size of sampler array, 1 if not
array */
+ unsigned tex_target:4; /**< One of TEXTURE_*_INDEX */
+ glsl_base_type tex_type:4;
+ unsigned tex_shadow:1;
+ unsigned image_format:9;
+ unsigned tex_offset_num_offset:3;
+ unsigned dead_mask:4; /**< Used in dead code elimination */
+ unsigned buffer_access:3; /**< buffer access type */
class function_entry *function; /* Set on TGSI_OPCODE_CAL or
TGSI_OPCODE_BGNSUB */
const struct tgsi_opcode_info *info;
@@ -706,6 +705,9 @@ glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned
op,
}
assert(num_reladdr == 0);
+ /* inst->op has only 8 bits. */
+ STATIC_ASSERT(TGSI_OPCODE_LAST <= 255);
+
inst->op = op;
inst->info = tgsi_get_opcode_info(op);
inst->dst[0] = dst;
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Mesa (master): mesa_to_tgsi: remove remnants of flow control and subroutine support
Module: Mesa
Branch: master
Commit: eacda2c08085c8296949b2743e9ecdb2d2d6d54f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eacda2c08085c8296949b2743e9ecdb2d2d6d54f
Author: Marek Olšák
Date: Mon Oct 17 00:11:21 2016 +0200
mesa_to_tgsi: remove remnants of flow control and subroutine support
Reviewed-by: Ilia Mirkin
Reviewed-by: Ian Romanick
Reviewed-by: Nicolai Hähnle
---
src/mesa/state_tracker/st_mesa_to_tgsi.c | 93 +---
1 file changed, 1 insertion(+), 92 deletions(-)
diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c
b/src/mesa/state_tracker/st_mesa_to_tgsi.c
index c8ed26c..4c26d92 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
@@ -51,13 +51,6 @@
(1 << PROGRAM_CONSTANT) | \
(1 << PROGRAM_UNIFORM))
-
-struct label {
- unsigned branch_target;
- unsigned token;
-};
-
-
/**
* Intermediate state used during shader translation.
*/
@@ -75,78 +68,11 @@ struct st_translate {
const GLuint *inputMapping;
const GLuint *outputMapping;
- /* For every instruction that contains a label (eg CALL), keep
-* details so that we can go back afterwards and emit the correct
-* tgsi instruction number for each label.
-*/
- struct label *labels;
- unsigned labels_size;
- unsigned labels_count;
-
- /* Keep a record of the tgsi instruction number that each mesa
-* instruction starts at, will be used to fix up labels after
-* translation.
-*/
- unsigned *insn;
- unsigned insn_size;
- unsigned insn_count;
-
unsigned procType; /**< PIPE_SHADER_VERTEX/FRAGMENT */
-
- boolean error;
};
/**
- * Make note of a branch to a label in the TGSI code.
- * After we've emitted all instructions, we'll go over the list
- * of labels built here and patch the TGSI code with the actual
- * location of each label.
- */
-static unsigned *get_label( struct st_translate *t,
-unsigned branch_target )
-{
- unsigned i;
-
- if (t->labels_count + 1 >= t->labels_size) {
- t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
- t->labels = realloc(t->labels, t->labels_size * sizeof t->labels[0]);
- if (t->labels == NULL) {
- static unsigned dummy;
- t->error = TRUE;
- return &dummy;
- }
- }
-
- i = t->labels_count++;
- t->labels[i].branch_target = branch_target;
- return &t->labels[i].token;
-}
-
-
-/**
- * Called prior to emitting the TGSI code for each Mesa instruction.
- * Allocate additional space for instructions if needed.
- * Update the insn[] array so the next Mesa instruction points to
- * the next TGSI instruction.
- */
-static void set_insn_start( struct st_translate *t,
-unsigned start )
-{
- if (t->insn_count + 1 >= t->insn_size) {
- t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
- t->insn = realloc(t->insn, t->insn_size * sizeof t->insn[0]);
- if (t->insn == NULL) {
- t->error = TRUE;
- return;
- }
- }
-
- t->insn[t->insn_count++] = start;
-}
-
-
-/**
* Map a Mesa dst register to a TGSI ureg_dst register.
*/
static struct ureg_dst
@@ -1095,27 +1021,10 @@ st_translate_mesa_program(
/* Emit each instruction in turn:
*/
- for (i = 0; i < program->NumInstructions; i++) {
- set_insn_start( t, ureg_get_instruction_number( ureg ));
+ for (i = 0; i < program->NumInstructions; i++)
compile_instruction(ctx, t, &program->Instructions[i]);
- }
-
- /* Fix up all emitted labels:
-*/
- for (i = 0; i < t->labels_count; i++) {
- ureg_fixup_label( ureg,
-t->labels[i].token,
-t->insn[t->labels[i].branch_target] );
- }
out:
- free(t->insn);
- free(t->labels);
free(t->constants);
-
- if (t->error) {
- debug_printf("%s: translate error flag set\n", __func__);
- }
-
return ret;
}
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Mesa (master): radeonsi: remove cb0_is_integer handling
Module: Mesa
Branch: master
Commit: a2ea653a498a55a37a7f139d486694969c6aecef
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a2ea653a498a55a37a7f139d486694969c6aecef
Author: Marek Olšák
Date: Fri Sep 16 22:42:54 2016 +0200
radeonsi: remove cb0_is_integer handling
st/mesa does this for us.
Reviewed-by: Nicolai Hähnle
---
src/gallium/drivers/radeonsi/si_pipe.h | 1 -
src/gallium/drivers/radeonsi/si_state.c | 9 +
src/gallium/drivers/radeonsi/si_state_shaders.c | 6 ++
3 files changed, 3 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h
b/src/gallium/drivers/radeonsi/si_pipe.h
index e10d3fb..8fc5fcc 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -165,7 +165,6 @@ struct si_framebuffer {
struct pipe_framebuffer_state state;
unsignednr_samples;
unsignedlog_samples;
- unsignedcb0_is_integer;
unsignedcompressed_cb_mask;
unsignedspi_shader_col_format;
unsignedspi_shader_col_format_alpha;
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 732f9e9..97bd308 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1144,8 +1144,7 @@ static void si_emit_db_render_state(struct si_context
*sctx, struct r600_atom *s
S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(sctx->db_stencil_disable_expclear) |
S_028010_DECOMPRESS_Z_ON_FLUSH(sctx->framebuffer.nr_samples >=
4));
- db_shader_control =
S_02880C_ALPHA_TO_MASK_DISABLE(sctx->framebuffer.cb0_is_integer) |
- sctx->ps_db_shader_control;
+ db_shader_control = sctx->ps_db_shader_control;
/* Bug workaround for smoothing (overrasterization) on SI. */
if (sctx->b.chip_class == SI && sctx->smoothing_enabled) {
@@ -2288,7 +2287,6 @@ static void si_set_framebuffer_state(struct pipe_context
*ctx,
struct pipe_constant_buffer constbuf = {0};
struct r600_surface *surf = NULL;
struct r600_texture *rtex;
- bool old_cb0_is_integer = sctx->framebuffer.cb0_is_integer;
bool old_any_dst_linear = sctx->framebuffer.any_dst_linear;
unsigned old_nr_samples = sctx->framebuffer.nr_samples;
int i;
@@ -2333,13 +2331,8 @@ static void si_set_framebuffer_state(struct pipe_context
*ctx,
sctx->framebuffer.compressed_cb_mask = 0;
sctx->framebuffer.nr_samples = util_framebuffer_get_num_samples(state);
sctx->framebuffer.log_samples =
util_logbase2(sctx->framebuffer.nr_samples);
- sctx->framebuffer.cb0_is_integer = state->nr_cbufs && state->cbufs[0] &&
-
util_format_is_pure_integer(state->cbufs[0]->format);
sctx->framebuffer.any_dst_linear = false;
- if (sctx->framebuffer.cb0_is_integer != old_cb0_is_integer)
- si_mark_atom_dirty(sctx, &sctx->db_render_state);
-
for (i = 0; i < state->nr_cbufs; i++) {
if (!state->cbufs[i])
continue;
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index d339b84..137a5d1 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -845,8 +845,7 @@ static void si_shader_init_pm4_state(struct si_screen
*sscreen,
static unsigned si_get_alpha_test_func(struct si_context *sctx)
{
/* Alpha-test should be disabled if colorbuffer 0 is integer. */
- if (sctx->queued.named.dsa &&
- !sctx->framebuffer.cb0_is_integer)
+ if (sctx->queued.named.dsa)
return sctx->queued.named.dsa->alpha_func;
return PIPE_FUNC_ALWAYS;
@@ -957,8 +956,7 @@ static inline void si_shader_selector_key(struct
pipe_context *ctx,
if (sctx->queued.named.blend) {
key->ps.epilog.alpha_to_one =
sctx->queued.named.blend->alpha_to_one &&
-
rs->multisample_enable &&
-
!sctx->framebuffer.cb0_is_integer;
+
rs->multisample_enable;
}
key->ps.prolog.poly_stipple = rs->poly_stipple_enable
&& is_poly;
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Mesa (master): glsl_to_tgsi: allocate glsl_to_tgsi_instruction:: tex_offsets on demand
Module: Mesa
Branch: master
Commit: 4e42898d9d8fc45bb1cf870b04c0ccd949205079
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e42898d9d8fc45bb1cf870b04c0ccd949205079
Author: Marek Olšák
Date: Sun Oct 16 22:08:03 2016 +0200
glsl_to_tgsi: allocate glsl_to_tgsi_instruction::tex_offsets on demand
sizeof(glsl_to_tgsi_instruction): 384 -> 264
Reviewed-by: Ilia Mirkin
Reviewed-by: Nicolai Hähnle
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 523b533..812a7a0 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -273,7 +273,7 @@ public:
st_dst_reg dst[2];
st_src_reg src[4];
st_src_reg resource; /**< sampler or buffer register */
- st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
+ st_src_reg *tex_offsets;
/** Pointer to the ir source this tree came from for debugging */
ir_instruction *ir;
@@ -4309,6 +4309,9 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir)
}
if (ir->offset) {
+ if (!inst->tex_offsets)
+ inst->tex_offsets = rzalloc_array(inst, st_src_reg,
MAX_GLSL_TEXTURE_OFFSET);
+
for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET && offset[i].file !=
PROGRAM_UNDEFINED; i++)
inst->tex_offsets[i] = offset[i];
inst->tex_offset_num_offset = i;
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Mesa (master): glsl_to_tgsi: remove unused st_translate::tex_offsets
Module: Mesa
Branch: master
Commit: 222c599b61d8b962e897d1a69002362886f28cb3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=222c599b61d8b962e897d1a69002362886f28cb3
Author: Marek Olšák
Date: Sun Oct 16 21:28:36 2016 +0200
glsl_to_tgsi: remove unused st_translate::tex_offsets
Reviewed-by: Ilia Mirkin
Reviewed-by: Nicolai Hähnle
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index a5b2fa7..0b49cf5 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -5323,7 +5323,6 @@ struct st_translate {
struct ureg_src images[PIPE_MAX_SHADER_IMAGES];
struct ureg_src systemValues[SYSTEM_VALUE_MAX];
struct ureg_src shared_memory;
- struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
unsigned *array_sizes;
struct inout_decl *input_decls;
unsigned num_input_decls;
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Mesa (master): glsl_to_tgsi: merge buffer and sampler fields in glsl_to_tgsi_instruction
Module: Mesa
Branch: master
Commit: 4d3d620f26be242c9c0d92877bb69edf3ed872ed
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d3d620f26be242c9c0d92877bb69edf3ed872ed
Author: Marek Olšák
Date: Sun Oct 16 22:04:02 2016 +0200
glsl_to_tgsi: merge buffer and sampler fields in glsl_to_tgsi_instruction
sizeof(glsl_to_tgsi_instruction): 416 -> 384
Reviewed-by: Ilia Mirkin
Reviewed-by: Nicolai Hähnle
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 63 +++---
1 file changed, 31 insertions(+), 32 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index bc58670..523b533 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -272,9 +272,8 @@ public:
st_dst_reg dst[2];
st_src_reg src[4];
- st_src_reg sampler; /**< sampler register */
+ st_src_reg resource; /**< sampler or buffer register */
st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
- st_src_reg buffer; /**< buffer register */
/** Pointer to the ir source this tree came from for debugging */
ir_instruction *ir;
@@ -2312,7 +2311,7 @@ glsl_to_tgsi_visitor::visit_expression(ir_expression* ir,
st_src_reg *op)
*buffer.reladdr = op[0];
emit_arl(ir, sampler_reladdr, op[0]);
}
- emit_asm(ir, TGSI_OPCODE_RESQ, result_dst)->buffer = buffer;
+ emit_asm(ir, TGSI_OPCODE_RESQ, result_dst)->resource = buffer;
break;
}
@@ -3342,7 +3341,7 @@
glsl_to_tgsi_visitor::visit_atomic_counter_intrinsic(ir_call *ir)
inst = emit_asm(ir, opcode, dst, offset, data, data2);
}
- inst->buffer = buffer;
+ inst->resource = buffer;
}
void
@@ -3455,13 +3454,13 @@ glsl_to_tgsi_visitor::visit_ssbo_intrinsic(ir_call *ir)
*/
unsigned op = inst->op;
do {
- inst->buffer = buffer;
+ inst->resource = buffer;
if (access)
inst->buffer_access = access->value.u[0];
inst = (glsl_to_tgsi_instruction *)inst->get_prev();
if (inst->op == TGSI_OPCODE_UADD)
inst = (glsl_to_tgsi_instruction *)inst->get_prev();
- } while (inst && inst->op == op && inst->buffer.file == PROGRAM_UNDEFINED);
+ } while (inst && inst->op == op && inst->resource.file ==
PROGRAM_UNDEFINED);
}
void
@@ -3528,7 +3527,7 @@ glsl_to_tgsi_visitor::visit_shared_intrinsic(ir_call *ir)
if (ir->callee->intrinsic_id == ir_intrinsic_shared_load) {
inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, off);
- inst->buffer = buffer;
+ inst->resource = buffer;
} else if (ir->callee->intrinsic_id == ir_intrinsic_shared_store) {
param = param->get_next();
ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
@@ -3541,7 +3540,7 @@ glsl_to_tgsi_visitor::visit_shared_intrinsic(ir_call *ir)
dst.type = this->result.type;
inst = emit_asm(ir, TGSI_OPCODE_STORE, dst, off, this->result);
- inst->buffer = buffer;
+ inst->resource = buffer;
} else {
param = param->get_next();
ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
@@ -3584,7 +3583,7 @@ glsl_to_tgsi_visitor::visit_shared_intrinsic(ir_call *ir)
}
inst = emit_asm(ir, opcode, dst, off, data, data2);
- inst->buffer = buffer;
+ inst->resource = buffer;
}
}
@@ -3715,7 +3714,7 @@ glsl_to_tgsi_visitor::visit_image_intrinsic(ir_call *ir)
inst->dst[0].writemask = WRITEMASK_XYZW;
}
- inst->buffer = image;
+ inst->resource = image;
inst->sampler_array_size = sampler_array_size;
inst->sampler_base = sampler_base;
@@ -4300,13 +4299,13 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir)
if (ir->shadow_comparitor)
inst->tex_shadow = GL_TRUE;
- inst->sampler.index = sampler_index;
+ inst->resource.index = sampler_index;
inst->sampler_array_size = sampler_array_size;
inst->sampler_base = sampler_base;
if (reladdr.file != PROGRAM_UNDEFINED) {
- inst->sampler.reladdr = ralloc(mem_ctx, st_src_reg);
- memcpy(inst->sampler.reladdr, &reladdr, sizeof(reladdr));
+ inst->resource.reladdr = ralloc(mem_ctx, st_src_reg);
+ memcpy(inst->resource.reladdr, &reladdr, sizeof(reladdr));
}
if (ir->offset) {
@@ -4523,23 +4522,23 @@ count_resources(glsl_to_tgsi_visitor *v, gl_program
*prog)
st_translate_texture_target(inst->tex_target, inst->tex_shadow);
if (inst->tex_shadow) {
- prog->ShadowSamplers |= 1 << (inst->sampler.index + i);
+ prog->ShadowSamplers |= 1 << (inst->resource.index + i);
}
}
}
if (inst->tex_target == TEXTURE_EXTERNAL_INDEX)
- prog->ExternalSamplersUsed |= 1 << inst->sampler.index;
+ prog->ExternalSamplersUsed |= 1 << inst->resource.index;
- if (inst->buffer.file != PROGRAM_UNDEFINED && (
+ if (inst->resource.file != PROGRAM_UNDEFINED && (
is_resource_instr
Mesa (master): glsl_to_tgsi: remove subroutine support
Module: Mesa
Branch: master
Commit: ec35ff4e2b71867b0c60479bea8aacd8dfd66ae5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec35ff4e2b71867b0c60479bea8aacd8dfd66ae5
Author: Marek Olšák
Date: Mon Oct 17 00:38:41 2016 +0200
glsl_to_tgsi: remove subroutine support
Never used. The GLSL compiler doesn't even look at EmitNoFunctions.
v2: add back "return" support in "main"
Reviewed-by: Nicolai Hähnle
---
src/mesa/state_tracker/st_extensions.c | 3 +-
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 207 +
2 files changed, 5 insertions(+), 205 deletions(-)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index b87a3db..6ed00ab 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -272,8 +272,7 @@ void st_init_limits(struct pipe_screen *screen,
options->EmitNoLoops =
!screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH);
- options->EmitNoFunctions =
- !screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_SUBROUTINES);
+ options->EmitNoFunctions = true;
options->EmitNoMainReturn =
!screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_SUBROUTINES);
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 812a7a0..748ce89 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -291,7 +291,6 @@ public:
unsigned dead_mask:4; /**< Used in dead code elimination */
unsigned buffer_access:3; /**< buffer access type */
- class function_entry *function; /* Set on TGSI_OPCODE_CAL or
TGSI_OPCODE_BGNSUB */
const struct tgsi_opcode_info *info;
};
@@ -331,38 +330,6 @@ public:
int type; /**< GL_DOUBLE, GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
};
-class function_entry : public exec_node {
-public:
- ir_function_signature *sig;
-
- /**
-* identifier of this function signature used by the program.
-*
-* At the point that TGSI instructions for function calls are
-* generated, we don't know the address of the first instruction of
-* the function body. So we make the BranchTarget that is called a
-* small integer and rewrite them during set_branchtargets().
-*/
- int sig_id;
-
- /**
-* Pointer to first instruction of the function body.
-*
-* Set during function body emits after main() is processed.
-*/
- glsl_to_tgsi_instruction *bgn_inst;
-
- /**
-* Index of the first instruction of the function body in actual TGSI.
-*
-* Set after conversion from glsl_to_tgsi_instruction to TGSI.
-*/
- int inst;
-
- /** Storage for the return value. */
- st_src_reg return_reg;
-};
-
static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0,
GLSL_TYPE_ERROR);
static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP,
GLSL_TYPE_ERROR);
@@ -411,8 +378,6 @@ public:
glsl_to_tgsi_visitor();
~glsl_to_tgsi_visitor();
- function_entry *current_function;
-
struct gl_context *ctx;
struct gl_program *prog;
struct gl_shader_program *shader_program;
@@ -454,8 +419,6 @@ public:
int add_constant(gl_register_file file, gl_constant_value values[8],
int size, int datatype, uint16_t *swizzle_out);
- function_entry *get_function_signature(ir_function_signature *sig);
-
st_src_reg get_temp(const glsl_type *type);
void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
@@ -511,10 +474,6 @@ public:
exec_list immediates;
unsigned num_immediates;
- /** List of function_entry */
- exec_list function_signatures;
- int next_signature_id;
-
/** List of glsl_to_tgsi_instruction */
exec_list instructions;
@@ -723,8 +682,6 @@ glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned
op,
*/
inst->tex_type = GLSL_TYPE_FLOAT;
- inst->function = NULL;
-
/* Update indirect addressing status used by TGSI */
if (dst.reladdr || dst.reladdr2) {
switch(dst.file) {
@@ -3219,42 +3176,6 @@ glsl_to_tgsi_visitor::visit(ir_constant *ir)
&this->result.swizzle);
}
-function_entry *
-glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
-{
- foreach_in_list_use_after(function_entry, entry,
&this->function_signatures) {
- if (entry->sig == sig)
- return entry;
- }
-
- entry = ralloc(mem_ctx, function_entry);
- entry->sig = sig;
- entry->sig_id = this->next_signature_id++;
- entry->bgn_inst = NULL;
-
- /* Allocate storage for all the parameters. */
- foreach_in_list(ir_variable, param, &sig->parameters) {
- variable_storage *storage;
-
- storage = find_variable_storage(param);
- assert(!storage);
-
- st_src_reg src = get_temp(param->type);
-
- storage = new(mem_
Mesa (master): glsl_to_tgsi: remove code for fixing up TGSI labels
Module: Mesa
Branch: master
Commit: 2897cb3dba9287011f9c43cd2f214100952370c0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2897cb3dba9287011f9c43cd2f214100952370c0
Author: Marek Olšák
Date: Mon Oct 17 00:47:49 2016 +0200
glsl_to_tgsi: remove code for fixing up TGSI labels
I don't know what this was supposed to do, but all TGSI labels were
always 0.
Reviewed-by: Nicolai Hähnle
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 92 +-
1 file changed, 2 insertions(+), 90 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 748ce89..98ebe54 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -5139,10 +5139,6 @@ glsl_to_tgsi_visitor::renumber_registers(void)
}
/* - TGSI conversion stuff --
*/
-struct label {
- unsigned branch_target;
- unsigned token;
-};
/**
* Intermediate state used during shader translation.
@@ -5176,25 +5172,7 @@ struct st_translate {
const GLuint *inputMapping;
const GLuint *outputMapping;
- /* For every instruction that contains a label, keep
-* details so that we can go back afterwards and emit the correct
-* tgsi instruction number for each label.
-*/
- struct label *labels;
- unsigned labels_size;
- unsigned labels_count;
-
- /* Keep a record of the tgsi instruction number that each mesa
-* instruction starts at, will be used to fix up labels after
-* translation.
-*/
- unsigned *insn;
- unsigned insn_size;
- unsigned insn_count;
-
unsigned procType; /**< PIPE_SHADER_VERTEX/FRAGMENT */
-
- boolean error;
};
/** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
@@ -5266,53 +5244,6 @@ _mesa_sysval_to_semantic(unsigned sysval)
}
}
-
-/**
- * Make note of a branch to a label in the TGSI code.
- * After we've emitted all instructions, we'll go over the list
- * of labels built here and patch the TGSI code with the actual
- * location of each label.
- */
-static unsigned *get_label(struct st_translate *t, unsigned branch_target)
-{
- unsigned i;
-
- if (t->labels_count + 1 >= t->labels_size) {
- t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
- t->labels = (struct label *)realloc(t->labels,
- t->labels_size * sizeof(struct
label));
- if (t->labels == NULL) {
- static unsigned dummy;
- t->error = TRUE;
- return &dummy;
- }
- }
-
- i = t->labels_count++;
- t->labels[i].branch_target = branch_target;
- return &t->labels[i].token;
-}
-
-/**
- * Called prior to emitting the TGSI code for each instruction.
- * Allocate additional space for instructions if needed.
- * Update the insn[] array so the next glsl_to_tgsi_instruction points to
- * the next TGSI instruction.
- */
-static void set_insn_start(struct st_translate *t, unsigned start)
-{
- if (t->insn_count + 1 >= t->insn_size) {
- t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
- t->insn = (unsigned *)realloc(t->insn, t->insn_size *
sizeof(t->insn[0]));
- if (t->insn == NULL) {
- t->error = TRUE;
- return;
- }
- }
-
- t->insn[t->insn_count++] = start;
-}
-
/**
* Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
*/
@@ -5613,10 +5544,7 @@ compile_tgsi_instruction(struct st_translate *t,
case TGSI_OPCODE_IF:
case TGSI_OPCODE_UIF:
assert(num_dst == 0);
- ureg_label_insn(ureg,
- inst->op,
- src, num_src,
- get_label(t, 0));
+ ureg_insn(ureg, inst->op, NULL, 0, src, num_src);
return;
case TGSI_OPCODE_TEX:
@@ -6343,17 +6271,8 @@ st_translate_program(
/* Emit each instruction in turn:
*/
- foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) {
- set_insn_start(t, ureg_get_instruction_number(ureg));
+ foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions)
compile_tgsi_instruction(t, inst);
- }
-
- /* Fix up all emitted labels:
-*/
- for (i = 0; i < t->labels_count; i++) {
- ureg_fixup_label(ureg, t->labels[i].token,
- t->insn[t->labels[i].branch_target]);
- }
/* Set the next shader stage hint for VS and TES. */
switch (procType) {
@@ -6395,17 +6314,10 @@ out:
if (t) {
free(t->arrays);
free(t->temps);
- free(t->insn);
- free(t->labels);
free(t->constants);
t->num_constants = 0;
free(t->immediates);
t->num_immediates = 0;
-
- if (t->error) {
- debug_printf("%s: translate error flag set\n", __func__);
- }
-
FREE(t);
}
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Mesa (master): glsl_to_tgsi: remove unused parameters from calc_deref_offsets
Module: Mesa Branch: master Commit: 0d95eeb79c849649fdcb32fe7f26498fb7df3d9f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d95eeb79c849649fdcb32fe7f26498fb7df3d9f Author: Marek Olšák Date: Sun Oct 16 21:22:11 2016 +0200 glsl_to_tgsi: remove unused parameters from calc_deref_offsets Reviewed-by: Ilia Mirkin Reviewed-by: Nicolai Hähnle --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 14 +- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 7adfaaf..a5b2fa7 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -559,10 +559,8 @@ public: unsigned *index, st_src_reg *reladdr, bool opaque); - void calc_deref_offsets(ir_dereference *head, - ir_dereference *tail, + void calc_deref_offsets(ir_dereference *tail, unsigned *array_elements, - unsigned *base, unsigned *index, st_src_reg *indirect, unsigned *location); @@ -3913,10 +3911,8 @@ glsl_to_tgsi_visitor::visit(ir_call *ir) } void -glsl_to_tgsi_visitor::calc_deref_offsets(ir_dereference *head, - ir_dereference *tail, +glsl_to_tgsi_visitor::calc_deref_offsets(ir_dereference *tail, unsigned *array_elements, - unsigned *base, unsigned *index, st_src_reg *indirect, unsigned *location) @@ -3927,7 +3923,7 @@ glsl_to_tgsi_visitor::calc_deref_offsets(ir_dereference *head, const glsl_type *struct_type = deref_record->record->type; int field_index = deref_record->record->type->field_index(deref_record->field); - calc_deref_offsets(head, deref_record->record->as_dereference(), array_elements, base, index, indirect, location); + calc_deref_offsets(deref_record->record->as_dereference(), array_elements, index, indirect, location); assert(field_index >= 0); *location += struct_type->record_location_offset(field_index); @@ -3964,7 +3960,7 @@ glsl_to_tgsi_visitor::calc_deref_offsets(ir_dereference *head, *array_elements *= deref_arr->array->type->length; - calc_deref_offsets(head, deref_arr->array->as_dereference(), array_elements, base, index, indirect, location); + calc_deref_offsets(deref_arr->array->as_dereference(), array_elements, index, indirect, location); break; } default: @@ -3992,7 +3988,7 @@ glsl_to_tgsi_visitor::get_deref_offsets(ir_dereference *ir, assert(var); location = var->data.location; - calc_deref_offsets(ir, ir, array_size, base, index, reladdr, &location); + calc_deref_offsets(ir, array_size, index, reladdr, &location); /* * If we end up with no indirect then adjust the base to the index, ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): glsl_to_tgsi: reduce the size of st_dst_reg and st_src_reg
Module: Mesa
Branch: master
Commit: 9015cbb3a3afd58543e3a144b7ae57e9ed44d811
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9015cbb3a3afd58543e3a144b7ae57e9ed44d811
Author: Marek Olšák
Date: Sun Oct 16 21:30:05 2016 +0200
glsl_to_tgsi: reduce the size of st_dst_reg and st_src_reg
I noticed that glsl_to_tgsi_instruction is too huge.
sizeof(glsl_to_tgsi_instruction): 752 -> 464 (-38%)
Reviewed-by: Ilia Mirkin
Reviewed-by: Nicolai Hähnle
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 71 +-
1 file changed, 40 insertions(+), 31 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 0b49cf5..cb5eab5 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -159,23 +159,24 @@ public:
explicit st_src_reg(st_dst_reg reg);
- gl_register_file file; /**< PROGRAM_* from Mesa */
- int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
- int index2D;
- GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
- int negate; /**< NEGATE_XYZW mask from mesa */
- enum glsl_base_type type; /** GLSL_TYPE_* from GLSL IR (enum
glsl_base_type) */
- /** Register index should be offset by the integer in this reg. */
- st_src_reg *reladdr;
- st_src_reg *reladdr2;
- bool has_index2;
+ int16_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
+ int16_t index2D;
+ uint16_t swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
+ int negate:4; /**< NEGATE_XYZW mask from mesa */
+ enum glsl_base_type type:4; /** GLSL_TYPE_* from GLSL IR (enum
glsl_base_type) */
+ unsigned has_index2:1;
+ gl_register_file file:5; /**< PROGRAM_* from Mesa */
/*
* Is this the second half of a double register pair?
* currently used for input mapping only.
*/
- bool double_reg2;
- unsigned array_id;
- bool is_double_vertex_input;
+ unsigned double_reg2:1;
+ unsigned is_double_vertex_input:1;
+ unsigned array_id:10;
+
+ /** Register index should be offset by the integer in this reg. */
+ st_src_reg *reladdr;
+ st_src_reg *reladdr2;
};
class st_dst_reg {
@@ -223,16 +224,17 @@ public:
explicit st_dst_reg(st_src_reg reg);
- gl_register_file file; /**< PROGRAM_* from Mesa */
- int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
- int index2D;
- int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
- enum glsl_base_type type; /** GLSL_TYPE_* from GLSL IR (enum
glsl_base_type) */
+ int16_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
+ int16_t index2D;
+ gl_register_file file:5; /**< PROGRAM_* from Mesa */
+ unsigned writemask:4; /**< Bitfield of WRITEMASK_[XYZW] */
+ enum glsl_base_type type:4; /** GLSL_TYPE_* from GLSL IR (enum
glsl_base_type) */
+ unsigned has_index2:1;
+ unsigned array_id:10;
+
/** Register index should be offset by the integer in this reg. */
st_src_reg *reladdr;
st_src_reg *reladdr2;
- bool has_index2;
- unsigned array_id;
};
st_src_reg::st_src_reg(st_dst_reg reg)
@@ -452,7 +454,7 @@ public:
variable_storage *find_variable_storage(ir_variable *var);
int add_constant(gl_register_file file, gl_constant_value values[8],
-int size, int datatype, GLuint *swizzle_out);
+int size, int datatype, uint16_t *swizzle_out);
function_entry *get_function_signature(ir_function_signature *sig);
@@ -556,12 +558,12 @@ public:
void get_deref_offsets(ir_dereference *ir,
unsigned *array_size,
unsigned *base,
- unsigned *index,
+ uint16_t *index,
st_src_reg *reladdr,
bool opaque);
void calc_deref_offsets(ir_dereference *tail,
unsigned *array_elements,
- unsigned *index,
+ uint16_t *index,
st_src_reg *indirect,
unsigned *location);
st_src_reg canonicalize_gather_offset(st_src_reg offset);
@@ -1109,11 +,15 @@ glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
int
glsl_to_tgsi_visitor::add_constant(gl_register_file file,
gl_constant_value values[8], int size, int
datatype,
- GLuint *swizzle_out)
+ uint16_t *swizzle_out)
{
if (file == PROGRAM_CONSTANT) {
- return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
- size, datatype, swizzle_out);
+ GLuint swizzle = swizzle_out ? *swizzle_out : 0;
+ int result = _mesa_add_typed_unnamed_constant(this->prog->Parameters,
values,
+size, datatype, &sw
Mesa (master): st/mesa: disable alpha-test, alpha-to-coverage, alpha-to-one for integer FBs
Module: Mesa
Branch: master
Commit: 54f8efeb022de8686db18c49daf14e6771f0fda1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=54f8efeb022de8686db18c49daf14e6771f0fda1
Author: Marek Olšák
Date: Fri Sep 16 22:39:15 2016 +0200
st/mesa: disable alpha-test, alpha-to-coverage, alpha-to-one for integer FBs
v2: rebased
Reviewed-by: Brian Paul
---
src/mesa/state_tracker/st_atom_blend.c | 3 ++-
src/mesa/state_tracker/st_atom_depth.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_atom_blend.c
b/src/mesa/state_tracker/st_atom_blend.c
index 76d6a644..b8d65bd 100644
--- a/src/mesa/state_tracker/st_atom_blend.c
+++ b/src/mesa/state_tracker/st_atom_blend.c
@@ -266,7 +266,8 @@ update_blend( struct st_context *st )
blend->dither = ctx->Color.DitherFlag;
if (ctx->Multisample.Enabled &&
- ctx->DrawBuffer->Visual.sampleBuffers > 0) {
+ ctx->DrawBuffer->Visual.sampleBuffers > 0 &&
+ !(ctx->DrawBuffer->_IntegerBuffers & 0x1)) {
/* Unlike in gallium/d3d10 these operations are only performed
* if both msaa is enabled and we have a multisample buffer.
*/
diff --git a/src/mesa/state_tracker/st_atom_depth.c
b/src/mesa/state_tracker/st_atom_depth.c
index 267b42c..7092c3f 100644
--- a/src/mesa/state_tracker/st_atom_depth.c
+++ b/src/mesa/state_tracker/st_atom_depth.c
@@ -149,7 +149,8 @@ update_depth_stencil_alpha(struct st_context *st)
}
}
- if (ctx->Color.AlphaEnabled) {
+ if (ctx->Color.AlphaEnabled &&
+ !(ctx->DrawBuffer->_IntegerBuffers & 0x1)) {
dsa->alpha.enabled = 1;
dsa->alpha.func = st_compare_func_to_pipe(ctx->Color.AlphaFunc);
dsa->alpha.ref_value = ctx->Color.AlphaRefUnclamped;
___
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mesa-commit@lists.freedesktop.org
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Mesa (master): glsl_to_tgsi: use array_id for temp arrays instead of hacking high bits
Module: Mesa
Branch: master
Commit: 6980480052c1b260a17f1750eccd2f4a163e27ba
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6980480052c1b260a17f1750eccd2f4a163e27ba
Author: Marek Olšák
Date: Sun Oct 16 23:22:55 2016 +0200
glsl_to_tgsi: use array_id for temp arrays instead of hacking high bits
Reviewed-by: Ilia Mirkin
Reviewed-by: Nicolai Hähnle
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 32 ++
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index f49a873..7adfaaf 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -90,8 +90,9 @@ static int swizzle_for_type(const glsl_type *type, int
component = 0)
class st_src_reg {
public:
st_src_reg(gl_register_file file, int index, const glsl_type *type,
- int component = 0)
+ int component = 0, unsigned array_id = 0)
{
+ assert(file != PROGRAM_ARRAY || array_id != 0);
this->file = file;
this->index = index;
this->swizzle = swizzle_for_type(type, component);
@@ -102,12 +103,13 @@ public:
this->reladdr2 = NULL;
this->has_index2 = false;
this->double_reg2 = false;
- this->array_id = 0;
+ this->array_id = array_id;
this->is_double_vertex_input = false;
}
st_src_reg(gl_register_file file, int index, enum glsl_base_type type)
{
+ assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->type = type;
this->file = file;
this->index = index;
@@ -124,6 +126,7 @@ public:
st_src_reg(gl_register_file file, int index, enum glsl_base_type type, int
index2D)
{
+ assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->type = type;
this->file = file;
this->index = index;
@@ -179,6 +182,7 @@ class st_dst_reg {
public:
st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type,
int index)
{
+ assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->file = file;
this->index = index;
this->index2D = 0;
@@ -192,6 +196,7 @@ public:
st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type)
{
+ assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->file = file;
this->index = 0;
this->index2D = 0;
@@ -296,7 +301,7 @@ public:
unsigned array_id = 0)
: file(file), index(index), component(0), var(var), array_id(array_id)
{
- /* empty */
+ assert(file != PROGRAM_ARRAY || array_id != 0);
}
gl_register_file file;
@@ -1264,7 +1269,8 @@ glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
}
src.file = PROGRAM_ARRAY;
- src.index = next_array << 16 | 0x8000;
+ src.index = 0;
+ src.array_id = next_array + 1;
array_sizes[next_array] = type_size(type);
++next_array;
@@ -1339,7 +1345,8 @@ glsl_to_tgsi_visitor::visit(ir_variable *ir)
dst = st_dst_reg(get_temp(ir->type));
- storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
+ storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index,
+ dst.array_id);
this->variables.push_tail(storage);
}
@@ -2524,7 +2531,8 @@ glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
case ir_var_temporary:
st_src_reg src = get_temp(var->type);
- entry = new(mem_ctx) variable_storage(var, src.file, src.index);
+ entry = new(mem_ctx) variable_storage(var, src.file, src.index,
+ src.array_id);
this->variables.push_tail(entry);
break;
@@ -2536,8 +2544,8 @@ glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
}
}
- this->result = st_src_reg(entry->file, entry->index, var->type,
entry->component);
- this->result.array_id = entry->array_id;
+ this->result = st_src_reg(entry->file, entry->index, var->type,
+ entry->component, entry->array_id);
if (this->shader->Stage == MESA_SHADER_VERTEX && var->data.mode ==
ir_var_shader_in && var->type->is_double())
this->result.is_double_vertex_input = true;
if (!native_integers)
@@ -5527,16 +5535,14 @@ dst_register(struct st_translate *t, gl_register_file
file, unsigned index,
return t->temps[index];
case PROGRAM_ARRAY:
- array = index >> 16;
-
- assert(array < t->num_temp_arrays);
+ assert(array_id && array_id <= t->num_temp_arrays);
+ array = array_id - 1;
if (ureg_dst_is_undef(t->arrays[array]))
t->arrays[array] = ureg_DECL_array_temporary(
t->ureg, t->array_sizes[array], TRUE);
- return ureg_dst_array_offset(t->arrays[array],
- (int)(index & 0x) - 0
Mesa (master): mesa: remove gl_shader_compiler_options::EmitNoNoise
Module: Mesa Branch: master Commit: c64da9d4997692bd25253dfc19e34d6fa335a58b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c64da9d4997692bd25253dfc19e34d6fa335a58b Author: Marek Olšák Date: Mon Oct 17 00:54:35 2016 +0200 mesa: remove gl_shader_compiler_options::EmitNoNoise it's always true Reviewed-by: Ian Romanick Reviewed-by: Nicolai Hähnle --- src/mesa/drivers/dri/i915/i915_context.c | 1 - src/mesa/drivers/dri/i965/brw_compiler.c | 1 - src/mesa/main/mtypes.h | 1 - src/mesa/program/ir_to_mesa.cpp | 3 +-- src/mesa/state_tracker/st_extensions.c | 2 -- 5 files changed, 1 insertion(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c index 83aaf9e..6c48823 100644 --- a/src/mesa/drivers/dri/i915/i915_context.c +++ b/src/mesa/drivers/dri/i915/i915_context.c @@ -260,7 +260,6 @@ i915CreateContext(int api, struct gl_shader_compiler_options *const fs_options = & ctx->Const.ShaderCompilerOptions[MESA_SHADER_FRAGMENT]; fs_options->MaxIfDepth = 0; - fs_options->EmitNoNoise = true; fs_options->EmitNoPow = true; fs_options->EmitNoMainReturn = true; fs_options->EmitNoIndirectInput = true; diff --git a/src/mesa/drivers/dri/i965/brw_compiler.c b/src/mesa/drivers/dri/i965/brw_compiler.c index 86b1eaa..18145be 100644 --- a/src/mesa/drivers/dri/i965/brw_compiler.c +++ b/src/mesa/drivers/dri/i965/brw_compiler.c @@ -123,7 +123,6 @@ brw_compiler_create(void *mem_ctx, const struct gen_device_info *devinfo) compiler->glsl_compiler_options[i].MaxIfDepth = devinfo->gen < 6 ? 16 : UINT_MAX; - compiler->glsl_compiler_options[i].EmitNoNoise = true; compiler->glsl_compiler_options[i].EmitNoMainReturn = true; compiler->glsl_compiler_options[i].EmitNoIndirectInput = true; compiler->glsl_compiler_options[i].EmitNoIndirectUniform = false; diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index ff20226..23a864b 100644 --- a/src/mesa/main/mtypes.h +++ b/src/mesa/main/mtypes.h @@ -2999,7 +2999,6 @@ struct gl_shader_compiler_options GLboolean EmitNoFunctions; GLboolean EmitNoCont; /**< Emit CONT opcode? */ GLboolean EmitNoMainReturn;/**< Emit CONT/RET opcodes? */ - GLboolean EmitNoNoise; /**< Emit NOISE opcodes? */ GLboolean EmitNoPow; /**< Emit POW opcodes? */ GLboolean EmitNoSat; /**< Emit SAT opcodes? */ GLboolean LowerCombinedClipCullDistance; /** Lower gl_ClipDistance and diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index debc18d..bd65df2 100644 --- a/src/mesa/program/ir_to_mesa.cpp +++ b/src/mesa/program/ir_to_mesa.cpp @@ -2997,8 +2997,7 @@ _mesa_ir_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress; -if (options->EmitNoNoise) - progress = lower_noise(ir) || progress; + progress = lower_noise(ir) || progress; /* If there are forms of indirect addressing that the driver * cannot handle, perform the lowering pass. diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c index 6ed00ab..12582c5 100644 --- a/src/mesa/state_tracker/st_extensions.c +++ b/src/mesa/state_tracker/st_extensions.c @@ -263,8 +263,6 @@ void st_init_limits(struct pipe_screen *screen, pc->MediumInt = pc->HighInt = pc->LowInt; } - options->EmitNoNoise = TRUE; - /* TODO: make these more fine-grained if anyone needs it */ options->MaxIfDepth = screen->get_shader_param(screen, sh, ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): docs: add 13.1.0-devel release notes template, bump version
Module: Mesa Branch: master Commit: 1a9b0221bceaf6c5ef710e984ef322db363e4942 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a9b0221bceaf6c5ef710e984ef322db363e4942 Author: Emil Velikov Date: Wed Oct 19 18:46:22 2016 +0100 docs: add 13.1.0-devel release notes template, bump version Signed-off-by: Emil Velikov --- VERSION | 2 +- docs/relnotes/13.1.0.html | 60 +++ 2 files changed, 61 insertions(+), 1 deletion(-) diff --git a/VERSION b/VERSION index 9637d43..a2a3311 100644 --- a/VERSION +++ b/VERSION @@ -1 +1 @@ -12.1.0-devel +13.1.0-devel diff --git a/docs/relnotes/13.1.0.html b/docs/relnotes/13.1.0.html new file mode 100644 index 000..0bbf19d --- /dev/null +++ b/docs/relnotes/13.1.0.html @@ -0,0 +1,60 @@ +http://www.w3.org/TR/html4/loose.dtd";> + + + + Mesa Release Notes + + + + + + The Mesa 3D Graphics Library + + + + + +Mesa 13.1.0 Release Notes / TBD + + +Mesa 13.1.0 is a new development release. +People who are concerned with stability and reliability should stick +with a previous release or wait for Mesa 13.1.1. + + +Mesa 13.1.0 implements the OpenGL 4.4 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.4. OpenGL +4.4 is only available if requested at context creation +because compatibility contexts are not supported. + + + +SHA256 checksums + +TBD. + + + +New features + + +Note: some of the new features are only available with certain drivers. + + + +TBD. + + +Bug fixes + +TBD. + +Changes + +TBD. + + + + ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa: tag 13.0-branchpoint: Mesa 13.0 branchpoint
Module: Mesa Branch: refs/tags/13.0-branchpoint Tag:b255fda6279db3aac0bdf4b47e8e4f9ba6a1640a URL: http://cgit.freedesktop.org/mesa/mesa/tag/?id=b255fda6279db3aac0bdf4b47e8e4f9ba6a1640a Tagger: Emil Velikov Date: Wed Oct 19 19:11:49 2016 +0100 Mesa 13.0 branchpoint ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): docs: rename release notes to 13.0.0
Module: Mesa
Branch: master
Commit: 3ef8d4288aa4e5711f4445f1cacdcf5f65f51ddf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ef8d4288aa4e5711f4445f1cacdcf5f65f51ddf
Author: Emil Velikov
Date: Wed Oct 19 17:33:38 2016 +0100
docs: rename release notes to 13.0.0
Signed-off-by: Emil Velikov
---
docs/relnotes/{12.1.0.html => 13.0.0.html} | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/docs/relnotes/12.1.0.html b/docs/relnotes/13.0.0.html
similarity index 92%
rename from docs/relnotes/12.1.0.html
rename to docs/relnotes/13.0.0.html
index c7e4d01..6a6d38f 100644
--- a/docs/relnotes/12.1.0.html
+++ b/docs/relnotes/13.0.0.html
@@ -14,15 +14,15 @@
-Mesa 12.1.0 Release Notes / TBD
+Mesa 13.0.0 Release Notes / TBD
-Mesa 12.1.0 is a new development release.
+Mesa 13.0.0 is a new development release.
People who are concerned with stability and reliability should stick
-with a previous release or wait for Mesa 12.1.1.
+with a previous release or wait for Mesa 13.0.1.
-Mesa 12.1.0 implements the OpenGL 4.4 API, but the version reported by
+Mesa 13.0.0 implements the OpenGL 4.4 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.4. OpenGL
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Mesa (13.0): Update version to 13.0.0-rc1
Module: Mesa Branch: 13.0 Commit: e45c4586c275b6d47e1c51cb568db644c7c55f61 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e45c4586c275b6d47e1c51cb568db644c7c55f61 Author: Emil Velikov Date: Wed Oct 19 18:40:40 2016 +0100 Update version to 13.0.0-rc1 Signed-off-by: Emil Velikov --- VERSION | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/VERSION b/VERSION index 9637d43..0ee82ac 100644 --- a/VERSION +++ b/VERSION @@ -1 +1 @@ -12.1.0-devel +13.0.0-rc1 ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa: tag mesa-13.0.0-rc1: mesa-13.0.0-rc1
Module: Mesa Branch: refs/tags/mesa-13.0.0-rc1 Tag:6fdb2a935a425365696fbac2468f63a8f10978a4 URL: http://cgit.freedesktop.org/mesa/mesa/tag/?id=6fdb2a935a425365696fbac2468f63a8f10978a4 Tagger: Emil Velikov Date: Wed Oct 19 19:28:59 2016 +0100 mesa-13.0.0-rc1 ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nv50/ir: silent TGSI_PROPERTY_FS_DEPTH_LAYOUT
Module: Mesa Branch: master Commit: 041da0ae81d021b00ae65647338e739664f0d505 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=041da0ae81d021b00ae65647338e739664f0d505 Author: Samuel Pitoiset Date: Tue Oct 18 19:59:27 2016 +0200 nv50/ir: silent TGSI_PROPERTY_FS_DEPTH_LAYOUT Found that information message while replaying a trace from Metro 2033 Redux. Mark that property as useless for now. Signed-off-by: Samuel Pitoiset Reviewed-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index db03281..0c98744 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp @@ -1093,6 +1093,7 @@ void Source::scanProperty(const struct tgsi_full_property *prop) break; case TGSI_PROPERTY_FS_COORD_ORIGIN: case TGSI_PROPERTY_FS_COORD_PIXEL_CENTER: + case TGSI_PROPERTY_FS_DEPTH_LAYOUT: // we don't care break; case TGSI_PROPERTY_VS_PROHIBIT_UCPS: ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): radeonsi: eliminate trivial constant VS outputs
Module: Mesa
Branch: master
Commit: 3ec997d1cc5365413ad9062f412904f944a3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ec997d1cc5365413ad9062f412904f944a3
Author: Marek Olšák
Date: Tue Oct 18 15:20:22 2016 +0200
radeonsi: eliminate trivial constant VS outputs
These constant value VS PARAM exports:
- 0,0,0,0
- 0,0,0,1
- 1,1,1,0
- 1,1,1,1
can be loaded into PS inputs using the DEFAULT_VAL field, and the VS exports
can be removed from the IR to save export & parameter memory.
After LLVM optimizations, analyze the IR to see which exports are equal to
the ones listed above (or undef) and remove them if they are.
Targeted use cases:
- All DX9 eON ports always clear 10 VS outputs to 0.0 even if most of them
are unused by PS (such as Witcher 2 below).
- VS output arrays with unused elements that the GLSL compiler can't
eliminate (such as Batman below).
The shader-db deltas are quite interesting:
(not from upstream si-report.py, it won't be upstreamed)
PERCENTAGE DELTASShaders PARAM exports (affected only)
batman_arkham_origins589 -67.17 %
bioshock-infinite 1769 -0.47 %
dirt-showdown548 -2.68 %
dota2 1747 -3.36 %
f1-2015 776 -4.94 %
left_4_dead_2 1762 -0.07 %
metro_2033_redux2670 -0.43 %
portal 474 -0.22 %
talos_principle 324 -3.63 %
warsow 176 -2.20 %
witcher21040 -73.78 %
All affected 991 -65.37 % ... 9681 -> 3353
Total 26725 -10.82 % ... 58490 -> 52162
v2: treat Undef as both 0 and 1
Reviewed-by: Nicolai Hähnle (v1)
Tested-by: Edmondo Tommasina (v1)
---
src/gallium/drivers/radeonsi/si_shader.c| 160
src/gallium/drivers/radeonsi/si_shader.h| 11 ++
src/gallium/drivers/radeonsi/si_state_shaders.c | 17 ++-
3 files changed, 186 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 6a42a8f..a810d9a 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -6523,6 +6523,159 @@ static void si_init_shader_ctx(struct si_shader_context
*ctx,
bld_base->op_actions[TGSI_OPCODE_BARRIER].emit = si_llvm_emit_barrier;
}
+/* Return true if the PARAM export has been eliminated. */
+static bool si_eliminate_const_output(struct si_shader_context *ctx,
+ LLVMValueRef inst, unsigned offset)
+{
+ struct si_shader *shader = ctx->shader;
+ unsigned num_outputs = shader->selector->info.num_outputs;
+ unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
+ bool is_zero[4] = {}, is_one[4] = {};
+
+ for (i = 0; i < 4; i++) {
+ LLVMBool loses_info;
+ LLVMValueRef p = LLVMGetOperand(inst, 5 + i);
+ if (!LLVMIsConstant(p))
+ return false;
+
+ /* It's a constant expression. Undef outputs are eliminated
too. */
+ if (LLVMIsUndef(p)) {
+ is_zero[i] = true;
+ is_one[i] = true;
+ } else {
+ double a = LLVMConstRealGetDouble(p, &loses_info);
+
+ if (a == 0)
+ is_zero[i] = true;
+ else if (a == 1)
+ is_one[i] = true;
+ else
+ return false; /* other constant */
+ }
+ }
+
+ /* Only certain combinations of 0 and 1 can be eliminated. */
+ if (is_zero[0] && is_zero[1] && is_zero[2])
+ default_val = is_zero[3] ? 0 : 1;
+ else if (is_one[0] && is_one[1] && is_one[2])
+ default_val = is_zero[3] ? 2 : 3;
+ else
+ return false;
+
+ /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
+ LLVMInstructionEraseFromParent(inst);
+
+ /* Change OFFSET to DEFAULT_VAL. */
+ for (i = 0; i < num_outputs; i++) {
+ if (shader->info.vs_output_param_offset[i] == offset) {
+ shader->info.vs_output_param_offset[i] =
+ EXP_PARAM_DEFAULT_VAL_ + default_val;
+ break;
+ }
+ }
+ return true;
+}
+
+struct si_vs_exports {
+ unsigned num;
+ unsigned offset[SI_MAX_VS_OUTPUTS];
+ LLVMValueRef inst[SI_MAX_VS_OUTPUTS];
+};
+
+static void si_eliminate_const_vs_outputs(struct si_shader_context *ctx)
+{
+ struct si_shader *shader = ctx->shader;
+ struct tgsi_shader_info *info = &shader->selector->info;
+ LLVMBasicBlockRef bb;
+ struct si_vs_exports exports;
+ bool removed_any = false;
+
+ exports.num = 0;
+
+ i
Mesa (master): configure.ac: print whether GBM is enabled
Module: Mesa Branch: master Commit: 0e075700fa256c7dacf86cbc91c4a68453cd9558 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e075700fa256c7dacf86cbc91c4a68453cd9558 Author: Marek Olšák Date: Tue Oct 18 23:18:28 2016 +0200 configure.ac: print whether GBM is enabled Reviewed-by: Eric Engestrom Reviewed-by: Emil Velikov --- configure.ac | 5 + 1 file changed, 5 insertions(+) diff --git a/configure.ac b/configure.ac index 7e63bfa..b053311 100644 --- a/configure.ac +++ b/configure.ac @@ -2870,6 +2870,11 @@ if test "$enable_egl" = yes; then echo "EGL drivers:$egl_drivers" fi +if test "x$enable_gbm" = xyes; then +echo "GBM: yes" +else +echo "GBM: no" +fi # Vulkan echo "" ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): configure.ac: enable GBM by default
Module: Mesa Branch: master Commit: 4650a27ba18a5524ca0a9ea3019c35eb2a9c9f43 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4650a27ba18a5524ca0a9ea3019c35eb2a9c9f43 Author: Marek Olšák Date: Tue Oct 18 23:19:58 2016 +0200 configure.ac: enable GBM by default Reviewed-by: Eric Engestrom Reviewed-by: Emil Velikov --- configure.ac | 19 +-- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/configure.ac b/configure.ac index b053311..6f6e388 100644 --- a/configure.ac +++ b/configure.ac @@ -955,9 +955,16 @@ AC_ARG_ENABLE([xa], [enable_xa=no]) AC_ARG_ENABLE([gbm], [AS_HELP_STRING([--enable-gbm], - [enable gbm library @<:@default=auto@:>@])], + [enable gbm library @<:@default=yes except cygwin@:>@])], [enable_gbm="$enableval"], - [enable_gbm=auto]) + [case "$host_os" in + cygwin*) + enable_gbm=no + ;; + *) + enable_gbm=yes + ;; +esac]) AC_ARG_ENABLE([nine], [AS_HELP_STRING([--enable-nine], [enable build of the nine Direct3D9 API @<:@default=no@:>@])], @@ -1755,14 +1762,6 @@ AC_SUBST([OSMESA_PC_LIB_PRIV]) dnl dnl gbm configuration dnl -if test "x$enable_gbm" = xauto; then -case "$with_egl_platforms" in -*drm*) -enable_gbm=yes ;; - *) -enable_gbm=no ;; -esac -fi if test "x$enable_gbm" = xyes; then if test "x$enable_dri" = xyes; then if test "x$enable_shared_glapi" = xno; then ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): configure.ac: enable EGL platform DRM if GBM is enabled
Module: Mesa Branch: master Commit: baed5eab82262bf9b76f5e237ecf21605360d0e3 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=baed5eab82262bf9b76f5e237ecf21605360d0e3 Author: Marek Olšák Date: Tue Oct 18 23:20:29 2016 +0200 configure.ac: enable EGL platform DRM if GBM is enabled since GBM is enabled by default, this is also enabled by default the whitespace changes remove tabs Reviewed-by: Eric Engestrom Reviewed-by: Emil Velikov --- configure.ac | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/configure.ac b/configure.ac index 6f6e388..797c2de 100644 --- a/configure.ac +++ b/configure.ac @@ -2017,9 +2017,13 @@ AC_ARG_WITH([egl-platforms], "x11,drm" @<:@default=auto@:>@])], [with_egl_platforms="$withval"], [if test "x$enable_egl" = xyes; then - with_egl_platforms="x11" +if test "x$enable_gbm" = xyes; then + with_egl_platforms="x11,drm" +else + with_egl_platforms="x11" +fi else - with_egl_platforms="" +with_egl_platforms="" fi]) if test "x$with_egl_platforms" != "x" -a "x$enable_egl" != xyes; then ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nir: Optimize integer division and modulus with 1
Module: Mesa
Branch: master
Commit: 4d35683d91e3d61bf14b76d801bf6ae17237e162
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d35683d91e3d61bf14b76d801bf6ae17237e162
Author: Ian Romanick
Date: Wed Oct 19 08:53:10 2016 -0700
nir: Optimize integer division and modulus with 1
The previous power-of-two rules didn't catch idiv (because i965 doesn't
set lower_idiv) and imod cases. The udiv and umod cases should have
been caught, but I included them for orthogonality.
This fixes silly code observed from compute shaders with local_size_[xy]
= 1.
Signed-off-by: Ian Romanick
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98299
Reviewed-by: Jordan Justen
Reviewed-by: Jason Ekstrand
---
src/compiler/nir/nir_opt_algebraic.py | 4
1 file changed, 4 insertions(+)
diff --git a/src/compiler/nir/nir_opt_algebraic.py
b/src/compiler/nir/nir_opt_algebraic.py
index 2de8050..82d92f4 100644
--- a/src/compiler/nir/nir_opt_algebraic.py
+++ b/src/compiler/nir/nir_opt_algebraic.py
@@ -66,6 +66,10 @@ optimizations = [
(('imul', a, '#b@32(is_pos_power_of_two)'), ('ishl', a, ('find_lsb', b))),
(('imul', a, '#b@32(is_neg_power_of_two)'), ('ineg', ('ishl', a,
('find_lsb', ('iabs', b),
+ (('udiv', a, 1), a),
+ (('idiv', a, 1), a),
+ (('umod', a, 1), 0),
+ (('imod', a, 1), 0),
(('udiv', a, '#b@32(is_pos_power_of_two)'), ('ushr', a, ('find_lsb', b))),
(('idiv', a, '#b@32(is_pos_power_of_two)'), ('imul', ('isign', a), ('ushr',
('iabs', a), ('find_lsb', b))), 'options->lower_idiv'),
(('idiv', a, '#b@32(is_neg_power_of_two)'), ('ineg', ('imul', ('isign', a),
('ushr', ('iabs', a), ('find_lsb', ('iabs', b), 'options->lower_idiv'),
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Mesa (master): nv50/ir: print CCTL subops in debug mode
Module: Mesa
Branch: master
Commit: 03dc87caab25b5c33314ac9ef673fea92c78938e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=03dc87caab25b5c33314ac9ef673fea92c78938e
Author: Samuel Pitoiset
Date: Wed Oct 19 14:01:33 2016 +0200
nv50/ir: print CCTL subops in debug mode
Signed-off-by: Samuel Pitoiset
Reviewed-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
index dbd0f7d..0c143e5 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
@@ -231,6 +231,11 @@ static const char *emitOpStr[] =
"", "restart"
};
+static const char *cctlOpStr[] =
+{
+ "", "", "", "", "", "iv", "ivall"
+};
+
static const char *DataTypeStr[] =
{
"-",
@@ -602,6 +607,10 @@ void Instruction::print() const
if (subOp < ARRAY_SIZE(emitOpStr))
PRINT("%s ", emitOpStr[subOp]);
break;
+ case OP_CCTL:
+ if (subOp < ARRAY_SIZE(cctlOpStr))
+PRINT("%s ", cctlOpStr[subOp]);
+ break;
default:
if (subOp)
PRINT("(SUBOP:%u) ", subOp);
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Mesa (master): nvc0/ir: remove useless NVC0LoweringPass::gMemBase
Module: Mesa
Branch: master
Commit: 974ab614d3b883bf094d4cdbfdb9792df6625f55
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=974ab614d3b883bf094d4cdbfdb9792df6625f55
Author: Samuel Pitoiset
Date: Wed Oct 19 13:02:02 2016 +0200
nvc0/ir: remove useless NVC0LoweringPass::gMemBase
Signed-off-by: Samuel Pitoiset
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 83154c1..7c9fad3 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -598,7 +598,6 @@ NVC0LegalizePostRA::visit(BasicBlock *bb)
NVC0LoweringPass::NVC0LoweringPass(Program *prog) : targ(prog->getTarget())
{
bld.setProgram(prog);
- gMemBase = NULL;
}
bool
@@ -1979,9 +1978,7 @@ NVC0LoweringPass::handleSurfaceOpNVE4(TexInstruction *su)
}
Instruction *red = bld.mkOp(OP_ATOM, su->dType, bld.getSSA());
red->subOp = su->subOp;
- if (!gMemBase)
- gMemBase = bld.mkSymbol(FILE_MEMORY_GLOBAL, 0, TYPE_U32, 0);
- red->setSrc(0, gMemBase);
+ red->setSrc(0, bld.mkSymbol(FILE_MEMORY_GLOBAL, 0, TYPE_U32, 0));
red->setSrc(1, su->getSrc(3));
if (su->subOp == NV50_IR_SUBOP_ATOM_CAS)
red->setSrc(2, su->getSrc(4));
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Mesa (master): nvc0/ir: simplify predicate logic for GK104 atomic operations
Module: Mesa
Branch: master
Commit: 2b6e04e91f6b157dd00872f9a0965c0655e19ad9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b6e04e91f6b157dd00872f9a0965c0655e19ad9
Author: Samuel Pitoiset
Date: Wed Oct 19 13:09:49 2016 +0200
nvc0/ir: simplify predicate logic for GK104 atomic operations
The predicate is always CC_NOT_P as defined in
processSurfaceCoordsNVE4(), so we only want to emit OR.
Signed-off-by: Samuel Pitoiset
Reviewed-by: Ilia Mirkin
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 21 +++--
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 7c9fad3..68f2b15 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -1964,18 +1964,11 @@ NVC0LoweringPass::handleSurfaceOpNVE4(TexInstruction
*su)
convertSurfaceFormat(su);
if (su->op == OP_SUREDB || su->op == OP_SUREDP) {
- Value *pred = su->getSrc(2);
- CondCode cc = CC_NOT_P;
- if (su->getPredicate()) {
- pred = bld.getScratch(1, FILE_PREDICATE);
- cc = su->cc;
- if (cc == CC_NOT_P) {
-bld.mkOp2(OP_OR, TYPE_U8, pred, su->getPredicate(), su->getSrc(2));
- } else {
-bld.mkOp2(OP_AND, TYPE_U8, pred, su->getPredicate(),
su->getSrc(2));
-pred->getInsn()->src(1).mod = Modifier(NV50_IR_MOD_NOT);
- }
- }
+ assert(su->getPredicate());
+ Value *pred =
+ bld.mkOp2v(OP_OR, TYPE_U8, bld.getScratch(1, FILE_PREDICATE),
+su->getPredicate(), su->getSrc(2));
+
Instruction *red = bld.mkOp(OP_ATOM, su->dType, bld.getSSA());
red->subOp = su->subOp;
red->setSrc(0, bld.mkSymbol(FILE_MEMORY_GLOBAL, 0, TYPE_U32, 0));
@@ -1988,8 +1981,8 @@ NVC0LoweringPass::handleSurfaceOpNVE4(TexInstruction *su)
// performed
Instruction *mov = bld.mkMov(bld.getSSA(), bld.loadImm(NULL, 0));
- assert(cc == CC_NOT_P);
- red->setPredicate(cc, pred);
+ assert(su->cc == CC_NOT_P);
+ red->setPredicate(su->cc, pred);
mov->setPredicate(CC_P, pred);
bld.mkOp2(OP_UNION, TYPE_U32, su->getDef(0),
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Mesa (master): mesa: remove unused LocalSizeVariable
Module: Mesa Branch: master Commit: 740a8fa1e214bafef1641336c90f09cb4ed0c415 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=740a8fa1e214bafef1641336c90f09cb4ed0c415 Author: Timothy Arceri Date: Wed Oct 19 10:51:48 2016 +1100 mesa: remove unused LocalSizeVariable Reviewed-by: Samuel Pitoiset --- src/mesa/main/mtypes.h| 5 - src/mesa/main/shaderapi.c | 1 - 2 files changed, 6 deletions(-) diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index 23a864b..88397b9 100644 --- a/src/mesa/main/mtypes.h +++ b/src/mesa/main/mtypes.h @@ -2078,11 +2078,6 @@ struct gl_compute_program * Size of shared variables accessed by the compute shader. */ unsigned SharedSize; - - /** -* Whether a variable work group size has been specified. -*/ - bool LocalSizeVariable; }; diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c index c40bb2d..1af1c3f 100644 --- a/src/mesa/main/shaderapi.c +++ b/src/mesa/main/shaderapi.c @@ -2212,7 +2212,6 @@ _mesa_copy_linked_program_data(gl_shader_stage type, for (i = 0; i < 3; i++) dst_cp->LocalSize[i] = src->Comp.LocalSize[i]; dst_cp->SharedSize = src->Comp.SharedSize; - dst_cp->LocalSizeVariable = src->Comp.LocalSizeVariable; break; } default: ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i965/cs: Use udiv/umod for local IDs
Module: Mesa Branch: master Commit: 1fa000a33b010436ac3bf4b3c8da2974d3788382 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1fa000a33b010436ac3bf4b3c8da2974d3788382 Author: Jordan Justen Date: Wed Oct 19 10:25:21 2016 -0700 i965/cs: Use udiv/umod for local IDs This allows for more optimizations relating to power-of-two divisions. Signed-off-by: Jordan Justen Reviewed-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_nir_intrinsics.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c b/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c index 059d14d..9ae161f 100644 --- a/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c +++ b/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c @@ -116,7 +116,7 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state, uvec3.u32[2] = size[2]; nir_ssa_def *mod_val = nir_build_imm(b, 3, 32, uvec3); - sysval = nir_imod(b, nir_idiv(b, local_index, div_val), mod_val); + sysval = nir_umod(b, nir_udiv(b, local_index, div_val), mod_val); break; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i965/cs: Don' t use a thread channel ID for small local sizes
Module: Mesa
Branch: master
Commit: 64c3d735354932c3b14397e9c292f5989a9da710
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=64c3d735354932c3b14397e9c292f5989a9da710
Author: Jordan Justen
Date: Wed Jul 6 15:08:27 2016 -0700
i965/cs: Don't use a thread channel ID for small local sizes
When the local group size is 8 or less, we will execute the program at
most 1 time. Therefore, the local channel ID will always be 0. By
using a constant 0 in this case we can prevent using push constant
data.
This is not expected to be common a occurance in real applications,
but it has been seen in tests.
We could extend this optimization to 16 and 32 for SIMD16 and SIMD32,
but it gets a bit more complicated, because this optimization is
currently being done early on, before we have decided the SIMD size.
Signed-off-by: Jordan Justen
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_nir_intrinsics.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c
b/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c
index 9ae161f..d63570f 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c
+++ b/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c
@@ -39,12 +39,21 @@ struct lower_intrinsics_state {
static nir_ssa_def *
read_thread_local_id(struct lower_intrinsics_state *state)
{
+ nir_builder *b = &state->builder;
+ nir_shader *nir = state->nir;
+ const unsigned *sizes = nir->info.cs.local_size;
+ const unsigned group_size = sizes[0] * sizes[1] * sizes[2];
+
+ /* Some programs have local_size dimensions so small that the thread local
+* ID will always be 0.
+*/
+ if (group_size <= 8)
+ return nir_imm_int(b, 0);
+
assert(state->cs_prog_data->thread_local_id_index >= 0);
state->cs_thread_id_used = true;
const int id_index = state->cs_prog_data->thread_local_id_index;
- nir_builder *b = &state->builder;
- nir_shader *nir = state->nir;
nir_intrinsic_instr *load =
nir_intrinsic_instr_create(nir, nir_intrinsic_load_uniform);
load->num_components = 1;
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Mesa (master): radv: use emit_icmp for samples_identical
Module: Mesa Branch: master Commit: d842546ad1ebdb4825f0cbca2d68a56139d88e2a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d842546ad1ebdb4825f0cbca2d68a56139d88e2a Author: Dave Airlie Date: Thu Oct 20 01:42:22 2016 +0100 radv: use emit_icmp for samples_identical On a debug llvm build we'd assert on the next compare when the return from samples_identical was i1 instead of i32. Cc: "13.0" Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index e2f6bca..08dac80 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -3412,7 +3412,7 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr) result = build_tex_intrinsic(ctx, instr, &txf_info); result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, ""); - result = LLVMBuildICmp(ctx->builder, LLVMIntEQ, result, ctx->i32zero, ""); + result = emit_int_cmp(ctx, LLVMIntEQ, result, ctx->i32zero); goto write_result; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): anv: drop unused zero macro.
Module: Mesa Branch: master Commit: b0f131b0bf1d3f4eb5943d5485bbed170844c727 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0f131b0bf1d3f4eb5943d5485bbed170844c727 Author: Dave Airlie Date: Wed Oct 19 13:36:23 2016 +1000 anv: drop unused zero macro. I can't see this being used anywhere. Reviewed-by: Jason Ekstrand Signed-off-by: Dave Airlie --- src/intel/vulkan/anv_private.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 0e25827..3fe9d7d 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -163,8 +163,6 @@ anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask) memcpy((dest), (src), (count) * sizeof(*(src))); \ }) -#define zero(x) (memset(&(x), 0, sizeof(x))) - /* Define no kernel as 1, since that's an illegal offset for a kernel */ #define NO_KERNEL 1 ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): wsi/wayland: fix error path
Module: Mesa
Branch: master
Commit: 8bf7717e1f84d180f42fb665772878d3b6d27459
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8bf7717e1f84d180f42fb665772878d3b6d27459
Author: Eric Engestrom
Date: Thu Oct 20 00:09:11 2016 +0100
wsi/wayland: fix error path
Fixes: 1720bbd353d87412754f ("anv/wsi: split image alloc/free out to separate
fns.")
Cc: "13.0"
Signed-off-by: Eric Engestrom
Signed-off-by: Dave Airlie
---
src/vulkan/wsi/wsi_common_wayland.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/vulkan/wsi/wsi_common_wayland.c
b/src/vulkan/wsi/wsi_common_wayland.c
index 32a0a51..fc13bde 100644
--- a/src/vulkan/wsi/wsi_common_wayland.c
+++ b/src/vulkan/wsi/wsi_common_wayland.c
@@ -635,11 +635,15 @@ wsi_wl_image_init(struct wsi_wl_swapchain *chain,
wl_display_roundtrip(chain->display->display);
close(fd);
+ if (!image->buffer)
+ goto fail_image;
+
wl_proxy_set_queue((struct wl_proxy *)image->buffer, chain->queue);
wl_buffer_add_listener(image->buffer, &buffer_listener, image);
return VK_SUCCESS;
+fail_image:
chain->base.image_fns->free_wsi_image(vk_device, pAllocator,
image->image, image->memory);
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Mesa (master): nv50/ir: process texture offset sources as regular sources
Module: Mesa
Branch: master
Commit: cd45d758ff87305ceecca899fe7325779bb6755b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd45d758ff87305ceecca899fe7325779bb6755b
Author: Ilia Mirkin
Date: Wed Oct 19 01:20:03 2016 -0400
nv50/ir: process texture offset sources as regular sources
With ARB_gpu_shader5, texture offsets can be any source, including TEMPs
and IN's. Make sure to process them as regular sources so that we pick
up masks, etc.
This should fix some CTS tests that feed offsets directly to
textureGatherOffset, and we were not picking up the input use, thus not
advertising it in the shader header.
Signed-off-by: Ilia Mirkin
Reviewed-by: Samuel Pitoiset
Tested-by: Dave Airlie
Cc: 12.0 13.0
---
.../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 147 +
1 file changed, 94 insertions(+), 53 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 0c98744..3e4f26c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -182,6 +182,7 @@ public:
// mask of used components of source s
unsigned int srcMask(unsigned int s) const;
+ unsigned int texOffsetMask() const;
SrcRegister getSrc(unsigned int s) const
{
@@ -234,6 +235,35 @@ private:
const struct tgsi_full_instruction *insn;
};
+unsigned int Instruction::texOffsetMask() const
+{
+ const struct tgsi_instruction_texture *tex = &insn->Texture;
+ assert(insn->Instruction.Texture);
+
+ switch (tex->Texture) {
+ case TGSI_TEXTURE_BUFFER:
+ case TGSI_TEXTURE_1D:
+ case TGSI_TEXTURE_SHADOW1D:
+ case TGSI_TEXTURE_1D_ARRAY:
+ case TGSI_TEXTURE_SHADOW1D_ARRAY:
+ return 0x1;
+ case TGSI_TEXTURE_2D:
+ case TGSI_TEXTURE_SHADOW2D:
+ case TGSI_TEXTURE_2D_ARRAY:
+ case TGSI_TEXTURE_SHADOW2D_ARRAY:
+ case TGSI_TEXTURE_RECT:
+ case TGSI_TEXTURE_SHADOWRECT:
+ case TGSI_TEXTURE_2D_MSAA:
+ case TGSI_TEXTURE_2D_ARRAY_MSAA:
+ return 0x3;
+ case TGSI_TEXTURE_3D:
+ return 0x7;
+ default:
+ assert(!"Unexpected texture target");
+ return 0xf;
+ }
+}
+
unsigned int Instruction::srcMask(unsigned int s) const
{
unsigned int mask = insn->Dst[0].Register.WriteMask;
@@ -955,6 +985,9 @@ private:
int inferSysValDirection(unsigned sn) const;
bool scanDeclaration(const struct tgsi_full_declaration *);
bool scanInstruction(const struct tgsi_full_instruction *);
+ void scanInstructionSrc(const Instruction& insn,
+ const Instruction::SrcRegister& src,
+ unsigned mask);
void scanProperty(const struct tgsi_full_property *);
void scanImmediate(const struct tgsi_full_immediate *);
@@ -1365,6 +1398,61 @@ inline bool Source::isEdgeFlagPassthrough(const
Instruction& insn) const
insn.getSrc(0).getFile() == TGSI_FILE_INPUT;
}
+void Source::scanInstructionSrc(const Instruction& insn,
+const Instruction::SrcRegister& src,
+unsigned mask)
+{
+ if (src.getFile() == TGSI_FILE_TEMPORARY) {
+ if (src.isIndirect(0))
+ indirectTempArrays.insert(src.getArrayId());
+ } else
+ if (src.getFile() == TGSI_FILE_BUFFER ||
+ src.getFile() == TGSI_FILE_IMAGE ||
+ (src.getFile() == TGSI_FILE_MEMORY &&
+memoryFiles[src.getIndex(0)].mem_type == TGSI_MEMORY_TYPE_GLOBAL)) {
+ info->io.globalAccess |= (insn.getOpcode() == TGSI_OPCODE_LOAD) ?
+ 0x1 : 0x2;
+ } else
+ if (src.getFile() == TGSI_FILE_OUTPUT) {
+ if (src.isIndirect(0)) {
+ // We don't know which one is accessed, just mark everything for
+ // reading. This is an extremely unlikely occurrence.
+ for (unsigned i = 0; i < info->numOutputs; ++i)
+info->out[i].oread = 1;
+ } else {
+ info->out[src.getIndex(0)].oread = 1;
+ }
+ }
+ if (src.getFile() != TGSI_FILE_INPUT)
+ return;
+
+ if (src.isIndirect(0)) {
+ for (unsigned i = 0; i < info->numInputs; ++i)
+ info->in[i].mask = 0xf;
+ } else {
+ const int i = src.getIndex(0);
+ for (unsigned c = 0; c < 4; ++c) {
+ if (!(mask & (1 << c)))
+continue;
+ int k = src.getSwizzle(c);
+ if (k <= TGSI_SWIZZLE_W)
+info->in[i].mask |= 1 << k;
+ }
+ switch (info->in[i].sn) {
+ case TGSI_SEMANTIC_PSIZE:
+ case TGSI_SEMANTIC_PRIMID:
+ case TGSI_SEMANTIC_FOG:
+ info->in[i].mask &= 0x1;
+ break;
+ case TGSI_SEMANTIC_PCOORD:
+ info->in[i].mask &= 0x3;
+ break;
+ default:
+ break;
+ }
+ }
+}
+
bool Source::scanInstruction(const struct tgsi_full_instruction *inst)
{
Instruction insn(inst);
@@ -1397,66 +1485,19 @@ bool Source::scanInstruction(const struct
tgsi_full_instruction *inst)
indi
Mesa (master): nv50,nvc0: avoid reading out of bounds when getting bogus so info
Module: Mesa
Branch: master
Commit: 313fba5ee1de9416930e45da8aff63a24763940b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=313fba5ee1de9416930e45da8aff63a24763940b
Author: Ilia Mirkin
Date: Wed Oct 19 00:05:26 2016 -0400
nv50,nvc0: avoid reading out of bounds when getting bogus so info
The state tracker tries to attach the info to the wrong shader. This is
easy enough to protect against.
Signed-off-by: Ilia Mirkin
Reviewed-by: Samuel Pitoiset
Cc: 12.0 13.0
---
src/gallium/drivers/nouveau/nv50/nv50_program.c | 3 +++
src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 7 +--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_program.c
b/src/gallium/drivers/nouveau/nv50/nv50_program.c
index 2b66877..ea5febd 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_program.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_program.c
@@ -307,6 +307,9 @@ nv50_program_create_strmout_state(const struct
nv50_ir_prog_info *info,
const unsigned r = pso->output[i].register_index;
b = pso->output[i].output_buffer;
+ if (r >= info->numOutputs)
+ continue;
+
for (c = 0; c < pso->output[i].num_components; ++c)
so->map[base[b] + p + c] = info->out[r].slot[s + c];
}
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index f52cbd2..a4a164f 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -509,11 +509,14 @@ nvc0_program_create_tfb_state(const struct
nv50_ir_prog_info *info,
for (i = 0; i < pso->num_outputs; ++i) {
unsigned s = pso->output[i].start_component;
unsigned p = pso->output[i].dst_offset;
+ const unsigned r = pso->output[i].register_index;
b = pso->output[i].output_buffer;
+ if (r >= info->numOutputs)
+ continue;
+
for (c = 0; c < pso->output[i].num_components; ++c)
- tfb->varying_index[b][p++] =
-info->out[pso->output[i].register_index].slot[s + c];
+ tfb->varying_index[b][p++] = info->out[r].slot[s + c];
tfb->varying_count[b] = MAX2(tfb->varying_count[b], p);
tfb->stream[b] = pso->output[i].stream;
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Mesa (master): glsl: Indirect array indexing on non-last SSBO member must fail compilation
Module: Mesa
Branch: master
Commit: 3da08e166415a745139c1127040a24e8a45dc553
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3da08e166415a745139c1127040a24e8a45dc553
Author: Iago Toral Quiroga
Date: Tue Oct 18 14:15:36 2016 +0200
glsl: Indirect array indexing on non-last SSBO member must fail compilation
After the changes in comit 5b2675093e863a52, we moved this check to the
linker, but the spec expects this to be checked at compile-time. There are
dEQP tests that expect an error at compile time and the spec seems to confirm
that expectation:
"Except for the last declared member of a shader storage block (section 4.3.9
“Interface Blocks”), the size of an array must be declared (explicitly sized)
before it is indexed with anything other than an integral constant expression.
The size of any array must be declared before passing it as an argument to a
function. Violation of any of these rules result in compile-time errors. It
is legal to declare an array without a size (unsized) and then later
redeclare the same name as an array of the same type and specify a size, or
index it only with integral constant expressions (implicitly sized)."
Commit 5b2675093e863a52 tries to take care of the case where we have implicitly
sized arrays in SSBOs and it does so by checking the max_array_access field
in ir_variable during linking. In this patch we change the approach: we look
for indirect access on SSBO arrays, and when we find one, we emit a
compile-time error if the accessed member is not the last in the SSBO
definition.
There is a corner case that the specs do not address directly though and that
dEQP checks for: the case of an unsized array in an SSBO definition that is
not defined last but is never used in the shader code either. The following
dEQP tests expect a compile-time error in this scenario:
dEQP-GLES31.functional.debug.negative_coverage.callbacks.shader.compile_compute_shader
dEQP-GLES31.functional.debug.negative_coverage.get_error.shader.compile_compute_shader
dEQP-GLES31.functional.debug.negative_coverage.log.shader.compile_compute_shader
However, since the unsized array is never used it is never indexed with a
non-constant expression, so by the spec quotation above, it should be valid and
the tests are probably incorrect.
Reviewed-by: Nicolai Hähnle
---
src/compiler/glsl/ast_array_index.cpp | 14 ++
src/compiler/glsl/link_uniform_blocks.cpp | 8 +---
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/src/compiler/glsl/ast_array_index.cpp
b/src/compiler/glsl/ast_array_index.cpp
index e29dafb..dfa44b7 100644
--- a/src/compiler/glsl/ast_array_index.cpp
+++ b/src/compiler/glsl/ast_array_index.cpp
@@ -233,6 +233,20 @@ _mesa_ast_array_index_to_hir(void *mem_ctx,
else if (array->variable_referenced()->data.mode !=
ir_var_shader_storage) {
_mesa_glsl_error(&loc, state, "unsized array index must be
constant");
+ } else {
+/* Unsized array non-constant indexing on SSBO is allowed only for
+ * the last member of the SSBO definition.
+ */
+ir_variable *var = array->variable_referenced();
+const glsl_type *iface_type = var->get_interface_type();
+int field_index = iface_type->field_index(var->name);
+/* Field index can be < 0 for instance arrays */
+if (field_index >= 0 &&
+field_index != (int) iface_type->length - 1) {
+ _mesa_glsl_error(&loc, state, "Indirect access on unsized "
+"array is limited to the last member of "
+"SSBO.");
+}
}
} else if (array->type->without_array()->is_interface()
&& ((array->variable_referenced()->data.mode == ir_var_uniform
diff --git a/src/compiler/glsl/link_uniform_blocks.cpp
b/src/compiler/glsl/link_uniform_blocks.cpp
index 5b0dff6..bb423c5 100644
--- a/src/compiler/glsl/link_uniform_blocks.cpp
+++ b/src/compiler/glsl/link_uniform_blocks.cpp
@@ -150,13 +150,7 @@ private:
*/
const glsl_type *type_for_size = type;
if (type->is_unsized_array()) {
- if (!last_field) {
-linker_error(prog, "unsized array `%s' definition: "
- "only last member of a shader storage block "
- "can be defined as unsized array",
- name);
- }
-
+ assert(last_field);
type_for_size = type->without_array();
}
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