Mesa (master): android: correct typo in build

2017-01-19 Thread Tapani Pälli
Module: Mesa
Branch: master
Commit: 4148881513b1cba6d4737803cc903546e59d5b91
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4148881513b1cba6d4737803cc903546e59d5b91

Author: Tapani Pälli 
Date:   Thu Jan 19 09:10:34 2017 +0200

android: correct typo in build

Fixes: 63c58dfc653c499aab5b8d0ea07f1dc1af88c856
Signed-off-by: Tapani Pälli 
Reviewed-by: Emil Velikov 

---

 Android.common.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Android.common.mk b/Android.common.mk
index a75d4e7..30166a6 100644
--- a/Android.common.mk
+++ b/Android.common.mk
@@ -52,7 +52,7 @@ LOCAL_CFLAGS += \
-DHAVE_FUNC_ATTRIBUTE_UNUSED \
-DHAVE_FUNC_ATTRIBUTE_FORMAT \
-DHAVE_FUNC_ATTRIBUTE_PACKED \
-   _DHAVE_FUNC_ATTRIBUTE_ALIAS \
+   -DHAVE_FUNC_ATTRIBUTE_ALIAS \
-DHAVE___BUILTIN_CTZ \
-DHAVE___BUILTIN_POPCOUNT \
-DHAVE___BUILTIN_POPCOUNTLL \

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Mesa (master): nir: add min/max optimisation

2017-01-19 Thread Jason Ekstrand
Module: Mesa
Branch: master
Commit: 9fdaeb7776c51e45646502ce4b6420a9652cd824
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9fdaeb7776c51e45646502ce4b6420a9652cd824

Author: Elie TOURNIER 
Date:   Wed Jan 18 11:23:22 2017 +

nir: add min/max optimisation

Add the following optimisations:

min(x, -x) = -abs(x)
min(x, -abs(x)) = -abs(x)
min(x, abs(x)) = x
max(x, -abs(x)) = x
max(x, abs(x)) = abs(x)
max(x, -x) = abs(x)

shader-db:

total instructions in shared programs: 13067779 -> 13067775 (-0.00%)
instructions in affected programs: 249 -> 245 (-1.61%)
helped: 4
HURT: 0

total cycles in shared programs: 252054838 -> 252054806 (-0.00%)
cycles in affected programs: 504 -> 472 (-6.35%)
helped: 2
HURT: 0

Signed-off-by: Elie Tournier 
Reviewed-by: Plamena Manolova 
Reviewed-by: Jason Ekstrand 

---

 src/compiler/nir/nir_opt_algebraic.py | 12 
 1 file changed, 12 insertions(+)

diff --git a/src/compiler/nir/nir_opt_algebraic.py 
b/src/compiler/nir/nir_opt_algebraic.py
index d7ad1f2..6893800 100644
--- a/src/compiler/nir/nir_opt_algebraic.py
+++ b/src/compiler/nir/nir_opt_algebraic.py
@@ -171,6 +171,18 @@ optimizations = [
(('imax', a, a), a),
(('umin', a, a), a),
(('umax', a, a), a),
+   (('fmin', a, ('fneg', a)), ('fneg', ('fabs', a))),
+   (('imin', a, ('ineg', a)), ('ineg', ('iabs', a))),
+   (('fmin', a, ('fneg', ('fabs', a))), ('fneg', ('fabs', a))),
+   (('imin', a, ('ineg', ('iabs', a))), ('ineg', ('iabs', a))),
+   (('fmin', a, ('fabs', a)), a),
+   (('imin', a, ('iabs', a)), a),
+   (('fmax', a, ('fneg', ('fabs', a))), a),
+   (('imax', a, ('ineg', ('iabs', a))), a),
+   (('fmax', a, ('fabs', a)), ('fabs', a)),
+   (('imax', a, ('iabs', a)), ('iabs', a)),
+   (('fmax', a, ('fneg', a)), ('fabs', a)),
+   (('imax', a, ('ineg', a)), ('iabs', a)),
(('~fmin', ('fmax', a, 0.0), 1.0), ('fsat', a), '!options->lower_fsat'),
(('~fmax', ('fmin', a, 1.0), 0.0), ('fsat', a), '!options->lower_fsat'),
(('fsat', a), ('fmin', ('fmax', a, 0.0), 1.0), 'options->lower_fsat'),

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Mesa (master): nir: add min/max optimisation

2017-01-19 Thread Jason Ekstrand
Module: Mesa
Branch: master
Commit: 1f6ce4248d7e6be92bca04ef582f1b5cd5889a20
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f6ce4248d7e6be92bca04ef582f1b5cd5889a20

Author: Elie TOURNIER 
Date:   Wed Jan 18 11:23:22 2017 +

nir: add min/max optimisation

Add the following optimisations:

min(x, -x) = -abs(x)
min(x, -abs(x)) = -abs(x)
min(x, abs(x)) = x
max(x, -abs(x)) = x
max(x, abs(x)) = abs(x)
max(x, -x) = abs(x)

shader-db:

total instructions in shared programs: 13067779 -> 13067775 (-0.00%)
instructions in affected programs: 249 -> 245 (-1.61%)
helped: 4
HURT: 0

total cycles in shared programs: 252054838 -> 252054806 (-0.00%)
cycles in affected programs: 504 -> 472 (-6.35%)
helped: 2
HURT: 0

Signed-off-by: Elie Tournier 
Reviewed-by: Plamena Manolova lower_fsat'),
(('~fmax', ('fmin', a, 1.0), 0.0), ('fsat', a), '!options->lower_fsat'),
(('fsat', a), ('fmin', ('fmax', a, 0.0), 1.0), 'options->lower_fsat'),

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Mesa (master): nir/algebraic: Only include nir_search_helpers once

2017-01-19 Thread Jason Ekstrand
Module: Mesa
Branch: master
Commit: f22ee14644143b5edeed7f345b93fb361c16c71b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f22ee14644143b5edeed7f345b93fb361c16c71b

Author: Jason Ekstrand 
Date:   Wed Jan 18 09:21:07 2017 -0800

nir/algebraic: Only include nir_search_helpers once

We were including it once per value, so probably around 10k times.
Let's not cause the compiler any more work than we have to.

Reviewed-by: Iago Toral Quiroga 

---

 src/compiler/nir/nir_algebraic.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/compiler/nir/nir_algebraic.py 
b/src/compiler/nir/nir_algebraic.py
index b0fa9e7..8c7fbc8 100644
--- a/src/compiler/nir/nir_algebraic.py
+++ b/src/compiler/nir/nir_algebraic.py
@@ -76,7 +76,6 @@ class Value(object):
  return Constant(val, name_base)
 
__template = mako.template.Template("""
-#include "compiler/nir/nir_search_helpers.h"
 static const ${val.c_type} ${val.name} = {
{ ${val.type_enum}, ${val.bit_size} },
 % if isinstance(val, Constant):
@@ -500,6 +499,7 @@ class SearchAndReplace(object):
 _algebraic_pass_template = mako.template.Template("""
 #include "nir.h"
 #include "nir_search.h"
+#include "nir_search_helpers.h"
 
 #ifndef NIR_OPT_ALGEBRAIC_STRUCT_DEFS
 #define NIR_OPT_ALGEBRAIC_STRUCT_DEFS

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Mesa (master): i965: Fix indentation in brw_miptree_layout_2d()

2017-01-19 Thread Anuj Phogat
Module: Mesa
Branch: master
Commit: c7e37a0cb8d46cde4e6ea1c7bb0d8e517995c726
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7e37a0cb8d46cde4e6ea1c7bb0d8e517995c726

Author: Anuj Phogat 
Date:   Tue Jan 10 14:03:58 2017 -0800

i965: Fix indentation in brw_miptree_layout_2d()

Signed-off-by: Anuj Phogat 
Reviewed-by: Alejandro Piñeiro 

---

 src/mesa/drivers/dri/i965/brw_tex_layout.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c 
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index bf8c338..2f4837e 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -322,9 +322,8 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
  minify(mt->physical_width0, 2);
}
 
-   if (mip1_width > mt->total_width) {
-   mt->total_width = mip1_width;
-   }
+  if (mip1_width > mt->total_width)
+ mt->total_width = mip1_width;
}
 
mt->total_width /= bw;

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Mesa (master): i965: Remove unnecessary mt->compressed checks

2017-01-19 Thread Anuj Phogat
Module: Mesa
Branch: master
Commit: 6de293284bff2d2f8e5b08ea21fc1e2ed68a181f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6de293284bff2d2f8e5b08ea21fc1e2ed68a181f

Author: Anuj Phogat 
Date:   Tue Jan 10 14:04:19 2017 -0800

i965: Remove unnecessary mt->compressed checks

It's harmless to use ALIGN_NPOT() for uncompressed formats
because they have block width/height = 1.

Signed-off-by: Anuj Phogat 
Reviewed-by: Alejandro Piñeiro 

---

 src/mesa/drivers/dri/i965/brw_tex_layout.c | 16 
 1 file changed, 4 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c 
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 2f4837e..684ae76 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -302,9 +302,7 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
_mesa_get_format_block_size(mt->format, &bw, &bh);
 
mt->total_width = mt->physical_width0;
-
-   if (mt->compressed)
-   mt->total_width = ALIGN_NPOT(mt->total_width, bw);
+   mt->total_width = ALIGN_NPOT(mt->total_width, bw);
 
/* May need to adjust width to accommodate the placement of
 * the 2nd mipmap.  This occurs when the alignment
@@ -314,13 +312,8 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
if (mt->first_level != mt->last_level) {
unsigned mip1_width;
 
-   if (mt->compressed) {
-  mip1_width = ALIGN_NPOT(minify(mt->physical_width0, 1), mt->halign) +
- ALIGN_NPOT(minify(mt->physical_width0, 2), bw);
-   } else {
-  mip1_width = ALIGN_NPOT(minify(mt->physical_width0, 1), mt->halign) +
- minify(mt->physical_width0, 2);
-   }
+  mip1_width = ALIGN_NPOT(minify(mt->physical_width0, 1), mt->halign) +
+   ALIGN_NPOT(minify(mt->physical_width0, 2), bw);
 
   if (mip1_width > mt->total_width)
  mt->total_width = mip1_width;
@@ -335,8 +328,7 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
   intel_miptree_set_level_info(mt, level, x, y, depth);
 
   img_height = ALIGN_NPOT(height, mt->valign);
-  if (mt->compressed)
-img_height /= bh;
+  img_height /= bh;
 
   if (mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
  /* Compact arrays with separated miplevels */

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Mesa (master): i965: Fix comment to include 3d textures

2017-01-19 Thread Anuj Phogat
Module: Mesa
Branch: master
Commit: 47d9b3a9dd811ae9c4733d1b0ccdd3eedc7a1b97
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=47d9b3a9dd811ae9c4733d1b0ccdd3eedc7a1b97

Author: Anuj Phogat 
Date:   Tue Jan 10 14:01:00 2017 -0800

i965: Fix comment to include 3d textures

Signed-off-by: Anuj Phogat 
Reviewed-by: Alejandro Piñeiro 

---

 src/mesa/drivers/dri/i965/brw_tex_layout.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c 
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 768f8a8..bf8c338 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -295,7 +295,8 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
unsigned y = 0;
unsigned width = mt->physical_width0;
unsigned height = mt->physical_height0;
-   unsigned depth = mt->physical_depth0; /* number of array layers. */
+   /* Number of layers of array texture or slices of 3d texture (gen9+). */
+   unsigned depth = mt->physical_depth0;
unsigned int bw, bh;
 
_mesa_get_format_block_size(mt->format, &bw, &bh);

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Mesa (master): i965: Delete pending CCS and HiZ ops in intel_miptree_make_shareable()

2017-01-19 Thread Chad Versace
Module: Mesa
Branch: master
Commit: de0b0a3a9cfd25ac5082223322002710a23da8ab
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de0b0a3a9cfd25ac5082223322002710a23da8ab

Author: Chad Versace 
Date:   Wed Jan  4 12:33:56 2017 -0800

i965: Delete pending CCS and HiZ ops in intel_miptree_make_shareable()

Fixes crash in piglit
`egl_khr_gl_renderbuffer_image-clear-shared-image GL_DEPTH_COMPONENT24`
on Skylake.

The crash happened because blorp attempted to execute a pending hiz
clear after the hiz buffer was deleted. Deleting the pending hiz ops
when the hiz buffer gets deleted fixes the crash.

For good measure, this patch also deletes all pending CCS/MCS ops when
the CCS/MCS buffer gets deleted. I'm now aware of any bugs
caused by the dangling ops, but deleting them is clearly the right thing
to do.

Cc: Ben Widawsky 
Reviewed-by: Jason Ekstrand 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99265

---

 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 25f8f39..ed51423 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2338,6 +2338,12 @@ intel_miptree_make_shareable(struct brw_context *brw,
   drm_intel_bo_unreference(mt->mcs_buf->bo);
   free(mt->mcs_buf);
   mt->mcs_buf = NULL;
+
+  /* Any pending MCS/CCS operations are no longer needed. Trying to
+   * execute any will likely crash due to the missing aux buffer. So let's
+   * delete all pending ops.
+   */
+  exec_list_make_empty(&mt->color_resolve_map);
}
 
if (mt->hiz_buf) {
@@ -2345,6 +2351,16 @@ intel_miptree_make_shareable(struct brw_context *brw,
   intel_miptree_all_slices_resolve_depth(brw, mt);
   intel_miptree_hiz_buffer_free(mt->hiz_buf);
   mt->hiz_buf = NULL;
+
+  for (uint32_t l = mt->first_level; l <= mt->last_level; ++l) {
+ mt->level[l].has_hiz = false;
+  }
+
+  /* Any pending HiZ operations are no longer needed. Trying to execute
+   * any will likely crash due to the missing aux buffer. So let's delete
+   * all pending ops.
+   */
+  exec_list_make_empty(&mt->hiz_map);
}
 }
 

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Mesa (master): vulkan/wsi: clarify the severity of lack of DRI3 v2

2017-01-19 Thread Emil Velikov
Module: Mesa
Branch: master
Commit: e0674e740bf84085dec898ffd87bdeb2027e620f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0674e740bf84085dec898ffd87bdeb2027e620f

Author: Andres Rodriguez 
Date:   Wed Jan 18 18:07:56 2017 -0500

vulkan/wsi: clarify the severity of lack of DRI3 v2

The current message sounds like a small warning, clarify that it can
result in lack of presentation support and application crashes.

v2: add "if they do" (Bas)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98263
Signed-off-by: Andres Rodriguez 
Acked-by: Jason ekstrand 
Acked-by: Bas Nieuwenhuizen 
Reviewed-by: Emil Velikov 

---

 src/vulkan/wsi/wsi_common_x11.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/vulkan/wsi/wsi_common_x11.c b/src/vulkan/wsi/wsi_common_x11.c
index 158446c..f6cc056 100644
--- a/src/vulkan/wsi/wsi_common_x11.c
+++ b/src/vulkan/wsi/wsi_common_x11.c
@@ -265,7 +265,8 @@ VkBool32 wsi_get_physical_device_xcb_presentation_support(
   return false;
 
if (!wsi_conn->has_dri3) {
-  fprintf(stderr, "vulkan: No DRI3 support\n");
+  fprintf(stderr, "vulkan: No DRI3 support detected - required for 
presentation\n");
+  fprintf(stderr, "Note: Buggy applications may crash, if they do please 
report to vendor\n");
   return false;
}
 
@@ -313,7 +314,8 @@ x11_surface_get_support(VkIcdSurfaceBase *icd_surface,
   return VK_ERROR_OUT_OF_HOST_MEMORY;
 
if (!wsi_conn->has_dri3) {
-  fprintf(stderr, "vulkan: No DRI3 support\n");
+  fprintf(stderr, "vulkan: No DRI3 support detected - required for 
presentation\n");
+  fprintf(stderr, "Note: Buggy applications may crash, if they do please 
report to vendor\n");
   *pSupported = false;
   return VK_SUCCESS;
}

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Mesa (master): radv: fix include order for installed headers v2

2017-01-19 Thread Emil Velikov
Module: Mesa
Branch: master
Commit: a3ad6a34c6ba222ec93a2cfd0cac205c62574eb7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3ad6a34c6ba222ec93a2cfd0cac205c62574eb7

Author: Andres Rodriguez 
Date:   Wed Jan 18 17:48:36 2017 -0500

radv: fix include order for installed headers v2

In situations where libdrm_amdgpu and mesa are installed to the same
location, the mesa installed headers will take precedence over the git
source headers.

This is due to the AMDGPU_CFLAGS containing the install directory.

This situation can cause build errors if the git version of a header is
newer than the currently installed version of a header (e.g. git pull
updates vulkan.h)

Note: using the same install prefix for mesa and libdrm is probably a
common occurrence since it is described in the radeonBuildHowTo wiki:
https://www.x.org/wiki/radeonBuildHowTo/

v2: added sign-off

Signed-off-by: Andres Rodriguez 
Reviewed-by: Bas Nieuwenhuizen 
Reviewed-by: Emil Velikov 

---

 src/amd/vulkan/Makefile.am | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/amd/vulkan/Makefile.am b/src/amd/vulkan/Makefile.am
index 4414881..b47109b 100644
--- a/src/amd/vulkan/Makefile.am
+++ b/src/amd/vulkan/Makefile.am
@@ -32,9 +32,6 @@ lib_LTLIBRARIES = libvulkan_radeon.la
 # The gallium includes are for the util/u_math.h include from main/macros.h
 
 AM_CPPFLAGS = \
-   $(AMDGPU_CFLAGS) \
-   $(VALGRIND_CFLAGS) \
-   $(DEFINES) \
-I$(top_srcdir)/include \
-I$(top_builddir)/src \
-I$(top_srcdir)/src \
@@ -48,7 +45,10 @@ AM_CPPFLAGS = \
-I$(top_srcdir)/src/mesa \
-I$(top_srcdir)/src/mesa/drivers/dri/common \
-I$(top_srcdir)/src/gallium/auxiliary \
-   -I$(top_srcdir)/src/gallium/include
+   -I$(top_srcdir)/src/gallium/include \
+   $(AMDGPU_CFLAGS) \
+   $(VALGRIND_CFLAGS) \
+   $(DEFINES)
 
 AM_CFLAGS = \
$(VISIBILITY_CFLAGS) \

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Mesa (master): mesa: Bump version to 17.1.0-devel

2017-01-19 Thread Emil Velikov
Module: Mesa
Branch: master
Commit: 49e4204b12cb6435cae5944292f42c35c9c072d2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=49e4204b12cb6435cae5944292f42c35c9c072d2

Author: Emil Velikov 
Date:   Thu Jan 19 15:33:29 2017 +

mesa: Bump version to 17.1.0-devel

Signed-off-by: Emil Velikov 

---

 VERSION | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/VERSION b/VERSION
index 19547f8..dc99675 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-17.0.0-devel
+17.1.0-devel

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Mesa (master): docs/releasing: document post branch version bump

2017-01-19 Thread Emil Velikov
Module: Mesa
Branch: master
Commit: 0f8afde7baf2b4764c3832387607021f2d318f6e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f8afde7baf2b4764c3832387607021f2d318f6e

Author: Emil Velikov 
Date:   Thu Jan 19 15:35:38 2017 +

docs/releasing: document post branch version bump

Signed-off-by: Emil Velikov 

---

 docs/releasing.html | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/docs/releasing.html b/docs/releasing.html
index 946aaa4..d650910 100644
--- a/docs/releasing.html
+++ b/docs/releasing.html
@@ -158,6 +158,9 @@ To setup the branchpoint:
git checkout master # make sure we're in master first
git tag -s X.Y-branchpoint -m "Mesa X.Y branchpoint"
git checkout -b X.Y
+   git checkout master
+   $EDITOR VERSION # bump the version number
+   git commit -as
git push origin X.Y-branchpoint X.Y
 
 

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Mesa (master): radeonsi: reject invalid vertex element formats

2017-01-19 Thread Marek Olšák
Module: Mesa
Branch: master
Commit: 9e4d1d8a7c0d60a6975d186944cd870e06f94773
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e4d1d8a7c0d60a6975d186944cd870e06f94773

Author: Marek Olšák 
Date:   Wed Jan 18 22:35:19 2017 +0100

radeonsi: reject invalid vertex element formats

This should fix a coverity defect.

Reviewed-by: Samuel Pitoiset 
Reviewed-by: Nicolai Hähnle 
Reviewed-by: Edward O'Callaghan 

---

 src/gallium/drivers/radeonsi/si_state.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index 876cbf6..4a9ca81 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3366,6 +3366,11 @@ static void *si_create_vertex_elements(struct 
pipe_context *ctx,
 
desc = util_format_description(elements[i].src_format);
first_non_void = 
util_format_get_first_non_void_channel(elements[i].src_format);
+   if (first_non_void < 0) {
+   FREE(v);
+   return NULL;
+   }
+
data_format = si_translate_buffer_dataformat(ctx->screen, desc, 
first_non_void);
num_format = si_translate_buffer_numformat(ctx->screen, desc, 
first_non_void);
channel = &desc->channel[first_non_void];

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Mesa (master): radeonsi: don' t forget to add HTILE to the buffer list for texturing

2017-01-19 Thread Marek Olšák
Module: Mesa
Branch: master
Commit: e490b7812cae778c61004971d86dc8299b6cd240
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e490b7812cae778c61004971d86dc8299b6cd240

Author: Marek Olšák 
Date:   Wed Jan 18 22:15:35 2017 +0100

radeonsi: don't forget to add HTILE to the buffer list for texturing

This fixes VM faults. Discovered by Samuel Pitoiset.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98975
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99450

Cc: 17.0 13.0 
Reviewed-by: Samuel Pitoiset 
Reviewed-by: Nicolai Hähnle 
Reviewed-by: Edward O'Callaghan 

---

 src/gallium/drivers/radeonsi/si_descriptors.c | 19 +--
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c 
b/src/gallium/drivers/radeonsi/si_descriptors.c
index df0905d..4a9fcd0 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -320,14 +320,21 @@ static void si_sampler_view_add_buffer(struct si_context 
*sctx,
if (resource->target == PIPE_BUFFER)
return;
 
-   /* Now add separate DCC if it's present. */
+   /* Now add separate DCC or HTILE. */
rtex = (struct r600_texture*)resource;
-   if (!rtex->dcc_separate_buffer)
-   return;
+   if (rtex->dcc_separate_buffer) {
+   radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx,
+   rtex->dcc_separate_buffer, 
usage,
+   RADEON_PRIO_DCC, check_mem);
+   }
 
-   radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx,
-   rtex->dcc_separate_buffer, usage,
-   RADEON_PRIO_DCC, check_mem);
+   if (rtex->htile_buffer &&
+   rtex->tc_compatible_htile &&
+   !is_stencil_sampler) {
+   radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx,
+   rtex->htile_buffer, usage,
+   RADEON_PRIO_HTILE, 
check_mem);
+   }
 }
 
 static void si_sampler_views_begin_new_cs(struct si_context *sctx,

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Mesa: tag mesa-17.0.0-rc1: mesa-17.0.0-rc1

2017-01-19 Thread Emil Velikov
Module: Mesa
Branch: refs/tags/mesa-17.0.0-rc1
Tag:ca9239d596c579fa49cfcdcc947a0a0b46af846e
URL:
http://cgit.freedesktop.org/mesa/mesa/tag/?id=ca9239d596c579fa49cfcdcc947a0a0b46af846e

Tagger: Emil Velikov 
Date:   Thu Jan 19 14:38:50 2017 +

mesa-17.0.0-rc1
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Mesa (17.0): utils: build sha1/disk cache only with Android/Autoconf

2017-01-19 Thread Emil Velikov
Module: Mesa
Branch: 17.0
Commit: acc78377990ba986060214466d44ea364529c363
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=acc78377990ba986060214466d44ea364529c363

Author: Emil Velikov 
Date:   Wed Jan 18 19:40:31 2017 +

utils: build sha1/disk cache only with Android/Autoconf

Earlier commit imported a SHA1 implementation and relaxed the SHA1 and
disk cache handling, broking the Windows builds.

Restrict things for now until we get to a proper fix.

Fixes: d1efa09d342 "util: import sha1 implementation from OpenBSD"
Signed-off-by: Emil Velikov 
(cherry picked from commit 9f8dc3bf03ec825bae7041858dda6ca2e9a34363)

---

 Android.common.mk|  1 +
 configure.ac |  1 +
 src/compiler/glsl/tests/cache_test.c |  5 +
 src/mesa/main/shaderapi.c|  5 +
 src/util/disk_cache.c|  4 
 src/util/disk_cache.h| 42 
 6 files changed, 58 insertions(+)

diff --git a/Android.common.mk b/Android.common.mk
index ed5118a..a75d4e7 100644
--- a/Android.common.mk
+++ b/Android.common.mk
@@ -43,6 +43,7 @@ LOCAL_CFLAGS += \

-DANDROID_VERSION=0x0$(MESA_ANDROID_MAJOR_VERSION)0$(MESA_ANDROID_MINOR_VERSION)
 
 LOCAL_CFLAGS += \
+   -DENABLE_SHADER_CACHE \
-D__STDC_LIMIT_MACROS \
-DHAVE___BUILTIN_EXPECT \
-DHAVE___BUILTIN_FFS \
diff --git a/configure.ac b/configure.ac
index 6b07b2d..de8af87 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1766,6 +1766,7 @@ if test -n "$with_vulkan_drivers"; then
 fi
 
 
+DEFINES="$DEFINES -DENABLE_SHADER_CACHE"
 AM_CONDITIONAL(NEED_MEGADRIVER, test -n "$DRI_DIRS")
 AM_CONDITIONAL(NEED_LIBMESA, test "x$enable_glx" = xxlib -o \
   "x$enable_osmesa" = xyes -o \
diff --git a/src/compiler/glsl/tests/cache_test.c 
b/src/compiler/glsl/tests/cache_test.c
index f53ef0d..0ef05aa 100644
--- a/src/compiler/glsl/tests/cache_test.c
+++ b/src/compiler/glsl/tests/cache_test.c
@@ -37,6 +37,8 @@
 
 bool error = false;
 
+#ifdef ENABLE_SHADER_CACHE
+
 static void
 expect_equal(uint64_t actual, uint64_t expected, const char *test)
 {
@@ -378,10 +380,12 @@ test_put_key_and_get_key(void)
 
disk_cache_destroy(cache);
 }
+#endif /* ENABLE_SHADER_CACHE */
 
 int
 main(void)
 {
+#ifdef ENABLE_SHADER_CACHE
int err;
 
test_disk_cache_create();
@@ -392,6 +396,7 @@ main(void)
 
err = rmrf_local(CACHE_TEST_TMP);
expect_equal(err, 0, "Removing " CACHE_TEST_TMP " again");
+#endif /* ENABLE_SHADER_CACHE */
 
return error ? 1 : 0;
 }
diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index 96a4ce0..4c67f95 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -1612,6 +1612,7 @@ _mesa_LinkProgram(GLuint programObj)
"glLinkProgram"));
 }
 
+#ifdef ENABLE_SHADER_CACHE
 /**
  * Generate a SHA-1 hash value string for given source string.
  */
@@ -1723,6 +1724,8 @@ read_shader(const gl_shader_stage stage, const char 
*source)
return buffer;
 }
 
+#endif /* ENABLE_SHADER_CACHE */
+
 /**
  * Called via glShaderSource() and glShaderSourceARB() API functions.
  * Basically, concatenate the source code strings into one long string
@@ -1795,6 +1798,7 @@ _mesa_ShaderSource(GLuint shaderObj, GLsizei count,
source[totalLength - 1] = '\0';
source[totalLength - 2] = '\0';
 
+#ifdef ENABLE_SHADER_CACHE
/* Dump original shader source to MESA_SHADER_DUMP_PATH and replace
 * if corresponding entry found from MESA_SHADER_READ_PATH.
 */
@@ -1805,6 +1809,7 @@ _mesa_ShaderSource(GLuint shaderObj, GLsizei count,
   free(source);
   source = replacement;
}
+#endif /* ENABLE_SHADER_CACHE */
 
shader_source(sh, source);
 
diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index 76bdfe8..6de608c 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -21,6 +21,8 @@
  * IN THE SOFTWARE.
  */
 
+#ifdef ENABLE_SHADER_CACHE
+
 #include 
 #include 
 #include 
@@ -705,3 +707,5 @@ disk_cache_has_key(struct disk_cache *cache, cache_key key)
 
return memcmp(entry, key, CACHE_KEY_SIZE) == 0;
 }
+
+#endif /* ENABLE_SHADER_CACHE */
diff --git a/src/util/disk_cache.h b/src/util/disk_cache.h
index 0b20665..7e9cb80 100644
--- a/src/util/disk_cache.h
+++ b/src/util/disk_cache.h
@@ -40,6 +40,8 @@ struct disk_cache;
 
 /* Provide inlined stub functions if the shader cache is disabled. */
 
+#ifdef ENABLE_SHADER_CACHE
+
 /**
  * Create a new cache object.
  *
@@ -129,6 +131,46 @@ disk_cache_put_key(struct disk_cache *cache, cache_key 
key);
 bool
 disk_cache_has_key(struct disk_cache *cache, cache_key key);
 
+#else
+
+static inline struct disk_cache *
+disk_cache_create(void)
+{
+   return NULL;
+}
+
+static inline void
+disk_cache_destroy(struct disk_cache *cache) {
+   return;
+}
+
+static inline void
+disk_cache_put(struct disk_cache *cache, cache_key key,
+  const void *data, size_t si

Mesa (17.0): utils: really remove the __END_DECLS macro

2017-01-19 Thread Emil Velikov
Module: Mesa
Branch: 17.0
Commit: 45297f7e4abe152c82f43216eb473f5248fd18cd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=45297f7e4abe152c82f43216eb473f5248fd18cd

Author: Emil Velikov 
Date:   Wed Jan 18 19:48:37 2017 +

utils: really remove the __END_DECLS macro

Fixes: d1efa09d342 "util: import sha1 implementation from OpenBSD"
Signed-off-by: Emil Velikov 
(cherry picked from commit ea8b2624c8da1061e93124a760cae2ffb5f027ad)

---

 src/util/sha1/sha1.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/util/sha1/sha1.h b/src/util/sha1/sha1.h
index de07e1a..243481a 100644
--- a/src/util/sha1/sha1.h
+++ b/src/util/sha1/sha1.h
@@ -31,7 +31,6 @@ void SHA1Pad(SHA1_CTX *);
 void SHA1Transform(uint32_t [5], const uint8_t [SHA1_BLOCK_LENGTH]);
 void SHA1Update(SHA1_CTX *, const uint8_t *, size_t);
 void SHA1Final(uint8_t [SHA1_DIGEST_LENGTH], SHA1_CTX *);
-__END_DECLS
 
 #define HTONDIGEST(x) do {  \
 x[0] = htonl(x[0]); \

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Mesa (17.0): Update version to 17.0.0-rc1

2017-01-19 Thread Emil Velikov
Module: Mesa
Branch: 17.0
Commit: 9cb066601c5cda082333ef8bbe74f9489790ed5d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9cb066601c5cda082333ef8bbe74f9489790ed5d

Author: Emil Velikov 
Date:   Wed Jan 18 20:12:04 2017 +

Update version to 17.0.0-rc1

Signed-off-by: Emil Velikov 

---

 VERSION | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/VERSION b/VERSION
index 19547f8..964d0ff 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-17.0.0-devel
+17.0.0-rc1

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Mesa (master): st/vdpau: only send buffers with B8G8R8A8 format to X

2017-01-19 Thread Christian König
Module: Mesa
Branch: master
Commit: 31908d6a4a3309f4cd4b953d6eecdf41595b1299
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=31908d6a4a3309f4cd4b953d6eecdf41595b1299

Author: Nayan Deshmukh 
Date:   Thu Jan 19 15:17:28 2017 +0530

st/vdpau: only send buffers with B8G8R8A8 format to X

PresentPixmap only works if the pixmap depth matches with the
window depth, otherwise it returns a BadMatch protocol error.
Even if the depths match, the result won't look correctly
if the VDPAU RGB component order doesn't match the X11 one so
we only allow the X11 format.
For other buffers we copy them to a buffer which is send to X.

v2: only send buffers with format VDP_RGBA_FORMAT_B8G8R8A8
v3: reword commit message
v4: add comment explaining the code

Signed-off-by: Nayan Deshmukh 
Reviewed-by: Christian König 

---

 src/gallium/state_trackers/vdpau/output.c| 7 +++
 src/gallium/state_trackers/vdpau/presentation.c  | 6 +++---
 src/gallium/state_trackers/vdpau/vdpau_private.h | 1 +
 3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/src/gallium/state_trackers/vdpau/output.c 
b/src/gallium/state_trackers/vdpau/output.c
index 98a8011..8b26f7a 100644
--- a/src/gallium/state_trackers/vdpau/output.c
+++ b/src/gallium/state_trackers/vdpau/output.c
@@ -75,6 +75,13 @@ vlVdpOutputSurfaceCreate(VdpDevice device,
 
memset(&res_tmpl, 0, sizeof(res_tmpl));
 
+   /*
+* The output won't look correctly when this buffer is send to X,
+* if the VDPAU RGB component order doesn't match the X11 one so
+* we only allow the X11 format
+*/
+   vlsurface->send_to_X = rgba_format == VDP_RGBA_FORMAT_B8G8R8A8;
+
res_tmpl.target = PIPE_TEXTURE_2D;
res_tmpl.format = VdpFormatRGBAToPipe(rgba_format);
res_tmpl.width0 = width;
diff --git a/src/gallium/state_trackers/vdpau/presentation.c 
b/src/gallium/state_trackers/vdpau/presentation.c
index d479369..78cafc8 100644
--- a/src/gallium/state_trackers/vdpau/presentation.c
+++ b/src/gallium/state_trackers/vdpau/presentation.c
@@ -231,7 +231,7 @@ vlVdpPresentationQueueDisplay(VdpPresentationQueue 
presentation_queue,
vscreen = pq->device->vscreen;
 
pipe_mutex_lock(pq->device->mutex);
-   if (vscreen->set_back_texture_from_output)
+   if (vscreen->set_back_texture_from_output && surf->send_to_X)
   vscreen->set_back_texture_from_output(vscreen, surf->surface->texture, 
clip_width, clip_height);
tex = vscreen->texture_from_drawable(vscreen, (void *)pq->drawable);
if (!tex) {
@@ -239,7 +239,7 @@ vlVdpPresentationQueueDisplay(VdpPresentationQueue 
presentation_queue,
   return VDP_STATUS_INVALID_HANDLE;
}
 
-   if (!vscreen->set_back_texture_from_output) {
+   if (!vscreen->set_back_texture_from_output || !surf->send_to_X) {
   dirty_area = vscreen->get_dirty_area(vscreen);
 
   memset(&surf_templ, 0, sizeof(surf_templ));
@@ -289,7 +289,7 @@ vlVdpPresentationQueueDisplay(VdpPresentationQueue 
presentation_queue,
   framenum++;
}
 
-   if (!vscreen->set_back_texture_from_output) {
+   if (!vscreen->set_back_texture_from_output || !surf->send_to_X) {
   pipe_resource_reference(&tex, NULL);
   pipe_surface_reference(&surf_draw, NULL);
}
diff --git a/src/gallium/state_trackers/vdpau/vdpau_private.h 
b/src/gallium/state_trackers/vdpau/vdpau_private.h
index 490a0bd..8356608 100644
--- a/src/gallium/state_trackers/vdpau/vdpau_private.h
+++ b/src/gallium/state_trackers/vdpau/vdpau_private.h
@@ -415,6 +415,7 @@ typedef struct
struct pipe_fence_handle *fence;
struct vl_compositor_state cstate;
struct u_rect dirty_area;
+   bool send_to_X;
 } vlVdpOutputSurface;
 
 typedef struct

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Mesa (master): radeonsi: fix texture gather on stencil textures

2017-01-19 Thread Nicolai Hähnle
Module: Mesa
Branch: master
Commit: 3cd092c41508dde2e6259f09df1736911a828548
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3cd092c41508dde2e6259f09df1736911a828548

Author: Nicolai Hähnle 
Date:   Wed Jan 18 09:28:47 2017 +0100

radeonsi: fix texture gather on stencil textures

At least on VI, texture gather doesn't work with a 24_8 data format, so
use 8_8_8_8 and a modified swizzle instead.

A bit of background: When creating a GL_STENCIL_INDEX8 texture, we select
the X24S8 pipe format because we don't support stencil-only render targets
properly. With mip-mapping this can lead to a setup where the tiling is
incompatible with stencil texturing, and a flushed stencil texture is
used. For the flushed stencil, a literal X24S8 is used because there were
issues with an 8bpp DB->CB copy.

Longer term, it would be good if we could get away from these workarounds,
i.e. properly support an S8 format for stencil-only rendering and flushed
stencil. Since stencil texturing is somewhat rare, it's not a high
priority.

Fixes GL45-CTS.texture_cube_map_array.sampling.

Cc: 17.0 
Reviewed-by: Marek Olšák 
Acked-by: Edward O'Callaghan 

---

 src/gallium/drivers/radeonsi/si_state.c | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index 0ec34f9..876cbf6 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1365,11 +1365,17 @@ static uint32_t si_translate_texformat(struct 
pipe_screen *screen,
case PIPE_FORMAT_Z16_UNORM:
return V_008F14_IMG_DATA_FORMAT_16;
case PIPE_FORMAT_X24S8_UINT:
+   case PIPE_FORMAT_S8X24_UINT:
+   /*
+* Implemented as an 8_8_8_8 data format to fix texture
+* gathers in stencil sampling. This affects at least
+* GL45-CTS.texture_cube_map_array.sampling on VI.
+*/
+   return V_008F14_IMG_DATA_FORMAT_8_8_8_8;
case PIPE_FORMAT_Z24X8_UNORM:
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
return V_008F14_IMG_DATA_FORMAT_8_24;
case PIPE_FORMAT_X8Z24_UNORM:
-   case PIPE_FORMAT_S8X24_UINT:
case PIPE_FORMAT_S8_UINT_Z24_UNORM:
return V_008F14_IMG_DATA_FORMAT_24_8;
case PIPE_FORMAT_S8_UINT:
@@ -2796,14 +2802,22 @@ si_make_texture_descriptor(struct si_screen *screen,
if (desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) {
const unsigned char swizzle_[4] = {0, 0, 0, 0};
const unsigned char swizzle_[4] = {1, 1, 1, 1};
+   const unsigned char swizzle_[4] = {3, 3, 3, 3};
 
switch (pipe_format) {
case PIPE_FORMAT_S8_UINT_Z24_UNORM:
-   case PIPE_FORMAT_X24S8_UINT:
case PIPE_FORMAT_X32_S8X24_UINT:
case PIPE_FORMAT_X8Z24_UNORM:
util_format_compose_swizzles(swizzle_, 
state_swizzle, swizzle);
break;
+   case PIPE_FORMAT_X24S8_UINT:
+   /*
+* X24S8 is implemented as an 8_8_8_8 data format, to
+* fix texture gathers. This affects at least
+* GL45-CTS.texture_cube_map_array.sampling on VI.
+*/
+   util_format_compose_swizzles(swizzle_, 
state_swizzle, swizzle);
+   break;
default:
util_format_compose_swizzles(swizzle_, 
state_swizzle, swizzle);
}

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Mesa (master): mesa/main: Fix FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE for NONE attachment type

2017-01-19 Thread Alejandro Pinheiro
Module: Mesa
Branch: master
Commit: 905961452ad3e7e29745dad78d70b2973377982b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=905961452ad3e7e29745dad78d70b2973377982b

Author: Alejandro Piñeiro 
Date:   Fri Jan 13 11:39:24 2017 -0200

mesa/main: Fix FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE for NONE attachment type

When the attachment type is NONE (att->Type),
FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE should be NONE always.

Note that technically, the current behaviour follows the spec. From
OpenGL 4.5 spec, Section 9.2.3 "Framebuffer Object Queries":

   "If the value of FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE is NONE, then
either no framebuffer is bound to target; or the default
framebuffer is bound, attachment is DEPTH or STENCIL, and the
number of depth or stencil bits, respectively, is zero."

Reading literally this paragraph, for the default framebuffer, NONE
should be only returned if attachment is DEPTH and STENCIL without
being allocated.

But it doesn't makes too much sense to return DEFAULT_FRAMEBUFFER if
the attachment type is NONE. For example, this can happens if the
attachment is FRONT_RIGHT run on monoscopic mode, as that attachment
is only available on stereo mode.

With the current behaviour, defensive querying of the object type
would not work properly. So you could query the object type checking
for NONE, get DEFAULT_FRAMEBUFFER, and then get and INVALID_OPERATION
when requesting other pnames (like RED_SIZE), as the real attachment
type is NONE.

This fixes:
GL45-CTS.direct_state_access.framebuffers_get_attachment_parameters

v2: don't change the behaviour for att->Type != GL_NONE, as caused
some ES CTS regressions
v3: simplify condition (Iago)

Reviewed-by: Iago Toral Quiroga 

---

 src/mesa/main/fbobject.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 044bd63..6934805 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -3754,11 +3754,13 @@ _mesa_get_framebuffer_attachment_parameter(struct 
gl_context *ctx,
*  either no framebuffer is bound to target; or the default framebuffer
*  is bound, attachment is DEPTH or STENCIL, and the number of depth or
*  stencil bits, respectively, is zero."
+   *
+   * Note that we don't need explicit checks on DEPTH and STENCIL, because
+   * on the case the spec is pointing, att->Type is already NONE, so we
+   * just need to check att->Type.
*/
-  *params = (_mesa_is_winsys_fbo(buffer) &&
- ((attachment != GL_DEPTH && attachment != GL_STENCIL) ||
-  (att->Type != GL_NONE)))
- ? GL_FRAMEBUFFER_DEFAULT : att->Type;
+  *params = (_mesa_is_winsys_fbo(buffer) && att->Type != GL_NONE) ?
+ GL_FRAMEBUFFER_DEFAULT : att->Type;
   return;
case GL_FRAMEBUFFER_ATTACHMENT_OBJECT_NAME_EXT:
   if (att->Type == GL_RENDERBUFFER_EXT) {

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Mesa (master): radeonsi: Always leave poly_offset in a valid state

2017-01-19 Thread Nicolai Hähnle
Module: Mesa
Branch: master
Commit: d7d32b3bfe86bd89d94d59393907bce1cb9dab7c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d7d32b3bfe86bd89d94d59393907bce1cb9dab7c

Author: Zachary Michaels 
Date:   Thu Jan 19 10:50:16 2017 +0100

radeonsi: Always leave poly_offset in a valid state

This commit makes si_update_poly_offset set poly_offset to NULL if
uses_poly_offset is false. This way poly_offset either points into the
currently queued rasterizer, or it is NULL.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99451
Cc: "13.0 17.0" 
Reviewed-by: Nicolai Hähnle 

---

 src/gallium/drivers/radeonsi/si_state.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index f60a499..0ec34f9 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -717,8 +717,10 @@ static void si_update_poly_offset_state(struct si_context 
*sctx)
 {
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
 
-   if (!rs || !rs->uses_poly_offset || !sctx->framebuffer.state.zsbuf)
+   if (!rs || !rs->uses_poly_offset || !sctx->framebuffer.state.zsbuf) {
+   si_pm4_bind_state(sctx, poly_offset, NULL);
return;
+   }
 
/* Use the user format, not db_render_format, so that the polygon
 * offset behaves as expected by applications.

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Mesa (master): mesa/main: fix meta caller of _mesa_ClampColor

2017-01-19 Thread Nicolai Hähnle
Module: Mesa
Branch: master
Commit: a7c635ec6589f600f0d52d0097774ea0b938de9f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a7c635ec6589f600f0d52d0097774ea0b938de9f

Author: Nicolai Hähnle 
Date:   Mon Jan 16 12:13:50 2017 +0100

mesa/main: fix meta caller of _mesa_ClampColor

Since _mesa_ClampColor properly checks for support of the API function
now, it's meta callers need to check support as well.

Fixes: 963311b71f ("mesa/main: fix version/extension checks in 
_mesa_ClampColor")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99401
Tested-by: Mark Janes 
Reviewed-by: Alejandro Piñeiro 
Cc: "17.0" 

---

 src/mesa/main/attrib.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/mesa/main/attrib.c b/src/mesa/main/attrib.c
index 9c7f5ed..ada2203 100644
--- a/src/mesa/main/attrib.c
+++ b/src/mesa/main/attrib.c
@@ -1071,7 +1071,8 @@ _mesa_PopAttrib(void)
if (ctx->Extensions.ARB_color_buffer_float)
   _mesa_ClampColor(GL_CLAMP_FRAGMENT_COLOR_ARB,
color->ClampFragmentColor);
-   _mesa_ClampColor(GL_CLAMP_READ_COLOR_ARB, 
color->ClampReadColor);
+   if (ctx->Extensions.ARB_color_buffer_float || ctx->Version >= 
30)
+  _mesa_ClampColor(GL_CLAMP_READ_COLOR_ARB, 
color->ClampReadColor);
 
/* GL_ARB_framebuffer_sRGB / GL_EXT_framebuffer_sRGB */
if (ctx->Extensions.EXT_framebuffer_sRGB)

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