Mesa (master): glsl/linker: refactor link-time validation of output locations
Module: Mesa
Branch: master
Commit: 6aa68772d4ecea120deb59bc2655e075ed0b6a17
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6aa68772d4ecea120deb59bc2655e075ed0b6a17
Author: Iago Toral Quiroga
Date: Thu Oct 19 10:57:30 2017 +0200
glsl/linker: refactor link-time validation of output locations
Move the checks for explicit locations to a separate function. We
will use this in a follow-up patch to validate locations for interface
variables where we need to validate each interface member rather than
the interface variable itself.
Reviewed-by: Timothy Arceri
---
src/compiler/glsl/link_varyings.cpp | 128
1 file changed, 73 insertions(+), 55 deletions(-)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index cb9091d86b..d394488ab9 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -403,6 +403,75 @@ compute_variable_location_slot(ir_variable *var,
gl_shader_stage stage)
return var->data.location - location_start;
}
+static bool
+check_location_aliasing(ir_variable *explicit_locations[][4],
+ir_variable *var,
+unsigned location,
+unsigned component,
+unsigned location_limit,
+const glsl_type *type,
+gl_shader_program *prog,
+gl_shader_stage stage)
+{
+ unsigned last_comp;
+ if (type->without_array()->is_record()) {
+ /* The component qualifier can't be used on structs so just treat
+ * all component slots as used.
+ */
+ last_comp = 4;
+ } else {
+ unsigned dmul = type->without_array()->is_64bit() ? 2 : 1;
+ last_comp = component + type->without_array()->vector_elements * dmul;
+ }
+
+ while (location < location_limit) {
+ unsigned i = component;
+ while (i < last_comp) {
+ if (explicit_locations[location][i] != NULL) {
+linker_error(prog,
+ "%s shader has multiple outputs explicitly "
+ "assigned to location %d and component %d\n",
+ _mesa_shader_stage_to_string(stage),
+ location, component);
+return false;
+ }
+
+ /* Make sure all component at this location have the same type.
+ */
+ for (unsigned j = 0; j < 4; j++) {
+if (explicit_locations[location][j] &&
+(explicit_locations[location][j]->type->without_array()
+ ->base_type != type->without_array()->base_type)) {
+ linker_error(prog,
+"Varyings sharing the same location must "
+"have the same underlying numerical type. "
+"Location %u component %u\n", location, component);
+ return false;
+}
+ }
+
+ explicit_locations[location][i] = var;
+ i++;
+
+ /* We need to do some special handling for doubles as dvec3 and
+ * dvec4 consume two consecutive locations. We don't need to
+ * worry about components beginning at anything other than 0 as
+ * the spec does not allow this for dvec3 and dvec4.
+ */
+ if (i == 4 && last_comp > 4) {
+last_comp = last_comp - 4;
+/* Bump location index and reset the component index */
+location++;
+i = 0;
+ }
+ }
+
+ location++;
+ }
+
+ return true;
+}
+
/**
* Validate that outputs from one stage match inputs of another
*/
@@ -435,7 +504,6 @@ cross_validate_outputs_to_inputs(struct gl_context *ctx,
unsigned num_elements = type->count_attribute_slots(false);
unsigned idx = compute_variable_location_slot(var, producer->Stage);
unsigned slot_limit = idx + num_elements;
- unsigned last_comp;
unsigned slot_max =
ctx->Const.Program[producer->Stage].MaxOutputComponents / 4;
@@ -446,60 +514,10 @@ cross_validate_outputs_to_inputs(struct gl_context *ctx,
return;
}
- if (type->without_array()->is_record()) {
-/* The component qualifier can't be used on structs so just treat
- * all component slots as used.
- */
-last_comp = 4;
- } else {
-unsigned dmul = type->without_array()->is_64bit() ? 2 : 1;
-last_comp = var->data.location_frac +
- type->without_array()->vector_elements * dmul;
- }
-
- while (idx < slot_limit) {
-unsigned i = var->data.location_frac;
-while (i < last_comp) {
- if (explicit_locations[idx][i] != NULL) {
- linker_error(prog,
- "%s shader has multiple outputs explicitly "
- "assig
Mesa (master): glsl/linker: generalize validate_explicit_variable_location for SSO
Module: Mesa
Branch: master
Commit: bdaf0589785138f91cd485fd698274a33b7d33d5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bdaf0589785138f91cd485fd698274a33b7d33d5
Author: Iago Toral Quiroga
Date: Fri Oct 20 10:46:10 2017 +0200
glsl/linker: generalize validate_explicit_variable_location for SSO
For non-SSO programs, we only need to validate outputs, since
the cross validation of outputs to inputs will ensure that we
produce linker errors for invalid inputs too.
Hoever, for the SSO path there is no output to input validation,
so we need to validate inputs explicitly. Generalize the function
so it can handle this as well.
Also, notice that vertex shader inputs and fragment shader outputs
are already validated in assign_attribute_or_color_locations()
for both SSO and non-SSO paths, so we should not try to validate
that here again (in fact, the function would require explicit
paths to handle these two cases properly).
Reviewed-by: Timothy Arceri
Reviewed-by: Ilia Mirkin
---
src/compiler/glsl/link_varyings.cpp | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index 64c9a28253..02a48f7199 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -545,8 +545,22 @@ validate_explicit_variable_location(struct gl_context *ctx,
unsigned idx = compute_variable_location_slot(var, sh->Stage);
unsigned slot_limit = idx + num_elements;
- unsigned slot_max =
- ctx->Const.Program[sh->Stage].MaxOutputComponents / 4;
+ /* Vertex shader inputs and fragment shader outputs are validated in
+* assign_attribute_or_color_locations() so we should not attempt to
+* validate them again here.
+*/
+ unsigned slot_max;
+ if (var->data.mode == ir_var_shader_out) {
+ assert(sh->Stage != MESA_SHADER_FRAGMENT);
+ slot_max =
+ ctx->Const.Program[sh->Stage].MaxOutputComponents / 4;
+ } else {
+ assert(var->data.mode == ir_var_shader_in);
+ assert(sh->Stage != MESA_SHADER_VERTEX);
+ slot_max =
+ ctx->Const.Program[sh->Stage].MaxInputComponents / 4;
+ }
+
if (slot_limit > slot_max) {
linker_error(prog,
"Invalid location %u in %s shader\n",
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Mesa (master): glsl/linker: create a helper function to validate explicit locations
Module: Mesa
Branch: master
Commit: e7b7fe314e414a6b7953f7b485d86849e00ae5fc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7b7fe314e414a6b7953f7b485d86849e00ae5fc
Author: Iago Toral Quiroga
Date: Fri Oct 20 09:00:41 2017 +0200
glsl/linker: create a helper function to validate explicit locations
Currently, we only validate explicit locations for non-SSO programs.
This creates a helper that we can call from both SSO and non-SSO paths
directly, so we can reuse all the logic behind this.
Reviewed-by: Timothy Arceri
Reviewed-by: Ilia Mirkin
---
src/compiler/glsl/link_varyings.cpp | 94 ++---
1 file changed, 55 insertions(+), 39 deletions(-)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index 7766d82464..64c9a28253 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -533,6 +533,58 @@ check_location_aliasing(struct explicit_location_info
explicit_locations[][4],
return true;
}
+static bool
+validate_explicit_variable_location(struct gl_context *ctx,
+struct explicit_location_info
explicit_locations[][4],
+ir_variable *var,
+gl_shader_program *prog,
+gl_linked_shader *sh)
+{
+ const glsl_type *type = get_varying_type(var, sh->Stage);
+ unsigned num_elements = type->count_attribute_slots(false);
+ unsigned idx = compute_variable_location_slot(var, sh->Stage);
+ unsigned slot_limit = idx + num_elements;
+
+ unsigned slot_max =
+ ctx->Const.Program[sh->Stage].MaxOutputComponents / 4;
+ if (slot_limit > slot_max) {
+ linker_error(prog,
+ "Invalid location %u in %s shader\n",
+ idx, _mesa_shader_stage_to_string(sh->Stage));
+ return false;
+ }
+
+ if (type->without_array()->is_interface()) {
+ for (unsigned i = 0; i < type->without_array()->length; i++) {
+ glsl_struct_field *field = &type->fields.structure[i];
+ unsigned field_location = field->location -
+(field->patch ? VARYING_SLOT_PATCH0 : VARYING_SLOT_VAR0);
+ if (!check_location_aliasing(explicit_locations, var,
+ field_location,
+ 0, field_location + 1,
+ field->type,
+ field->interpolation,
+ field->centroid,
+ field->sample,
+ field->patch,
+ prog, sh->Stage)) {
+return false;
+ }
+ }
+ } else if (!check_location_aliasing(explicit_locations, var,
+ idx, var->data.location_frac,
+ slot_limit, type,
+ var->data.interpolation,
+ var->data.centroid,
+ var->data.sample,
+ var->data.patch,
+ prog, sh->Stage)) {
+ return false;
+ }
+
+ return true;
+}
+
/**
* Validate that outputs from one stage match inputs of another
*/
@@ -560,45 +612,9 @@ cross_validate_outputs_to_inputs(struct gl_context *ctx,
/* User-defined varyings with explicit locations are handled
* differently because they do not need to have matching names.
*/
- const glsl_type *type = get_varying_type(var, producer->Stage);
- unsigned num_elements = type->count_attribute_slots(false);
- unsigned idx = compute_variable_location_slot(var, producer->Stage);
- unsigned slot_limit = idx + num_elements;
-
- unsigned slot_max =
-ctx->Const.Program[producer->Stage].MaxOutputComponents / 4;
- if (slot_limit > slot_max) {
-linker_error(prog,
- "Invalid location %u in %s shader\n",
- idx, _mesa_shader_stage_to_string(producer->Stage));
-return;
- }
-
- if (type->without_array()->is_interface()) {
-for (unsigned i = 0; i < type->without_array()->length; i++) {
- glsl_struct_field *field = &type->fields.structure[i];
- unsigned field_location = field->location -
- (field->patch ? VARYING_SLOT_PATCH0 : VARYING_SLOT_VAR0);
- if (!check_location_aliasing(explicit_locations, var,
-field_location,
-0, field_location + 1,
-field->type,
-field->interpolation,
-field->centro
Mesa (master): glsl/linker: outputs in the same location must share auxiliary storage
Module: Mesa
Branch: master
Commit: ab40acb45341d8cea011ba7330626ffc6e3238ad
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab40acb45341d8cea011ba7330626ffc6e3238ad
Author: Iago Toral Quiroga
Date: Thu Oct 19 16:33:49 2017 +0200
glsl/linker: outputs in the same location must share auxiliary storage
From ARB_enhanced_layouts:
"[...]when location aliasing, the aliases sharing the location
must have the same underlying numerical type (floating-point or
integer) and the same auxiliary storage and
interpolation qualification.[...]"
Add code to the linker to validate that aliased locations do
have the same aux storage.
Fixes:
KHR-GL45.enhanced_layouts.varying_location_aliasing_with_mixed_auxiliary_storage
Reviewed-by: Timothy Arceri
Reviewed-by: Ilia Mirkin
---
src/compiler/glsl/link_varyings.cpp | 36 ++--
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index 9542754600..7766d82464 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -407,6 +407,9 @@ struct explicit_location_info {
ir_variable *var;
unsigned base_type;
unsigned interpolation;
+ bool centroid;
+ bool sample;
+ bool patch;
};
static bool
@@ -417,6 +420,9 @@ check_location_aliasing(struct explicit_location_info
explicit_locations[][4],
unsigned location_limit,
const glsl_type *type,
unsigned interpolation,
+bool centroid,
+bool sample,
+bool patch,
gl_shader_program *prog,
gl_shader_stage stage)
{
@@ -459,6 +465,16 @@ check_location_aliasing(struct explicit_location_info
explicit_locations[][4],
_mesa_shader_stage_to_string(stage), location);
return false;
}
+
+if (info->centroid != centroid ||
+info->sample != sample ||
+info->patch != patch) {
+ linker_error(prog,
+"%s shader has multiple outputs at explicit "
+"location %u with different aux storage\n",
+_mesa_shader_stage_to_string(stage), location);
+ return false;
+}
}
comp++;
@@ -493,6 +509,9 @@ check_location_aliasing(struct explicit_location_info
explicit_locations[][4],
explicit_locations[location][i].base_type =
type->without_array()->base_type;
explicit_locations[location][i].interpolation = interpolation;
+ explicit_locations[location][i].centroid = centroid;
+ explicit_locations[location][i].sample = sample;
+ explicit_locations[location][i].patch = patch;
i++;
/* We need to do some special handling for doubles as dvec3 and
@@ -557,15 +576,17 @@ cross_validate_outputs_to_inputs(struct gl_context *ctx,
if (type->without_array()->is_interface()) {
for (unsigned i = 0; i < type->without_array()->length; i++) {
- const glsl_type *field_type = type->fields.structure[i].type;
- unsigned field_location = type->fields.structure[i].location -
- (type->fields.structure[i].patch ? VARYING_SLOT_PATCH0 :
- VARYING_SLOT_VAR0);
- unsigned interpolation =
type->fields.structure[i].interpolation;
+ glsl_struct_field *field = &type->fields.structure[i];
+ unsigned field_location = field->location -
+ (field->patch ? VARYING_SLOT_PATCH0 : VARYING_SLOT_VAR0);
if (!check_location_aliasing(explicit_locations, var,
field_location,
0, field_location + 1,
-field_type, interpolation,
+field->type,
+field->interpolation,
+field->centroid,
+field->sample,
+field->patch,
prog, producer->Stage)) {
return;
}
@@ -574,6 +595,9 @@ cross_validate_outputs_to_inputs(struct gl_context *ctx,
idx, var->data.location_frac,
slot_limit, type,
var->data.interpolation,
+ var->data.centroid,
+ var->data.sample,
+
Mesa (master): glsl/linker: validate explicit locations for SSO programs
Module: Mesa
Branch: master
Commit: e2abb75b0e4c2e38120316c4f3cc4cde44497330
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2abb75b0e4c2e38120316c4f3cc4cde44497330
Author: Iago Toral Quiroga
Date: Fri Oct 20 09:18:33 2017 +0200
glsl/linker: validate explicit locations for SSO programs
v2:
- we only need to validate inputs to the first stage and outputs
from the last stage, everything else has already been validated
during cross_validate_outputs_to_inputs (Timothy).
- Use MAX_VARYING instead of MAX_VARYINGS_INCL_PATCH (Illia)
Reviewed-by: Timothy Arceri
Reviewed-by: Ilia Mirkin
---
src/compiler/glsl/link_varyings.cpp | 55 +
src/compiler/glsl/link_varyings.h | 6
src/compiler/glsl/linker.cpp| 10 +++
3 files changed, 71 insertions(+)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index 02a48f7199..e80736fb38 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -600,6 +600,61 @@ validate_explicit_variable_location(struct gl_context *ctx,
}
/**
+ * Validate explicit locations for the inputs to the first stage and the
+ * outputs of the last stage in an SSO program (everything in between is
+ * validated in cross_validate_outputs_to_inputs).
+ */
+void
+validate_sso_explicit_locations(struct gl_context *ctx,
+struct gl_shader_program *prog,
+gl_shader_stage first_stage,
+gl_shader_stage last_stage)
+{
+ assert(prog->SeparateShader);
+
+ /* VS inputs and FS outputs are validated in
+* assign_attribute_or_color_locations()
+*/
+ bool validate_first_stage = first_stage != MESA_SHADER_VERTEX;
+ bool validate_last_stage = last_stage != MESA_SHADER_FRAGMENT;
+ if (!validate_first_stage && !validate_last_stage)
+ return;
+
+ struct explicit_location_info explicit_locations[MAX_VARYING][4];
+
+ gl_shader_stage stages[2] = { first_stage, last_stage };
+ bool validate_stage[2] = { validate_first_stage, validate_last_stage };
+ ir_variable_mode var_direction[2] = { ir_var_shader_in, ir_var_shader_out };
+
+ for (unsigned i = 0; i < 2; i++) {
+ if (!validate_stage[i])
+ continue;
+
+ gl_shader_stage stage = stages[i];
+
+ gl_linked_shader *sh = prog->_LinkedShaders[stage];
+ assert(sh);
+
+ memset(explicit_locations, 0, sizeof(explicit_locations));
+
+ foreach_in_list(ir_instruction, node, sh->ir) {
+ ir_variable *const var = node->as_variable();
+
+ if (var == NULL ||
+ !var->data.explicit_location ||
+ var->data.location < VARYING_SLOT_VAR0 ||
+ var->data.mode != var_direction[i])
+continue;
+
+ if (!validate_explicit_variable_location(
+ ctx, explicit_locations, var, prog, sh)) {
+return;
+ }
+ }
+ }
+}
+
+/**
* Validate that outputs from one stage match inputs of another
*/
void
diff --git a/src/compiler/glsl/link_varyings.h
b/src/compiler/glsl/link_varyings.h
index 081b04ea38..e052a2b3e5 100644
--- a/src/compiler/glsl/link_varyings.h
+++ b/src/compiler/glsl/link_varyings.h
@@ -300,6 +300,12 @@ link_varyings(struct gl_shader_program *prog, unsigned
first, unsigned last,
struct gl_context *ctx, void *mem_ctx);
void
+validate_sso_explicit_locations(struct gl_context *ctx,
+struct gl_shader_program *prog,
+gl_shader_stage first,
+gl_shader_stage last);
+
+void
cross_validate_outputs_to_inputs(struct gl_context *ctx,
struct gl_shader_program *prog,
gl_linked_shader *producer,
diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index 94bd7fb659..f827b68555 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -4941,6 +4941,16 @@ link_shaders(struct gl_context *ctx, struct
gl_shader_program *prog)
prev = i;
}
+ /* The cross validation of outputs/inputs above validates explicit locations
+* but for SSO programs we need to do this also for the inputs in the
+* first stage and outputs of the last stage included in the program, since
+* there is no cross validation for these.
+*/
+ if (prog->SeparateShader)
+ validate_sso_explicit_locations(ctx, prog,
+ (gl_shader_stage) first,
+ (gl_shader_stage) last);
+
/* Cross-validate uniform blocks between shader stages */
validate_interstage_uniform_blocks(prog, prog->_LinkedShaders);
if (!prog->data->LinkStatus)
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Mesa (master): glsl/linker: report linker errors for invalid explicit locations on inputs
Module: Mesa
Branch: master
Commit: b9446172249f05f577072f09ea17a391f3ee5d90
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9446172249f05f577072f09ea17a391f3ee5d90
Author: Iago Toral Quiroga
Date: Tue Oct 24 10:21:13 2017 +0200
glsl/linker: report linker errors for invalid explicit locations on inputs
We were assuming that if an input has an invalid explicit location it would
fail to link because it would not find the corresponding output, however,
since we look for the matching output by indexing the explicit_locations
array with the input location, we still need to ensure that we don't index
out of bounds.
Reviewed-by: Timothy Arceri
Reviewed-by: Ilia Mirkin
---
src/compiler/glsl/link_varyings.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index 69c92bf53b..cb9091d86b 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -556,6 +556,13 @@ cross_validate_outputs_to_inputs(struct gl_context *ctx,
unsigned slot_limit = idx + num_elements;
while (idx < slot_limit) {
+ if (idx >= MAX_VARYING) {
+ linker_error(prog,
+ "Invalid location %u in %s shader\n", idx,
+ _mesa_shader_stage_to_string(consumer->Stage));
+ return;
+ }
+
output = explicit_locations[idx][input->data.location_frac];
if (output == NULL ||
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Mesa (master): glsl/linker: fix location aliasing checks for interface variables
Module: Mesa
Branch: master
Commit: c4545676d7f4e5f898bdc54d5574cd56ca7b9aad
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4545676d7f4e5f898bdc54d5574cd56ca7b9aad
Author: Iago Toral Quiroga
Date: Thu Oct 19 13:44:48 2017 +0200
glsl/linker: fix location aliasing checks for interface variables
The existing code was checking the whole interface variable rather
than its members, which is not what we want: we want to check
aliasing for each member in the interface variable.
Surprisingly, there are piglit tests that verify this and were
passing due to a bug in the existing code: when we were computing
the last component used by an interface variable we would use
the 'vector' path and multiply by vector_elements, which is 0 for
interface variables. This made the loop that checks for aliasing
be a no-op and not add the interface variable to the list of outputs
so then we would fail to link when we did not see a matching output
for the same input in the next stage. Since the tests expect a
linker error to happen, they would pass, but not for the right
reason.
Unfortunately, the current implementation uses ir_variable instances
to keep track of explicit locations. Since we don't have
ir_variables instances for individual interface members, we need
to have a custom struct with the data we need. This struct has
the ir_variable (which for interface members is the whole
interface variable), plus the data that we need to validate for
each aliased location, for now only the base type, which for
interface members we will take from the appropriate field inside
the interface variable.
Later patches will expand this custom struct so we can also check
other requirements for location aliasing, specifically that
we have matching interpolation and auxiliary storage, that once
again, we will take from the appropriate field members for the
interface variables.
v2:
- Use MAX_VARYING instead of MAX_VARYINGS_INCL_PATCH (Illia)
Fixes:
KHR-GL45.enhanced_layouts.varying_block_automatic_member_locations
Fixes (these were passing before but for incorrect reasons):
tests/spec/arb_enhanced_layouts/linker/block-member-locations/named-block-member-location-overlap.shader_test
tests/spec/arb_enhanced_layouts/linker/block-member-locations/named-block-member-mixed-order-overlap.shader_test
Reviewed-by: Timothy Arceri
Reviewed-by: Ilia Mirkin
---
src/compiler/glsl/link_varyings.cpp | 45 +++--
1 file changed, 33 insertions(+), 12 deletions(-)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index d394488ab9..1db851b7e9 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -403,8 +403,13 @@ compute_variable_location_slot(ir_variable *var,
gl_shader_stage stage)
return var->data.location - location_start;
}
+struct explicit_location_info {
+ ir_variable *var;
+ unsigned base_type;
+};
+
static bool
-check_location_aliasing(ir_variable *explicit_locations[][4],
+check_location_aliasing(struct explicit_location_info explicit_locations[][4],
ir_variable *var,
unsigned location,
unsigned component,
@@ -427,7 +432,7 @@ check_location_aliasing(ir_variable
*explicit_locations[][4],
while (location < location_limit) {
unsigned i = component;
while (i < last_comp) {
- if (explicit_locations[location][i] != NULL) {
+ if (explicit_locations[location][i].var != NULL) {
linker_error(prog,
"%s shader has multiple outputs explicitly "
"assigned to location %d and component %d\n",
@@ -439,9 +444,9 @@ check_location_aliasing(ir_variable
*explicit_locations[][4],
/* Make sure all component at this location have the same type.
*/
for (unsigned j = 0; j < 4; j++) {
-if (explicit_locations[location][j] &&
-(explicit_locations[location][j]->type->without_array()
- ->base_type != type->without_array()->base_type)) {
+if (explicit_locations[location][j].var &&
+explicit_locations[location][j].base_type !=
+ type->without_array()->base_type) {
linker_error(prog,
"Varyings sharing the same location must "
"have the same underlying numerical type. "
@@ -450,7 +455,9 @@ check_location_aliasing(ir_variable
*explicit_locations[][4],
}
}
- explicit_locations[location][i] = var;
+ explicit_locations[location][i].var = var;
+ explicit_locations[location][i].base_type =
+type->without_array()->base_type;
i++;
/* We need to do some special handling for doubles as dvec3 and
@@ -482,8 +489,7 @@ cross_validate_outputs_to_inputs(struct gl_context *ctx,
gl
Mesa (master): glsl/linker: refactor check_location_aliasing
Module: Mesa
Branch: master
Commit: 7276ccf8edb0a1ba610cc07edf73b1f0cecaa1f6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7276ccf8edb0a1ba610cc07edf73b1f0cecaa1f6
Author: Iago Toral Quiroga
Date: Wed Oct 25 08:45:24 2017 +0200
glsl/linker: refactor check_location_aliasing
Mostly, this merges the type checks with all the other checks so
we only have a single loop for this.
Acked-by: Ilia Mirkin
---
src/compiler/glsl/link_varyings.cpp | 110 +++-
1 file changed, 46 insertions(+), 64 deletions(-)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index e80736fb38..7b1fe255b6 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -438,92 +438,74 @@ check_location_aliasing(struct explicit_location_info
explicit_locations[][4],
}
while (location < location_limit) {
- unsigned i = component;
-
- /* If there are other outputs assigned to the same location
- * they must have the same interpolation
- */
unsigned comp = 0;
while (comp < 4) {
- /* Skip the components used by this output, we only care about
- * other outputs in the same location
- */
- if (comp == i) {
-comp = last_comp;
-continue;
- }
-
struct explicit_location_info *info =
&explicit_locations[location][comp];
if (info->var) {
-if (info->interpolation != interpolation) {
+/* Component aliasing is not alloed */
+if (comp >= component && comp < last_comp) {
linker_error(prog,
-"%s shader has multiple outputs at explicit "
-"location %u with different interpolation "
-"settings\n",
-_mesa_shader_stage_to_string(stage), location);
+"%s shader has multiple outputs explicitly "
+"assigned to location %d and component %d\n",
+_mesa_shader_stage_to_string(stage),
+location, comp);
return false;
-}
-
-if (info->centroid != centroid ||
-info->sample != sample ||
-info->patch != patch) {
- linker_error(prog,
-"%s shader has multiple outputs at explicit "
-"location %u with different aux storage\n",
-_mesa_shader_stage_to_string(stage), location);
- return false;
-}
- }
-
- comp++;
- }
+} else {
+ /* For all other used components we need to have matching
+* types, interpolation and auxiliary storage
+*/
+ if (info->base_type != type->without_array()->base_type) {
+ linker_error(prog,
+ "Varyings sharing the same location must "
+ "have the same underlying numerical type. "
+ "Location %u component %u\n",
+ location, comp);
+ return false;
+ }
- /* Component aliasing is not allowed */
- while (i < last_comp) {
- if (explicit_locations[location][i].var != NULL) {
-linker_error(prog,
- "%s shader has multiple outputs explicitly "
- "assigned to location %d and component %d\n",
- _mesa_shader_stage_to_string(stage),
- location, component);
-return false;
- }
+ if (info->interpolation != interpolation) {
+ linker_error(prog,
+ "%s shader has multiple outputs at explicit "
+ "location %u with different interpolation "
+ "settings\n",
+ _mesa_shader_stage_to_string(stage), location);
+ return false;
+ }
- /* Make sure all component at this location have the same type.
- */
- for (unsigned j = 0; j < 4; j++) {
-if (explicit_locations[location][j].var &&
-explicit_locations[location][j].base_type !=
- type->without_array()->base_type) {
- linker_error(prog,
-"Varyings sharing the same location must "
-"have the same underlying numerical type. "
-"Location %u component %u\n", location, component);
- return false;
+ if (info->centroid != centroid ||
+ info->sample != sample ||
+ info->patch != patch) {
+ linker
Mesa (master): glsl/linker: outputs in the same location must share interpolation
Module: Mesa
Branch: master
Commit: 0b565f715d24d74d844f0708e3ed17ad1ee14faf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b565f715d24d74d844f0708e3ed17ad1ee14faf
Author: Iago Toral Quiroga
Date: Thu Oct 19 16:13:21 2017 +0200
glsl/linker: outputs in the same location must share interpolation
From ARB_enhanced_layouts:
"[...]when location aliasing, the aliases sharing the location
must have the same underlying numerical type (floating-point or
integer) and the same auxiliary storage and
interpolation qualification.[...]"
Add code to the linker to validate that aliased locations do
have the same interpolation.
Fixes:
KHR-GL45.enhanced_layouts.varying_location_aliasing_with_mixed_interpolation
Reviewed-by: Timothy Arceri
---
src/compiler/glsl/link_varyings.cpp | 45 +
1 file changed, 41 insertions(+), 4 deletions(-)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index 1db851b7e9..9542754600 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -406,6 +406,7 @@ compute_variable_location_slot(ir_variable *var,
gl_shader_stage stage)
struct explicit_location_info {
ir_variable *var;
unsigned base_type;
+ unsigned interpolation;
};
static bool
@@ -415,6 +416,7 @@ check_location_aliasing(struct explicit_location_info
explicit_locations[][4],
unsigned component,
unsigned location_limit,
const glsl_type *type,
+unsigned interpolation,
gl_shader_program *prog,
gl_shader_stage stage)
{
@@ -431,6 +433,38 @@ check_location_aliasing(struct explicit_location_info
explicit_locations[][4],
while (location < location_limit) {
unsigned i = component;
+
+ /* If there are other outputs assigned to the same location
+ * they must have the same interpolation
+ */
+ unsigned comp = 0;
+ while (comp < 4) {
+ /* Skip the components used by this output, we only care about
+ * other outputs in the same location
+ */
+ if (comp == i) {
+comp = last_comp;
+continue;
+ }
+
+ struct explicit_location_info *info =
+&explicit_locations[location][comp];
+
+ if (info->var) {
+if (info->interpolation != interpolation) {
+ linker_error(prog,
+"%s shader has multiple outputs at explicit "
+"location %u with different interpolation "
+"settings\n",
+_mesa_shader_stage_to_string(stage), location);
+ return false;
+}
+ }
+
+ comp++;
+ }
+
+ /* Component aliasing is not allowed */
while (i < last_comp) {
if (explicit_locations[location][i].var != NULL) {
linker_error(prog,
@@ -458,6 +492,7 @@ check_location_aliasing(struct explicit_location_info
explicit_locations[][4],
explicit_locations[location][i].var = var;
explicit_locations[location][i].base_type =
type->without_array()->base_type;
+ explicit_locations[location][i].interpolation = interpolation;
i++;
/* We need to do some special handling for doubles as dvec3 and
@@ -526,18 +561,20 @@ cross_validate_outputs_to_inputs(struct gl_context *ctx,
unsigned field_location = type->fields.structure[i].location -
(type->fields.structure[i].patch ? VARYING_SLOT_PATCH0 :
VARYING_SLOT_VAR0);
+ unsigned interpolation =
type->fields.structure[i].interpolation;
if (!check_location_aliasing(explicit_locations, var,
field_location,
0, field_location + 1,
-field_type, prog,
-producer->Stage)) {
+field_type, interpolation,
+prog, producer->Stage)) {
return;
}
}
} else if (!check_location_aliasing(explicit_locations, var,
idx, var->data.location_frac,
- slot_limit, type, prog,
- producer->Stage)) {
+ slot_limit, type,
+ var->data.interpolation,
+ prog, producer->Stage)) {
return;
}
}
___
mesa-commit mailing list
mesa-commit@
Mesa (master): glsl/linker: Fix type checks for location aliasing
Module: Mesa
Branch: master
Commit: 13652e7516a3ef75c5ae75ffa5c7f048629bf772
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=13652e7516a3ef75c5ae75ffa5c7f048629bf772
Author: Iago Toral Quiroga
Date: Wed Oct 25 09:14:22 2017 +0200
glsl/linker: Fix type checks for location aliasing
From the OpenGL 4.6 spec, section 4.4.1 Input Layout Qualifiers, Page 68,
(Location aliasing):
"Further, when location aliasing, the aliases sharing the location
must have the same underlying numerical type (floating-point or
integer)."
The current implementation is too strict, since it checks that the
the base types are an exact match instead.
Reviewed-by: Ilia Mirkin
---
src/compiler/glsl/link_varyings.cpp | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/src/compiler/glsl/link_varyings.cpp
b/src/compiler/glsl/link_varyings.cpp
index 7b1fe255b6..70e4b8c7f7 100644
--- a/src/compiler/glsl/link_varyings.cpp
+++ b/src/compiler/glsl/link_varyings.cpp
@@ -405,13 +405,28 @@ compute_variable_location_slot(ir_variable *var,
gl_shader_stage stage)
struct explicit_location_info {
ir_variable *var;
- unsigned base_type;
+ unsigned numerical_type;
unsigned interpolation;
bool centroid;
bool sample;
bool patch;
};
+static inline unsigned
+get_numerical_type(const glsl_type *type)
+{
+ /* From the OpenGL 4.6 spec, section 4.4.1 Input Layout Qualifiers, Page 68,
+* (Location aliasing):
+*
+*"Further, when location aliasing, the aliases sharing the location
+* must have the same underlying numerical type (floating-point or
+* integer)
+*/
+ if (type->is_float() || type->is_double())
+ return GLSL_TYPE_FLOAT;
+ return GLSL_TYPE_INT;
+}
+
static bool
check_location_aliasing(struct explicit_location_info explicit_locations[][4],
ir_variable *var,
@@ -456,7 +471,8 @@ check_location_aliasing(struct explicit_location_info
explicit_locations[][4],
/* For all other used components we need to have matching
* types, interpolation and auxiliary storage
*/
- if (info->base_type != type->without_array()->base_type) {
+ if (info->numerical_type !=
+ get_numerical_type(type->without_array())) {
linker_error(prog,
"Varyings sharing the same location must "
"have the same underlying numerical type. "
@@ -486,7 +502,7 @@ check_location_aliasing(struct explicit_location_info
explicit_locations[][4],
}
} else if (comp >= component && comp < last_comp) {
info->var = var;
-info->base_type = type->without_array()->base_type;
+info->numerical_type = get_numerical_type(type->without_array());
info->interpolation = interpolation;
info->centroid = centroid;
info->sample = sample;
___
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mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ac/llvm: consolidate find lsb function.
Module: Mesa
Branch: master
Commit: 82d47b9d38f22bc26001253de7996b9b372e9d0c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=82d47b9d38f22bc26001253de7996b9b372e9d0c
Author: Dave Airlie
Date: Thu Oct 26 15:28:41 2017 +1000
ac/llvm: consolidate find lsb function.
This was the same between si and ac.
Reviewed-by: Timothy Arceri
Signed-off-by: Dave Airlie
---
src/amd/common/ac_llvm_build.c| 31 +++
src/amd/common/ac_llvm_build.h| 4 +++
src/amd/common/ac_nir_to_llvm.c | 30 +-
src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 27 ++--
4 files changed, 38 insertions(+), 54 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index e54806a33f..ea238fa006 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -1774,3 +1774,34 @@ void ac_lds_store(struct ac_llvm_context *ctx,
ac_build_indexed_store(ctx, ctx->lds,
dw_addr, value);
}
+
+LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
+LLVMTypeRef dst_type,
+LLVMValueRef src0)
+{
+ LLVMValueRef params[2] = {
+ src0,
+
+ /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
+* add special code to check for x=0. The reason is that
+* the LLVM behavior for x=0 is different from what we
+* need here. However, LLVM also assumes that ffs(x) is
+* in [0, 31], but GLSL expects that ffs(0) = -1, so
+* a conditional assignment to handle 0 is still required.
+*
+* The hardware already implements the correct behavior.
+*/
+ LLVMConstInt(ctx->i1, 1, false),
+ };
+
+ LLVMValueRef lsb = ac_build_intrinsic(ctx, "llvm.cttz.i32", ctx->i32,
+ params, 2,
+ AC_FUNC_ATTR_READNONE);
+
+ /* TODO: We need an intrinsic to skip this conditional. */
+ /* Check for zero: */
+ return LLVMBuildSelect(ctx->builder, LLVMBuildICmp(ctx->builder,
+ LLVMIntEQ, src0,
+ ctx->i32_0, ""),
+ LLVMConstInt(ctx->i32, -1, 0), lsb, "");
+}
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index b47d51aceb..f790619827 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -297,6 +297,10 @@ LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
LLVMValueRef dw_addr);
void ac_lds_store(struct ac_llvm_context *ctx,
LLVMValueRef dw_addr, LLVMValueRef value);
+
+LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
+LLVMTypeRef dst_type,
+LLVMValueRef src0);
#ifdef __cplusplus
}
#endif
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index f78f4863a7..01677558d8 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -1227,34 +1227,6 @@ static LLVMValueRef emit_bcsel(struct ac_llvm_context
*ctx,
return LLVMBuildSelect(ctx->builder, v, src1, src2, "");
}
-static LLVMValueRef emit_find_lsb(struct ac_llvm_context *ctx,
- LLVMValueRef src0)
-{
- LLVMValueRef params[2] = {
- src0,
-
- /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
-* add special code to check for x=0. The reason is that
-* the LLVM behavior for x=0 is different from what we
-* need here.
-*
-* The hardware already implements the correct behavior.
-*/
- LLVMConstInt(ctx->i1, 1, false),
- };
-
- LLVMValueRef lsb = ac_build_intrinsic(ctx, "llvm.cttz.i32", ctx->i32,
- params, 2,
- AC_FUNC_ATTR_READNONE);
-
- /* TODO: We need an intrinsic to skip this conditional. */
- /* Check for zero: */
- return LLVMBuildSelect(ctx->builder, LLVMBuildICmp(ctx->builder,
- LLVMIntEQ, src0,
- ctx->i32_0, ""),
- LLVMConstInt(ctx->i32, -1, 0), lsb, "");
-}
-
static LLVMValueRef emit_ifind_msb(struct ac_llvm_context *ctx,
LLVMValueRef src0)
{
@@ -1895,7 +1867,7 @@ static void visit_alu(struct ac_nir_context *ctx, const
nir_alu_instr *instr)
break;
case nir_op_find_lsb:
src[0] = ac_to_integer(&ctx->ac, src[0]);
-
Mesa (master): ac/llvm: add i1false/i1true to common code.
Module: Mesa
Branch: master
Commit: a76b6c2192f073135d62d45c24fd0fedd8d36258
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a76b6c2192f073135d62d45c24fd0fedd8d36258
Author: Dave Airlie
Date: Thu Oct 26 15:20:15 2017 +1000
ac/llvm: add i1false/i1true to common code.
These get used in fair few places.
Reviewed-by: Timothy Arceri
Signed-off-by: Dave Airlie
---
src/amd/common/ac_llvm_build.c | 15 ++-
src/amd/common/ac_llvm_build.h | 2 ++
src/amd/common/ac_nir_to_llvm.c | 57 -
3 files changed, 33 insertions(+), 41 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 7e370845f3..e54806a33f 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -75,6 +75,9 @@ ac_llvm_context_init(struct ac_llvm_context *ctx,
LLVMContextRef context,
ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
+ ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
+ ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
+
ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
"range", 5);
@@ -946,8 +949,8 @@ LLVMValueRef ac_build_buffer_load_format(struct
ac_llvm_context *ctx,
LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
vindex,
voffset,
- LLVMConstInt(ctx->i1, 0, 0), /* glc */
- LLVMConstInt(ctx->i1, 0, 0), /* slc */
+ ctx->i1false, /* glc */
+ ctx->i1false, /* slc */
};
return ac_build_intrinsic(ctx,
@@ -1150,7 +1153,7 @@ ac_build_umsb(struct ac_llvm_context *ctx,
{
LLVMValueRef args[2] = {
arg,
- LLVMConstInt(ctx->i1, 1, 0),
+ ctx->i1true,
};
LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.ctlz.i32",
dst_type, args, ARRAY_SIZE(args),
@@ -1276,9 +1279,9 @@ LLVMValueRef ac_build_image_opcode(struct ac_llvm_context
*ctx,
args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
if (sample)
args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, 0);
- args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* glc */
- args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* slc */
- args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* lwe */
+ args[num_args++] = ctx->i1false; /* glc */
+ args[num_args++] = ctx->i1false; /* slc */
+ args[num_args++] = ctx->i1false; /* lwe */
args[num_args++] = LLVMConstInt(ctx->i1, a->da, 0);
switch (a->opcode) {
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 7d57b8bd76..b47d51aceb 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -60,6 +60,8 @@ struct ac_llvm_context {
LLVMValueRef i32_1;
LLVMValueRef f32_0;
LLVMValueRef f32_1;
+ LLVMValueRef i1true;
+ LLVMValueRef i1false;
unsigned range_md_kind;
unsigned invariant_load_md_kind;
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 00a3ec24cd..9713c066a2 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -150,8 +150,6 @@ struct nir_to_llvm_context {
LLVMTypeRef v4f32;
LLVMTypeRef voidt;
- LLVMValueRef i1true;
- LLVMValueRef i1false;
LLVMValueRef v4f32empty;
unsigned uniform_md_kind;
@@ -1019,9 +1017,6 @@ static void setup_types(struct nir_to_llvm_context *ctx)
ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
- ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
- ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
-
args[0] = ctx->ac.f32_0;
args[1] = ctx->ac.f32_0;
args[2] = ctx->ac.f32_0;
@@ -2346,13 +2341,12 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
unsigned writemask = nir_intrinsic_write_mask(instr);
LLVMValueRef base_data, base_offset;
LLVMValueRef params[6];
- LLVMValueRef i1false = LLVMConstInt(ctx->ac.i1, 0, false);
params[1] = ctx->abi->load_ssbo(ctx->abi,
get_src(ctx, instr->src[1]), true);
params[2] = LLVMConstInt(ctx->ac.i32, 0, false); /* vindex */
- params[4] = i1false; /* glc */
- params[5] = i1false; /* slc */
+ params[4] = ctx->ac.i1false; /* glc */
+ params[5] = ctx->ac.i1false; /* slc */
if (components_32bit > 1)
data_type = LLVMVectorType(ctx->ac.f32, components_32bit);
@@ -2508,15 +2502,14 @@ static LLVMValueRef visit_load_buffer(struct
ac_nir_context *ctx,
else
unreacha
Mesa (master): ac/llvm: use the ac i32 0/1 and f32 0/1 llvm types.
Module: Mesa
Branch: master
Commit: 88b7ddbe654b51c5be0f031fbae25e50ae5d9d30
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=88b7ddbe654b51c5be0f031fbae25e50ae5d9d30
Author: Dave Airlie
Date: Thu Oct 26 15:13:25 2017 +1000
ac/llvm: use the ac i32 0/1 and f32 0/1 llvm types.
This just avoids having two copies of these.
Reviewed-by: Timothy Arceri
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 112 +++-
1 file changed, 52 insertions(+), 60 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index cbd646e10f..00a3ec24cd 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -152,10 +152,6 @@ struct nir_to_llvm_context {
LLVMValueRef i1true;
LLVMValueRef i1false;
- LLVMValueRef i32zero;
- LLVMValueRef i32one;
- LLVMValueRef f32zero;
- LLVMValueRef f32one;
LLVMValueRef v4f32empty;
unsigned uniform_md_kind;
@@ -1025,15 +1021,11 @@ static void setup_types(struct nir_to_llvm_context *ctx)
ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
- ctx->i32zero = LLVMConstInt(ctx->i32, 0, false);
- ctx->i32one = LLVMConstInt(ctx->i32, 1, false);
- ctx->f32zero = LLVMConstReal(ctx->f32, 0.0);
- ctx->f32one = LLVMConstReal(ctx->f32, 1.0);
-
- args[0] = ctx->f32zero;
- args[1] = ctx->f32zero;
- args[2] = ctx->f32zero;
- args[3] = ctx->f32one;
+
+ args[0] = ctx->ac.f32_0;
+ args[1] = ctx->ac.f32_0;
+ args[2] = ctx->ac.f32_0;
+ args[3] = ctx->ac.f32_1;
ctx->v4f32empty = LLVMConstVector(args, 4);
ctx->uniform_md_kind =
@@ -1416,7 +1408,7 @@ static LLVMValueRef emit_f2f16(struct nir_to_llvm_context
*ctx,
result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
if (ctx->options->chip_class >= VI)
- result = LLVMBuildSelect(ctx->builder, cond, ctx->f32zero,
result, "");
+ result = LLVMBuildSelect(ctx->builder, cond, ctx->ac.f32_0,
result, "");
else {
/* for SI/CIK */
/* 0x3880 is smallest half float value (2^-14) in 32-bit
float,
@@ -1429,9 +1421,9 @@ static LLVMValueRef emit_f2f16(struct nir_to_llvm_context
*ctx,
LLVMBuildBitCast(ctx->builder,
LLVMConstInt(ctx->i32, 0x3880, false), ctx->f32, ""),
temp, "");
cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
- temp, ctx->f32zero, "");
+ temp, ctx->ac.f32_0, "");
cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
- result = LLVMBuildSelect(ctx->builder, cond, ctx->f32zero,
result, "");
+ result = LLVMBuildSelect(ctx->builder, cond, ctx->ac.f32_0,
result, "");
}
return result;
}
@@ -2838,7 +2830,7 @@ load_tcs_input(struct nir_to_llvm_context *ctx,
for (unsigned i = 0; i < instr->num_components + comp; i++) {
value[i] = ac_lds_load(&ctx->ac, dw_addr);
dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
- ctx->i32one, "");
+ ctx->ac.i32_1, "");
}
result = build_varying_gather_values(&ctx->ac, value,
instr->num_components, comp);
result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx->nir,
&instr->dest.ssa), "");
@@ -2877,7 +2869,7 @@ load_tcs_output(struct nir_to_llvm_context *ctx,
for (unsigned i = comp; i < instr->num_components + comp; i++) {
value[i] = ac_lds_load(&ctx->ac, dw_addr);
dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
- ctx->i32one, "");
+ ctx->ac.i32_1, "");
}
result = build_varying_gather_values(&ctx->ac, value,
instr->num_components, comp);
result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx->nir,
&instr->dest.ssa), "");
@@ -2945,7 +2937,7 @@ store_tcs_output(struct nir_to_llvm_context *ctx,
4 * (base + chan), 1, 0,
true, false);
dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
- ctx->i32one, "");
+ ctx->ac.i32_1, "");
}
if (writemask == 0xF) {
@@ -3023,12 +3015,12 @@ load_gs_input(struct nir_to_llvm_context *ctx,
args[0] = ctx->esgs_ring;
args[1] = vtx_offset;
args[2] = LLVMConstInt(ctx->i32, (param * 4 + i +
const_index) * 256, false);
- args[3] = ctx->i32zero;
- args[4] = ctx->i32one; /* OFFEN */
- args[5
Mesa (master): ac/nir: move lds declaration/load/store into shared code.
Module: Mesa
Branch: master
Commit: f925f5b074b2ed22c44cc715aaacc554df904317
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f925f5b074b2ed22c44cc715aaacc554df904317
Author: Dave Airlie
Date: Thu Oct 26 14:43:51 2017 +1000
ac/nir: move lds declaration/load/store into shared code.
This was duplicated between both drivers, share here.
Reviewed-by: Timothy Arceri
Signed-off-by: Dave Airlie
---
src/amd/common/ac_llvm_build.c| 23 ++
src/amd/common/ac_llvm_build.h| 12 +
src/amd/common/ac_nir_to_llvm.c | 56 ++-
src/gallium/drivers/radeonsi/si_shader.c | 20 ++--
src/gallium/drivers/radeonsi/si_shader_internal.h | 1 -
5 files changed, 55 insertions(+), 57 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 80b027e8b0..7e370845f3 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -1748,3 +1748,26 @@ void ac_init_exec_full_mask(struct ac_llvm_context *ctx)
"llvm.amdgcn.init.exec", ctx->voidt,
&full_mask, 1, AC_FUNC_ATTR_CONVERGENT);
}
+
+void ac_declare_lds_as_pointer(struct ac_llvm_context *ctx)
+{
+ unsigned lds_size = ctx->chip_class >= CIK ? 65536 : 32768;
+ ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32_0,
+LLVMPointerType(LLVMArrayType(ctx->i32,
lds_size / 4), AC_LOCAL_ADDR_SPACE),
+"lds");
+}
+
+LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
+LLVMValueRef dw_addr)
+{
+ return ac_build_load(ctx, ctx->lds, dw_addr);
+}
+
+void ac_lds_store(struct ac_llvm_context *ctx,
+ LLVMValueRef dw_addr,
+ LLVMValueRef value)
+{
+ value = ac_to_integer(ctx, value);
+ ac_build_indexed_store(ctx, ctx->lds,
+ dw_addr, value);
+}
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 996f55862b..7d57b8bd76 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -34,6 +34,10 @@
extern "C" {
#endif
+enum {
+ AC_LOCAL_ADDR_SPACE = 3,
+};
+
struct ac_llvm_context {
LLVMContextRef context;
LLVMModuleRef module;
@@ -65,6 +69,8 @@ struct ac_llvm_context {
LLVMValueRef empty_md;
enum chip_class chip_class;
+
+ LLVMValueRef lds;
};
void
@@ -283,6 +289,12 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ac,
uint32_t num_outputs,
uint8_t *num_param_exports);
void ac_init_exec_full_mask(struct ac_llvm_context *ctx);
+
+void ac_declare_lds_as_pointer(struct ac_llvm_context *ac);
+LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
+LLVMValueRef dw_addr);
+void ac_lds_store(struct ac_llvm_context *ctx,
+ LLVMValueRef dw_addr, LLVMValueRef value);
#ifdef __cplusplus
}
#endif
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 06937d684b..cbd646e10f 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -162,7 +162,6 @@ struct nir_to_llvm_context {
LLVMValueRef empty_md;
gl_shader_stage stage;
- LLVMValueRef lds;
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
uint64_t input_mask;
@@ -548,14 +547,6 @@ static void set_userdata_location_indirect(struct
ac_userdata_info *ud_info, uin
ud_info->indirect_offset = indirect_offset;
}
-static void declare_tess_lds(struct nir_to_llvm_context *ctx)
-{
- unsigned lds_size = ctx->options->chip_class >= CIK ? 65536 : 32768;
- ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32zero,
-LLVMPointerType(LLVMArrayType(ctx->i32,
lds_size / 4), LOCAL_ADDR_SPACE),
- "tess_lds");
-}
-
struct user_sgpr_info {
bool need_ring_offsets;
uint8_t sgpr_count;
@@ -971,7 +962,7 @@ static void create_function(struct nir_to_llvm_context *ctx,
set_userdata_location_shader(ctx,
AC_UD_VS_LS_TCS_IN_LAYOUT, &user_sgpr_idx, 1);
}
if (ctx->options->key.vs.as_ls)
- declare_tess_lds(ctx);
+ ac_declare_lds_as_pointer(&ctx->ac);
break;
case MESA_SHADER_TESS_CTRL:
radv_define_vs_user_sgprs_phase2(ctx, stage,
has_previous_stage, previous_stage, &user_sgpr_idx);
@@ -980,7 +971,7 @@ static void create_function(struct nir_to_llvm_context *ctx,
set_userdata_location_shader(ctx, AC_UD_TCS_OFFCHIP_LAYOUT,
&user_sgpr_idx, 4);
if (ctx->view_index)
set_userdata_location_shader(ctx, AC_UD_VIEW_INDEX,
&user_sgpr_idx, 1);
- declare_tess_lds(ctx);
+ ac_declare_lds_as
Mesa (master): ac/llvm: drop pointless wrappers around umsb/imsb
Module: Mesa
Branch: master
Commit: 16cfbef44cf0b196992bd06cb3521e70d1903033
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=16cfbef44cf0b196992bd06cb3521e70d1903033
Author: Dave Airlie
Date: Thu Oct 26 15:30:33 2017 +1000
ac/llvm: drop pointless wrappers around umsb/imsb
Reviewed-by: Timothy Arceri
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 16 ++--
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 01677558d8..a736d34d12 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -1227,18 +1227,6 @@ static LLVMValueRef emit_bcsel(struct ac_llvm_context
*ctx,
return LLVMBuildSelect(ctx->builder, v, src1, src2, "");
}
-static LLVMValueRef emit_ifind_msb(struct ac_llvm_context *ctx,
- LLVMValueRef src0)
-{
- return ac_build_imsb(ctx, src0, ctx->i32);
-}
-
-static LLVMValueRef emit_ufind_msb(struct ac_llvm_context *ctx,
- LLVMValueRef src0)
-{
- return ac_build_umsb(ctx, src0, ctx->i32);
-}
-
static LLVMValueRef emit_minmax_int(struct ac_llvm_context *ctx,
LLVMIntPredicate pred,
LLVMValueRef src0, LLVMValueRef src1)
@@ -1871,11 +1859,11 @@ static void visit_alu(struct ac_nir_context *ctx, const
nir_alu_instr *instr)
break;
case nir_op_ufind_msb:
src[0] = ac_to_integer(&ctx->ac, src[0]);
- result = emit_ufind_msb(&ctx->ac, src[0]);
+ result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
break;
case nir_op_ifind_msb:
src[0] = ac_to_integer(&ctx->ac, src[0]);
- result = emit_ifind_msb(&ctx->ac, src[0]);
+ result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
break;
case nir_op_uadd_carry:
src[0] = ac_to_integer(&ctx->ac, src[0]);
___
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Mesa (master): ac/llvm: drop v4f32empty. (v2)
Module: Mesa
Branch: master
Commit: de2b24a0d89bf4298cca8f19e9a11b8fdb6c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de2b24a0d89bf4298cca8f19e9a11b8fdb6c
Author: Dave Airlie
Date: Thu Oct 26 15:21:44 2017 +1000
ac/llvm: drop v4f32empty. (v2)
This was unused.
v2: drop args.
Reviewed-by: Timothy Arceri
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 12
1 file changed, 12 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9713c066a2..f78f4863a7 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -150,8 +150,6 @@ struct nir_to_llvm_context {
LLVMTypeRef v4f32;
LLVMTypeRef voidt;
- LLVMValueRef v4f32empty;
-
unsigned uniform_md_kind;
LLVMValueRef empty_md;
gl_shader_stage stage;
@@ -999,8 +997,6 @@ static void create_function(struct nir_to_llvm_context *ctx,
static void setup_types(struct nir_to_llvm_context *ctx)
{
- LLVMValueRef args[4];
-
ctx->voidt = LLVMVoidTypeInContext(ctx->context);
ctx->i1 = LLVMIntTypeInContext(ctx->context, 1);
ctx->i8 = LLVMIntTypeInContext(ctx->context, 8);
@@ -1017,17 +1013,9 @@ static void setup_types(struct nir_to_llvm_context *ctx)
ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
- args[0] = ctx->ac.f32_0;
- args[1] = ctx->ac.f32_0;
- args[2] = ctx->ac.f32_0;
- args[3] = ctx->ac.f32_1;
- ctx->v4f32empty = LLVMConstVector(args, 4);
-
ctx->uniform_md_kind =
LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
-
- args[0] = LLVMConstReal(ctx->f32, 2.5);
}
static int get_llvm_num_components(LLVMValueRef value)
___
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Mesa (master): st/mesa: enable nir path for all shaders.
Module: Mesa
Branch: master
Commit: 74fc9e9186389df1d94d82e919b5ae1576d7d68a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=74fc9e9186389df1d94d82e919b5ae1576d7d68a
Author: Dave Airlie
Date: Mon Oct 23 23:43:31 2017 +0100
st/mesa: enable nir path for all shaders.
There is no reason to block this here, if a driver enables
it, let it handle it.
Reviewed-by: Timothy Arceri
Signed-off-by: Dave Airlie
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index aa225df63d..eaed052a17 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -6973,15 +6973,7 @@ st_link_shader(struct gl_context *ctx, struct
gl_shader_program *prog)
struct gl_program *linked_prog = NULL;
if (preferred_ir == PIPE_SHADER_IR_NIR) {
- /* TODO only for GLSL VS/FS/CS for now: */
- switch (shader->Stage) {
- case MESA_SHADER_VERTEX:
- case MESA_SHADER_FRAGMENT:
- case MESA_SHADER_COMPUTE:
-linked_prog = st_nir_get_mesa_program(ctx, prog, shader);
- default:
-break;
- }
+ linked_prog = st_nir_get_mesa_program(ctx, prog, shader);
} else {
linked_prog = get_mesa_program_tgsi(ctx, prog, shader);
}
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Mesa (master): st/program: add support for gs/tes/tcs nir shaders.
Module: Mesa
Branch: master
Commit: 3ee2e98aff4fa626d61f2e45bf25bd76d4f5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ee2e98aff4fa626d61f2e45bf25bd76d4f5
Author: Dave Airlie
Date: Mon Oct 23 06:48:30 2017 +0100
st/program: add support for gs/tes/tcs nir shaders.
This probably needs more work but this just add the initial
code to convert gs/tcs/tes nir based shaders in the state tracker.
Reviewed-by: Timothy Arceri
Signed-off-by: Dave Airlie
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 12 +
src/mesa/state_tracker/st_program.c | 45 ---
src/mesa/state_tracker/st_program.h | 3 +++
3 files changed, 56 insertions(+), 4 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index 4effd8074e..e9a8d6414e 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -359,6 +359,11 @@ st_finalize_nir(struct st_context *st, struct gl_program
*prog, nir_shader *nir)
case MESA_SHADER_VERTEX:
shader_program = ((struct st_vertex_program *)prog)->shader_program;
break;
+ case MESA_SHADER_GEOMETRY:
+ case MESA_SHADER_TESS_CTRL:
+ case MESA_SHADER_TESS_EVAL:
+ shader_program = ((struct st_common_program *)prog)->shader_program;
+ break;
case MESA_SHADER_FRAGMENT:
shader_program = ((struct st_fragment_program *)prog)->shader_program;
break;
@@ -451,6 +456,7 @@ st_nir_get_mesa_program(struct gl_context *ctx,
_mesa_associate_uniform_storage(ctx, shader_program, prog, true);
struct st_vertex_program *stvp;
+ struct st_common_program *stp;
struct st_fragment_program *stfp;
struct st_compute_program *stcp;
@@ -459,6 +465,12 @@ st_nir_get_mesa_program(struct gl_context *ctx,
stvp = (struct st_vertex_program *)prog;
stvp->shader_program = shader_program;
break;
+ case MESA_SHADER_GEOMETRY:
+ case MESA_SHADER_TESS_CTRL:
+ case MESA_SHADER_TESS_EVAL:
+ stp = (struct st_common_program *)prog;
+ stp->shader_program = shader_program;
+ break;
case MESA_SHADER_FRAGMENT:
stfp = (struct st_fragment_program *)prog;
stfp->shader_program = shader_program;
diff --git a/src/mesa/state_tracker/st_program.c
b/src/mesa/state_tracker/st_program.c
index 1695f4835d..335d45ba28 100644
--- a/src/mesa/state_tracker/st_program.c
+++ b/src/mesa/state_tracker/st_program.c
@@ -1576,6 +1576,16 @@ st_translate_geometry_program(struct st_context *st,
{
struct ureg_program *ureg;
+ if (stgp->shader_program) {
+ nir_shader *nir = st_glsl_to_nir(st, &stgp->Base, stgp->shader_program,
+ MESA_SHADER_GEOMETRY);
+
+ stgp->tgsi.type = PIPE_SHADER_IR_NIR;
+ stgp->tgsi.ir.nir = nir;
+
+ return true;
+ }
+
ureg = ureg_create_with_screen(PIPE_SHADER_GEOMETRY, st->pipe->screen);
if (ureg == NULL)
return false;
@@ -1609,7 +1619,7 @@ st_get_basic_variant(struct st_context *st,
struct pipe_context *pipe = st->pipe;
struct st_basic_variant *v;
struct st_basic_variant_key key;
-
+ struct pipe_shader_state tgsi = {0};
memset(&key, 0, sizeof(key));
key.st = st->has_shareable_shaders ? NULL : st;
@@ -1624,16 +1634,23 @@ st_get_basic_variant(struct st_context *st,
/* create new */
v = CALLOC_STRUCT(st_basic_variant);
if (v) {
+
+if (prog->tgsi.type == PIPE_SHADER_IR_NIR) {
+ tgsi.type = PIPE_SHADER_IR_NIR;
+ tgsi.ir.nir = nir_shader_clone(NULL, prog->tgsi.ir.nir);
+ st_finalize_nir(st, &prog->Base, tgsi.ir.nir);
+} else
+ tgsi = prog->tgsi;
/* fill in new variant */
switch (pipe_shader) {
case PIPE_SHADER_TESS_CTRL:
-v->driver_shader = pipe->create_tcs_state(pipe, &prog->tgsi);
+v->driver_shader = pipe->create_tcs_state(pipe, &tgsi);
break;
case PIPE_SHADER_TESS_EVAL:
-v->driver_shader = pipe->create_tes_state(pipe, &prog->tgsi);
+v->driver_shader = pipe->create_tes_state(pipe, &tgsi);
break;
case PIPE_SHADER_GEOMETRY:
-v->driver_shader = pipe->create_gs_state(pipe, &prog->tgsi);
+v->driver_shader = pipe->create_gs_state(pipe, &tgsi);
break;
default:
assert(!"unhandled shader type");
@@ -1662,6 +1679,16 @@ st_translate_tessctrl_program(struct st_context *st,
{
struct ureg_program *ureg;
+ if (sttcp->shader_program) {
+ nir_shader *nir = st_glsl_to_nir(st, &sttcp->Base, sttcp->shader_program,
+ MESA_SHADER_TESS_EVAL);
+
+ sttcp->tgsi.type = PIPE_SHADER_IR_NIR;
+ sttcp->tgsi.ir.nir = nir;
+
+ return true;
+ }
+
ureg = ureg_create_with_screen(PIPE_SHADER_TESS_CTRL, st->pipe->screen);
if (ureg == NULL)
return false;
@@ -
Mesa (master): st/program: rework basic variant interface
Module: Mesa
Branch: master
Commit: 3c34d11589f05e0876a92bd77fd37d3b79a69d35
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c34d11589f05e0876a92bd77fd37d3b79a69d35
Author: Dave Airlie
Date: Mon Oct 23 06:18:37 2017 +0100
st/program: rework basic variant interface
This just passes st_common_program and uses it.
Reviewed-by: Timothy Arceri
Signed-off-by: Dave Airlie
---
src/mesa/state_tracker/st_atom_shader.c | 3 +--
src/mesa/state_tracker/st_program.c | 21 ++---
src/mesa/state_tracker/st_program.h | 3 +--
3 files changed, 12 insertions(+), 15 deletions(-)
diff --git a/src/mesa/state_tracker/st_atom_shader.c
b/src/mesa/state_tracker/st_atom_shader.c
index b5ba33a488..c6faa3f07f 100644
--- a/src/mesa/state_tracker/st_atom_shader.c
+++ b/src/mesa/state_tracker/st_atom_shader.c
@@ -215,8 +215,7 @@ st_update_common_program(struct st_context *st, struct
gl_program *prog,
if (st->shader_has_one_variant[prog->info.stage] && stp->variants)
return stp->variants->driver_shader;
- return st_get_basic_variant(st, pipe_shader, &stp->tgsi,
- &stp->variants)->driver_shader;
+ return st_get_basic_variant(st, pipe_shader, stp)->driver_shader;
}
diff --git a/src/mesa/state_tracker/st_program.c
b/src/mesa/state_tracker/st_program.c
index 41ebfa9003..1695f4835d 100644
--- a/src/mesa/state_tracker/st_program.c
+++ b/src/mesa/state_tracker/st_program.c
@@ -1604,8 +1604,7 @@ st_translate_geometry_program(struct st_context *st,
struct st_basic_variant *
st_get_basic_variant(struct st_context *st,
unsigned pipe_shader,
- struct pipe_shader_state *tgsi,
- struct st_basic_variant **variants)
+ struct st_common_program *prog)
{
struct pipe_context *pipe = st->pipe;
struct st_basic_variant *v;
@@ -1615,7 +1614,7 @@ st_get_basic_variant(struct st_context *st,
key.st = st->has_shareable_shaders ? NULL : st;
/* Search for existing variant */
- for (v = *variants; v; v = v->next) {
+ for (v = prog->variants; v; v = v->next) {
if (memcmp(&v->key, &key, sizeof(key)) == 0) {
break;
}
@@ -1628,13 +1627,13 @@ st_get_basic_variant(struct st_context *st,
/* fill in new variant */
switch (pipe_shader) {
case PIPE_SHADER_TESS_CTRL:
-v->driver_shader = pipe->create_tcs_state(pipe, tgsi);
+v->driver_shader = pipe->create_tcs_state(pipe, &prog->tgsi);
break;
case PIPE_SHADER_TESS_EVAL:
-v->driver_shader = pipe->create_tes_state(pipe, tgsi);
+v->driver_shader = pipe->create_tes_state(pipe, &prog->tgsi);
break;
case PIPE_SHADER_GEOMETRY:
-v->driver_shader = pipe->create_gs_state(pipe, tgsi);
+v->driver_shader = pipe->create_gs_state(pipe, &prog->tgsi);
break;
default:
assert(!"unhandled shader type");
@@ -1645,8 +1644,8 @@ st_get_basic_variant(struct st_context *st,
v->key = key;
/* insert into list */
- v->next = *variants;
- *variants = v;
+ v->next = prog->variants;
+ prog->variants = v;
}
}
@@ -2004,19 +2003,19 @@ st_precompile_shader_variant(struct st_context *st,
case GL_TESS_CONTROL_PROGRAM_NV: {
struct st_common_program *p = st_common_program(prog);
- st_get_basic_variant(st, PIPE_SHADER_TESS_CTRL, &p->tgsi, &p->variants);
+ st_get_basic_variant(st, PIPE_SHADER_TESS_CTRL, p);
break;
}
case GL_TESS_EVALUATION_PROGRAM_NV: {
struct st_common_program *p = st_common_program(prog);
- st_get_basic_variant(st, PIPE_SHADER_TESS_EVAL, &p->tgsi, &p->variants);
+ st_get_basic_variant(st, PIPE_SHADER_TESS_EVAL, p);
break;
}
case GL_GEOMETRY_PROGRAM_NV: {
struct st_common_program *p = st_common_program(prog);
- st_get_basic_variant(st, PIPE_SHADER_GEOMETRY, &p->tgsi, &p->variants);
+ st_get_basic_variant(st, PIPE_SHADER_GEOMETRY, p);
break;
}
diff --git a/src/mesa/state_tracker/st_program.h
b/src/mesa/state_tracker/st_program.h
index 8e9f4c5e82..27cc9b6e92 100644
--- a/src/mesa/state_tracker/st_program.h
+++ b/src/mesa/state_tracker/st_program.h
@@ -384,8 +384,7 @@ st_get_cp_variant(struct st_context *st,
extern struct st_basic_variant *
st_get_basic_variant(struct st_context *st,
unsigned pipe_shader,
- struct pipe_shader_state *tgsi,
- struct st_basic_variant **variants);
+ struct st_common_program *p);
extern void
st_release_vp_variants( struct st_context *st,
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Mesa (master): nir/lower_wpos_ytransform: Support system value intrinsics
Module: Mesa
Branch: master
Commit: 2cfa3ef43872787a654318392ab546bc8b25fd84
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2cfa3ef43872787a654318392ab546bc8b25fd84
Author: Jason Ekstrand
Date: Fri Sep 1 22:10:06 2017 -0700
nir/lower_wpos_ytransform: Support system value intrinsics
Reviewed-by: Lionel Landwerlin
---
src/compiler/nir/nir_lower_wpos_ytransform.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/compiler/nir/nir_lower_wpos_ytransform.c
b/src/compiler/nir/nir_lower_wpos_ytransform.c
index e2a3039241..62166e7874 100644
--- a/src/compiler/nir/nir_lower_wpos_ytransform.c
+++ b/src/compiler/nir/nir_lower_wpos_ytransform.c
@@ -314,6 +314,10 @@ lower_wpos_ytransform_block(lower_wpos_ytransform_state
*state, nir_block *block
assert(dvar->deref.child == NULL);
lower_load_sample_pos(state, intr);
}
+ } else if (intr->intrinsic == nir_intrinsic_load_frag_coord) {
+lower_fragcoord(state, intr);
+ } else if (intr->intrinsic == nir_intrinsic_load_sample_pos) {
+lower_load_sample_pos(state, intr);
} else if (intr->intrinsic == nir_intrinsic_interp_var_at_offset) {
lower_interp_var_at_offset(state, intr);
}
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Mesa (master): anv/pipeline: Drop nir_lower_clip_cull_distance_arrays
Module: Mesa Branch: master Commit: afa0ddb81e693678069c630751e2091eea796937 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=afa0ddb81e693678069c630751e2091eea796937 Author: Jason Ekstrand Date: Fri Sep 1 22:14:59 2017 -0700 anv/pipeline: Drop nir_lower_clip_cull_distance_arrays We already handle it in brw_preprocess_nir Reviewed-by: Lionel Landwerlin --- src/intel/vulkan/anv_pipeline.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 20609248d6..726dfcff4e 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -195,8 +195,6 @@ anv_shader_compile_to_nir(struct anv_pipeline *pipeline, nir = brw_preprocess_nir(compiler, nir); - NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays); - if (stage == MESA_SHADER_FRAGMENT) NIR_PASS_V(nir, anv_nir_lower_input_attachments); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): anv/pipeline: Call nir_lower_system_valaues after brw_preprocess_nir
Module: Mesa Branch: master Commit: 279f8fb69cf68d05287e14f60cf67fc025643bc4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=279f8fb69cf68d05287e14f60cf67fc025643bc4 Author: Jason Ekstrand Date: Mon Oct 2 09:53:50 2017 -0700 anv/pipeline: Call nir_lower_system_valaues after brw_preprocess_nir We currently have a bug where nir_lower_system_values gets called before nir_lower_var_copies so it will miss any system value uses which come from a copy_var intrinsic. Moving it to after brw_preprocess_nir fixes this problem. Reviewed-by: Lionel Landwerlin Cc: mesa-sta...@lists.freedesktop.org --- src/intel/vulkan/anv_pipeline.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 726dfcff4e..9863ec334e 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -188,13 +188,14 @@ anv_shader_compile_to_nir(struct anv_pipeline *pipeline, NIR_PASS_V(nir, nir_propagate_invariant); NIR_PASS_V(nir, nir_lower_io_to_temporaries, entry_point->impl, true, false); - NIR_PASS_V(nir, nir_lower_system_values); /* Vulkan uses the separate-shader linking model */ nir->info.separate_shader = true; nir = brw_preprocess_nir(compiler, nir); + NIR_PASS_V(nir, nir_lower_system_values); + if (stage == MESA_SHADER_FRAGMENT) NIR_PASS_V(nir, anv_nir_lower_input_attachments); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): intel/eu: Use EXECUTE_1 for JMPI
Module: Mesa
Branch: master
Commit: 562b8d458c2de262019da2c056f75cb9feb5ee54
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=562b8d458c2de262019da2c056f75cb9feb5ee54
Author: Jason Ekstrand
Date: Thu Aug 31 11:42:00 2017 -0700
intel/eu: Use EXECUTE_1 for JMPI
The PRM says "The execution size must be 1." In 73137997e23ff6c11, the
execution size was set to 1 when it should have been BRW_EXECUTE_1
(which maps to 0). Later, in dc2d3a7f5c217a7cee9, JMPI was used for
line AA on gen6 and earlier and we started manually stomping the
exeution size to BRW_EXECUTE_1 in the generator. This commit fixes the
original bug and makes brw_JMPI just do the right thing.
Reviewed-by: Matt Turner
Fixes: 73137997e23ff6c1145d036315d1a9ad96651281
---
src/intel/compiler/brw_eu_emit.c| 2 +-
src/intel/compiler/brw_fs_generator.cpp | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 062c631737..4f0be55098 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -1190,7 +1190,7 @@ brw_JMPI(struct brw_codegen *p, struct brw_reg index,
struct brw_reg ip = brw_ip_reg();
brw_inst *inst = brw_alu2(p, BRW_OPCODE_JMPI, ip, ip, index);
- brw_inst_set_exec_size(devinfo, inst, BRW_EXECUTE_2);
+ brw_inst_set_exec_size(devinfo, inst, BRW_EXECUTE_1);
brw_inst_set_qtr_control(devinfo, inst, BRW_COMPRESSION_NONE);
brw_inst_set_mask_control(devinfo, inst, BRW_MASK_DISABLE);
brw_inst_set_pred_control(devinfo, inst, predicate_control);
diff --git a/src/intel/compiler/brw_fs_generator.cpp
b/src/intel/compiler/brw_fs_generator.cpp
index bdf2f916cb..0558c82dd3 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -402,7 +402,6 @@ fs_generator::generate_fb_write(fs_inst *inst, struct
brw_reg payload)
brw_inst_set_cond_modifier(p->devinfo, brw_last_inst,
BRW_CONDITIONAL_NZ);
int jmp = brw_JMPI(p, brw_imm_ud(0), BRW_PREDICATE_NORMAL) - p->store;
- brw_inst_set_exec_size(p->devinfo, brw_last_inst, BRW_EXECUTE_1);
{
/* Don't send AA data */
fire_fb_write(inst, offset(payload, 1), implied_header, inst->mlen-1);
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Mesa (master): i965/program: Move nir_lower_system_values higher up
Module: Mesa
Branch: master
Commit: ece206b84864e3727bee2672b838f70f2a3f460c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ece206b84864e3727bee2672b838f70f2a3f460c
Author: Jason Ekstrand
Date: Fri Sep 1 22:17:50 2017 -0700
i965/program: Move nir_lower_system_values higher up
We want this to get called before nir_lower_subgroups which is going in
brw_preprocess_nir. Now that nir_lower_wpos_ytransform can handle
system values, this should be safe to do.
Reviewed-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_program.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_program.c
b/src/mesa/drivers/dri/i965/brw_program.c
index 3b54b37cfa..ebb6998a00 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -89,6 +89,8 @@ brw_create_nir(struct brw_context *brw,
nir = brw_preprocess_nir(brw->screen->compiler, nir);
+ NIR_PASS_V(nir, nir_lower_system_values);
+
if (stage == MESA_SHADER_FRAGMENT) {
static const struct nir_lower_wpos_ytransform_options wpos_options = {
.state_tokens = {STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM, 0, 0, 0},
@@ -104,7 +106,6 @@ brw_create_nir(struct brw_context *brw,
}
}
- NIR_PASS_V(nir, nir_lower_system_values);
NIR_PASS_V(nir, brw_nir_lower_uniforms, is_scalar);
return nir;
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Mesa (master): nir/opt_intrinsics: Rework progress
Module: Mesa
Branch: master
Commit: e0519294c7f416beb726d0e1463520f3166637d6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0519294c7f416beb726d0e1463520f3166637d6
Author: Jason Ekstrand
Date: Tue Aug 22 12:18:32 2017 -0700
nir/opt_intrinsics: Rework progress
This commit fixes two issues: First, we were returning false regardless
of whether or not the function made progress. Second, we were calling
nir_metadata_preserve far more often than needed; we only need to call
it once per impl.
Reviewed-by: Lionel Landwerlin
---
src/compiler/nir/nir_opt_intrinsics.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/src/compiler/nir/nir_opt_intrinsics.c
b/src/compiler/nir/nir_opt_intrinsics.c
index f12dc8779c..26a0f9650a 100644
--- a/src/compiler/nir/nir_opt_intrinsics.c
+++ b/src/compiler/nir/nir_opt_intrinsics.c
@@ -121,8 +121,6 @@ opt_intrinsics_impl(nir_function_impl *impl)
nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
nir_src_for_ssa(replacement));
nir_instr_remove(instr);
- nir_metadata_preserve(impl, nir_metadata_block_index |
- nir_metadata_dominance);
progress = true;
}
}
@@ -136,9 +134,15 @@ nir_opt_intrinsics(nir_shader *shader)
bool progress = false;
nir_foreach_function(function, shader) {
- if (function->impl)
- progress |= opt_intrinsics_impl(function->impl);
+ if (!function->impl)
+ continue;
+
+ if (opt_intrinsics_impl(function->impl)) {
+ progress = true;
+ nir_metadata_preserve(function->impl, nir_metadata_block_index |
+ nir_metadata_dominance);
+ }
}
- return false;
+ return progress;
}
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Mesa (master): intel/fs: Handle flag read/write aliasing in needs_src_copy
Module: Mesa
Branch: master
Commit: fa6e74e33e5bc5f6fba8f9de76b8b059515e708f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa6e74e33e5bc5f6fba8f9de76b8b059515e708f
Author: Jason Ekstrand
Date: Wed Sep 6 18:33:38 2017 -0700
intel/fs: Handle flag read/write aliasing in needs_src_copy
In order to implement the ballot intrinsic, we do a MOV from flag
register to some GRF. If that GRF is used in a SEL, cmod propagation
helpfully changes it into a MOV from the flag register with a cmod.
This is perfectly valid but when lower_simd_width comes along, it simply
splits into two instructions which both have conditional modifiers.
This is a problem since we're reading the flag register. This commit
makes us check whether or not flags_written() overlaps with the flag
values that we are reading via the instruction source and, if we have
any interference, will force us to emit a copy of the source.
Reviewed-by: Matt Turner
Cc: mesa-sta...@lists.freedesktop.org
---
src/intel/compiler/brw_fs.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 30e8841242..4616529abc 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -5013,7 +5013,9 @@ needs_src_copy(const fs_builder &lbld, const fs_inst
*inst, unsigned i)
{
return !(is_periodic(inst->src[i], lbld.dispatch_width()) ||
(inst->components_read(i) == 1 &&
- lbld.dispatch_width() <= inst->exec_size));
+ lbld.dispatch_width() <= inst->exec_size)) ||
+ (inst->flags_written() &
+ flag_mask(inst->src[i], type_sz(inst->src[i].type)));
}
/**
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Mesa (master): i965/fs: Add brw_reg_type_from_bit_size utility method
Module: Mesa
Branch: master
Commit: 4723933b8ea62cb100c5f21b4b42f838c6e948b1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4723933b8ea62cb100c5f21b4b42f838c6e948b1
Author: Alejandro Piñeiro
Date: Thu Aug 24 15:54:27 2017 +0200
i965/fs: Add brw_reg_type_from_bit_size utility method
Returns the brw_type for a given ssa.bit_size, and a reference type.
So if bit_size is 64, and the reference type is BRW_REGISTER_TYPE_F,
it returns BRW_REGISTER_TYPE_DF. The same applies if bit_size is 32
and reference type is BRW_REGISTER_TYPE_HF it returns BRW_REGISTER_TYPE_F
v2 (Jason Ekstrand):
- Use better unreachable() messages
- Add Q types
Signed-off-by: Jose Maria Casanova Crespo
Signed-off-by: Alejandro Piñeiro
---
src/intel/compiler/brw_fs_nir.cpp | 69 ---
1 file changed, 64 insertions(+), 5 deletions(-)
diff --git a/src/intel/compiler/brw_fs_nir.cpp
b/src/intel/compiler/brw_fs_nir.cpp
index a58e41fb28..bb153cabbe 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -227,6 +227,65 @@ fs_visitor::nir_emit_system_values()
}
}
+/*
+ * Returns a type based on a reference_type (word, float, half-float) and a
+ * given bit_size.
+ *
+ * Reference BRW_REGISTER_TYPE are HF,F,DF,W,D,UW,UD.
+ *
+ * @FIXME: 64-bit return types are always DF on integer types to maintain
+ * compability with uses of DF previously to the introduction of int64
+ * support.
+ */
+static brw_reg_type
+brw_reg_type_from_bit_size(const unsigned bit_size,
+ const brw_reg_type reference_type)
+{
+ switch(reference_type) {
+ case BRW_REGISTER_TYPE_HF:
+ case BRW_REGISTER_TYPE_F:
+ case BRW_REGISTER_TYPE_DF:
+ switch(bit_size) {
+ case 16:
+ return BRW_REGISTER_TYPE_HF;
+ case 32:
+ return BRW_REGISTER_TYPE_F;
+ case 64:
+ return BRW_REGISTER_TYPE_DF;
+ default:
+ unreachable("Invalid bit size");
+ }
+ case BRW_REGISTER_TYPE_W:
+ case BRW_REGISTER_TYPE_D:
+ case BRW_REGISTER_TYPE_Q:
+ switch(bit_size) {
+ case 16:
+ return BRW_REGISTER_TYPE_W;
+ case 32:
+ return BRW_REGISTER_TYPE_D;
+ case 64:
+ return BRW_REGISTER_TYPE_DF;
+ default:
+ unreachable("Invalid bit size");
+ }
+ case BRW_REGISTER_TYPE_UW:
+ case BRW_REGISTER_TYPE_UD:
+ case BRW_REGISTER_TYPE_UQ:
+ switch(bit_size) {
+ case 16:
+ return BRW_REGISTER_TYPE_UW;
+ case 32:
+ return BRW_REGISTER_TYPE_UD;
+ case 64:
+ return BRW_REGISTER_TYPE_DF;
+ default:
+ unreachable("Invalid bit size");
+ }
+ default:
+ unreachable("Unknown type");
+ }
+}
+
void
fs_visitor::nir_emit_impl(nir_function_impl *impl)
{
@@ -240,7 +299,7 @@ fs_visitor::nir_emit_impl(nir_function_impl *impl)
reg->num_array_elems == 0 ? 1 : reg->num_array_elems;
unsigned size = array_elems * reg->num_components;
const brw_reg_type reg_type =
- reg->bit_size == 32 ? BRW_REGISTER_TYPE_F : BRW_REGISTER_TYPE_DF;
+ brw_reg_type_from_bit_size(reg->bit_size, BRW_REGISTER_TYPE_F);
nir_locals[reg->index] = bld.vgrf(reg_type, size);
}
@@ -1341,7 +1400,7 @@ fs_visitor::nir_emit_load_const(const fs_builder &bld,
nir_load_const_instr *instr)
{
const brw_reg_type reg_type =
- instr->def.bit_size == 32 ? BRW_REGISTER_TYPE_D : BRW_REGISTER_TYPE_DF;
+ brw_reg_type_from_bit_size(instr->def.bit_size, BRW_REGISTER_TYPE_D);
fs_reg reg = bld.vgrf(reg_type, instr->def.num_components);
switch (instr->def.bit_size) {
@@ -1369,8 +1428,8 @@ fs_visitor::get_nir_src(const nir_src &src)
fs_reg reg;
if (src.is_ssa) {
if (src.ssa->parent_instr->type == nir_instr_type_ssa_undef) {
- const brw_reg_type reg_type = src.ssa->bit_size == 32 ?
-BRW_REGISTER_TYPE_D : BRW_REGISTER_TYPE_DF;
+ const brw_reg_type reg_type =
+brw_reg_type_from_bit_size(src.ssa->bit_size, BRW_REGISTER_TYPE_D);
reg = bld.vgrf(reg_type, src.ssa->num_components);
} else {
reg = nir_ssa_values[src.ssa->index];
@@ -1404,7 +1463,7 @@ fs_visitor::get_nir_dest(const nir_dest &dest)
{
if (dest.is_ssa) {
const brw_reg_type reg_type =
- dest.ssa.bit_size == 32 ? BRW_REGISTER_TYPE_F : BRW_REGISTER_TYPE_DF;
+ brw_reg_type_from_bit_size(dest.ssa.bit_size, BRW_REGISTER_TYPE_F);
nir_ssa_values[dest.ssa.index] =
bld.vgrf(reg_type, dest.ssa.num_components);
return nir_ssa_values[dest.ssa.index];
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Mesa (master): anv/entrypoints: Dump useful data if mako throws an exception
Module: Mesa Branch: master Commit: 3720d913dd39852be7debfa17823f730a77bb478 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3720d913dd39852be7debfa17823f730a77bb478 Author: Jason Ekstrand Date: Tue Sep 19 16:05:35 2017 -0700 anv/entrypoints: Dump useful data if mako throws an exception Reviewed-by: Lionel Landwerlin --- src/intel/vulkan/anv_entrypoints_gen.py | 22 +- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/src/intel/vulkan/anv_entrypoints_gen.py b/src/intel/vulkan/anv_entrypoints_gen.py index ac1c193c63..23bc854218 100644 --- a/src/intel/vulkan/anv_entrypoints_gen.py +++ b/src/intel/vulkan/anv_entrypoints_gen.py @@ -371,11 +371,23 @@ def main(): # For outputting entrypoints.h we generate a anv_EntryPoint() prototype # per entry point. -with open(os.path.join(args.outdir, 'anv_entrypoints.h'), 'wb') as f: -f.write(TEMPLATE_H.render(entrypoints=entrypoints, - filename=os.path.basename(__file__))) -with open(os.path.join(args.outdir, 'anv_entrypoints.c'), 'wb') as f: -f.write(gen_code(entrypoints)) +try: +with open(os.path.join(args.outdir, 'anv_entrypoints.h'), 'wb') as f: +f.write(TEMPLATE_H.render(entrypoints=entrypoints, + filename=os.path.basename(__file__))) +with open(os.path.join(args.outdir, 'anv_entrypoints.c'), 'wb') as f: +f.write(gen_code(entrypoints)) +except Exception: +# In the even there's an error this imports some helpers from mako +# to print a useful stack trace and prints it, then exits with +# status 1, if python is run with debug; otherwise it just raises +# the exception +if __debug__: +import sys +from mako import exceptions +sys.stderr.write(exceptions.text_error_template().render() + '\n') +sys.exit(1) +raise if __name__ == '__main__': ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): intel/compiler: Call nir_lower_system_values in brw_preprocess_nir
Module: Mesa
Branch: master
Commit: d24311b7b55d1dec1ce85e046619d05fa96ed99e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d24311b7b55d1dec1ce85e046619d05fa96ed99e
Author: Jason Ekstrand
Date: Fri Sep 1 22:20:23 2017 -0700
intel/compiler: Call nir_lower_system_values in brw_preprocess_nir
Reviewed-by: Lionel Landwerlin
---
src/intel/compiler/brw_nir.c| 2 ++
src/intel/vulkan/anv_pipeline.c | 2 --
src/mesa/drivers/dri/i965/brw_program.c | 2 --
3 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 327216eaaa..e5ff6deb2f 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -635,6 +635,8 @@ brw_preprocess_nir(const struct brw_compiler *compiler,
nir_shader *nir)
/* Lower a bunch of stuff */
OPT(nir_lower_var_copies);
+ OPT(nir_lower_system_values);
+
OPT(nir_lower_clip_cull_distance_arrays);
nir_variable_mode indirect_mask = 0;
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 9863ec334e..8a2e4f83ca 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -194,8 +194,6 @@ anv_shader_compile_to_nir(struct anv_pipeline *pipeline,
nir = brw_preprocess_nir(compiler, nir);
- NIR_PASS_V(nir, nir_lower_system_values);
-
if (stage == MESA_SHADER_FRAGMENT)
NIR_PASS_V(nir, anv_nir_lower_input_attachments);
diff --git a/src/mesa/drivers/dri/i965/brw_program.c
b/src/mesa/drivers/dri/i965/brw_program.c
index ebb6998a00..6925121778 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -89,8 +89,6 @@ brw_create_nir(struct brw_context *brw,
nir = brw_preprocess_nir(brw->screen->compiler, nir);
- NIR_PASS_V(nir, nir_lower_system_values);
-
if (stage == MESA_SHADER_FRAGMENT) {
static const struct nir_lower_wpos_ytransform_options wpos_options = {
.state_tokens = {STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM, 0, 0, 0},
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Mesa (master): i965/fs/nir: Use the nir_src_bit_size helper
Module: Mesa
Branch: master
Commit: 99778e7f9f874f132ec9ddace3e91714e42e690f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=99778e7f9f874f132ec9ddace3e91714e42e690f
Author: Jason Ekstrand
Date: Sat Aug 26 09:50:01 2017 -0700
i965/fs/nir: Use the nir_src_bit_size helper
Reviewed-by: Lionel Landwerlin
---
src/intel/compiler/brw_fs_nir.cpp | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/src/intel/compiler/brw_fs_nir.cpp
b/src/intel/compiler/brw_fs_nir.cpp
index cc098849be..a58e41fb28 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -3458,9 +3458,7 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld,
* expected by our 32-bit write messages.
*/
unsigned type_size = 4;
- unsigned bit_size = instr->src[0].is_ssa ?
- instr->src[0].ssa->bit_size : instr->src[0].reg.reg->bit_size;
- if (bit_size == 64) {
+ if (nir_src_bit_size(instr->src[0]) == 64) {
type_size = 8;
fs_reg tmp =
fs_reg(VGRF, alloc.allocate(alloc.sizes[val_reg.nr]), val_reg.type);
@@ -3965,9 +3963,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld,
nir_intrinsic_instr *instr
* expected by our 32-bit write messages.
*/
unsigned type_size = 4;
- unsigned bit_size = instr->src[0].is_ssa ?
- instr->src[0].ssa->bit_size : instr->src[0].reg.reg->bit_size;
- if (bit_size == 64) {
+ if (nir_src_bit_size(instr->src[0]) == 64) {
type_size = 8;
fs_reg tmp =
fs_reg(VGRF, alloc.allocate(alloc.sizes[val_reg.nr]), val_reg.type);
@@ -4032,9 +4028,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld,
nir_intrinsic_instr *instr
unsigned num_components = instr->num_components;
unsigned first_component = nir_intrinsic_component(instr);
- unsigned bit_size = instr->src[0].is_ssa ?
- instr->src[0].ssa->bit_size : instr->src[0].reg.reg->bit_size;
- if (bit_size == 64) {
+ if (nir_src_bit_size(instr->src[0]) == 64) {
fs_reg tmp =
fs_reg(VGRF, alloc.allocate(2 * num_components),
BRW_REGISTER_TYPE_F);
___
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Mesa (master): anv/pipeline: Dump shader immedately after spirv_to_nir
Module: Mesa
Branch: master
Commit: e758b6519d691cc2becd0d940d1c131634549bf2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e758b6519d691cc2becd0d940d1c131634549bf2
Author: Jason Ekstrand
Date: Wed Jul 12 12:34:00 2017 -0700
anv/pipeline: Dump shader immedately after spirv_to_nir
Reviewed-by: Lionel Landwerlin
---
src/intel/vulkan/anv_pipeline.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 51788928af..20609248d6 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -83,6 +83,15 @@ void anv_DestroyShaderModule(
#define SPIR_V_MAGIC_NUMBER 0x07230203
+static const uint64_t stage_to_debug[] = {
+ [MESA_SHADER_VERTEX] = DEBUG_VS,
+ [MESA_SHADER_TESS_CTRL] = DEBUG_TCS,
+ [MESA_SHADER_TESS_EVAL] = DEBUG_TES,
+ [MESA_SHADER_GEOMETRY] = DEBUG_GS,
+ [MESA_SHADER_FRAGMENT] = DEBUG_WM,
+ [MESA_SHADER_COMPUTE] = DEBUG_CS,
+};
+
/* Eventually, this will become part of anv_CreateShader. Unfortunately,
* we can't do that yet because we don't have the ability to copy nir.
*/
@@ -144,6 +153,12 @@ anv_shader_compile_to_nir(struct anv_pipeline *pipeline,
free(spec_entries);
+ if (unlikely(INTEL_DEBUG & stage_to_debug[stage])) {
+ fprintf(stderr, "NIR (from SPIR-V) for %s shader:\n",
+ gl_shader_stage_name(stage));
+ nir_print_shader(nir, stderr);
+ }
+
/* We have to lower away local constant initializers right before we
* inline functions. That way they get properly initialized at the top
* of the function and not at the top of its caller.
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Mesa (master): clover: Fix compilation after clang r315871
Module: Mesa
Branch: master
Commit: a6d38f476beaaf0a9677cfc168172121b5779570
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6d38f476beaaf0a9677cfc168172121b5779570
Author: Jan Vesely
Date: Sat Oct 21 15:38:54 2017 -0400
clover: Fix compilation after clang r315871
v2: use a more generic compat function
v3: rename and formatting cleanup
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103388
Signed-off-by: Jan Vesely
Reviewed-by: Francisco Jerez
CC:
---
src/gallium/state_trackers/clover/llvm/codegen/common.cpp | 5 ++---
src/gallium/state_trackers/clover/llvm/compat.hpp | 12 ++--
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/src/gallium/state_trackers/clover/llvm/codegen/common.cpp
b/src/gallium/state_trackers/clover/llvm/codegen/common.cpp
index 075183400a..ddf2083f37 100644
--- a/src/gallium/state_trackers/clover/llvm/codegen/common.cpp
+++ b/src/gallium/state_trackers/clover/llvm/codegen/common.cpp
@@ -70,7 +70,6 @@ namespace {
make_kernel_args(const Module &mod, const std::string &kernel_name,
const clang::CompilerInstance &c) {
std::vector args;
- const auto address_spaces = c.getTarget().getAddressSpaceMap();
const Function &f = *mod.getFunction(kernel_name);
::llvm::DataLayout dl(&mod);
const auto size_type =
@@ -128,8 +127,8 @@ namespace {
const unsigned address_space =
cast< ::llvm::PointerType>(actual_type)->getAddressSpace();
- if (address_space == address_spaces[clang::LangAS::opencl_local
- - compat::lang_as_offset]) {
+ if (address_space == compat::target_address_space(
+ c.getTarget(), clang::LangAS::opencl_local))
{
args.emplace_back(module::argument::local, arg_api_size,
target_size, target_align,
module::argument::zero_ext);
diff --git a/src/gallium/state_trackers/clover/llvm/compat.hpp
b/src/gallium/state_trackers/clover/llvm/compat.hpp
index f8b56516d5..6fc75fb250 100644
--- a/src/gallium/state_trackers/clover/llvm/compat.hpp
+++ b/src/gallium/state_trackers/clover/llvm/compat.hpp
@@ -69,11 +69,19 @@ namespace clover {
typedef ::llvm::TargetLibraryInfo target_library_info;
#endif
+ template
+ unsigned target_address_space(const T &target, const AS lang_as) {
+const auto &map = target.getAddressSpaceMap();
+#if HAVE_LLVM >= 0x0500
+return map[static_cast(lang_as)];
+#else
+return map[lang_as - clang::LangAS::Offset];
+#endif
+ }
+
#if HAVE_LLVM >= 0x0500
- const auto lang_as_offset = 0;
const clang::InputKind ik_opencl = clang::InputKind::OpenCL;
#else
- const auto lang_as_offset = clang::LangAS::Offset;
const clang::InputKind ik_opencl = clang::IK_OpenCL;
#endif
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Mesa (master): glsl_to_tgsi: remove unused glsl_version variable
Module: Mesa Branch: master Commit: b85cd69415f24ff4653e39f82dcd309363f65c59 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b85cd69415f24ff4653e39f82dcd309363f65c59 Author: Marek Olšák Date: Wed Oct 25 18:15:35 2017 +0200 glsl_to_tgsi: remove unused glsl_version variable trivial --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index a45f0047a8..aa225df63d 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -186,7 +186,6 @@ public: bool indirect_addr_consts; int wpos_transform_const; - int glsl_version; bool native_integers; bool have_sqrt; bool have_fma; @@ -4415,7 +4414,6 @@ glsl_to_tgsi_visitor::glsl_to_tgsi_visitor() images_used = 0; indirect_addr_consts = false; wpos_transform_const = -1; - glsl_version = 0; native_integers = false; mem_ctx = ralloc_context(NULL); ctx = NULL; @@ -6615,7 +6613,6 @@ get_mesa_program_tgsi(struct gl_context *ctx, v->shader_program = shader_program; v->shader = shader; v->options = options; - v->glsl_version = ctx->Const.GLSLVersion; v->native_integers = ctx->Const.NativeIntegers; v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget, ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): radv: Don't compute as_ls/as_es before hashing.
Module: Mesa
Branch: master
Commit: de38491a5719b0c56cfa79b3ef1e6f947cc524d5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de38491a5719b0c56cfa79b3ef1e6f947cc524d5
Author: Bas Nieuwenhuizen
Date: Tue Oct 24 00:10:37 2017 +0200
radv: Don't compute as_ls/as_es before hashing.
Reviewed-by: Timothy Arceri
---
src/amd/vulkan/radv_pipeline.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index fbefa9..1683afafcd 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1141,7 +1141,7 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline
*pipeline,
}
static struct ac_shader_variant_key
-radv_compute_vs_key(const VkGraphicsPipelineCreateInfo *pCreateInfo, bool
as_es, bool as_ls)
+radv_compute_vs_key(const VkGraphicsPipelineCreateInfo *pCreateInfo)
{
struct ac_shader_variant_key key;
const VkPipelineVertexInputStateCreateInfo *input_state =
@@ -1149,8 +1149,6 @@ radv_compute_vs_key(const VkGraphicsPipelineCreateInfo
*pCreateInfo, bool as_es,
memset(&key, 0, sizeof(key));
key.vs.instance_rate_inputs = 0;
- key.vs.as_es = as_es;
- key.vs.as_ls = as_ls;
for (unsigned i = 0; i < input_state->vertexAttributeDescriptionCount;
++i) {
unsigned binding;
@@ -1818,6 +1816,15 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
nir_print_shader(nir[i], stderr);
}
+ if (keys && nir[MESA_SHADER_TESS_CTRL])
+ keys[MESA_SHADER_VERTEX].vs.as_ls = true;
+ if (keys && nir[MESA_SHADER_GEOMETRY]) {
+ if (nir[MESA_SHADER_TESS_CTRL])
+ keys[MESA_SHADER_TESS_EVAL].tes.as_es = true;
+ else
+ keys[MESA_SHADER_VERTEX].vs.as_es = true;
+ }
+
if (nir[MESA_SHADER_FRAGMENT]) {
if (!pipeline->shaders[MESA_SHADER_FRAGMENT]) {
pipeline->shaders[MESA_SHADER_FRAGMENT] =
@@ -1944,28 +1951,19 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
memset(keys, 0, sizeof(keys));
if (pStages[MESA_SHADER_VERTEX]) {
- bool as_es = false;
- bool as_ls = false;
- if (pStages[MESA_SHADER_TESS_CTRL])
- as_ls = true;
- else if (pStages[MESA_SHADER_GEOMETRY])
- as_es = true;
-
- keys[MESA_SHADER_VERTEX] = radv_compute_vs_key(pCreateInfo,
as_es, as_ls);
+ keys[MESA_SHADER_VERTEX] = radv_compute_vs_key(pCreateInfo);
keys[MESA_SHADER_VERTEX].has_multiview_view_index =
has_view_index;
}
if (pStages[MESA_SHADER_TESS_EVAL]) {
keys[MESA_SHADER_TESS_EVAL].has_multiview_view_index =
has_view_index;
- if (pStages[MESA_SHADER_GEOMETRY])
- keys[MESA_SHADER_TESS_EVAL].tes.as_es = true;
}
if (pCreateInfo->pTessellationState)
keys[MESA_SHADER_TESS_CTRL].tcs.input_vertices =
pCreateInfo->pTessellationState->patchControlPoints;
if (pStages[MESA_SHADER_GEOMETRY]) {
- keys[MESA_SHADER_GEOMETRY] = radv_compute_vs_key(pCreateInfo,
false, false);
+ keys[MESA_SHADER_GEOMETRY] = radv_compute_vs_key(pCreateInfo);
keys[MESA_SHADER_GEOMETRY].has_multiview_view_index =
has_view_index;
}
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Mesa (master): radv: Add single pipeline cache key.
Module: Mesa
Branch: master
Commit: 49d035122ee8ff17522f8fa87a862f348904218f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=49d035122ee8ff17522f8fa87a862f348904218f
Author: Bas Nieuwenhuizen
Date: Tue Oct 24 20:46:35 2017 +0200
radv: Add single pipeline cache key.
To decouple the key used for info gathering and the cache from
whatever we pass to the compiler.
Reviewed-by: Timothy Arceri
---
src/amd/vulkan/radv_pipeline.c | 44 +---
src/amd/vulkan/radv_pipeline_cache.c | 6 ++---
src/amd/vulkan/radv_private.h| 13 +--
3 files changed, 55 insertions(+), 8 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 1683afafcd..31368511ba 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1703,11 +1703,47 @@ radv_link_shaders(struct radv_pipeline *pipeline,
nir_shader **shaders)
}
}
+
+static struct radv_pipeline_key
+radv_generate_graphics_pipeline_key(struct radv_pipeline *pipeline,
+const VkGraphicsPipelineCreateInfo
*pCreateInfo,
+bool has_view_index)
+{
+ const VkPipelineVertexInputStateCreateInfo *input_state =
+pCreateInfo->pVertexInputState;
+ struct radv_pipeline_key key;
+ memset(&key, 0, sizeof(key));
+
+ key.has_multiview_view_index = has_view_index;
+
+ for (unsigned i = 0; i < input_state->vertexAttributeDescriptionCount;
++i) {
+ unsigned binding;
+ binding = input_state->pVertexAttributeDescriptions[i].binding;
+ if (input_state->pVertexBindingDescriptions[binding].inputRate)
+ key.instance_rate_inputs |= 1u <<
input_state->pVertexAttributeDescriptions[i].location;
+ }
+
+ if (pCreateInfo->pTessellationState)
+ key.tess_input_vertices =
pCreateInfo->pTessellationState->patchControlPoints;
+
+
+ if (pCreateInfo->pMultisampleState &&
+ pCreateInfo->pMultisampleState->rasterizationSamples > 1)
+ key.multisample = true;
+
+ key.col_format = pipeline->graphics.blend.spi_shader_col_format;
+ if (pipeline->device->physical_device->rad_info.chip_class < VI)
+ radv_pipeline_compute_get_int_clamp(pCreateInfo, &key.is_int8,
&key.is_int10);
+
+ return key;
+}
+
static
void radv_create_shaders(struct radv_pipeline *pipeline,
struct radv_device *device,
struct radv_pipeline_cache *cache,
struct ac_shader_variant_key *keys,
+ struct radv_pipeline_key key,
const VkPipelineShaderStageCreateInfo **pStages)
{
struct radv_shader_module fs_m = {0};
@@ -1727,7 +1763,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
}
}
- radv_hash_shaders(hash, pStages, pipeline->layout, keys,
get_hash_flags(device));
+ radv_hash_shaders(hash, pStages, pipeline->layout, &key,
get_hash_flags(device));
memcpy(gs_copy_hash, hash, 20);
gs_copy_hash[0] ^= 1;
@@ -1975,7 +2011,9 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
if (pipeline->device->physical_device->rad_info.chip_class < VI)
radv_pipeline_compute_get_int_clamp(pCreateInfo,
&keys[MESA_SHADER_FRAGMENT].fs.is_int8,
&keys[MESA_SHADER_FRAGMENT].fs.is_int10);
- radv_create_shaders(pipeline, device, cache, keys, pStages);
+ radv_create_shaders(pipeline, device, cache, keys,
+ radv_generate_graphics_pipeline_key(pipeline,
pCreateInfo, has_view_index),
+ pStages);
radv_pipeline_init_depth_stencil_state(pipeline, pCreateInfo, extra);
radv_pipeline_init_raster_state(pipeline, pCreateInfo);
@@ -2311,7 +2349,7 @@ static VkResult radv_compute_pipeline_create(
pipeline->layout =
radv_pipeline_layout_from_handle(pCreateInfo->layout);
pStages[MESA_SHADER_COMPUTE] = &pCreateInfo->stage;
- radv_create_shaders(pipeline, device, cache, NULL, pStages);
+ radv_create_shaders(pipeline, device, cache, NULL, (struct
radv_pipeline_key) {0}, pStages);
pipeline->need_indirect_descriptor_sets |=
pipeline->shaders[MESA_SHADER_COMPUTE]->info.need_indirect_descriptor_sets;
diff --git a/src/amd/vulkan/radv_pipeline_cache.c
b/src/amd/vulkan/radv_pipeline_cache.c
index 9ba9a3b61b..5dee114749 100644
--- a/src/amd/vulkan/radv_pipeline_cache.c
+++ b/src/amd/vulkan/radv_pipeline_cache.c
@@ -100,14 +100,14 @@ void
radv_hash_shaders(unsigned char *hash,
const VkPipelineShaderStageCreateInfo **stages,
const struct radv_pipeline_layout *layout,
- const struct ac_shader_variant_key *keys,
+ const struct radv_pipeline_key *key,
Mesa (master): radv: Compute ac keys from pipeline key.
Module: Mesa
Branch: master
Commit: 61a9ef4ab1759100e7658b1cba4127277c7c66bf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=61a9ef4ab1759100e7658b1cba4127277c7c66bf
Author: Bas Nieuwenhuizen
Date: Tue Oct 24 23:30:20 2017 +0200
radv: Compute ac keys from pipeline key.
The beginning of the end for the shader keys. Not entirely sure
what I'm going to replace them with for the compiler though, so this
is the first step.
Reviewed-by: Timothy Arceri
---
src/amd/vulkan/radv_pipeline.c | 113 +++--
1 file changed, 41 insertions(+), 72 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 31368511ba..2096c994a5 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1140,26 +1140,6 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline
*pipeline,
pipeline->dynamic_state_mask = states;
}
-static struct ac_shader_variant_key
-radv_compute_vs_key(const VkGraphicsPipelineCreateInfo *pCreateInfo)
-{
- struct ac_shader_variant_key key;
- const VkPipelineVertexInputStateCreateInfo *input_state =
-pCreateInfo->pVertexInputState;
-
- memset(&key, 0, sizeof(key));
- key.vs.instance_rate_inputs = 0;
-
- for (unsigned i = 0; i < input_state->vertexAttributeDescriptionCount;
++i) {
- unsigned binding;
- binding = input_state->pVertexAttributeDescriptions[i].binding;
- if (input_state->pVertexBindingDescriptions[binding].inputRate)
- key.vs.instance_rate_inputs |= 1u <<
input_state->pVertexAttributeDescriptions[i].location;
- }
- return key;
-}
-
-
static void calculate_gfx9_gs_info(const VkGraphicsPipelineCreateInfo
*pCreateInfo,
struct radv_pipeline *pipeline)
{
@@ -1738,11 +1718,41 @@ radv_generate_graphics_pipeline_key(struct
radv_pipeline *pipeline,
return key;
}
+static void
+radv_fill_shader_keys(struct ac_shader_variant_key *keys,
+ const struct radv_pipeline_key *key,
+ nir_shader **nir)
+{
+ keys[MESA_SHADER_VERTEX].vs.instance_rate_inputs =
key->instance_rate_inputs;
+
+ if (nir[MESA_SHADER_TESS_CTRL]) {
+ keys[MESA_SHADER_VERTEX].vs.as_ls = true;
+ keys[MESA_SHADER_TESS_CTRL].tcs.input_vertices =
key->tess_input_vertices;
+ keys[MESA_SHADER_TESS_CTRL].tcs.primitive_mode =
nir[MESA_SHADER_TESS_EVAL]->info.tess.primitive_mode;
+
+ keys[MESA_SHADER_TESS_CTRL].tcs.tes_reads_tess_factors =
!!(nir[MESA_SHADER_TESS_EVAL]->info.inputs_read & (VARYING_BIT_TESS_LEVEL_INNER
| VARYING_BIT_TESS_LEVEL_OUTER));
+ }
+
+ if (nir[MESA_SHADER_GEOMETRY]) {
+ if (nir[MESA_SHADER_TESS_CTRL])
+ keys[MESA_SHADER_TESS_EVAL].tes.as_es = true;
+ else
+ keys[MESA_SHADER_VERTEX].vs.as_es = true;
+ }
+
+ for(int i = 0; i < MESA_SHADER_STAGES; ++i)
+ keys[i].has_multiview_view_index =
key->has_multiview_view_index;
+
+ keys[MESA_SHADER_FRAGMENT].fs.multisample = key->multisample;
+ keys[MESA_SHADER_FRAGMENT].fs.col_format = key->col_format;
+ keys[MESA_SHADER_FRAGMENT].fs.is_int8 = key->is_int8;
+ keys[MESA_SHADER_FRAGMENT].fs.is_int10 = key->is_int10;
+}
+
static
void radv_create_shaders(struct radv_pipeline *pipeline,
struct radv_device *device,
struct radv_pipeline_cache *cache,
- struct ac_shader_variant_key *keys,
struct radv_pipeline_key key,
const VkPipelineShaderStageCreateInfo **pStages)
{
@@ -1751,6 +1761,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
nir_shader *nir[MESA_SHADER_STAGES] = {0};
void *codes[MESA_SHADER_STAGES] = {0};
unsigned code_sizes[MESA_SHADER_STAGES] = {0};
+ struct ac_shader_variant_key keys[MESA_SHADER_STAGES] = 0;
unsigned char hash[20], gs_copy_hash[20];
for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) {
@@ -1834,11 +1845,6 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
}
if (nir[MESA_SHADER_TESS_CTRL]) {
- /* TODO: This is no longer used as a key we should refactor
this */
- if (keys)
- keys[MESA_SHADER_TESS_CTRL].tcs.primitive_mode =
nir[MESA_SHADER_TESS_EVAL]->info.tess.primitive_mode;
-
- keys[MESA_SHADER_TESS_CTRL].tcs.tes_reads_tess_factors =
!!(nir[MESA_SHADER_TESS_EVAL]->info.inputs_read & (VARYING_BIT_TESS_LEVEL_INNER
| VARYING_BIT_TESS_LEVEL_OUTER));
nir_lower_tes_patch_vertices(nir[MESA_SHADER_TESS_EVAL],
nir[MESA_SHADER_TESS_CTRL]->info.tess.tcs_vertices_out);
}
@@ -1852,30 +1858,21 @@ vo
Mesa (master): glsl: Add field initializers for glsl_struct_field default constructor
Module: Mesa
Branch: master
Commit: abbcdc9b69901528c9ea4469a4dc2977c71ff9f9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=abbcdc9b69901528c9ea4469a4dc2977c71ff9f9
Author: Jordan Justen
Date: Fri Oct 20 18:54:17 2017 -0700
glsl: Add field initializers for glsl_struct_field default constructor
This helps valgrind when encode_type_to_blob is used.
Signed-off-by: Jordan Justen
Reviewed-by: Kenneth Graunke
Reviewed-by: Jason Ekstrand
---
src/compiler/glsl_types.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/compiler/glsl_types.h b/src/compiler/glsl_types.h
index b5e97e638b..0b4a66ca4d 100644
--- a/src/compiler/glsl_types.h
+++ b/src/compiler/glsl_types.h
@@ -1045,6 +1045,13 @@ struct glsl_struct_field {
}
glsl_struct_field()
+ : type(NULL), name(NULL), location(0), offset(0), xfb_buffer(0),
+xfb_stride(0), interpolation(0), centroid(0),
+sample(0), matrix_layout(0), patch(0),
+precision(0), memory_read_only(0),
+memory_write_only(0), memory_coherent(0), memory_volatile(0),
+memory_restrict(0), image_format(0), explicit_xfb_buffer(0),
+implicit_sized_array(0)
{
/* empty */
}
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Mesa (master): glsl_to_nir: Zero nir_variable struct for valgrind & nir_serialize
Module: Mesa Branch: master Commit: 16867154d8c7bb6b2b46f00203ed94a4a810abde URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=16867154d8c7bb6b2b46f00203ed94a4a810abde Author: Jordan Justen Date: Mon Oct 2 00:17:22 2017 -0700 glsl_to_nir: Zero nir_variable struct for valgrind & nir_serialize Signed-off-by: Jordan Justen Reviewed-by: Timothy Arceri Reviewed-by: Kenneth Graunke Reviewed-by: Jason Ekstrand --- src/compiler/glsl/glsl_to_nir.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp index 63694fd41f..1d1085ffbc 100644 --- a/src/compiler/glsl/glsl_to_nir.cpp +++ b/src/compiler/glsl/glsl_to_nir.cpp @@ -311,7 +311,7 @@ nir_visitor::visit(ir_variable *ir) if (ir->data.mode == ir_var_shader_shared) return; - nir_variable *var = ralloc(shader, nir_variable); + nir_variable *var = rzalloc(shader, nir_variable); var->type = ir->type; var->name = ralloc_strdup(var, ir->name); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nir: Zero nir_load_const_instr:: value for valgrind & nir_serialize
Module: Mesa
Branch: master
Commit: 78550869a1e0892e7950eafcde805e8b9e749801
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=78550869a1e0892e7950eafcde805e8b9e749801
Author: Jordan Justen
Date: Mon Oct 2 00:14:51 2017 -0700
nir: Zero nir_load_const_instr::value for valgrind & nir_serialize
Signed-off-by: Jordan Justen
Reviewed-by: Timothy Arceri
Reviewed-by: Kenneth Graunke
Reviewed-by: Jason Ekstrand
---
src/compiler/nir/nir.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
index fe48451694..7380bf436a 100644
--- a/src/compiler/nir/nir.c
+++ b/src/compiler/nir/nir.c
@@ -480,7 +480,7 @@ nir_load_const_instr *
nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
unsigned bit_size)
{
- nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
+ nir_load_const_instr *instr = rzalloc(shader, nir_load_const_instr);
instr_init(&instr->instr, nir_instr_type_load_const);
nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size,
NULL);
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Mesa (master): glsl: move shader_cache type handling to glsl_types
Module: Mesa
Branch: master
Commit: 7686f0b316883087c7668c9df3adebcaae684132
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7686f0b316883087c7668c9df3adebcaae684132
Author: Connor Abbott
Date: Tue Sep 12 20:16:22 2017 -0400
glsl: move shader_cache type handling to glsl_types
Not sure if this is the best place to put it, but we're going to need
this for NIR too.
Reviewed-by: Timothy Arceri
Reviewed-by: Jordan Justen
Reviewed-by: Jason Ekstrand
---
src/compiler/glsl/shader_cache.cpp | 171 -
src/compiler/glsl_types.cpp| 171 +
src/compiler/glsl_types.h | 7 ++
3 files changed, 178 insertions(+), 171 deletions(-)
diff --git a/src/compiler/glsl/shader_cache.cpp
b/src/compiler/glsl/shader_cache.cpp
index f3c7a57699..ca90cfde35 100644
--- a/src/compiler/glsl/shader_cache.cpp
+++ b/src/compiler/glsl/shader_cache.cpp
@@ -75,177 +75,6 @@ compile_shaders(struct gl_context *ctx, struct
gl_shader_program *prog) {
}
static void
-get_struct_type_field_and_pointer_sizes(size_t *s_field_size,
-size_t *s_field_ptrs)
-{
- *s_field_size = sizeof(glsl_struct_field);
- *s_field_ptrs =
- sizeof(((glsl_struct_field *)0)->type) +
- sizeof(((glsl_struct_field *)0)->name);
-}
-
-static void
-encode_type_to_blob(struct blob *blob, const glsl_type *type)
-{
- uint32_t encoding;
-
- if (!type) {
- blob_write_uint32(blob, 0);
- return;
- }
-
- switch (type->base_type) {
- case GLSL_TYPE_UINT:
- case GLSL_TYPE_INT:
- case GLSL_TYPE_FLOAT:
- case GLSL_TYPE_BOOL:
- case GLSL_TYPE_DOUBLE:
- case GLSL_TYPE_UINT64:
- case GLSL_TYPE_INT64:
- encoding = (type->base_type << 24) |
- (type->vector_elements << 4) |
- (type->matrix_columns);
- break;
- case GLSL_TYPE_SAMPLER:
- encoding = (type->base_type) << 24 |
- (type->sampler_dimensionality << 4) |
- (type->sampler_shadow << 3) |
- (type->sampler_array << 2) |
- (type->sampled_type);
- break;
- case GLSL_TYPE_SUBROUTINE:
- encoding = type->base_type << 24;
- blob_write_uint32(blob, encoding);
- blob_write_string(blob, type->name);
- return;
- case GLSL_TYPE_IMAGE:
- encoding = (type->base_type) << 24 |
- (type->sampler_dimensionality << 3) |
- (type->sampler_array << 2) |
- (type->sampled_type);
- break;
- case GLSL_TYPE_ATOMIC_UINT:
- encoding = (type->base_type << 24);
- break;
- case GLSL_TYPE_ARRAY:
- blob_write_uint32(blob, (type->base_type) << 24);
- blob_write_uint32(blob, type->length);
- encode_type_to_blob(blob, type->fields.array);
- return;
- case GLSL_TYPE_STRUCT:
- case GLSL_TYPE_INTERFACE:
- blob_write_uint32(blob, (type->base_type) << 24);
- blob_write_string(blob, type->name);
- blob_write_uint32(blob, type->length);
-
- size_t s_field_size, s_field_ptrs;
- get_struct_type_field_and_pointer_sizes(&s_field_size, &s_field_ptrs);
-
- for (unsigned i = 0; i < type->length; i++) {
- encode_type_to_blob(blob, type->fields.structure[i].type);
- blob_write_string(blob, type->fields.structure[i].name);
-
- /* Write the struct field skipping the pointers */
- blob_write_bytes(blob,
- ((char *)&type->fields.structure[i]) + s_field_ptrs,
- s_field_size - s_field_ptrs);
- }
-
- if (type->is_interface()) {
- blob_write_uint32(blob, type->interface_packing);
- blob_write_uint32(blob, type->interface_row_major);
- }
- return;
- case GLSL_TYPE_VOID:
- case GLSL_TYPE_ERROR:
- default:
- assert(!"Cannot encode type!");
- encoding = 0;
- break;
- }
-
- blob_write_uint32(blob, encoding);
-}
-
-static const glsl_type *
-decode_type_from_blob(struct blob_reader *blob)
-{
- uint32_t u = blob_read_uint32(blob);
-
- if (u == 0) {
- return NULL;
- }
-
- glsl_base_type base_type = (glsl_base_type) (u >> 24);
-
- switch (base_type) {
- case GLSL_TYPE_UINT:
- case GLSL_TYPE_INT:
- case GLSL_TYPE_FLOAT:
- case GLSL_TYPE_BOOL:
- case GLSL_TYPE_DOUBLE:
- case GLSL_TYPE_UINT64:
- case GLSL_TYPE_INT64:
- return glsl_type::get_instance(base_type, (u >> 4) & 0x0f, u & 0x0f);
- case GLSL_TYPE_SAMPLER:
- return glsl_type::get_sampler_instance((enum glsl_sampler_dim) ((u >> 4)
& 0x07),
- (u >> 3) & 0x01,
- (u >> 2) & 0x01,
- (glsl_base_type) ((u >> 0) &
0x03));
- case GLSL_TYPE_SUBROUTINE:
- return glsl_type::get_subroutine_instance(blob_read_string(blob));
- case GLSL_TYPE_IMAGE:
- return glsl_type::get_image_instance((enum glsl_sampler_dim) ((u >> 3) &
0x07),
-
Mesa (master): intel/nir: Zero local index const struct for valgrind & nir_serialize
Module: Mesa Branch: master Commit: b35e8c3b868a2c8ba086cc8667fee2736e157fad URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b35e8c3b868a2c8ba086cc8667fee2736e157fad Author: Jordan Justen Date: Mon Oct 2 00:08:55 2017 -0700 intel/nir: Zero local index const struct for valgrind & nir_serialize Signed-off-by: Jordan Justen Reviewed-by: Timothy Arceri Reviewed-by: Kenneth Graunke Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_nir_lower_cs_intrinsics.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c index f9322654e7..d27727624c 100644 --- a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c +++ b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c @@ -116,6 +116,7 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state, nir_ssa_def *local_index = nir_load_local_invocation_index(b); nir_const_value uvec3; + memset(&uvec3, 0, sizeof(uvec3)); uvec3.u32[0] = 1; uvec3.u32[1] = size[0]; uvec3.u32[2] = size[0] * size[1]; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nir: Zero local_size const struct for valgrind & nir_serialize
Module: Mesa Branch: master Commit: d917f57c2f22ee9283795f29fc5977f8189cd3e8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d917f57c2f22ee9283795f29fc5977f8189cd3e8 Author: Jordan Justen Date: Mon Oct 2 00:05:28 2017 -0700 nir: Zero local_size const struct for valgrind & nir_serialize Signed-off-by: Jordan Justen Reviewed-by: Timothy Arceri Reviewed-by: Kenneth Graunke Reviewed-by: Jason Ekstrand --- src/compiler/nir/nir_lower_system_values.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/compiler/nir/nir_lower_system_values.c b/src/compiler/nir/nir_lower_system_values.c index ba20d3083f..39b1a260bd 100644 --- a/src/compiler/nir/nir_lower_system_values.c +++ b/src/compiler/nir/nir_lower_system_values.c @@ -58,6 +58,7 @@ convert_block(nir_block *block, nir_builder *b) */ nir_const_value local_size; + memset(&local_size, 0, sizeof(local_size)); local_size.u32[0] = b->shader->info.cs.local_size[0]; local_size.u32[1] = b->shader->info.cs.local_size[1]; local_size.u32[2] = b->shader->info.cs.local_size[2]; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nir/intrinsics: Set the correct num_indices for load_output
Module: Mesa
Branch: master
Commit: c1b84256ccc443a9792893bc780bba970c0dcd4e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1b84256ccc443a9792893bc780bba970c0dcd4e
Author: Jason Ekstrand
Date: Fri Sep 15 16:22:00 2017 -0700
nir/intrinsics: Set the correct num_indices for load_output
Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Timothy Arceri
Reviewed-by: Kenneth Graunke
Reviewed-by: Jordan Justen
---
src/compiler/nir/nir_intrinsics.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir_intrinsics.h
b/src/compiler/nir/nir_intrinsics.h
index 0de7080bfa..cefd18be90 100644
--- a/src/compiler/nir/nir_intrinsics.h
+++ b/src/compiler/nir/nir_intrinsics.h
@@ -434,7 +434,7 @@ INTRINSIC(load_interpolated_input, 2, ARR(2, 1), true, 0, 0,
/* src[] = { buffer_index, offset }. No const_index */
LOAD(ssbo, 2, 0, xx, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE)
/* src[] = { offset }. const_index[] = { base, component } */
-LOAD(output, 1, 1, BASE, COMPONENT, xx, NIR_INTRINSIC_CAN_ELIMINATE)
+LOAD(output, 1, 2, BASE, COMPONENT, xx, NIR_INTRINSIC_CAN_ELIMINATE)
/* src[] = { vertex, offset }. const_index[] = { base, component } */
LOAD(per_vertex_output, 2, 1, BASE, COMPONENT, xx, NIR_INTRINSIC_CAN_ELIMINATE)
/* src[] = { offset }. const_index[] = { base } */
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Mesa (master): compiler/types: Support [de]serializing void types
Module: Mesa Branch: master Commit: 23327af91c3ccb82be3a5de3ed1b2b3f49168d75 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=23327af91c3ccb82be3a5de3ed1b2b3f49168d75 Author: Jason Ekstrand Date: Thu Sep 14 16:49:14 2017 -0700 compiler/types: Support [de]serializing void types Reviewed-by: Timothy Arceri Reviewed-by: Jordan Justen --- src/compiler/glsl_types.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/compiler/glsl_types.cpp b/src/compiler/glsl_types.cpp index a7fc7ff7f6..704b63c5cf 100644 --- a/src/compiler/glsl_types.cpp +++ b/src/compiler/glsl_types.cpp @@ -2149,6 +2149,8 @@ encode_type_to_blob(struct blob *blob, const glsl_type *type) } return; case GLSL_TYPE_VOID: + encoding = (type->base_type << 24); + break; case GLSL_TYPE_ERROR: default: assert(!"Cannot encode type!"); @@ -2230,6 +2232,7 @@ decode_type_from_blob(struct blob_reader *blob) return t; } case GLSL_TYPE_VOID: + return glsl_type::void_type; case GLSL_TYPE_ERROR: default: assert(!"Cannot decode type!"); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): glsl_to_nir: Zero nir_constant in constant_copy for valgrind & nir_serialize
Module: Mesa Branch: master Commit: 87e71726e0c44871778c3e1428dc81649cd9f292 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=87e71726e0c44871778c3e1428dc81649cd9f292 Author: Jordan Justen Date: Mon Oct 2 00:19:31 2017 -0700 glsl_to_nir: Zero nir_constant in constant_copy for valgrind & nir_serialize Signed-off-by: Jordan Justen Reviewed-by: Timothy Arceri Reviewed-by: Kenneth Graunke Reviewed-by: Jason Ekstrand --- src/compiler/glsl/glsl_to_nir.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp index 1d1085ffbc..c659a25ca7 100644 --- a/src/compiler/glsl/glsl_to_nir.cpp +++ b/src/compiler/glsl/glsl_to_nir.cpp @@ -219,7 +219,7 @@ constant_copy(ir_constant *ir, void *mem_ctx) if (ir == NULL) return NULL; - nir_constant *ret = ralloc(mem_ctx, nir_constant); + nir_constant *ret = rzalloc(mem_ctx, nir_constant); const unsigned rows = ir->type->vector_elements; const unsigned cols = ir->type->matrix_columns; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vulkan: Update headers and registry to 1.0.64
Module: Mesa
Branch: master
Commit: 9626128f32d712fe4576011c7e1d40fe9ec45186
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9626128f32d712fe4576011c7e1d40fe9ec45186
Author: Alex Smith
Date: Wed Oct 25 12:18:54 2017 +0100
vulkan: Update headers and registry to 1.0.64
Acked-by: Dave Airlie
Signed-off-by: Alex Smith
---
include/vulkan/vulkan.h| 50 +-
src/vulkan/registry/vk.xml | 159 +
2 files changed, 181 insertions(+), 28 deletions(-)
diff --git a/include/vulkan/vulkan.h b/include/vulkan/vulkan.h
index e1398c68ba..048866c444 100644
--- a/include/vulkan/vulkan.h
+++ b/include/vulkan/vulkan.h
@@ -43,7 +43,7 @@ extern "C" {
#define VK_VERSION_MINOR(version) (((uint32_t)(version) >> 12) & 0x3ff)
#define VK_VERSION_PATCH(version) ((uint32_t)(version) & 0xfff)
// Version of this file
-#define VK_HEADER_VERSION 63
+#define VK_HEADER_VERSION 64
#define VK_NULL_HANDLE 0
@@ -5194,7 +5194,7 @@ VKAPI_ATTR VkResult VKAPI_CALL vkBindImageMemory2KHR(
#define VK_EXT_debug_report 1
VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDebugReportCallbackEXT)
-#define VK_EXT_DEBUG_REPORT_SPEC_VERSION 8
+#define VK_EXT_DEBUG_REPORT_SPEC_VERSION 9
#define VK_EXT_DEBUG_REPORT_EXTENSION_NAME "VK_EXT_debug_report"
#define VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT
VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT
#define VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_EXT
VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT
@@ -5488,6 +5488,52 @@ typedef struct VkTextureLODGatherFormatPropertiesAMD {
+#define VK_AMD_shader_info 1
+#define VK_AMD_SHADER_INFO_SPEC_VERSION 1
+#define VK_AMD_SHADER_INFO_EXTENSION_NAME "VK_AMD_shader_info"
+
+
+typedef enum VkShaderInfoTypeAMD {
+VK_SHADER_INFO_TYPE_STATISTICS_AMD = 0,
+VK_SHADER_INFO_TYPE_BINARY_AMD = 1,
+VK_SHADER_INFO_TYPE_DISASSEMBLY_AMD = 2,
+VK_SHADER_INFO_TYPE_BEGIN_RANGE_AMD = VK_SHADER_INFO_TYPE_STATISTICS_AMD,
+VK_SHADER_INFO_TYPE_END_RANGE_AMD = VK_SHADER_INFO_TYPE_DISASSEMBLY_AMD,
+VK_SHADER_INFO_TYPE_RANGE_SIZE_AMD = (VK_SHADER_INFO_TYPE_DISASSEMBLY_AMD
- VK_SHADER_INFO_TYPE_STATISTICS_AMD + 1),
+VK_SHADER_INFO_TYPE_MAX_ENUM_AMD = 0x7FFF
+} VkShaderInfoTypeAMD;
+
+typedef struct VkShaderResourceUsageAMD {
+uint32_tnumUsedVgprs;
+uint32_tnumUsedSgprs;
+uint32_tldsSizePerLocalWorkGroup;
+size_t ldsUsageSizeInBytes;
+size_t scratchMemUsageInBytes;
+} VkShaderResourceUsageAMD;
+
+typedef struct VkShaderStatisticsInfoAMD {
+VkShaderStageFlags shaderStageMask;
+VkShaderResourceUsageAMDresourceUsage;
+uint32_tnumPhysicalVgprs;
+uint32_tnumPhysicalSgprs;
+uint32_tnumAvailableVgprs;
+uint32_tnumAvailableSgprs;
+uint32_tcomputeWorkGroupSize[3];
+} VkShaderStatisticsInfoAMD;
+
+
+typedef VkResult (VKAPI_PTR *PFN_vkGetShaderInfoAMD)(VkDevice device,
VkPipeline pipeline, VkShaderStageFlagBits shaderStage, VkShaderInfoTypeAMD
infoType, size_t* pInfoSize, void* pInfo);
+
+#ifndef VK_NO_PROTOTYPES
+VKAPI_ATTR VkResult VKAPI_CALL vkGetShaderInfoAMD(
+VkDevicedevice,
+VkPipeline pipeline,
+VkShaderStageFlagBits shaderStage,
+VkShaderInfoTypeAMD infoType,
+size_t* pInfoSize,
+void* pInfo);
+#endif
+
#define VK_AMD_shader_image_load_store_lod 1
#define VK_AMD_SHADER_IMAGE_LOAD_STORE_LOD_SPEC_VERSION 1
#define VK_AMD_SHADER_IMAGE_LOAD_STORE_LOD_EXTENSION_NAME
"VK_AMD_shader_image_load_store_lod"
diff --git a/src/vulkan/registry/vk.xml b/src/vulkan/registry/vk.xml
index 88e0997148..d2aba617c9 100644
--- a/src/vulkan/registry/vk.xml
+++ b/src/vulkan/registry/vk.xml
@@ -107,7 +107,7 @@ private version is maintained in the 1.0 branch of the
member gitlab server.
// Vulkan 1.0 version number
#define VK_API_VERSION_1_0 VK_MAKE_VERSION(1, 0,
0)// Patch version should always be set to 0
// Version of this file
-#define VK_HEADER_VERSION 63
+#define VK_HEADER_VERSION 64
#define VK_DEFINE_HANDLE(object) typedef struct object##_T*
object;
@@ -386,6 +386,7 @@ private version is maintained in the 1.0 branch of the
member gitlab server.
+
WSI extensions
@@ -1251,7 +1252,7 @@ private version is maintained in the 1.0 branch of the
member gitlab server.
VkBool32
shaderInt6464-bit integers in shaders
VkBool32
shaderInt1616-bit integers in shaders
VkBool32
shaderResourceResidencyshader can use texture operations
that return resource residency information (requires sparseNonResident
support)
-
Mesa (master): ac/nir: generate correct instruction for atomic min/ max on unsigned images
Module: Mesa
Branch: master
Commit: 27a0b24bf238342031e0709584e4d71ab228f1ec
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=27a0b24bf238342031e0709584e4d71ab228f1ec
Author: Matthew Nicholls
Date: Wed Oct 25 14:20:43 2017 +0100
ac/nir: generate correct instruction for atomic min/max on unsigned images
v2: fix silly typo
Cc: "17.2 17.3"
Reviewed-by: Samuel Pitoiset
Reviewed-by: Bas Nieuwenhuizen
---
src/amd/common/ac_nir_to_llvm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 3d635d4206..06937d684b 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3667,15 +3667,17 @@ static LLVMValueRef visit_image_atomic(struct
ac_nir_context *ctx,
LLVMValueRef i1true = LLVMConstInt(ctx->ac.i1, 1, false);
MAYBE_UNUSED int length;
+ bool is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
+
switch (instr->intrinsic) {
case nir_intrinsic_image_atomic_add:
atomic_name = "add";
break;
case nir_intrinsic_image_atomic_min:
- atomic_name = "smin";
+ atomic_name = is_unsigned ? "umin" : "smin";
break;
case nir_intrinsic_image_atomic_max:
- atomic_name = "smax";
+ atomic_name = is_unsigned ? "umax" : "smax";
break;
case nir_intrinsic_image_atomic_and:
atomic_name = "and";
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Mesa (master): gallium/util: remove some block alignment assertions
Module: Mesa Branch: master Commit: 20c77ae6390451a74e2463f02c49bd7fec3dd29c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20c77ae6390451a74e2463f02c49bd7fec3dd29c Author: Roland Scheidegger Date: Wed Oct 25 02:39:20 2017 +0200 gallium/util: remove some block alignment assertions These assertions were revisited a couple of times in the past, and they still weren't quite right. The problem I was seeing (with some other state tracker) was a copy between two 512x512 s3tc textures, but from mip level 0 to mip level 8. Therefore, the destination has only size 2x2 (not a full block), so the box width/height was only 2, causing the assertion to trigger for src alignment. As far as I can tell, such a copy is completely legal, and because a correct assertion would get ridiculously complicated just get rid of it for good. Reviewed-by: Brian Paul --- src/gallium/auxiliary/util/u_surface.c | 8 1 file changed, 8 deletions(-) diff --git a/src/gallium/auxiliary/util/u_surface.c b/src/gallium/auxiliary/util/u_surface.c index 5abf96625e..0a79a25a43 100644 --- a/src/gallium/auxiliary/util/u_surface.c +++ b/src/gallium/auxiliary/util/u_surface.c @@ -324,16 +324,8 @@ util_resource_copy_region(struct pipe_context *pipe, /* check that region boxes are block aligned */ assert(src_box.x % src_bw == 0); assert(src_box.y % src_bh == 0); - assert(src_box.width % src_bw == 0 || - src_box.x + src_box.width == u_minify(src->width0, src_level)); - assert(src_box.height % src_bh == 0 || - src_box.y + src_box.height == u_minify(src->height0, src_level)); assert(dst_box.x % dst_bw == 0); assert(dst_box.y % dst_bh == 0); - assert(dst_box.width % dst_bw == 0 || - dst_box.x + dst_box.width == u_minify(dst->width0, dst_level)); - assert(dst_box.height % dst_bh == 0 || - dst_box.y + dst_box.height == u_minify(dst->height0, dst_level)); /* check that region boxes are not out of bounds */ assert(src_box.x + src_box.width <= u_minify(src->width0, src_level)); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): meson: be explicit about the version required
Module: Mesa
Branch: master
Commit: 7983adc60f2f3e4390b2dee98c30d7da14732b83
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7983adc60f2f3e4390b2dee98c30d7da14732b83
Author: Eric Engestrom
Date: Tue Oct 24 14:57:11 2017 +0100
meson: be explicit about the version required
This way, we know what we're allowed to use (no nested include lists
for instance) and users get immediate feedback when trying to use
unsupported versions, rather than a cryptic crash or things being
silently not built correctly.
Cc: Dylan Baker
Signed-off-by: Eric Engestrom
Reviewed-by: Dylan Baker
---
meson.build | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/meson.build b/meson.build
index 4d4f164087..2a89b6482f 100644
--- a/meson.build
+++ b/meson.build
@@ -18,8 +18,14 @@
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
-project('mesa', ['c', 'cpp'], version : '17.3.0-devel', license : 'MIT',
-default_options : ['c_std=c99', 'cpp_std=c++11'])
+project(
+ 'mesa',
+ ['c', 'cpp'],
+ version : '17.3.0-devel',
+ license : 'MIT',
+ meson_version : '>= 0.42',
+ default_options : ['c_std=c99', 'cpp_std=c++11']
+)
# Arguments for the preprocessor, put these in a separate array from the C and
# C++ (cpp in meson terminology) arguments since they need to be added to the
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Mesa (master): meson: add opt-out of libunwind
Module: Mesa
Branch: master
Commit: 9e5a5a11ed93637fe28735e3dd161e59c4c3e5d0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e5a5a11ed93637fe28735e3dd161e59c4c3e5d0
Author: Erik Faye-Lund
Date: Mon Oct 23 20:54:03 2017 +0200
meson: add opt-out of libunwind
Libunwind has some issues on some platforms, so let's allow people
who have issues to opt-out. This is similar to what we do in automake,
and the implementation is modelled after our opt-out for valgrind.
Signed-off-by: Erik Faye-Lund
Reviewed-by: Dylan Baker
---
meson.build | 3 ++-
meson_options.txt | 6 ++
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
index 8db4699ec5..4d4f164087 100644
--- a/meson.build
+++ b/meson.build
@@ -37,6 +37,7 @@ pre_args = [
with_vulkan_icd_dir = get_option('vulkan-icd-dir')
with_tests = get_option('build-tests')
with_valgrind = get_option('valgrind')
+with_libunwind = get_option('libunwind')
with_asm = get_option('asm')
with_llvm = get_option('llvm')
if get_option('texture-float')
@@ -687,7 +688,7 @@ dep_selinux = []
# TODO: llvm-prefix and llvm-shared-libs
dep_unwind = dependency('libunwind', required : false)
-if dep_unwind.found()
+if dep_unwind.found() and with_libunwind
pre_args += '-DHAVE_LIBUNWIND'
endif
diff --git a/meson_options.txt b/meson_options.txt
index 1b90f5ced8..b44c93df00 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -143,6 +143,12 @@ option(
description : 'Build with valgrind support if possible'
)
option(
+ 'libunwind',
+ type : 'boolean',
+ value : true,
+ description : 'Use libunwind for stack-traces if possible'
+)
+option(
'build-tests',
type : 'boolean',
value : false,
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Mesa (master): mesa: enum checks for GL_EXT_occlusion_query_boolean
Module: Mesa
Branch: master
Commit: f5bec8583a568b62cf5bbdadc669ecec6b9c28cb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f5bec8583a568b62cf5bbdadc669ecec6b9c28cb
Author: Tapani Pälli
Date: Wed Oct 4 14:56:27 2017 +0300
mesa: enum checks for GL_EXT_occlusion_query_boolean
Some of the checks are valid for generic ES 3.2 as well.
Signed-off-by: Tapani Pälli
Reviewed-by: Eric Anholt
---
src/mesa/main/queryobj.c | 44
1 file changed, 44 insertions(+)
diff --git a/src/mesa/main/queryobj.c b/src/mesa/main/queryobj.c
index 46535d7b4c..d966814a76 100644
--- a/src/mesa/main/queryobj.c
+++ b/src/mesa/main/queryobj.c
@@ -165,6 +165,20 @@ get_pipe_stats_binding_point(struct gl_context *ctx,
static struct gl_query_object **
get_query_binding_point(struct gl_context *ctx, GLenum target, GLuint index)
{
+
+ /* From GL_EXT_occlusion_query_boolean spec:
+*
+*"Accepted by the parameter of BeginQueryEXT, EndQueryEXT,
+*and GetQueryivEXT:
+*
+* ANY_SAMPLES_PASSED_EXT 0x8C2F
+* ANY_SAMPLES_PASSED_CONSERVATIVE_EXT0x8D6A"
+*/
+ if ((_mesa_is_gles(ctx) && ctx->Version == 20) &&
+ (target != GL_ANY_SAMPLES_PASSED &&
+target != GL_ANY_SAMPLES_PASSED_CONSERVATIVE))
+ return NULL;
+
switch (target) {
case GL_SAMPLES_PASSED_ARB:
if (ctx->Extensions.ARB_occlusion_query)
@@ -649,6 +663,19 @@ _mesa_GetQueryIndexediv(GLenum target, GLuint index,
GLenum pname,
if (!query_error_check_index(ctx, target, index))
return;
+ /* From the GL_EXT_occlusion_query_boolean spec:
+*
+* "The error INVALID_ENUM is generated if GetQueryivEXT is called where
+* is not CURRENT_QUERY_EXT."
+*
+* Same rule is present also in ES 3.2 spec.
+*/
+ if (_mesa_is_gles(ctx) && pname != GL_CURRENT_QUERY) {
+ _mesa_error(ctx, GL_INVALID_ENUM, "glGetQueryivEXT(%s)",
+ _mesa_enum_to_string(pname));
+ return;
+ }
+
if (target == GL_TIMESTAMP) {
if (!ctx->Extensions.ARB_timer_query) {
_mesa_error(ctx, GL_INVALID_ENUM, "glGetQueryARB(target)");
@@ -775,6 +802,23 @@ get_query_object(struct gl_context *ctx, const char *func,
return;
}
+ /* From GL_EXT_occlusion_query_boolean spec:
+*
+*"Accepted by the parameter of GetQueryObjectivEXT and
+*GetQueryObjectuivEXT:
+*
+*QUERY_RESULT_EXT 0x8866
+*QUERY_RESULT_AVAILABLE_EXT 0x8867"
+*
+* Same rule is present also in ES 3.2 spec.
+*/
+ if (_mesa_is_gles(ctx) &&
+ (pname != GL_QUERY_RESULT && pname != GL_QUERY_RESULT_AVAILABLE)) {
+ _mesa_error(ctx, GL_INVALID_ENUM, "%s(%s)", func,
+ _mesa_enum_to_string(pname));
+ return;
+ }
+
if (buf && buf != ctx->Shared->NullBufferObj) {
bool is_64bit = ptype == GL_INT64_ARB ||
ptype == GL_UNSIGNED_INT64_ARB;
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Mesa (master): gles2: support for GL_EXT_occlusion_query_boolean
Module: Mesa
Branch: master
Commit: d37bcf3cc2bfea79a7130ab123e94f6b881a5b7e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d37bcf3cc2bfea79a7130ab123e94f6b881a5b7e
Author: Harish Krupo
Date: Wed Oct 4 14:56:28 2017 +0300
gles2: support for GL_EXT_occlusion_query_boolean
Following test checking entrypoints passes:
dEQP-EGL.functional.get_proc_address.extension.gl_ext_occlusion_query_boolean
Piglit test 'ext_occlusion_query_boolean-any-samples' passes with these changes.
No changes/regression observed in WebGL occlusion tests or Intel CI.
v2: add es2="2.0" for glapi entrypoints, clean up xml
dispatch_sanity changes (fix 'make check')
Signed-off-by: Harish Krupo
Signed-off-by: Tapani Pälli
Reviewed-by: Eric Anholt
---
src/mapi/glapi/gen/es_EXT.xml | 51 +
src/mesa/main/extensions_table.h| 1 +
src/mesa/main/tests/dispatch_sanity.cpp | 31 +++-
3 files changed, 76 insertions(+), 7 deletions(-)
diff --git a/src/mapi/glapi/gen/es_EXT.xml b/src/mapi/glapi/gen/es_EXT.xml
index 3a2bdb2fdc..f19007366f 100644
--- a/src/mapi/glapi/gen/es_EXT.xml
+++ b/src/mapi/glapi/gen/es_EXT.xml
@@ -751,6 +751,57 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index 2075311318..8d8b6376dc 100644
--- a/src/mesa/main/extensions_table.h
+++ b/src/mesa/main/extensions_table.h
@@ -231,6 +231,7 @@ EXT(EXT_map_buffer_range,
ARB_map_buffer_range
EXT(EXT_memory_object , EXT_memory_object
, GLL, GLC, x , ES2, 2017)
EXT(EXT_memory_object_fd, EXT_memory_object_fd
, GLL, GLC, x , ES2, 2017)
EXT(EXT_multi_draw_arrays , dummy_true
, GLL, x , ES1, ES2, 1999)
+EXT(EXT_occlusion_query_boolean , ARB_occlusion_query
, x , x , x , ES2, 2001)
EXT(EXT_packed_depth_stencil, dummy_true
, GLL, GLC, x , x , 2005)
EXT(EXT_packed_float, EXT_packed_float
, GLL, GLC, x , x , 2004)
EXT(EXT_packed_pixels , dummy_true
, GLL, x , x , x , 1997)
diff --git a/src/mesa/main/tests/dispatch_sanity.cpp
b/src/mesa/main/tests/dispatch_sanity.cpp
index aea9ffb37f..8c511805b5 100644
--- a/src/mesa/main/tests/dispatch_sanity.cpp
+++ b/src/mesa/main/tests/dispatch_sanity.cpp
@@ -2424,11 +2424,22 @@ const struct function gles2_functions_possible[] = {
/* GL_KHR_blend_equation_advanced */
{ "glBlendBarrierKHR", 20, -1 },
+ /* GL_EXT_occlusion_query_boolean */
+ { "glGenQueriesEXT", 20, -1 },
+ { "glDeleteQueriesEXT", 20, -1 },
+ { "glIsQueryEXT", 20, -1 },
+ { "glBeginQueryEXT", 20, -1 },
+ { "glEndQueryEXT", 20, -1 },
+ { "glGetQueryivEXT", 20, -1 },
+ { "glGetQueryObjectivEXT", 20, -1 },
+ { "glGetQueryObjectuivEXT", 20, -1 },
+
{ NULL, 0, -1 }
};
const struct function gles3_functions_possible[] = {
- { "glBeginQuery", 30, -1 },
+ // We check for the aliased -EXT version in GLES 2
+ // { "glBeginQuery", 30, -1 },
{ "glBeginTransformFeedback", 30, -1 },
{ "glBindBufferBase", 30, -1 },
{ "glBindBufferRange", 30, -1 },
@@ -2449,7 +2460,8 @@ const struct function gles3_functions_possible[] = {
{ "glCopyBufferSubData", 30, -1 },
// We check for the aliased -OES version in GLES 2
// { "glCopyTexSubImage3D", 30, -1 },
- { "glDeleteQueries", 30, -1 },
+ // We check for the aliased -EXT version in GLES 2
+ // { "glDeleteQueries", 30, -1 },
{ "glDeleteSamplers", 30, -1 },
{ "glDeleteSync", 30, -1 },
{ "glDeleteTransformFeedbacks", 30, -1 },
@@ -2460,13 +2472,15 @@ const struct function gles3_functions_possible[] = {
// { "glDrawBuffers", 30, -1 },
{ "glDrawElementsInstanced", 30, -1 },
{ "glDrawRangeElements", 30, -1 },
- { "glEndQuery", 30, -1 },
+ // We check for the aliased -EXT version in GLES 2
+ // { "glEndQuery", 30, -1 },
{ "glEndTransformFeedback", 30, -1 },
{ "glFenceSync", 30, -1 },
// We check for the aliased -EXT version in GLES 2
// { "glFlushMappedBufferRange", 30, -1 },
{ "glFramebufferTextureLayer", 30, -1 },
- { "glGenQueries", 30, -1 },
+ // We check for the aliased -EXT version in GLES 2
+ // { "glGenQueries", 30, -1 },
{ "glGenSamplers", 30, -1 },
{ "glGenTransformFeedbacks", 30, -1 },
// We check for the aliased -OES version in GLES 2
@@ -2484,8 +2498,10 @@ const struct function gles3_functions_possible[] = {
Mesa (master): radv: print NIR before LLVM IR and disassembly
Module: Mesa
Branch: master
Commit: 9711979df007859de86fc08c20c826a71d10a660
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9711979df007859de86fc08c20c826a71d10a660
Author: Samuel Pitoiset
Date: Tue Oct 24 17:23:43 2017 +0200
radv: print NIR before LLVM IR and disassembly
It's still printed after linking, but it makes more sense to
have SPIRV->NIR->LLVM IR->ASM.
Fixes: f0a2bbd1a4 (radv: move nir print after linking is done)
Signed-off-by: Samuel Pitoiset
Reviewed-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_pipeline.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 926e3788cc..fbefa9 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1810,6 +1810,14 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
radv_link_shaders(pipeline, nir);
+ for (int i = 0; i < MESA_SHADER_STAGES; ++i) {
+ if (!(device->instance->debug_flags & RADV_DEBUG_DUMP_SHADERS))
+ continue;
+
+ if (modules[i])
+ nir_print_shader(nir[i], stderr);
+ }
+
if (nir[MESA_SHADER_FRAGMENT]) {
if (!pipeline->shaders[MESA_SHADER_FRAGMENT]) {
pipeline->shaders[MESA_SHADER_FRAGMENT] =
@@ -1894,13 +1902,8 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
for (int i = 0; i < MESA_SHADER_STAGES; ++i) {
free(codes[i]);
- if (modules[i]) {
- if (device->instance->debug_flags &
RADV_DEBUG_DUMP_SHADERS)
- nir_print_shader(nir[i], stderr);
-
- if (!pipeline->device->trace_bo)
- ralloc_free(nir[i]);
- }
+ if (modules[i] && !pipeline->device->trace_bo)
+ ralloc_free(nir[i]);
}
if (fs_m.nir)
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Mesa (master): radv: Fix truncation issue hexifying the cache uuid for the disk cache.
Module: Mesa Branch: master Commit: 5bfbab2fdcc5b1fcb3a0d0b8cce19c5492c7de68 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5bfbab2fdcc5b1fcb3a0d0b8cce19c5492c7de68 Author: Bas Nieuwenhuizen Date: Wed Oct 25 03:43:00 2017 +0200 radv: Fix truncation issue hexifying the cache uuid for the disk cache. Going from binary to hex has a 2x blowup. Fixes: 14216252923 'radv: create on-disk shader cache' Reviewed-by: Dave Airlie --- src/amd/vulkan/radv_device.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index ebc74fbade..19ff8fec64 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -170,8 +170,8 @@ radv_physical_device_init(struct radv_physical_device *device, /* The gpu id is already embeded in the uuid so we just pass "radv" * when creating the cache. */ - char buf[VK_UUID_SIZE + 1]; - disk_cache_format_hex_id(buf, device->cache_uuid, VK_UUID_SIZE); + char buf[VK_UUID_SIZE * 2 + 1]; + disk_cache_format_hex_id(buf, device->cache_uuid, VK_UUID_SIZE * 2); device->disk_cache = disk_cache_create(device->name, buf, shader_env_flags); fprintf(stderr, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n"); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
