Mesa (master): aubinator: extract aubinator_init() out of the header handler function

[Jordan Justen]

Module: Mesa
Branch: master
Commit: 8cdf5bd29215c82d48ea9d869afeb9eb93b6e1f6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8cdf5bd29215c82d48ea9d869afeb9eb93b6e1f6

Author: Scott D Phillips 
Date:   Tue Nov 28 15:52:09 2017 -0800

aubinator: extract aubinator_init() out of the header handler function

A later patch will use the aubinator_init() function from the
memtrace aub header handler.

Reviewed-by: Jordan Justen 

---

 src/intel/tools/aubinator.c | 39 +++
 1 file changed, 23 insertions(+), 16 deletions(-)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 46b0a47bcd..fcb46073f3 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -161,20 +161,8 @@ get_gen_batch_bo(void *user_data, uint64_t address)
 }
 
 static void
-handle_trace_header(uint32_t *p)
+aubinator_init(uint16_t aub_pci_id, const char *app_name)
 {
-   /* The intel_aubdump tool from IGT is kind enough to put a PCI-ID= tag in
-* the AUB header comment.  If the user hasn't specified a hardware
-* generation, try to use the one from the AUB file.
-*/
-   uint32_t *end = p + (p[0] & 0x) + 2;
-   int aub_pci_id = 0;
-   if (end > [12] && p[12] > 0)
-  sscanf((char *)[13], "PCI-ID=%i", _pci_id);
-
-   if (pci_id == 0)
-  pci_id = aub_pci_id;
-
if (!gen_get_device_info(pci_id, )) {
   fprintf(stderr, "can't find device information: pci_id=0x%x\n", pci_id);
   exit(EXIT_FAILURE);
@@ -205,9 +193,6 @@ handle_trace_header(uint32_t *p)
if (aub_pci_id)
   fprintf(outfile, "PCI ID:   0x%x\n", aub_pci_id);
 
-   char app_name[33];
-   strncpy(app_name, (char *)[2], 32);
-   app_name[32] = 0;
fprintf(outfile, "Application name: %s\n", app_name);
 
fprintf(outfile, "Decoding as:  %s\n", gen_get_device_name(pci_id));
@@ -216,6 +201,28 @@ handle_trace_header(uint32_t *p)
fprintf(outfile, "\n");
 }
 
+static void
+handle_trace_header(uint32_t *p)
+{
+   /* The intel_aubdump tool from IGT is kind enough to put a PCI-ID= tag in
+* the AUB header comment.  If the user hasn't specified a hardware
+* generation, try to use the one from the AUB file.
+*/
+   uint32_t *end = p + (p[0] & 0x) + 2;
+   int aub_pci_id = 0;
+   if (end > [12] && p[12] > 0)
+  sscanf((char *)[13], "PCI-ID=%i", _pci_id);
+
+   if (pci_id == 0)
+  pci_id = aub_pci_id;
+
+   char app_name[33];
+   strncpy(app_name, (char *)[2], 32);
+   app_name[32] = 0;
+
+   aubinator_init(aub_pci_id, app_name);
+}
+
 struct aub_file {
FILE *stream;
 

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Mesa (master): aubinator: add support for aubinating memtrace aubs

[Jordan Justen]

Module: Mesa
Branch: master
Commit: 42f421cbbfcdadd29543246191697a12f0461e40
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=42f421cbbfcdadd29543246191697a12f0461e40

Author: Scott D Phillips 
Date:   Tue Nov 28 15:52:10 2017 -0800

aubinator: add support for aubinating memtrace aubs

Memtrace aubs are similar to classic aubs, with the major
difference being how command submission is serialized (as register
writes instead of a high-level submit message). Some internal
tools generate or consume only memtrace aubs.

Reviewed-by: Jordan Justen 

---

 src/intel/tools/aubinator.c | 118 +++-
 1 file changed, 83 insertions(+), 35 deletions(-)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index fcb46073f3..92aa208a61 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -223,6 +223,81 @@ handle_trace_header(uint32_t *p)
aubinator_init(aub_pci_id, app_name);
 }
 
+static void
+handle_memtrace_version(uint32_t *p)
+{
+   int header_length = p[0] & 0x;
+   char app_name[64];
+   int app_name_len = MIN2(4 * (header_length + 1 - 5), ARRAY_SIZE(app_name) - 
1);
+   int pci_id_len = 0;
+   int aub_pci_id = 0;
+
+   strncpy(app_name, (char *)[5], app_name_len);
+   app_name[app_name_len] = 0;
+   sscanf(app_name, "PCI-ID=%i %n", _pci_id, _id_len);
+   if (pci_id == 0)
+  pci_id = aub_pci_id;
+   aubinator_init(aub_pci_id, app_name + pci_id_len);
+}
+
+static void
+handle_memtrace_reg_write(uint32_t *p)
+{
+   uint32_t offset = p[1];
+   uint32_t value = p[5];
+   int engine;
+   static int render_elsp_writes = 0;
+   static int blitter_elsp_writes = 0;
+
+   if (offset == 0x2230) {
+  render_elsp_writes++;
+  engine = GEN_ENGINE_RENDER;
+   } else if (offset == 0x22230) {
+  blitter_elsp_writes++;
+  engine = GEN_ENGINE_BLITTER;
+   } else {
+  return;
+   }
+
+   if (render_elsp_writes > 3)
+  render_elsp_writes = 0;
+   else if (blitter_elsp_writes > 3)
+  blitter_elsp_writes = 0;
+   else
+  return;
+
+   uint8_t *pphwsp = (uint8_t*)gtt + (value & 0xf000);
+   const uint32_t pphwsp_size = 4096;
+   uint32_t *context = (uint32_t*)(pphwsp + pphwsp_size);
+   uint32_t ring_buffer_head = context[5];
+   uint32_t ring_buffer_tail = context[7];
+   uint32_t ring_buffer_start = context[9];
+   uint32_t *commands = (uint32_t*)((uint8_t*)gtt + ring_buffer_start + 
ring_buffer_head);
+   (void)engine; /* TODO */
+   gen_print_batch(_ctx, commands, ring_buffer_tail - ring_buffer_head, 
0);
+}
+
+static void
+handle_memtrace_mem_write(uint32_t *p)
+{
+   uint64_t address = *(uint64_t*)[1];
+   uint32_t address_space = p[3] >> 28;
+   uint32_t size = p[4];
+   uint32_t *data = p + 5;
+
+   if (address_space != 1)
+  return;
+
+   if (gtt_size < address + size) {
+  fprintf(stderr, "overflow gtt space: %s\n", strerror(errno));
+  exit(EXIT_FAILURE);
+   }
+
+   memcpy((char *) gtt + address, data, size);
+   if (gtt_end < address + size)
+  gtt_end = address + size;
+}
+
 struct aub_file {
FILE *stream;
 
@@ -292,35 +367,14 @@ aub_file_stdin(void)
 
 /* Newer version AUB opcode */
 #define OPCODE_NEW_AUB  0x2e
-#define SUBOPCODE_VERSION   0x00
+#define SUBOPCODE_REG_POLL  0x02
 #define SUBOPCODE_REG_WRITE 0x03
 #define SUBOPCODE_MEM_POLL  0x05
 #define SUBOPCODE_MEM_WRITE 0x06
+#define SUBOPCODE_VERSION   0x0e
 
 #define MAKE_GEN(major, minor) ( ((major) << 8) | (minor) )
 
-struct {
-   const char *name;
-   uint32_t gen;
-} device_map[] = {
-   { "bwr", MAKE_GEN(4, 0) },
-   { "cln", MAKE_GEN(4, 0) },
-   { "blc", MAKE_GEN(4, 0) },
-   { "ctg", MAKE_GEN(4, 0) },
-   { "el", MAKE_GEN(4, 0) },
-   { "il", MAKE_GEN(4, 0) },
-   { "sbr", MAKE_GEN(6, 0) },
-   { "ivb", MAKE_GEN(7, 0) },
-   { "lrb2", MAKE_GEN(0, 0) },
-   { "hsw", MAKE_GEN(7, 5) },
-   { "vlv", MAKE_GEN(7, 0) },
-   { "bdw", MAKE_GEN(8, 0) },
-   { "skl", MAKE_GEN(9, 0) },
-   { "chv", MAKE_GEN(8, 0) },
-   { "bxt", MAKE_GEN(9, 0) },
-   { "cnl", MAKE_GEN(10, 0) },
-};
-
 enum {
AUB_ITEM_DECODE_OK,
AUB_ITEM_DECODE_FAILED,
@@ -330,7 +384,7 @@ enum {
 static int
 aub_file_decode_batch(struct aub_file *file)
 {
-   uint32_t *p, h, device, data_type, *new_cursor;
+   uint32_t *p, h, *new_cursor;
int header_length, bias;
 
if (file->end - file->cursor < 1)
@@ -374,25 +428,19 @@ aub_file_decode_batch(struct aub_file *file)
case MAKE_HEADER(TYPE_AUB, OPCODE_AUB, SUBOPCODE_BMP):
   break;
case MAKE_HEADER(TYPE_AUB, OPCODE_NEW_AUB, SUBOPCODE_VERSION):
-  fprintf(outfile, "version block: dw1 %08x\n", p[1]);
-  device = (p[1] >> 8) & 0xff;
-  fprintf(outfile, "  device %s\n", device_map[device].name);
+  handle_memtrace_version(p);
   break;
case MAKE_HEADER(TYPE_AUB, OPCODE_NEW_AUB, SUBOPCODE_REG_WRITE):
-  fprintf(outfile, "register write block: (dwords %d)\n", h & 0x);
-  fprintf(outfile, 

Mesa (master): .gitignore: Ignore new generated files

[Jordan Justen]

Module: Mesa
Branch: master
Commit: 161a97c3d5e9195dce064d35446caec5ab59943d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=161a97c3d5e9195dce064d35446caec5ab59943d

Author: Scott D Phillips 
Date:   Fri Jan  5 10:52:27 2018 -0800

.gitignore: Ignore new generated files

New generated files from:

  bb1e6ff161c ("spirv: Add a prepass to set types on vtn_values")
  65fc16c9741 ("autotools: set XA versions in configure.ac and configure header 
file")

Reviewed-by: Jordan Justen 

---

 src/compiler/spirv/.gitignore| 1 +
 src/gallium/state_trackers/xa/.gitignore | 1 +
 2 files changed, 2 insertions(+)

diff --git a/src/compiler/spirv/.gitignore b/src/compiler/spirv/.gitignore
index f723c31b04..fd06285b40 100644
--- a/src/compiler/spirv/.gitignore
+++ b/src/compiler/spirv/.gitignore
@@ -1 +1,2 @@
 /spirv_info.c
+/vtn_gather_types.c
diff --git a/src/gallium/state_trackers/xa/.gitignore 
b/src/gallium/state_trackers/xa/.gitignore
new file mode 100644
index 00..6a5bb3e1e3
--- /dev/null
+++ b/src/gallium/state_trackers/xa/.gitignore
@@ -0,0 +1 @@
+/xa_tracker.h

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Mesa (master): aubinator: honor --color option when printing the header

[Jordan Justen]

Module: Mesa
Branch: master
Commit: 4f0a2ff4c12c7a7a45c7a360a67f82a859a9634e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f0a2ff4c12c7a7a45c7a360a67f82a859a9634e

Author: Scott D Phillips 
Date:   Tue Nov 28 15:52:08 2017 -0800

aubinator: honor --color option when printing the header

Reviewed-by: Jordan Justen 

---

 src/intel/tools/aubinator.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index ed7446cf1e..46b0a47bcd 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -192,8 +192,12 @@ handle_trace_header(uint32_t *p)
gen_batch_decode_ctx_init(_ctx, , outfile, batch_flags,
  xml_path, get_gen_batch_bo, NULL);
 
+   char *color = GREEN_HEADER, *reset_color = NORMAL;
+   if (option_color == COLOR_NEVER)
+  color = reset_color = "";
+
fprintf(outfile, "%sAubinator: Intel AUB file decoder.%-80s%s\n",
-   GREEN_HEADER, "", NORMAL);
+   color, "", reset_color);
 
if (input_file)
   fprintf(outfile, "File name:%s\n", input_file);

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Mesa (master): Meson: ensure variable defined

[Dylan Baker]

Module: Mesa
Branch: master
Commit: 73ce7cb47406ec3e0fd56945dc66f7e258187630
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=73ce7cb47406ec3e0fd56945dc66f7e258187630

Author: Dylan Baker 
Date:   Mon Jan  8 17:43:45 2018 -0800

Meson: ensure variable defined

A gallium driver is undefined if passing -Dgallium-drivers=''

Fixes: e0b037d6979b2 ("meson: Build SWR driver")
Signed-off-by: Dylan Baker 
Acked-by: Jordan Justen 
Acked-by: Jason Ekstrand 

---

 meson.build | 1 +
 1 file changed, 1 insertion(+)

diff --git a/meson.build b/meson.build
index 1a1d3fd69b..77e4e894b2 100644
--- a/meson.build
+++ b/meson.build
@@ -125,6 +125,7 @@ with_gallium_imx = false
 with_gallium_i915 = false
 with_gallium_svga = false
 with_gallium_virgl = false
+with_gallium_swr = false
 _drivers = get_option('gallium-drivers')
 if _drivers == 'auto'
   if not ['darwin', 'windows'].contains(host_machine.system())

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Mesa (master): meson: Fix typo in clover build

[Dylan Baker]

Module: Mesa
Branch: master
Commit: 21bca27349e8e356c91cab8a20a034931002181b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=21bca27349e8e356c91cab8a20a034931002181b

Author: Dylan Baker 
Date:   Mon Jan  8 17:31:55 2018 -0800

meson: Fix typo in clover build

The leading space breaks things.

fixes: 42ea0631f108d ("meson: build clover")
Signed-off-by: Dylan Baker 

---

 meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index cb8ec89e2b..1a1d3fd69b 100644
--- a/meson.build
+++ b/meson.build
@@ -584,7 +584,7 @@ if with_gallium_st_nine
 endif
 
 _opencl = get_option('gallium-opencl')
-if _opencl !=' disabled'
+if _opencl != 'disabled'
   if not with_gallium
 error('OpenCL Clover implementation requires at least one gallium driver.')
   endif

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Mesa (master): meson: build clover

[Dylan Baker]

Module: Mesa
Branch: master
Commit: 42ea0631f108d82554339530d6c88aa1b448af1e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=42ea0631f108d82554339530d6c88aa1b448af1e

Author: Dylan Baker 
Date:   Fri Dec  8 15:26:00 2017 -0800

meson: build clover

This has only been compile tested.

v2: - Have a single option for opencl (Eric E)
- fix typo "tgis" -> "tgsi" (Curro)
- Don't add "lib" to pipe loader libraries, which matches the
  autotools behavior
v3: - Remove trailing whitespace
- Make PIPE_SEARCH_DIR an absolute path
v4: - add trailing / to LIBCLC defines

Acked-by: Curro Jerez 
Tested-by: Jan Vesely 
cc: Aaron Watry 
Signed-off-by: Dylan Baker 

---

 include/meson.build   |  19 
 meson.build   |  29 +-
 meson_options.txt |   7 ++
 src/gallium/auxiliary/pipe-loader/meson.build |   3 +-
 src/gallium/meson.build   |  12 ++-
 src/gallium/state_trackers/clover/meson.build | 122 ++
 src/gallium/targets/opencl/meson.build|  73 +++
 src/gallium/targets/pipe-loader/meson.build   |  77 
 8 files changed, 336 insertions(+), 6 deletions(-)

diff --git a/include/meson.build b/include/meson.build
index e4dae91ced..a2e7ce6580 100644
--- a/include/meson.build
+++ b/include/meson.build
@@ -78,3 +78,22 @@ if with_gallium_st_nine
 subdir : 'd3dadapter',
   )
 endif
+
+# Only install the headers if we are building a stand alone implementation and
+# not an ICD enabled implementation
+if with_gallium_opencl and not with_opencl_icd
+  install_headers(
+'CL/cl.h',
+'CL/cl.hpp',
+'CL/cl_d3d10.h',
+'CL/cl_d3d11.h',
+'CL/cl_dx9_media_sharing.h',
+'CL/cl_egl.h',
+'CL/cl_ext.h',
+'CL/cl_gl.h',
+'CL/cl_gl_ext.h',
+'CL/cl_platform.h',
+'CL/opencl.h',
+subdir: 'CL'
+  )
+endif
diff --git a/meson.build b/meson.build
index ac35819a6e..cb8ec89e2b 100644
--- a/meson.build
+++ b/meson.build
@@ -583,6 +583,22 @@ if with_gallium_st_nine
   endif
 endif
 
+_opencl = get_option('gallium-opencl')
+if _opencl !=' disabled'
+  if not with_gallium
+error('OpenCL Clover implementation requires at least one gallium driver.')
+  endif
+
+  # TODO: alitvec?
+  dep_clc = dependency('libclc')
+  with_gallium_opencl = true
+  with_opencl_icd = _opencl == 'icd'
+else
+  dep_clc = []
+  with_gallium_opencl = false
+  with_gallium_icd = false
+endif
+
 gl_pkgconfig_c_flags = []
 if with_platform_x11
   if with_any_vk or (with_glx == 'dri' and with_dri_platform == 'drm')
@@ -930,7 +946,7 @@ dep_thread = dependency('threads')
 if dep_thread.found() and host_machine.system() != 'windows'
   pre_args += '-DHAVE_PTHREAD'
 endif
-if with_amd_vk or with_gallium_radeonsi or with_gallium_r600 # TODO: clover
+if with_amd_vk or with_gallium_radeonsi or with_gallium_r600 or 
with_gallium_opencl
   dep_elf = dependency('libelf', required : false)
   if not dep_elf.found()
 dep_elf = cc.find_library('elf')
@@ -972,12 +988,19 @@ if with_amd_vk or with_gallium_radeonsi or 
with_gallium_r600
 llvm_modules += 'asmparser'
   endif
 endif
+if with_gallium_opencl
+  llvm_modules += [
+'all-targets', 'linker', 'coverage', 'instrumentation', 'ipo', 'irreader',
+'lto', 'option', 'objcarcopts', 'profiledata',
+  ]
+  # TODO: optional modules
+endif
 
 _llvm = get_option('llvm')
 if _llvm == 'auto'
   dep_llvm = dependency(
 'llvm', version : '>= 3.9.0', modules : llvm_modules,
-required : with_amd_vk or with_gallium_radeonsi or with_gallium_swr,
+required : with_amd_vk or with_gallium_radeonsi or with_gallium_swr or 
with_gallium_opencl,
   )
   with_llvm = dep_llvm.found()
 elif _llvm == 'true'
@@ -1154,8 +1177,6 @@ else
   dep_lmsensors = []
 endif
 
-# TODO: clover
-
 # TODO: gallium tests
 
 # TODO: various libdirs
diff --git a/meson_options.txt b/meson_options.txt
index 4f4db5b7d2..894378985f 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -121,6 +121,13 @@ option(
   description : 'build gallium "nine" Direct3D 9.x state tracker.',
 )
 option(
+  'gallium-opencl',
+  type : 'combo',
+  choices : ['icd', 'standalone', 'disabled'],
+  value : 'disabled',
+  description : 'build gallium "clover" OpenCL state tracker.',
+)
+option(
   'd3d-drivers-path',
   type : 'string',
   value : '',
diff --git a/src/gallium/auxiliary/pipe-loader/meson.build 
b/src/gallium/auxiliary/pipe-loader/meson.build
index 9b12432aea..869a293514 100644
--- a/src/gallium/auxiliary/pipe-loader/meson.build
+++ b/src/gallium/auxiliary/pipe-loader/meson.build
@@ -60,7 +60,8 @@ libpipe_loader_dynamic = static_library(
   ],
   c_args : [
 c_vis_args, libpipe_loader_defines, '-DHAVE_PIPE_LOADER_DRI',
-'-DPIPE_SEARCH_DIR="@0@"'.format(join_paths(get_option('libdir'), 
'gallium-pipe')
+

Mesa (master): meson: Build SWR driver

[Dylan Baker]

Module: Mesa
Branch: master
Commit: e0b037d6979b266d4959c1e31746d4d19c941fdb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0b037d6979b266d4959c1e31746d4d19c941fdb

Author: Dylan Baker 
Date:   Wed Nov 29 17:50:05 2017 -0800

meson: Build SWR driver

This enables the SWR driver, but doesn't actually hook it up to any of
the targets yet. I felt like this patch was big and complicated enough
without adding that.

v2: - Fix typo 'delemeited' -> 'delimited' (Eric E)
- Fix type 'errror' -> 'error' (Eric E)
- Use variables to hold files instead of looking above the current
  meson build (Eric E)
- Use foreach loops to reduce the number of unique generators
- Add comment about why some generators have names and some are just
  added to a list
v3: - Remove trailing whitespace

Signed-off-by: Dylan Baker 

---

 meson.build|  12 +-
 meson_options.txt  |   6 +
 src/gallium/drivers/swr/meson.build| 289 +
 .../drivers/swr/rasterizer/codegen/meson.build | 158 +++
 src/gallium/meson.build|   8 +
 5 files changed, 467 insertions(+), 6 deletions(-)

diff --git a/meson.build b/meson.build
index d9f7ea9b2c..ac35819a6e 100644
--- a/meson.build
+++ b/meson.build
@@ -47,6 +47,7 @@ with_valgrind = get_option('valgrind')
 with_libunwind = get_option('libunwind')
 with_asm = get_option('asm')
 with_osmesa = get_option('osmesa')
+with_swr_arches = get_option('swr-arches').split(',')
 if get_option('texture-float')
   pre_args += '-DTEXTURE_FLOAT_ENABLED'
   message('WARNING: Floating-point texture enabled. Please consult 
docs/patents.txt and your lawyer before building mesa.')
@@ -155,6 +156,7 @@ if _drivers != ''
   with_gallium_i915 = _split.contains('i915')
   with_gallium_svga = _split.contains('svga')
   with_gallium_virgl = _split.contains('virgl')
+  with_gallium_swr = _split.contains('swr')
   with_gallium = true
 endif
 
@@ -181,7 +183,7 @@ if _vulkan_drivers != ''
   with_any_vk = with_amd_vk or with_intel_vk
 endif
 
-if with_dri_swrast and with_gallium_softpipe
+if with_dri_swrast and (with_gallium_softpipe or with_gallium_swr)
   error('Only one swrast provider can be built')
 endif
 if with_dri_i915 and with_gallium_i915
@@ -975,7 +977,7 @@ _llvm = get_option('llvm')
 if _llvm == 'auto'
   dep_llvm = dependency(
 'llvm', version : '>= 3.9.0', modules : llvm_modules,
-required : with_amd_vk or with_gallium_radeonsi,
+required : with_amd_vk or with_gallium_radeonsi or with_gallium_swr,
   )
   with_llvm = dep_llvm.found()
 elif _llvm == 'true'
@@ -997,8 +999,8 @@ if with_llvm
 '-DHAVE_LLVM=0x0@0@@1@@2@'.format(_llvm_version[0], _llvm_version[1], 
_llvm_patch),
 '-DMESA_LLVM_VERSION_PATCH=@0@'.format(_llvm_patch),
   ]
-elif with_amd_vk or with_gallium_radeonsi
-  error('The following drivers requires LLVM: Radv, RadeonSI. One of these is 
enabled, but LLVM is disabled.')
+elif with_amd_vk or with_gallium_radeonsi or with_gallium_swr
+  error('The following drivers requires LLVM: Radv, RadeonSI, SWR. One of 
these is enabled, but LLVM is disabled.')
 endif
 
 dep_glvnd = []
@@ -1158,8 +1160,6 @@ endif
 
 # TODO: various libdirs
 
-# TODO: swr
-
 # TODO: gallium driver dirs
 
 # FIXME: this is a workaround for #2326
diff --git a/meson_options.txt b/meson_options.txt
index 39b137cbea..4f4db5b7d2 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -261,3 +261,9 @@ option(
   choices : ['8', '16', '32'],
   description : 'Number of channel bits for OSMesa.'
 )
+option(
+  'swr-arches',
+  type : 'string',
+  value : 'avx,avx2',
+  description : 'Comma delemited swr architectures. choices : avx,avx2,knl,skx'
+)
diff --git a/src/gallium/drivers/swr/meson.build 
b/src/gallium/drivers/swr/meson.build
new file mode 100644
index 00..c8c69b096a
--- /dev/null
+++ b/src/gallium/drivers/swr/meson.build
@@ -0,0 +1,289 @@
+# Copyright © 2017 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION 

Mesa (master): meson: set opencl flags for r600

[Dylan Baker]

Module: Mesa
Branch: master
Commit: eab0316d107dd2d050ea01eb829f86de1a617e1c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eab0316d107dd2d050ea01eb829f86de1a617e1c

Author: Dylan Baker 
Date:   Fri Dec  8 15:29:59 2017 -0800

meson: set opencl flags for r600

Signed-off-by: Dylan Baker 

---

 src/gallium/drivers/r600/meson.build | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/r600/meson.build 
b/src/gallium/drivers/r600/meson.build
index 2132dbb33a..5899518a2e 100644
--- a/src/gallium/drivers/r600/meson.build
+++ b/src/gallium/drivers/r600/meson.build
@@ -113,12 +113,15 @@ egd_tables_h = custom_target(
   capture : true,
 )
 
-# TODO: compute defines
+r600_c_args = []
+if with_gallium_opencl
+  r600_c_args += '-DHAVE_OPENCL'
+endif
 
 libr600 = static_library(
   'r600',
   [files_r600, egd_tables_h],
-  c_args : [c_vis_args],
+  c_args : [c_vis_args, r600_c_args],
   cpp_args : [cpp_vis_args],
   include_directories : [
 inc_src, inc_include, inc_gallium, inc_gallium_aux, inc_amd_common,

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Mesa (master): meson: Turn on swr for relevant targets

[Dylan Baker]

Module: Mesa
Branch: master
Commit: 425fcbde3f816e2a2efb8d1aed2442d40898d447
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=425fcbde3f816e2a2efb8d1aed2442d40898d447

Author: Dylan Baker 
Date:   Wed Nov 29 17:53:54 2017 -0800

meson: Turn on swr for relevant targets

Currently that's dri, libgl-xlib, and osmesa.

v2: - put drivers on a separate line from normal dependencies (Eric E)

cc: George Kyriazis 
cc: Tim Rowley 
cc: Bruce Cherniak 
Signed-off-by: Dylan Baker 
Reviewed-by: Eric Engestrom 

---

 src/gallium/meson.build| 1 -
 src/gallium/targets/dri/meson.build| 4 ++--
 src/gallium/targets/libgl-xlib/meson.build | 4 ++--
 src/gallium/targets/osmesa/meson.build | 5 ++---
 4 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/src/gallium/meson.build b/src/gallium/meson.build
index 3e2fd09571..fc21dcf03e 100644
--- a/src/gallium/meson.build
+++ b/src/gallium/meson.build
@@ -145,7 +145,6 @@ endif
 if with_gallium_st_nine
   subdir('state_trackers/nine')
 endif
-# TODO: SWR
 # TODO: clover
 if with_dri
   subdir('state_trackers/dri')
diff --git a/src/gallium/targets/dri/meson.build 
b/src/gallium/targets/dri/meson.build
index 5ca7b015d9..edf8d67fe3 100644
--- a/src/gallium/targets/dri/meson.build
+++ b/src/gallium/targets/dri/meson.build
@@ -69,7 +69,7 @@ libgallium_dri = shared_library(
 dep_selinux, dep_expat, dep_libdrm, dep_llvm, dep_lmsensors, dep_thread,
 driver_swrast, driver_r300, driver_r600, driver_radeonsi, driver_nouveau,
 driver_pl111, driver_vc4, driver_vc5, driver_freedreno, driver_etnaviv,
-driver_imx, driver_i915, driver_svga, driver_virgl,
+driver_imx, driver_i915, driver_svga, driver_virgl, driver_swr,
   ],
 )
 
@@ -77,7 +77,7 @@ foreach d : [[with_gallium_pl111, 'pl111_dri.so'],
  [with_gallium_radeonsi, 'radeonsi_dri.so'],
  [with_gallium_nouveau, 'nouveau_dri.so'],
  [with_gallium_freedreno, ['msm_dri.so', 'kgsl_dri.so']],
- [with_gallium_softpipe, 'swrast_dri.so'],
+ [with_gallium_softpipe or with_gallium_swr, 'swrast_dri.so'],
  [with_gallium_softpipe and with_gallium_drisw_kms, 
'kms_swrast_dri.so'],
  [with_gallium_vc4, 'vc4_dri.so'],
  [with_gallium_vc5, 'vc5_dri.so'],
diff --git a/src/gallium/targets/libgl-xlib/meson.build 
b/src/gallium/targets/libgl-xlib/meson.build
index c413a25bd6..6c8d2b4bc0 100644
--- a/src/gallium/targets/libgl-xlib/meson.build
+++ b/src/gallium/targets/libgl-xlib/meson.build
@@ -38,7 +38,6 @@ endif
 if with_shared_glapi
   gallium_xlib_link_with += libglapi
 endif
-# TODO: SWR
 
 libgl = shared_library(
   'GL',
@@ -55,7 +54,8 @@ libgl = shared_library(
 libgallium, libmesa_util, libmesa_gallium, gallium_xlib_link_with,
   ],
   dependencies : [
-dep_thread, dep_clock, dep_unwind, dep_lmsensors, driver_swrast,
+dep_thread, dep_clock, dep_unwind, dep_lmsensors,
+driver_swrast, driver_swr,
   ],
   install : true,
   version : '1.5.0',
diff --git a/src/gallium/targets/osmesa/meson.build 
b/src/gallium/targets/osmesa/meson.build
index cbf0e3d096..e51c54f8bc 100644
--- a/src/gallium/targets/osmesa/meson.build
+++ b/src/gallium/targets/osmesa/meson.build
@@ -32,8 +32,6 @@ if with_ld_version_script
   osmesa_link_deps += files('osmesa.sym')
 endif
 
-# TODO: swr
-
 libosmesa = shared_library(
   osmesa_lib_name,
   'target.c',
@@ -51,7 +49,8 @@ libosmesa = shared_library(
 osmesa_link_with,
   ],
   dependencies : [
-dep_selinux, dep_thread, dep_clock, dep_unwind, driver_swrast,
+dep_selinux, dep_thread, dep_clock, dep_unwind,
+driver_swrast, driver_swr,
   ],
   version : '8.0.0',
   install : true,

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Mesa (master): ac: rework emit_barrier() to not segfault on radeonsi

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: f04d2ca0d979101dd8bfcdc6cad30461ff73a7cc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f04d2ca0d979101dd8bfcdc6cad30461ff73a7cc

Author: Timothy Arceri 
Date:   Mon Jan  8 17:41:24 2018 +1100

ac: rework emit_barrier() to not segfault on radeonsi

nir_to_llvm_context will always be NULL for radeonsi so we need
work around this.

Reviewed-by: Dave Airlie 
Reviewed-by: Samuel Pitoiset 

---

 src/amd/common/ac_nir_to_llvm.c | 17 -
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index cad4adfa03..70876cfc69 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3831,19 +3831,18 @@ static void emit_membar(struct nir_to_llvm_context *ctx,
ac_build_waitcnt(>ac, waitcnt);
 }
 
-static void emit_barrier(struct nir_to_llvm_context *ctx)
+static void emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
 {
/* SI only (thanks to a hw bug workaround):
 * The real barrier instruction isn’t needed, because an entire patch
 * always fits into a single wave.
 */
-   if (ctx->options->chip_class == SI &&
-   ctx->stage == MESA_SHADER_TESS_CTRL) {
-   ac_build_waitcnt(>ac, LGKM_CNT & VM_CNT);
+   if (ac->chip_class == SI && stage == MESA_SHADER_TESS_CTRL) {
+   ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
return;
}
-   ac_build_intrinsic(>ac, "llvm.amdgcn.s.barrier",
-  ctx->ac.voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
+   ac_build_intrinsic(ac, "llvm.amdgcn.s.barrier",
+  ac->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
 }
 
 static void emit_discard_if(struct ac_nir_context *ctx,
@@ -4336,7 +4335,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
emit_membar(ctx->nctx, instr);
break;
case nir_intrinsic_barrier:
-   emit_barrier(ctx->nctx);
+   emit_barrier(>ac, ctx->stage);
break;
case nir_intrinsic_var_atomic_add:
case nir_intrinsic_var_atomic_imin:
@@ -6179,7 +6178,7 @@ write_tess_factors(struct nir_to_llvm_context *ctx)
LLVMValueRef lds_base, lds_inner, lds_outer, byteoffset, buffer;
LLVMValueRef out[6], vec0, vec1, tf_base, inner[4], outer[4];
int i;
-   emit_barrier(ctx);
+   emit_barrier(>ac, ctx->stage);
 
switch (ctx->options->key.tcs.primitive_mode) {
case GL_ISOLINES:
@@ -6728,7 +6727,7 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
}
 
if (i)
-   emit_barrier();
+   emit_barrier(, ctx.stage);
 
ac_setup_rings();
 

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Mesa (master): ac: add load_tess_level() to the abi

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 19f3141e6ab34dc7389b5e1fa9f3dca5e23b2191
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=19f3141e6ab34dc7389b5e1fa9f3dca5e23b2191

Author: Timothy Arceri 
Date:   Mon Dec 11 16:16:30 2017 +1100

ac: add load_tess_level() to the abi

Fixes the following piglit tests in radeonsi:

vs-tcs-tes-tessinner-tessouter-inputs-quads.shader_test
vs-tcs-tes-tessinner-tessouter-inputs-tris.shader_test
vs-tes-tessinner-tessouter-inputs-quads.shader_test
vs-tes-tessinner-tessouter-inputs-tris.shader_test

v2: make use of si_shader_io_get_unique_index_patch()
via the helper in the previous patch rather than
shader_io_get_unique_index()

Reviewed-by: Nicolai Hähnle  (v1)
Reviewed-by: Marek Olšák 

---

 src/amd/common/ac_nir_to_llvm.c  |  6 ++
 src/amd/common/ac_shader_abi.h   |  4 
 src/gallium/drivers/radeonsi/si_shader.c | 22 ++
 3 files changed, 32 insertions(+)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 42ddebbeef..cad4adfa03 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -4369,6 +4369,12 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
result = ctx->abi->load_tess_coord(ctx->abi, type, 
instr->num_components);
break;
}
+   case nir_intrinsic_load_tess_level_outer:
+   result = ctx->abi->load_tess_level(ctx->abi, 
VARYING_SLOT_TESS_LEVEL_OUTER);
+   break;
+   case nir_intrinsic_load_tess_level_inner:
+   result = ctx->abi->load_tess_level(ctx->abi, 
VARYING_SLOT_TESS_LEVEL_INNER);
+   break;
case nir_intrinsic_load_patch_vertices_in:
result = LLVMConstInt(ctx->ac.i32, 
ctx->nctx->options->key.tcs.input_vertices, false);
break;
diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index 277e4efe47..e3a47089a5 100644
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -103,6 +103,10 @@ struct ac_shader_abi {
LLVMTypeRef type,
unsigned num_components);
 
+   LLVMValueRef (*load_tess_level)(struct ac_shader_abi *abi,
+   unsigned varying_id);
+
+
LLVMValueRef (*load_ubo)(struct ac_shader_abi *abi, LLVMValueRef index);
 
/**
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index e579916359..86f3f7a8ba 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1934,6 +1934,27 @@ static LLVMValueRef load_tess_level(struct 
si_shader_context *ctx,
 
 }
 
+static LLVMValueRef si_load_tess_level(struct ac_shader_abi *abi,
+  unsigned varying_id)
+{
+   struct si_shader_context *ctx = si_shader_context_from_abi(abi);
+   unsigned semantic_name;
+
+   switch (varying_id) {
+   case VARYING_SLOT_TESS_LEVEL_INNER:
+   semantic_name = TGSI_SEMANTIC_TESSINNER;
+   break;
+   case VARYING_SLOT_TESS_LEVEL_OUTER:
+   semantic_name = TGSI_SEMANTIC_TESSOUTER;
+   break;
+   default:
+   unreachable("unknown tess level");
+   }
+
+   return load_tess_level(ctx, semantic_name);
+
+}
+
 void si_load_system_value(struct si_shader_context *ctx,
  unsigned index,
  const struct tgsi_full_declaration *decl)
@@ -5971,6 +5992,7 @@ static bool si_compile_tgsi_main(struct si_shader_context 
*ctx,
bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tes;
ctx->abi.load_tess_inputs = si_nir_load_input_tes;
ctx->abi.load_tess_coord = si_load_tess_coord;
+   ctx->abi.load_tess_level = si_load_tess_level;
if (shader->key.as_es)
ctx->abi.emit_outputs = si_llvm_emit_es_epilogue;
else

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Mesa (master): radeonsi: add load_tess_level() helper

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 2bd7ab32cfe8ad2ee7469ecb83d9077cd520c537
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2bd7ab32cfe8ad2ee7469ecb83d9077cd520c537

Author: Timothy Arceri 
Date:   Mon Dec 11 14:48:41 2017 +1100

radeonsi: add load_tess_level() helper

This will be shared by the tgsi and nir backends.

v2: move si_shader_io_get_unique_index_patch() call inside
the helper.

Reviewed-by: Nicolai Hähnle  (v1)
Reviewed-by: Marek Olšák 

---

 src/gallium/drivers/radeonsi/si_shader.c | 33 ++--
 1 file changed, 19 insertions(+), 14 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index f6e3083e4c..e579916359 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1916,6 +1916,24 @@ static LLVMValueRef si_load_tess_coord(struct 
ac_shader_abi *abi,
return lp_build_gather_values(>gallivm, coord, 4);
 }
 
+static LLVMValueRef load_tess_level(struct si_shader_context *ctx,
+   unsigned semantic_name)
+{
+   LLVMValueRef buffer, base, addr;
+
+   int param = si_shader_io_get_unique_index_patch(semantic_name, 0);
+
+   buffer = desc_from_addr_base64k(ctx, 
ctx->param_tcs_offchip_addr_base64k);
+
+   base = LLVMGetParam(ctx->main_fn, ctx->param_tcs_offchip_offset);
+   addr = get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx), NULL,
+ LLVMConstInt(ctx->i32, param, 0));
+
+   return buffer_load(>bld_base, ctx->f32,
+  ~0, buffer, base, addr, true);
+
+}
+
 void si_load_system_value(struct si_shader_context *ctx,
  unsigned index,
  const struct tgsi_full_declaration *decl)
@@ -2034,21 +2052,8 @@ void si_load_system_value(struct si_shader_context *ctx,
 
case TGSI_SEMANTIC_TESSINNER:
case TGSI_SEMANTIC_TESSOUTER:
-   {
-   LLVMValueRef buffer, base, addr;
-   int param = 
si_shader_io_get_unique_index_patch(decl->Semantic.Name, 0);
-
-   buffer = desc_from_addr_base64k(ctx, 
ctx->param_tcs_offchip_addr_base64k);
-
-   base = LLVMGetParam(ctx->main_fn, 
ctx->param_tcs_offchip_offset);
-   addr = get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx), 
NULL,
- LLVMConstInt(ctx->i32, param, 0));
-
-   value = buffer_load(>bld_base, ctx->f32,
-   ~0, buffer, base, addr, true);
-
+   value = load_tess_level(ctx, decl->Semantic.Name);
break;
-   }
 
case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI:
case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI:

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Mesa (master): spirv: Add better type validation to OpTypeImage

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: d6a40993031b2ba088d92ce6ab832c50364d0f00
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d6a40993031b2ba088d92ce6ab832c50364d0f00

Author: Jason Ekstrand 
Date:   Mon Dec 11 23:03:58 2017 -0800

spirv: Add better type validation to OpTypeImage

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_to_nir.c | 17 ++---
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 67c74d70ac..0d474957dc 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1075,10 +1075,12 @@ vtn_handle_type(struct vtn_builder *b, SpvOp opcode,
case SpvOpTypeImage: {
   val->type->base_type = vtn_base_type_image;
 
-  const struct glsl_type *sampled_type =
- vtn_value(b, w[2], vtn_value_type_type)->type->type;
+  const struct vtn_type *sampled_type =
+ vtn_value(b, w[2], vtn_value_type_type)->type;
 
-  vtn_assert(glsl_type_is_vector_or_scalar(sampled_type));
+  vtn_fail_if(sampled_type->base_type != vtn_base_type_scalar ||
+  glsl_get_bit_size(sampled_type->type) != 32,
+  "Sampled type of OpTypeImage must be a 32-bit scalar");
 
   enum glsl_sampler_dim dim;
   switch ((SpvDim)w[3]) {
@@ -1090,7 +1092,7 @@ vtn_handle_type(struct vtn_builder *b, SpvOp opcode,
   case SpvDimBuffer:   dim = GLSL_SAMPLER_DIM_BUF;   break;
   case SpvDimSubpassData: dim = GLSL_SAMPLER_DIM_SUBPASS; break;
   default:
- vtn_fail("Invalid SPIR-V Sampler dimension");
+ vtn_fail("Invalid SPIR-V image dimensionality");
   }
 
   bool is_shadow = w[4];
@@ -1115,15 +1117,16 @@ vtn_handle_type(struct vtn_builder *b, SpvOp opcode,
 
   val->type->image_format = translate_image_format(b, format);
 
+  enum glsl_base_type sampled_base_type =
+ glsl_get_base_type(sampled_type->type);
   if (sampled == 1) {
  val->type->sampled = true;
  val->type->type = glsl_sampler_type(dim, is_shadow, is_array,
- glsl_get_base_type(sampled_type));
+ sampled_base_type);
   } else if (sampled == 2) {
  vtn_assert(!is_shadow);
  val->type->sampled = false;
- val->type->type = glsl_image_type(dim, is_array,
-   glsl_get_base_type(sampled_type));
+ val->type->type = glsl_image_type(dim, is_array, sampled_base_type);
   } else {
  vtn_fail("We need to know if the image will be sampled");
   }

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Mesa (master): spirv: Require a storage type for OpStore destinations

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 986303cb928f1de3297c3f52a8ea52971e222472
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=986303cb928f1de3297c3f52a8ea52971e222472

Author: Jason Ekstrand 
Date:   Wed Jan  3 09:05:31 2018 -0800

spirv: Require a storage type for OpStore destinations

This rules out things such as trying to store a pointer to a local
variable.

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/vtn_variables.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index 2b3b3405e4..399860b808 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -2009,6 +2009,10 @@ vtn_handle_variables(struct vtn_builder *b, SpvOp opcode,
   struct vtn_pointer *dest = dest_val->pointer;
   struct vtn_value *src_val = vtn_untyped_value(b, w[2]);
 
+  /* OpStore requires us to actually have a storage type */
+  vtn_fail_if(dest->type->type == NULL,
+  "Invalid destination type for OpStore");
+
   vtn_fail_if(dest_val->type->deref != src_val->type,
   "Value and pointer types of OpStore do not match");
 

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Mesa (master): spirv/info: Add spirv_op_to_string

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 0bb18858fb67558ed8f9173de33c0ea31edf6530
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0bb18858fb67558ed8f9173de33c0ea31edf6530

Author: Jason Ekstrand 
Date:   Mon Dec 11 22:04:04 2017 -0800

spirv/info: Add spirv_op_to_string

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_info.h|  1 +
 src/compiler/spirv/spirv_info_c.py | 10 ++
 2 files changed, 11 insertions(+)

diff --git a/src/compiler/spirv/spirv_info.h b/src/compiler/spirv/spirv_info.h
index 81d43ec925..121ffd2feb 100644
--- a/src/compiler/spirv/spirv_info.h
+++ b/src/compiler/spirv/spirv_info.h
@@ -28,5 +28,6 @@
 
 const char *spirv_capability_to_string(SpvCapability cap);
 const char *spirv_decoration_to_string(SpvDecoration dec);
+const char *spirv_op_to_string(SpvOp op);
 
 #endif /* SPIRV_INFO_H */
diff --git a/src/compiler/spirv/spirv_info_c.py 
b/src/compiler/spirv/spirv_info_c.py
index 4a6a81524b..ff7942bcd3 100644
--- a/src/compiler/spirv/spirv_info_c.py
+++ b/src/compiler/spirv/spirv_info_c.py
@@ -45,6 +45,15 @@ def collect_data(spirv, kind):
 
 return (kind, values)
 
+def collect_opcodes(spirv):
+values = []
+for x in spirv["instructions"]:
+name = x["opname"]
+assert name.startswith("Op")
+values.append(name[2:])
+
+return ("Op", values)
+
 def parse_args():
 p = argparse.ArgumentParser()
 p.add_argument("json")
@@ -81,6 +90,7 @@ if __name__ == "__main__":
 info = [
 collect_data(spirv_info, "Capability"),
 collect_data(spirv_info, "Decoration"),
+collect_opcodes(spirv_info),
 ]
 
 with open(pargs.out, 'w') as f:

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Mesa (master): spirv: Do implicit conversions of uint to bool in OpStore

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 9e5aaa93cb242d8e401d61156809082dae86ed03
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e5aaa93cb242d8e401d61156809082dae86ed03

Author: Jason Ekstrand 
Date:   Wed Jan  3 09:26:18 2018 -0800

spirv: Do implicit conversions of uint to bool in OpStore

Technically, the GLSLang bug related to this can also affect SSBO writes
where the bool -> uint conversion is missing.  However, the only known
shipping application with an old enough version of GLSLang to cause
issues with this is the new DOOM game so we keep the workaround as small
as possible.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104424
Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/vtn_variables.c | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index 41125f689a..eb306d0c4a 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -2041,6 +2041,25 @@ vtn_handle_variables(struct vtn_builder *b, SpvOp opcode,
   vtn_fail_if(dest->type->type == NULL,
   "Invalid destination type for OpStore");
 
+  if (glsl_get_base_type(dest->type->type) == GLSL_TYPE_BOOL &&
+  glsl_get_base_type(src_val->type->type) == GLSL_TYPE_UINT) {
+ /* Early versions of GLSLang would use uint types for UBOs/SSBOs but
+  * would then store them to a local variable as bool.  Work around
+  * the issue by doing an implicit conversion.
+  *
+  * https://github.com/KhronosGroup/glslang/issues/170
+  * https://bugs.freedesktop.org/show_bug.cgi?id=104424
+  */
+ vtn_warn("OpStore of value of type OpTypeInt to a pointer to type "
+  "OpTypeBool.  Doing an implicit conversion to work around "
+  "the problem.");
+ struct vtn_ssa_value *bool_ssa =
+vtn_create_ssa_value(b, dest->type->type);
+ bool_ssa->def = nir_i2b(>nb, vtn_ssa_value(b, w[2])->def);
+ vtn_variable_store(b, bool_ssa, dest);
+ break;
+  }
+
   vtn_assert_types_equal(b, opcode, dest_val->type->deref, src_val->type);
 
   if (glsl_type_is_sampler(dest->type->type)) {

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Mesa (master): spirv: Make 'info' a local array spirv_info_c.py

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: ab85fd02d56c66d25dfdd2d999884a7dfb83da36
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab85fd02d56c66d25dfdd2d999884a7dfb83da36

Author: Jason Ekstrand 
Date:   Mon Dec 11 21:52:22 2017 -0800

spirv: Make 'info' a local array spirv_info_c.py

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_info_c.py | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/compiler/spirv/spirv_info_c.py 
b/src/compiler/spirv/spirv_info_c.py
index d898bf0131..4a6a81524b 100644
--- a/src/compiler/spirv/spirv_info_c.py
+++ b/src/compiler/spirv/spirv_info_c.py
@@ -78,8 +78,10 @@ if __name__ == "__main__":
 
 spirv_info = json.JSONDecoder().decode(open(pargs.json, "r").read())
 
-capabilities = collect_data(spirv_info, "Capability")
-decorations = collect_data(spirv_info, "Decoration")
+info = [
+collect_data(spirv_info, "Capability"),
+collect_data(spirv_info, "Decoration"),
+]
 
 with open(pargs.out, 'w') as f:
-f.write(TEMPLATE.render(info=[capabilities, decorations]))
+f.write(TEMPLATE.render(info=info))

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Mesa (master): spirv: Add better error messages in vtn_value helpers

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 296046556ac89cae6ad73f4195025ffd2203c919
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=296046556ac89cae6ad73f4195025ffd2203c919

Author: Jason Ekstrand 
Date:   Mon Dec 11 21:42:34 2017 -0800

spirv: Add better error messages in vtn_value helpers

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/vtn_private.h | 26 +++---
 1 file changed, 15 insertions(+), 11 deletions(-)

diff --git a/src/compiler/spirv/vtn_private.h b/src/compiler/spirv/vtn_private.h
index 7cb69d7843..f7d8f49c98 100644
--- a/src/compiler/spirv/vtn_private.h
+++ b/src/compiler/spirv/vtn_private.h
@@ -585,14 +585,24 @@ vtn_pointer_from_ssa(struct vtn_builder *b, nir_ssa_def 
*ssa,
  struct vtn_type *ptr_type);
 
 static inline struct vtn_value *
+vtn_untyped_value(struct vtn_builder *b, uint32_t value_id)
+{
+   vtn_fail_if(value_id >= b->value_id_bound,
+   "SPIR-V id %u is out-of-bounds", value_id);
+   return >values[value_id];
+}
+
+static inline struct vtn_value *
 vtn_push_value(struct vtn_builder *b, uint32_t value_id,
enum vtn_value_type value_type)
 {
-   assert(value_id < b->value_id_bound);
-   assert(b->values[value_id].value_type == vtn_value_type_invalid);
+   struct vtn_value *val = vtn_untyped_value(b, value_id);
 
-   b->values[value_id].value_type = value_type;
+   vtn_fail_if(val->value_type != vtn_value_type_invalid,
+   "SPIR-V id %u has already been written by another instruction",
+   value_id);
 
+   val->value_type = value_type;
return >values[value_id];
 }
 
@@ -612,18 +622,12 @@ vtn_push_ssa(struct vtn_builder *b, uint32_t value_id,
 }
 
 static inline struct vtn_value *
-vtn_untyped_value(struct vtn_builder *b, uint32_t value_id)
-{
-   assert(value_id < b->value_id_bound);
-   return >values[value_id];
-}
-
-static inline struct vtn_value *
 vtn_value(struct vtn_builder *b, uint32_t value_id,
   enum vtn_value_type value_type)
 {
struct vtn_value *val = vtn_untyped_value(b, value_id);
-   assert(val->value_type == value_type);
+   vtn_fail_if(val->value_type != value_type,
+   "SPIR-V id %u is the wrong kind of value", value_id);
return val;
 }
 

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Mesa (master): spirv: Add better validation to Op[Spec]Constant

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: dabce5061d9a49ebbf269d651e086e638be01aa9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dabce5061d9a49ebbf269d651e086e638be01aa9

Author: Jason Ekstrand 
Date:   Mon Dec 11 22:15:04 2017 -0800

spirv: Add better validation to Op[Spec]Constant

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_to_nir.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 6f5d3e1d64..014de781cc 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1300,7 +1300,9 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
}
 
case SpvOpConstant: {
-  vtn_assert(glsl_type_is_scalar(val->type->type));
+  vtn_fail_if(val->type->base_type != vtn_base_type_scalar,
+  "Result type of %s must be a scalar",
+  spirv_op_to_string(opcode));
   int bit_size = glsl_get_bit_size(val->type->type);
   switch (bit_size) {
   case 64:
@@ -1317,8 +1319,11 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
   }
   break;
}
+
case SpvOpSpecConstant: {
-  vtn_assert(glsl_type_is_scalar(val->type->type));
+  vtn_fail_if(val->type->base_type != vtn_base_type_scalar,
+  "Result type of %s must be a scalar",
+  spirv_op_to_string(opcode));
   int bit_size = glsl_get_bit_size(val->type->type);
   switch (bit_size) {
   case 64:

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Mesa (master): spirv: Add a mechanism for dumping failing shaders

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 53265c8798ee83e812f2e27356c8d9affc5356ca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=53265c8798ee83e812f2e27356c8d9affc5356ca

Author: Jason Ekstrand 
Date:   Mon Jan  1 19:55:33 2018 -0800

spirv: Add a mechanism for dumping failing shaders

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_to_nir.c | 28 
 src/compiler/spirv/vtn_private.h  |  1 +
 2 files changed, 29 insertions(+)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index d195fbe09b..7a4b52f4fd 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -31,6 +31,8 @@
 #include "nir/nir_constant_expressions.h"
 #include "spirv_info.h"
 
+#include 
+
 void
 vtn_log(struct vtn_builder *b, enum nir_spirv_debug_level level,
 size_t spirv_offset, const char *message)
@@ -94,6 +96,27 @@ vtn_log_err(struct vtn_builder *b,
ralloc_free(msg);
 }
 
+static void
+vtn_dump_shader(struct vtn_builder *b, const char *path, const char *prefix)
+{
+   static int idx = 0;
+
+   char filename[1024];
+   int len = snprintf(filename, sizeof(filename), "%s/%s-%d.spirv",
+  path, prefix, idx++);
+   if (len < 0 || len >= sizeof(filename))
+  return;
+
+   FILE *f = fopen(filename, "w");
+   if (f == NULL)
+  return;
+
+   fwrite(b->spirv, sizeof(*b->spirv), b->spirv_word_count, f);
+   fclose(f);
+
+   vtn_info("SPIR-V shader dumped to %s", filename);
+}
+
 void
 _vtn_warn(struct vtn_builder *b, const char *file, unsigned line,
   const char *fmt, ...)
@@ -117,6 +140,10 @@ _vtn_fail(struct vtn_builder *b, const char *file, 
unsigned line,
file, line, fmt, args);
va_end(args);
 
+   const char *dump_path = getenv("MESA_SPIRV_FAIL_DUMP_PATH");
+   if (dump_path)
+  vtn_dump_shader(b, dump_path, "fail");
+
longjmp(b->fail_jump, 1);
 }
 
@@ -3706,6 +3733,7 @@ spirv_to_nir(const uint32_t *words, size_t word_count,
/* Initialize the stn_builder object */
struct vtn_builder *b = rzalloc(NULL, struct vtn_builder);
b->spirv = words;
+   b->spirv_word_count = word_count;
b->file = NULL;
b->line = -1;
b->col = -1;
diff --git a/src/compiler/spirv/vtn_private.h b/src/compiler/spirv/vtn_private.h
index f7d8f49c98..374643a7a8 100644
--- a/src/compiler/spirv/vtn_private.h
+++ b/src/compiler/spirv/vtn_private.h
@@ -531,6 +531,7 @@ struct vtn_builder {
jmp_buf fail_jump;
 
const uint32_t *spirv;
+   size_t spirv_word_count;
 
nir_shader *shader;
const struct spirv_to_nir_options *options;

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Mesa (master): spirv: Refactor Op[Spec] ConstantComposite and add better validation

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 936f49268e1a3906130d213fe859b13e85fe0c53
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=936f49268e1a3906130d213fe859b13e85fe0c53

Author: Jason Ekstrand 
Date:   Mon Dec 11 22:25:09 2017 -0800

spirv: Refactor Op[Spec]ConstantComposite and add better validation

Now that vtn_base_type is a real and full base type, we can switch on
that instead of the GLSL base type which is a lot fewer cases in our
switch.

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_to_nir.c | 68 ++-
 1 file changed, 32 insertions(+), 36 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 014de781cc..b639dcdc93 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1341,60 +1341,56 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
   }
   break;
}
+
case SpvOpSpecConstantComposite:
case SpvOpConstantComposite: {
   unsigned elem_count = count - 3;
+  vtn_fail_if(elem_count != val->type->length,
+  "%s has %u constituents, expected %u",
+  spirv_op_to_string(opcode), elem_count, val->type->length);
+
   nir_constant **elems = ralloc_array(b, nir_constant *, elem_count);
   for (unsigned i = 0; i < elem_count; i++)
  elems[i] = vtn_value(b, w[i + 3], vtn_value_type_constant)->constant;
 
-  switch (glsl_get_base_type(val->type->type)) {
-  case GLSL_TYPE_UINT:
-  case GLSL_TYPE_INT:
-  case GLSL_TYPE_UINT16:
-  case GLSL_TYPE_INT16:
-  case GLSL_TYPE_UINT64:
-  case GLSL_TYPE_INT64:
-  case GLSL_TYPE_FLOAT:
-  case GLSL_TYPE_FLOAT16:
-  case GLSL_TYPE_BOOL:
-  case GLSL_TYPE_DOUBLE: {
+  switch (val->type->base_type) {
+  case vtn_base_type_vector: {
+ assert(glsl_type_is_vector(val->type->type));
  int bit_size = glsl_get_bit_size(val->type->type);
- if (glsl_type_is_matrix(val->type->type)) {
-vtn_assert(glsl_get_matrix_columns(val->type->type) == elem_count);
-for (unsigned i = 0; i < elem_count; i++)
-   val->constant->values[i] = elems[i]->values[0];
- } else {
-vtn_assert(glsl_type_is_vector(val->type->type));
-vtn_assert(glsl_get_vector_elements(val->type->type) == 
elem_count);
-for (unsigned i = 0; i < elem_count; i++) {
-   switch (bit_size) {
-   case 64:
-  val->constant->values[0].u64[i] = elems[i]->values[0].u64[0];
-  break;
-   case 32:
-  val->constant->values[0].u32[i] = elems[i]->values[0].u32[0];
-  break;
-   case 16:
-  val->constant->values[0].u16[i] = elems[i]->values[0].u16[0];
-  break;
-   default:
-  vtn_fail("Invalid SpvOpConstantComposite bit size");
-   }
+ for (unsigned i = 0; i < elem_count; i++) {
+switch (bit_size) {
+case 64:
+   val->constant->values[0].u64[i] = elems[i]->values[0].u64[0];
+   break;
+case 32:
+   val->constant->values[0].u32[i] = elems[i]->values[0].u32[0];
+   break;
+case 16:
+   val->constant->values[0].u16[i] = elems[i]->values[0].u16[0];
+   break;
+default:
+   vtn_fail("Invalid SpvOpConstantComposite bit size");
 }
  }
- ralloc_free(elems);
  break;
   }
-  case GLSL_TYPE_STRUCT:
-  case GLSL_TYPE_ARRAY:
+
+  case vtn_base_type_matrix:
+ assert(glsl_type_is_matrix(val->type->type));
+ for (unsigned i = 0; i < elem_count; i++)
+val->constant->values[i] = elems[i]->values[0];
+ break;
+
+  case vtn_base_type_struct:
+  case vtn_base_type_array:
  ralloc_steal(val->constant, elems);
  val->constant->num_elements = elem_count;
  val->constant->elements = elems;
  break;
 
   default:
- vtn_fail("Unsupported type for constants");
+ vtn_fail("Result type of %s must be a composite type",
+  spirv_op_to_string(opcode));
   }
   break;
}

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Mesa (master): spirv: Rework error checking for decorations

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 71ea4dded503cb68d40a144451bafaa80248c32b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=71ea4dded503cb68d40a144451bafaa80248c32b

Author: Jason Ekstrand 
Date:   Tue Dec 12 08:47:56 2017 -0800

spirv: Rework error checking for decorations

This reworks the error checking on our generic handling of decorations.
The objective is to validate all of the SPIR-V assumptions we make
up-front and convert redundant checks to compiled-out asserts.  The most
important part of this is to ensure that member decorations only occur
on OpTypeStruct and that the member is never out-of-bounds.  This way
later code can assume that the member is sane and not have to worry
about OOB array access due to a misplaced OpMemberDecorate.

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_to_nir.c | 41 ++-
 1 file changed, 32 insertions(+), 9 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 0d474957dc..d195fbe09b 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -376,15 +376,27 @@ _foreach_decoration_helper(struct vtn_builder *b,
   if (dec->scope == VTN_DEC_DECORATION) {
  member = parent_member;
   } else if (dec->scope >= VTN_DEC_STRUCT_MEMBER0) {
- vtn_assert(parent_member == -1);
+ vtn_fail_if(value->value_type != vtn_value_type_type ||
+ value->type->base_type != vtn_base_type_struct,
+ "OpMemberDecorate and OpGroupMemberDecorate are only "
+ "allowed on OpTypeStruct");
+ /* This means we haven't recursed yet */
+ assert(value == base_value);
+
  member = dec->scope - VTN_DEC_STRUCT_MEMBER0;
+
+ vtn_fail_if(member >= base_value->type->length,
+ "OpMemberDecorate specifies member %d but the "
+ "OpTypeStruct has only %u members",
+ member, base_value->type->length);
   } else {
  /* Not a decoration */
+ assert(dec->scope == VTN_DEC_EXECUTION_MODE);
  continue;
   }
 
   if (dec->group) {
- vtn_assert(dec->group->value_type == vtn_value_type_decoration_group);
+ assert(dec->group->value_type == vtn_value_type_decoration_group);
  _foreach_decoration_helper(b, base_value, member, dec->group,
 cb, data);
   } else {
@@ -414,7 +426,7 @@ vtn_foreach_execution_mode(struct vtn_builder *b, struct 
vtn_value *value,
   if (dec->scope != VTN_DEC_EXECUTION_MODE)
  continue;
 
-  vtn_assert(dec->group == NULL);
+  assert(dec->group == NULL);
   cb(b, value, dec, data);
}
 }
@@ -435,7 +447,7 @@ vtn_handle_decoration(struct vtn_builder *b, SpvOp opcode,
case SpvOpDecorate:
case SpvOpMemberDecorate:
case SpvOpExecutionMode: {
-  struct vtn_value *val = >values[target];
+  struct vtn_value *val = vtn_untyped_value(b, target);
 
   struct vtn_decoration *dec = rzalloc(b, struct vtn_decoration);
   switch (opcode) {
@@ -444,12 +456,14 @@ vtn_handle_decoration(struct vtn_builder *b, SpvOp opcode,
  break;
   case SpvOpMemberDecorate:
  dec->scope = VTN_DEC_STRUCT_MEMBER0 + *(w++);
+ vtn_fail_if(dec->scope < VTN_DEC_STRUCT_MEMBER0, /* overflow */
+ "Member argument of OpMemberDecorate too large");
  break;
   case SpvOpExecutionMode:
  dec->scope = VTN_DEC_EXECUTION_MODE;
  break;
   default:
- vtn_fail("Invalid decoration opcode");
+ unreachable("Invalid decoration opcode");
   }
   dec->decoration = *(w++);
   dec->literals = w;
@@ -474,6 +488,8 @@ vtn_handle_decoration(struct vtn_builder *b, SpvOp opcode,
 dec->scope = VTN_DEC_DECORATION;
  } else {
 dec->scope = VTN_DEC_STRUCT_MEMBER0 + *(++w);
+vtn_fail_if(dec->scope < 0, /* Check for overflow */
+"Member argument of OpGroupMemberDecorate too large");
  }
 
  /* Link into the list */
@@ -484,7 +500,7 @@ vtn_handle_decoration(struct vtn_builder *b, SpvOp opcode,
}
 
default:
-  vtn_fail("Unhandled opcode");
+  unreachable("Unhandled opcode");
}
 }
 
@@ -561,7 +577,7 @@ struct_member_decoration_cb(struct vtn_builder *b,
if (member < 0)
   return;
 
-   vtn_assert(member < ctx->num_fields);
+   assert(member < ctx->num_fields);
 
switch (dec->decoration) {
case SpvDecorationNonWritable:
@@ -664,7 +680,10 @@ struct_member_matrix_stride_cb(struct vtn_builder *b,
 {
if (dec->decoration != SpvDecorationMatrixStride)
   return;
-   vtn_assert(member >= 0);
+
+   vtn_fail_if(member < 0,
+   "The MatrixStride decoration is only allowed on members "
+   "of 

Mesa (master): spirv: Switch on vtn_base_type in OpComposite( Extract|Insert)

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 03c543d041c6c7c86a2e7ef0f666f2b1f6dd311d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=03c543d041c6c7c86a2e7ef0f666f2b1f6dd311d

Author: Jason Ekstrand 
Date:   Mon Dec 11 22:42:26 2017 -0800

spirv: Switch on vtn_base_type in OpComposite(Extract|Insert)

This is a bit simpler since we have fewer enum values in the case.  It's
also a bit more efficient because we're making fewer glsl_get_* calls.
While we're at it, add better type validation.

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_to_nir.c | 69 ++-
 1 file changed, 32 insertions(+), 37 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index b639dcdc93..67c74d70ac 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1485,44 +1485,39 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
 
  int elem = -1;
  int col = 0;
- const struct glsl_type *type = comp->type->type;
+ const struct vtn_type *type = comp->type;
  for (unsigned i = deref_start; i < count; i++) {
-switch (glsl_get_base_type(type)) {
-case GLSL_TYPE_UINT:
-case GLSL_TYPE_INT:
-case GLSL_TYPE_UINT16:
-case GLSL_TYPE_INT16:
-case GLSL_TYPE_UINT64:
-case GLSL_TYPE_INT64:
-case GLSL_TYPE_FLOAT:
-case GLSL_TYPE_FLOAT16:
-case GLSL_TYPE_DOUBLE:
-case GLSL_TYPE_BOOL:
-   /* If we hit this granularity, we're picking off an element */
-   if (glsl_type_is_matrix(type)) {
-  vtn_assert(col == 0 && elem == -1);
-  col = w[i];
-  elem = 0;
-  type = glsl_get_column_type(type);
-   } else {
-  vtn_assert(elem <= 0 && glsl_type_is_vector(type));
-  elem = w[i];
-  type = glsl_scalar_type(glsl_get_base_type(type));
-   }
-   continue;
-
-case GLSL_TYPE_ARRAY:
+vtn_fail_if(w[i] > type->length,
+"%uth index of %s is %u but the type has only "
+"%u elements", i - deref_start,
+spirv_op_to_string(opcode), w[i], type->length);
+
+switch (type->base_type) {
+case vtn_base_type_vector:
+   elem = w[i];
+   type = type->array_element;
+   break;
+
+case vtn_base_type_matrix:
+   assert(col == 0 && elem == -1);
+   col = w[i];
+   elem = 0;
+   type = type->array_element;
+   break;
+
+case vtn_base_type_array:
c = &(*c)->elements[w[i]];
-   type = glsl_get_array_element(type);
-   continue;
+   type = type->array_element;
+   break;
 
-case GLSL_TYPE_STRUCT:
+case vtn_base_type_struct:
c = &(*c)->elements[w[i]];
-   type = glsl_get_struct_field(type, w[i]);
-   continue;
+   type = type->members[w[i]];
+   break;
 
 default:
-   vtn_fail("Invalid constant type");
+   vtn_fail("%s must only index into composite types",
+spirv_op_to_string(opcode));
 }
  }
 
@@ -1530,8 +1525,8 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
 if (elem == -1) {
val->constant = *c;
 } else {
-   unsigned num_components = glsl_get_vector_elements(type);
-   unsigned bit_size = glsl_get_bit_size(type);
+   unsigned num_components = type->length;
+   unsigned bit_size = glsl_get_bit_size(type->type);
for (unsigned i = 0; i < num_components; i++)
   switch(bit_size) {
   case 64:
@@ -1550,12 +1545,12 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
  } else {
 struct vtn_value *insert =
vtn_value(b, w[4], vtn_value_type_constant);
-vtn_assert(insert->type->type == type);
+vtn_assert(insert->type == type);
 if (elem == -1) {
*c = insert->constant;
 } else {
-   unsigned num_components = glsl_get_vector_elements(type);
-   unsigned bit_size = glsl_get_bit_size(type);
+   unsigned num_components = type->length;
+   unsigned bit_size = glsl_get_bit_size(type->type);
for (unsigned i = 0; i < num_components; i++)
   switch (bit_size) {
   case 64:

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Mesa (master): spirv: Loosen the validation for load/store type matching

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 154668e79c4556ba0eda4751d6a14a45b9242a90
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=154668e79c4556ba0eda4751d6a14a45b9242a90

Author: Jason Ekstrand 
Date:   Mon Jan  1 20:00:02 2018 -0800

spirv: Loosen the validation for load/store type matching

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104338
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104424
Tested-by: Eero Tamminen 
Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/vtn_variables.c | 39 --
 1 file changed, 33 insertions(+), 6 deletions(-)

diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index 399860b808..41125f689a 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -1902,6 +1902,36 @@ vtn_create_variable(struct vtn_builder *b, struct 
vtn_value *val,
}
 }
 
+static void
+vtn_assert_types_equal(struct vtn_builder *b, SpvOp opcode,
+   struct vtn_type *dst_type,
+   struct vtn_type *src_type)
+{
+   if (dst_type->id == src_type->id)
+  return;
+
+   if (vtn_types_compatible(b, dst_type, src_type)) {
+  /* Early versions of GLSLang would re-emit types unnecessarily and you
+   * would end up with OpLoad, OpStore, or OpCopyMemory opcodes which have
+   * mismatched source and destination types.
+   *
+   * https://github.com/KhronosGroup/glslang/issues/304
+   * https://github.com/KhronosGroup/glslang/issues/307
+   * https://bugs.freedesktop.org/show_bug.cgi?id=104338
+   * https://bugs.freedesktop.org/show_bug.cgi?id=104424
+   */
+  vtn_warn("Source and destination types of %s do not have the same "
+   "ID (but are compatible): %u vs %u",
+spirv_op_to_string(opcode), dst_type->id, src_type->id);
+  return;
+   }
+
+   vtn_fail("Source and destination types of %s do not match: %s vs. %s",
+spirv_op_to_string(opcode),
+glsl_get_type_name(dst_type->type),
+glsl_get_type_name(src_type->type));
+}
+
 void
 vtn_handle_variables(struct vtn_builder *b, SpvOp opcode,
  const uint32_t *w, unsigned count)
@@ -1978,8 +2008,7 @@ vtn_handle_variables(struct vtn_builder *b, SpvOp opcode,
   struct vtn_value *dest = vtn_value(b, w[1], vtn_value_type_pointer);
   struct vtn_value *src = vtn_value(b, w[2], vtn_value_type_pointer);
 
-  vtn_fail_if(dest->type->deref != src->type->deref,
-  "Dereferenced pointer types to OpCopyMemory do not match");
+  vtn_assert_types_equal(b, opcode, dest->type->deref, src->type->deref);
 
   vtn_variable_copy(b, dest->pointer, src->pointer);
   break;
@@ -1991,8 +2020,7 @@ vtn_handle_variables(struct vtn_builder *b, SpvOp opcode,
   struct vtn_value *src_val = vtn_value(b, w[3], vtn_value_type_pointer);
   struct vtn_pointer *src = src_val->pointer;
 
-  vtn_fail_if(res_type != src_val->type->deref,
-  "Result and pointer types of OpLoad do not match");
+  vtn_assert_types_equal(b, opcode, res_type, src_val->type->deref);
 
   if (src->mode == vtn_variable_mode_image ||
   src->mode == vtn_variable_mode_sampler) {
@@ -2013,8 +2041,7 @@ vtn_handle_variables(struct vtn_builder *b, SpvOp opcode,
   vtn_fail_if(dest->type->type == NULL,
   "Invalid destination type for OpStore");
 
-  vtn_fail_if(dest_val->type->deref != src_val->type,
-  "Value and pointer types of OpStore do not match");
+  vtn_assert_types_equal(b, opcode, dest_val->type->deref, src_val->type);
 
   if (glsl_type_is_sampler(dest->type->type)) {
  vtn_warn("OpStore of a sampler detected.  Doing on-the-fly copy "

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Mesa (master): spirv: Remove a pointless assignment in SpvOpSpecConstant

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 6cf965751a5bbb015d53bdec0663d6bed66a9026
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6cf965751a5bbb015d53bdec0663d6bed66a9026

Author: Jason Ekstrand 
Date:   Mon Dec 11 22:13:33 2017 -0800

spirv: Remove a pointless assignment in SpvOpSpecConstant

We re-assign later inside the bit_size switch

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_to_nir.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index ebc1fefc51..6f5d3e1d64 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1319,7 +1319,6 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
}
case SpvOpSpecConstant: {
   vtn_assert(glsl_type_is_scalar(val->type->type));
-  val->constant->values[0].u32[0] = get_specialization(b, val, w[3]);
   int bit_size = glsl_get_bit_size(val->type->type);
   switch (bit_size) {
   case 64:

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Mesa (master): spirv: Rework asserts in var_decoration_cb

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 819adfdfb4601eed9c1642f23efa0c8077213a35
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=819adfdfb4601eed9c1642f23efa0c8077213a35

Author: Jason Ekstrand 
Date:   Tue Dec 12 09:44:59 2017 -0800

spirv: Rework asserts in var_decoration_cb

Now that higher levels are enforcing decoration sanity, we don't need
the vtn_asserts here.  This function *should* be safe but we still want
a few well-placed regular asserts in case something goes awry.

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/vtn_variables.c | 15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index 2a413a4cae..d69b0562ed 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -1465,11 +1465,11 @@ var_decoration_cb(struct vtn_builder *b, struct 
vtn_value *val, int member,
}
 
if (val->value_type == vtn_value_type_pointer) {
-  vtn_assert(val->pointer->var == void_var);
-  vtn_assert(val->pointer->chain == NULL);
-  vtn_assert(member == -1);
+  assert(val->pointer->var == void_var);
+  assert(val->pointer->chain == NULL);
+  assert(member == -1);
} else {
-  vtn_assert(val->value_type == vtn_value_type_type);
+  assert(val->value_type == vtn_value_type_type);
}
 
/* Location is odd.  If applied to a split structure, we have to walk the
@@ -1501,7 +1501,7 @@ var_decoration_cb(struct vtn_builder *b, struct vtn_value 
*val, int member,
  vtn_var->var->data.location = location;
   } else {
  /* This handles the structure member case */
- vtn_assert(vtn_var->members);
+ assert(vtn_var->members);
  unsigned length =
 glsl_get_length(glsl_without_array(vtn_var->type->type));
  for (unsigned i = 0; i < length; i++) {
@@ -1514,11 +1514,12 @@ var_decoration_cb(struct vtn_builder *b, struct 
vtn_value *val, int member,
   return;
} else {
   if (vtn_var->var) {
- vtn_assert(member <= 0);
+ assert(member == -1);
  apply_var_decoration(b, vtn_var->var, dec);
   } else if (vtn_var->members) {
  if (member >= 0) {
-vtn_assert(vtn_var->members);
+/* Member decorations must come from a type */
+assert(val->value_type == vtn_value_type_type);
 apply_var_decoration(b, vtn_var->members[member], dec);
  } else {
 unsigned length =

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Mesa (master): spirv: Unify boolean constants and add better validation

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: f13a5cff723eb9a7baf5850fdbf8d7ebefbb1677
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f13a5cff723eb9a7baf5850fdbf8d7ebefbb1677

Author: Jason Ekstrand 
Date:   Mon Dec 11 22:09:02 2017 -0800

spirv: Unify boolean constants and add better validation

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_to_nir.c | 21 +++--
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 39c0b5f5db..ebc1fefc51 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1281,19 +1281,20 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
val->constant = rzalloc(b, nir_constant);
switch (opcode) {
case SpvOpConstantTrue:
-  vtn_assert(val->type->type == glsl_bool_type());
-  val->constant->values[0].u32[0] = NIR_TRUE;
-  break;
case SpvOpConstantFalse:
-  vtn_assert(val->type->type == glsl_bool_type());
-  val->constant->values[0].u32[0] = NIR_FALSE;
-  break;
-
case SpvOpSpecConstantTrue:
case SpvOpSpecConstantFalse: {
-  vtn_assert(val->type->type == glsl_bool_type());
-  uint32_t int_val =
- get_specialization(b, val, (opcode == SpvOpSpecConstantTrue));
+  vtn_fail_if(val->type->type != glsl_bool_type(),
+  "Result type of %s must be OpTypeBool",
+  spirv_op_to_string(opcode));
+
+  uint32_t int_val = (opcode == SpvOpConstantTrue ||
+  opcode == SpvOpSpecConstantTrue);
+
+  if (opcode == SpvOpSpecConstantTrue ||
+  opcode == SpvOpSpecConstantFalse)
+ int_val = get_specialization(b, val, int_val);
+
   val->constant->values[0].u32[0] = int_val ? NIR_TRUE : NIR_FALSE;
   break;
}

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Mesa (master): spirv: Store the id of the type in vtn_type

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 8bad7f33c661eb0ec10d54b6297ed537822a4c78
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8bad7f33c661eb0ec10d54b6297ed537822a4c78

Author: Jason Ekstrand 
Date:   Wed Jan  3 08:41:42 2018 -0800

spirv: Store the id of the type in vtn_type

Previously, we were storing a pointer to the vtn_value because we use it
to look up decorations when we create input/output variables.  This
works, but it also may be useful to have the id itself so we may as well
store that instead.

Reviewed-by: Lionel Landwerlin 

---

 src/compiler/spirv/spirv_to_nir.c  | 2 +-
 src/compiler/spirv/vtn_private.h   | 4 ++--
 src/compiler/spirv/vtn_variables.c | 7 +--
 3 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 7a4b52f4fd..09aea54ed3 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -928,7 +928,7 @@ vtn_handle_type(struct vtn_builder *b, SpvOp opcode,
struct vtn_value *val = vtn_push_value(b, w[1], vtn_value_type_type);
 
val->type = rzalloc(b, struct vtn_type);
-   val->type->val = val;
+   val->type->id = w[1];
 
switch (opcode) {
case SpvOpTypeVoid:
diff --git a/src/compiler/spirv/vtn_private.h b/src/compiler/spirv/vtn_private.h
index 374643a7a8..f27ef8e3ef 100644
--- a/src/compiler/spirv/vtn_private.h
+++ b/src/compiler/spirv/vtn_private.h
@@ -274,8 +274,8 @@ struct vtn_type {
 
const struct glsl_type *type;
 
-   /* The value that declares this type.  Used for finding decorations */
-   struct vtn_value *val;
+   /* The SPIR-V id of the given type. */
+   uint32_t id;
 
/* Specifies the length of complex types.
 *
diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index d69b0562ed..2b3b3405e4 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -1793,7 +1793,8 @@ vtn_create_variable(struct vtn_builder *b, struct 
vtn_value *val,
   vtn_foreach_decoration(b, val, var_is_patch_cb, >patch);
   if (glsl_type_is_array(var->type->type) &&
   glsl_type_is_struct(without_array->type)) {
- vtn_foreach_decoration(b, without_array->val,
+ vtn_foreach_decoration(b, vtn_value(b, without_array->id,
+ vtn_value_type_type),
 var_is_patch_cb, >patch);
   }
 
@@ -1849,7 +1850,9 @@ vtn_create_variable(struct vtn_builder *b, struct 
vtn_value *val,
   /* For inputs and outputs, we need to grab locations and builtin
* information from the interface type.
*/
-  vtn_foreach_decoration(b, interface_type->val, var_decoration_cb, var);
+  vtn_foreach_decoration(b, vtn_value(b, interface_type->id,
+  vtn_value_type_type),
+ var_decoration_cb, var);
   break;
}
 

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Mesa (17.3): egl/android: Fix build break with dri2_initialize_android _EGLDisplay parameter

[Emil Velikov]

Module: Mesa
Branch: 17.3
Commit: a086fb9068c2a9a581ae8bad7c79a5663febf75e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a086fb9068c2a9a581ae8bad7c79a5663febf75e

Author: Rob Herring 
Date:   Wed Jan  3 10:16:23 2018 -0600

egl/android: Fix build break with dri2_initialize_android _EGLDisplay parameter

Commit 2f421651aca9 ("egl: let each platform decided how to handle
LIBGL_ALWAYS_SOFTWARE") broke the build due to copy-n-paste of misnamed
function parameter.:

src/egl/drivers/dri2/platform_android.c:1183:8: error: use of undeclared 
identifier 'disp'

Rather than just fixing 'disp', rename the function parameter 'dpy' to
'disp' to align with the other EGL platforms' implementations.

Fixes: 2f421651aca9 ("egl: let each platform decided how to handle 
LIBGL_ALWAYS_SOFTWARE")
Reviewed-by: Tapani Pälli 
Acked-by: Eric Engestrom 
Signed-off-by: Rob Herring 
(cherry picked from commit aa187fe7bfac856207a5feee36e17120a6ee9d22)
Signed-off-by: Emil Velikov 

Conflicts:
src/egl/drivers/dri2/platform_android.c

---

 src/egl/drivers/dri2/platform_android.c | 28 ++--
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index a85f4b0b9f..b6d4819827 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -1136,7 +1136,7 @@ static const __DRIextension 
*droid_image_loader_extensions[] = {
 };
 
 EGLBoolean
-dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *dpy)
+dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *disp)
 {
struct dri2_egl_display *dri2_dpy;
const char *err;
@@ -1160,7 +1160,7 @@ dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *dpy)
   goto cleanup;
}
 
-   dpy->DriverData = (void *) dri2_dpy;
+   disp->DriverData = (void *) dri2_dpy;
 
dri2_dpy->fd = droid_open_device(dri2_dpy);
if (dri2_dpy->fd < 0) {
@@ -1180,41 +1180,41 @@ dri2_initialize_android(_EGLDriver *drv, _EGLDisplay 
*dpy)
 * the __DRI_DRI2_LOADER extension */
if (!dri2_dpy->is_render_node) {
   dri2_dpy->loader_extensions = droid_dri2_loader_extensions;
-  if (!dri2_load_driver(dpy)) {
+  if (!dri2_load_driver(disp)) {
  err = "DRI2: failed to load driver";
  goto cleanup;
   }
} else {
   dri2_dpy->loader_extensions = droid_image_loader_extensions;
-  if (!dri2_load_driver_dri3(dpy)) {
+  if (!dri2_load_driver_dri3(disp)) {
  err = "DRI3: failed to load driver";
  goto cleanup;
   }
}
 
-   if (!dri2_create_screen(dpy)) {
+   if (!dri2_create_screen(disp)) {
   err = "DRI2: failed to create screen";
   goto cleanup;
}
 
-   if (!dri2_setup_extensions(dpy)) {
+   if (!dri2_setup_extensions(disp)) {
   err = "DRI2: failed to setup extensions";
   goto cleanup;
}
 
-   dri2_setup_screen(dpy);
+   dri2_setup_screen(disp);
 
-   if (!droid_add_configs_for_visuals(drv, dpy)) {
+   if (!droid_add_configs_for_visuals(drv, disp)) {
   err = "DRI2: failed to add configs";
   goto cleanup;
}
 
-   dpy->Extensions.ANDROID_framebuffer_target = EGL_TRUE;
-   dpy->Extensions.ANDROID_image_native_buffer = EGL_TRUE;
-   dpy->Extensions.ANDROID_recordable = EGL_TRUE;
-   dpy->Extensions.EXT_buffer_age = EGL_TRUE;
+   disp->Extensions.ANDROID_framebuffer_target = EGL_TRUE;
+   disp->Extensions.ANDROID_image_native_buffer = EGL_TRUE;
+   disp->Extensions.ANDROID_recordable = EGL_TRUE;
+   disp->Extensions.EXT_buffer_age = EGL_TRUE;
 #if ANDROID_API_LEVEL >= 23
-   dpy->Extensions.KHR_partial_update = EGL_TRUE;
+   disp->Extensions.KHR_partial_update = EGL_TRUE;
 #endif
 
/* Fill vtbl last to prevent accidentally calling virtual function during
@@ -1225,6 +1225,6 @@ dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *dpy)
return EGL_TRUE;
 
 cleanup:
-   dri2_display_destroy(dpy);
+   dri2_display_destroy(disp);
return _eglError(EGL_NOT_INITIALIZED, err);
 }

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Mesa (17.3): Update version to 17.3.2

[Emil Velikov]

Module: Mesa
Branch: 17.3
Commit: 535f24251a77f2d097a143e9c6986e44d0b1f437
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=535f24251a77f2d097a143e9c6986e44d0b1f437

Author: Emil Velikov 
Date:   Mon Jan  8 20:50:49 2018 +

Update version to 17.3.2

Signed-off-by: Emil Velikov 

---

 VERSION | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/VERSION b/VERSION
index 1f33a6f48f..fd9b308ed8 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-17.3.1
+17.3.2

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Mesa (17.3): docs: add release notes for 17.3.2

[Emil Velikov]

Module: Mesa
Branch: 17.3
Commit: 0f27052e325c3617e437912d0a3acaf3e3afd786
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f27052e325c3617e437912d0a3acaf3e3afd786

Author: Emil Velikov 
Date:   Mon Jan  8 21:32:27 2018 +

docs: add release notes for 17.3.2

Signed-off-by: Emil Velikov 

---

 docs/relnotes/17.3.2.html | 108 ++
 1 file changed, 108 insertions(+)

diff --git a/docs/relnotes/17.3.2.html b/docs/relnotes/17.3.2.html
new file mode 100644
index 00..0a097fa619
--- /dev/null
+++ b/docs/relnotes/17.3.2.html
@@ -0,0 +1,108 @@
+http://www.w3.org/TR/html4/loose.dtd;>
+
+
+  
+  Mesa Release Notes
+  
+
+
+
+
+  The Mesa 3D Graphics Library
+
+
+
+
+
+Mesa 17.3.2 Release Notes / January 8, 2018
+
+
+Mesa 17.3.2 is a bug fix release which fixes bugs found since the 17.3.1 
release.
+
+
+Mesa 17.3.2 implements the OpenGL 4.5 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
+4.5 is only available if requested at context creation
+because compatibility contexts are not supported.
+
+
+
+SHA256 checksums
+
+TBD
+
+
+
+New features
+None
+
+
+Bug fixes
+
+
+
+https://bugs.freedesktop.org/show_bug.cgi?id=97852;>Bug 97852 
- Unreal Engine corrupted preview viewport
+
+https://bugs.freedesktop.org/show_bug.cgi?id=103801;>Bug 
103801 - [i965] Observer_ issue
+
+https://bugs.freedesktop.org/show_bug.cgi?id=104288;>Bug 
104288 - Steamroll needs 
allow_glsl_cross_stage_interpolation_mismatch=true
+
+
+
+
+Changes
+
+Bas Nieuwenhuizen (1):
+
+  radv: Fix DCC compatible formats.
+
+
+Brendan King (1):
+
+  egl: link libEGL against the dynamic version of libglapi
+
+
+Dave Airlie (6):
+
+  radv/gfx9: add support for 3d images to blit 2d paths
+  radv: handle depth/stencil image copy with layouts better. (v3.1)
+  radv/meta: fix blit paths for depth/stencil (v2.1)
+  radv: fix issue with multisample positions and interp_var_at_sample.
+  radv/gfx9: add 3d sampler image-buffer copy shader. (v3)
+  radv: don't do format replacement on tc compat htile surfaces.
+
+
+Emil Velikov (2):
+
+  docs: add sha256 checksums for 17.3.1
+  Update version to 17.3.2
+
+
+Eric Engestrom (1):
+
+  egl: let each platform decided how to handle LIBGL_ALWAYS_SOFTWARE
+
+
+Rob Herring (1):
+
+  egl/android: Fix build break with dri2_initialize_android _EGLDisplay 
parameter
+
+
+Samuel Pitoiset (2):
+
+  radv/gfx9: fix primitive topology when adjacency is used
+  radv: use a faster version for nir_op_pack_half_2x16
+
+
+Tapani Pälli (2):
+
+  mesa: add AllowGLSLCrossStageInterpolationMismatch workaround
+  drirc: set allow_glsl_cross_stage_interpolation_mismatch for more 
games
+
+
+
+
+
+

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Mesa (master): spirv: Import 1.2 rev 3 headers and grammar from Khronos

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 22980f941e67fc66a25b5bb28b2bfa3dbef80e75
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=22980f941e67fc66a25b5bb28b2bfa3dbef80e75

Author: Caio Marcelo de Oliveira Filho 
Date:   Mon Jan  8 10:46:16 2018 -0800

spirv: Import 1.2 rev 3 headers and grammar from Khronos

Reviewed-by: Jason Ekstrand 

---

 src/compiler/spirv/spirv.core.grammar.json | 568 +
 src/compiler/spirv/spirv.h |  27 +-
 2 files changed, 431 insertions(+), 164 deletions(-)

diff --git a/src/compiler/spirv/spirv.core.grammar.json 
b/src/compiler/spirv/spirv.core.grammar.json
index e2950dd97b..47ca1c5600 100644
--- a/src/compiler/spirv/spirv.core.grammar.json
+++ b/src/compiler/spirv/spirv.core.grammar.json
@@ -26,7 +26,7 @@
   ],
   "magic_number" : "0x07230203",
   "major_version" : 1,
-  "minor_version" : 2,
+  "minor_version" : 3,
   "revision" : 1,
   "instructions" : [
 {
@@ -2410,7 +2410,7 @@
 { "kind" : "IdResult" },
 { "kind" : "IdScope","name" : "'Execution'" },
 { "kind" : "GroupOperation", "name" : "'Operation'" },
-{ "kind" : "IdRef",  "name" : "X" }
+{ "kind" : "IdRef",  "name" : "'X'" }
   ],
   "capabilities" : [ "Groups" ]
 },
@@ -2434,7 +2434,7 @@
 { "kind" : "IdResult" },
 { "kind" : "IdScope","name" : "'Execution'" },
 { "kind" : "GroupOperation", "name" : "'Operation'" },
-{ "kind" : "IdRef",  "name" : "X" }
+{ "kind" : "IdRef",  "name" : "'X'" }
   ],
   "capabilities" : [ "Groups" ]
 },
@@ -2446,7 +2446,7 @@
 { "kind" : "IdResult" },
 { "kind" : "IdScope","name" : "'Execution'" },
 { "kind" : "GroupOperation", "name" : "'Operation'" },
-{ "kind" : "IdRef",  "name" : "X" }
+{ "kind" : "IdRef",  "name" : "'X'" }
   ],
   "capabilities" : [ "Groups" ]
 },
@@ -2458,7 +2458,7 @@
 { "kind" : "IdResult" },
 { "kind" : "IdScope","name" : "'Execution'" },
 { "kind" : "GroupOperation", "name" : "'Operation'" },
-{ "kind" : "IdRef",  "name" : "X" }
+{ "kind" : "IdRef",  "name" : "'X'" }
   ],
   "capabilities" : [ "Groups" ]
 },
@@ -2470,7 +2470,7 @@
 { "kind" : "IdResult" },
 { "kind" : "IdScope","name" : "'Execution'" },
 { "kind" : "GroupOperation", "name" : "'Operation'" },
-{ "kind" : "IdRef",  "name" : "X" }
+{ "kind" : "IdRef",  "name" : "'X'" }
   ],
   "capabilities" : [ "Groups" ]
 },
@@ -2886,7 +2886,8 @@
 { "kind" : "IdRef", "name" : 
"'Coordinate'" },
 { "kind" : "ImageOperands", "quantifier" : "?" }
   ],
-  "capabilities" : [ "SparseResidency" ]
+  "capabilities" : [ "SparseResidency" ],
+  "version" : "None"
 },
 {
   "opname" : "OpImageSparseSampleProjExplicitLod",
@@ -2898,7 +2899,8 @@
 { "kind" : "IdRef", "name" : "'Coordinate'" },
 { "kind" : "ImageOperands" }
   ],
-  "capabilities" : [ "SparseResidency" ]
+  "capabilities" : [ "SparseResidency" ],
+  "version" : "None"
 },
 {
   "opname" : "OpImageSparseSampleProjDrefImplicitLod",
@@ -2911,7 +2913,8 @@
 { "kind" : "IdRef", "name" : "'D~ref~'" },
 { "kind" : "ImageOperands", "quantifier" : "?" }
   ],
-  "capabilities" : [ "SparseResidency" ]
+  "capabilities" : [ "SparseResidency" ],
+  "version" : "None"
 },
 {
   "opname" : "OpImageSparseSampleProjDrefExplicitLod",
@@ -2924,7 +2927,8 @@
 { "kind" : "IdRef", "name" : "'D~ref~'" },
 { "kind" : "ImageOperands" }
   ],
-  "capabilities" : [ "SparseResidency" ]
+  "capabilities" : [ "SparseResidency" ],
+  "version" : "None"
 },
 {
   "opname" : "OpImageSparseFetch",
@@ -3018,9 +3022,10 @@
   "operands" : [
 { "kind" : "IdResultType" },
 { "kind" : "IdResult" },
-{ "kind" : "IdRef","name" : "'Pointer'" }
+{ "kind" : "IdRef", "name" : "'Pointer'" }
   ],
-  "capabilities" : [ "Addresses" ]
+  "capabilities" : [ "Addresses" ],
+  "version" : "1.1"
 },
 {
   "opname" : "OpTypePipeStorage",
@@ -3028,7 +3033,8 @@
   "operands" : [
 { "kind" : "IdResult" }
   ],
-  "capabilities" : [ "PipeStorage" ]
+  "capabilities" : [ "PipeStorage" ],
+  "version" : "1.1"
 },
 {
   "opname" : "OpConstantPipeStorage",
@@ -3040,7 +3046,8 @@
 { "kind" : "LiteralInteger", "name" : "'Packet Alignment'" },
 { "kind" : "LiteralInteger", "name" : "'Capacity'" }
   ],
-  "capabilities" : [ "PipeStorage" ]
+  "capabilities" : [ "PipeStorage" ],

Mesa (master): radv: get InstanceID from VGPR1 (or VGPR2 for tess) instead of VGPR3

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 08a5f4412aa505011a9cb80b9e9ed8eb90469613
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=08a5f4412aa505011a9cb80b9e9ed8eb90469613

Author: Samuel Pitoiset 
Date:   Fri Jan  5 19:18:13 2018 +0100

radv: get InstanceID from VGPR1 (or VGPR2 for tess) instead of VGPR3

VGPR1 = InstanceID / StepRate0; // StepRate0 can be set to 1

Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/common/ac_nir_to_llvm.c | 32 
 1 file changed, 24 insertions(+), 8 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 48e2920a15..42ddebbeef 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -671,9 +671,14 @@ declare_vs_input_vgprs(struct nir_to_llvm_context *ctx, 
struct arg_info *args)
 {
add_arg(args, ARG_VGPR, ctx->ac.i32, >abi.vertex_id);
if (!ctx->is_gs_copy_shader) {
-   add_arg(args, ARG_VGPR, ctx->ac.i32, >rel_auto_id);
-   add_arg(args, ARG_VGPR, ctx->ac.i32, >vs_prim_id);
-   add_arg(args, ARG_VGPR, ctx->ac.i32, >abi.instance_id);
+   if (ctx->options->key.vs.as_ls) {
+   add_arg(args, ARG_VGPR, ctx->ac.i32, >rel_auto_id);
+   add_arg(args, ARG_VGPR, ctx->ac.i32, 
>abi.instance_id);
+   } else {
+   add_arg(args, ARG_VGPR, ctx->ac.i32, 
>abi.instance_id);
+   add_arg(args, ARG_VGPR, ctx->ac.i32, >vs_prim_id);
+   }
+   add_arg(args, ARG_VGPR, ctx->ac.i32, NULL); /* unused */
}
 }
 
@@ -5173,8 +5178,13 @@ handle_vs_input_decl(struct nir_to_llvm_context *ctx,
if (ctx->options->key.vs.instance_rate_inputs & (1u << index)) {
buffer_index = LLVMBuildAdd(ctx->builder, ctx->abi.instance_id,
ctx->abi.start_instance, "");
-   ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
-   ctx->shader_info->vs.vgpr_comp_cnt);
+   if (ctx->options->key.vs.as_ls) {
+   ctx->shader_info->vs.vgpr_comp_cnt =
+   MAX2(2, ctx->shader_info->vs.vgpr_comp_cnt);
+   } else {
+   ctx->shader_info->vs.vgpr_comp_cnt =
+   MAX2(1, ctx->shader_info->vs.vgpr_comp_cnt);
+   }
} else
buffer_index = LLVMBuildAdd(ctx->builder, ctx->abi.vertex_id,
ctx->abi.base_vertex, "");
@@ -6698,8 +6708,14 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
ctx.abi.load_tess_coord = load_tess_coord;
} else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {
if (shader_info->info.vs.needs_instance_id) {
-   ctx.shader_info->vs.vgpr_comp_cnt =
-   MAX2(3, 
ctx.shader_info->vs.vgpr_comp_cnt);
+   if (ctx.ac.chip_class == GFX9 &&
+   shaders[shader_count - 1]->info.stage == 
MESA_SHADER_TESS_CTRL) {
+   ctx.shader_info->vs.vgpr_comp_cnt =
+   MAX2(2, 
ctx.shader_info->vs.vgpr_comp_cnt);
+   } else {
+   ctx.shader_info->vs.vgpr_comp_cnt =
+   MAX2(1, 
ctx.shader_info->vs.vgpr_comp_cnt);
+   }
}
} else if (shaders[i]->info.stage == MESA_SHADER_FRAGMENT) {
shader_info->fs.can_discard = 
shaders[i]->info.fs.uses_discard;
@@ -6938,7 +6954,7 @@ ac_fill_shader_info(struct ac_shader_variant_info 
*shader_info, struct nir_shade
 case MESA_SHADER_VERTEX:
 shader_info->vs.as_es = options->key.vs.as_es;
 shader_info->vs.as_ls = options->key.vs.as_ls;
-/* in LS mode we need at least 1, invocation id needs 3, 
handled elsewhere */
+/* in LS mode we need at least 1, invocation id needs 2, 
handled elsewhere */
 if (options->key.vs.as_ls)
 shader_info->vs.vgpr_comp_cnt = MAX2(1, 
shader_info->vs.vgpr_comp_cnt);
 break;

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Mesa (master): radv: add has_scissor_bug for Vega10 and Raven

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: b09b3f88341b7cd31eb8b1921d8d2b29fd0bfaa3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b09b3f88341b7cd31eb8b1921d8d2b29fd0bfaa3

Author: Samuel Pitoiset 
Date:   Fri Jan  5 18:00:31 2018 +0100

radv: add has_scissor_bug for Vega10 and Raven

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/vulkan/radv_cmd_buffer.c | 3 +--
 src/amd/vulkan/radv_device.c | 4 
 src/amd/vulkan/radv_private.h| 1 +
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index b0bddd16b3..665ee876a9 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1122,8 +1122,7 @@ radv_emit_scissor(struct radv_cmd_buffer *cmd_buffer)
 * scissor registers are changed. There is also a more efficient but
 * more involved alternative workaround.
 */
-   if (cmd_buffer->device->physical_device->rad_info.family == CHIP_VEGA10 
||
-   cmd_buffer->device->physical_device->rad_info.family == CHIP_RAVEN) 
{
+   if (cmd_buffer->device->physical_device->has_scissor_bug) {
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH;
si_emit_cache_flush(cmd_buffer);
}
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 528d3539c9..4270e6a870 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -265,6 +265,10 @@ radv_physical_device_init(struct radv_physical_device 
*device,
 
device->cpdma_prefetch_writes_memory = device->rad_info.chip_class <= 
VI;
 
+   /* Vega10/Raven need a special workaround for a hardware bug. */
+   device->has_scissor_bug = device->rad_info.family == CHIP_VEGA10 ||
+ device->rad_info.family == CHIP_RAVEN;
+
radv_physical_device_init_mem_types(device);
 
result = radv_init_wsi(device);
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index f691c832bc..2d7d959187 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -273,6 +273,7 @@ struct radv_physical_device {
bool rbplus_allowed; /* if RB+ is allowed */
bool has_clear_state;
bool cpdma_prefetch_writes_memory;
+   bool has_scissor_bug;
 
/* This is the drivers on-disk cache used as a fallback as opposed to
 * the pipeline cache defined by apps.

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Mesa (master): radv: make shader BOs read-only for the GPU

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: a3c2a86757a3ca25453b7143f1c774c5f7fe499e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3c2a86757a3ca25453b7143f1c774c5f7fe499e

Author: Samuel Pitoiset 
Date:   Thu Jan  4 15:19:47 2018 +0100

radv: make shader BOs read-only for the GPU

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/vulkan/radv_device.c  | 2 ++
 src/amd/vulkan/radv_private.h | 1 +
 src/amd/vulkan/radv_shader.c  | 5 -
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 5f78af624b..528d3539c9 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -263,6 +263,8 @@ radv_physical_device_init(struct radv_physical_device 
*device,
 */
device->has_clear_state = device->rad_info.chip_class >= CIK;
 
+   device->cpdma_prefetch_writes_memory = device->rad_info.chip_class <= 
VI;
+
radv_physical_device_init_mem_types(device);
 
result = radv_init_wsi(device);
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 30ccbea176..f691c832bc 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -272,6 +272,7 @@ struct radv_physical_device {
bool has_rbplus; /* if RB+ register exist */
bool rbplus_allowed; /* if RB+ is allowed */
bool has_clear_state;
+   bool cpdma_prefetch_writes_memory;
 
/* This is the drivers on-disk cache used as a fallback as opposed to
 * the pipeline cache defined by apps.
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 31879805ae..971d3abac9 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -330,7 +330,10 @@ radv_alloc_shader_memory(struct radv_device *device,
 
slab->size = 256 * 1024;
slab->bo = device->ws->buffer_create(device->ws, slab->size, 256,
-RADEON_DOMAIN_VRAM, 
RADEON_FLAG_NO_INTERPROCESS_SHARING);
+RADEON_DOMAIN_VRAM,
+
RADEON_FLAG_NO_INTERPROCESS_SHARING |
+
device->physical_device->cpdma_prefetch_writes_memory ?
+0 : RADEON_FLAG_READ_ONLY);
slab->ptr = (char*)device->ws->buffer_map(slab->bo);
list_inithead(>shaders);
 

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Mesa (master): radv/winsys: rework radv_amdgpu_bo_va_op()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 2dab5e96ec54af87f651c917bffa08e6b0770eb5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2dab5e96ec54af87f651c917bffa08e6b0770eb5

Author: Samuel Pitoiset 
Date:   Tue Dec  5 13:51:46 2017 +0100

radv/winsys: rework radv_amdgpu_bo_va_op()

Needed for the following commit.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c | 40 +++
 1 file changed, 23 insertions(+), 17 deletions(-)

diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c 
b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
index 4b11823b0a..7cefdc8173 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
@@ -40,19 +40,24 @@
 static void radv_amdgpu_winsys_bo_destroy(struct radeon_winsys_bo *_bo);
 
 static int
-radv_amdgpu_bo_va_op(amdgpu_device_handle dev,
+radv_amdgpu_bo_va_op(struct radv_amdgpu_winsys *ws,
 amdgpu_bo_handle bo,
 uint64_t offset,
 uint64_t size,
 uint64_t addr,
-uint64_t flags,
+uint32_t bo_flags,
 uint32_t ops)
 {
+   uint64_t flags = AMDGPU_VM_PAGE_READABLE |
+AMDGPU_VM_PAGE_WRITEABLE |
+AMDGPU_VM_PAGE_EXECUTABLE;
+
+   if ((bo_flags & RADEON_FLAG_VA_UNCACHED) && ws->info.chip_class >= GFX9)
+   flags |= AMDGPU_VM_MTYPE_UC;
+
size = ALIGN(size, getpagesize());
-   flags |= (AMDGPU_VM_PAGE_READABLE |
- AMDGPU_VM_PAGE_WRITEABLE |
- AMDGPU_VM_PAGE_EXECUTABLE);
-   return amdgpu_bo_va_op_raw(dev, bo, offset, size, addr,
+
+   return amdgpu_bo_va_op_raw(ws->dev, bo, offset, size, addr,
   flags, ops);
 }
 
@@ -66,8 +71,9 @@ radv_amdgpu_winsys_virtual_map(struct radv_amdgpu_winsys_bo 
*bo,
return; /* TODO: PRT mapping */
 
p_atomic_inc(>bo->ref_count);
-   int r = radv_amdgpu_bo_va_op(bo->ws->dev, range->bo->bo, 
range->bo_offset, range->size,
-range->offset + bo->base.va, 0, 
AMDGPU_VA_OP_MAP);
+   int r = radv_amdgpu_bo_va_op(bo->ws, range->bo->bo, range->bo_offset,
+range->size, range->offset + bo->base.va,
+0, AMDGPU_VA_OP_MAP);
if (r)
abort();
 }
@@ -81,8 +87,9 @@ radv_amdgpu_winsys_virtual_unmap(struct radv_amdgpu_winsys_bo 
*bo,
if (!range->bo)
return; /* TODO: PRT mapping */
 
-   int r = radv_amdgpu_bo_va_op(bo->ws->dev, range->bo->bo, 
range->bo_offset, range->size,
-range->offset + bo->base.va, 0, 
AMDGPU_VA_OP_UNMAP);
+   int r = radv_amdgpu_bo_va_op(bo->ws, range->bo->bo, range->bo_offset,
+range->size, range->offset + bo->base.va,
+0, AMDGPU_VA_OP_UNMAP);
if (r)
abort();
radv_amdgpu_winsys_bo_destroy((struct radeon_winsys_bo *)range->bo);
@@ -255,7 +262,8 @@ static void radv_amdgpu_winsys_bo_destroy(struct 
radeon_winsys_bo *_bo)
bo->ws->num_buffers--;
pthread_mutex_unlock(>ws->global_bo_list_lock);
}
-   radv_amdgpu_bo_va_op(bo->ws->dev, bo->bo, 0, bo->size, 
bo->base.va, 0, AMDGPU_VA_OP_UNMAP);
+   radv_amdgpu_bo_va_op(bo->ws, bo->bo, 0, bo->size, bo->base.va,
+0, AMDGPU_VA_OP_UNMAP);
amdgpu_bo_free(bo->bo);
}
amdgpu_va_range_free(bo->va_handle);
@@ -352,11 +360,8 @@ radv_amdgpu_winsys_bo_create(struct radeon_winsys *_ws,
goto error_bo_alloc;
}
 
-
-   uint32_t va_flags = 0;
-   if ((flags & RADEON_FLAG_VA_UNCACHED) && ws->info.chip_class >= GFX9)
-   va_flags |= AMDGPU_VM_MTYPE_UC;
-   r = radv_amdgpu_bo_va_op(ws->dev, buf_handle, 0, size, va, va_flags, 
AMDGPU_VA_OP_MAP);
+   r = radv_amdgpu_bo_va_op(ws, buf_handle, 0, size, va, flags,
+AMDGPU_VA_OP_MAP);
if (r)
goto error_va_map;
 
@@ -426,7 +431,8 @@ radv_amdgpu_winsys_bo_from_fd(struct radeon_winsys *_ws,
if (r)
goto error_query;
 
-   r = radv_amdgpu_bo_va_op(ws->dev, result.buf_handle, 0, 
result.alloc_size, va, 0, AMDGPU_VA_OP_MAP);
+   r = radv_amdgpu_bo_va_op(ws, result.buf_handle, 0, result.alloc_size,
+va, 0, AMDGPU_VA_OP_MAP);
if (r)
goto error_va_map;
 

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Mesa (master): radv: make the indirect GFX config BO read-only for the GPU

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: e4f2ad403f39090a3897ffe4695bab315fb2bf30
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e4f2ad403f39090a3897ffe4695bab315fb2bf30

Author: Samuel Pitoiset 
Date:   Tue Dec  5 14:20:50 2017 +0100

radv: make the indirect GFX config BO read-only for the GPU

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/vulkan/si_cmd_buffer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index e16765b5ae..f5f4eefcd2 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -568,7 +568,8 @@ cik_create_gfx_config(struct radv_device *device)
 cs->cdw * 4, 4096,
 RADEON_DOMAIN_GTT,
 RADEON_FLAG_CPU_ACCESS|
-
RADEON_FLAG_NO_INTERPROCESS_SHARING);
+
RADEON_FLAG_NO_INTERPROCESS_SHARING |
+RADEON_FLAG_READ_ONLY);
if (!device->gfx_init)
goto fail;
 

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Mesa (master): radv: make descriptor BOs read-only for the GPU

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 6e3459eaf4481193aedfa313b81ace8369a83234
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e3459eaf4481193aedfa313b81ace8369a83234

Author: Samuel Pitoiset 
Date:   Tue Dec  5 14:22:17 2017 +0100

radv: make descriptor BOs read-only for the GPU

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/vulkan/radv_descriptor_set.c | 6 --
 src/amd/vulkan/radv_device.c | 4 +++-
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/amd/vulkan/radv_descriptor_set.c 
b/src/amd/vulkan/radv_descriptor_set.c
index e815939a67..19a560a6b3 100644
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -454,8 +454,10 @@ VkResult radv_CreateDescriptorPool(
}
 
if (bo_size) {
-   pool->bo = device->ws->buffer_create(device->ws, bo_size,
-   32, RADEON_DOMAIN_VRAM, 
RADEON_FLAG_NO_INTERPROCESS_SHARING);
+   pool->bo = device->ws->buffer_create(device->ws, bo_size, 32,
+RADEON_DOMAIN_VRAM,
+
RADEON_FLAG_NO_INTERPROCESS_SHARING |
+RADEON_FLAG_READ_ONLY);
pool->mapped_ptr = (uint8_t*)device->ws->buffer_map(pool->bo);
}
pool->size = bo_size;
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index cbf8f5cf49..5f78af624b 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -1603,7 +1603,9 @@ radv_get_preamble_cs(struct radv_queue *queue,
 size,
 4096,
 
RADEON_DOMAIN_VRAM,
-
RADEON_FLAG_CPU_ACCESS|RADEON_FLAG_NO_INTERPROCESS_SHARING);
+
RADEON_FLAG_CPU_ACCESS |
+
RADEON_FLAG_NO_INTERPROCESS_SHARING |
+
RADEON_FLAG_READ_ONLY);
if (!descriptor_bo)
goto fail;
} else

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Mesa (master): radv/winsys: add RADEON_FLAG_READ_ONLY

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: a3aaa036249401342a77f018a81f3e130735e305
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3aaa036249401342a77f018a81f3e130735e305

Author: Samuel Pitoiset 
Date:   Tue Dec  5 13:57:07 2017 +0100

radv/winsys: add RADEON_FLAG_READ_ONLY

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/vulkan/radv_radeon_winsys.h   | 1 +
 src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c | 4 +++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_radeon_winsys.h 
b/src/amd/vulkan/radv_radeon_winsys.h
index 45f58f063a..341e40505c 100644
--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -55,6 +55,7 @@ enum radeon_bo_flag { /* bitfield */
RADEON_FLAG_VA_UNCACHED =   (1 << 4),
RADEON_FLAG_IMPLICIT_SYNC = (1 << 5),
RADEON_FLAG_NO_INTERPROCESS_SHARING = (1 << 6),
+   RADEON_FLAG_READ_ONLY = (1 << 7),
 };
 
 enum radeon_bo_usage { /* bitfield */
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c 
b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
index 7cefdc8173..603111d2eb 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c
@@ -49,12 +49,14 @@ radv_amdgpu_bo_va_op(struct radv_amdgpu_winsys *ws,
 uint32_t ops)
 {
uint64_t flags = AMDGPU_VM_PAGE_READABLE |
-AMDGPU_VM_PAGE_WRITEABLE |
 AMDGPU_VM_PAGE_EXECUTABLE;
 
if ((bo_flags & RADEON_FLAG_VA_UNCACHED) && ws->info.chip_class >= GFX9)
flags |= AMDGPU_VM_MTYPE_UC;
 
+   if (!(bo_flags & RADEON_FLAG_READ_ONLY))
+   flags |= AMDGPU_VM_PAGE_WRITEABLE;
+
size = ALIGN(size, getpagesize());
 
return amdgpu_bo_va_op_raw(ws->dev, bo, offset, size, addr,

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Mesa (master): radv: avoid PS partial flushes when viewports/scissors don' t change

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: be16bbe1d391d43cbccf4da2f1759ba52b016266
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=be16bbe1d391d43cbccf4da2f1759ba52b016266

Author: Samuel Pitoiset 
Date:   Fri Jan  5 18:20:06 2018 +0100

radv: avoid PS partial flushes when viewports/scissors don't change

For Vega10 and Raven that need a special workaround for the
scissor bug.

This seems to give a minor boost for Talos and Dota 2, at least.

To reduce the cost of memcmp, the driver checks if it's
really useful to do the comparison.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/vulkan/radv_cmd_buffer.c | 39 +--
 1 file changed, 33 insertions(+), 6 deletions(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 665ee876a9..d8f780cfd7 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2733,15 +2733,28 @@ void radv_CmdSetViewport(
const VkViewport*   pViewports)
 {
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
+   struct radv_cmd_state *state = _buffer->state;
MAYBE_UNUSED const uint32_t total_count = firstViewport + viewportCount;
 
assert(firstViewport < MAX_VIEWPORTS);
assert(total_count >= 1 && total_count <= MAX_VIEWPORTS);
 
-   memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
-  pViewports, viewportCount * sizeof(*pViewports));
+   if (cmd_buffer->device->physical_device->has_scissor_bug) {
+   /* Try to skip unnecessary PS partial flushes when the viewports
+* don't change.
+*/
+   if (!(state->dirty & (RADV_CMD_DIRTY_DYNAMIC_VIEWPORT |
+ RADV_CMD_DIRTY_DYNAMIC_SCISSOR)) &&
+   !memcmp(state->dynamic.viewport.viewports + firstViewport,
+   pViewports, viewportCount * sizeof(*pViewports))) {
+   return;
+   }
+   }
+
+   memcpy(state->dynamic.viewport.viewports + firstViewport, pViewports,
+  viewportCount * sizeof(*pViewports));
 
-   cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_VIEWPORT;
+   state->dirty |= RADV_CMD_DIRTY_DYNAMIC_VIEWPORT;
 }
 
 void radv_CmdSetScissor(
@@ -2751,14 +2764,28 @@ void radv_CmdSetScissor(
const VkRect2D* pScissors)
 {
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
+   struct radv_cmd_state *state = _buffer->state;
MAYBE_UNUSED const uint32_t total_count = firstScissor + scissorCount;
 
assert(firstScissor < MAX_SCISSORS);
assert(total_count >= 1 && total_count <= MAX_SCISSORS);
 
-   memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
-  pScissors, scissorCount * sizeof(*pScissors));
-   cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_SCISSOR;
+   if (cmd_buffer->device->physical_device->has_scissor_bug) {
+   /* Try to skip unnecessary PS partial flushes when the scissors
+* don't change.
+*/
+   if (!(state->dirty & (RADV_CMD_DIRTY_DYNAMIC_VIEWPORT |
+ RADV_CMD_DIRTY_DYNAMIC_SCISSOR)) &&
+   !memcmp(state->dynamic.scissor.scissors + firstScissor,
+   pScissors, scissorCount * sizeof(*pScissors))) {
+   return;
+   }
+   }
+
+   memcpy(state->dynamic.scissor.scissors + firstScissor, pScissors,
+  scissorCount * sizeof(*pScissors));
+
+   state->dirty |= RADV_CMD_DIRTY_DYNAMIC_SCISSOR;
 }
 
 void radv_CmdSetLineWidth(

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Mesa (master): radv/winsys: make IBs read-only for the GPU

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 0e84fc2e2b7a50e64525042a3acd4d0bd98ffcf0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e84fc2e2b7a50e64525042a3acd4d0bd98ffcf0

Author: Samuel Pitoiset 
Date:   Tue Dec  5 14:28:46 2017 +0100

radv/winsys: make IBs read-only for the GPU

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 17 +++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c 
b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
index 4578a9b548..0ee56f9144 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -200,9 +200,10 @@ radv_amdgpu_cs_create(struct radeon_winsys *ws,
 
if (cs->ws->use_ib_bos) {
cs->ib_buffer = ws->buffer_create(ws, ib_size, 0,
-   RADEON_DOMAIN_GTT,
-   RADEON_FLAG_CPU_ACCESS|
- 
RADEON_FLAG_NO_INTERPROCESS_SHARING);
+ RADEON_DOMAIN_GTT,
+ RADEON_FLAG_CPU_ACCESS |
+ 
RADEON_FLAG_NO_INTERPROCESS_SHARING |
+ RADEON_FLAG_READ_ONLY);
if (!cs->ib_buffer) {
free(cs);
return NULL;
@@ -287,8 +288,9 @@ static void radv_amdgpu_cs_grow(struct radeon_winsys_cs 
*_cs, size_t min_size)
 
cs->ib_buffer = cs->ws->base.buffer_create(>ws->base, ib_size, 0,
   RADEON_DOMAIN_GTT,
-  RADEON_FLAG_CPU_ACCESS|
-  
RADEON_FLAG_NO_INTERPROCESS_SHARING);
+  RADEON_FLAG_CPU_ACCESS |
+  
RADEON_FLAG_NO_INTERPROCESS_SHARING |
+  RADEON_FLAG_READ_ONLY);
 
if (!cs->ib_buffer) {
cs->base.cdw = 0;
@@ -877,7 +879,10 @@ static int radv_amdgpu_winsys_cs_submit_sysmem(struct 
radeon_winsys_ctx *_ctx,
}
assert(cnt);
 
-   bo = ws->buffer_create(ws, 4 * size, 4096, RADEON_DOMAIN_GTT, 
RADEON_FLAG_CPU_ACCESS|RADEON_FLAG_NO_INTERPROCESS_SHARING);
+   bo = ws->buffer_create(ws, 4 * size, 4096, RADEON_DOMAIN_GTT,
+  RADEON_FLAG_CPU_ACCESS |
+  RADEON_FLAG_NO_INTERPROCESS_SHARING |
+  RADEON_FLAG_READ_ONLY);
ptr = ws->buffer_map(bo);
 
if (preamble_cs) {

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Mesa (master): radv/gfx9: do not load VGPR1 when GS uses points or lines

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: b462ceb482471dd4aacdd5fa7cef9fe25f823d70
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b462ceb482471dd4aacdd5fa7cef9fe25f823d70

Author: Samuel Pitoiset 
Date:   Fri Jan  5 17:18:52 2018 +0100

radv/gfx9: do not load VGPR1 when GS uses points or lines

VGPR1 is only needed for topology that needs 3 offsets like
triangles or quads.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/vulkan/radv_shader.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 971d3abac9..5d777a05e5 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -424,8 +424,10 @@ radv_fill_shader_variant(struct radv_device *device,
gs_vgpr_comp_cnt = 3; /* VGPR3 contains InvocationID. */
else if (info->uses_prim_id)
gs_vgpr_comp_cnt = 2; /* VGPR2 contains PrimitiveID. */
+   else if (variant->info.gs.vertices_in >= 3)
+   gs_vgpr_comp_cnt = 1; /* VGPR1 contains offsets 2, 3 */
else
-   gs_vgpr_comp_cnt = 1; /* TODO: use input_prim */
+   gs_vgpr_comp_cnt = 0; /* VGPR0 contains offsets 0, 1 */
 
/* TODO: Figure out how many we actually need. */
variant->rsrc1 |= S_00B228_GS_VGPR_COMP_CNT(gs_vgpr_comp_cnt);

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Mesa (master): link mesautil with pthreads

[Adam Jackson]

Module: Mesa
Branch: master
Commit: 23ce168048698eeea3df6bb8c9de5be3ca4784cd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=23ce168048698eeea3df6bb8c9de5be3ca4784cd

Author: Igor Gnatenko 
Date:   Mon Jan  1 22:49:00 2018 +0100

link mesautil with pthreads

../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`u_thread_setname':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../src/util/u_thread.h:66: 
undefined reference to `pthread_setname_np'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`thrd_join':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../include/c11/threads_posix.h:336:
 undefined reference to `pthread_join'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`u_thread_create':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../src/util/u_thread.h:48: 
undefined reference to `pthread_sigmask'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`thrd_create':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../include/c11/threads_posix.h:296:
 undefined reference to `pthread_create'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`u_thread_create':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../src/util/u_thread.h:50: 
undefined reference to `pthread_sigmask'
/builddir/build/BUILD/mesa-17.3.1/src/util/../../src/util/u_thread.h:50: 
undefined reference to `pthread_sigmask'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`call_once':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../include/c11/threads_posix.h:96:
 undefined reference to `pthread_once'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`u_thread_get_time_nano':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../src/util/u_thread.h:84: 
undefined reference to `pthread_getcpuclockid'
collect2: error: ld returned 1 exit status

Reviewed-by: Adam Jackson 
Signed-off-by: Igor Gnatenko 

---

 src/util/Makefile.am | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/util/Makefile.am b/src/util/Makefile.am
index a5241ad27b..633907b9fd 100644
--- a/src/util/Makefile.am
+++ b/src/util/Makefile.am
@@ -31,6 +31,7 @@ noinst_LTLIBRARIES = \
libxmlconfig.la
 
 AM_CPPFLAGS = \
+   $(PTHREAD_CFLAGS) \
-I$(top_srcdir)/include
 
 libmesautil_la_CPPFLAGS = \
@@ -50,6 +51,7 @@ libmesautil_la_SOURCES = \
$(MESA_UTIL_GENERATED_FILES)
 
 libmesautil_la_LIBADD = \
+   $(PTHREAD_LIBS) \
$(CLOCK_LIB) \
$(ZLIB_LIBS) \
$(LIBATOMIC_LIBS)

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Mesa (master): anv: Allow PMA optimization to be enabled in secondary command buffers

[Alex Smith]

Module: Mesa
Branch: master
Commit: 0d8b9c529ce34347032912d73c14c245919a3d37
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d8b9c529ce34347032912d73c14c245919a3d37

Author: Alex Smith 
Date:   Fri Jan  5 11:09:19 2018 +

anv: Allow PMA optimization to be enabled in secondary command buffers

This was never enabled in secondary buffers because hiz_enabled was
never set to true for those.

If the app provides a framebuffer in the inheritance info when beginning
a secondary buffer, we can determine if HiZ is enabled and therefore
allow the PMA optimization to be enabled within the command buffer.

This improves performance by ~13% on an internal benchmark on Skylake.

v2: Use anv_cmd_buffer_get_depth_stencil_view().

Signed-off-by: Alex Smith 
Reviewed-by: Lionel Landwerlin 
Reviewed-by: Jason Ekstrand 

---

 src/intel/vulkan/genX_cmd_buffer.c | 22 +-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
b/src/intel/vulkan/genX_cmd_buffer.c
index 0bd3874db7..b7253d5251 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -977,11 +977,31 @@ genX(BeginCommandBuffer)(
  anv_render_pass_from_handle(pBeginInfo->pInheritanceInfo->renderPass);
   cmd_buffer->state.subpass =
  
_buffer->state.pass->subpasses[pBeginInfo->pInheritanceInfo->subpass];
-  cmd_buffer->state.framebuffer = NULL;
+
+  /* This is optional in the inheritance info. */
+  cmd_buffer->state.framebuffer =
+ 
anv_framebuffer_from_handle(pBeginInfo->pInheritanceInfo->framebuffer);
 
   result = genX(cmd_buffer_setup_attachments)(cmd_buffer,
   cmd_buffer->state.pass, 
NULL);
 
+  /* Record that HiZ is enabled if we can. */
+  if (cmd_buffer->state.framebuffer) {
+ const struct anv_image_view * const iview =
+anv_cmd_buffer_get_depth_stencil_view(cmd_buffer);
+
+ if (iview) {
+VkImageLayout layout =
+cmd_buffer->state.subpass->depth_stencil_attachment.layout;
+
+enum isl_aux_usage aux_usage =
+   anv_layout_to_aux_usage(_buffer->device->info, iview->image,
+   VK_IMAGE_ASPECT_DEPTH_BIT, layout);
+
+cmd_buffer->state.hiz_enabled = aux_usage == ISL_AUX_USAGE_HIZ;
+ }
+  }
+
   cmd_buffer->state.dirty |= ANV_CMD_DIRTY_RENDER_TARGETS;
}
 

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