Mesa (master): glsl/linker: remove ubo explicit binding handling

[Alejandro Pinheiro]

Module: Mesa
Branch: master
Commit: f32b01ca435c5eb4268919f984e6e3d63c28828f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f32b01ca435c5eb4268919f984e6e3d63c28828f

Author: Alejandro Piñeiro 
Date:   Wed Jan 24 11:03:00 2018 +0100

glsl/linker: remove ubo explicit binding handling

This is already handled at link_uniform_blocks, specifically at
process_block_array_leaf.

Additionally, this code was not handling correctly arrays of
arrays. When creating the name of the block to set the binding, it
only took into account the first level, so any attempt to set a
explicit binding on a array of array ubo would trigger an assertion.

Reviewed-by: Timothy Arceri 

---

 src/compiler/glsl/link_uniform_initializers.cpp | 58 +
 1 file changed, 2 insertions(+), 56 deletions(-)

diff --git a/src/compiler/glsl/link_uniform_initializers.cpp 
b/src/compiler/glsl/link_uniform_initializers.cpp
index 97796e721b..35522f7646 100644
--- a/src/compiler/glsl/link_uniform_initializers.cpp
+++ b/src/compiler/glsl/link_uniform_initializers.cpp
@@ -182,26 +182,6 @@ set_opaque_binding(void *mem_ctx, gl_shader_program *prog,
}
 }
 
-static void
-set_block_binding(gl_shader_program *prog, const char *block_name,
-  unsigned mode, int binding)
-{
-   unsigned num_blocks = mode == ir_var_uniform ?
-  prog->data->NumUniformBlocks :
-  prog->data->NumShaderStorageBlocks;
-   struct gl_uniform_block *blks = mode == ir_var_uniform ?
-  prog->data->UniformBlocks : prog->data->ShaderStorageBlocks;
-
-   for (unsigned i = 0; i < num_blocks; i++) {
-  if (!strcmp(blks[i].Name, block_name)) {
- blks[i].Binding = binding;
- return;
-  }
-   }
-
-   unreachable("Failed to initialize block binding");
-}
-
 void
 set_uniform_initializer(void *mem_ctx, gl_shader_program *prog,
 const char *name, const glsl_type *type,
@@ -307,43 +287,9 @@ link_set_uniform_initializers(struct gl_shader_program 
*prog,
linker::set_opaque_binding(mem_ctx, prog, var, var->type,
   var->name, );
 } else if (var->is_in_buffer_block()) {
-   const glsl_type *const iface_type = var->get_interface_type();
-
-   /* If the variable is an array and it is an interface instance,
-* we need to set the binding for each array element.  Just
-* checking that the variable is an array is not sufficient.
-* The variable could be an array element of a uniform block
-* that lacks an instance name.  For example:
-*
-* uniform U {
-* float f[4];
-* };
-*
-* In this case "f" would pass is_in_buffer_block (above) and
-* type->is_array(), but it will fail is_interface_instance().
+   /* This case is handled by link_uniform_blocks (at
+* process_block_array_leaf)
 */
-   if (var->is_interface_instance() && var->type->is_array()) {
-  for (unsigned i = 0; i < var->type->length; i++) {
- const char *name =
-ralloc_asprintf(mem_ctx, "%s[%u]", iface_type->name, 
i);
-
- /* Section 4.4.3 (Uniform Block Layout Qualifiers) of the
-  * GLSL 4.20 spec says:
-  *
-  * "If the binding identifier is used with a uniform
-  * block instanced as an array then the first element
-  * of the array takes the specified block binding and
-  * each subsequent element takes the next consecutive
-  * uniform block binding point."
-  */
- linker::set_block_binding(prog, name, var->data.mode,
-   var->data.binding + i);
-  }
-   } else {
-  linker::set_block_binding(prog, iface_type->name,
-var->data.mode,
-var->data.binding);
-   }
 } else if (type->contains_atomic()) {
/* we don't actually need to do anything. */
 } else {

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Mesa (17.3): 88 new commits

[Emil Velikov]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d961e1630c9623b40e1b7ed5756b6f1e8f46531
Author: Emil Velikov 
Date:   Fri Feb 9 03:43:57 2018 +

cherry-ignore: add a few more meson fixes

Signed-off-by: Emil Velikov 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1bf16e4fbcc861814cc95865ba59e1c025bb7278
Author: Roland Scheidegger 
Date:   Tue Jan 30 05:48:27 2018 +0100

r600: don't do stack workarounds for hemlock

By the looks of it it seems hemlock is treated separately to cypress, but
certainly it won't need the stack workarounds cedar/redwood (and
seemingly every other eg chip except cypress/juniper) need.
(Discovered by accident.)

Acked-by: Alex Deucher 
(cherry picked from commit c2f0e0885776f3f0a18b9db08149564d4b98e5b7)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=70604e880876ff6f7216623e196e0d34d1b2fae6
Author: Jon Turney 
Date:   Tue Jan 16 16:26:57 2018 +

glx/apple: locate dispatch table functions to wrap by name

Avoid reaching into the dispatch table internals (and thus having to deal
with the complexities of remap etc.) by identifying functions to wrap by
name.

See:
https://lists.freedesktop.org/archives/mesa-dev/2015-June/086721.html et 
seq.
https://bugs.freedesktop.org/show_bug.cgi?id=90311

Signed-off-by: Jon Turney 
Reviewed-by: Emil Velikov 
(cherry picked from commit d3540b405b975450b9c2f9d8eb273be062cbf73a)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=15beac3a010176b384f3b0bd70a8ee2ca3ccc416
Author: Jon Turney 
Date:   Sat Dec 2 17:05:43 2017 +

glx/apple: include util/debug.h for env_var_as_boolean prototype

mesa/src/glx/glxcmds.c:1295:21: error: implicit declaration of function 
'env_var_as_boolean' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
mesa/src/glx/apple/apple_visual.c:85:28: error: implicit declaration of 
function 'env_var_as_boolean' is invalid in C99 
[-Werror,-Wimplicit-function-declaration]

Signed-off-by: Jon Turney 
Reviewed-by: Emil Velikov 
(cherry picked from commit b37b7b42dcc33d636c3db0558d032d7d95664c56)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e55ca6768ff7918dfc0ebd8dd5ef680d2e155c73
Author: Jon Turney 
Date:   Tue Jan 16 23:27:43 2018 +

configure: Default to gbm=no on osx

Signed-off-by: Jon Turney 
Reviewed-by: Emil Velikov 
(cherry picked from commit 7ad7a07c88b1b1c697132e8f990c0d9530fdf827)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f6e05d11f39012fb1fd5953e8324fac6d7951b0
Author: Igor Gnatenko 
Date:   Mon Jan 1 22:49:00 2018 +0100

link mesautil with pthreads

../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`u_thread_setname':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../src/util/u_thread.h:66: 
undefined reference to `pthread_setname_np'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`thrd_join':

/builddir/build/BUILD/mesa-17.3.1/src/util/../../include/c11/threads_posix.h:336:
 undefined reference to `pthread_join'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`u_thread_create':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../src/util/u_thread.h:48: 
undefined reference to `pthread_sigmask'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`thrd_create':

/builddir/build/BUILD/mesa-17.3.1/src/util/../../include/c11/threads_posix.h:296:
 undefined reference to `pthread_create'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`u_thread_create':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../src/util/u_thread.h:50: 
undefined reference to `pthread_sigmask'
/builddir/build/BUILD/mesa-17.3.1/src/util/../../src/util/u_thread.h:50: 
undefined reference to `pthread_sigmask'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`call_once':

/builddir/build/BUILD/mesa-17.3.1/src/util/../../include/c11/threads_posix.h:96:
 undefined reference to `pthread_once'
../../src/util/.libs/libmesautil.a(libmesautil_la-u_queue.o): In function 
`u_thread_get_time_nano':
/builddir/build/BUILD/mesa-17.3.1/src/util/../../src/util/u_thread.h:84: 
undefined reference to `pthread_getcpuclockid'
collect2: error: ld returned 1 exit status

Reviewed-by: Adam Jackson 
Signed-off-by: Igor Gnatenko 
(cherry picked from commit 

Mesa (master): gallium: Mute arrays for several meta like callbacks.

[Mathias Fröhlich]

Module: Mesa
Branch: master
Commit: 437cae411e7664e01d9c1c280317274b3ffc0734
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=437cae411e7664e01d9c1c280317274b3ffc0734

Author: Mathias Fröhlich 
Date:   Mon Feb  5 22:02:51 2018 +0100

gallium: Mute arrays for several meta like callbacks.

Set the _DrawArray pointer to NULL when calling into the Drivers
Bitmap/CopyPixels/DrawAtlasBitmaps/DrawPixels/DrawTex hooks.
This fixes an assert that gets uncovered when the following
patch gets applied.

v2: Mute from within the state tracker instead of generic mesa.
v3: Avoid evaluating _DrawArrays from within st_validate_state.

Signed-off-by: Mathias Fröhlich 
Reviewed-by: Marek Olšák 

---

 src/mesa/state_tracker/st_atom.c  | 10 ++
 src/mesa/state_tracker/st_atom.h  |  3 +++
 src/mesa/state_tracker/st_cb_bitmap.c |  4 ++--
 src/mesa/state_tracker/st_cb_drawpixels.c |  4 ++--
 src/mesa/state_tracker/st_cb_drawtex.c|  2 +-
 5 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/src/mesa/state_tracker/st_atom.c b/src/mesa/state_tracker/st_atom.c
index 253b508164..b597c62632 100644
--- a/src/mesa/state_tracker/st_atom.c
+++ b/src/mesa/state_tracker/st_atom.c
@@ -203,6 +203,16 @@ void st_validate_state( struct st_context *st, enum 
st_pipeline pipeline )
   pipeline_mask = ST_PIPELINE_CLEAR_STATE_MASK;
   break;
 
+   case ST_PIPELINE_META:
+  if (st->gfx_shaders_may_be_dirty) {
+ check_program_state(st);
+ st->gfx_shaders_may_be_dirty = false;
+  }
+
+  st_manager_validate_framebuffers(st);
+  pipeline_mask = ST_PIPELINE_META_STATE_MASK;
+  break;
+
case ST_PIPELINE_UPDATE_FRAMEBUFFER:
   st_manager_validate_framebuffers(st);
   pipeline_mask = ST_PIPELINE_UPDATE_FB_STATE_MASK;
diff --git a/src/mesa/state_tracker/st_atom.h b/src/mesa/state_tracker/st_atom.h
index f9711d5393..68388a5674 100644
--- a/src/mesa/state_tracker/st_atom.h
+++ b/src/mesa/state_tracker/st_atom.h
@@ -44,6 +44,7 @@ struct st_context;
 enum st_pipeline {
ST_PIPELINE_RENDER,
ST_PIPELINE_CLEAR,
+   ST_PIPELINE_META,
ST_PIPELINE_UPDATE_FRAMEBUFFER,
ST_PIPELINE_COMPUTE,
 };
@@ -149,6 +150,8 @@ enum {
 #define ST_PIPELINE_CLEAR_STATE_MASK (ST_NEW_FB_STATE | \
   ST_NEW_SCISSOR | \
   ST_NEW_WINDOW_RECTANGLES)
+#define ST_PIPELINE_META_STATE_MASK (ST_PIPELINE_RENDER_STATE_MASK & \
+ ~ST_NEW_VERTEX_ARRAYS)
 /* For ReadPixels, ReadBuffer, GetSamplePosition: */
 #define ST_PIPELINE_UPDATE_FB_STATE_MASK (ST_NEW_FB_STATE)
 
diff --git a/src/mesa/state_tracker/st_cb_bitmap.c 
b/src/mesa/state_tracker/st_cb_bitmap.c
index 0a30ffa0f3..c41ed2ba02 100644
--- a/src/mesa/state_tracker/st_cb_bitmap.c
+++ b/src/mesa/state_tracker/st_cb_bitmap.c
@@ -626,7 +626,7 @@ st_Bitmap(struct gl_context *ctx, GLint x, GLint y,
if ((st->dirty | ctx->NewDriverState) & ~ST_NEW_CONSTANTS &
ST_PIPELINE_RENDER_STATE_MASK ||
st->gfx_shaders_may_be_dirty) {
-  st_validate_state(st, ST_PIPELINE_RENDER);
+  st_validate_state(st, ST_PIPELINE_META);
}
 
if (UseBitmapCache && accum_bitmap(ctx, x, y, width, height, unpack, 
bitmap))
@@ -681,7 +681,7 @@ st_DrawAtlasBitmaps(struct gl_context *ctx,
 
st_flush_bitmap_cache(st);
 
-   st_validate_state(st, ST_PIPELINE_RENDER);
+   st_validate_state(st, ST_PIPELINE_META);
st_invalidate_readpix_cache(st);
 
sv = st_create_texture_sampler_view(pipe, stObj->pt);
diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c 
b/src/mesa/state_tracker/st_cb_drawpixels.c
index ddf6926332..471eb19661 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/state_tracker/st_cb_drawpixels.c
@@ -1147,7 +1147,7 @@ st_DrawPixels(struct gl_context *ctx, GLint x, GLint y,
st_flush_bitmap_cache(st);
st_invalidate_readpix_cache(st);
 
-   st_validate_state(st, ST_PIPELINE_RENDER);
+   st_validate_state(st, ST_PIPELINE_META);
 
/* Limit the size of the glDrawPixels to the max texture size.
 * Strictly speaking, that's not correct but since we don't handle
@@ -1514,7 +1514,7 @@ st_CopyPixels(struct gl_context *ctx, GLint srcx, GLint 
srcy,
st_flush_bitmap_cache(st);
st_invalidate_readpix_cache(st);
 
-   st_validate_state(st, ST_PIPELINE_RENDER);
+   st_validate_state(st, ST_PIPELINE_META);
 
if (type == GL_DEPTH_STENCIL) {
   /* XXX make this more efficient */
diff --git a/src/mesa/state_tracker/st_cb_drawtex.c 
b/src/mesa/state_tracker/st_cb_drawtex.c
index 01c5757a73..f18925ecfe 100644
--- a/src/mesa/state_tracker/st_cb_drawtex.c
+++ b/src/mesa/state_tracker/st_cb_drawtex.c
@@ -120,7 +120,7 @@ st_DrawTex(struct gl_context *ctx, GLfloat x, GLfloat y, 
GLfloat z,
st_flush_bitmap_cache(st);
st_invalidate_readpix_cache(st);
 
-   st_validate_state(st, ST_PIPELINE_RENDER);
+   

Mesa (master): mesa: Only update enabled VAO gl_vertex_array entries.

[Mathias Fröhlich]

Module: Mesa
Branch: master
Commit: 77cb2fc0bd8f57b646ef5ab674c1f76d873a22ae
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=77cb2fc0bd8f57b646ef5ab674c1f76d873a22ae

Author: Mathias Fröhlich 
Date:   Sun Feb  4 17:13:06 2018 +0100

mesa: Only update enabled VAO gl_vertex_array entries.

Instead of updating all modified gl_vertex_array_object::_VertexArray
entries just update those that are modified and enabled.
Also release buffer object from the _VertexArray that belong
to disabled attributes.

v2: Also set Ptr and Size to zero.

Signed-off-by: Mathias Fröhlich 
Reviewed-by: Brian Paul 

---

 src/mesa/main/varray.c |  8 
 src/mesa/main/varray.h | 29 ++---
 2 files changed, 22 insertions(+), 15 deletions(-)

diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 4dfc3546a8..d55f74e968 100644
--- a/src/mesa/main/varray.c
+++ b/src/mesa/main/varray.c
@@ -178,7 +178,7 @@ vertex_attrib_binding(struct gl_context *ctx,
 
   array->BufferBindingIndex = bindingIndex;
 
-  vao->NewArrays |= array_bit;
+  vao->NewArrays |= vao->_Enabled & array_bit;
}
 }
 
@@ -213,7 +213,7 @@ _mesa_bind_vertex_buffer(struct gl_context *ctx,
   else
  vao->VertexAttribBufferMask |= binding->_BoundArrays;
 
-  vao->NewArrays |= binding->_BoundArrays;
+  vao->NewArrays |= vao->_Enabled & binding->_BoundArrays;
}
 }
 
@@ -234,7 +234,7 @@ vertex_binding_divisor(struct gl_context *ctx,
if (binding->InstanceDivisor != divisor) {
   FLUSH_VERTICES(ctx, _NEW_ARRAY);
   binding->InstanceDivisor = divisor;
-  vao->NewArrays |= binding->_BoundArrays;
+  vao->NewArrays |= vao->_Enabled & binding->_BoundArrays;
}
 }
 
@@ -344,7 +344,7 @@ _mesa_update_array_format(struct gl_context *ctx,
array->RelativeOffset = relativeOffset;
array->_ElementSize = elementSize;
 
-   vao->NewArrays |= VERT_BIT(attrib);
+   vao->NewArrays |= vao->_Enabled & VERT_BIT(attrib);
ctx->NewState |= _NEW_ARRAY;
 }
 
diff --git a/src/mesa/main/varray.h b/src/mesa/main/varray.h
index ddabd0bc58..46f83b2200 100644
--- a/src/mesa/main/varray.h
+++ b/src/mesa/main/varray.h
@@ -58,17 +58,24 @@ _mesa_update_vertex_array(struct gl_context *ctx,
   const struct gl_array_attributes *attribs,
   const struct gl_vertex_buffer_binding *binding)
 {
-   dst->Size = attribs->Size;
-   dst->Type = attribs->Type;
-   dst->Format = attribs->Format;
-   dst->StrideB = binding->Stride;
-   dst->Ptr = _mesa_vertex_attrib_address(attribs, binding);
-   dst->Normalized = attribs->Normalized;
-   dst->Integer = attribs->Integer;
-   dst->Doubles = attribs->Doubles;
-   dst->InstanceDivisor = binding->InstanceDivisor;
-   dst->_ElementSize = attribs->_ElementSize;
-   _mesa_reference_buffer_object(ctx, >BufferObj, binding->BufferObj);
+   if (attribs->Enabled) {
+  dst->Size = attribs->Size;
+  dst->Type = attribs->Type;
+  dst->Format = attribs->Format;
+  dst->StrideB = binding->Stride;
+  dst->Ptr = _mesa_vertex_attrib_address(attribs, binding);
+  dst->Normalized = attribs->Normalized;
+  dst->Integer = attribs->Integer;
+  dst->Doubles = attribs->Doubles;
+  dst->InstanceDivisor = binding->InstanceDivisor;
+  dst->_ElementSize = attribs->_ElementSize;
+  _mesa_reference_buffer_object(ctx, >BufferObj, binding->BufferObj);
+   } else {
+  /* Disabled arrays shall not be consumed */
+  dst->Size = 0;
+  dst->Ptr = NULL;
+  _mesa_reference_buffer_object(ctx, >BufferObj, NULL);
+   }
 }
 
 

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Mesa (master): mesa: Fix VAO buffer object tracking.

[Mathias Fröhlich]

Module: Mesa
Branch: master
Commit: 2f9eb0aad5a0d2177b52a22d012fd53438edf9fe
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f9eb0aad5a0d2177b52a22d012fd53438edf9fe

Author: Mathias Fröhlich 
Date:   Sun Feb  4 13:18:34 2018 +0100

mesa: Fix VAO buffer object tracking.

When changing the attribute binding in the VAO we also need to
account for getting rid of non vbo bits from VertexAttribBufferMask.

Signed-off-by: Mathias Fröhlich 
Reviewed-by: Brian Paul 

---

 src/mesa/main/varray.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index b268aaa9a3..4dfc3546a8 100644
--- a/src/mesa/main/varray.c
+++ b/src/mesa/main/varray.c
@@ -168,6 +168,8 @@ vertex_attrib_binding(struct gl_context *ctx,
 
   if (_mesa_is_bufferobj(vao->BufferBinding[bindingIndex].BufferObj))
  vao->VertexAttribBufferMask |= array_bit;
+  else
+ vao->VertexAttribBufferMask &= ~array_bit;
 
   FLUSH_VERTICES(ctx, _NEW_ARRAY);
 

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Mesa: tag mesa-18.0.0-rc4: mesa-18.0.0-rc4

[Emil Velikov]

Module: Mesa
Branch: refs/tags/mesa-18.0.0-rc4
Tag:253f1cc87c099227e81a144b054dae6410c8a727
URL:
http://cgit.freedesktop.org/mesa/mesa/tag/?id=253f1cc87c099227e81a144b054dae6410c8a727

Tagger: Emil Velikov 
Date:   Fri Feb  9 02:20:39 2018 +

mesa-18.0.0-rc4
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Mesa (18.0): 41 new commits

[Emil Velikov]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e1734634bf2e5f6d16953dbf416cd9afdf4a145
Author: Emil Velikov 
Date:   Fri Feb 9 02:15:14 2018 +

Update version to 18.0.0-rc4

Signed-off-by: Emil Velikov 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c0d6d77512fa0fb462728bbd6cfee726570efa3
Author: Roland Scheidegger 
Date:   Tue Jan 30 05:48:27 2018 +0100

r600: don't do stack workarounds for hemlock

By the looks of it it seems hemlock is treated separately to cypress, but
certainly it won't need the stack workarounds cedar/redwood (and
seemingly every other eg chip except cypress/juniper) need.
(Discovered by accident.)

Acked-by: Alex Deucher 
(cherry picked from commit c2f0e0885776f3f0a18b9db08149564d4b98e5b7)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f90ba6c1e080f8909d0aa7e4d6e574c0d2706e01
Author: Jon Turney 
Date:   Thu Jan 18 13:05:06 2018 +

travis: add osx autotools build

Signed-off-by: Jon Turney 
Reviewed-by: Emil Velikov 
(cherry picked from commit b3a1d9588eaa486a01c3a2964d69540a4bf45818)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f009ba1fd7c57c83e6a4caea86dc770cd18cbed8
Author: Jon Turney 
Date:   Thu Feb 1 15:23:49 2018 +

travis: pip -> pip2

On travis, for OSX, python2 from homebrew is pre-installed. per [1]:

 python points to the macOS system Python (with no manual PATH modification)
 python2 points to Homebrew’s Python 2.7.x (if installed)
 python3 points to Homebrew’s Python 3.x (if installed)
 pip doesn't exist
 pip2 points to Homebrew’s Python 2.7.x’s pip (if installed)
 pip3 points to Homebrew’s Python 3.x’s pip (if installed)

We will end up using 'python2' for building mesa.

Just use 'pip2' instead of 'pip', as that seems to work for all platforms on
travis.

[1] https://docs.brew.sh/Homebrew-and-Python.html

Signed-off-by: Jon Turney 
Reviewed-by: Emil Velikov 
(cherry picked from commit 4701379d967f8c42fc8cffa0e1c80dc9074bb0d5)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=331bea12db37669269376cb17ebe83bb3e976585
Author: Jon Turney 
Date:   Thu Feb 1 15:19:08 2018 +

travis: conditionalize building of prerequisites on if OS=linux

Use a '|' YAML literal block to avoid the convoluted syntax needed to put
the entire conditional on a single line.

Signed-off-by: Jon Turney 
Reviewed-by: Emil Velikov 
(cherry picked from commit 7d1ec6d6a92f15a24377738f12e59d80bab96da3)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=937b151e4f99b21e47b58c099397e768b00980bb
Author: Jon Turney 
Date:   Thu Jan 25 17:34:54 2018 +

glx/test: fix building for osx

An additional stub for applegl_create_context() is needed
Cannot test indirect API as it's not built on osx, currently

Signed-off-by: Jon Turney 
Reviewed-by: Emil Velikov 
(cherry picked from commit 63041ba61308a0576c73cb6bc3d98540669188cf)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d7a80f4ae3919072a8a02ced0ad856d91632ca8
Author: Jon Turney 
Date:   Tue Jan 16 16:26:57 2018 +

glx/apple: locate dispatch table functions to wrap by name

Avoid reaching into the dispatch table internals (and thus having to deal
with the complexities of remap etc.) by identifying functions to wrap by
name.

See:
https://lists.freedesktop.org/archives/mesa-dev/2015-June/086721.html et 
seq.
https://bugs.freedesktop.org/show_bug.cgi?id=90311

Signed-off-by: Jon Turney 
Reviewed-by: Emil Velikov 
(cherry picked from commit d3540b405b975450b9c2f9d8eb273be062cbf73a)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac08cc687345b6124153b20e9f21eef8eebc3b15
Author: Jon Turney 
Date:   Sat Dec 2 17:05:43 2017 +

glx/apple: include util/debug.h for env_var_as_boolean prototype

mesa/src/glx/glxcmds.c:1295:21: error: implicit declaration of function 
'env_var_as_boolean' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
mesa/src/glx/apple/apple_visual.c:85:28: error: implicit declaration of 
function 'env_var_as_boolean' is invalid in C99 
[-Werror,-Wimplicit-function-declaration]

Signed-off-by: Jon Turney 
Reviewed-by: Emil Velikov 

Mesa (master): radeonsi/nir: gather some missing fs info

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: d8bca3809db504b919f18f530f4d88f29078a3e5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8bca3809db504b919f18f530f4d88f29078a3e5

Author: Timothy Arceri 
Date:   Fri Feb  9 10:53:00 2018 +1100

radeonsi/nir: gather some missing fs info

Fixes some early-z arb_shader_image_load_store piglit tests.

Reviewed-by: Marek Olšák 

---

 src/gallium/drivers/radeonsi/si_shader_nir.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c 
b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 002561d89e..dd1de6c851 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -276,6 +276,11 @@ void si_nir_scan_shader(const struct nir_shader *nir,
info->properties[TGSI_PROPERTY_GS_INVOCATIONS] = 
nir->info.gs.invocations;
}
 
+   if (nir->info.stage == MESA_SHADER_FRAGMENT) {
+   info->properties[TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL] = 
nir->info.fs.early_fragment_tests;
+   info->properties[TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE] = 
nir->info.fs.post_depth_coverage;
+   }
+
if (nir->info.stage == MESA_SHADER_COMPUTE) {
info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] = 
nir->info.cs.local_size[0];
info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT] = 
nir->info.cs.local_size[1];

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Mesa (master): ac: pass struct ac_llvm_context to emit_membar()

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: c77078c942f210a44d5017b4798d1be50352c15f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c77078c942f210a44d5017b4798d1be50352c15f

Author: Timothy Arceri 
Date:   Fri Feb  9 10:37:25 2018 +1100

ac: pass struct ac_llvm_context to emit_membar()

Fixes segfault in piglit test:

./bin/arb_shader_image_load_store-shader-mem-barrier --quick -auto -fbo

Reviewed-by: Marek Olšák 

---

 src/amd/common/ac_nir_to_llvm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 2329016ac6..60276c1d41 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3817,7 +3817,7 @@ static LLVMValueRef visit_image_size(struct 
ac_nir_context *ctx,
 #define LGKM_CNT 0x07f
 #define VM_CNT 0xf70
 
-static void emit_membar(struct nir_to_llvm_context *ctx,
+static void emit_membar(struct ac_llvm_context *ac,
const nir_intrinsic_instr *instr)
 {
unsigned waitcnt = NOOP_WAITCNT;
@@ -3839,7 +3839,7 @@ static void emit_membar(struct nir_to_llvm_context *ctx,
break;
}
if (waitcnt != NOOP_WAITCNT)
-   ac_build_waitcnt(>ac, waitcnt);
+   ac_build_waitcnt(ac, waitcnt);
 }
 
 static void emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
@@ -4438,7 +4438,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
case nir_intrinsic_memory_barrier_buffer:
case nir_intrinsic_memory_barrier_image:
case nir_intrinsic_memory_barrier_shared:
-   emit_membar(ctx->nctx, instr);
+   emit_membar(>ac, instr);
break;
case nir_intrinsic_barrier:
emit_barrier(>ac, ctx->stage);

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Mesa (master): radeonsi: copy the NIR enablement debug bit to the shader cache flags

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 12fd567c78c66b136b5c67782be754790951a560
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=12fd567c78c66b136b5c67782be754790951a560

Author: Marek Olšák 
Date:   Fri Feb  9 01:47:26 2018 +0100

radeonsi: copy the NIR enablement debug bit to the shader cache flags

When NIR is enabled, TGSI must not be used. When NIR is disabled, TGSI

Tested-by: Dieter Nützel 
Reviewed-by: Timothy Arceri 

---

 src/gallium/drivers/radeonsi/si_pipe.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c 
b/src/gallium/drivers/radeonsi/si_pipe.c
index 26835d673d..97f11ea687 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -642,7 +642,8 @@ static void si_disk_cache_create(struct si_screen *sscreen)
sscreen->debug_flags &
(DBG(FS_CORRECT_DERIVS_AFTER_KILL) |
 DBG(SI_SCHED) |
-DBG(UNSAFE_MATH));
+DBG(UNSAFE_MATH) |
+DBG(NIR));
 
sscreen->disk_shader_cache =
disk_cache_create(si_get_family_name(sscreen),

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Mesa (master): 23 new commits

[Jason Ekstrand]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f20cf166ed434092242dba05a09f682df3028d8
Author: Jason Ekstrand 
Date:   Fri Jan 19 15:14:37 2018 -0800

intel/blorp: Use isl_aux_op instead of blorp_hiz_op

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e941a05283b6873d2501f17944e545f6c76166f
Author: Jason Ekstrand 
Date:   Fri Jan 19 15:02:07 2018 -0800

intel/blorp: Use isl_aux_op instead of blorp_fast_clear_op

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1810f965c8e490eac164732883d5242748b5911f
Author: Jason Ekstrand 
Date:   Fri Jan 19 12:07:12 2018 -0800

anv: Allow fast-clearing the first slice of a multi-slice image

Now that we're tracking aux properly per-slice, we can enable this for
applications which actually care.

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de3be6180169f95b781308398b31fbdd3db319e1
Author: Jason Ekstrand 
Date:   Tue Nov 21 08:46:25 2017 -0800

anv/cmd_buffer: Rework aux tracking

This commit completely reworks aux tracking.  This includes a number of
somewhat distinct changes:

 1) Since we are no longer fast-clearing multiple slices, we only need
to track one fast clear color and one fast clear type.

 2) We store two bits for fast clear instead of one to let us
distinguish between zero and non-zero fast clear colors.  This is
needed so that we can do full resolves when transitioning to
PRESENT_SRC_KHR with gen9 CCS images where we allow zero clear
values in all sorts of places we wouldn't normally.

 3) We now track compression state as a boolean separate from fast clear
type and this is tracked on a per-slice granularity.

The previous scheme had some issues when it came to individual slices of
a multi-LOD images.  In particular, we only tracked "needs resolve"
per-LOD but you could do a vkCmdPipelineBarrier that would only resolve
a portion of the image and would set "needs resolve" to false anyway.
Also, any transition from an undefined layout would reset the clear
color for the entire LOD regardless of whether or not there was some
clear color on some other slice.

As far as full/partial resolves go, he assumptions of the previous
scheme held because the one case where we do need a full resolve when
CCS_E is enabled is for window-system images.  Since we only ever
allowed X-tiled window-system images, CCS was entirely disabled on gen9+
and we never got CCS_E.  With the advent of Y-tiled window-system
buffers, we now need to properly support doing a full resolve of images
marked CCS_E.

v2 (Jason Ekstrand):
 - Fix an bug in the compressed flag offset calculation
 - Treat 3D images as multi-slice for the purposes of resolve tracking

v3 (Jason Ekstrand):
 - Set the compressed flag whenever we fast-clear
 - Simplify the resolve predicate computation logic

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2cbfcb205ef777cb6e17ebca3ff658f9f2cb915f
Author: Jason Ekstrand 
Date:   Thu Jan 18 16:08:31 2018 -0800

anv/cmd_buffer: Move the mi_alu helper higher up

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e69045c4d37f5ddd56b284b225a7f11a374381c
Author: Jason Ekstrand 
Date:   Thu Jan 18 09:17:17 2018 -0800

anv/image: Simplify some verbose commennts

Reviewed-by: Topi Pohjolainen 
Reviewed-by: Nanley Chery 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0523f70ef4e3788a4510581c641dcea51640417
Author: Jason Ekstrand 
Date:   Mon Nov 27 18:09:48 2017 -0800

anv: Use blorp_ccs_ambiguate instead of fast-clears

Even though the blorp pass looks a bit on the sketchy side, the end
result in the Vulkan driver is very nice.  Instead of having this weird
case where you do a fast clear and then maybe have to resolve, we just
do the ambiguate and are done with it.  The ambiguate does exactly what
we want of setting all the CCS values to 0 which puts it into the
pass-through state.

This should also 

Mesa (master): r600/sb: Check whether optimizations would result in reladdr conflict

[Dave Airlie]

Module: Mesa
Branch: master
Commit: c36172e387b68aed083bb751d48733919f59bef7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c36172e387b68aed083bb751d48733919f59bef7

Author: Gert Wollny 
Date:   Thu Feb  8 15:11:58 2018 +0100

r600/sb: Check whether optimizations would result in reladdr conflict

v2: * Check whether the node src and dst registers are NULL before using
  them.
* fix a type in the commit message.

Two cases are handled with this patch:

1. If copy propagation tries to eliminated a move from a relative
   array access then it could optimize

 MOV R1, ARRAY[RELADDR_1]
 MOV R2, ARRAY[RELADDR_2]
 OP2 R3, R1 R2

   into

 OP2 R3, ARRAY[RELADDR_1], ARRAY[RELADDR_2]

   which is forbidden, because there is only one address register available.

2. When MULADD(x,a,MUL(x,c)) is handled

  MUL TMP, R1, ARRAY[RELADDR_1]
  MULLADD R3, R1, ARRAY[RELADDR_2], TMP

   by folding this into

  ADD TMP, ARRAY[RELADDR_2], ARRAY[RELADDR_1]
  MUL R3, R1, TMP

   which is also forbidden.

Test for these cases and reject the optimization if a forbidden combination
of relative access would be created.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103142
Signed-off-by: Gert Wollny 
Reviewed-by: Dave Airlie 

---

 src/gallium/drivers/r600/sb/sb_expr.cpp | 17 ++
 src/gallium/drivers/r600/sb/sb_ir.h |  6 +
 src/gallium/drivers/r600/sb/sb_valtable.cpp | 36 +
 3 files changed, 55 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/r600/sb/sb_expr.cpp 
b/src/gallium/drivers/r600/sb/sb_expr.cpp
index 7d43ef1d1d..1df78da660 100644
--- a/src/gallium/drivers/r600/sb/sb_expr.cpp
+++ b/src/gallium/drivers/r600/sb/sb_expr.cpp
@@ -412,7 +412,8 @@ bool expr_handler::fold_alu_op1(alu_node& n) {
n.bc.op == ALU_OP1_MOVA_GPR_INT)
&& n.bc.clamp == 0 && n.bc.omod == 0
&& n.bc.src[0].abs == 0 && n.bc.src[0].neg == 0 
&&
-   n.src.size() == 1 /* RIM/SIM can be appended as 
additional values */) {
+   n.src.size() == 1 /* RIM/SIM can be appended as 
additional values */
+   && n.dst[0]->no_reladdr_conflict_with(v0)) {
assign_source(n.dst[0], v0);
return true;
}
@@ -1027,9 +1028,17 @@ bool expr_handler::fold_alu_op3(alu_node& n) {
es1 = 1;
}
 
-   if (es0 != -1) {
-   value *va0 = es0 == 0 ? v1 : v0;
-   value *va1 = es1 == 0 ? mv1 : mv0;
+   value *va0 = es0 == 0 ? v1 : v0;
+   value *va1 = es1 == 0 ? mv1 : mv0;
+
+   /* Don't fold if no equal multipliers were found.
+* Also don#t fold if the operands of the to be created 
ADD are both
+* relatively accessed with different AR values because 
that would
+* create impossible code.
+*/
+   if (es0 != -1 &&
+   (!va0->is_rel() || !va1->is_rel() ||
+(va0->rel == va1->rel))) {
 
alu_node *add = sh.create_alu();
add->bc.set_op(ALU_OP2_ADD);
diff --git a/src/gallium/drivers/r600/sb/sb_ir.h 
b/src/gallium/drivers/r600/sb/sb_ir.h
index 245af961e6..c7a94fcb93 100644
--- a/src/gallium/drivers/r600/sb/sb_ir.h
+++ b/src/gallium/drivers/r600/sb/sb_ir.h
@@ -616,6 +616,12 @@ public:
}
}
 
+   /* Check whether copy-propagation of src into this would create an 
access
+* conflict with relative addressing, i.e. an operation that tries to 
access
+* array elements with different address register values.
+*/
+   bool no_reladdr_conflict_with(value *src);
+
val_set interferences;
unsigned uid;
 };
diff --git a/src/gallium/drivers/r600/sb/sb_valtable.cpp 
b/src/gallium/drivers/r600/sb/sb_valtable.cpp
index dd336bc417..f847138cac 100644
--- a/src/gallium/drivers/r600/sb/sb_valtable.cpp
+++ b/src/gallium/drivers/r600/sb/sb_valtable.cpp
@@ -296,6 +296,42 @@ void value::delete_uses() {
uses.erase(uses.begin(), uses.end());
 }
 
+bool value::no_reladdr_conflict_with(value *src)
+{
+   /*  if the register is not relative, it can't create an relative access 
conflict */
+   if (!src->is_rel())
+   return true;
+
+   /* If the destination is AR then we accept the copy propagation, 
because the
+* scheduler actually re-creates the address loading operation and will
+* signal interference if there is an address register load and it will 
fail
+* because 

Mesa (master): r600g/sb: Support scratch ops

[Dave Airlie]

Module: Mesa
Branch: master
Commit: a100d906b2a66cc1f192b70a6873dbc931d034f7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a100d906b2a66cc1f192b70a6873dbc931d034f7

Author: Glenn Kennard 
Date:   Sun Mar  5 18:26:52 2017 +0100

r600g/sb: Support scratch ops

Signed-off-by: Glenn Kennard 
Reviewed-by: Dave Airlie 

---

 src/gallium/drivers/r600/sb/sb_bc.h   | 10 ++
 src/gallium/drivers/r600/sb/sb_bc_builder.cpp | 44 
 src/gallium/drivers/r600/sb/sb_bc_decoder.cpp | 49 ++-
 src/gallium/drivers/r600/sb/sb_bc_dump.cpp| 15 
 src/gallium/drivers/r600/sb/sb_bc_fmt_def.inc | 36 
 5 files changed, 153 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/r600/sb/sb_bc.h 
b/src/gallium/drivers/r600/sb/sb_bc.h
index a249395474..e7231702d8 100644
--- a/src/gallium/drivers/r600/sb/sb_bc.h
+++ b/src/gallium/drivers/r600/sb/sb_bc.h
@@ -586,6 +586,14 @@ struct bc_fetch {
unsigned uav_index_mode:2;
unsigned bcast_first_req:1;
 
+   /* for MEM ops */
+   unsigned elem_size:2;
+   unsigned uncached:1;
+   unsigned indexed:1;
+   unsigned burst_count:4;
+   unsigned array_base:13;
+   unsigned array_size:12;
+
void set_op(unsigned op) { this->op = op; op_ptr = r600_isa_fetch(op); }
 };
 
@@ -761,6 +769,7 @@ private:
 
int decode_fetch_vtx(unsigned , bc_fetch );
int decode_fetch_gds(unsigned , bc_fetch );
+   int decode_fetch_mem(unsigned , bc_fetch );
 };
 
 // bytecode format definition
@@ -981,6 +990,7 @@ private:
int build_fetch_tex(fetch_node *n);
int build_fetch_vtx(fetch_node *n);
int build_fetch_gds(fetch_node *n);
+   int build_fetch_mem(fetch_node* n);
 };
 
 } // namespace r600_sb
diff --git a/src/gallium/drivers/r600/sb/sb_bc_builder.cpp 
b/src/gallium/drivers/r600/sb/sb_bc_builder.cpp
index ea91e197c0..5681fdc442 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_builder.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_builder.cpp
@@ -131,6 +131,8 @@ int bc_builder::build_fetch_clause(cf_node* n) {
 
if (f->bc.op_ptr->flags & FF_GDS)
build_fetch_gds(f);
+   else if (f->bc.op_ptr->flags & FF_MEM)
+   build_fetch_mem(f);
else if (f->bc.op_ptr->flags & FF_VTX)
build_fetch_vtx(f);
else
@@ -699,4 +701,46 @@ int bc_builder::build_fetch_vtx(fetch_node* n) {
return 0;
 }
 
+int bc_builder::build_fetch_mem(fetch_node* n) {
+   const bc_fetch  = n->bc;
+   const fetch_op_info *fop = bc.op_ptr;
+
+   assert(fop->flags & FF_MEM);
+
+   bb << MEM_RD_WORD0_R7EGCM()
+   .MEM_INST(2)
+   .ELEM_SIZE(bc.elem_size)
+   .FETCH_WHOLE_QUAD(bc.fetch_whole_quad)
+   .MEM_OP(0)
+   .UNCACHED(bc.uncached)
+   .INDEXED(bc.indexed)
+   .SRC_SEL_Y(bc.src_sel[1])
+   .SRC_GPR(bc.src_gpr)
+   .SRC_REL(bc.src_rel)
+   .SRC_SEL_X(bc.src_sel[0])
+   .BURST_COUNT(bc.burst_count)
+   .LDS_REQ(bc.lds_req)
+   .COALESCED_READ(bc.coalesced_read);
+
+   bb << MEM_RD_WORD1_R7EGCM()
+   .DST_GPR(bc.dst_gpr)
+   .DST_REL(bc.dst_rel)
+   .DST_SEL_X(bc.dst_sel[0])
+   .DST_SEL_Y(bc.dst_sel[1])
+   .DST_SEL_Z(bc.dst_sel[2])
+   .DST_SEL_W(bc.dst_sel[3])
+   .DATA_FORMAT(bc.data_format)
+   .NUM_FORMAT_ALL(bc.num_format_all)
+   .FORMAT_COMP_ALL(bc.format_comp_all)
+   .SRF_MODE_ALL(bc.srf_mode_all);
+
+   bb << MEM_RD_WORD2_R7EGCM()
+   .ARRAY_BASE(bc.array_base)
+   .ENDIAN_SWAP(bc.endian_swap)
+   .ARR_SIZE(bc.array_size);
+
+   bb << 0;
+   return 0;
+}
+
 }
diff --git a/src/gallium/drivers/r600/sb/sb_bc_decoder.cpp 
b/src/gallium/drivers/r600/sb/sb_bc_decoder.cpp
index 1fa580e66d..4a7f82ba75 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_decoder.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_decoder.cpp
@@ -413,7 +413,9 @@ int bc_decoder::decode_fetch(unsigned & i, bc_fetch& bc) {
if (fetch_opcode == 2) { // MEM_INST_MEM
unsigned mem_op = (dw0 >> 8) & 0x7;
unsigned gds_op;
-   if (mem_op == 4) {
+   if (mem_op == 0 || mem_op == 2) {
+   fetch_opcode = mem_op == 0 ? FETCH_OP_READ_SCRATCH : 
FETCH_OP_READ_MEM;
+   } else if (mem_op == 4) {
gds_op = (dw1 >> 9) & 0x1f;
if ((dw1 >> 9) & 0x20)
fetch_opcode = FETCH_OP_GDS_ADD_RET + gds_op;
@@ -425,6 +427,9 @@ int bc_decoder::decode_fetch(unsigned & i, bc_fetch& bc) {
} else

Mesa (master): r600g: Implement spilling of temp arrays (v2)

[Dave Airlie]

Module: Mesa
Branch: master
Commit: 1d871aa6268159cdc63ef846599456d9ba567206
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d871aa6268159cdc63ef846599456d9ba567206

Author: Glenn Kennard 
Date:   Sun Mar  5 18:26:54 2017 +0100

r600g: Implement spilling of temp arrays (v2)

Pessimistically spills arrays if GPR limit is exceeded.

v2: fix r600 support [airlied]

Signed-off-by: Glenn Kennard 
Reviewed-by: Dave Airlie 

---

 src/gallium/drivers/r600/r600_asm.c|  17 ++
 src/gallium/drivers/r600/r600_asm.h|   3 +
 src/gallium/drivers/r600/r600_shader.c | 280 -
 3 files changed, 292 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_asm.c 
b/src/gallium/drivers/r600/r600_asm.c
index 7a4dddb7b6..fdccae8c04 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -240,6 +240,16 @@ int r600_bytecode_add_pending_output(struct r600_bytecode 
*bc,
return 0;
 }
 
+void r600_bytecode_need_wait_ack(struct r600_bytecode *bc, boolean 
need_wait_ack)
+{
+   bc->need_wait_ack = need_wait_ack;
+}
+
+boolean r600_bytecode_get_need_wait_ack(struct r600_bytecode *bc)
+{
+   return bc->need_wait_ack;
+}
+
 /* alu instructions that can ony exits once per group */
 static int is_alu_once_inst(struct r600_bytecode_alu *alu)
 {
@@ -1511,6 +1521,13 @@ int r600_bytecode_add_gds(struct r600_bytecode *bc, 
const struct r600_bytecode_g
 int r600_bytecode_add_cfinst(struct r600_bytecode *bc, unsigned op)
 {
int r;
+
+   /* Emit WAIT_ACK before control flow to ensure pending writes are 
always acked. */
+   if (op != CF_OP_MEM_SCRATCH && bc->need_wait_ack) {
+   bc->need_wait_ack = false;
+   r = r600_bytecode_add_cfinst(bc, CF_OP_WAIT_ACK);
+   }
+
r = r600_bytecode_add_cf(bc);
if (r)
return r;
diff --git a/src/gallium/drivers/r600/r600_asm.h 
b/src/gallium/drivers/r600/r600_asm.h
index 93ac717fb8..5841044bf8 100644
--- a/src/gallium/drivers/r600/r600_asm.h
+++ b/src/gallium/drivers/r600/r600_asm.h
@@ -276,6 +276,7 @@ struct r600_bytecode {
struct r600_isa* isa;
struct r600_bytecode_output pending_outputs[5];
int n_pending_outputs;
+   boolean need_wait_ack; /* emit a pending WAIT_ACK prior 
to control flow */
 };
 
 /* eg_asm.c */
@@ -304,6 +305,8 @@ int r600_bytecode_add_output(struct r600_bytecode *bc,
const struct r600_bytecode_output *output);
 int r600_bytecode_add_pending_output(struct r600_bytecode *bc,
const struct r600_bytecode_output *output);
+void r600_bytecode_need_wait_ack(struct r600_bytecode *bc, boolean needed);
+boolean r600_bytecode_get_need_wait_ack(struct r600_bytecode *bc);
 int r600_bytecode_build(struct r600_bytecode *bc);
 int r600_bytecode_add_cf(struct r600_bytecode *bc);
 int r600_bytecode_add_cfinst(struct r600_bytecode *bc,
diff --git a/src/gallium/drivers/r600/r600_shader.c 
b/src/gallium/drivers/r600/r600_shader.c
index 903a663026..4141e86430 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -165,7 +165,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
bool dump = r600_can_dump_shader(>screen->b,
 tgsi_get_processor_type(sel->tokens));
unsigned use_sb = !(rctx->screen->b.debug_flags & DBG_NO_SB);
-   unsigned sb_disasm = use_sb || (rctx->screen->b.debug_flags & 
DBG_SB_DISASM);
+   unsigned sb_disasm;
unsigned export_shader;
 
shader->shader.bc.isa = rctx->isa;
@@ -208,6 +208,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
}
}
 
+   sb_disasm = use_sb || (rctx->screen->b.debug_flags & DBG_SB_DISASM);
if (dump && !sb_disasm) {
fprintf(stderr, 
"--\n");
r600_bytecode_disasm(>shader.bc);
@@ -325,6 +326,9 @@ struct eg_interp {
 
 struct r600_shader_ctx {
struct tgsi_shader_info info;
+   struct tgsi_array_info  *array_infos;
+   /* flag for each tgsi temp array if its been spilled or not */
+   bool*spilled_arrays;
struct tgsi_parse_context   parse;
const struct tgsi_token *tokens;
unsignedtype;
@@ -861,6 +865,95 @@ static int tgsi_barrier(struct r600_shader_ctx *ctx)
return 0;
 }
 
+static void choose_spill_arrays(struct r600_shader_ctx *ctx, int *regno, 
unsigned *scratch_space_needed)
+{
+   // pick largest array and spill it, repeat until the number of temps is 
under limit or we run out of arrays
+   unsigned n = ctx->info.array_max[TGSI_FILE_TEMPORARY];
+   unsigned narrays_left = n;
+   bool 

Mesa (master): r600/sb: handle scratch mem reads on r600

[Dave Airlie]

Module: Mesa
Branch: master
Commit: 22fc5eff803d14e99e9f86db223ceedcef1b9108
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=22fc5eff803d14e99e9f86db223ceedcef1b9108

Author: Dave Airlie 
Date:   Tue Feb  6 14:17:46 2018 +1000

r600/sb: handle scratch mem reads on r600

On r600 we use the scratch mem with read/read_ind, in that case
sb should track the rw_gpr as a dst instead of a src.

This stops the whole shader being optimised out.

Signed-off-by: Dave Airlie 
Reviewed-by: Dave Airlie 

---

 src/gallium/drivers/r600/sb/sb_bc_finalize.cpp |  9 -
 src/gallium/drivers/r600/sb/sb_bc_parser.cpp   | 19 +++
 2 files changed, 23 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp 
b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
index e737f3d6cd..5c572938a1 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
@@ -778,8 +778,15 @@ void bc_finalizer::finalize_cf(cf_node* c) {
int reg = -1;
unsigned mask = 0;
 
+
for (unsigned chan = 0; chan < 4; ++chan) {
-   value *v = c->src[chan];
+   value *v;
+   if (ctx.hw_class == HW_CLASS_R600 && c->bc.op == 
CF_OP_MEM_SCRATCH &&
+   (c->bc.type == 2 || c->bc.type == 3))
+   v = c->dst[chan];
+   else
+   v = c->src[chan];
+
if (!v || v->is_undef())
continue;
 
diff --git a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp 
b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
index 2ec842159b..a7b828268b 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
@@ -832,12 +832,23 @@ int bc_parser::prepare_ir() {
 
do {
 
-   c->src.resize(4);
+   if (ctx.hw_class == HW_CLASS_R600 && c->bc.op 
== CF_OP_MEM_SCRATCH &&
+   (c->bc.type == 2 || c->bc.type == 3)) {
+   c->dst.resize(4);
+   for(int s = 0; s < 4; ++s) {
+   if (c->bc.comp_mask & (1 << s))
+   c->dst[s] =
+   
sh->get_gpr_value(true, c->bc.rw_gpr, s, false);
+   }
+   } else {
+   c->src.resize(4);
 
-   for(int s = 0; s < 4; ++s) {
-   if (c->bc.comp_mask & (1 << s))
-   c->src[s] =
+   
+   for(int s = 0; s < 4; ++s) {
+   if (c->bc.comp_mask & (1 << s))
+   c->src[s] =

sh->get_gpr_value(true, c->bc.rw_gpr, s, false);
+   }
}
 
if (((flags & CF_RAT) || (!(flags & CF_STRM))) 
&& (c->bc.type & 1)) { // indexed write

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Mesa (master): r600g/sb: Add dependency tracking for scratch ops

[Dave Airlie]

Module: Mesa
Branch: master
Commit: cd34deb585669ffe1d520b07c629316f2ac22074
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd34deb585669ffe1d520b07c629316f2ac22074

Author: Glenn Kennard 
Date:   Sun Mar  5 18:26:53 2017 +0100

r600g/sb: Add dependency tracking for scratch ops

Signed-off-by: Glenn Kennard 
Reviewed-by: Dave Airlie 

---

 src/gallium/drivers/r600/r600_shader.h |  1 +
 src/gallium/drivers/r600/sb/sb_bc_finalize.cpp |  2 +-
 src/gallium/drivers/r600/sb/sb_bc_parser.cpp   | 12 
 src/gallium/drivers/r600/sb/sb_core.cpp|  2 +-
 src/gallium/drivers/r600/sb/sb_ir.h|  4 
 src/gallium/drivers/r600/sb/sb_ra_init.cpp |  2 +-
 src/gallium/drivers/r600/sb/sb_sched.cpp   |  2 +-
 src/gallium/drivers/r600/sb/sb_valtable.cpp|  1 +
 8 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_shader.h 
b/src/gallium/drivers/r600/r600_shader.h
index b837d1309a..3b3e667ec5 100644
--- a/src/gallium/drivers/r600/r600_shader.h
+++ b/src/gallium/drivers/r600/r600_shader.h
@@ -78,6 +78,7 @@ struct r600_shader {
boolean uses_kill;
boolean fs_write_all;
boolean two_side;
+   boolean needs_scratch_space;
/* Number of color outputs in the TGSI shader,
 * sometimes it could be higher than nr_cbufs (bug?).
 * Also with writes_all property on eg+ it will be set to max CB number 
*/
diff --git a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp 
b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
index d3fab80020..e737f3d6cd 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
@@ -311,7 +311,7 @@ void bc_finalizer::finalize_alu_group(alu_group_node* g, 
node *prev_node) {
value *d = n->dst.empty() ? NULL : n->dst[0];
 
if (d && d->is_special_reg()) {
-   assert((n->bc.op_ptr->flags & AF_MOVA) || 
d->is_geometry_emit() || d->is_lds_oq() || d->is_lds_access());
+   assert((n->bc.op_ptr->flags & AF_MOVA) || 
d->is_geometry_emit() || d->is_lds_oq() || d->is_lds_access() || 
d->is_scratch());
d = NULL;
}
 
diff --git a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp 
b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
index 87035ee2a6..2ec842159b 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
@@ -725,6 +725,11 @@ int bc_parser::prepare_fetch_clause(cf_node *cf) {

n->src.push_back(get_cf_index_value(n->bc.resource_index_mode == 
V_SQ_CF_INDEX_1));
}
}
+
+   if (n->bc.op == FETCH_OP_READ_SCRATCH) {
+   n->src.push_back(sh->get_special_value(SV_SCRATCH));
+   n->dst.push_back(sh->get_special_value(SV_SCRATCH));
+   }
}
 
return 0;
@@ -855,6 +860,10 @@ int bc_parser::prepare_ir() {
c->flags |= NF_DONT_KILL;
}
}
+   else if (c->bc.op == CF_OP_MEM_SCRATCH) {
+   
c->src.push_back(sh->get_special_value(SV_SCRATCH));
+   
c->dst.push_back(sh->get_special_value(SV_SCRATCH));
+   }
 
if (!burst_count--)
break;
@@ -889,6 +898,9 @@ int bc_parser::prepare_ir() {

c->src.push_back(sh->get_special_value(SV_GEOMETRY_EMIT));

c->dst.push_back(sh->get_special_value(SV_GEOMETRY_EMIT));
}
+   } else if (c->bc.op == CF_OP_WAIT_ACK) {
+   c->src.push_back(sh->get_special_value(SV_SCRATCH));
+   c->dst.push_back(sh->get_special_value(SV_SCRATCH));
}
}
 
diff --git a/src/gallium/drivers/r600/sb/sb_core.cpp 
b/src/gallium/drivers/r600/sb/sb_core.cpp
index 5049b67784..a94d8d32b5 100644
--- a/src/gallium/drivers/r600/sb/sb_core.cpp
+++ b/src/gallium/drivers/r600/sb/sb_core.cpp
@@ -191,7 +191,7 @@ int r600_sb_bytecode_process(struct r600_context *rctx,
 
// if conversion breaks the dependency tracking between CF_EMIT ops 
when it removes
// the phi nodes for SV_GEOMETRY_EMIT. Just disable it for GS
-   if (sh->target != TARGET_GS && sh->target != TARGET_HS)
+   if ((sh->target != TARGET_GS && sh->target != TARGET_HS) || 
pshader->needs_scratch_space)
SB_RUN_PASS(if_conversion,  1);
 
// if_conversion breaks info about uses, but next pass (peephole)
diff --git 

Mesa (master): r600g: Add pending output function

[Dave Airlie]

Module: Mesa
Branch: master
Commit: 9d31596d7ae8f24b00450a0b0d242dadfb36dfd9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d31596d7ae8f24b00450a0b0d242dadfb36dfd9

Author: Glenn Kennard 
Date:   Sun Mar  5 18:26:50 2017 +0100

r600g: Add pending output function

Spills have to happen after the VLIW bundle currently
processed, so defer emitting the spill op.

Signed-off-by: Glenn Kennard 
Reviewed-by: Dave Airlie 

---

 src/gallium/drivers/r600/r600_asm.c | 18 ++
 src/gallium/drivers/r600/r600_asm.h |  4 
 2 files changed, 22 insertions(+)

diff --git a/src/gallium/drivers/r600/r600_asm.c 
b/src/gallium/drivers/r600/r600_asm.c
index 5b74be1748..7a4dddb7b6 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -231,6 +231,15 @@ int r600_bytecode_add_output(struct r600_bytecode *bc,
return 0;
 }
 
+int r600_bytecode_add_pending_output(struct r600_bytecode *bc,
+   const struct r600_bytecode_output *output)
+{
+   assert(bc->n_pending_outputs + 1 < ARRAY_SIZE(bc->pending_outputs));
+   bc->pending_outputs[bc->n_pending_outputs++] = *output;
+
+   return 0;
+}
+
 /* alu instructions that can ony exits once per group */
 static int is_alu_once_inst(struct r600_bytecode_alu *alu)
 {
@@ -1301,6 +1310,15 @@ int r600_bytecode_add_alu_type(struct r600_bytecode *bc,
if (nalu->dst.rel && bc->r6xx_nop_after_rel_dst)
insert_nop_r6xx(bc);
 
+   /* Might need to insert spill write ops after current clause */
+   if (nalu->last && bc->n_pending_outputs) {
+   while (bc->n_pending_outputs) {
+   r = r600_bytecode_add_output(bc, 
>pending_outputs[--bc->n_pending_outputs]);
+   if (r)
+   return r;
+   }
+   }
+
return 0;
 }
 
diff --git a/src/gallium/drivers/r600/r600_asm.h 
b/src/gallium/drivers/r600/r600_asm.h
index b8abdf014d..93ac717fb8 100644
--- a/src/gallium/drivers/r600/r600_asm.h
+++ b/src/gallium/drivers/r600/r600_asm.h
@@ -274,6 +274,8 @@ struct r600_bytecode {
unsignedindex_reg[2]; /* indexing register CF_INDEX_[01] */
unsigneddebug_id;
struct r600_isa* isa;
+   struct r600_bytecode_output pending_outputs[5];
+   int n_pending_outputs;
 };
 
 /* eg_asm.c */
@@ -300,6 +302,8 @@ int r600_bytecode_add_gds(struct r600_bytecode *bc,
const struct r600_bytecode_gds *gds);
 int r600_bytecode_add_output(struct r600_bytecode *bc,
const struct r600_bytecode_output *output);
+int r600_bytecode_add_pending_output(struct r600_bytecode *bc,
+   const struct r600_bytecode_output *output);
 int r600_bytecode_build(struct r600_bytecode *bc);
 int r600_bytecode_add_cf(struct r600_bytecode *bc);
 int r600_bytecode_add_cfinst(struct r600_bytecode *bc,

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Mesa (master): r600g: Support emitting scratch ops

[Dave Airlie]

Module: Mesa
Branch: master
Commit: 9c48a139b08f223f4ac6e218d19b356bf4a41463
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9c48a139b08f223f4ac6e218d19b356bf4a41463

Author: Glenn Kennard 
Date:   Sun Mar  5 18:26:49 2017 +0100

r600g: Support emitting scratch ops

Signed-off-by: Glenn Kennard 
Reviewed-by: Dave Airlie 

---

 src/gallium/drivers/r600/eg_asm.c   |  3 ++-
 src/gallium/drivers/r600/r600_asm.c | 21 
 src/gallium/drivers/r600/r600_asm.h | 15 ++
 src/gallium/drivers/r600/r700_asm.c | 39 +
 4 files changed, 77 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/r600/eg_asm.c 
b/src/gallium/drivers/r600/eg_asm.c
index c03a9d84da..acf3fd3741 100644
--- a/src/gallium/drivers/r600/eg_asm.c
+++ b/src/gallium/drivers/r600/eg_asm.c
@@ -112,7 +112,8 @@ int eg_bytecode_cf_build(struct r600_bytecode *bc, struct 
r600_bytecode_cf *cf)

S_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE(cf->vpm) |

S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) |

S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask) |
-   
S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size);
+   
S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size) |
+   
S_SQ_CF_ALLOC_EXPORT_WORD1_MARK(cf->output.mark);
if (bc->chip_class == EVERGREEN) /* no EOP on cayman */
bc->bytecode[id] |= 
S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
id++;
diff --git a/src/gallium/drivers/r600/r600_asm.c 
b/src/gallium/drivers/r600/r600_asm.c
index ec2d34e950..5b74be1748 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -1510,6 +1510,8 @@ int cm_bytecode_add_cf_end(struct r600_bytecode *bc)
 /* common to all 3 families */
 static int r600_bytecode_vtx_build(struct r600_bytecode *bc, struct 
r600_bytecode_vtx *vtx, unsigned id)
 {
+   if (r600_isa_fetch(vtx->op)->flags & FF_MEM)
+   return r700_bytecode_fetch_mem_build(bc, vtx, id);
bc->bytecode[id] = 
S_SQ_VTX_WORD0_VTX_INST(r600_isa_fetch_opcode(bc->isa->hw_class, vtx->op)) |
S_SQ_VTX_WORD0_BUFFER_ID(vtx->buffer_id) |
S_SQ_VTX_WORD0_FETCH_TYPE(vtx->fetch_type) |
@@ -2190,6 +2192,10 @@ void r600_bytecode_disasm(struct r600_bytecode *bc)
fprintf(stderr, "NO_BARRIER ");
if (cf->end_of_program)
fprintf(stderr, "EOP ");
+
+   if (cf->output.mark)
+   fprintf(stderr, "MARK ");
+
fprintf(stderr, "\n");
} else {
fprintf(stderr, "%04d %08X %08X  %s ", id, 
bc->bytecode[id],
@@ -2323,6 +2329,8 @@ void r600_bytecode_disasm(struct r600_bytecode *bc)
 
o += fprintf(stderr, ", R%d.", vtx->src_gpr);
o += print_swizzle(vtx->src_sel_x);
+   if (r600_isa_fetch(vtx->op)->flags & FF_MEM)
+   o += print_swizzle(vtx->src_sel_y);
 
if (vtx->offset)
fprintf(stderr, " +%db", vtx->offset);
@@ -2339,6 +2347,19 @@ void r600_bytecode_disasm(struct r600_bytecode *bc)
if (bc->chip_class >= EVERGREEN && 
vtx->buffer_index_mode)
fprintf(stderr, "SQ_%s ", 
index_mode[vtx->buffer_index_mode]);
 
+   if (r600_isa_fetch(vtx->op)->flags & FF_MEM) {
+   if (vtx->uncached)
+   fprintf(stderr, "UNCACHED ");
+   if (vtx->indexed)
+   fprintf(stderr, "INDEXED:%d ", 
vtx->indexed);
+
+   fprintf(stderr, "ELEM_SIZE:%d ", 
vtx->elem_size);
+   if (vtx->burst_count)
+   fprintf(stderr, "BURST_COUNT:%d ", 
vtx->burst_count);
+   fprintf(stderr, "ARRAY_BASE:%d ", 
vtx->array_base);
+   fprintf(stderr, "ARRAY_SIZE:%d ", 
vtx->array_size);
+   }
+
fprintf(stderr, "UCF:%d ", vtx->use_const_fields);
fprintf(stderr, "FMT(DTA:%d ", vtx->data_format);
fprintf(stderr, "NUM:%d ", vtx->num_format_all);
diff --git a/src/gallium/drivers/r600/r600_asm.h 
b/src/gallium/drivers/r600/r600_asm.h
index 

Mesa (master): r600g: Implement scratch buffer state management (v2)

[Dave Airlie]

Module: Mesa
Branch: master
Commit: 6b4303f358494e6c39476291c539af50d730910a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6b4303f358494e6c39476291c539af50d730910a

Author: Glenn Kennard 
Date:   Sun Mar  5 18:26:51 2017 +0100

r600g: Implement scratch buffer state management (v2)

v2: add Glenn's fixes

Signed-off-by: Glenn Kennard 
Reviewed-by: Dave Airlie 

---

 src/gallium/drivers/r600/evergreen_state.c   |  24 ++
 src/gallium/drivers/r600/r600_hw_context.c   |   4 +
 src/gallium/drivers/r600/r600_pipe.c |   3 +
 src/gallium/drivers/r600/r600_pipe.h |  16 +++-
 src/gallium/drivers/r600/r600_shader.h   |   1 +
 src/gallium/drivers/r600/r600_state_common.c | 105 +++
 6 files changed, 152 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index fcd742c5f9..48934158bd 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2297,6 +2297,30 @@ static void evergreen_emit_tcs_constant_buffers(struct 
r600_context *rctx, struc
0);
 }
 
+void evergreen_setup_scratch_buffers(struct r600_context *rctx) {
+   static const struct {
+   unsigned ring_base;
+   unsigned item_size;
+   unsigned ring_size;
+   } regs[EG_NUM_HW_STAGES] = {
+   [R600_HW_STAGE_PS] = { R_008C68_SQ_PSTMP_RING_BASE, 
R_028914_SQ_PSTMP_RING_ITEMSIZE, R_008C6C_SQ_PSTMP_RING_SIZE },
+   [R600_HW_STAGE_VS] = { R_008C60_SQ_VSTMP_RING_BASE, 
R_028910_SQ_VSTMP_RING_ITEMSIZE, R_008C64_SQ_VSTMP_RING_SIZE },
+   [R600_HW_STAGE_GS] = { R_008C58_SQ_GSTMP_RING_BASE, 
R_02890C_SQ_GSTMP_RING_ITEMSIZE, R_008C5C_SQ_GSTMP_RING_SIZE },
+   [R600_HW_STAGE_ES] = { R_008C50_SQ_ESTMP_RING_BASE, 
R_028908_SQ_ESTMP_RING_ITEMSIZE, R_008C54_SQ_ESTMP_RING_SIZE },
+   [EG_HW_STAGE_LS] = { R_008E10_SQ_LSTMP_RING_BASE, 
R_028830_SQ_LSTMP_RING_ITEMSIZE, R_008E14_SQ_LSTMP_RING_SIZE },
+   [EG_HW_STAGE_HS] = { R_008E18_SQ_HSTMP_RING_BASE, 
R_028834_SQ_HSTMP_RING_ITEMSIZE, R_008E1C_SQ_HSTMP_RING_SIZE }
+   };
+
+   for (unsigned i = 0; i < EG_NUM_HW_STAGES; i++) {
+   struct r600_pipe_shader *stage = 
rctx->hw_shader_stages[i].shader;
+
+   if (stage && unlikely(stage->scratch_space_needed)) {
+   r600_setup_scratch_area_for_shader(rctx, stage,
+   >scratch_buffers[i], regs[i].ring_base, 
regs[i].item_size, regs[i].ring_size);
+   }
+   }
+}
+
 static void evergreen_emit_sampler_views(struct r600_context *rctx,
 struct r600_samplerview_state *state,
 unsigned resource_id_base, unsigned 
pkt_flags)
diff --git a/src/gallium/drivers/r600/r600_hw_context.c 
b/src/gallium/drivers/r600/r600_hw_context.c
index 4b6d951af6..3ce1825104 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -415,6 +415,10 @@ void r600_begin_new_cs(struct r600_context *ctx)
r600_sampler_states_dirty(ctx, >states);
}
 
+   for (shader = 0; shader < ARRAY_SIZE(ctx->scratch_buffers); shader++) {
+   ctx->scratch_buffers[shader].dirty = true;
+   }
+
r600_postflush_resume_features(>b);
 
/* Re-emit the draw state. */
diff --git a/src/gallium/drivers/r600/r600_pipe.c 
b/src/gallium/drivers/r600/r600_pipe.c
index 6c021e568d..cc35d86709 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -71,6 +71,9 @@ static void r600_destroy_context(struct pipe_context *context)
 
r600_sb_context_destroy(rctx->sb_context);
 
+   for (sh = 0; sh < (rctx->b.chip_class < EVERGREEN ? R600_NUM_HW_STAGES 
: EG_NUM_HW_STAGES); sh++) {
+   r600_resource_reference(>scratch_buffers[sh].buffer, 
NULL);
+   }
r600_resource_reference(>dummy_cmask, NULL);
r600_resource_reference(>dummy_fmask, NULL);
 
diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index 740b50aec5..6d09093052 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -478,6 +478,14 @@ struct r600_image_state {
struct r600_image_view views[R600_MAX_IMAGES];
 };
 
+/* Used to spill shader temps */
+struct r600_scratch_buffer {
+   struct r600_resource*buffer;
+   boolean dirty;
+   unsignedsize;
+   unsigneditem_size;
+};
+
 struct r600_context {
struct r600_common_context  b;
struct r600_screen  *screen;
@@ -594,6 +602,8 @@ struct r600_context {
   

Mesa (master): r600: fix texture gather swizzling.

[Dave Airlie]

Module: Mesa
Branch: master
Commit: 2a891ed19065dac89e8639800d3c63274d19a97a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2a891ed19065dac89e8639800d3c63274d19a97a

Author: Dave Airlie 
Date:   Thu Feb  8 16:19:28 2018 +1000

r600: fix texture gather swizzling.

This fixes:
KHR-GL45.texture_gather.swizzle
on cayman and redwood.

Reviewed-by: Roland Scheidegger 
Signed-off-by: Dave Airlie 

---

 src/gallium/drivers/r600/r600_shader.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_shader.c 
b/src/gallium/drivers/r600/r600_shader.c
index 358fc4c33d..903a663026 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -7976,15 +7976,15 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
tex.inst_mod = texture_component_select;
 
if (ctx->bc->chip_class == CAYMAN) {
-   /* GATHER4 result order is different from TGSI TG4 */
-   tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 2) ? 
0 : 7;
-   tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 4) ? 
1 : 7;
-   tex.dst_sel_z = (inst->Dst[0].Register.WriteMask & 1) ? 
2 : 7;
+   tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 1) ? 
0 : 7;
+   tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 2) ? 
1 : 7;
+   tex.dst_sel_z = (inst->Dst[0].Register.WriteMask & 4) ? 
2 : 7;
tex.dst_sel_w = (inst->Dst[0].Register.WriteMask & 8) ? 
3 : 7;
} else {
-   tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 2) ? 
1 : 7;
-   tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 4) ? 
2 : 7;
-   tex.dst_sel_z = (inst->Dst[0].Register.WriteMask & 1) ? 
0 : 7;
+   /* GATHER4 result order is different from TGSI TG4 */
+   tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 1) ? 
1 : 7;
+   tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 2) ? 
2 : 7;
+   tex.dst_sel_z = (inst->Dst[0].Register.WriteMask & 4) ? 
0 : 7;
tex.dst_sel_w = (inst->Dst[0].Register.WriteMask & 8) ? 
3 : 7;
}
}

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Mesa (master): ac: add 64bit support to ac_find_lsb()

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 12a2350e6d3b974dec74280543cf5cac22720358
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=12a2350e6d3b974dec74280543cf5cac22720358

Author: Timothy Arceri 
Date:   Tue Feb  6 14:38:57 2018 +1100

ac: add 64bit support to ac_find_lsb()

v2: use LLVMBuildTrunc()

Reviewed-by: Marek Olšák 

---

 src/amd/common/ac_llvm_build.c | 22 --
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 902dae048c..f3d4effbd0 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -2001,6 +2001,20 @@ LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
 LLVMTypeRef dst_type,
 LLVMValueRef src0)
 {
+   unsigned src0_bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
+   const char *intrin_name;
+   LLVMTypeRef type;
+   LLVMValueRef zero;
+   if (src0_bitsize == 64) {
+   intrin_name = "llvm.cttz.i64";
+   type = ctx->i64;
+   zero = ctx->i64_0;
+   } else {
+   intrin_name = "llvm.cttz.i32";
+   type = ctx->i32;
+   zero = ctx->i32_0;
+   }
+
LLVMValueRef params[2] = {
src0,
 
@@ -2016,15 +2030,19 @@ LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
LLVMConstInt(ctx->i1, 1, false),
};
 
-   LLVMValueRef lsb = ac_build_intrinsic(ctx, "llvm.cttz.i32", ctx->i32,
+   LLVMValueRef lsb = ac_build_intrinsic(ctx, intrin_name, type,
  params, 2,
  AC_FUNC_ATTR_READNONE);
 
+   if (src0_bitsize == 64) {
+   lsb = LLVMBuildTrunc(ctx->builder, lsb, ctx->i32, "");
+   }
+
/* TODO: We need an intrinsic to skip this conditional. */
/* Check for zero: */
return LLVMBuildSelect(ctx->builder, LLVMBuildICmp(ctx->builder,
   LLVMIntEQ, src0,
-  ctx->i32_0, ""),
+  zero, ""),
   LLVMConstInt(ctx->i32, -1, 0), lsb, "");
 }
 

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Mesa (master): ac: add 64bit bitCount support

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 19f9839f0b94146227076f45dbbc62077d64e7a9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=19f9839f0b94146227076f45dbbc62077d64e7a9

Author: Timothy Arceri 
Date:   Tue Feb  6 14:34:55 2018 +1100

ac: add 64bit bitCount support

v2: use LLVMBuildTrunc()

Reviewed-by: Marek Olšák 

---

 src/amd/common/ac_nir_to_llvm.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 550c12d249..b842641383 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -1917,7 +1917,12 @@ static void visit_alu(struct ac_nir_context *ctx, const 
nir_alu_instr *instr)
result = ac_build_intrinsic(>ac, "llvm.bitreverse.i32", 
ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
break;
case nir_op_bit_count:
-   result = ac_build_intrinsic(>ac, "llvm.ctpop.i32", 
ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
+   if (get_elem_bits(>ac, LLVMTypeOf(src[0])) == 32)
+   result = ac_build_intrinsic(>ac, "llvm.ctpop.i32", 
ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
+   else {
+   result = ac_build_intrinsic(>ac, "llvm.ctpop.i64", 
ctx->ac.i64, src, 1, AC_FUNC_ATTR_READNONE);
+   result = LLVMBuildTrunc(ctx->ac.builder, result, 
ctx->ac.i32, "");
+   }
break;
case nir_op_vec2:
case nir_op_vec3:

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Mesa (master): ac: move get_elem_bits() to ac_llvm_build.c

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: a9f6b392c7647747ca8e8e776f8af800d77d67c1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9f6b392c7647747ca8e8e776f8af800d77d67c1

Author: Timothy Arceri 
Date:   Tue Feb  6 14:38:19 2018 +1100

ac: move get_elem_bits() to ac_llvm_build.c

Reviewed-by: Marek Olšák 

---

 src/amd/common/ac_llvm_build.c  | 19 +++
 src/amd/common/ac_llvm_build.h  |  3 +++
 src/amd/common/ac_nir_to_llvm.c | 34 --
 3 files changed, 30 insertions(+), 26 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index e88456274f..902dae048c 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -128,6 +128,25 @@ ac_llvm_extract_elem(struct ac_llvm_context *ac,
   LLVMConstInt(ac->i32, index, false), "");
 }
 
+int
+ac_get_elem_bits(struct ac_llvm_context *ctx, LLVMTypeRef type)
+{
+   if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
+   type = LLVMGetElementType(type);
+
+   if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind)
+   return LLVMGetIntTypeWidth(type);
+
+   if (type == ctx->f16)
+   return 16;
+   if (type == ctx->f32)
+   return 32;
+   if (type == ctx->f64)
+   return 64;
+
+   unreachable("Unhandled type kind in get_elem_bits");
+}
+
 unsigned
 ac_get_type_size(LLVMTypeRef type)
 {
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 7e53115dc8..e78e9589cf 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -92,6 +92,9 @@ ac_llvm_context_init(struct ac_llvm_context *ctx, 
LLVMContextRef context,
 int
 ac_get_llvm_num_components(LLVMValueRef value);
 
+int
+ac_get_elem_bits(struct ac_llvm_context *ctx, LLVMTypeRef type);
+
 LLVMValueRef
 ac_llvm_extract_elem(struct ac_llvm_context *ac,
 LLVMValueRef value,
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index b842641383..2329016ac6 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -329,24 +329,6 @@ create_llvm_function(LLVMContextRef ctx, LLVMModuleRef 
module,
return main_function;
 }
 
-static int get_elem_bits(struct ac_llvm_context *ctx, LLVMTypeRef type)
-{
-   if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
-   type = LLVMGetElementType(type);
-
-   if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind)
-   return LLVMGetIntTypeWidth(type);
-
-   if (type == ctx->f16)
-   return 16;
-   if (type == ctx->f32)
-   return 32;
-   if (type == ctx->f64)
-   return 64;
-
-   unreachable("Unhandled type kind in get_elem_bits");
-}
-
 static LLVMValueRef unpack_param(struct ac_llvm_context *ctx,
 LLVMValueRef param, unsigned rshift,
 unsigned bitwidth)
@@ -1267,7 +1249,7 @@ static LLVMValueRef emit_intrin_1f_param(struct 
ac_llvm_context *ctx,
};
 
MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", 
intrin,
-get_elem_bits(ctx, 
result_type));
+ac_get_elem_bits(ctx, 
result_type));
assert(length < sizeof(name));
return ac_build_intrinsic(ctx, name, result_type, params, 1, 
AC_FUNC_ATTR_READNONE);
 }
@@ -1284,7 +1266,7 @@ static LLVMValueRef emit_intrin_2f_param(struct 
ac_llvm_context *ctx,
};
 
MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", 
intrin,
-get_elem_bits(ctx, 
result_type));
+ac_get_elem_bits(ctx, 
result_type));
assert(length < sizeof(name));
return ac_build_intrinsic(ctx, name, result_type, params, 2, 
AC_FUNC_ATTR_READNONE);
 }
@@ -1302,7 +1284,7 @@ static LLVMValueRef emit_intrin_3f_param(struct 
ac_llvm_context *ctx,
};
 
MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", 
intrin,
-get_elem_bits(ctx, 
result_type));
+ac_get_elem_bits(ctx, 
result_type));
assert(length < sizeof(name));
return ac_build_intrinsic(ctx, name, result_type, params, 3, 
AC_FUNC_ATTR_READNONE);
 }
@@ -1917,7 +1899,7 @@ static void visit_alu(struct ac_nir_context *ctx, const 
nir_alu_instr *instr)
result = ac_build_intrinsic(>ac, "llvm.bitreverse.i32", 
ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
break;
case nir_op_bit_count:
-   if (get_elem_bits(>ac, LLVMTypeOf(src[0])) == 32)
+   if (ac_get_elem_bits(>ac, LLVMTypeOf(src[0])) == 32)
result = 

Mesa (master): ac/nir: clean up handle_fs_outputs_post()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: bb750d265c5c27136cf10460fc423503a4d7d5aa
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb750d265c5c27136cf10460fc423503a4d7d5aa

Author: Samuel Pitoiset 
Date:   Thu Feb  8 14:56:48 2018 +0100

ac/nir: clean up handle_fs_outputs_post()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/common/ac_nir_to_llvm.c | 64 -
 1 file changed, 38 insertions(+), 26 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 747f82549e..550c12d249 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -6404,12 +6404,12 @@ handle_tcs_outputs_post(struct nir_to_llvm_context *ctx)
 
 static bool
 si_export_mrt_color(struct nir_to_llvm_context *ctx,
-   LLVMValueRef *color, unsigned param, bool is_last,
+   LLVMValueRef *color, unsigned index, bool is_last,
struct ac_export_args *args)
 {
/* Export */
-   si_llvm_init_export_args(ctx, color, param,
-args);
+   si_llvm_init_export_args(ctx, color,
+V_008DFC_SQ_EXP_MRT + index, args);
 
if (is_last) {
args->valid_mask = 1; /* whether the EXEC mask is valid */
@@ -6441,40 +6441,52 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
 
for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
LLVMValueRef values[4];
+   bool last = false;
 
if (!(ctx->output_mask & (1ull << i)))
continue;
 
-   if (i == FRAG_RESULT_DEPTH) {
-   depth = ac_to_float(>ac, radv_load_output(ctx, i, 
0));
-   } else if (i == FRAG_RESULT_STENCIL) {
-   stencil = ac_to_float(>ac, radv_load_output(ctx, 
i, 0));
-   } else if (i == FRAG_RESULT_SAMPLE_MASK) {
-   samplemask = ac_to_float(>ac, 
radv_load_output(ctx, i, 0));
-   } else {
-   bool last = false;
-   for (unsigned j = 0; j < 4; j++)
-   values[j] = ac_to_float(>ac,
-   radv_load_output(ctx, 
i, j));
-
-   if (!ctx->shader_info->info.ps.writes_z &&
-   !ctx->shader_info->info.ps.writes_stencil &&
-   !ctx->shader_info->info.ps.writes_sample_mask)
-   last = ctx->output_mask <= ((1ull << (i + 1)) - 
1);
-
-   bool ret = si_export_mrt_color(ctx, values, 
V_008DFC_SQ_EXP_MRT + (i - FRAG_RESULT_DATA0), last, _args[index]);
-   if (ret)
-   index++;
-   }
+   if (i < FRAG_RESULT_DATA0)
+   continue;
+
+   for (unsigned j = 0; j < 4; j++)
+   values[j] = ac_to_float(>ac,
+   radv_load_output(ctx, i, j));
+
+   if (!ctx->shader_info->info.ps.writes_z &&
+   !ctx->shader_info->info.ps.writes_stencil &&
+   !ctx->shader_info->info.ps.writes_sample_mask)
+   last = ctx->output_mask <= ((1ull << (i + 1)) - 1);
+
+   bool ret = si_export_mrt_color(ctx, values,
+  i - FRAG_RESULT_DATA0,
+  last, _args[index]);
+   if (ret)
+   index++;
}
 
+   /* Process depth, stencil, samplemask. */
+   if (ctx->shader_info->info.ps.writes_z) {
+   depth = ac_to_float(>ac,
+   radv_load_output(ctx, FRAG_RESULT_DEPTH, 
0));
+   }
+   if (ctx->shader_info->info.ps.writes_stencil) {
+   stencil = ac_to_float(>ac,
+ radv_load_output(ctx, 
FRAG_RESULT_STENCIL, 0));
+   }
+   if (ctx->shader_info->info.ps.writes_sample_mask) {
+   samplemask = ac_to_float(>ac,
+radv_load_output(ctx, 
FRAG_RESULT_SAMPLE_MASK, 0));
+   }
+
+   /* Export PS outputs. */
for (unsigned i = 0; i < index; i++)
ac_build_export(>ac, _args[i]);
+
if (depth || stencil || samplemask)
radv_export_mrt_z(ctx, depth, stencil, samplemask);
-   else if (!index) {
+   else if (!index)
ac_build_export_null(>ac);
-   }
 }
 
 static void

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Mesa (master): ac/nir: add radv_load_output() helper

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 528bc14fa54105ac893de197bdc0592cdca3e6b5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=528bc14fa54105ac893de197bdc0592cdca3e6b5

Author: Samuel Pitoiset 
Date:   Thu Feb  8 14:56:47 2018 +0100

ac/nir: add radv_load_output() helper

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/common/ac_nir_to_llvm.c | 40 
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 766d96c5e0..747f82549e 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -5874,6 +5874,15 @@ radv_export_param(struct nir_to_llvm_context *ctx, 
unsigned index,
ac_build_export(>ac, );
 }
 
+static LLVMValueRef
+radv_load_output(struct nir_to_llvm_context *ctx, unsigned index, unsigned 
chan)
+{
+   LLVMValueRef output =
+   ctx->nir->outputs[radeon_llvm_reg_index_soa(index, chan)];
+
+   return LLVMBuildLoad(ctx->builder, output, "");
+}
+
 static void
 handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
   bool export_prim_id,
@@ -5910,8 +5919,7 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
 
i = VARYING_SLOT_CLIP_DIST0;
for (j = 0; j < ctx->num_output_clips + ctx->num_output_culls; 
j++)
-   slots[j] = ac_to_float(>ac, 
LLVMBuildLoad(ctx->builder,
-  
ctx->nir->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
+   slots[j] = ac_to_float(>ac, radv_load_output(ctx, 
i, j));
 
for (i = ctx->num_output_clips + ctx->num_output_culls; i < 8; 
i++)
slots[i] = LLVMGetUndef(ctx->ac.f32);
@@ -5933,27 +5941,23 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
LLVMValueRef pos_values[4] = {ctx->ac.f32_0, ctx->ac.f32_0, 
ctx->ac.f32_0, ctx->ac.f32_1};
if (ctx->output_mask & (1ull << VARYING_SLOT_POS)) {
for (unsigned j = 0; j < 4; j++)
-   pos_values[j] = LLVMBuildLoad(ctx->builder,
-
ctx->nir->outputs[radeon_llvm_reg_index_soa(VARYING_SLOT_POS, j)], "");
+   pos_values[j] = radv_load_output(ctx, VARYING_SLOT_POS, 
j);
}
si_llvm_init_export_args(ctx, pos_values, V_008DFC_SQ_EXP_POS, 
_args[0]);
 
if (ctx->output_mask & (1ull << VARYING_SLOT_PSIZ)) {
outinfo->writes_pointsize = true;
-   psize_value = LLVMBuildLoad(ctx->builder,
-   
ctx->nir->outputs[radeon_llvm_reg_index_soa(VARYING_SLOT_PSIZ, 0)], "");
+   psize_value = radv_load_output(ctx, VARYING_SLOT_PSIZ, 0);
}
 
if (ctx->output_mask & (1ull << VARYING_SLOT_LAYER)) {
outinfo->writes_layer = true;
-   layer_value = LLVMBuildLoad(ctx->builder,
-   
ctx->nir->outputs[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)], "");
+   layer_value = radv_load_output(ctx, VARYING_SLOT_LAYER, 0);
}
 
if (ctx->output_mask & (1ull << VARYING_SLOT_VIEWPORT)) {
outinfo->writes_viewport_index = true;
-   viewport_index_value = LLVMBuildLoad(ctx->builder,
-
ctx->nir->outputs[radeon_llvm_reg_index_soa(VARYING_SLOT_VIEWPORT, 0)], "");
+   viewport_index_value = radv_load_output(ctx, 
VARYING_SLOT_VIEWPORT, 0);
}
 
if (outinfo->writes_pointsize ||
@@ -6023,8 +6027,7 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
continue;
 
for (unsigned j = 0; j < 4; j++)
-   values[j] = ac_to_float(>ac, 
LLVMBuildLoad(ctx->builder,
-   
ctx->nir->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
+   values[j] = ac_to_float(>ac, radv_load_output(ctx, 
i, j));
 
radv_export_param(ctx, param_count, values);
 
@@ -6443,19 +6446,16 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
continue;
 
if (i == FRAG_RESULT_DEPTH) {
-   depth = ac_to_float(>ac, 
LLVMBuildLoad(ctx->builder,
-   
ctx->nir->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
+   depth = ac_to_float(>ac, radv_load_output(ctx, i, 
0));
} else if (i == FRAG_RESULT_STENCIL) {
-   stencil = ac_to_float(>ac, 
LLVMBuildLoad(ctx->builder,
- 
ctx->nir->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
+ 

Mesa (master): ac/nir: add radv_export_param() helper

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: a8e04e91de7283c69d74b427707bfc93b1556cca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8e04e91de7283c69d74b427707bfc93b1556cca

Author: Samuel Pitoiset 
Date:   Thu Feb  8 14:56:45 2018 +0100

ac/nir: add radv_export_param() helper

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/common/ac_nir_to_llvm.c | 43 +
 1 file changed, 22 insertions(+), 21 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index aa7503136c..f1f846caeb 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -5864,6 +5864,17 @@ si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
 }
 
 static void
+radv_export_param(struct nir_to_llvm_context *ctx, unsigned index,
+ LLVMValueRef *values)
+{
+   struct ac_export_args args;
+
+   si_llvm_init_export_args(ctx, values,
+V_008DFC_SQ_EXP_PARAM + index, );
+   ac_build_export(>ac, );
+}
+
+static void
 handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
   bool export_prim_id,
   struct ac_vs_output_info *outinfo)
@@ -6006,42 +6017,32 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
if (!(ctx->output_mask & (1ull << i)))
continue;
 
+   if (i != VARYING_SLOT_LAYER &&
+   i != VARYING_SLOT_PRIMITIVE_ID &&
+   i < VARYING_SLOT_VAR0)
+   continue;
+
for (unsigned j = 0; j < 4; j++)
values[j] = ac_to_float(>ac, 
LLVMBuildLoad(ctx->builder,

ctx->nir->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
 
-   if (i == VARYING_SLOT_LAYER) {
-   target = V_008DFC_SQ_EXP_PARAM + param_count;
-   outinfo->vs_output_param_offset[VARYING_SLOT_LAYER] = 
param_count;
-   param_count++;
-   } else if (i == VARYING_SLOT_PRIMITIVE_ID) {
-   target = V_008DFC_SQ_EXP_PARAM + param_count;
-   
outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = param_count;
-   param_count++;
-   } else if (i >= VARYING_SLOT_VAR0) {
-   target = V_008DFC_SQ_EXP_PARAM + param_count;
-   outinfo->vs_output_param_offset[i] = param_count;
-   param_count++;
-   } else
-   continue;
+   radv_export_param(ctx, param_count, values);
 
-   si_llvm_init_export_args(ctx, values, target, );
-   ac_build_export(>ac, );
+   outinfo->vs_output_param_offset[i] = param_count++;
}
 
if (export_prim_id) {
LLVMValueRef values[4];
-   target = V_008DFC_SQ_EXP_PARAM + param_count;
-   outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = 
param_count;
-   param_count++;
 
values[0] = ctx->vs_prim_id;
ctx->shader_info->vs.vgpr_comp_cnt = MAX2(2,
  
ctx->shader_info->vs.vgpr_comp_cnt);
for (unsigned j = 1; j < 4; j++)
values[j] = ctx->ac.f32_0;
-   si_llvm_init_export_args(ctx, values, target, );
-   ac_build_export(>ac, );
+
+   radv_export_param(ctx, param_count, values);
+
+   outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = 
param_count++;
outinfo->export_prim_id = true;
}
 

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Mesa (master): ac/nir: remove set but unused export_mask

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: e3cfd6b8057d22e20fbc7629f4574a93338d2681
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3cfd6b8057d22e20fbc7629f4574a93338d2681

Author: Samuel Pitoiset 
Date:   Thu Feb  8 14:56:44 2018 +0100

ac/nir: remove set but unused export_mask

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/common/ac_nir_to_llvm.c | 1 -
 src/amd/common/ac_nir_to_llvm.h | 1 -
 2 files changed, 2 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9aa439a4ca..aa7503136c 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -6019,7 +6019,6 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,

outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = param_count;
param_count++;
} else if (i >= VARYING_SLOT_VAR0) {
-   outinfo->export_mask |= 1u << (i - VARYING_SLOT_VAR0);
target = V_008DFC_SQ_EXP_PARAM + param_count;
outinfo->vs_output_param_offset[i] = param_count;
param_count++;
diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 023200ace8..9332531ce3 100644
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -150,7 +150,6 @@ struct ac_vs_output_info {
bool writes_layer;
bool writes_viewport_index;
bool export_prim_id;
-   uint32_t export_mask;
unsigned pos_exports;
 };
 

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Mesa (master): ac: add ac_build_export_null() helper

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: bd9f7b763558f9cf1a39a732cb7e5a501b6f024a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd9f7b763558f9cf1a39a732cb7e5a501b6f024a

Author: Samuel Pitoiset 
Date:   Wed Feb  7 19:09:12 2018 +0100

ac: add ac_build_export_null() helper

Imported from RadeonSI.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Marek Olšák 

---

 src/amd/common/ac_llvm_build.c   | 17 +
 src/amd/common/ac_llvm_build.h   |  2 ++
 src/gallium/drivers/radeonsi/si_shader.c | 21 +
 3 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index a86ba962fa..e88456274f 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -1347,6 +1347,23 @@ void ac_build_export(struct ac_llvm_context *ctx, struct 
ac_export_args *a)
   AC_FUNC_ATTR_LEGACY);
 }
 
+void ac_build_export_null(struct ac_llvm_context *ctx)
+{
+   struct ac_export_args args;
+
+   args.enabled_channels = 0x0; /* enabled channels */
+   args.valid_mask = 1; /* whether the EXEC mask is valid */
+   args.done = 1; /* DONE bit */
+   args.target = V_008DFC_SQ_EXP_NULL;
+   args.compr = 0; /* COMPR flag (0 = 32-bit export) */
+   args.out[0] = LLVMGetUndef(ctx->f32); /* R */
+   args.out[1] = LLVMGetUndef(ctx->f32); /* G */
+   args.out[2] = LLVMGetUndef(ctx->f32); /* B */
+   args.out[3] = LLVMGetUndef(ctx->f32); /* A */
+
+   ac_build_export(ctx, );
+}
+
 LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
   struct ac_image_args *a)
 {
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 47c843fb4b..7e53115dc8 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -279,6 +279,8 @@ struct ac_export_args {
 
 void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a);
 
+void ac_build_export_null(struct ac_llvm_context *ctx);
+
 enum ac_image_opcode {
ac_image_sample,
ac_image_gather4,
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index f7413a2d6f..4ff00db55f 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -3725,25 +3725,6 @@ static void si_emit_ps_exports(struct si_shader_context 
*ctx,
ac_build_export(>ac, >args[i]);
 }
 
-static void si_export_null(struct lp_build_tgsi_context *bld_base)
-{
-   struct si_shader_context *ctx = si_shader_context(bld_base);
-   struct lp_build_context *base = _base->base;
-   struct ac_export_args args;
-
-   args.enabled_channels = 0x0; /* enabled channels */
-   args.valid_mask = 1; /* whether the EXEC mask is valid */
-   args.done = 1; /* DONE bit */
-   args.target = V_008DFC_SQ_EXP_NULL;
-   args.compr = 0; /* COMPR flag (0 = 32-bit export) */
-   args.out[0] = base->undef; /* R */
-   args.out[1] = base->undef; /* G */
-   args.out[2] = base->undef; /* B */
-   args.out[3] = base->undef; /* A */
-
-   ac_build_export(>ac, );
-}
-
 /**
  * Return PS outputs in this order:
  *
@@ -7735,7 +7716,7 @@ static void si_build_ps_epilog_function(struct 
si_shader_context *ctx,
if (depth || stencil || samplemask)
si_export_mrt_z(bld_base, depth, stencil, samplemask, );
else if (last_color_export == -1)
-   si_export_null(bld_base);
+   ac_build_export_null(>ac);
 
if (exp.num)
si_emit_ps_exports(ctx, );

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Mesa (master): ac/nir: use ac_build_export_null()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 26ab5a42695b579d255827c0219775fecbbd4d34
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=26ab5a42695b579d255827c0219775fecbbd4d34

Author: Samuel Pitoiset 
Date:   Wed Feb  7 19:09:13 2018 +0100

ac/nir: use ac_build_export_null()

The number of enabled channels should be 0 when exporting null.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/common/ac_nir_to_llvm.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 72105c21e4..ca9d318c8d 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -6484,8 +6484,7 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
if (depth || stencil || samplemask)
radv_export_mrt_z(ctx, depth, stencil, samplemask);
else if (!index) {
-   si_export_mrt_color(ctx, NULL, V_008DFC_SQ_EXP_NULL, true, 
_args[0]);
-   ac_build_export(>ac, _args[0]);
+   ac_build_export_null(>ac);
}
 }
 

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Mesa (master): ac/shader: scan info about output PS declarations

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 834d9845caf09dd76b7d225a067881696b0c4af3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=834d9845caf09dd76b7d225a067881696b0c4af3

Author: Samuel Pitoiset 
Date:   Thu Feb  8 14:56:46 2018 +0100

ac/shader: scan info about output PS declarations

NIR->LLVM should only be a translation pass, and all scan stuff
should be done before.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/common/ac_nir_to_llvm.c |  7 +++
 src/amd/common/ac_nir_to_llvm.h |  3 ---
 src/amd/common/ac_shader_info.c | 37 +
 src/amd/common/ac_shader_info.h |  3 +++
 src/amd/vulkan/radv_pipeline.c  | 18 +-
 5 files changed, 52 insertions(+), 16 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index f1f846caeb..766d96c5e0 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -6443,15 +6443,12 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
continue;
 
if (i == FRAG_RESULT_DEPTH) {
-   ctx->shader_info->fs.writes_z = true;
depth = ac_to_float(>ac, 
LLVMBuildLoad(ctx->builder,

ctx->nir->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
} else if (i == FRAG_RESULT_STENCIL) {
-   ctx->shader_info->fs.writes_stencil = true;
stencil = ac_to_float(>ac, 
LLVMBuildLoad(ctx->builder,
  
ctx->nir->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
} else if (i == FRAG_RESULT_SAMPLE_MASK) {
-   ctx->shader_info->fs.writes_sample_mask = true;
samplemask = ac_to_float(>ac, 
LLVMBuildLoad(ctx->builder,
  
ctx->nir->outputs[radeon_llvm_reg_index_soa(i, 0)], ""));
} else {
@@ -6460,7 +6457,9 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
values[j] = ac_to_float(>ac, 
LLVMBuildLoad(ctx->builder,

ctx->nir->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
 
-   if (!ctx->shader_info->fs.writes_z && 
!ctx->shader_info->fs.writes_stencil && 
!ctx->shader_info->fs.writes_sample_mask)
+   if (!ctx->shader_info->info.ps.writes_z &&
+   !ctx->shader_info->info.ps.writes_stencil &&
+   !ctx->shader_info->info.ps.writes_sample_mask)
last = ctx->output_mask <= ((1ull << (i + 1)) - 
1);
 
bool ret = si_export_mrt_color(ctx, values, 
V_008DFC_SQ_EXP_MRT + (i - FRAG_RESULT_DATA0), last, _args[index]);
diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 9332531ce3..8c925141a0 100644
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -179,9 +179,6 @@ struct ac_shader_variant_info {
uint32_t flat_shaded_mask;
bool has_pcoord;
bool can_discard;
-   bool writes_z;
-   bool writes_stencil;
-   bool writes_sample_mask;
bool early_fragment_test;
bool prim_id_input;
bool layer_input;
diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index e713263817..b211da60b3 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -192,6 +192,40 @@ gather_info_input_decl(const nir_shader *nir, const 
nir_variable *var,
}
 }
 
+static void
+gather_info_output_decl_ps(const nir_shader *nir, const nir_variable *var,
+  struct ac_shader_info *info)
+{
+   int idx = var->data.location;
+
+   switch (idx) {
+   case FRAG_RESULT_DEPTH:
+   info->ps.writes_z = true;
+   break;
+   case FRAG_RESULT_STENCIL:
+   info->ps.writes_stencil = true;
+   break;
+   case FRAG_RESULT_SAMPLE_MASK:
+   info->ps.writes_sample_mask = true;
+   break;
+   default:
+   break;
+   }
+}
+
+static void
+gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
+   struct ac_shader_info *info)
+{
+   switch (nir->info.stage) {
+   case MESA_SHADER_FRAGMENT:
+   gather_info_output_decl_ps(nir, var, info);
+   break;
+   default:
+   break;
+   }
+}
+
 void
 ac_nir_shader_info_pass(const struct nir_shader *nir,

Mesa (master): ac/nir: remove dead code in handle_vs_outputs_post()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 724136d5901e887d38079e28acf07f1348d123c5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=724136d5901e887d38079e28acf07f1348d123c5

Author: Samuel Pitoiset 
Date:   Thu Feb  8 14:56:43 2018 +0100

ac/nir: remove dead code in handle_vs_outputs_post()

The memcpy can't be reached because the condition is always false.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 

---

 src/amd/common/ac_nir_to_llvm.c | 9 +
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 62de7e3d01..9aa439a4ca 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -6027,14 +6027,7 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
continue;
 
si_llvm_init_export_args(ctx, values, target, );
-
-   if (target >= V_008DFC_SQ_EXP_POS &&
-   target <= (V_008DFC_SQ_EXP_POS + 3)) {
-   memcpy(_args[target - V_008DFC_SQ_EXP_POS],
-  , sizeof(args));
-   } else {
-   ac_build_export(>ac, );
-   }
+   ac_build_export(>ac, );
}
 
if (export_prim_id) {

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Mesa (master): meson: Add build option for tools

[Scott D Phillips]

Module: Mesa
Branch: master
Commit: 1f4d2433e73a0a6d4e2a180de407970d983309db
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f4d2433e73a0a6d4e2a180de407970d983309db

Author: Scott D Phillips 
Date:   Wed Feb  7 16:55:24 2018 -0800

meson: Add build option for tools

Add a build option to control building some of the misc tools we
have. Also set the executables to install, presumably you want
that if you're asking for the build.

v2: set 'install:' to the with_tools value, not true (Jordan)
handle 'all' in a the comma list (Dylan)
Add freedreno's tools (Dylan)

Reviewed-by: Eric Anholt 
Reviewed-by: Jordan Justen 
Reviewed-by: Eric Engestrom 
Reviewed-by: Dylan Baker 

---

 meson.build   | 4 
 meson_options.txt | 6 ++
 src/compiler/glsl/meson.build | 6 --
 src/compiler/meson.build  | 3 ++-
 src/gallium/drivers/freedreno/meson.build | 3 ++-
 src/gallium/drivers/nouveau/meson.build   | 3 ++-
 src/intel/tools/meson.build   | 6 --
 7 files changed, 24 insertions(+), 7 deletions(-)

diff --git a/meson.build b/meson.build
index b61c285bf0..b39e2f8ab9 100644
--- a/meson.build
+++ b/meson.build
@@ -48,6 +48,10 @@ with_libunwind = get_option('libunwind')
 with_asm = get_option('asm')
 with_osmesa = get_option('osmesa')
 with_swr_arches = get_option('swr-arches').split(',')
+with_tools = get_option('tools').split(',')
+if with_tools.contains('all')
+  with_tools = ['freedreno', 'glsl', 'intel', 'nir', 'nouveau']
+endif
 if get_option('texture-float')
   pre_args += '-DTEXTURE_FLOAT_ENABLED'
   message('WARNING: Floating-point texture enabled. Please consult 
docs/patents.txt and your lawyer before building mesa.')
diff --git a/meson_options.txt b/meson_options.txt
index fca06c4e61..7fafe2deaa 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -280,3 +280,9 @@ option(
   value : 'avx,avx2',
   description : 'Comma delemited swr architectures. choices : avx,avx2,knl,skx'
 )
+option(
+  'tools',
+  type : 'string',
+  value : '',
+  description : 'Comma delimited list of tools to build. choices : 
freedreno,glsl,intel,nir,nouveau or all'
+)
diff --git a/src/compiler/glsl/meson.build b/src/compiler/glsl/meson.build
index b0c0de810a..26ab4f1c8d 100644
--- a/src/compiler/glsl/meson.build
+++ b/src/compiler/glsl/meson.build
@@ -230,7 +230,8 @@ glsl_compiler = executable(
   dependencies : [dep_clock, dep_thread],
   include_directories : [inc_common],
   link_with : [libglsl_standalone],
-  build_by_default : false,
+  build_by_default : with_tools.contains('glsl'),
+  install : with_tools.contains('glsl'),
 )
 
 glsl_test = executable(
@@ -242,7 +243,8 @@ glsl_test = executable(
   include_directories : [inc_common],
   dependencies : [dep_clock, dep_thread],
   link_with : [libglsl, libglsl_standalone, libglsl_util],
-  build_by_default : false,
+  build_by_default : with_tools.contains('glsl'),
+  install : with_tools.contains('glsl'),
 )
 
 if with_tests
diff --git a/src/compiler/meson.build b/src/compiler/meson.build
index d86bdde61d..e955e66f81 100644
--- a/src/compiler/meson.build
+++ b/src/compiler/meson.build
@@ -62,7 +62,8 @@ spirv2nir = executable(
   include_directories : [inc_common, inc_nir, include_directories('spirv')],
   link_with : libmesa_util,
   c_args : [c_vis_args, c_msvc_compat_args, no_override_init_args],
-  build_by_default : false,
+  build_by_default : with_tools.contains('nir'),
+  install : with_tools.contains('nir'),
 )
 
 subdir('glsl')
diff --git a/src/gallium/drivers/freedreno/meson.build 
b/src/gallium/drivers/freedreno/meson.build
index ef70cc08c7..f334d2d8ef 100644
--- a/src/gallium/drivers/freedreno/meson.build
+++ b/src/gallium/drivers/freedreno/meson.build
@@ -249,5 +249,6 @@ ir3_compiler = executable(
 libglsl_standalone,
 libmesa_util,
   ],
-  build_by_default : true,
+  build_by_default : with_tools.contains('freedreno'),
+  install : with_tools.contains('freedreno'),
 )
diff --git a/src/gallium/drivers/nouveau/meson.build 
b/src/gallium/drivers/nouveau/meson.build
index 8ddd865799..e44be2616e 100644
--- a/src/gallium/drivers/nouveau/meson.build
+++ b/src/gallium/drivers/nouveau/meson.build
@@ -219,7 +219,8 @@ nouveau_compiler = executable(
   include_directories : [inc_src, inc_include, inc_gallium, inc_gallium_aux],
   dependencies : [dep_libdrm, dep_libdrm_nouveau],
   link_with : [libnouveau, libgallium, libmesa_util],
-  build_by_default : false,
+  build_by_default : with_tools.contains('nouveau'),
+  install : with_tools.contains('nouveau'),
 )
 
 driver_nouveau = declare_dependency(
diff --git a/src/intel/tools/meson.build b/src/intel/tools/meson.build
index 7890eeca1d..82413041b1 100644
--- a/src/intel/tools/meson.build
+++ b/src/intel/tools/meson.build
@@ -26,7 +26,8 @@ aubinator = executable(
   

Mesa (master): intel: Add Coffee Lake brand strings

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: 464d057c86ab36db81590aa940902ff7e29894da
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=464d057c86ab36db81590aa940902ff7e29894da

Author: Anuj Phogat 
Date:   Mon Jan 29 10:42:17 2018 -0800

intel: Add Coffee Lake brand strings

Signed-off-by: Anuj Phogat 
Reviewed-by: Jordan Justen 

---

 include/pci_ids/i965_pci_ids.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index e947b026bd..feb9c582b1 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -170,11 +170,11 @@ CHIPSET(0x3E93, cfl_gt1, "Intel(R) HD Graphics 
(Coffeelake 2x6 GT1)")
 CHIPSET(0x3E99, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
 CHIPSET(0x3EA1, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
 CHIPSET(0x3EA4, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
-CHIPSET(0x3E91, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
-CHIPSET(0x3E92, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E91, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E92, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
 CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
 CHIPSET(0x3E9A, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
-CHIPSET(0x3E9B, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E9B, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
 CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
 CHIPSET(0x3EA0, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
 CHIPSET(0x3EA3, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")

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Mesa (master): vbo: add a comment on vbo_draw_transform_feedback()

[Brian Paul]

Module: Mesa
Branch: master
Commit: b9ff185e41e2d310f70182fca06a9140a79e07ad
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9ff185e41e2d310f70182fca06a9140a79e07ad

Author: Brian Paul 
Date:   Wed Feb  7 16:12:35 2018 -0700

vbo: add a comment on vbo_draw_transform_feedback()

Reviewed-by: Mathias Fröhlich 
Reviewed-by: Roland Scheidegger 

---

 src/mesa/vbo/vbo_exec_array.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c
index 9ce0aa38dc..25abe09559 100644
--- a/src/mesa/vbo/vbo_exec_array.c
+++ b/src/mesa/vbo/vbo_exec_array.c
@@ -1416,6 +1416,14 @@ vbo_exec_MultiDrawElementsBaseVertex(GLenum mode,
 }
 
 
+/**
+ * Draw a GL primitive using a vertex count obtained from transform feedback.
+ * \param mode  the type of GL primitive to draw
+ * \param obj  the transform feedback object to use
+ * \param stream  index of the transform feedback stream from which to
+ *get the primitive count.
+ * \param numInstances  number of instances to draw
+ */
 static void
 vbo_draw_transform_feedback(struct gl_context *ctx, GLenum mode,
 struct gl_transform_feedback_object *obj,

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Mesa (master): gallium/util: trivial whitespace/formatting fixes in u_blit.c

[Brian Paul]

Module: Mesa
Branch: master
Commit: 93b3d381768b405e06f1327f03ee807696d9aab0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=93b3d381768b405e06f1327f03ee807696d9aab0

Author: Brian Paul 
Date:   Wed Feb  7 09:28:16 2018 -0700

gallium/util: trivial whitespace/formatting fixes in u_blit.c

Reviewed-by: Mathias Fröhlich 
Reviewed-by: Roland Scheidegger 

---

 src/gallium/auxiliary/util/u_blit.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_blit.c 
b/src/gallium/auxiliary/util/u_blit.c
index 4c85ef2a8c..d1571cd1f5 100644
--- a/src/gallium/auxiliary/util/u_blit.c
+++ b/src/gallium/auxiliary/util/u_blit.c
@@ -28,7 +28,7 @@
 /**
  * @file
  * Copy/blit pixel rect between surfaces
- *  
+ *
  * @author Brian Paul
  */
 
@@ -180,12 +180,12 @@ set_fragment_shader(struct blit_state *ctx,
   assert(stype == TGSI_RETURN_TYPE_FLOAT);
   idx = 3;
   if (!ctx->fs[pipe_tex][idx]) {
- enum tgsi_texture_type tgsi_tex = util_pipe_tex_to_tgsi_tex(pipe_tex, 
0);
+ enum tgsi_texture_type tgsi_tex =
+util_pipe_tex_to_tgsi_tex(pipe_tex, 0);
  ctx->fs[pipe_tex][idx] =
 util_make_fragment_tex_shader_xrbias(ctx->pipe, tgsi_tex);
   }
}
-
else if (!ctx->fs[pipe_tex][idx]) {
   enum tgsi_texture_type tgsi_tex = util_pipe_tex_to_tgsi_tex(pipe_tex, 0);
 
@@ -228,7 +228,7 @@ set_vertex_shader(struct blit_state *ctx)
  * Get offset of next free slot in vertex buffer for quad vertices.
  */
 static unsigned
-get_next_slot( struct blit_state *ctx )
+get_next_slot(struct blit_state *ctx)
 {
const unsigned max_slots = 4096 / sizeof ctx->vertices;
 
@@ -243,7 +243,7 @@ get_next_slot( struct blit_state *ctx )
  PIPE_USAGE_STREAM,
  max_slots * sizeof ctx->vertices);
}
-   
+
return ctx->vbuf_slot++ * sizeof ctx->vertices;
 }
 
@@ -298,14 +298,15 @@ setup_vertex_data_tex(struct blit_state *ctx,
if (src_target == PIPE_TEXTURE_CUBE ||
src_target == PIPE_TEXTURE_CUBE_ARRAY) {
   /* Map cubemap texture coordinates inplace. */
-  const unsigned stride = sizeof ctx->vertices[0] / sizeof 
ctx->vertices[0][0][0];
+  const unsigned stride =
+ sizeof ctx->vertices[0] / sizeof ctx->vertices[0][0][0];
   util_map_texcoords2d_onto_cubemap(src_face,
 >vertices[0][1][0], stride,
 >vertices[0][1][0], stride,
 TRUE);
}
 
-   offset = get_next_slot( ctx );
+   offset = get_next_slot(ctx);
 
if (ctx->vbuf) {
   pipe_buffer_write_nooverlap(ctx->pipe, ctx->vbuf,
@@ -536,8 +537,7 @@ util_blit_pixels_tex(struct blit_state *ctx,
t0 = (float) srcY0;
t1 = (float) srcY1;
 
-   if(normalized)
-   {
+   if (normalized) {
   /* normalize according to the mipmap level's size */
   int level = src_sampler_view->u.tex.first_level;
   float w = (float) u_minify(tex->width0, level);

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Mesa (master): gallium/util: s/uint/enum tgsi_semantic/ in simple shader code

[Brian Paul]

Module: Mesa
Branch: master
Commit: 26948ba761e04e74a5d15a3115117b9954a4fcbb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=26948ba761e04e74a5d15a3115117b9954a4fcbb

Author: Brian Paul 
Date:   Wed Feb  7 18:28:34 2018 -0700

gallium/util: s/uint/enum tgsi_semantic/ in simple shader code

Reviewed-by: Mathias Fröhlich 
Reviewed-by: Roland Scheidegger 

---

 src/gallium/auxiliary/util/u_simple_shaders.c | 4 ++--
 src/gallium/auxiliary/util/u_simple_shaders.h | 4 ++--
 src/gallium/auxiliary/util/u_tests.c  | 2 +-
 src/gallium/tests/trivial/quad-tex.c  | 4 ++--
 src/gallium/tests/trivial/tri.c   | 8 
 5 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_simple_shaders.c 
b/src/gallium/auxiliary/util/u_simple_shaders.c
index bd5a97f7bf..4046ab1202 100644
--- a/src/gallium/auxiliary/util/u_simple_shaders.c
+++ b/src/gallium/auxiliary/util/u_simple_shaders.c
@@ -59,7 +59,7 @@
 void *
 util_make_vertex_passthrough_shader(struct pipe_context *pipe,
 uint num_attribs,
-const uint *semantic_names,
+const enum tgsi_semantic *semantic_names,
 const uint *semantic_indexes,
 bool window_space)
 {
@@ -72,7 +72,7 @@ util_make_vertex_passthrough_shader(struct pipe_context *pipe,
 void *
 util_make_vertex_passthrough_shader_with_so(struct pipe_context *pipe,
 uint num_attribs,
-const uint *semantic_names,
+const enum tgsi_semantic *semantic_names,
 const uint *semantic_indexes,
 bool window_space, bool layered,
const struct pipe_stream_output_info *so)
diff --git a/src/gallium/auxiliary/util/u_simple_shaders.h 
b/src/gallium/auxiliary/util/u_simple_shaders.h
index cec556f05c..3afe4cc050 100644
--- a/src/gallium/auxiliary/util/u_simple_shaders.h
+++ b/src/gallium/auxiliary/util/u_simple_shaders.h
@@ -47,14 +47,14 @@ extern "C" {
 extern void *
 util_make_vertex_passthrough_shader(struct pipe_context *pipe,
 uint num_attribs,
-const uint *semantic_names,
+const enum tgsi_semantic *semantic_names,
 const uint *semantic_indexes,
 bool window_space);
 
 extern void *
 util_make_vertex_passthrough_shader_with_so(struct pipe_context *pipe,
 uint num_attribs,
-const uint *semantic_names,
+const enum tgsi_semantic *semantic_names,
 const uint *semantic_indexes,
 bool window_space, bool layered,
 const struct pipe_stream_output_info *so);
diff --git a/src/gallium/auxiliary/util/u_tests.c 
b/src/gallium/auxiliary/util/u_tests.c
index e8599e3203..86eee6e68b 100644
--- a/src/gallium/auxiliary/util/u_tests.c
+++ b/src/gallium/auxiliary/util/u_tests.c
@@ -147,7 +147,7 @@ util_set_passthrough_vertex_shader(struct cso_context *cso,
struct pipe_context *ctx,
bool window_space)
 {
-   static const uint vs_attribs[] = {
+   static const enum tgsi_semantic vs_attribs[] = {
   TGSI_SEMANTIC_POSITION,
   TGSI_SEMANTIC_GENERIC
};
diff --git a/src/gallium/tests/trivial/quad-tex.c 
b/src/gallium/tests/trivial/quad-tex.c
index 2ee544a412..df0e1301f5 100644
--- a/src/gallium/tests/trivial/quad-tex.c
+++ b/src/gallium/tests/trivial/quad-tex.c
@@ -263,8 +263,8 @@ static void init_prog(struct program *p)
 
/* vertex shader */
{
-   const uint semantic_names[] = { TGSI_SEMANTIC_POSITION,
-   TGSI_SEMANTIC_GENERIC };
+   const enum tgsi_semantic semantic_names[] =
+   { TGSI_SEMANTIC_POSITION, TGSI_SEMANTIC_GENERIC };
const uint semantic_indexes[] = { 0, 0 };
p->vs = util_make_vertex_passthrough_shader(p->pipe, 2, 
semantic_names, semantic_indexes, FALSE);
}
diff --git a/src/gallium/tests/trivial/tri.c b/src/gallium/tests/trivial/tri.c
index a2031696f0..71e9702275 100644
--- a/src/gallium/tests/trivial/tri.c
+++ b/src/gallium/tests/trivial/tri.c
@@ -208,10 +208,10 @@ static void init_prog(struct program *p)
 
/* vertex shader */
{
-   const uint semantic_names[] = { TGSI_SEMANTIC_POSITION,
-   TGSI_SEMANTIC_COLOR };
- 

Mesa (master): gallium/util: s/uint/enum tgsi_semantic/ in u_blitter.c

[Brian Paul]

Module: Mesa
Branch: master
Commit: c0dc337ecd7d785e8693cfcb772f49f856975bf0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c0dc337ecd7d785e8693cfcb772f49f856975bf0

Author: Brian Paul 
Date:   Wed Feb  7 16:14:11 2018 -0700

gallium/util: s/uint/enum tgsi_semantic/ in u_blitter.c

And put static qualifier on const arrays.

Reviewed-by: Mathias Fröhlich 
Reviewed-by: Roland Scheidegger 

---

 src/gallium/auxiliary/util/u_blitter.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_blitter.c 
b/src/gallium/auxiliary/util/u_blitter.c
index 057411fb3f..63d1307b83 100644
--- a/src/gallium/auxiliary/util/u_blitter.c
+++ b/src/gallium/auxiliary/util/u_blitter.c
@@ -333,7 +333,8 @@ static void bind_vs_pos_only(struct blitter_context_priv 
*ctx,
 
if (!ctx->vs_pos_only[index]) {
   struct pipe_stream_output_info so;
-  const uint semantic_names[] = { TGSI_SEMANTIC_POSITION };
+  static const enum tgsi_semantic semantic_names[] =
+ { TGSI_SEMANTIC_POSITION };
   const uint semantic_indices[] = { 0 };
 
   memset(, 0, sizeof(so));
@@ -356,8 +357,8 @@ static void *get_vs_passthrough_pos_generic(struct 
blitter_context *blitter)
struct pipe_context *pipe = ctx->base.pipe;
 
if (!ctx->vs) {
-  const uint semantic_names[] = { TGSI_SEMANTIC_POSITION,
-  TGSI_SEMANTIC_GENERIC };
+  static const enum tgsi_semantic semantic_names[] =
+ { TGSI_SEMANTIC_POSITION, TGSI_SEMANTIC_GENERIC };
   const uint semantic_indices[] = { 0, 0 };
   ctx->vs =
  util_make_vertex_passthrough_shader(pipe, 2, semantic_names,
@@ -372,7 +373,8 @@ static void *get_vs_passthrough_pos(struct blitter_context 
*blitter)
struct pipe_context *pipe = ctx->base.pipe;
 
if (!ctx->vs_nogeneric) {
-  const uint semantic_names[] = { TGSI_SEMANTIC_POSITION };
+  static const enum tgsi_semantic semantic_names[] =
+ { TGSI_SEMANTIC_POSITION };
   const uint semantic_indices[] = { 0 };
 
   ctx->vs_nogeneric =

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Mesa (master): tgsi: s/unsigned/enum pipe_shader_type/ in ureg code

[Brian Paul]

Module: Mesa
Branch: master
Commit: 0f40f4ffdae7b9cc5b9cb32a9373ab95ebee4383
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f40f4ffdae7b9cc5b9cb32a9373ab95ebee4383

Author: Brian Paul 
Date:   Wed Feb  7 18:18:39 2018 -0700

tgsi: s/unsigned/enum pipe_shader_type/ in ureg code

And add a default switch case to silence a compiler warning.

Reviewed-by: Mathias Fröhlich 
Reviewed-by: Roland Scheidegger 

---

 src/gallium/auxiliary/tgsi/tgsi_ureg.c | 9 ++---
 src/gallium/auxiliary/tgsi/tgsi_ureg.h | 5 +++--
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c 
b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index b3f8b1e14e..b2cc45da63 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -107,7 +107,7 @@ struct hw_atomic_decl {
 
 struct ureg_program
 {
-   unsigned processor;
+   enum pipe_shader_type processor;
bool supports_any_inout_decl_range;
int next_shader_processor;
 
@@ -2070,6 +2070,8 @@ const struct tgsi_token *ureg_finalize( struct 
ureg_program *ureg )
PIPE_SHADER_FRAGMENT :
ureg->next_shader_processor);
   break;
+   default:
+  ; /* nothing */
}
 
emit_header( ureg );
@@ -2163,14 +2165,15 @@ void ureg_free_tokens( const struct tgsi_token *tokens )
 
 
 struct ureg_program *
-ureg_create(unsigned processor)
+ureg_create(enum pipe_shader_type processor)
 {
return ureg_create_with_screen(processor, NULL);
 }
 
 
 struct ureg_program *
-ureg_create_with_screen(unsigned processor, struct pipe_screen *screen)
+ureg_create_with_screen(enum pipe_shader_type processor,
+struct pipe_screen *screen)
 {
int i;
struct ureg_program *ureg = CALLOC_STRUCT( ureg_program );
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.h 
b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
index 03496896aa..e8ebae9435 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
@@ -93,10 +93,11 @@ struct ureg_dst
 struct pipe_context;
 
 struct ureg_program *
-ureg_create(unsigned processor);
+ureg_create(enum pipe_shader_type processor);
 
 struct ureg_program *
-ureg_create_with_screen(unsigned processor, struct pipe_screen *screen);
+ureg_create_with_screen(enum pipe_shader_type processor,
+struct pipe_screen *screen);
 
 const struct tgsi_token *
 ureg_finalize( struct ureg_program * );

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Mesa (master): st/mesa: rename some vars related to indirect draw count

[Brian Paul]

Module: Mesa
Branch: master
Commit: 5cf342704d4a481845f2f7c921dda5df5cf5a256
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5cf342704d4a481845f2f7c921dda5df5cf5a256

Author: Brian Paul 
Date:   Wed Jan 31 15:01:09 2018 -0700

st/mesa: rename some vars related to indirect draw count

'indirect_params' was a bit vague.  Use the names that we use in
gallium's pipe_draw_indirect_info.

Reviewed-by: Mathias Fröhlich 
Reviewed-by: Roland Scheidegger 

---

 src/mesa/state_tracker/st_draw.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c
index 2fe7070bca..b95a2522b2 100644
--- a/src/mesa/state_tracker/st_draw.c
+++ b/src/mesa/state_tracker/st_draw.c
@@ -235,8 +235,8 @@ st_indirect_draw_vbo(struct gl_context *ctx,
  GLsizeiptr indirect_offset,
  unsigned draw_count,
  unsigned stride,
- struct gl_buffer_object *indirect_params,
- GLsizeiptr indirect_params_offset,
+ struct gl_buffer_object *indirect_draw_count,
+ GLsizeiptr indirect_draw_count_offset,
  const struct _mesa_index_buffer *ib)
 {
struct st_context *st = st_context(ctx);
@@ -283,7 +283,7 @@ st_indirect_draw_vbo(struct gl_context *ctx,
if (!st->has_multi_draw_indirect) {
   int i;
 
-  assert(!indirect_params);
+  assert(!indirect_draw_count);
   indirect.draw_count = 1;
   for (i = 0; i < draw_count; i++) {
  info.drawid = i;
@@ -293,9 +293,10 @@ st_indirect_draw_vbo(struct gl_context *ctx,
} else {
   indirect.draw_count = draw_count;
   indirect.stride = stride;
-  if (indirect_params) {
- indirect.indirect_draw_count = 
st_buffer_object(indirect_params)->buffer;
- indirect.indirect_draw_count_offset = indirect_params_offset;
+  if (indirect_draw_count) {
+ indirect.indirect_draw_count =
+st_buffer_object(indirect_draw_count)->buffer;
+ indirect.indirect_draw_count_offset = indirect_draw_count_offset;
   }
   cso_draw_vbo(st->cso_context, );
}

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Mesa (master): st/mesa: s/unsigned/enum tgsi_semantic/ st_cb_drawpixels.c

[Brian Paul]

Module: Mesa
Branch: master
Commit: e55de6e20cb8854be0af8afd50eea12f84ff9d49
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e55de6e20cb8854be0af8afd50eea12f84ff9d49

Author: Brian Paul 
Date:   Wed Feb  7 16:12:59 2018 -0700

st/mesa: s/unsigned/enum tgsi_semantic/ st_cb_drawpixels.c

Reviewed-by: Mathias Fröhlich 
Reviewed-by: Roland Scheidegger 

---

 src/mesa/state_tracker/st_cb_drawpixels.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c 
b/src/mesa/state_tracker/st_cb_drawpixels.c
index 44f5b235c8..ddf6926332 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/state_tracker/st_cb_drawpixels.c
@@ -196,7 +196,7 @@ static void *
 make_passthrough_vertex_shader(struct st_context *st, 
GLboolean passColor)
 {
-   const unsigned texcoord_semantic = st->needs_texcoord_semantic ?
+   const enum tgsi_semantic texcoord_semantic = st->needs_texcoord_semantic ?
   TGSI_SEMANTIC_TEXCOORD : TGSI_SEMANTIC_GENERIC;
 
if (!st->drawpix.vert_shaders[passColor]) {

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Mesa (master): tgsi: s/unsigned/enum tgsi_semantic/ in ureg_DECL_output()

[Brian Paul]

Module: Mesa
Branch: master
Commit: 4b0a45da25a5b49b927e6139528bbf74eec9a9ff
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b0a45da25a5b49b927e6139528bbf74eec9a9ff

Author: Brian Paul 
Date:   Thu Feb  8 09:54:52 2018 -0700

tgsi: s/unsigned/enum tgsi_semantic/ in ureg_DECL_output()

So the function matches the prototype.  Found with clang.
v2: fix copy error

Reviewed-by: Jose Fonseca 

---

 src/gallium/auxiliary/tgsi/tgsi_ureg.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c 
b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index 40a047a255..41281dabc4 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -486,7 +486,7 @@ ureg_DECL_output_masked(struct ureg_program *ureg,
 
 struct ureg_dst 
 ureg_DECL_output(struct ureg_program *ureg,
- unsigned name,
+ enum tgsi_semantic name,
  unsigned index)
 {
return ureg_DECL_output_masked(ureg, name, index, TGSI_WRITEMASK_XYZW,

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Mesa (master): gallium/util: silence clang warning in blitter code

[Brian Paul]

Module: Mesa
Branch: master
Commit: 11e92889aa0476ea39c5f0c46864d0960dc7354b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=11e92889aa0476ea39c5f0c46864d0960dc7354b

Author: Brian Paul 
Date:   Thu Feb  8 10:00:21 2018 -0700

gallium/util: silence clang warning in blitter code

Silence "warning: comparison of constant 4294967295 with expression
of type 'ubyte'".

Reviewed-by: Jose Fonseca 

---

 src/gallium/auxiliary/util/u_blitter.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/auxiliary/util/u_blitter.c 
b/src/gallium/auxiliary/util/u_blitter.c
index 63d1307b83..98c3ac5df3 100644
--- a/src/gallium/auxiliary/util/u_blitter.c
+++ b/src/gallium/auxiliary/util/u_blitter.c
@@ -659,7 +659,7 @@ void util_blitter_restore_fragment_states(struct 
blitter_context *blitter)
 
 static void blitter_check_saved_fb_state(MAYBE_UNUSED struct 
blitter_context_priv *ctx)
 {
-   assert(ctx->base.saved_fb_state.nr_cbufs != ~0u);
+   assert(ctx->base.saved_fb_state.nr_cbufs != (ubyte) ~0);
 }
 
 static void blitter_disable_render_cond(struct blitter_context_priv *ctx)

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Mesa (master): cso: add a couple sanity check assertions in cso_draw_vbo()

[Brian Paul]

Module: Mesa
Branch: master
Commit: b03ade55b9fbb48b87123b2bd34a6c24ceb2b5b1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b03ade55b9fbb48b87123b2bd34a6c24ceb2b5b1

Author: Brian Paul 
Date:   Tue Feb  6 15:33:37 2018 -0700

cso: add a couple sanity check assertions in cso_draw_vbo()

Reviewed-by: Roland Scheidegger 

---

 src/gallium/auxiliary/cso_cache/cso_context.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/src/gallium/auxiliary/cso_cache/cso_context.c 
b/src/gallium/auxiliary/cso_cache/cso_context.c
index dd9821e828..1b5d4b5598 100644
--- a/src/gallium/auxiliary/cso_cache/cso_context.c
+++ b/src/gallium/auxiliary/cso_cache/cso_context.c
@@ -1686,6 +1686,12 @@ cso_draw_vbo(struct cso_context *cso,
 {
struct u_vbuf *vbuf = cso->vbuf;
 
+   /* We can't have both indirect drawing and SO-vertex-count drawing */
+   assert(info->indirect == NULL || info->count_from_stream_output == NULL);
+
+   /* We can't have SO-vertex-count drawing with an index buffer */
+   assert(info->count_from_stream_output == NULL || info->index_size == 0);
+
if (vbuf) {
   u_vbuf_draw_vbo(vbuf, info);
} else {

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Mesa (master): vbo: improve comments on vbo_draw_func()

[Brian Paul]

Module: Mesa
Branch: master
Commit: 5396f8546a559d3439f1099b14a566b12354f9b7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5396f8546a559d3439f1099b14a566b12354f9b7

Author: Brian Paul 
Date:   Tue Feb  6 15:35:30 2018 -0700

vbo: improve comments on vbo_draw_func()

And rename a parameter name.

Reviewed-by: Mathias Fröhlich 
Reviewed-by: Roland Scheidegger 

---

 src/mesa/vbo/vbo.h | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/mesa/vbo/vbo.h b/src/mesa/vbo/vbo.h
index a04f9b849c..d594ba8f6a 100644
--- a/src/mesa/vbo/vbo.h
+++ b/src/mesa/vbo/vbo.h
@@ -149,9 +149,10 @@ vbo_save_EndCallList(struct gl_context *ctx);
  * \param index_bounds_valid  are min_index and max_index valid?
  * \param min_index  lowest vertex index used
  * \param max_index  highest vertex index used
- * \param tfb_vertcount  describes TFB output, or NULL
- * \param stream  If called via DrawTransformFeedback, specifies the vertex
- *stream buffer from which to get the vertex count
+ * \param tfb_vertcount  if non-null, indicates which transform feedback
+ *   object has the vertex count.
+ * \param tfb_stream  If called via DrawTransformFeedbackStream, specifies the
+ *vertex stream buffer from which to get the vertex count.
  * \param indirect  If any prims are indirect, this specifies the buffer
  *  to find the "DrawArrays/ElementsIndirectCommand" data.
  *  This may be deprecated in the future
@@ -164,7 +165,7 @@ typedef void (*vbo_draw_func)(struct gl_context *ctx,
   GLuint min_index,
   GLuint max_index,
   struct gl_transform_feedback_object 
*tfb_vertcount,
-  unsigned stream,
+  unsigned tfb_stream,
   struct gl_buffer_object *indirect);
 
 

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Mesa (master): tgsi: use TGSI_INTERPOLATE_x arguments instead of zeros in ureg code

[Brian Paul]

Module: Mesa
Branch: master
Commit: d95c2d86cc095d73759b4db1b2689013af66f622
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d95c2d86cc095d73759b4db1b2689013af66f622

Author: Brian Paul 
Date:   Wed Feb  7 18:29:12 2018 -0700

tgsi: use TGSI_INTERPOLATE_x arguments instead of zeros in ureg code

TGSI_INTERPOLATE_CONSTANT and TGSI_INTERPOLATE_LOC_CENTER have the
value zero so there's no change in behavior.  It seems funny to
declare these fs input registers with constant interpolation.  But
it looks like ureg_DECL_input_layout() is not called anywhere and
ureg_DECL_input() is only called from
util_make_geometry_passthrough_shader().

Reviewed-by: Mathias Fröhlich 
Reviewed-by: Roland Scheidegger 

---

 src/gallium/auxiliary/tgsi/tgsi_ureg.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c 
b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index b2cc45da63..40a047a255 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -371,7 +371,8 @@ ureg_DECL_input_layout(struct ureg_program *ureg,
 unsigned array_size)
 {
return ureg_DECL_fs_input_cyl_centroid_layout(ureg,
-   semantic_name, semantic_index, 0, 0, 0,
+   semantic_name, semantic_index,
+   TGSI_INTERPOLATE_CONSTANT, 0, TGSI_INTERPOLATE_LOC_CENTER,
index, usage_mask, array_id, array_size);
 }
 
@@ -384,7 +385,9 @@ ureg_DECL_input(struct ureg_program *ureg,
 unsigned array_size)
 {
return ureg_DECL_fs_input_cyl_centroid(ureg, semantic_name, semantic_index,
-  0, 0, 0, array_id, array_size);
+  TGSI_INTERPOLATE_CONSTANT, 0,
+  TGSI_INTERPOLATE_LOC_CENTER,
+  array_id, array_size);
 }
 
 

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Mesa (master): st/mesa: don't store non-fragment sampler states and views in st_context

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 08496c5d52ded21db7417a3f1b098250d2dd73e7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=08496c5d52ded21db7417a3f1b098250d2dd73e7

Author: Marek Olšák 
Date:   Thu Nov 16 00:32:22 2017 +0100

st/mesa: don't store non-fragment sampler states and views in st_context

those are unused.

st_context: 10120 -> 3704 bytes

Reviewed-by: Timothy Arceri 

---

 src/mesa/state_tracker/st_atom_sampler.c  | 35 +--
 src/mesa/state_tracker/st_atom_texture.c  | 56 +--
 src/mesa/state_tracker/st_cb_bitmap.c |  8 ++---
 src/mesa/state_tracker/st_cb_drawpixels.c |  8 ++---
 src/mesa/state_tracker/st_context.c   | 10 +++---
 src/mesa/state_tracker/st_context.h   |  6 ++--
 6 files changed, 61 insertions(+), 62 deletions(-)

diff --git a/src/mesa/state_tracker/st_atom_sampler.c 
b/src/mesa/state_tracker/st_atom_sampler.c
index 6d83f963f0..289856cd72 100644
--- a/src/mesa/state_tracker/st_atom_sampler.c
+++ b/src/mesa/state_tracker/st_atom_sampler.c
@@ -258,13 +258,18 @@ update_shader_samplers(struct st_context *st,
GLbitfield free_slots = ~prog->SamplersUsed;
GLbitfield external_samplers_used = prog->ExternalSamplersUsed;
unsigned unit, num_samplers;
+   struct pipe_sampler_state local_samplers[PIPE_MAX_SAMPLERS];
const struct pipe_sampler_state *states[PIPE_MAX_SAMPLERS];
 
if (samplers_used == 0x0) {
-  *out_num_samplers = 0;
+  if (out_num_samplers)
+ *out_num_samplers = 0;
   return;
}
 
+   if (!samplers)
+  samplers = local_samplers;
+
num_samplers = util_last_bit(samplers_used);
 
/* loop over sampler units (aka tex image units) */
@@ -320,7 +325,9 @@ update_shader_samplers(struct st_context *st,
}
 
cso_set_samplers(st->cso_context, shader_stage, num_samplers, states);
-   *out_num_samplers = num_samplers;
+
+   if (out_num_samplers)
+  *out_num_samplers = num_samplers;
 }
 
 
@@ -331,9 +338,7 @@ st_update_vertex_samplers(struct st_context *st)
 
update_shader_samplers(st,
   PIPE_SHADER_VERTEX,
-  ctx->VertexProgram._Current,
-  st->state.samplers[PIPE_SHADER_VERTEX],
-  >state.num_samplers[PIPE_SHADER_VERTEX]);
+  ctx->VertexProgram._Current, NULL, NULL);
 }
 
 
@@ -345,9 +350,7 @@ st_update_tessctrl_samplers(struct st_context *st)
if (ctx->TessCtrlProgram._Current) {
   update_shader_samplers(st,
  PIPE_SHADER_TESS_CTRL,
- ctx->TessCtrlProgram._Current,
- st->state.samplers[PIPE_SHADER_TESS_CTRL],
- >state.num_samplers[PIPE_SHADER_TESS_CTRL]);
+ ctx->TessCtrlProgram._Current, NULL, NULL);
}
 }
 
@@ -360,9 +363,7 @@ st_update_tesseval_samplers(struct st_context *st)
if (ctx->TessEvalProgram._Current) {
   update_shader_samplers(st,
  PIPE_SHADER_TESS_EVAL,
- ctx->TessEvalProgram._Current,
- st->state.samplers[PIPE_SHADER_TESS_EVAL],
- >state.num_samplers[PIPE_SHADER_TESS_EVAL]);
+ ctx->TessEvalProgram._Current, NULL, NULL);
}
 }
 
@@ -375,9 +376,7 @@ st_update_geometry_samplers(struct st_context *st)
if (ctx->GeometryProgram._Current) {
   update_shader_samplers(st,
  PIPE_SHADER_GEOMETRY,
- ctx->GeometryProgram._Current,
- st->state.samplers[PIPE_SHADER_GEOMETRY],
- >state.num_samplers[PIPE_SHADER_GEOMETRY]);
+ ctx->GeometryProgram._Current, NULL, NULL);
}
 }
 
@@ -390,8 +389,8 @@ st_update_fragment_samplers(struct st_context *st)
update_shader_samplers(st,
   PIPE_SHADER_FRAGMENT,
   ctx->FragmentProgram._Current,
-  st->state.samplers[PIPE_SHADER_FRAGMENT],
-  >state.num_samplers[PIPE_SHADER_FRAGMENT]);
+  st->state.frag_samplers,
+  >state.num_frag_samplers);
 }
 
 
@@ -403,8 +402,6 @@ st_update_compute_samplers(struct st_context *st)
if (ctx->ComputeProgram._Current) {
   update_shader_samplers(st,
  PIPE_SHADER_COMPUTE,
- ctx->ComputeProgram._Current,
- st->state.samplers[PIPE_SHADER_COMPUTE],
- >state.num_samplers[PIPE_SHADER_COMPUTE]);
+ ctx->ComputeProgram._Current, NULL, NULL);
}
 }
diff --git a/src/mesa/state_tracker/st_atom_texture.c 
b/src/mesa/state_tracker/st_atom_texture.c
index 6c26b7751b..105fa79de0 100644
--- 

Mesa (master): st/mesa: remove out_num_textures from update_textures

[Marek Olšák]

Module: Mesa
Branch: master
Commit: d9e6e0bbe35a1978bc5c36f44235146cd9c6be24
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d9e6e0bbe35a1978bc5c36f44235146cd9c6be24

Author: Marek Olšák 
Date:   Thu Nov 16 16:01:11 2017 +0100

st/mesa: remove out_num_textures from update_textures

Reviewed-by: Timothy Arceri 

---

 src/mesa/state_tracker/st_atom_texture.c | 32 
 1 file changed, 12 insertions(+), 20 deletions(-)

diff --git a/src/mesa/state_tracker/st_atom_texture.c 
b/src/mesa/state_tracker/st_atom_texture.c
index 105fa79de0..ce7755f0c5 100644
--- a/src/mesa/state_tracker/st_atom_texture.c
+++ b/src/mesa/state_tracker/st_atom_texture.c
@@ -101,10 +101,9 @@ static void
 update_textures(struct st_context *st,
 enum pipe_shader_type shader_stage,
 const struct gl_program *prog,
-struct pipe_sampler_view **sampler_views,
-unsigned *out_num_textures)
+struct pipe_sampler_view **sampler_views)
 {
-   const GLuint old_max = *out_num_textures;
+   const GLuint old_max = st->state.num_sampler_views[shader_stage];
GLbitfield samplers_used = prog->SamplersUsed;
GLbitfield texel_fetch_samplers = prog->info.textures_used_by_txf;
GLbitfield free_slots = ~prog->SamplersUsed;
@@ -213,21 +212,20 @@ update_textures(struct st_context *st,
  shader_stage,
  num_textures,
  sampler_views);
-   *out_num_textures = num_textures;
+   st->state.num_sampler_views[shader_stage] = num_textures;
 }
 
 /* Same as update_textures, but don't store the views in st_context. */
 static void
 update_textures_local(struct st_context *st,
   enum pipe_shader_type shader_stage,
-  const struct gl_program *prog,
-  unsigned *out_num_textures)
+  const struct gl_program *prog)
 {
struct pipe_sampler_view *local_views[PIPE_MAX_SAMPLERS] = {0};
 
-   update_textures(st, shader_stage, prog, local_views, out_num_textures);
+   update_textures(st, shader_stage, prog, local_views);
 
-   unsigned num = *out_num_textures;
+   unsigned num = st->state.num_sampler_views[shader_stage];
for (unsigned i = 0; i < num; i++)
   pipe_sampler_view_reference(_views[i], NULL);
 }
@@ -239,8 +237,7 @@ st_update_vertex_textures(struct st_context *st)
 
if (ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits > 0) {
   update_textures_local(st, PIPE_SHADER_VERTEX,
-ctx->VertexProgram._Current,
->state.num_sampler_views[PIPE_SHADER_VERTEX]);
+ctx->VertexProgram._Current);
}
 }
 
@@ -253,8 +250,7 @@ st_update_fragment_textures(struct st_context *st)
update_textures(st,
PIPE_SHADER_FRAGMENT,
ctx->FragmentProgram._Current,
-   st->state.frag_sampler_views,
-   >state.num_sampler_views[PIPE_SHADER_FRAGMENT]);
+   st->state.frag_sampler_views);
 }
 
 
@@ -265,8 +261,7 @@ st_update_geometry_textures(struct st_context *st)
 
if (ctx->GeometryProgram._Current) {
   update_textures_local(st, PIPE_SHADER_GEOMETRY,
-ctx->GeometryProgram._Current,
-
>state.num_sampler_views[PIPE_SHADER_GEOMETRY]);
+ctx->GeometryProgram._Current);
}
 }
 
@@ -278,8 +273,7 @@ st_update_tessctrl_textures(struct st_context *st)
 
if (ctx->TessCtrlProgram._Current) {
   update_textures_local(st, PIPE_SHADER_TESS_CTRL,
-ctx->TessCtrlProgram._Current,
-
>state.num_sampler_views[PIPE_SHADER_TESS_CTRL]);
+ctx->TessCtrlProgram._Current);
}
 }
 
@@ -291,8 +285,7 @@ st_update_tesseval_textures(struct st_context *st)
 
if (ctx->TessEvalProgram._Current) {
   update_textures_local(st, PIPE_SHADER_TESS_EVAL,
-ctx->TessEvalProgram._Current,
-
>state.num_sampler_views[PIPE_SHADER_TESS_EVAL]);
+ctx->TessEvalProgram._Current);
}
 }
 
@@ -304,7 +297,6 @@ st_update_compute_textures(struct st_context *st)
 
if (ctx->ComputeProgram._Current) {
   update_textures_local(st, PIPE_SHADER_COMPUTE,
-ctx->ComputeProgram._Current,
->state.num_sampler_views[PIPE_SHADER_COMPUTE]);
+ctx->ComputeProgram._Current);
}
 }

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Mesa (master): i965: perf: use drmIoctl() instead of ioctl()

[Lionel Landwerlin]

Module: Mesa
Branch: master
Commit: bd6c0cab606fa0a3b821e50542ba06ff714292bf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd6c0cab606fa0a3b821e50542ba06ff714292bf

Author: Lionel Landwerlin 
Date:   Tue Feb  6 23:23:22 2018 +

i965: perf: use drmIoctl() instead of ioctl()

ioctl() might be interrupted, use drmIoctl() instead as it'll retry
automatically.

Fixes: 27ee83eaf7e "i965: perf: add support for userspace configurations"
Cc: "18.0" 
Signed-off-by: Lionel Landwerlin 
Reviewed-by: Tapani Pälli 
Tested-by: Mark Janes 

---

 src/mesa/drivers/dri/i965/brw_performance_query.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c 
b/src/mesa/drivers/dri/i965/brw_performance_query.c
index 5b8f30db2f..f4ff858bd5 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_query.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_query.c
@@ -1842,7 +1842,7 @@ kernel_has_dynamic_config_support(struct brw_context *brw,
  config.n_mux_regs = 1;
  config.mux_regs_ptr = (uintptr_t) mux_regs;
 
- if (ioctl(screen->fd, DRM_IOCTL_I915_PERF_REMOVE_CONFIG, _id) 
< 0 &&
+ if (drmIoctl(screen->fd, DRM_IOCTL_I915_PERF_REMOVE_CONFIG, 
_id) < 0 &&
  errno == ENOENT)
 return true;
 
@@ -1889,7 +1889,7 @@ init_oa_configs(struct brw_context *brw, const char 
*sysfs_dev_dir)
   config.n_flex_regs = query->n_flex_regs;
   config.flex_regs_ptr = (uintptr_t) query->flex_regs;
 
-  ret = ioctl(screen->fd, DRM_IOCTL_I915_PERF_ADD_CONFIG, );
+  ret = drmIoctl(screen->fd, DRM_IOCTL_I915_PERF_ADD_CONFIG, );
   if (ret < 0) {
  DBG("Failed to load \"%s\" (%s) metrics set in kernel: %s\n",
  query->name, query->guid, strerror(errno));

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Mesa (master): i965: perf: cleanup detection of kernel support for loadable configs

[Lionel Landwerlin]

Module: Mesa
Branch: master
Commit: e8436677339d65449bdabefd3ed8bb5a65f13d46
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8436677339d65449bdabefd3ed8bb5a65f13d46

Author: Lionel Landwerlin 
Date:   Tue Feb  6 23:28:24 2018 +

i965: perf: cleanup detection of kernel support for loadable configs

The initial revision of the patch adding loadable configs was testing
the feature's availability by adding a new config successfully and
then removing it.

A second version tested the availability just by exercising the
removal. But some unused code remained.

Signed-off-by: Lionel Landwerlin 
Reviewed-by: Tapani Pälli 

---

 src/mesa/drivers/dri/i965/brw_performance_query.c | 17 ++---
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c 
b/src/mesa/drivers/dri/i965/brw_performance_query.c
index f4ff858bd5..c0bb4442be 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_query.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_query.c
@@ -1832,21 +1832,8 @@ kernel_has_dynamic_config_support(struct brw_context 
*brw,
 
   /* Look for the test config, which we know we can't replace. */
   if (read_file_uint64(config_path, _id) && config_id == 1) {
- uint32_t mux_regs[] = { 0x9888 /* NOA_WRITE */, 0x0 };
- struct drm_i915_perf_oa_config config;
-
- memset(, 0, sizeof(config));
-
- memcpy(config.uuid, query->guid, sizeof(config.uuid));
-
- config.n_mux_regs = 1;
- config.mux_regs_ptr = (uintptr_t) mux_regs;
-
- if (drmIoctl(screen->fd, DRM_IOCTL_I915_PERF_REMOVE_CONFIG, 
_id) < 0 &&
- errno == ENOENT)
-return true;
-
- break;
+ return drmIoctl(screen->fd, DRM_IOCTL_I915_PERF_REMOVE_CONFIG,
+ _id) < 0 && errno == ENOENT;
   }
}
 

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