Mesa (master): Bump version after 18.1
Module: Mesa Branch: master Commit: f8c4716854ca76c49e5b83fdbe36993deba37908 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8c4716854ca76c49e5b83fdbe36993deba37908 Author: Dylan Baker Date: Fri Apr 20 20:31:26 2018 -0700 Bump version after 18.1 Signed-off-by: Dylan Baker --- VERSION | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/VERSION b/VERSION index 1670340a51..9a33c149fc 100644 --- a/VERSION +++ b/VERSION @@ -1 +1 @@ -18.1.0-devel +18.2.0-devel ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): radv: mark const structs as extern in header file to avoid lto damage
Module: Mesa
Branch: master
Commit: a8420e253038fd4ef063af4ee370038075ee7aeb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8420e253038fd4ef063af4ee370038075ee7aeb
Author: Dave Airlie
Date: Fri Apr 13 12:40:55 2018 +1000
radv: mark const structs as extern in header file to avoid lto damage
The copr repo from che was using LTO and he reported radv broke
recently with it. When testing with lto builds here I noticed
that we weren't seeing any instance extensions reported.
It appears LTO was treating the const without extern as an empty
struct, this is possibly a gcc bug, but we can work around it
just by marking these with extern.
Acked-by: Samuel Pitoiset
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_extensions.py | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/amd/vulkan/radv_extensions.py
b/src/amd/vulkan/radv_extensions.py
index dbe0ff4ac5..ec34551696 100644
--- a/src/amd/vulkan/radv_extensions.py
+++ b/src/amd/vulkan/radv_extensions.py
@@ -195,9 +195,9 @@ struct radv_device_extension_table {
};
};
-const VkExtensionProperties
radv_instance_extensions[RADV_INSTANCE_EXTENSION_COUNT];
-const VkExtensionProperties
radv_device_extensions[RADV_DEVICE_EXTENSION_COUNT];
-const struct radv_instance_extension_table radv_supported_instance_extensions;
+extern const VkExtensionProperties
radv_instance_extensions[RADV_INSTANCE_EXTENSION_COUNT];
+extern const VkExtensionProperties
radv_device_extensions[RADV_DEVICE_EXTENSION_COUNT];
+extern const struct radv_instance_extension_table
radv_supported_instance_extensions;
struct radv_physical_device;
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Mesa (master): virgl: disable virgl when no 3D for virtio gpu.
Module: Mesa
Branch: master
Commit: 6c5abb68c79d4acf71112b5ba4924a5af2d1e5c9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c5abb68c79d4acf71112b5ba4924a5af2d1e5c9
Author: Lepton Wu
Date: Thu Apr 5 12:38:48 2018 -0700
virgl: disable virgl when no 3D for virtio gpu.
If users are running mesa under old version of qemu or have turned off
GL at runtime, virtio gpu driver actually doesn't work. Adds a detection
here so mesa can fall back to software rendering.
v2:
- move detection from loader to virgl (Ilia, Emil)
Signed-off-by: Lepton Wu
Reviewed-by: Dave Airlie
---
src/gallium/winsys/virgl/drm/virgl_drm_winsys.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c
b/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c
index cf3c3bac4b..4198ed7feb 100644
--- a/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c
+++ b/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c
@@ -800,8 +800,15 @@ virgl_drm_winsys_create(int drmFD)
{
struct virgl_drm_winsys *qdws;
int ret;
+ int gl = 0;
struct drm_virtgpu_getparam getparam = {0};
+ getparam.param = VIRTGPU_PARAM_3D_FEATURES;
+ getparam.value = (uint64_t)(uintptr_t)≷
+ ret = drmIoctl(drmFD, DRM_IOCTL_VIRTGPU_GETPARAM, &getparam);
+ if (ret < 0 || !gl)
+ return NULL;
+
qdws = CALLOC_STRUCT(virgl_drm_winsys);
if (!qdws)
return NULL;
@@ -914,6 +921,10 @@ virgl_drm_screen_create(int fd)
int dup_fd = fcntl(fd, F_DUPFD_CLOEXEC, 3);
vws = virgl_drm_winsys_create(dup_fd);
+ if (!vws) {
+ close(dup_fd);
+ goto unlock;
+ }
pscreen = virgl_create_screen(vws);
if (pscreen) {
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Mesa (master): nv50/ir: make a copy of tex src if it's referenced multiple times
Module: Mesa
Branch: master
Commit: 5428066f5e1ef5ea6ae04c84019f270023cfc6aa
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5428066f5e1ef5ea6ae04c84019f270023cfc6aa
Author: Ilia Mirkin
Date: Mon Apr 9 22:19:35 2018 -0400
nv50/ir: make a copy of tex src if it's referenced multiple times
For nv50 we coalesce the srcs and defs into a single node. As such, we
can end up with impossible constraints if the source is referenced
after the tex operation (which, due to the coalescing of values, will
have overwritten it).
This logic already exists for inserting moves for MERGE/UNION sources.
It's the exact same idea here, so leverage that code, which also
includes a few optimizations around not extending live ranges
unnecessarily.
Fixes tests/spec/glsl-1.30/execution/fs-textureSize-components.shader_test
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 86 --
1 file changed, 49 insertions(+), 37 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
index 3953475c0a..28e0e260ce 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -257,6 +257,7 @@ private:
private:
virtual bool visit(BasicBlock *);
+ void insertConstraintMove(Instruction *, int s);
bool insertConstraintMoves();
void condenseDefs(Instruction *);
@@ -2235,6 +2236,8 @@
RegAlloc::InsertConstraintsPass::texConstraintNV50(TexInstruction *tex)
for (c = 0; tex->srcExists(c) || tex->defExists(c); ++c) {
if (!tex->srcExists(c))
tex->setSrc(c, new_LValue(func, tex->getSrc(0)->asLValue()));
+ else
+ insertConstraintMove(tex, c);
if (!tex->defExists(c))
tex->setDef(c, new_LValue(func, tex->getDef(0)->asLValue()));
}
@@ -2307,6 +2310,51 @@ RegAlloc::InsertConstraintsPass::visit(BasicBlock *bb)
return true;
}
+void
+RegAlloc::InsertConstraintsPass::insertConstraintMove(Instruction *cst, int s)
+{
+ const uint8_t size = cst->src(s).getSize();
+
+ assert(cst->getSrc(s)->defs.size() == 1); // still SSA
+
+ Instruction *defi = cst->getSrc(s)->defs.front()->getInsn();
+ bool imm = defi->op == OP_MOV &&
+ defi->src(0).getFile() == FILE_IMMEDIATE;
+ bool load = defi->op == OP_LOAD &&
+ defi->src(0).getFile() == FILE_MEMORY_CONST &&
+ !defi->src(0).isIndirect(0);
+ // catch some cases where don't really need MOVs
+ if (cst->getSrc(s)->refCount() == 1 && !defi->constrainedDefs()) {
+ if (imm || load) {
+ // Move the defi right before the cst. No point in expanding
+ // the range.
+ defi->bb->remove(defi);
+ cst->bb->insertBefore(cst, defi);
+ }
+ return;
+ }
+
+ LValue *lval = new_LValue(func, cst->src(s).getFile());
+ lval->reg.size = size;
+
+ Instruction *mov = new_Instruction(func, OP_MOV, typeOfSize(size));
+ mov->setDef(0, lval);
+ mov->setSrc(0, cst->getSrc(s));
+
+ if (load) {
+ mov->op = OP_LOAD;
+ mov->setSrc(0, defi->getSrc(0));
+ } else if (imm) {
+ mov->setSrc(0, defi->getSrc(0));
+ }
+
+ if (defi->getPredicate())
+ mov->setPredicate(defi->cc, defi->getPredicate());
+
+ cst->setSrc(s, mov->getDef(0));
+ cst->bb->insertBefore(cst, mov);
+}
+
// Insert extra moves so that, if multiple register constraints on a value are
// in conflict, these conflicts can be resolved.
bool
@@ -2347,46 +2395,10 @@ RegAlloc::InsertConstraintsPass::insertConstraintMoves()
cst->bb->insertBefore(cst, mov);
continue;
}
-assert(cst->getSrc(s)->defs.size() == 1); // still SSA
-
-Instruction *defi = cst->getSrc(s)->defs.front()->getInsn();
-bool imm = defi->op == OP_MOV &&
- defi->src(0).getFile() == FILE_IMMEDIATE;
-bool load = defi->op == OP_LOAD &&
- defi->src(0).getFile() == FILE_MEMORY_CONST &&
- !defi->src(0).isIndirect(0);
-// catch some cases where don't really need MOVs
-if (cst->getSrc(s)->refCount() == 1 && !defi->constrainedDefs()) {
- if (imm || load) {
- // Move the defi right before the cst. No point in expanding
- // the range.
- defi->bb->remove(defi);
- cst->bb->insertBefore(cst, defi);
- }
- continue;
-}
-LValue *lval = new_LValue(func, cst->src(s).getFile());
-lval->reg.size = size;
-
-mov = new_Instruction(func, OP_MOV, typeOfSize(size));
-mov->setDef(0, lval);
-mov->setSrc(0, cst->getSrc(s));
-
-if (load) {
- mov->op = OP_LOAD;
- mov->setSrc(0, defi->getSrc(0));
-} else if (imm) {
- mov->setSrc(0, defi->getSrc(0));
-
