Mesa (master): Intel: Add a Kaby Lake PCI ID

2018-04-25 Thread Rafael Antognolli
Module: Mesa
Branch: master
Commit: 3ba5a646e58078f8d62d1d5f435a4939b98c8166
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ba5a646e58078f8d62d1d5f435a4939b98c8166

Author: Matt Atwood 
Date:   Wed Apr 25 09:23:04 2018 -0700

Intel: Add a Kaby Lake PCI ID

v2: Branding changed

Signed-off-by: Matt Atwood 
Reviewed-by: Rafael Antognolli 

---

 include/pci_ids/i965_pci_ids.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index c740a50bca..82e4a549e0 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -156,6 +156,7 @@ CHIPSET(0x5912, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby 
Lake GT2)")
 CHIPSET(0x5916, kbl_gt2, "Intel(R) HD Graphics 620 (Kaby Lake GT2)")
 CHIPSET(0x591A, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
 CHIPSET(0x591B, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
+CHIPSET(0x591C, kbl_gt2, "Intel(R) Kaby Lake GT2")
 CHIPSET(0x591D, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
 CHIPSET(0x591E, kbl_gt2, "Intel(R) HD Graphics 615 (Kaby Lake GT2)")
 CHIPSET(0x5921, kbl_gt2, "Intel(R) Kabylake GT2F")

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Mesa (master): gallium/util: Fix incorrect refcounting of separate stencil.

2018-04-25 Thread Eric Anholt
Module: Mesa
Branch: master
Commit: 069c409f434ab215940aad2092d5d236b410a7b9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=069c409f434ab215940aad2092d5d236b410a7b9

Author: Eric Anholt 
Date:   Wed Apr 25 09:47:40 2018 -0700

gallium/util: Fix incorrect refcounting of separate stencil.

The driver may have a reference on the separate stencil buffer for some
reason (like an unflushed job using it), so we can't directly free the
resource and should instead just decrement the refcount that we own.
Fixes double-free in KHR-GLES3.packed_depth_stencil.blit.depth32f_stencil8
on vc5.

Fixes: e94eb5e6000e ("gallium/util: add u_transfer_helper")
Reviewed-by: Rob Clark 

---

 src/gallium/auxiliary/util/u_transfer_helper.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_transfer_helper.c 
b/src/gallium/auxiliary/util/u_transfer_helper.c
index dd31049920..3b085fd99f 100644
--- a/src/gallium/auxiliary/util/u_transfer_helper.c
+++ b/src/gallium/auxiliary/util/u_transfer_helper.c
@@ -138,8 +138,7 @@ u_transfer_helper_resource_destroy(struct pipe_screen 
*pscreen,
if (helper->vtbl->get_stencil) {
   struct pipe_resource *stencil = helper->vtbl->get_stencil(prsc);
 
-  if (stencil)
- helper->vtbl->resource_destroy(pscreen, stencil);
+  pipe_resource_reference(&stencil, NULL);
}
 
helper->vtbl->resource_destroy(pscreen, prsc);

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Mesa (master): broadcom/vc5: Fix tile load/store of MSAA surfaces on 4.x.

2018-04-25 Thread Eric Anholt
Module: Mesa
Branch: master
Commit: 5710532e9e5b44e40c5ed65b2dcffe66f6803d01
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5710532e9e5b44e40c5ed65b2dcffe66f6803d01

Author: Eric Anholt 
Date:   Tue Apr 24 13:22:41 2018 -0700

broadcom/vc5: Fix tile load/store of MSAA surfaces on 4.x.

For single-sample we have to always program SAMPLE_0, but for multisample
we want to store all the samples.

---

 src/broadcom/cle/v3d_packet_v41.xml |  4 ++--
 src/broadcom/cle/v3d_packet_v42.xml |  4 ++--
 src/gallium/drivers/vc5/vc5_rcl.c   | 12 +++-
 3 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/src/broadcom/cle/v3d_packet_v41.xml 
b/src/broadcom/cle/v3d_packet_v41.xml
index 32934d71cd..5f6d643195 100644
--- a/src/broadcom/cle/v3d_packet_v41.xml
+++ b/src/broadcom/cle/v3d_packet_v41.xml
@@ -277,7 +277,7 @@
 
 
 
-
+
 
 
 
@@ -311,7 +311,7 @@
 
 
 
-
+
 
 
 
diff --git a/src/broadcom/cle/v3d_packet_v42.xml 
b/src/broadcom/cle/v3d_packet_v42.xml
index db128b5451..f180e5eec5 100644
--- a/src/broadcom/cle/v3d_packet_v42.xml
+++ b/src/broadcom/cle/v3d_packet_v42.xml
@@ -278,7 +278,7 @@
 
 
 
-
+
 
 
 
@@ -312,7 +312,7 @@
 
 
 
-
+
 
 
 
diff --git a/src/gallium/drivers/vc5/vc5_rcl.c 
b/src/gallium/drivers/vc5/vc5_rcl.c
index 2b1309bc1a..3289227513 100644
--- a/src/gallium/drivers/vc5/vc5_rcl.c
+++ b/src/gallium/drivers/vc5/vc5_rcl.c
@@ -85,7 +85,11 @@ load_general(struct vc5_cl *cl, struct pipe_surface *psurf, 
int buffer,
 load.height_in_ub_or_stride = slice->stride;
 }
 
-/* XXX: MSAA */
+if (psurf->texture->nr_samples > 1)
+load.decimate_mode = V3D_DECIMATE_MODE_ALL_SAMPLES;
+else
+load.decimate_mode = V3D_DECIMATE_MODE_SAMPLE_0;
+
 #else /* V3D_VERSION < 40 */
 /* Can't do raw ZSTENCIL loads -- need to load/store them to
  * separate buffers for Z and stencil.
@@ -147,6 +151,12 @@ store_general(struct vc5_job *job,
 &rsc->slices[psurf->u.tex.level];
 store.height_in_ub_or_stride = slice->stride;
 }
+
+if (psurf->texture->nr_samples > 1)
+store.decimate_mode = V3D_DECIMATE_MODE_ALL_SAMPLES;
+else
+store.decimate_mode = V3D_DECIMATE_MODE_SAMPLE_0;
+
 #else /* V3D_VERSION < 40 */
 /* Can't do raw ZSTENCIL stores -- need to load/store them to
  * separate buffers for Z and stencil.

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Mesa (master): broadcom/vc5: Remove leftover vc4 MSAA lowering setup in the FS key.

2018-04-25 Thread Eric Anholt
Module: Mesa
Branch: master
Commit: 503716fa8623f2f59a909adac0bd629c71661119
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=503716fa8623f2f59a909adac0bd629c71661119

Author: Eric Anholt 
Date:   Tue Apr 24 15:23:27 2018 -0700

broadcom/vc5: Remove leftover vc4 MSAA lowering setup in the FS key.

---

 src/broadcom/compiler/v3d_compiler.h  | 17 +
 src/gallium/drivers/vc5/vc5_program.c |  5 +
 2 files changed, 6 insertions(+), 16 deletions(-)

diff --git a/src/broadcom/compiler/v3d_compiler.h 
b/src/broadcom/compiler/v3d_compiler.h
index 207e29733a..e89ea7be21 100644
--- a/src/broadcom/compiler/v3d_compiler.h
+++ b/src/broadcom/compiler/v3d_compiler.h
@@ -302,18 +302,11 @@ struct v3d_key {
 uint8_t swizzle[4];
 uint8_t return_size;
 uint8_t return_channels;
-union {
-struct {
-unsigned compare_mode:1;
-unsigned compare_func:3;
-bool clamp_s:1;
-bool clamp_t:1;
-bool clamp_r:1;
-};
-struct {
-uint16_t msaa_width, msaa_height;
-};
-};
+unsigned compare_mode:1;
+unsigned compare_func:3;
+bool clamp_s:1;
+bool clamp_t:1;
+bool clamp_r:1;
 } tex[V3D_MAX_TEXTURE_SAMPLERS];
 uint8_t ucp_enables;
 };
diff --git a/src/gallium/drivers/vc5/vc5_program.c 
b/src/gallium/drivers/vc5/vc5_program.c
index 7bad80a168..6beb3359f2 100644
--- a/src/gallium/drivers/vc5/vc5_program.c
+++ b/src/gallium/drivers/vc5/vc5_program.c
@@ -363,10 +363,7 @@ vc5_setup_shared_key(struct vc5_context *vc5, struct 
v3d_key *key,
 key->tex[i].swizzle[3] = PIPE_SWIZZLE_W;
 }
 
-if (sampler->texture->nr_samples > 1) {
-key->tex[i].msaa_width = sampler->texture->width0;
-key->tex[i].msaa_height = sampler->texture->height0;
-} else if (sampler){
+if (sampler) {
 key->tex[i].compare_mode = sampler_state->compare_mode;
 key->tex[i].compare_func = sampler_state->compare_func;
 key->tex[i].clamp_s =

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Mesa (master): broadcom/vc5: Fix cpp of MSAA surfaces on 4.x.

2018-04-25 Thread Eric Anholt
Module: Mesa
Branch: master
Commit: 9f3f4284c0397615bfe50ba4e50aaffe5dc64e84
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f3f4284c0397615bfe50ba4e50aaffe5dc64e84

Author: Eric Anholt 
Date:   Tue Apr 24 14:56:23 2018 -0700

broadcom/vc5: Fix cpp of MSAA surfaces on 4.x.

The internal-type-bpp path is for surfaces that get stored in the raw TLB
format.  For 4.x, we're storing MSAA as just 2x width/height at the
original format.

---

 src/gallium/drivers/vc5/vc5_resource.c | 6 --
 src/gallium/drivers/vc5/vc5_state.c| 2 +-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/vc5/vc5_resource.c 
b/src/gallium/drivers/vc5/vc5_resource.c
index eb5fa4e908..3c2ed27077 100644
--- a/src/gallium/drivers/vc5/vc5_resource.c
+++ b/src/gallium/drivers/vc5/vc5_resource.c
@@ -566,9 +566,11 @@ vc5_resource_setup(struct pipe_screen *pscreen,
 prsc->screen = pscreen;
 
 if (prsc->nr_samples <= 1 ||
+screen->devinfo.ver >= 40 ||
 util_format_is_depth_or_stencil(prsc->format)) {
-rsc->cpp = util_format_get_blocksize(prsc->format) *
-MAX2(prsc->nr_samples, 1);
+rsc->cpp = util_format_get_blocksize(prsc->format);
+if (screen->devinfo.ver < 40 && prsc->nr_samples > 1)
+rsc->cpp *= prsc->nr_samples;
 } else {
 assert(vc5_rt_format_supported(&screen->devinfo, 
prsc->format));
 uint32_t output_image_format =
diff --git a/src/gallium/drivers/vc5/vc5_state.c 
b/src/gallium/drivers/vc5/vc5_state.c
index 350bd6a4ed..42ae64157c 100644
--- a/src/gallium/drivers/vc5/vc5_state.c
+++ b/src/gallium/drivers/vc5/vc5_state.c
@@ -752,7 +752,7 @@ vc5_create_sampler_view(struct pipe_context *pctx, struct 
pipe_resource *prsc,
 #endif
 tex.array_stride_64_byte_aligned = rsc->cube_map_stride / 64;
 
-if (prsc->nr_samples > 1) {
+if (prsc->nr_samples > 1 && V3D_VERSION < 40) {
 /* Using texture views to reinterpret formats on our
  * MSAA textures won't work, because we don't lay out
  * the bits in memory as it's expected -- for example,

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Mesa (master): broadcom/vc5: Fix reloads of separate stencil buffers.

2018-04-25 Thread Eric Anholt
Module: Mesa
Branch: master
Commit: 0d4ce00d700631cce26c62b865b4013ef45572e7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d4ce00d700631cce26c62b865b4013ef45572e7

Author: Eric Anholt 
Date:   Tue Apr 24 17:50:50 2018 -0700

broadcom/vc5: Fix reloads of separate stencil buffers.

Like for stores, we need to emit a separate load_general packet.

---

 src/gallium/drivers/vc5/vc5_rcl.c | 20 
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/vc5/vc5_rcl.c 
b/src/gallium/drivers/vc5/vc5_rcl.c
index 3289227513..7f804aa27a 100644
--- a/src/gallium/drivers/vc5/vc5_rcl.c
+++ b/src/gallium/drivers/vc5/vc5_rcl.c
@@ -226,10 +226,22 @@ vc5_rcl_emit_loads(struct vc5_job *job, struct vc5_cl *cl)
 if ((loads_pending & PIPE_CLEAR_DEPTHSTENCIL) &&
 (V3D_VERSION >= 40 ||
  (job->zsbuf && job->zsbuf->texture->nr_samples > 1))) {
-load_general(cl, job->zsbuf,
- zs_buffer_from_pipe_bits(loads_pending),
- PIPE_CLEAR_DEPTHSTENCIL,
- &loads_pending);
+struct vc5_resource *rsc = vc5_resource(job->zsbuf->texture);
+
+if (rsc->separate_stencil &&
+(loads_pending & PIPE_CLEAR_STENCIL)) {
+load_general(cl, job->zsbuf,
+ STENCIL,
+ PIPE_CLEAR_STENCIL,
+ &loads_pending);
+}
+
+if (loads_pending & PIPE_CLEAR_DEPTHSTENCIL) {
+load_general(cl, job->zsbuf,
+ zs_buffer_from_pipe_bits(loads_pending),
+ loads_pending & PIPE_CLEAR_DEPTHSTENCIL,
+ &loads_pending);
+}
 }
 
 #if V3D_VERSION < 40

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Mesa (master): broadcom/vc5: Implement stencil blits using RGBA.

2018-04-25 Thread Eric Anholt
Module: Mesa
Branch: master
Commit: ac207acb97cdfa203c686806ba3a41269e1bf35d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac207acb97cdfa203c686806ba3a41269e1bf35d

Author: Eric Anholt 
Date:   Tue Apr 24 11:11:40 2018 -0700

broadcom/vc5: Implement stencil blits using RGBA.

Fixes piglit fbo-depthstencil blit default_fb

---

 src/gallium/drivers/vc5/vc5_blit.c  | 76 +
 src/gallium/drivers/vc5/vc5_state.c |  9 -
 2 files changed, 83 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/vc5/vc5_blit.c 
b/src/gallium/drivers/vc5/vc5_blit.c
index 64811416e5..66f530723f 100644
--- a/src/gallium/drivers/vc5/vc5_blit.c
+++ b/src/gallium/drivers/vc5/vc5_blit.c
@@ -209,6 +209,77 @@ vc5_render_blit(struct pipe_context *ctx, struct 
pipe_blit_info *info)
 return true;
 }
 
+/* Implement stencil blits by reinterpreting the stencil data as an RGBA
+ * or R8 texture.
+ */
+static void
+vc5_stencil_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
+{
+struct vc5_context *vc5 = vc5_context(ctx);
+struct vc5_resource *src = vc5_resource(info->src.resource);
+struct vc5_resource *dst = vc5_resource(info->dst.resource);
+enum pipe_format src_format, dst_format;
+
+if (src->separate_stencil) {
+src = src->separate_stencil;
+src_format = PIPE_FORMAT_R8_UNORM;
+} else {
+src_format = PIPE_FORMAT_RGBA_UNORM;
+}
+
+if (dst->separate_stencil) {
+dst = dst->separate_stencil;
+dst_format = PIPE_FORMAT_R8_UNORM;
+} else {
+dst_format = PIPE_FORMAT_RGBA_UNORM;
+}
+
+/* Initialize the surface. */
+struct pipe_surface dst_tmpl = {
+.u.tex = {
+.level = info->dst.level,
+.first_layer = info->dst.box.z,
+.last_layer = info->dst.box.z,
+},
+.format = dst_format,
+};
+struct pipe_surface *dst_surf =
+ctx->create_surface(ctx, &dst->base, &dst_tmpl);
+
+/* Initialize the sampler view. */
+struct pipe_sampler_view src_tmpl = {
+.target = src->base.target,
+.format = src_format,
+.u.tex = {
+.first_level = info->src.level,
+.last_level = info->src.level,
+.first_layer = 0,
+.last_layer = (PIPE_TEXTURE_3D ?
+   u_minify(src->base.depth0,
+info->src.level) - 1 :
+   src->base.array_size - 1),
+},
+.swizzle_r = PIPE_SWIZZLE_X,
+.swizzle_g = PIPE_SWIZZLE_Y,
+.swizzle_b = PIPE_SWIZZLE_Z,
+.swizzle_a = PIPE_SWIZZLE_W,
+};
+struct pipe_sampler_view *src_view =
+ctx->create_sampler_view(ctx, &src->base, &src_tmpl);
+
+vc5_blitter_save(vc5);
+util_blitter_blit_generic(vc5->blitter, dst_surf, &info->dst.box,
+  src_view, &info->src.box,
+  src->base.width0, src->base.height0,
+  PIPE_MASK_R,
+  PIPE_TEX_FILTER_NEAREST,
+  info->scissor_enable ? &info->scissor : NULL,
+  info->alpha_blend);
+
+pipe_surface_reference(&dst_surf, NULL);
+pipe_sampler_view_reference(&src_view, NULL);
+}
+
 /* Optimal hardware path for blitting pixels.
  * Scaling, format conversion, up- and downsampling (resolve) are allowed.
  */
@@ -217,6 +288,11 @@ vc5_blit(struct pipe_context *pctx, const struct 
pipe_blit_info *blit_info)
 {
 struct pipe_blit_info info = *blit_info;
 
+if (info.mask & PIPE_MASK_S) {
+vc5_stencil_blit(pctx, blit_info);
+info.mask &= ~PIPE_MASK_S;
+}
+
 #if 0
 if (vc5_tile_blit(pctx, blit_info))
 return;
diff --git a/src/gallium/drivers/vc5/vc5_state.c 
b/src/gallium/drivers/vc5/vc5_state.c
index ba2d748ba9..350bd6a4ed 100644
--- a/src/gallium/drivers/vc5/vc5_state.c
+++ b/src/gallium/drivers/vc5/vc5_state.c
@@ -760,9 +760,14 @@ vc5_create_sampler_view(struct pipe_context *pctx, struct 
pipe_resource *prsc,
  * ARB_texture_view spec, but in HW we lay them out as
  * 32bpp RGBA8 and 64bpp RGBA16F.  Just assert for now
  * to catch failures.
+ *
+ * We explicitly allow remapping S8Z24 to RGBA for
+ * vc5_blit.c's stencil blits.
  */
-assert(util_fo

Mesa (master): travis: update libva required version

2018-04-25 Thread Juan Antonio Suárez Romero
Module: Mesa
Branch: master
Commit: 413c5ca3727898fdb4fa1d2849d0c2defdd77b48
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=413c5ca3727898fdb4fa1d2849d0c2defdd77b48

Author: Juan A. Suarez Romero 
Date:   Fri Apr 20 14:34:14 2018 +

travis: update libva required version

Commit fa328456e8f29 added VP9 config support, but this needs a newer
libva version, 1.7.0 or above.

Fixes: fa328456e8f ("st/va: add VP9 config to enable profile2")
CC: 18.1 
Reviewed-by: Emil Velikov 

---

 .travis.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.travis.yml b/.travis.yml
index 45c5b80cba..e0d6a827a6 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -21,7 +21,7 @@ env:
 - LIBXCB_VERSION=libxcb-1.13
 - LIBXSHMFENCE_VERSION=libxshmfence-1.2
 - LIBVDPAU_VERSION=libvdpau-1.1
-- LIBVA_VERSION=libva-1.6.2
+- LIBVA_VERSION=libva-1.7.0
 - LIBWAYLAND_VERSION=wayland-1.11.1
 - WAYLAND_PROTOCOLS_VERSION=wayland-protocols-1.8
 - PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig:$HOME/prefix/share/pkgconfig

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Mesa (master): mesa: GL_EXT_texture_norm16 extension plumbing

2018-04-25 Thread Tapani Pälli
Module: Mesa
Branch: master
Commit: 7f467d4f73828ba782a2db38c74d33b85646dc85
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f467d4f73828ba782a2db38c74d33b85646dc85

Author: Tapani Pälli 
Date:   Fri Apr  6 10:57:57 2018 +0300

mesa: GL_EXT_texture_norm16 extension plumbing

Patch enables use of short and unsigned short data for texture uploads,
rendering and reading of framebuffers within the restrictions specified
in GL_EXT_texture_norm16 spec.

Patch also enables those 16bit format layout qualifiers listed in
GL_NV_image_formats that depend on EXT_texture_norm16.

v2: expose extension with dummy_true
fix layout qualifier map changes (Ilia Mirkin)

v3: use _mesa_has_EXT_texture_norm16, other fixes
and cleanup (Ilia Mirkin)

v4: fix rest of the issues found

Signed-off-by: Tapani Pälli 
Acked-by: Ilia Mirkin 
Reviewed-by: Kenneth Graunke 

---

 src/compiler/glsl/glsl_parser.yy | 12 
 src/mesa/main/extensions_table.h |  1 +
 src/mesa/main/genmipmap.c|  2 +-
 src/mesa/main/glformats.c| 60 +++-
 src/mesa/main/glformats.h|  3 +-
 src/mesa/main/readpix.c  | 14 --
 src/mesa/main/shaderimage.c  |  7 ++---
 7 files changed, 84 insertions(+), 15 deletions(-)

diff --git a/src/compiler/glsl/glsl_parser.yy b/src/compiler/glsl/glsl_parser.yy
index e5ea41d4df..b4951a258a 100644
--- a/src/compiler/glsl/glsl_parser.yy
+++ b/src/compiler/glsl/glsl_parser.yy
@@ -1340,18 +1340,18 @@ layout_qualifier_id:
{ "r32i", GL_R32I, GLSL_TYPE_INT, 130, 310, false },
{ "r16i", GL_R16I, GLSL_TYPE_INT, 130, 0, true },
{ "r8i", GL_R8I, GLSL_TYPE_INT, 130, 0, true },
-   { "rgba16", GL_RGBA16, GLSL_TYPE_FLOAT, 130, 0, false },
+   { "rgba16", GL_RGBA16, GLSL_TYPE_FLOAT, 130, 0, true },
{ "rgb10_a2", GL_RGB10_A2, GLSL_TYPE_FLOAT, 130, 0, true },
{ "rgba8", GL_RGBA8, GLSL_TYPE_FLOAT, 130, 310, false },
-   { "rg16", GL_RG16, GLSL_TYPE_FLOAT, 130, 0, false },
+   { "rg16", GL_RG16, GLSL_TYPE_FLOAT, 130, 0, true },
{ "rg8", GL_RG8, GLSL_TYPE_FLOAT, 130, 0, true },
-   { "r16", GL_R16, GLSL_TYPE_FLOAT, 130, 0, false },
+   { "r16", GL_R16, GLSL_TYPE_FLOAT, 130, 0, true },
{ "r8", GL_R8, GLSL_TYPE_FLOAT, 130, 0, true },
-   { "rgba16_snorm", GL_RGBA16_SNORM, GLSL_TYPE_FLOAT, 130, 0, 
false },
+   { "rgba16_snorm", GL_RGBA16_SNORM, GLSL_TYPE_FLOAT, 130, 0, 
true },
{ "rgba8_snorm", GL_RGBA8_SNORM, GLSL_TYPE_FLOAT, 130, 310, 
false },
-   { "rg16_snorm", GL_RG16_SNORM, GLSL_TYPE_FLOAT, 130, 0, false },
+   { "rg16_snorm", GL_RG16_SNORM, GLSL_TYPE_FLOAT, 130, 0, true },
{ "rg8_snorm", GL_RG8_SNORM, GLSL_TYPE_FLOAT, 130, 0, true },
-   { "r16_snorm", GL_R16_SNORM, GLSL_TYPE_FLOAT, 130, 0, false },
+   { "r16_snorm", GL_R16_SNORM, GLSL_TYPE_FLOAT, 130, 0, true },
{ "r8_snorm", GL_R8_SNORM, GLSL_TYPE_FLOAT, 130, 0, true }
 };
 
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index 492f7c3d20..aec17750d5 100644
--- a/src/mesa/main/extensions_table.h
+++ b/src/mesa/main/extensions_table.h
@@ -283,6 +283,7 @@ EXT(EXT_texture_format_BGRA , dummy_true
 EXT(EXT_texture_integer , EXT_texture_integer  
  , GLL, GLC,  x ,  x , 2006)
 EXT(EXT_texture_lod_bias, dummy_true   
  , GLL,  x , ES1,  x , 1999)
 EXT(EXT_texture_mirror_clamp, EXT_texture_mirror_clamp 
  , GLL, GLC,  x ,  x , 2004)
+EXT(EXT_texture_norm16  , dummy_true   
  ,  x ,  x ,  x ,  31, 2014)
 EXT(EXT_texture_object  , dummy_true   
  , GLL,  x ,  x ,  x , 1995)
 EXT(EXT_texture_rectangle   , NV_texture_rectangle 
  , GLL,  x ,  x ,  x , 2004)
 EXT(EXT_texture_rg  , ARB_texture_rg   
  ,  x ,  x ,  x , ES2, 2011)
diff --git a/src/mesa/main/genmipmap.c b/src/mesa/main/genmipmap.c
index 488c32f810..fd20ea2806 100644
--- a/src/mesa/main/genmipmap.c
+++ b/src/mesa/main/genmipmap.c
@@ -93,7 +93,7 @@ _mesa_is_valid_generate_texture_mipmap_internalformat(struct 
gl_context *ctx,
  internalformat == GL_LUMINANCE_ALPHA ||
  internalformat == GL_LUMINANCE || internalformat == GL_ALPHA ||
  internalformat == GL_BGRA_EXT ||
- (_mesa_is_es3_color_renderable(internalformat) &&
+ (_mesa_is_es3_color_renderable(ctx, internalformat) &&
   _mesa_is_es3_texture_filterable(ctx, internalformat));
}
 
diff --git a/src/mesa/main/glformats.c b/src/mesa/main/glformats.c
index 1e797c24c2..cba5e670db 100644
--- a/sr