Mesa (master): st/nine: Bind src not dst in nine_context_box_upload
Module: Mesa Branch: master Commit: 42d672fa6a766363e5703f119607f7c7975918aa URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=42d672fa6a766363e5703f119607f7c7975918aa Author: Axel Davy Date: Mon Dec 3 21:15:47 2018 +0100 st/nine: Bind src not dst in nine_context_box_upload nine_context_box_upload uploads a ram buffer (from src) to a pipe_resource (dst). We already have a refcount on the pipe_resource, what needs to be protected from release is the ram buffer, thus a reference to src. Signed-off-by: Axel Davy Tested-by: Dieter Nützel Cc: mesa-sta...@lists.freedesktop.org --- src/gallium/state_trackers/nine/nine_state.c | 6 +++--- src/gallium/state_trackers/nine/nine_state.h | 2 +- src/gallium/state_trackers/nine/surface9.c | 2 +- src/gallium/state_trackers/nine/volume9.c| 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/gallium/state_trackers/nine/nine_state.c b/src/gallium/state_trackers/nine/nine_state.c index 273be88e2b..4872e24f43 100644 --- a/src/gallium/state_trackers/nine/nine_state.c +++ b/src/gallium/state_trackers/nine/nine_state.c @@ -2434,7 +2434,7 @@ CSMT_ITEM_NO_WAIT_WITH_COUNTER(nine_context_range_upload, } CSMT_ITEM_NO_WAIT_WITH_COUNTER(nine_context_box_upload, - ARG_BIND_REF(struct NineUnknown, dst), + ARG_BIND_REF(struct NineUnknown, src_ref), ARG_BIND_RES(struct pipe_resource, res), ARG_VAL(unsigned, level), ARG_COPY_REF(struct pipe_box, dst_box), @@ -2449,8 +2449,8 @@ CSMT_ITEM_NO_WAIT_WITH_COUNTER(nine_context_box_upload, struct pipe_transfer *transfer = NULL; uint8_t *map; -/* We just bind dst for the bind count */ -(void)dst; +/* Binding src_ref avoids release before upload */ +(void)src_ref; map = pipe->transfer_map(pipe, res, diff --git a/src/gallium/state_trackers/nine/nine_state.h b/src/gallium/state_trackers/nine/nine_state.h index 51e5e32652..8de9f84a25 100644 --- a/src/gallium/state_trackers/nine/nine_state.h +++ b/src/gallium/state_trackers/nine/nine_state.h @@ -568,7 +568,7 @@ nine_context_range_upload(struct NineDevice9 *device, void nine_context_box_upload(struct NineDevice9 *device, unsigned *counter, -struct NineUnknown *dst, +struct NineUnknown *src_ref, struct pipe_resource *res, unsigned level, const struct pipe_box *dst_box, diff --git a/src/gallium/state_trackers/nine/surface9.c b/src/gallium/state_trackers/nine/surface9.c index 5fd662fa04..10518219a0 100644 --- a/src/gallium/state_trackers/nine/surface9.c +++ b/src/gallium/state_trackers/nine/surface9.c @@ -660,7 +660,7 @@ NineSurface9_CopyMemToDefault( struct NineSurface9 *This, nine_context_box_upload(This->base.base.device, >pending_uploads_counter, -(struct NineUnknown *)This, +(struct NineUnknown *)From, r_dst, This->level, _box, diff --git a/src/gallium/state_trackers/nine/volume9.c b/src/gallium/state_trackers/nine/volume9.c index ec811aeba1..840f01dae1 100644 --- a/src/gallium/state_trackers/nine/volume9.c +++ b/src/gallium/state_trackers/nine/volume9.c @@ -449,7 +449,7 @@ NineVolume9_CopyMemToDefault( struct NineVolume9 *This, nine_context_box_upload(This->base.device, >pending_uploads_counter, -(struct NineUnknown *)This, +(struct NineUnknown *)From, r_dst, This->level, _box, ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): st/nine: Fix volumetexture dtor on ctor failure
Module: Mesa
Branch: master
Commit: f91f748fabd7fec8f571124df23296c07102a983
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f91f748fabd7fec8f571124df23296c07102a983
Author: Axel Davy
Date: Sun Nov 25 14:37:53 2018 +0100
st/nine: Fix volumetexture dtor on ctor failure
The dtor is called on allocation failure,
thus we must check the volumes are allocated
before trying to release them.
Signed-off-by: Axel Davy
Tested-by: Dieter Nützel
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/state_trackers/nine/volumetexture9.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/state_trackers/nine/volumetexture9.c
b/src/gallium/state_trackers/nine/volumetexture9.c
index 5dec484486..c7191bce68 100644
--- a/src/gallium/state_trackers/nine/volumetexture9.c
+++ b/src/gallium/state_trackers/nine/volumetexture9.c
@@ -141,7 +141,8 @@ NineVolumeTexture9_dtor( struct NineVolumeTexture9 *This )
if (This->volumes) {
for (l = 0; l <= This->base.base.info.last_level; ++l)
-NineUnknown_Destroy(>volumes[l]->base);
+if (This->volumes[l])
+NineUnknown_Destroy(>volumes[l]->base);
FREE(This->volumes);
}
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Mesa (master): st/nine: Use helper to release swapchain buffers later
Module: Mesa
Branch: master
Commit: c442dd789066104e5e84cc90d98a7ff5cd6296cf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c442dd789066104e5e84cc90d98a7ff5cd6296cf
Author: Axel Davy
Date: Wed Nov 21 22:03:07 2018 +0100
st/nine: Use helper to release swapchain buffers later
This patch introduces a structure to release the
present_handles only when they are fully released
by the server, thus making
"DestroyD3DWindowBuffer" actually release the buffer
right away when called.
Signed-off-by: Axel Davy
Tested-by: Dieter Nützel
---
src/gallium/state_trackers/nine/swapchain9.c | 49 +++-
src/gallium/state_trackers/nine/swapchain9.h | 1 +
2 files changed, 42 insertions(+), 8 deletions(-)
diff --git a/src/gallium/state_trackers/nine/swapchain9.c
b/src/gallium/state_trackers/nine/swapchain9.c
index d330c85572..138e8816a0 100644
--- a/src/gallium/state_trackers/nine/swapchain9.c
+++ b/src/gallium/state_trackers/nine/swapchain9.c
@@ -128,6 +128,40 @@ D3DWindowBuffer_create(struct NineSwapChain9 *This,
return ret;
}
+static void
+D3DWindowBuffer_release(struct NineSwapChain9 *This,
+D3DWindowBuffer *present_handle)
+{
+int i;
+/* Add it to the 'pending release' list */
+for (i = 0; i < D3DPRESENT_BACK_BUFFERS_MAX_EX + 1; i++) {
+if (!This->present_handles_pending_release[i]) {
+This->present_handles_pending_release[i] = present_handle;
+break;
+}
+}
+if (i == (D3DPRESENT_BACK_BUFFERS_MAX_EX + 1)) {
+ERR("Server not releasing buffers...\n");
+assert(false);
+}
+
+/* Destroy elements of the list released by the server */
+for (i = 0; i < D3DPRESENT_BACK_BUFFERS_MAX_EX + 1; i++) {
+if (This->present_handles_pending_release[i] &&
+ID3DPresent_IsBufferReleased(This->present,
This->present_handles_pending_release[i])) {
+/* WaitBufferReleased also waits the presentation feedback
+ * (which should arrive at about the same time),
+ * while IsBufferReleased doesn't. DestroyD3DWindowBuffer
unfortunately
+ * checks it to release immediately all data, else the release
+ * is postponed for This->present release. To avoid leaks (we may
handle
+ * a lot of resize), call WaitBufferReleased. */
+ID3DPresent_WaitBufferReleased(This->present,
This->present_handles_pending_release[i]);
+ID3DPresent_DestroyD3DWindowBuffer(This->present,
This->present_handles_pending_release[i]);
+This->present_handles_pending_release[i] = NULL;
+}
+}
+}
+
static int
NineSwapChain9_GetBackBufferCountForParams( struct NineSwapChain9 *This,
D3DPRESENT_PARAMETERS *pParams );
@@ -291,7 +325,7 @@ NineSwapChain9_Resize( struct NineSwapChain9 *This,
This->enable_threadpool = FALSE;
for (i = 0; i < oldBufferCount; i++) {
-ID3DPresent_DestroyD3DWindowBuffer(This->present,
This->present_handles[i]);
+D3DWindowBuffer_release(This, This->present_handles[i]);
This->present_handles[i] = NULL;
if (This->present_buffers[i])
pipe_resource_reference(&(This->present_buffers[i]), NULL);
@@ -519,6 +553,11 @@ NineSwapChain9_dtor( struct NineSwapChain9 *This )
FREE(This->pending_presentation[i]);
}
+for (i = 0; i < D3DPRESENT_BACK_BUFFERS_MAX_EX + 1; i++) {
+if (This->present_handles_pending_release[i])
+ID3DPresent_DestroyD3DWindowBuffer(This->present,
This->present_handles_pending_release[i]);
+}
+
for (i = 0; i < This->num_back_buffers; i++) {
if (This->buffers[i])
NineUnknown_Detach(NineUnknown(This->buffers[i]));
@@ -738,13 +777,7 @@ present( struct NineSwapChain9 *This,
create_present_buffer(This, target_width, target_height,
_resource, _handle);
/* Switch to the new buffer */
if (new_handle) {
-/* WaitBufferReleased also waits the presentation feedback,
- * while IsBufferReleased doesn't. DestroyD3DWindowBuffer
unfortunately
- * checks it to release immediately all data, else the release
- * is postponed for This->present release. To avoid leaks (we
may handle
- * a lot of resize), call WaitBufferReleased. */
-ID3DPresent_WaitBufferReleased(This->present,
This->present_handles[0]);
-ID3DPresent_DestroyD3DWindowBuffer(This->present,
This->present_handles[0]);
+D3DWindowBuffer_release(This, This->present_handles[0]);
This->present_handles[0] = new_handle;
pipe_resource_reference(>present_buffers[0],
new_resource);
pipe_resource_reference(_resource, NULL);
diff --git a/src/gallium/state_trackers/nine/swapchain9.h
b/src/gallium/state_trackers/nine/swapchain9.h
Mesa (master): st/nine: Increase the limit of cached ff shaders
Module: Mesa
Branch: master
Commit: c6b37e5412f1bdc0bf71a22e3917313278441e2b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6b37e5412f1bdc0bf71a22e3917313278441e2b
Author: Axel Davy
Date: Sat Dec 8 20:42:23 2018 +0100
st/nine: Increase the limit of cached ff shaders
100 is too small for some games, which triggers recompilations
every frame. Increase to 1024.
Signed-off-by: Axel Davy
Tested-by: Dieter Nützel
---
src/gallium/state_trackers/nine/nine_ff.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/state_trackers/nine/nine_ff.c
b/src/gallium/state_trackers/nine/nine_ff.c
index 261be276ad..cb77d6915b 100644
--- a/src/gallium/state_trackers/nine/nine_ff.c
+++ b/src/gallium/state_trackers/nine/nine_ff.c
@@ -2138,7 +2138,7 @@ nine_ff_prune_vs(struct NineDevice9 *device)
{
struct nine_context *context = >context;
-if (device->ff.num_vs > 100) {
+if (device->ff.num_vs > 1024) {
/* could destroy the bound one here, so unbind */
context->pipe->bind_vs_state(context->pipe, NULL);
util_hash_table_foreach(device->ff.ht_vs, nine_ff_ht_delete_cb, NULL);
@@ -2152,7 +2152,7 @@ nine_ff_prune_ps(struct NineDevice9 *device)
{
struct nine_context *context = >context;
-if (device->ff.num_ps > 100) {
+if (device->ff.num_ps > 1024) {
/* could destroy the bound one here, so unbind */
context->pipe->bind_fs_state(context->pipe, NULL);
util_hash_table_foreach(device->ff.ht_ps, nine_ff_ht_delete_cb, NULL);
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Mesa (master): st/nine: Switch to presentation buffer if resize is detected
Module: Mesa
Branch: master
Commit: 1cc8192ad0be52220043d40f2c7ead149d479809
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1cc8192ad0be52220043d40f2c7ead149d479809
Author: Axel Davy
Date: Sun Sep 16 18:06:56 2018 +0200
st/nine: Switch to presentation buffer if resize is detected
This enables to match the window size
on resize on all cases, as it only works
currently with presentation buffers.
Signed-off-by: Axel Davy
Tested-by: Dieter Nützel
---
src/gallium/state_trackers/nine/swapchain9.c | 37 +++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/src/gallium/state_trackers/nine/swapchain9.c
b/src/gallium/state_trackers/nine/swapchain9.c
index 138e8816a0..6c22be24c7 100644
--- a/src/gallium/state_trackers/nine/swapchain9.c
+++ b/src/gallium/state_trackers/nine/swapchain9.c
@@ -715,7 +715,7 @@ present( struct NineSwapChain9 *This,
struct pipe_fence_handle *fence;
HRESULT hr;
struct pipe_blit_info blit;
-int target_width, target_height, target_depth;
+int target_width, target_height, target_depth, i;
DBG("present: This=%p pSourceRect=%p pDestRect=%p "
"pDirtyRegion=%p hDestWindowOverride=%p"
@@ -753,6 +753,41 @@ present( struct NineSwapChain9 *This,
ID3DPresent_GetWindowInfo(This->present, hDestWindowOverride,
_width, _height, _depth);
(void)target_depth;
+/* Switch to using presentation buffers on window resize.
+ * Note: Most apps should resize the d3d back buffers when
+ * a window resize is detected, which will result in a call to
+ * NineSwapChain9_Resize. Thus everything will get released,
+ * and it will switch back to not using separate presentation
+ * buffers. */
+if (!This->present_buffers[0] &&
+(target_width != resource->width0 || target_height !=
resource->height0)) {
+BOOL failure = false;
+struct pipe_resource *new_resource[This->num_back_buffers];
+D3DWindowBuffer *new_handles[This->num_back_buffers];
+for (i = 0; i < This->num_back_buffers; i++) {
+/* Note: if (!new_handles[i]), new_resource[i]
+ * gets released and contains NULL */
+create_present_buffer(This, target_width, target_height,
_resource[i], _handles[i]);
+if (!new_handles[i])
+failure = true;
+}
+if (failure) {
+for (i = 0; i < This->num_back_buffers; i++) {
+if (new_resource[i])
+pipe_resource_reference(_resource[i], NULL);
+if (new_handles[i])
+D3DWindowBuffer_release(This, new_handles[i]);
+}
+} else {
+for (i = 0; i < This->num_back_buffers; i++) {
+D3DWindowBuffer_release(This, This->present_handles[i]);
+This->present_handles[i] = new_handles[i];
+pipe_resource_reference(>present_buffers[i],
new_resource[i]);
+pipe_resource_reference(_resource[i], NULL);
+}
+}
+}
+
pipe = NineDevice9_GetPipe(This->base.device);
if (This->present_buffers[0]) {
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Mesa (master): st/nine: Add src reference to nine_context_range_upload
Module: Mesa
Branch: master
Commit: 104681c5d528a823a3fdc3f7d9c6f8133c27201c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=104681c5d528a823a3fdc3f7d9c6f8133c27201c
Author: Axel Davy
Date: Mon Dec 3 21:24:54 2018 +0100
st/nine: Add src reference to nine_context_range_upload
Just like nine_context_box_upload, nine_context_range_upload
should reference the src, which holds the ram source buffer.
Fixes: https://github.com/iXit/Mesa-3D/issues/327
Signed-off-by: Axel Davy
Tested-by: Dieter Nützel
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/state_trackers/nine/buffer9.h| 4 +++-
src/gallium/state_trackers/nine/nine_state.c | 4
src/gallium/state_trackers/nine/nine_state.h | 1 +
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/gallium/state_trackers/nine/buffer9.h
b/src/gallium/state_trackers/nine/buffer9.h
index b04a0a721b..1803d8d640 100644
--- a/src/gallium/state_trackers/nine/buffer9.h
+++ b/src/gallium/state_trackers/nine/buffer9.h
@@ -104,7 +104,9 @@ NineBuffer9_Upload( struct NineBuffer9 *This )
struct NineDevice9 *device = This->base.base.device;
assert(This->base.pool == D3DPOOL_MANAGED && This->managed.dirty);
-nine_context_range_upload(device, >managed.pending_upload,
This->base.resource,
+nine_context_range_upload(device, >managed.pending_upload,
+ (struct NineUnknown *)This,
+ This->base.resource,
This->managed.dirty_box.x,
This->managed.dirty_box.width,
(char *)This->managed.data +
This->managed.dirty_box.x);
diff --git a/src/gallium/state_trackers/nine/nine_state.c
b/src/gallium/state_trackers/nine/nine_state.c
index 4872e24f43..02673c1f6e 100644
--- a/src/gallium/state_trackers/nine/nine_state.c
+++ b/src/gallium/state_trackers/nine/nine_state.c
@@ -2423,6 +2423,7 @@ CSMT_ITEM_NO_WAIT(nine_context_gen_mipmap,
}
CSMT_ITEM_NO_WAIT_WITH_COUNTER(nine_context_range_upload,
+ ARG_BIND_REF(struct NineUnknown, src_ref),
ARG_BIND_RES(struct pipe_resource, res),
ARG_VAL(unsigned, offset),
ARG_VAL(unsigned, size),
@@ -2430,6 +2431,9 @@ CSMT_ITEM_NO_WAIT_WITH_COUNTER(nine_context_range_upload,
{
struct nine_context *context = >context;
+/* Binding src_ref avoids release before upload */
+(void)src_ref;
+
context->pipe->buffer_subdata(context->pipe, res, 0, offset, size, data);
}
diff --git a/src/gallium/state_trackers/nine/nine_state.h
b/src/gallium/state_trackers/nine/nine_state.h
index 8de9f84a25..55960007bf 100644
--- a/src/gallium/state_trackers/nine/nine_state.h
+++ b/src/gallium/state_trackers/nine/nine_state.h
@@ -560,6 +560,7 @@ nine_context_gen_mipmap(struct NineDevice9 *device,
void
nine_context_range_upload(struct NineDevice9 *device,
unsigned *counter,
+ struct NineUnknown *src_ref,
struct pipe_resource *res,
unsigned offset,
unsigned size,
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Mesa (master): freedreno/a6xx: fix 3d texture layout
Module: Mesa
Branch: master
Commit: 51a44c3aac7642a4b26dcfb3a80d3dd87892aa6f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=51a44c3aac7642a4b26dcfb3a80d3dd87892aa6f
Author: Rob Clark
Date: Tue Dec 18 10:34:23 2018 -0500
freedreno/a6xx: fix 3d texture layout
Maybe not 100% perfect, but seems to be a pretty good approximation of
that.
Signed-off-by: Rob Clark
---
src/gallium/drivers/freedreno/a6xx/fd6_resource.c | 14 +-
src/gallium/drivers/freedreno/a6xx/fd6_texture.c | 2 +-
src/gallium/drivers/freedreno/freedreno_resource.h | 2 +-
3 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
index 4f5ab90266..fb24d230c4 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
@@ -73,7 +73,19 @@ setup_slices(struct fd_resource *rsc, uint32_t alignment,
enum pipe_format forma
pitchalign = tile_alignment[rsc->cpp].pitchalign;
aligned_height = align(aligned_height, heightalign);
} else {
- pitchalign = 64;
+ if (prsc->target == PIPE_TEXTURE_3D) {
+ unsigned a;
+ if (width >= 64) {
+ a = util_next_power_of_two(MAX2(width,
height));
+ } else {
+ a = 16;
+ }
+
+ pitchalign = align(a, 64);
+ aligned_height = align(aligned_height, a);
+ } else {
+ pitchalign = 64;
+ }
/* The blits used for mem<->gmem work at a granularity
of
* 32x32, which can cause faults due to over-fetch on
the
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_texture.c
b/src/gallium/drivers/freedreno/a6xx/fd6_texture.c
index 373a7937e4..b9121523b7 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_texture.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_texture.c
@@ -325,12 +325,12 @@ fd6_sampler_view_create(struct pipe_context *pctx, struct
pipe_resource *prsc,
break;
case PIPE_TEXTURE_3D:
so->texconst3 =
+
A6XX_TEX_CONST_3_MIN_LAYERSZ(rsc->slices[prsc->last_level].size0) |
A6XX_TEX_CONST_3_ARRAY_PITCH(rsc->slices[lvl].size0);
so->texconst5 =
A6XX_TEX_CONST_5_DEPTH(u_minify(prsc->depth0, lvl));
break;
default:
- so->texconst3 = 0x;
break;
}
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.h
b/src/gallium/drivers/freedreno/freedreno_resource.h
index 09abb512d7..8370824485 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.h
+++ b/src/gallium/drivers/freedreno/freedreno_resource.h
@@ -41,7 +41,7 @@
* programmed with the start address of each mipmap level, and hw
* derives the layer offset within the level.
*
- * Texture Layout on a4xx:
+ * Texture Layout on a4xx+:
*
* For cubemap and 2d array, each layer contains all of it's mipmap
* levels (layer_first layout).
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Mesa (master): freedreno/a6xx: simplify special case for 3d layout
Module: Mesa
Branch: master
Commit: 2b497fc507af7c048efb52e38e800396bce67fca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b497fc507af7c048efb52e38e800396bce67fca
Author: Rob Clark
Date: Tue Dec 18 10:28:57 2018 -0500
freedreno/a6xx: simplify special case for 3d layout
This logic can be re-written as the two cases for 3d (ie. before/after
the miplevel sizes start reducing) vs everything else. I think it is
easier to read this way.
Signed-off-by: Rob Clark
---
src/gallium/drivers/freedreno/a6xx/fd6_resource.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
index 6f1b745047..2b695e6969 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
@@ -42,7 +42,7 @@ static const struct {
};
/* NOTE: good way to test this is: (for example)
- * piglit/bin/texelFetch fs sampler2D 100x100x1-100x300x1
+ * piglit/bin/texelFetch fs sampler3D 100x100x8
*/
static uint32_t
setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format
format)
@@ -96,19 +96,20 @@ setup_slices(struct fd_resource *rsc, uint32_t alignment,
enum pipe_format forma
blocks = util_format_get_nblocks(format, slice->pitch,
aligned_height);
/* 1d array and 2d array textures must all have the same layer
size
-* for each miplevel on a3xx. 3d textures can have different
layer
+* for each miplevel on a6xx. 3d textures can have different
layer
* sizes for high levels, but the hw auto-sizer is buggy (or at
least
* different than what this code does), so as soon as the layer
size
* range gets into range, we stop reducing it.
*/
- if (prsc->target == PIPE_TEXTURE_3D && (
- level == 1 ||
- (level > 1 && rsc->slices[level -
1].size0 > 0xf000)))
- slice->size0 = align(blocks * rsc->cpp, alignment);
- else if (level == 0 || rsc->layer_first || alignment == 1)
+ if (prsc->target == PIPE_TEXTURE_3D) {
+ if (level <= 1 || (rsc->slices[level - 1].size0 >
0xf000)) {
+ slice->size0 = align(blocks * rsc->cpp,
alignment);
+ } else {
+ slice->size0 = rsc->slices[level - 1].size0;
+ }
+ } else {
slice->size0 = align(blocks * rsc->cpp, alignment);
- else
- slice->size0 = rsc->slices[level - 1].size0;
+ }
#if 0
debug_printf("%s: %ux%ux%u@%u: %2u: stride=%4u, size=%7u,
aligned_height=%3u\n",
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Mesa (master): freedreno/a6xx: improve setup_slices() debug msgs
Module: Mesa
Branch: master
Commit: be9ec158d7a16890d98c773dcb46ba1622833f6e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=be9ec158d7a16890d98c773dcb46ba1622833f6e
Author: Rob Clark
Date: Tue Dec 18 10:33:19 2018 -0500
freedreno/a6xx: improve setup_slices() debug msgs
Signed-off-by: Rob Clark
---
src/gallium/drivers/freedreno/a6xx/fd6_resource.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
index 2b695e6969..4f5ab90266 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
@@ -111,17 +111,16 @@ setup_slices(struct fd_resource *rsc, uint32_t alignment,
enum pipe_format forma
slice->size0 = align(blocks * rsc->cpp, alignment);
}
+ size += slice->size0 * depth * layers_in_level;
+
#if 0
- debug_printf("%s: %ux%ux%u@%u: %2u: stride=%4u, size=%7u,
aligned_height=%3u\n",
+ debug_printf("%s: %ux%ux%u@%u:\t%2u: stride=%4u, size=%6u,%7u,
aligned_height=%3u, blocks=%u\n",
util_format_name(prsc->format),
- prsc->width0, prsc->height0, prsc->depth0,
rsc->cpp,
+ width, height, depth, rsc->cpp,
level, slice->pitch * rsc->cpp,
- slice->size0 * depth * layers_in_level,
- aligned_height);
+ slice->size0, size, aligned_height, blocks);
#endif
- size += slice->size0 * depth * layers_in_level;
-
width = u_minify(width, 1);
height = u_minify(height, 1);
depth = u_minify(depth, 1);
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Mesa (master): freedreno/ir3: don't treat all inputs/outputs as vec4
Module: Mesa
Branch: master
Commit: 6667dde098c4d9f30720024e76e35963eec2c511
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6667dde098c4d9f30720024e76e35963eec2c511
Author: Rob Clark
Date: Wed Dec 5 15:07:51 2018 -0500
freedreno/ir3: don't treat all inputs/outputs as vec4
This was a hold-over from the early TGSI days, and mostly not needed
with NIR. This avoids burning an entire 4 consecutive scalar regs
for vec3 outputs, for example. Which fixes a few places that we were
doing worse that we should on register usage.
Signed-off-by: Rob Clark
---
src/freedreno/ir3/ir3_compiler_nir.c | 50 ++--
src/freedreno/ir3/ir3_ra.c | 2 ++
2 files changed, 38 insertions(+), 14 deletions(-)
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c
b/src/freedreno/ir3/ir3_compiler_nir.c
index 936c3277ff..167d6ae783 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -2649,11 +2649,9 @@ setup_input(struct ir3_context *ctx, nir_variable *in)
struct ir3_shader_variant *so = ctx->so;
unsigned ncomp = glsl_get_components(in->type);
unsigned n = in->data.driver_location;
+ unsigned frac = in->data.location_frac;
unsigned slot = in->data.location;
- /* let's pretend things other than vec4 don't exist: */
- ncomp = MAX2(ncomp, 4);
-
/* skip unread inputs, we could end up with (for example), unsplit
* matrix/etc inputs in the case they are not read, so just silently
* skip these.
@@ -2661,17 +2659,15 @@ setup_input(struct ir3_context *ctx, nir_variable *in)
if (ncomp > 4)
return;
- compile_assert(ctx, ncomp == 4);
-
so->inputs[n].slot = slot;
- so->inputs[n].compmask = (1 << ncomp) - 1;
+ so->inputs[n].compmask = (1 << (ncomp + frac)) - 1;
so->inputs_count = MAX2(so->inputs_count, n + 1);
so->inputs[n].interpolate = in->data.interpolation;
if (ctx->so->type == MESA_SHADER_FRAGMENT) {
for (int i = 0; i < ncomp; i++) {
struct ir3_instruction *instr = NULL;
- unsigned idx = (n * 4) + i;
+ unsigned idx = (n * 4) + i + frac;
if (slot == VARYING_SLOT_POS) {
so->inputs[n].bary = false;
@@ -2726,7 +2722,7 @@ setup_input(struct ir3_context *ctx, nir_variable *in)
}
} else if (ctx->so->type == MESA_SHADER_VERTEX) {
for (int i = 0; i < ncomp; i++) {
- unsigned idx = (n * 4) + i;
+ unsigned idx = (n * 4) + i + frac;
compile_assert(ctx, idx < ctx->ir->ninputs);
ctx->ir->inputs[idx] = create_input(ctx, idx);
}
@@ -2745,13 +2741,10 @@ setup_output(struct ir3_context *ctx, nir_variable *out)
struct ir3_shader_variant *so = ctx->so;
unsigned ncomp = glsl_get_components(out->type);
unsigned n = out->data.driver_location;
+ unsigned frac = out->data.location_frac;
unsigned slot = out->data.location;
unsigned comp = 0;
- /* let's pretend things other than vec4 don't exist: */
- ncomp = MAX2(ncomp, 4);
- compile_assert(ctx, ncomp == 4);
-
if (ctx->so->type == MESA_SHADER_FRAGMENT) {
switch (slot) {
case FRAG_RESULT_DEPTH:
@@ -2803,10 +2796,25 @@ setup_output(struct ir3_context *ctx, nir_variable *out)
so->outputs_count = MAX2(so->outputs_count, n + 1);
for (int i = 0; i < ncomp; i++) {
- unsigned idx = (n * 4) + i;
+ unsigned idx = (n * 4) + i + frac;
compile_assert(ctx, idx < ctx->ir->noutputs);
ctx->ir->outputs[idx] = create_immed(ctx->block, fui(0.0));
}
+
+ /* if varying packing doesn't happen, we could end up in a situation
+* with "holes" in the output, and since the per-generation code that
+* sets up varying linkage registers doesn't expect to have more than
+* one varying per vec4 slot, pad the holes.
+*
+* Note that this should probably generate a performance warning of
+* some sort.
+*/
+ for (int i = 0; i < frac; i++) {
+ unsigned idx = (n * 4) + i;
+ if (!ctx->ir->outputs[idx]) {
+ ctx->ir->outputs[idx] = create_immed(ctx->block,
fui(0.0));
+ }
+ }
}
static int
@@ -3126,7 +3134,21 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
/* fixup input/outputs: */
for (i = 0; i < so->outputs_count; i++) {
- so->outputs[i].regid = ir->outputs[i*4]->regs[0]->num;
+ /* sometimes we get outputs that don't write the .x coord, like:
+*
+* decl_var shader_out INTERP_MODE_NONE float Color
Mesa (master): freedreno: combine fd_resource_layer_offset()/fd_resource_offset()
Module: Mesa
Branch: master
Commit: d71a50f83146864df097566c413454366a61bb3c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d71a50f83146864df097566c413454366a61bb3c
Author: Rob Clark
Date: Tue Dec 18 10:27:10 2018 -0500
freedreno: combine fd_resource_layer_offset()/fd_resource_offset()
We really only need this logic in one place.
Signed-off-by: Rob Clark
---
src/gallium/drivers/freedreno/freedreno_resource.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c
b/src/gallium/drivers/freedreno/freedreno_resource.c
index 06e68af3a8..482ce94959 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -347,17 +347,6 @@ fd_blit_to_staging(struct fd_context *ctx, struct
fd_transfer *trans)
do_blit(ctx, , false);
}
-static unsigned
-fd_resource_layer_offset(struct fd_resource *rsc,
-struct fd_resource_slice
*slice,
-unsigned layer)
-{
- if (rsc->layer_first)
- return layer * rsc->layer_size;
- else
- return layer * slice->size0;
-}
-
static void fd_resource_transfer_flush_region(struct pipe_context *pctx,
struct pipe_transfer *ptrans,
const struct pipe_box *box)
@@ -626,10 +615,10 @@ fd_resource_transfer_map(struct pipe_context *pctx,
}
buf = fd_bo_map(rsc->bo);
- offset = slice->offset +
+ offset =
box->y / util_format_get_blockheight(format) * ptrans->stride +
box->x / util_format_get_blockwidth(format) * rsc->cpp +
- fd_resource_layer_offset(rsc, slice, box->z);
+ fd_resource_offset(rsc, level, box->z);
if (usage & PIPE_TRANSFER_WRITE)
rsc->valid = true;
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Mesa (master): freedreno: update generated headers
Module: Mesa Branch: master Commit: 8f60f1381dd5975486af0390fdc397959126fd3e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f60f1381dd5975486af0390fdc397959126fd3e Author: Rob Clark Date: Fri Dec 21 13:22:37 2018 -0500 freedreno: update generated headers Signed-off-by: Rob Clark --- src/gallium/drivers/freedreno/a2xx/a2xx.xml.h | 6 +++--- src/gallium/drivers/freedreno/a3xx/a3xx.xml.h | 6 +++--- src/gallium/drivers/freedreno/a4xx/a4xx.xml.h | 6 +++--- src/gallium/drivers/freedreno/a5xx/a5xx.xml.h | 6 +++--- src/gallium/drivers/freedreno/a6xx/a6xx.xml.h | 13 ++--- src/gallium/drivers/freedreno/adreno_common.xml.h | 6 +++--- src/gallium/drivers/freedreno/adreno_pm4.xml.h| 6 +++--- 7 files changed, 28 insertions(+), 21 deletions(-) diff --git a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h index 38bf83238b..60dbce1d94 100644 --- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h +++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h @@ -12,11 +12,11 @@ The rules-ng-ng source files this header was generated from are: - /home/robclark/src/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2018-07-03 19:37:13) - /home/robclark/src/envytools/rnndb/adreno/a2xx.xml ( 42463 bytes, from 2018-11-19 13:44:03) - /home/robclark/src/envytools/rnndb/adreno/adreno_common.xml ( 14239 bytes, from 2018-12-05 15:25:53) -- /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml( 43052 bytes, from 2018-12-11 15:59:02) +- /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml( 43052 bytes, from 2018-12-21 18:21:34) - /home/robclark/src/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2018-07-03 19:37:13) - /home/robclark/src/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2018-07-03 19:37:13) -- /home/robclark/src/envytools/rnndb/adreno/a5xx.xml ( 147240 bytes, from 2018-12-11 15:59:02) -- /home/robclark/src/envytools/rnndb/adreno/a6xx.xml ( 141834 bytes, from 2018-12-11 15:59:02) +- /home/robclark/src/envytools/rnndb/adreno/a5xx.xml ( 147240 bytes, from 2018-12-21 18:21:34) +- /home/robclark/src/envytools/rnndb/adreno/a6xx.xml ( 141895 bytes, from 2018-12-21 18:21:34) - /home/robclark/src/envytools/rnndb/adreno/a6xx_gmu.xml ( 10431 bytes, from 2018-09-14 13:03:07) - /home/robclark/src/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2018-07-03 19:37:13) diff --git a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h index 16f4983512..03be4aab0b 100644 --- a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h +++ b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h @@ -12,11 +12,11 @@ The rules-ng-ng source files this header was generated from are: - /home/robclark/src/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2018-07-03 19:37:13) - /home/robclark/src/envytools/rnndb/adreno/a2xx.xml ( 42463 bytes, from 2018-11-19 13:44:03) - /home/robclark/src/envytools/rnndb/adreno/adreno_common.xml ( 14239 bytes, from 2018-12-05 15:25:53) -- /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml( 43052 bytes, from 2018-12-11 15:59:02) +- /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml( 43052 bytes, from 2018-12-21 18:21:34) - /home/robclark/src/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2018-07-03 19:37:13) - /home/robclark/src/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2018-07-03 19:37:13) -- /home/robclark/src/envytools/rnndb/adreno/a5xx.xml ( 147240 bytes, from 2018-12-11 15:59:02) -- /home/robclark/src/envytools/rnndb/adreno/a6xx.xml ( 141834 bytes, from 2018-12-11 15:59:02) +- /home/robclark/src/envytools/rnndb/adreno/a5xx.xml ( 147240 bytes, from 2018-12-21 18:21:34) +- /home/robclark/src/envytools/rnndb/adreno/a6xx.xml ( 141895 bytes, from 2018-12-21 18:21:34) - /home/robclark/src/envytools/rnndb/adreno/a6xx_gmu.xml ( 10431 bytes, from 2018-09-14 13:03:07) - /home/robclark/src/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2018-07-03 19:37:13) diff --git a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h index d850ed5d7b..3dfc03cd2d 100644 --- a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h +++ b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h @@ -12,11 +12,11 @@ The rules-ng-ng source files this header was generated from are: - /home/robclark/src/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2018-07-03 19:37:13) - /home/robclark/src/envytools/rnndb/adreno/a2xx.xml ( 42463 bytes, from 2018-11-19 13:44:03) - /home/robclark/src/envytools/rnndb/adreno/adreno_common.xml ( 14239 bytes, from 2018-12-05 15:25:53) -- /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml( 43052 bytes, from 2018-12-11 15:59:02) +-
