Mesa (master): vc4: Rework cl handling to be friendlier to the compiler.
Module: Mesa
Branch: master
Commit: 7432017f65174e82a3de7afef3e4e6f60932356c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7432017f65174e82a3de7afef3e4e6f60932356c
Author: Eric Anholt
Date: Thu Jul 9 22:51:06 2015 -0700
vc4: Rework cl handling to be friendlier to the compiler.
Drops 680 bytes of code, from avoiding a bunch of extra updates to the
next pointer in the struct.
---
src/gallium/drivers/vc4/vc4_cl.c | 11 +++-
src/gallium/drivers/vc4/vc4_cl.h | 113 +++--
src/gallium/drivers/vc4/vc4_context.c |6 +-
src/gallium/drivers/vc4/vc4_draw.c| 109 ---
src/gallium/drivers/vc4/vc4_emit.c| 57 +
src/gallium/drivers/vc4/vc4_program.c | 59 ++---
6 files changed, 203 insertions(+), 152 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_cl.c b/src/gallium/drivers/vc4/vc4_cl.c
index 97f6b89..ced4f2d 100644
--- a/src/gallium/drivers/vc4/vc4_cl.c
+++ b/src/gallium/drivers/vc4/vc4_cl.c
@@ -66,8 +66,15 @@ vc4_gem_hindex(struct vc4_context *vc4, struct vc4_bo *bo)
return hindex;
}
-cl_u32(&vc4->bo_handles, bo->handle);
-cl_ptr(&vc4->bo_pointers, vc4_bo_reference(bo));
+struct vc4_cl_out *out;
+
+out = cl_start(&vc4->bo_handles);
+cl_u32(&out, bo->handle);
+cl_end(&vc4->bo_handles, out);
+
+out = cl_start(&vc4->bo_pointers);
+cl_ptr(&out, vc4_bo_reference(bo));
+cl_end(&vc4->bo_pointers, out);
return hindex;
}
diff --git a/src/gallium/drivers/vc4/vc4_cl.h b/src/gallium/drivers/vc4/vc4_cl.h
index b914745..95f1a53 100644
--- a/src/gallium/drivers/vc4/vc4_cl.h
+++ b/src/gallium/drivers/vc4/vc4_cl.h
@@ -33,10 +33,16 @@
struct vc4_bo;
+/**
+ * Undefined structure, used for typechecking that you're passing the pointers
+ * to these functions correctly.
+ */
+struct vc4_cl_out;
+
struct vc4_cl {
void *base;
-void *next;
-void *reloc_next;
+struct vc4_cl_out *next;
+struct vc4_cl_out *reloc_next;
uint32_t size;
uint32_t reloc_count;
};
@@ -55,122 +61,135 @@ static inline uint32_t cl_offset(struct vc4_cl *cl)
}
static inline void
-put_unaligned_32(void *ptr, uint32_t val)
+cl_advance(struct vc4_cl_out **cl, uint32_t n)
{
-struct unaligned_32 *p = ptr;
-p->x = val;
+(*cl) = (struct vc4_cl_out *)((char *)(*cl) + n);
}
-static inline void
-put_unaligned_16(void *ptr, uint16_t val)
+static inline struct vc4_cl_out *
+cl_start(struct vc4_cl *cl)
{
-struct unaligned_16 *p = ptr;
-p->x = val;
+return cl->next;
}
static inline void
-cl_u8(struct vc4_cl *cl, uint8_t n)
+cl_end(struct vc4_cl *cl, struct vc4_cl_out *next)
{
-assert(cl_offset(cl) + 1 <= cl->size);
-
-*(uint8_t *)cl->next = n;
-cl->next++;
+cl->next = next;
+assert(cl_offset(cl) <= cl->size);
}
+
static inline void
-cl_u16(struct vc4_cl *cl, uint16_t n)
+put_unaligned_32(struct vc4_cl_out *ptr, uint32_t val)
{
-assert(cl_offset(cl) + 2 <= cl->size);
-
-put_unaligned_16(cl->next, n);
-cl->next += 2;
+struct unaligned_32 *p = (void *)ptr;
+p->x = val;
}
static inline void
-cl_u32(struct vc4_cl *cl, uint32_t n)
+put_unaligned_16(struct vc4_cl_out *ptr, uint16_t val)
{
-assert(cl_offset(cl) + 4 <= cl->size);
+struct unaligned_16 *p = (void *)ptr;
+p->x = val;
+}
-put_unaligned_32(cl->next, n);
-cl->next += 4;
+static inline void
+cl_u8(struct vc4_cl_out **cl, uint8_t n)
+{
+*(uint8_t *)(*cl) = n;
+cl_advance(cl, 1);
}
static inline void
-cl_aligned_u32(struct vc4_cl *cl, uint32_t n)
+cl_u16(struct vc4_cl_out **cl, uint16_t n)
{
-assert(cl_offset(cl) + 4 <= cl->size);
+put_unaligned_16(*cl, n);
+cl_advance(cl, 2);
+}
-*(uint32_t *)cl->next = n;
-cl->next += 4;
+static inline void
+cl_u32(struct vc4_cl_out **cl, uint32_t n)
+{
+put_unaligned_32(*cl, n);
+cl_advance(cl, 4);
}
static inline void
-cl_ptr(struct vc4_cl *cl, void *ptr)
+cl_aligned_u32(struct vc4_cl_out **cl, uint32_t n)
{
-assert(cl_offset(cl) + sizeof(void *) <= cl->size);
+*(uint32_t *)(*cl) = n;
+cl_advance(cl, 4);
+}
-*(void **)cl->next = ptr;
-cl->next += sizeof(void *);
+static inline void
+cl_ptr(struct vc4_cl_out **cl, void *ptr)
+{
+*(struct vc4_cl_out **)(*cl) = ptr;
+cl_advance(cl, sizeof(void *));
}
static inline void
-cl_f(struct vc4_cl *cl, float f)
+cl_f(struct vc4_cl_out **cl, float f)
{
cl_u32(cl, fui(f));
}
static inline void
-cl_aligned_f(struct vc4_cl *cl, float f)
+cl_aligned_
Mesa (master): vc4: Drop reloc_count tracking for debug asserts on non-debug builds.
Module: Mesa
Branch: master
Commit: 3df78928786134874eafa6f68186c8edbbdd3ae7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3df78928786134874eafa6f68186c8edbbdd3ae7
Author: Eric Anholt
Date: Fri Jul 10 16:11:23 2015 -0700
vc4: Drop reloc_count tracking for debug asserts on non-debug builds.
Cuts another 88 bytes of compiled code.
---
src/gallium/drivers/vc4/vc4_cl.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/gallium/drivers/vc4/vc4_cl.h b/src/gallium/drivers/vc4/vc4_cl.h
index 95f1a53..bf4be0e 100644
--- a/src/gallium/drivers/vc4/vc4_cl.h
+++ b/src/gallium/drivers/vc4/vc4_cl.h
@@ -44,7 +44,9 @@ struct vc4_cl {
struct vc4_cl_out *next;
struct vc4_cl_out *reloc_next;
uint32_t size;
+#ifdef DEBUG
uint32_t reloc_count;
+#endif
};
void vc4_init_cl(struct vc4_context *vc4, struct vc4_cl *cl);
@@ -145,8 +147,10 @@ static inline void
cl_start_reloc(struct vc4_cl *cl, struct vc4_cl_out **out, uint32_t n)
{
assert(n == 1 || n == 2);
+#ifdef DEBUG
assert(cl->reloc_count == 0);
cl->reloc_count = n;
+#endif
cl_u8(out, VC4_PACKET_GEM_HANDLES);
cl->reloc_next = *out;
@@ -157,8 +161,10 @@ cl_start_reloc(struct vc4_cl *cl, struct vc4_cl_out **out,
uint32_t n)
static inline struct vc4_cl_out *
cl_start_shader_reloc(struct vc4_cl *cl, uint32_t n)
{
+#ifdef DEBUG
assert(cl->reloc_count == 0);
cl->reloc_count = n;
+#endif
cl->reloc_next = cl->next;
/* Reserve the space where hindex will be written. */
@@ -174,7 +180,9 @@ cl_reloc(struct vc4_context *vc4, struct vc4_cl *cl, struct
vc4_cl_out **cl_out,
*(uint32_t *)cl->reloc_next = vc4_gem_hindex(vc4, bo);
cl_advance(&cl->reloc_next, 4);
+#ifdef DEBUG
cl->reloc_count--;
+#endif
cl_u32(cl_out, offset);
}
@@ -187,7 +195,9 @@ cl_aligned_reloc(struct vc4_context *vc4, struct vc4_cl *cl,
*(uint32_t *)cl->reloc_next = vc4_gem_hindex(vc4, bo);
cl_advance(&cl->reloc_next, 4);
+#ifdef DEBUG
cl->reloc_count--;
+#endif
cl_aligned_u32(cl_out, offset);
}
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Mesa (master): vc4: Add perf debug for when we wait on BOs.
Module: Mesa
Branch: master
Commit: ab80519b3cd08401dff2d07343064a27f32b33ca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab80519b3cd08401dff2d07343064a27f32b33ca
Author: Eric Anholt
Date: Mon Jun 29 22:32:03 2015 -0700
vc4: Add perf debug for when we wait on BOs.
---
src/gallium/drivers/vc4/vc4_bufmgr.c | 106 +-
src/gallium/drivers/vc4/vc4_bufmgr.h |5 +-
src/gallium/drivers/vc4/vc4_fence.c |2 +-
src/gallium/drivers/vc4/vc4_job.c|2 +-
4 files changed, 72 insertions(+), 43 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_bufmgr.c
b/src/gallium/drivers/vc4/vc4_bufmgr.c
index cbdb9e8..499b5ce 100644
--- a/src/gallium/drivers/vc4/vc4_bufmgr.c
+++ b/src/gallium/drivers/vc4/vc4_bufmgr.c
@@ -94,7 +94,7 @@ vc4_bo_from_cache(struct vc4_screen *screen, uint32_t size,
const char *name)
* allocate something new instead, since we assume that the
* user will proceed to CPU map it and fill it with stuff.
*/
-if (!vc4_bo_wait(bo, 0)) {
+if (!vc4_bo_wait(bo, 0, NULL)) {
pipe_mutex_unlock(cache->lock);
return NULL;
}
@@ -413,63 +413,91 @@ vc4_bo_flink(struct vc4_bo *bo, uint32_t *name)
return true;
}
+static int vc4_wait_seqno_ioctl(int fd, uint64_t seqno, uint64_t timeout_ns)
+{
+if (using_vc4_simulator)
+return 0;
+
+struct drm_vc4_wait_seqno wait = {
+.seqno = seqno,
+.timeout_ns = timeout_ns,
+};
+int ret = drmIoctl(fd, DRM_IOCTL_VC4_WAIT_SEQNO, &wait);
+if (ret == -1)
+return -errno;
+else
+return 0;
+
+}
+
bool
-vc4_wait_seqno(struct vc4_screen *screen, uint64_t seqno, uint64_t timeout_ns)
+vc4_wait_seqno(struct vc4_screen *screen, uint64_t seqno, uint64_t timeout_ns,
+ const char *reason)
{
if (screen->finished_seqno >= seqno)
return true;
-struct drm_vc4_wait_seqno wait;
-memset(&wait, 0, sizeof(wait));
-wait.seqno = seqno;
-wait.timeout_ns = timeout_ns;
-
-int ret;
-if (!using_vc4_simulator)
-ret = drmIoctl(screen->fd, DRM_IOCTL_VC4_WAIT_SEQNO, &wait);
-else {
-wait.seqno = screen->finished_seqno;
-ret = 0;
+if (unlikely(vc4_debug & VC4_DEBUG_PERF) && timeout_ns && reason) {
+if (vc4_wait_seqno_ioctl(screen->fd, seqno, 0) == -ETIME) {
+fprintf(stderr, "Blocking on seqno %lld for %s\n",
+(long long)seqno, reason);
+}
}
-if (ret == 0) {
-screen->finished_seqno = wait.seqno;
-return true;
-}
+int ret = vc4_wait_seqno_ioctl(screen->fd, seqno, timeout_ns);
+if (ret) {
+if (ret != -ETIME) {
+fprintf(stderr, "wait failed: %d\n", ret);
+abort();
+}
-if (errno != ETIME) {
-fprintf(stderr, "wait failed: %d\n", ret);
-abort();
+return false;
}
-return false;
+screen->finished_seqno = seqno;
+return true;
+}
+
+static int vc4_wait_bo_ioctl(int fd, uint32_t handle, uint64_t timeout_ns)
+{
+if (using_vc4_simulator)
+return 0;
+
+struct drm_vc4_wait_bo wait = {
+.handle = handle,
+.timeout_ns = timeout_ns,
+};
+int ret = drmIoctl(fd, DRM_IOCTL_VC4_WAIT_BO, &wait);
+if (ret == -1)
+return -errno;
+else
+return 0;
+
}
bool
-vc4_bo_wait(struct vc4_bo *bo, uint64_t timeout_ns)
+vc4_bo_wait(struct vc4_bo *bo, uint64_t timeout_ns, const char *reason)
{
struct vc4_screen *screen = bo->screen;
-struct drm_vc4_wait_bo wait;
-memset(&wait, 0, sizeof(wait));
-wait.handle = bo->handle;
-wait.timeout_ns = timeout_ns;
-
-int ret;
-if (!using_vc4_simulator)
-ret = drmIoctl(screen->fd, DRM_IOCTL_VC4_WAIT_BO, &wait);
-else
-ret = 0;
+if (unlikely(vc4_debug & VC4_DEBUG_PERF) && timeout_ns && reason) {
+if (vc4_wait_bo_ioctl(screen->fd, bo->handle, 0) == -ETIME) {
+fprintf(stderr, "Blocking on %s BO for %s\n",
+bo->name, reason);
+}
+}
-if (ret == 0)
-return true;
+int ret = vc4_wait_bo_ioctl(screen->fd, bo->handle, timeout_ns);
+if (ret) {
+if (ret != -ETIM
Mesa (master): vc4: Make a helper function for getting the current offset in the CL.
Module: Mesa
Branch: master
Commit: a0d3915663fb7cbd3c1a5561450e256e00ecf11b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0d3915663fb7cbd3c1a5561450e256e00ecf11b
Author: Eric Anholt
Date: Fri Jul 10 14:46:42 2015 -0700
vc4: Make a helper function for getting the current offset in the CL.
I needed to rewrite this a bit for safety checking in the next commit.
Despite being a static inline of the same thing that was being done, we
lose 36 bytes of code for some reason.
---
src/gallium/drivers/vc4/vc4_cl.c |9 -
src/gallium/drivers/vc4/vc4_cl.h | 15 ++-
src/gallium/drivers/vc4/vc4_context.c |3 +--
src/gallium/drivers/vc4/vc4_job.c | 14 ++
4 files changed, 21 insertions(+), 20 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_cl.c b/src/gallium/drivers/vc4/vc4_cl.c
index 0700e88..97f6b89 100644
--- a/src/gallium/drivers/vc4/vc4_cl.c
+++ b/src/gallium/drivers/vc4/vc4_cl.c
@@ -36,11 +36,12 @@ vc4_init_cl(struct vc4_context *vc4, struct vc4_cl *cl)
void
cl_ensure_space(struct vc4_cl *cl, uint32_t space)
{
-if ((cl->next - cl->base) + space <= cl->size)
+uint32_t offset = cl_offset(cl);
+
+if (offset + space <= cl->size)
return;
uint32_t size = MAX2(cl->size + space, cl->size * 2);
-uint32_t offset = cl->next -cl->base;
cl->base = reralloc(ralloc_parent(cl->base), cl->base, uint8_t, size);
cl->size = size;
@@ -60,9 +61,7 @@ vc4_gem_hindex(struct vc4_context *vc4, struct vc4_bo *bo)
uint32_t hindex;
uint32_t *current_handles = vc4->bo_handles.base;
-for (hindex = 0;
- hindex < (vc4->bo_handles.next - vc4->bo_handles.base) / 4;
- hindex++) {
+for (hindex = 0; hindex < cl_offset(&vc4->bo_handles) / 4; hindex++) {
if (current_handles[hindex] == bo->handle)
return hindex;
}
diff --git a/src/gallium/drivers/vc4/vc4_cl.h b/src/gallium/drivers/vc4/vc4_cl.h
index 3aa4721..b914745 100644
--- a/src/gallium/drivers/vc4/vc4_cl.h
+++ b/src/gallium/drivers/vc4/vc4_cl.h
@@ -49,6 +49,11 @@ uint32_t vc4_gem_hindex(struct vc4_context *vc4, struct
vc4_bo *bo);
struct PACKED unaligned_16 { uint16_t x; };
struct PACKED unaligned_32 { uint32_t x; };
+static inline uint32_t cl_offset(struct vc4_cl *cl)
+{
+return (char *)cl->next - (char *)cl->base;
+}
+
static inline void
put_unaligned_32(void *ptr, uint32_t val)
{
@@ -66,7 +71,7 @@ put_unaligned_16(void *ptr, uint16_t val)
static inline void
cl_u8(struct vc4_cl *cl, uint8_t n)
{
-assert((cl->next - cl->base) + 1 <= cl->size);
+assert(cl_offset(cl) + 1 <= cl->size);
*(uint8_t *)cl->next = n;
cl->next++;
@@ -75,7 +80,7 @@ cl_u8(struct vc4_cl *cl, uint8_t n)
static inline void
cl_u16(struct vc4_cl *cl, uint16_t n)
{
-assert((cl->next - cl->base) + 2 <= cl->size);
+assert(cl_offset(cl) + 2 <= cl->size);
put_unaligned_16(cl->next, n);
cl->next += 2;
@@ -84,7 +89,7 @@ cl_u16(struct vc4_cl *cl, uint16_t n)
static inline void
cl_u32(struct vc4_cl *cl, uint32_t n)
{
-assert((cl->next - cl->base) + 4 <= cl->size);
+assert(cl_offset(cl) + 4 <= cl->size);
put_unaligned_32(cl->next, n);
cl->next += 4;
@@ -93,7 +98,7 @@ cl_u32(struct vc4_cl *cl, uint32_t n)
static inline void
cl_aligned_u32(struct vc4_cl *cl, uint32_t n)
{
-assert((cl->next - cl->base) + 4 <= cl->size);
+assert(cl_offset(cl) + 4 <= cl->size);
*(uint32_t *)cl->next = n;
cl->next += 4;
@@ -102,7 +107,7 @@ cl_aligned_u32(struct vc4_cl *cl, uint32_t n)
static inline void
cl_ptr(struct vc4_cl *cl, void *ptr)
{
-assert((cl->next - cl->base) + sizeof(void *) <= cl->size);
+assert(cl_offset(cl) + sizeof(void *) <= cl->size);
*(void **)cl->next = ptr;
cl->next += sizeof(void *);
diff --git a/src/gallium/drivers/vc4/vc4_context.c
b/src/gallium/drivers/vc4/vc4_context.c
index 316598f..60da218 100644
--- a/src/gallium/drivers/vc4/vc4_context.c
+++ b/src/gallium/drivers/vc4/vc4_context.c
@@ -128,8 +128,7 @@ vc4_cl_references_bo(struct pipe_context *pctx, struct
vc4_bo *bo)
* they match.
*/
struct vc4_bo **referenced_bos = vc4->bo_pointers.base;
-for (int i = 0; i < (vc4->bo_handles.next -
- vc4->bo_handles.base) / 4; i++) {
+for (int i = 0; i < cl_offset(&vc4->bo_handles) / 4; i++) {
if (referenced_bos[i] == bo) {
return true;
}
diff --git a/src/gallium/drivers/vc4/vc4_job.c
b/src/gallium/drivers/vc4/vc4_job.c
index
Mesa (master): vc4: Fix compiler warnings on release builds.
Module: Mesa
Branch: master
Commit: cd7dd45bfec9ad68719c5e4e04b66ea4bcc1a2c1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd7dd45bfec9ad68719c5e4e04b66ea4bcc1a2c1
Author: Eric Anholt
Date: Fri Jul 10 17:00:34 2015 -0700
vc4: Fix compiler warnings on release builds.
---
src/gallium/drivers/vc4/vc4_program.c |2 ++
src/gallium/drivers/vc4/vc4_qpu_emit.c |1 +
src/gallium/drivers/vc4/vc4_qpu_validate.c |7 +++
src/gallium/drivers/vc4/vc4_tiling.c | 11 ---
4 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index e61ea21..df440f6 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -1748,6 +1748,7 @@ ntq_setup_inputs(struct vc4_compile *c)
unsigned loc = var->data.driver_location;
assert(array_len == 1);
+(void)array_len;
resize_qreg_array(c, &c->inputs, &c->inputs_array_size,
(loc + 1) * 4);
@@ -1782,6 +1783,7 @@ ntq_setup_outputs(struct vc4_compile *c)
unsigned loc = var->data.driver_location * 4;
assert(array_len == 1);
+(void)array_len;
/* NIR hack to pass through
* TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS */
diff --git a/src/gallium/drivers/vc4/vc4_qpu_emit.c
b/src/gallium/drivers/vc4/vc4_qpu_emit.c
index 99afe4b..e1b3f3c 100644
--- a/src/gallium/drivers/vc4/vc4_qpu_emit.c
+++ b/src/gallium/drivers/vc4/vc4_qpu_emit.c
@@ -234,6 +234,7 @@ vc4_generate_code(struct vc4_context *vc4, struct
vc4_compile *c)
case QFILE_VPM:
assert((int)qinst->src[i].index >=
last_vpm_read_index);
+(void)last_vpm_read_index;
last_vpm_read_index = qinst->src[i].index;
src[i] = qpu_ra(QPU_R_VPM);
break;
diff --git a/src/gallium/drivers/vc4/vc4_qpu_validate.c
b/src/gallium/drivers/vc4/vc4_qpu_validate.c
index 8471edb..9cf6841 100644
--- a/src/gallium/drivers/vc4/vc4_qpu_validate.c
+++ b/src/gallium/drivers/vc4/vc4_qpu_validate.c
@@ -23,6 +23,13 @@
#include "vc4_qpu.h"
+#ifdef NDEBUG
+/* Since most of our code is used in assert()s, don't warn about dead code. */
+#pragma GCC diagnostic ignored "-Wunused-but-set-variable"
+#pragma GCC diagnostic ignored "-Wunused-variable"
+#pragma GCC diagnostic ignored "-Wunused-function"
+#endif
+
static bool
writes_reg(uint64_t inst, uint32_t w)
{
diff --git a/src/gallium/drivers/vc4/vc4_tiling.c
b/src/gallium/drivers/vc4/vc4_tiling.c
index f9801c9..cf86eb0 100644
--- a/src/gallium/drivers/vc4/vc4_tiling.c
+++ b/src/gallium/drivers/vc4/vc4_tiling.c
@@ -127,13 +127,10 @@ vc4_store_utile(void *dst, void *src, uint32_t
src_stride, uint32_t cpp)
static void
check_box_utile_alignment(const struct pipe_box *box, int cpp)
{
-uint32_t utile_w = vc4_utile_width(cpp);
-uint32_t utile_h = vc4_utile_height(cpp);
-
-assert(!(box->x & (utile_w - 1)));
-assert(!(box->y & (utile_h - 1)));
-assert(!(box->width & (utile_w - 1)));
-assert(!(box->height & (utile_h - 1)));
+assert(!(box->x & (vc4_utile_width(cpp) - 1)));
+assert(!(box->y & (vc4_utile_height(cpp) - 1)));
+assert(!(box->width & (vc4_utile_width(cpp) - 1)));
+assert(!(box->height & (vc4_utile_height(cpp) - 1)));
}
static void
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Mesa (master): vc4: Drop separate cl*_reloc_hindex().
Module: Mesa
Branch: master
Commit: 748bf459b46b44e184ee1d425ce612da61a0800e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=748bf459b46b44e184ee1d425ce612da61a0800e
Author: Eric Anholt
Date: Thu Jul 9 22:48:17 2015 -0700
vc4: Drop separate cl*_reloc_hindex().
Now that RCL generation is in the kernel, we don't have any other
callers. Oddly, the compiler generates another 8 bytes of code for
this, but the simplification is worth it.
---
src/gallium/drivers/vc4/vc4_cl.h | 24 ++--
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_cl.h b/src/gallium/drivers/vc4/vc4_cl.h
index 4974da1..3aa4721 100644
--- a/src/gallium/drivers/vc4/vc4_cl.h
+++ b/src/gallium/drivers/vc4/vc4_cl.h
@@ -145,9 +145,10 @@ cl_start_shader_reloc(struct vc4_cl *cl, uint32_t n)
}
static inline void
-cl_reloc_hindex(struct vc4_cl *cl, uint32_t hindex, uint32_t offset)
+cl_reloc(struct vc4_context *vc4, struct vc4_cl *cl,
+ struct vc4_bo *bo, uint32_t offset)
{
-*(uint32_t *)cl->reloc_next = hindex;
+*(uint32_t *)cl->reloc_next = vc4_gem_hindex(vc4, bo);
cl->reloc_next += 4;
cl->reloc_count--;
@@ -156,9 +157,10 @@ cl_reloc_hindex(struct vc4_cl *cl, uint32_t hindex,
uint32_t offset)
}
static inline void
-cl_aligned_reloc_hindex(struct vc4_cl *cl, uint32_t hindex, uint32_t offset)
+cl_aligned_reloc(struct vc4_context *vc4, struct vc4_cl *cl,
+ struct vc4_bo *bo, uint32_t offset)
{
-*(uint32_t *)cl->reloc_next = hindex;
+*(uint32_t *)cl->reloc_next = vc4_gem_hindex(vc4, bo);
cl->reloc_next += 4;
cl->reloc_count--;
@@ -166,20 +168,6 @@ cl_aligned_reloc_hindex(struct vc4_cl *cl, uint32_t
hindex, uint32_t offset)
cl_aligned_u32(cl, offset);
}
-static inline void
-cl_reloc(struct vc4_context *vc4, struct vc4_cl *cl,
- struct vc4_bo *bo, uint32_t offset)
-{
-cl_reloc_hindex(cl, vc4_gem_hindex(vc4, bo), offset);
-}
-
-static inline void
-cl_aligned_reloc(struct vc4_context *vc4, struct vc4_cl *cl,
- struct vc4_bo *bo, uint32_t offset)
-{
-cl_aligned_reloc_hindex(cl, vc4_gem_hindex(vc4, bo), offset);
-}
-
void cl_ensure_space(struct vc4_cl *cl, uint32_t size);
#endif /* VC4_CL_H */
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Mesa (master): vc4: Add better debug for register allocation failure.
Module: Mesa
Branch: master
Commit: 1e80c9fab98d7de216937a47f8e231f3beb78403
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e80c9fab98d7de216937a47f8e231f3beb78403
Author: Eric Anholt
Date: Fri Jul 10 17:01:37 2015 -0700
vc4: Add better debug for register allocation failure.
---
src/gallium/drivers/vc4/vc4_register_allocate.c |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_register_allocate.c
b/src/gallium/drivers/vc4/vc4_register_allocate.c
index 3b0b890..73964b4 100644
--- a/src/gallium/drivers/vc4/vc4_register_allocate.c
+++ b/src/gallium/drivers/vc4/vc4_register_allocate.c
@@ -270,7 +270,11 @@ vc4_register_allocate(struct vc4_context *vc4, struct
vc4_compile *c)
}
bool ok = ra_allocate(g);
-assert(ok);
+if (!ok) {
+fprintf(stderr, "Failed to register allocate:\n");
+qir_dump(c);
+abort();
+}
for (uint32_t i = 0; i < c->num_temps; i++) {
temp_registers[i] = vc4_regs[ra_get_node_reg(g,
temp_to_node[i])];
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Mesa (master): vc4: Store reloc pointers as pointers, not offsets.
Module: Mesa
Branch: master
Commit: e4c540f6d09390013a9cb66060a29f236ad7dcfc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e4c540f6d09390013a9cb66060a29f236ad7dcfc
Author: Eric Anholt
Date: Thu Jul 9 22:42:22 2015 -0700
vc4: Store reloc pointers as pointers, not offsets.
Now that we don't resize the CL as we build (it's set up at the top by
vc4_start_draw()), we can store the pointers instead of offsets from
the base. Saves a bit of math in emitting relocs (about 60 bytes of
code).
---
src/gallium/drivers/vc4/vc4_cl.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_cl.h b/src/gallium/drivers/vc4/vc4_cl.h
index 4a50e79..4974da1 100644
--- a/src/gallium/drivers/vc4/vc4_cl.h
+++ b/src/gallium/drivers/vc4/vc4_cl.h
@@ -36,8 +36,8 @@ struct vc4_bo;
struct vc4_cl {
void *base;
void *next;
+void *reloc_next;
uint32_t size;
-uint32_t reloc_next;
uint32_t reloc_count;
};
@@ -128,7 +128,7 @@ cl_start_reloc(struct vc4_cl *cl, uint32_t n)
cl->reloc_count = n;
cl_u8(cl, VC4_PACKET_GEM_HANDLES);
-cl->reloc_next = cl->next - cl->base;
+cl->reloc_next = cl->next;
cl_u32(cl, 0); /* Space where hindex will be written. */
cl_u32(cl, 0); /* Space where hindex will be written. */
}
@@ -138,7 +138,7 @@ cl_start_shader_reloc(struct vc4_cl *cl, uint32_t n)
{
assert(cl->reloc_count == 0);
cl->reloc_count = n;
-cl->reloc_next = cl->next - cl->base;
+cl->reloc_next = cl->next;
/* Space where hindex will be written. */
cl->next += n * 4;
@@ -147,7 +147,7 @@ cl_start_shader_reloc(struct vc4_cl *cl, uint32_t n)
static inline void
cl_reloc_hindex(struct vc4_cl *cl, uint32_t hindex, uint32_t offset)
{
-*(uint32_t *)(cl->base + cl->reloc_next) = hindex;
+*(uint32_t *)cl->reloc_next = hindex;
cl->reloc_next += 4;
cl->reloc_count--;
@@ -158,7 +158,7 @@ cl_reloc_hindex(struct vc4_cl *cl, uint32_t hindex,
uint32_t offset)
static inline void
cl_aligned_reloc_hindex(struct vc4_cl *cl, uint32_t hindex, uint32_t offset)
{
-*(uint32_t *)(cl->base + cl->reloc_next) = hindex;
+*(uint32_t *)cl->reloc_next = hindex;
cl->reloc_next += 4;
cl->reloc_count--;
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Mesa (master): vc4: Reuse (and extend) the packet.h sizes for dumping.
Module: Mesa
Branch: master
Commit: 19056d04296444afefe71ad8094d327ed38967bf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=19056d04296444afefe71ad8094d327ed38967bf
Author: Eric Anholt
Date: Mon Jun 22 17:31:24 2015 -0700
vc4: Reuse (and extend) the packet.h sizes for dumping.
---
src/gallium/drivers/vc4/kernel/vc4_packet.h |7 ++
src/gallium/drivers/vc4/vc4_cl_dump.c | 102 +--
2 files changed, 58 insertions(+), 51 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_packet.h
b/src/gallium/drivers/vc4/kernel/vc4_packet.h
index 88cfc0f..8e6f2a1 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_packet.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_packet.h
@@ -88,16 +88,22 @@ enum vc4_packet {
#define VC4_PACKET_START_TILE_BINNING_SIZE 1
#define VC4_PACKET_INCREMENT_SEMAPHORE_SIZE1
#define VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE 1
+#define VC4_PACKET_BRANCH_SIZE 5
#define VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE 5
#define VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE 1
#define VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF_SIZE 1
+#define VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE 5
+#define VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE 5
#define VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE 7
#define VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE 7
#define VC4_PACKET_GL_INDEXED_PRIMITIVE_SIZE 14
#define VC4_PACKET_GL_ARRAY_PRIMITIVE_SIZE 10
+#define VC4_PACKET_COMPRESSED_PRIMITIVE_SIZE 1
+#define VC4_PACKET_CLIPPED_COMPRESSED_PRIMITIVE_SIZE 1
#define VC4_PACKET_PRIMITIVE_LIST_FORMAT_SIZE 2
#define VC4_PACKET_GL_SHADER_STATE_SIZE
5
#define VC4_PACKET_NV_SHADER_STATE_SIZE
5
+#define VC4_PACKET_VG_SHADER_STATE_SIZE
5
#define VC4_PACKET_CONFIGURATION_BITS_SIZE 4
#define VC4_PACKET_FLAT_SHADE_FLAGS_SIZE 5
#define VC4_PACKET_POINT_SIZE_SIZE 5
@@ -106,6 +112,7 @@ enum vc4_packet {
#define VC4_PACKET_DEPTH_OFFSET_SIZE 5
#define VC4_PACKET_CLIP_WINDOW_SIZE9
#define VC4_PACKET_VIEWPORT_OFFSET_SIZE
5
+#define VC4_PACKET_Z_CLIPPING_SIZE 9
#define VC4_PACKET_CLIPPER_XY_SCALING_SIZE 9
#define VC4_PACKET_CLIPPER_Z_SCALING_SIZE 9
#define VC4_PACKET_TILE_BINNING_MODE_CONFIG_SIZE 16
diff --git a/src/gallium/drivers/vc4/vc4_cl_dump.c
b/src/gallium/drivers/vc4/vc4_cl_dump.c
index 6905508..4cc197a 100644
--- a/src/gallium/drivers/vc4/vc4_cl_dump.c
+++ b/src/gallium/drivers/vc4/vc4_cl_dump.c
@@ -291,63 +291,63 @@ dump_VC4_PACKET_GEM_HANDLES(void *cl, uint32_t offset,
uint32_t hw_offset)
offset, hw_offset, handles[0], handles[1]);
}
-#define PACKET_DUMP(name, size) [name] = { #name, size, dump_##name }
-#define PACKET(name, size) [name] = { #name, size, NULL }
+#define PACKET_DUMP(name) [name] = { #name, name ## _SIZE, dump_##name }
+#define PACKET(name) [name] = { #name, name ## _SIZE, NULL }
static const struct packet_info {
const char *name;
uint8_t size;
void (*dump_func)(void *cl, uint32_t offset, uint32_t hw_offset);
} packet_info[] = {
-PACKET(VC4_PACKET_HALT, 1),
-PACKET(VC4_PACKET_NOP, 1),
-
-PACKET(VC4_PACKET_FLUSH, 1),
-PACKET(VC4_PACKET_FLUSH_ALL, 1),
-PACKET(VC4_PACKET_START_TILE_BINNING, 1),
-PACKET(VC4_PACKET_INCREMENT_SEMAPHORE, 1),
-PACKET(VC4_PACKET_WAIT_ON_SEMAPHORE, 1),
-
-PACKET(VC4_PACKET_BRANCH, 5),
-PACKET_DUMP(VC4_PACKET_BRANCH_TO_SUB_LIST, 5),
-
-PACKET(VC4_PACKET_STORE_MS_TILE_BUFFER, 1),
-PACKET(VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF, 1),
-PACKET(VC4_PACKET_STORE_FULL_RES_TILE_BUFFER, 5),
-PACKET(VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER, 5),
-PACKET_DUMP(VC4_PACKET_STORE_TILE_BUFFER_GENERAL, 7),
-PACKET(VC4_PACKET_LOAD_TILE_BUFFER_GENERAL, 7),
-
-PACKET(VC4_PACKET_GL_INDEXED_PRIMITIVE, 14),
-PACKET(VC4_PACKET_GL_ARRAY_PRIMITIVE, 10),
-
-PACKET(VC4_PACKET_COMPRESSED_PRIMITIVE, 48),
-PACKET(VC4_PACKET_CLIPPED_COMPRESSED_PRIMITIVE, 49),
-
-PACKET(VC4_PACKET_PRIMITIVE_LIST_FORMAT, 2),
-
-PACKET(VC4_PACKET_GL_SHADER_STATE, 5),
-PACKET(VC4_PACKET_NV_SHADER_STATE, 5),
-PACKET(VC4_PACKET_VG_SHADER_STATE, 5
Mesa (master): vc4: Make a helper for TLB color writes, too.
Module: Mesa Branch: master Commit: 0f69d59b1c8f5314c1abe18659b96adcfc51a0e5 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f69d59b1c8f5314c1abe18659b96adcfc51a0e5 Author: Eric Anholt Date: Tue Jun 23 18:04:00 2015 -0700 vc4: Make a helper for TLB color writes, too. We've done so for all the other QIR instruction generation in this file. --- src/gallium/drivers/vc4/vc4_program.c |2 +- src/gallium/drivers/vc4/vc4_qir.h |1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index c620a4a..2061631 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -1515,7 +1515,7 @@ emit_frag_end(struct vc4_compile *c) qir_TLB_Z_WRITE(c, z); } -qir_emit(c, qir_inst(QOP_TLB_COLOR_WRITE, c->undef, color, c->undef)); +qir_TLB_COLOR_WRITE(c, color); } static void diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h index 732cfd0..2f1e261 100644 --- a/src/gallium/drivers/vc4/vc4_qir.h +++ b/src/gallium/drivers/vc4/vc4_qir.h @@ -523,6 +523,7 @@ QIR_ALU0(FRAG_W) QIR_ALU0(FRAG_REV_FLAG) QIR_ALU0(TEX_RESULT) QIR_ALU0(TLB_COLOR_READ) +QIR_NODST_1(TLB_COLOR_WRITE) QIR_NODST_1(TLB_Z_WRITE) QIR_NODST_1(TLB_DISCARD_SETUP) QIR_NODST_1(TLB_STENCIL_SETUP) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Pull the blending operation out to a separate function.
Module: Mesa
Branch: master
Commit: af83eb25812fbda89de62b58f9e59a5408ad4654
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=af83eb25812fbda89de62b58f9e59a5408ad4654
Author: Eric Anholt
Date: Tue Jun 23 17:53:07 2015 -0700
vc4: Pull the blending operation out to a separate function.
It's fairly separate from the rest of the TLB operations at frag end time,
and we'll need to run it multiple times to support MSAA blending.
---
src/gallium/drivers/vc4/vc4_program.c | 88 +++--
1 file changed, 50 insertions(+), 38 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index ba47c51..c620a4a 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -1371,12 +1371,13 @@ vc4_logicop(struct vc4_compile *c, struct qreg src,
struct qreg dst)
}
}
-static void
-emit_frag_end(struct vc4_compile *c)
+/**
+ * Applies the GL blending pipeline and returns the packed () output
+ * color.
+ */
+static struct qreg
+blend_pipeline(struct vc4_compile *c)
{
-clip_distance_discard(c);
-alpha_test_discard(c);
-
enum pipe_format color_format = c->fs_key->color_format;
const uint8_t *format_swiz = vc4_get_format_swizzle(color_format);
struct qreg tlb_read_color[4] = { c->undef, c->undef, c->undef,
c->undef };
@@ -1408,14 +1409,16 @@ emit_frag_end(struct vc4_compile *c)
packed_dst_color = qir_MOV(c, r4);
}
+struct qreg undef_array[4] = { c->undef, c->undef, c->undef, c->undef
};
+const struct qreg *output_colors = (c->output_color_index != -1 ?
+c->outputs + c->output_color_index
:
+undef_array);
+struct qreg blend_src_color[4];
+for (int i = 0; i < 4; i++)
+blend_src_color[i] = output_colors[i];
+
struct qreg blend_color[4];
-struct qreg undef_array[4] = {
-c->undef, c->undef, c->undef, c->undef
-};
-vc4_blend(c, blend_color, linear_dst_color,
- (c->output_color_index != -1 ?
- c->outputs + c->output_color_index :
- undef_array));
+vc4_blend(c, blend_color, linear_dst_color, blend_src_color);
if (util_format_is_srgb(color_format)) {
for (int i = 0; i < 3; i++)
@@ -1439,30 +1442,6 @@ emit_frag_end(struct vc4_compile *c)
format_swiz[i]);
}
-if (c->discard.file != QFILE_NULL)
-qir_TLB_DISCARD_SETUP(c, c->discard);
-
-if (c->fs_key->stencil_enabled) {
-qir_TLB_STENCIL_SETUP(c, qir_uniform(c, QUNIFORM_STENCIL, 0));
-if (c->fs_key->stencil_twoside) {
-qir_TLB_STENCIL_SETUP(c, qir_uniform(c,
QUNIFORM_STENCIL, 1));
-}
-if (c->fs_key->stencil_full_writemasks) {
-qir_TLB_STENCIL_SETUP(c, qir_uniform(c,
QUNIFORM_STENCIL, 2));
-}
-}
-
-if (c->fs_key->depth_enabled) {
-struct qreg z;
-if (c->output_position_index != -1) {
-z = qir_FTOI(c, qir_FMUL(c,
c->outputs[c->output_position_index + 2],
- qir_uniform_f(c, 0xff)));
-} else {
-z = qir_FRAG_Z(c);
-}
-qir_TLB_Z_WRITE(c, z);
-}
-
struct qreg packed_color = c->undef;
for (int i = 0; i < 4; i++) {
if (swizzled_outputs[i].file == QFILE_NULL)
@@ -1502,8 +1481,41 @@ emit_frag_end(struct vc4_compile *c)
qir_uniform_ui(c, ~colormask)));
}
-qir_emit(c, qir_inst(QOP_TLB_COLOR_WRITE, c->undef,
- packed_color, c->undef));
+return packed_color;
+}
+
+static void
+emit_frag_end(struct vc4_compile *c)
+{
+clip_distance_discard(c);
+alpha_test_discard(c);
+struct qreg color = blend_pipeline(c);
+
+if (c->discard.file != QFILE_NULL)
+qir_TLB_DISCARD_SETUP(c, c->discard);
+
+if (c->fs_key->stencil_enabled) {
+qir_TLB_STENCIL_SETUP(c, qir_uniform(c, QUNIFORM_STENCIL, 0));
+if (c->fs_key->stencil_twoside) {
+qir_TLB_STENCIL_SETUP(c, qir_uniform(c,
QUNIFORM_STENCIL, 1));
+}
+if (c->fs_key->stencil_full_writemasks) {
+qir_TLB_STENCIL_SETUP(c, qir_uniform(c,
QUNIFORM_STENCIL, 2));
+}
+}
+
+if (c->fs_key-&g
Mesa (master): vc4: Add an "args" temporary for RCL setup.
Module: Mesa
Branch: master
Commit: 8fbcabc41a4b2c7d7571585bde2e009e57982da4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8fbcabc41a4b2c7d7571585bde2e009e57982da4
Author: Eric Anholt
Date: Mon Jun 22 13:14:57 2015 -0700
vc4: Add an "args" temporary for RCL setup.
---
src/gallium/drivers/vc4/kernel/vc4_render_cl.c | 48
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
index e2d907a..deb2ccf 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
@@ -100,7 +100,8 @@ static void emit_tile(struct vc4_exec_info *exec,
struct vc4_rcl_setup *setup,
uint8_t x, uint8_t y, bool first, bool last)
{
- bool has_bin = exec->args->bin_cl_size != 0;
+ struct drm_vc4_submit_cl *args = exec->args;
+ bool has_bin = args->bin_cl_size != 0;
/* Note that the load doesn't actually occur until the
* tile coords packet is processed, and only one load
@@ -108,10 +109,9 @@ static void emit_tile(struct vc4_exec_info *exec,
*/
if (setup->color_read) {
rcl_u8(setup, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL);
- rcl_u16(setup, exec->args->color_read.bits);
+ rcl_u16(setup, args->color_read.bits);
rcl_u32(setup,
- setup->color_read->paddr +
- exec->args->color_read.offset);
+ setup->color_read->paddr + args->color_read.offset);
}
if (setup->zs_read) {
@@ -122,9 +122,8 @@ static void emit_tile(struct vc4_exec_info *exec,
}
rcl_u8(setup, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL);
- rcl_u16(setup, exec->args->zs_read.bits);
- rcl_u32(setup,
- setup->zs_read->paddr + exec->args->zs_read.offset);
+ rcl_u16(setup, args->zs_read.bits);
+ rcl_u32(setup, setup->zs_read->paddr + args->zs_read.offset);
}
/* Clipping depends on tile coordinates having been
@@ -147,11 +146,11 @@ static void emit_tile(struct vc4_exec_info *exec,
if (setup->zs_write) {
rcl_u8(setup, VC4_PACKET_STORE_TILE_BUFFER_GENERAL);
- rcl_u16(setup, exec->args->zs_write.bits |
+ rcl_u16(setup, args->zs_write.bits |
(setup->color_ms_write ?
VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR : 0));
rcl_u32(setup,
- (setup->zs_write->paddr + exec->args->zs_write.offset) |
+ (setup->zs_write->paddr + args->zs_write.offset) |
((last && !setup->color_ms_write) ?
VC4_LOADSTORE_TILE_BUFFER_EOF : 0));
}
@@ -172,11 +171,12 @@ static void emit_tile(struct vc4_exec_info *exec,
static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info
*exec,
struct vc4_rcl_setup *setup)
{
- bool has_bin = exec->args->bin_cl_size != 0;
- uint8_t min_x_tile = exec->args->min_x_tile;
- uint8_t min_y_tile = exec->args->min_y_tile;
- uint8_t max_x_tile = exec->args->max_x_tile;
- uint8_t max_y_tile = exec->args->max_y_tile;
+ struct drm_vc4_submit_cl *args = exec->args;
+ bool has_bin = args->bin_cl_size != 0;
+ uint8_t min_x_tile = args->min_x_tile;
+ uint8_t min_y_tile = args->min_y_tile;
+ uint8_t max_x_tile = args->max_x_tile;
+ uint8_t max_y_tile = args->max_y_tile;
uint8_t xtiles = max_x_tile - min_x_tile + 1;
uint8_t ytiles = max_y_tile - min_y_tile + 1;
uint8_t x, y;
@@ -185,7 +185,7 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct
vc4_exec_info *exec,
size = VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE;
loop_body_size = VC4_PACKET_TILE_COORDINATES_SIZE;
- if (exec->args->flags & VC4_SUBMIT_CL_USE_CLEAR_COLOR) {
+ if (args->flags & VC4_SUBMIT_CL_USE_CLEAR_COLOR) {
size += VC4_PACKET_CLEAR_COLORS_SIZE +
VC4_PACKET_TILE_COORDINATES_SIZE +
VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE;
@@ -226,23 +226,23 @@ static int vc4_create_rcl_bo(struct drm_device *dev,
struct vc4_exec_info *exec,
rcl_u32(setup,
(setup->color_ms_write ?
(setup->color_ms_write->paddr +
- exec->args->color_ms_write.offset) :
+ args->color_ms_write.offset) :
0));
- rcl_u16(setup, exec->args->wid
Mesa (master): vc4: Fix printfs for blit fallbacks.
Module: Mesa
Branch: master
Commit: fc0da629b502bb072b945932bae0477eb9b62bd5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc0da629b502bb072b945932bae0477eb9b62bd5
Author: Eric Anholt
Date: Sat Jun 20 15:30:19 2015 -0700
vc4: Fix printfs for blit fallbacks.
---
src/gallium/drivers/vc4/vc4_blit.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_blit.c
b/src/gallium/drivers/vc4/vc4_blit.c
index d29e2c9..e52a194 100644
--- a/src/gallium/drivers/vc4/vc4_blit.c
+++ b/src/gallium/drivers/vc4/vc4_blit.c
@@ -94,7 +94,7 @@ vc4_render_blit(struct pipe_context *ctx, struct
pipe_blit_info *info)
struct vc4_context *vc4 = vc4_context(ctx);
if (!util_blitter_is_blit_supported(vc4->blitter, info)) {
-fprintf(stderr, "blit unsupported %s -> %s",
+fprintf(stderr, "blit unsupported %s -> %s\n",
util_format_short_name(info->src.resource->format),
util_format_short_name(info->dst.resource->format));
return false;
@@ -135,7 +135,7 @@ vc4_blit(struct pipe_context *pctx, const struct
pipe_blit_info *blit_info)
info.dst.resource->nr_samples <= 1 &&
!util_format_is_depth_or_stencil(info.src.resource->format) &&
!util_format_is_pure_integer(info.src.resource->format)) {
-fprintf(stderr, "color resolve unimplemented");
+fprintf(stderr, "color resolve unimplemented\n");
return;
}
@@ -147,7 +147,7 @@ vc4_blit(struct pipe_context *pctx, const struct
pipe_blit_info *blit_info)
}
if (info.mask & PIPE_MASK_S) {
-fprintf(stderr, "cannot blit stencil, skipping");
+fprintf(stderr, "cannot blit stencil, skipping\n");
info.mask &= ~PIPE_MASK_S;
}
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Mesa (master): vc4: Clarify size calculation for Z/S writes.
Module: Mesa
Branch: master
Commit: 76851f49a5beac01b4eee7892ca95f44b5e18e29
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76851f49a5beac01b4eee7892ca95f44b5e18e29
Author: Eric Anholt
Date: Mon Jun 22 11:45:27 2015 -0700
vc4: Clarify size calculation for Z/S writes.
It's the same value for loads and stores, because they're basically the
same packet.
---
src/gallium/drivers/vc4/kernel/vc4_render_cl.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
index deb2ccf..f55ffe5 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
@@ -208,7 +208,7 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct
vc4_exec_info *exec,
}
if (setup->zs_write)
- loop_body_size += VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE;
+ loop_body_size += VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE;
if (setup->color_ms_write) {
if (setup->zs_write)
loop_body_size += VC4_PACKET_TILE_COORDINATES_SIZE;
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Mesa (master): vc4: Also dump VC4_PACKET_LOAD_TILE_BUFFER_GENERAL.
Module: Mesa
Branch: master
Commit: 3fd4c80b32e3080d761e176d129a1e46c618584a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3fd4c80b32e3080d761e176d129a1e46c618584a
Author: Eric Anholt
Date: Mon Jun 22 17:38:14 2015 -0700
vc4: Also dump VC4_PACKET_LOAD_TILE_BUFFER_GENERAL.
---
src/gallium/drivers/vc4/vc4_cl_dump.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_cl_dump.c
b/src/gallium/drivers/vc4/vc4_cl_dump.c
index 289d4d6..64de79c 100644
--- a/src/gallium/drivers/vc4/vc4_cl_dump.c
+++ b/src/gallium/drivers/vc4/vc4_cl_dump.c
@@ -73,7 +73,7 @@ dump_VC4_PACKET_STORE_FULL_RES_TILE_BUFFER(void *cl, uint32_t
offset, uint32_t h
}
static void
-dump_VC4_PACKET_STORE_TILE_BUFFER_GENERAL(void *cl, uint32_t offset, uint32_t
hw_offset)
+dump_loadstore_general(void *cl, uint32_t offset, uint32_t hw_offset)
{
uint8_t *bytes = cl + offset;
uint32_t *addr = cl + offset + 2;
@@ -151,6 +151,18 @@ dump_VC4_PACKET_STORE_TILE_BUFFER_GENERAL(void *cl,
uint32_t offset, uint32_t hw
}
static void
+dump_VC4_PACKET_STORE_TILE_BUFFER_GENERAL(void *cl, uint32_t offset, uint32_t
hw_offset)
+{
+dump_loadstore_general(cl, offset, hw_offset);
+}
+
+static void
+dump_VC4_PACKET_LOAD_TILE_BUFFER_GENERAL(void *cl, uint32_t offset, uint32_t
hw_offset)
+{
+dump_loadstore_general(cl, offset, hw_offset);
+}
+
+static void
dump_VC4_PACKET_FLAT_SHADE_FLAGS(void *cl, uint32_t offset, uint32_t hw_offset)
{
uint32_t *bits = cl + offset;
@@ -342,7 +354,7 @@ static const struct packet_info {
PACKET_DUMP(VC4_PACKET_STORE_FULL_RES_TILE_BUFFER),
PACKET_DUMP(VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER),
PACKET_DUMP(VC4_PACKET_STORE_TILE_BUFFER_GENERAL),
-PACKET(VC4_PACKET_LOAD_TILE_BUFFER_GENERAL),
+PACKET_DUMP(VC4_PACKET_LOAD_TILE_BUFFER_GENERAL),
PACKET(VC4_PACKET_GL_INDEXED_PRIMITIVE),
PACKET(VC4_PACKET_GL_ARRAY_PRIMITIVE),
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Mesa (master): vc4: Add dumping for VC4_PACKET_LOAD/ STORE_FULL_RES_TILE_BUFFER.
Module: Mesa
Branch: master
Commit: 5458ac01ae046010f3f7e4ddbf8ef18cca04d96c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5458ac01ae046010f3f7e4ddbf8ef18cca04d96c
Author: Eric Anholt
Date: Mon Jun 22 17:34:24 2015 -0700
vc4: Add dumping for VC4_PACKET_LOAD/STORE_FULL_RES_TILE_BUFFER.
---
src/gallium/drivers/vc4/kernel/vc4_packet.h | 10 +
src/gallium/drivers/vc4/vc4_cl_dump.c | 30 +--
2 files changed, 38 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_packet.h
b/src/gallium/drivers/vc4/kernel/vc4_packet.h
index 8e6f2a1..771e2b7 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_packet.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_packet.h
@@ -143,6 +143,16 @@ enum vc4_packet {
/** @{
*
+ * low bits of VC4_PACKET_STORE_FULL_RES_TILE_BUFFER and
+ * VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER.
+ */
+#define VC4_LOADSTORE_FULL_RES_EOF (1 << 3)
+#define VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL (1 << 2)
+#define VC4_LOADSTORE_FULL_RES_DISABLE_ZS (1 << 1)
+#define VC4_LOADSTORE_FULL_RES_DISABLE_COLOR (1 << 0)
+
+/** @{
+ *
* byte 2 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
* VC4_PACKET_LOAD_TILE_BUFFER_GENERAL (low bits of the address)
*/
diff --git a/src/gallium/drivers/vc4/vc4_cl_dump.c
b/src/gallium/drivers/vc4/vc4_cl_dump.c
index 4cc197a..289d4d6 100644
--- a/src/gallium/drivers/vc4/vc4_cl_dump.c
+++ b/src/gallium/drivers/vc4/vc4_cl_dump.c
@@ -47,6 +47,32 @@ dump_VC4_PACKET_BRANCH_TO_SUB_LIST(void *cl, uint32_t
offset, uint32_t hw_offset
}
static void
+dump_loadstore_full(void *cl, uint32_t offset, uint32_t hw_offset)
+{
+uint32_t bits = *(uint32_t *)(cl + offset);
+
+fprintf(stderr, "0x%08x 0x%08x: addr 0x%08x%s%s%s%s\n",
+offset, hw_offset,
+bits & ~0xf,
+(bits & VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL) ? "" : "
clear",
+(bits & VC4_LOADSTORE_FULL_RES_DISABLE_ZS) ? "" : " zs",
+(bits & VC4_LOADSTORE_FULL_RES_DISABLE_COLOR) ? "" : " color",
+(bits & VC4_LOADSTORE_FULL_RES_EOF) ? " eof" : "");
+}
+
+static void
+dump_VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER(void *cl, uint32_t offset, uint32_t
hw_offset)
+{
+dump_loadstore_full(cl, offset, hw_offset);
+}
+
+static void
+dump_VC4_PACKET_STORE_FULL_RES_TILE_BUFFER(void *cl, uint32_t offset, uint32_t
hw_offset)
+{
+dump_loadstore_full(cl, offset, hw_offset);
+}
+
+static void
dump_VC4_PACKET_STORE_TILE_BUFFER_GENERAL(void *cl, uint32_t offset, uint32_t
hw_offset)
{
uint8_t *bytes = cl + offset;
@@ -313,8 +339,8 @@ static const struct packet_info {
PACKET(VC4_PACKET_STORE_MS_TILE_BUFFER),
PACKET(VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF),
-PACKET(VC4_PACKET_STORE_FULL_RES_TILE_BUFFER),
-PACKET(VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER),
+PACKET_DUMP(VC4_PACKET_STORE_FULL_RES_TILE_BUFFER),
+PACKET_DUMP(VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER),
PACKET_DUMP(VC4_PACKET_STORE_TILE_BUFFER_GENERAL),
PACKET(VC4_PACKET_LOAD_TILE_BUFFER_GENERAL),
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Mesa (master): tgsi_to_nir: Fix translation of TXF on MSAA targets.
Module: Mesa
Branch: master
Commit: e70f5617f1125e1f39a75d7a8c92ddda86a8056d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e70f5617f1125e1f39a75d7a8c92ddda86a8056d
Author: Eric Anholt
Date: Tue Jun 23 11:02:12 2015 -0700
tgsi_to_nir: Fix translation of TXF on MSAA targets.
Noticed while trying to add GL_ARB_texture_multisample support to vc4.
Reviewed-by: Ilia Mirkin
---
src/gallium/auxiliary/nir/tgsi_to_nir.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c
b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index 061f39a..065bbf0 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -1078,7 +1078,12 @@ ttn_tex(struct ttn_compile *c, nir_alu_dest dest,
nir_ssa_def **src)
samp = 2;
break;
case TGSI_OPCODE_TXF:
- op = nir_texop_txf;
+ if (tgsi_inst->Texture.Texture == TGSI_TEXTURE_2D_MSAA ||
+ tgsi_inst->Texture.Texture == TGSI_TEXTURE_2D_ARRAY_MSAA) {
+ op = nir_texop_txf_ms;
+ } else {
+ op = nir_texop_txf;
+ }
num_srcs = 2;
break;
case TGSI_OPCODE_TXD:
@@ -1178,7 +1183,10 @@ ttn_tex(struct ttn_compile *c, nir_alu_dest dest,
nir_ssa_def **src)
if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXF) {
instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], W));
- instr->src[src_number].src_type = nir_tex_src_lod;
+ if (op == nir_texop_txf_ms)
+ instr->src[src_number].src_type = nir_tex_src_ms_index;
+ else
+ instr->src[src_number].src_type = nir_tex_src_lod;
src_number++;
}
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Mesa (master): vc4: Don't try to CSE color reads.
Module: Mesa
Branch: master
Commit: 997f6778414a352457162b73ff5295e51e09ad63
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=997f6778414a352457162b73ff5295e51e09ad63
Author: Eric Anholt
Date: Tue Jun 23 18:08:49 2015 -0700
vc4: Don't try to CSE color reads.
It returns a new value for each sample in the TLB. We've already avoided
trying to get the same index's color multiple times at the vc4_program.c
level, so we're not losing anything by doing this.
---
src/gallium/drivers/vc4/vc4_opt_cse.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_opt_cse.c
b/src/gallium/drivers/vc4/vc4_opt_cse.c
index 92c8260..51a5650 100644
--- a/src/gallium/drivers/vc4/vc4_opt_cse.c
+++ b/src/gallium/drivers/vc4/vc4_opt_cse.c
@@ -130,7 +130,8 @@ qir_opt_cse(struct vc4_compile *c)
list_for_each_entry(struct qinst, inst, &c->instructions, link) {
if (qir_has_side_effects(c, inst) ||
-qir_has_side_effect_reads(c, inst)) {
+qir_has_side_effect_reads(c, inst) ||
+inst->op == QOP_TLB_COLOR_READ) {
continue;
}
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Mesa (master): mesa: Back out an accidental change I had in a VC4 commit.
Module: Mesa
Branch: master
Commit: 717376155d2082d7bf94122a1e1d383b39e0b070
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=717376155d2082d7bf94122a1e1d383b39e0b070
Author: Eric Anholt
Date: Sat Jun 20 15:02:50 2015 -0700
mesa: Back out an accidental change I had in a VC4 commit.
This was a hack as part of debugging some glamor-on-GLES2 behavior that
ended up being an xserver bug. I suspect we can just flip this extension
on for GLES2, but the spec says it requires 3.1.
---
src/mesa/main/extensions.c |1 -
1 file changed, 1 deletion(-)
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index b747aba..4176a69 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -218,7 +218,6 @@ static const struct extension extension_table[] = {
{ "GL_EXT_discard_framebuffer", o(dummy_true),
ES1 | ES2, 2009 },
{ "GL_EXT_blend_minmax",o(EXT_blend_minmax),
GLL | ES1 | ES2, 1995 },
{ "GL_EXT_blend_subtract", o(dummy_true),
GLL,1995 },
- { "GL_EXT_buffer_storage", o(ARB_buffer_storage),
ES2, 2015 },
{ "GL_EXT_compiled_vertex_array", o(dummy_true),
GLL,1996 },
{ "GL_EXT_copy_texture",o(dummy_true),
GLL,1995 },
{ "GL_EXT_depth_bounds_test", o(EXT_depth_bounds_test),
GL, 2002 },
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Mesa (master): vc4: Use a defined t value for 1D textures.
Module: Mesa
Branch: master
Commit: c00903867417f1522047b7c50ea9248e1aa2f50c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c00903867417f1522047b7c50ea9248e1aa2f50c
Author: Eric Anholt
Date: Fri Jun 19 19:47:44 2015 -0700
vc4: Use a defined t value for 1D textures.
This doesn't fix the broken 1D cases of texsubimage, but it does prevent
segfaulting when dumping the QIR code generated in fbo-1d.
---
src/gallium/drivers/vc4/vc4_program.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index bb45eb1..ba47c51 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -325,7 +325,9 @@ ntq_emit_tex(struct vc4_compile *c, nir_tex_instr *instr)
switch (instr->src[i].src_type) {
case nir_tex_src_coord:
s = ntq_get_src(c, instr->src[i].src, 0);
-if (instr->sampler_dim != GLSL_SAMPLER_DIM_1D)
+if (instr->sampler_dim == GLSL_SAMPLER_DIM_1D)
+t = qir_uniform_f(c, 0.5);
+else
t = ntq_get_src(c, instr->src[i].src, 1);
if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
r = ntq_get_src(c, instr->src[i].src, 2);
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Mesa (master): vc4: Fix write-only texsubimage when we had to align.
Module: Mesa
Branch: master
Commit: bb107110a4d97191841985076dd9f2fbd0937dfc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb107110a4d97191841985076dd9f2fbd0937dfc
Author: Eric Anholt
Date: Fri Jun 19 19:41:25 2015 -0700
vc4: Fix write-only texsubimage when we had to align.
We need to make sure that when we store the aligned box, we've got
initialized contents in the border. We could potentially just load the
border area, but for now let's get text rendering working in X (and fix
the GL_TEXTURE_2D errors in piglit's texsubimage test and
gl-2.1-pbo/test_tex_image)
---
src/gallium/drivers/vc4/vc4_resource.c |6 +-
src/mesa/main/extensions.c |1 +
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_resource.c
b/src/gallium/drivers/vc4/vc4_resource.c
index 14b135e..cab7640 100644
--- a/src/gallium/drivers/vc4/vc4_resource.c
+++ b/src/gallium/drivers/vc4/vc4_resource.c
@@ -162,6 +162,8 @@ vc4_resource_transfer_map(struct pipe_context *pctx,
/* We need to align the box to utile boundaries, since that's
* what load/store operate on.
*/
+uint32_t orig_width = ptrans->box.width;
+uint32_t orig_height = ptrans->box.height;
uint32_t box_start_x = ptrans->box.x & (utile_w - 1);
uint32_t box_start_y = ptrans->box.y & (utile_h - 1);
ptrans->box.width += box_start_x;
@@ -175,7 +177,9 @@ vc4_resource_transfer_map(struct pipe_context *pctx,
ptrans->layer_stride = ptrans->stride;
trans->map = malloc(ptrans->stride * ptrans->box.height);
-if (usage & PIPE_TRANSFER_READ) {
+if (usage & PIPE_TRANSFER_READ ||
+ptrans->box.width != orig_width ||
+ptrans->box.height != orig_height) {
vc4_load_tiled_image(trans->map, ptrans->stride,
buf + slice->offset +
box->z * rsc->cube_map_stride,
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index 4176a69..b747aba 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -218,6 +218,7 @@ static const struct extension extension_table[] = {
{ "GL_EXT_discard_framebuffer", o(dummy_true),
ES1 | ES2, 2009 },
{ "GL_EXT_blend_minmax",o(EXT_blend_minmax),
GLL | ES1 | ES2, 1995 },
{ "GL_EXT_blend_subtract", o(dummy_true),
GLL,1995 },
+ { "GL_EXT_buffer_storage", o(ARB_buffer_storage),
ES2, 2015 },
{ "GL_EXT_compiled_vertex_array", o(dummy_true),
GLL,1996 },
{ "GL_EXT_copy_texture",o(dummy_true),
GLL,1995 },
{ "GL_EXT_depth_bounds_test", o(EXT_depth_bounds_test),
GL, 2002 },
___
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Mesa (master): vc4: Add dumping of VC4_PACKET_TILE_BINNING_MODE_CONFIG.
Module: Mesa
Branch: master
Commit: 91c73a9a280b749a781cd3f071fc377fcb9758e1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=91c73a9a280b749a781cd3f071fc377fcb9758e1
Author: Eric Anholt
Date: Wed Jun 17 13:51:55 2015 -0700
vc4: Add dumping of VC4_PACKET_TILE_BINNING_MODE_CONFIG.
---
src/gallium/drivers/vc4/vc4_cl_dump.c | 33 -
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_cl_dump.c
b/src/gallium/drivers/vc4/vc4_cl_dump.c
index 1423984..6905508 100644
--- a/src/gallium/drivers/vc4/vc4_cl_dump.c
+++ b/src/gallium/drivers/vc4/vc4_cl_dump.c
@@ -174,6 +174,37 @@ dump_VC4_PACKET_CLIPPER_Z_SCALING(void *cl, uint32_t
offset, uint32_t hw_offset)
}
static void
+dump_VC4_PACKET_TILE_BINNING_MODE_CONFIG(void *cl, uint32_t offset, uint32_t
hw_offset)
+{
+uint32_t *tile_alloc_addr = cl + offset;
+uint32_t *tile_alloc_size = cl + offset + 4;
+uint32_t *tile_state_addr = cl + offset + 8;
+uint8_t *bin_x = cl + offset + 12;
+uint8_t *bin_y = cl + offset + 13;
+uint8_t *flags = cl + offset + 14;
+
+fprintf(stderr, "0x%08x 0x%08x: tile alloc addr 0x%08x\n",
+offset, hw_offset,
+*tile_alloc_addr);
+
+fprintf(stderr, "0x%08x 0x%08x: tile alloc size %db\n",
+offset + 4, hw_offset + 4,
+*tile_alloc_size);
+
+fprintf(stderr, "0x%08x 0x%08x: tile state addr 0x%08x\n",
+offset + 8, hw_offset + 8,
+*tile_state_addr);
+
+fprintf(stderr, "0x%08x 0x%08x: tiles (%d, %d)\n",
+offset + 12, hw_offset + 12,
+*bin_x, *bin_y);
+
+fprintf(stderr, "0x%08x 0x%08x: flags 0x%02x\n",
+offset + 14, hw_offset + 14,
+*flags);
+}
+
+static void
dump_VC4_PACKET_TILE_RENDERING_MODE_CONFIG(void *cl, uint32_t offset, uint32_t
hw_offset)
{
uint32_t *render_offset = cl + offset;
@@ -311,7 +342,7 @@ static const struct packet_info {
PACKET_DUMP(VC4_PACKET_CLIPPER_XY_SCALING, 9),
PACKET_DUMP(VC4_PACKET_CLIPPER_Z_SCALING, 9),
-PACKET(VC4_PACKET_TILE_BINNING_MODE_CONFIG, 16),
+PACKET_DUMP(VC4_PACKET_TILE_BINNING_MODE_CONFIG, 16),
PACKET_DUMP(VC4_PACKET_TILE_RENDERING_MODE_CONFIG, 11),
PACKET(VC4_PACKET_CLEAR_COLORS, 14),
PACKET_DUMP(VC4_PACKET_TILE_COORDINATES, 3),
___
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Mesa (master): vc4: Fix memory leak from simple_list conversion.
Module: Mesa
Branch: master
Commit: dc1fbad2eb5454ed36a066d2a69b575cd5a8abaf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc1fbad2eb5454ed36a066d2a69b575cd5a8abaf
Author: Eric Anholt
Date: Wed Jun 17 23:49:19 2015 -0700
vc4: Fix memory leak from simple_list conversion.
I accidentally shadowed the outside declaration, so we always returned
NULL even when we'd found something in the cache.
---
src/gallium/drivers/vc4/vc4_bufmgr.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_bufmgr.c
b/src/gallium/drivers/vc4/vc4_bufmgr.c
index eef7e9d..cbdb9e8 100644
--- a/src/gallium/drivers/vc4/vc4_bufmgr.c
+++ b/src/gallium/drivers/vc4/vc4_bufmgr.c
@@ -87,9 +87,8 @@ vc4_bo_from_cache(struct vc4_screen *screen, uint32_t size,
const char *name)
struct vc4_bo *bo = NULL;
pipe_mutex_lock(cache->lock);
if (!list_empty(&cache->size_list[page_index])) {
-struct vc4_bo *bo = LIST_ENTRY(struct vc4_bo,
-
cache->size_list[page_index].next,
- size_list);
+bo = LIST_ENTRY(struct vc4_bo,
cache->size_list[page_index].next,
+size_list);
/* Check that the BO has gone idle. If not, then we want to
* allocate something new instead, since we assume that the
___
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Mesa (master): vc4: Move RCL generation into the kernel.
Module: Mesa Branch: master Commit: 9adcd2d80aceec90b9c3712b53d8e7839dc5634b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9adcd2d80aceec90b9c3712b53d8e7839dc5634b Author: Eric Anholt Date: Wed Jun 10 12:36:47 2015 -0700 vc4: Move RCL generation into the kernel. There weren't that many variations of RCL generation, and this lets us skip all the in-kernel validation for what we generated. --- src/gallium/drivers/vc4/Makefile.sources |1 + src/gallium/drivers/vc4/kernel/vc4_drv.h | 28 +- src/gallium/drivers/vc4/kernel/vc4_gem.c | 70 ++-- src/gallium/drivers/vc4/kernel/vc4_render_cl.c | 446 src/gallium/drivers/vc4/kernel/vc4_validate.c | 306 +++- src/gallium/drivers/vc4/vc4_blit.c | 107 +- src/gallium/drivers/vc4/vc4_context.c | 289 ++- src/gallium/drivers/vc4/vc4_context.h | 15 +- src/gallium/drivers/vc4/vc4_draw.c |2 + src/gallium/drivers/vc4/vc4_drm.h | 40 ++- src/gallium/drivers/vc4/vc4_job.c | 97 +- 11 files changed, 725 insertions(+), 676 deletions(-) Diff: http://cgit.freedesktop.org/mesa/mesa/diff/?id=9adcd2d80aceec90b9c3712b53d8e7839dc5634b ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Move tile state/alloc allocation into the kernel.
Module: Mesa
Branch: master
Commit: 1d45e44b2f9e52d6eebe84ab08da6b7393011f95
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d45e44b2f9e52d6eebe84ab08da6b7393011f95
Author: Eric Anholt
Date: Wed Jun 17 13:24:06 2015 -0700
vc4: Move tile state/alloc allocation into the kernel.
This avoids a security issue where userspace could have written the tile
state/tile alloc behind the GPU's back, and will apparently be necessary
for fixing stability bugs (tile state buffers are missing some top bits
for the tile alloc's address).
---
src/gallium/drivers/vc4/kernel/vc4_drv.h |5 +-
src/gallium/drivers/vc4/kernel/vc4_packet.h | 22 +++--
src/gallium/drivers/vc4/kernel/vc4_render_cl.c |3 +-
src/gallium/drivers/vc4/kernel/vc4_validate.c| 99 +++---
src/gallium/drivers/vc4/vc4_context.c|2 -
src/gallium/drivers/vc4/vc4_context.h|3 -
src/gallium/drivers/vc4/vc4_draw.c | 37 +---
src/gallium/drivers/vc4/vc4_simulator.c |1 +
src/gallium/drivers/vc4/vc4_simulator_validate.h |1 +
9 files changed, 72 insertions(+), 101 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_drv.h
b/src/gallium/drivers/vc4/kernel/vc4_drv.h
index 83802dd..1fd8aa9 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_drv.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_drv.h
@@ -28,8 +28,6 @@
enum vc4_bo_mode {
VC4_MODE_UNDECIDED,
- VC4_MODE_TILE_ALLOC,
- VC4_MODE_TSDA,
VC4_MODE_RENDER,
VC4_MODE_SHADER,
};
@@ -91,7 +89,8 @@ struct vc4_exec_info {
bool found_start_tile_binning_packet;
bool found_increment_semaphore_packet;
uint8_t bin_tiles_x, bin_tiles_y;
- struct drm_gem_cma_object *tile_alloc_bo;
+ struct drm_gem_cma_object *tile_bo;
+ uint32_t tile_alloc_offset;
/**
* Computed addresses pointing into exec_bo where we start the
diff --git a/src/gallium/drivers/vc4/kernel/vc4_packet.h
b/src/gallium/drivers/vc4/kernel/vc4_packet.h
index 764a125..88cfc0f 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_packet.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_packet.h
@@ -232,15 +232,19 @@ enum vc4_packet {
/** @{ bits in the last u8 of VC4_PACKET_TILE_BINNING_MODE_CONFIG */
#define VC4_BIN_CONFIG_DB_NON_MS (1 << 7)
-#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_32 (0 << 5)
-#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_64 (1 << 5)
-#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_128(2 << 5)
-#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_256(3 << 5)
-
-#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_32(0 << 3)
-#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_64(1 << 3)
-#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_128 (2 << 3)
-#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_256 (3 << 3)
+#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_MASK VC4_MASK(6, 5)
+#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_SHIFT 5
+#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_32 0
+#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_64 1
+#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_1282
+#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_2563
+
+#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_MASK VC4_MASK(4, 3)
+#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_SHIFT 3
+#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_320
+#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_641
+#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_128 2
+#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_256 3
#define VC4_BIN_CONFIG_AUTO_INIT_TSDA (1 << 2)
#define VC4_BIN_CONFIG_TILE_BUFFER_64BIT (1 << 1)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
index de6070f..e2d907a 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
@@ -140,7 +140,8 @@ static void emit_tile(struct vc4_exec_info *exec,
if (has_bin) {
rcl_u8(setup, VC4_PACKET_BRANCH_TO_SUB_LIST);
- rcl_u32(setup, (exec->tile_alloc_bo->paddr +
+ rcl_u32(setup, (exec->tile_bo->paddr +
+ exec->tile_alloc_offset +
(y * exec->bin_tiles_x + x) * 32));
}
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index 80b0e65..a0b67a7 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -375,15 +375,10 @@ validate_nv_shader_state(VALIDATE_ARGS)
static int
validate_tile_binning_config(VALIDATE_ARGS)
{
- struct drm_gem_cma_object *tile_allocation;
- struct drm_gem_cma_object *tile_state_data_array;
+ struct drm_device *dev = exec->exec_bo->base.dev;
uint8_t flags;
- uint32_t tile
Mesa (master): vc4: Track the number of BOs allocated and their size.
Module: Mesa
Branch: master
Commit: 62d153ea37b1bf572c39aab8ec46099fc903362d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=62d153ea37b1bf572c39aab8ec46099fc903362d
Author: Eric Anholt
Date: Wed Jun 17 22:56:15 2015 -0700
vc4: Track the number of BOs allocated and their size.
This is useful for BO leak debugging.
---
src/gallium/drivers/vc4/vc4_bufmgr.c | 101 +++---
src/gallium/drivers/vc4/vc4_screen.h |6 ++
2 files changed, 100 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_bufmgr.c
b/src/gallium/drivers/vc4/vc4_bufmgr.c
index 69a7584..eef7e9d 100644
--- a/src/gallium/drivers/vc4/vc4_bufmgr.c
+++ b/src/gallium/drivers/vc4/vc4_bufmgr.c
@@ -34,6 +34,47 @@
#include "vc4_context.h"
#include "vc4_screen.h"
+static bool dump_stats = false;
+
+static void
+vc4_bo_dump_stats(struct vc4_screen *screen)
+{
+struct vc4_bo_cache *cache = &screen->bo_cache;
+
+fprintf(stderr, " BOs allocated: %d\n", screen->bo_count);
+fprintf(stderr, " BOs size:%dkb\n", screen->bo_size / 102);
+fprintf(stderr, " BOs cached: %d\n", cache->bo_count);
+fprintf(stderr, " BOs cached size: %dkb\n", cache->bo_size / 102);
+
+if (!list_empty(&cache->time_list)) {
+struct vc4_bo *first = LIST_ENTRY(struct vc4_bo,
+ cache->time_list.next,
+ time_list);
+struct vc4_bo *last = LIST_ENTRY(struct vc4_bo,
+ cache->time_list.prev,
+ time_list);
+
+fprintf(stderr, " oldest cache time: %ld\n",
+(long)first->free_time);
+fprintf(stderr, " newest cache time: %ld\n",
+(long)last->free_time);
+
+struct timespec time;
+clock_gettime(CLOCK_MONOTONIC, &time);
+fprintf(stderr, " now: %ld\n",
+time.tv_sec);
+}
+}
+
+static void
+vc4_bo_remove_from_cache(struct vc4_bo_cache *cache, struct vc4_bo *bo)
+{
+list_del(&bo->time_list);
+list_del(&bo->size_list);
+cache->bo_count--;
+cache->bo_size -= bo->size;
+}
+
static struct vc4_bo *
vc4_bo_from_cache(struct vc4_screen *screen, uint32_t size, const char *name)
{
@@ -60,8 +101,7 @@ vc4_bo_from_cache(struct vc4_screen *screen, uint32_t size,
const char *name)
}
pipe_reference_init(&bo->reference, 1);
-list_del(&bo->time_list);
-list_del(&bo->size_list);
+vc4_bo_remove_from_cache(cache, bo);
bo->name = name;
}
@@ -78,8 +118,14 @@ vc4_bo_alloc(struct vc4_screen *screen, uint32_t size,
const char *name)
size = align(size, 4096);
bo = vc4_bo_from_cache(screen, size, name);
-if (bo)
+if (bo) {
+if (dump_stats) {
+fprintf(stderr, "Allocated %s %dkb from cache:\n",
+name, size / 1024);
+vc4_bo_dump_stats(screen);
+}
return bo;
+}
bo = CALLOC_STRUCT(vc4_bo);
if (!bo)
@@ -116,6 +162,13 @@ vc4_bo_alloc(struct vc4_screen *screen, uint32_t size,
const char *name)
abort();
}
+screen->bo_count++;
+screen->bo_size += bo->size;
+if (dump_stats) {
+fprintf(stderr, "Allocated %s %dkb:\n", name, size / 1024);
+vc4_bo_dump_stats(screen);
+}
+
return bo;
}
@@ -153,6 +206,17 @@ vc4_bo_free(struct vc4_bo *bo)
if (ret != 0)
fprintf(stderr, "close object %d: %s\n", bo->handle,
strerror(errno));
+screen->bo_count--;
+screen->bo_size -= bo->size;
+
+if (dump_stats) {
+fprintf(stderr, "Freed %s%s%dkb:\n",
+bo->name ? bo->name : "",
+bo->name ? " " : "",
+bo->size / 1024);
+vc4_bo_dump_stats(screen);
+}
+
free(bo);
}
@@ -160,18 +224,29 @@ static void
free_stale_bos(struct vc4_screen *screen, time_t time)
{
struct vc4_bo_cache *cache = &screen->bo_cache;
+bool freed_any = false;
list_for_each_entry_safe(struct vc4_bo, bo, &cache->time_list,
time_list) {
+if (dump_stats && !
Mesa (master): vc4: Use VC4_SET/GET_FIELD for some RCL packets.
Module: Mesa
Branch: master
Commit: 731ac05cc4e444175288032a76a29c95059af038
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=731ac05cc4e444175288032a76a29c95059af038
Author: Eric Anholt
Date: Thu Jun 11 16:08:11 2015 -0700
vc4: Use VC4_SET/GET_FIELD for some RCL packets.
---
src/gallium/drivers/vc4/kernel/vc4_packet.h | 55 --
src/gallium/drivers/vc4/kernel/vc4_validate.c | 21 -
src/gallium/drivers/vc4/vc4_blit.c| 29 ++--
src/gallium/drivers/vc4/vc4_context.c | 61 +
4 files changed, 89 insertions(+), 77 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_packet.h
b/src/gallium/drivers/vc4/kernel/vc4_packet.h
index af0997f..764a125 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_packet.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_packet.h
@@ -149,18 +149,19 @@ enum vc4_packet {
/** @{
*
- * byte 1 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
+ * byte 0-1 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
* VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
*/
-#define VC4_STORE_TILE_BUFFER_DISABLE_VG_MASK_CLEAR (1 << 7)
-#define VC4_STORE_TILE_BUFFER_DISABLE_ZS_CLEAR (1 << 6)
-#define VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR (1 << 5)
-#define VC4_STORE_TILE_BUFFER_DISABLE_SWAP (1 << 4)
-
-#define VC4_LOADSTORE_TILE_BUFFER_RGBA (0 << 0)
-#define VC4_LOADSTORE_TILE_BUFFER_BGR565_DITHER(1 << 0)
-#define VC4_LOADSTORE_TILE_BUFFER_BGR565 (2 << 0)
-#define VC4_LOADSTORE_TILE_BUFFER_MASK (3 << 0)
+#define VC4_STORE_TILE_BUFFER_DISABLE_VG_MASK_CLEAR (1 << 15)
+#define VC4_STORE_TILE_BUFFER_DISABLE_ZS_CLEAR (1 << 14)
+#define VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR (1 << 13)
+#define VC4_STORE_TILE_BUFFER_DISABLE_SWAP (1 << 12)
+
+#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK VC4_MASK(9, 8)
+#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT 8
+#define VC4_LOADSTORE_TILE_BUFFER_RGBA 0
+#define VC4_LOADSTORE_TILE_BUFFER_BGR565_DITHER1
+#define VC4_LOADSTORE_TILE_BUFFER_BGR565 2
/** @} */
/** @{
@@ -168,21 +169,24 @@ enum vc4_packet {
* byte 0 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
* VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
*/
+#define VC4_STORE_TILE_BUFFER_MODE_MASKVC4_MASK(7, 6)
+#define VC4_STORE_TILE_BUFFER_MODE_SHIFT 6
#define VC4_STORE_TILE_BUFFER_MODE_SAMPLE0 (0 << 6)
#define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X4 (1 << 6)
#define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X16(2 << 6)
/** The values of the field are VC4_TILING_FORMAT_* */
-#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK (3 << 4)
-#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT 4
-
-
-#define VC4_LOADSTORE_TILE_BUFFER_NONE (0 << 0)
-#define VC4_LOADSTORE_TILE_BUFFER_COLOR(1 << 0)
-#define VC4_LOADSTORE_TILE_BUFFER_ZS (2 << 0)
-#define VC4_LOADSTORE_TILE_BUFFER_Z(3 << 0)
-#define VC4_LOADSTORE_TILE_BUFFER_VG_MASK (4 << 0)
-#define VC4_LOADSTORE_TILE_BUFFER_FULL (5 << 0)
+#define VC4_LOADSTORE_TILE_BUFFER_TILING_MASK VC4_MASK(5, 4)
+#define VC4_LOADSTORE_TILE_BUFFER_TILING_SHIFT 4
+
+#define VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK VC4_MASK(2, 0)
+#define VC4_LOADSTORE_TILE_BUFFER_BUFFER_SHIFT 0
+#define VC4_LOADSTORE_TILE_BUFFER_NONE 0
+#define VC4_LOADSTORE_TILE_BUFFER_COLOR1
+#define VC4_LOADSTORE_TILE_BUFFER_ZS 2
+#define VC4_LOADSTORE_TILE_BUFFER_Z3
+#define VC4_LOADSTORE_TILE_BUFFER_VG_MASK 4
+#define VC4_LOADSTORE_TILE_BUFFER_FULL 5
/** @} */
#define VC4_INDEX_BUFFER_U8(0 << 4)
@@ -251,17 +255,18 @@ enum vc4_packet {
#define VC4_RENDER_CONFIG_ENABLE_VG_MASK (1 << 8)
/** The values of the field are VC4_TILING_FORMAT_* */
-#define VC4_RENDER_CONFIG_MEMORY_FORMAT_MASK (3 << 6)
+#define VC4_RENDER_CONFIG_MEMORY_FORMAT_MASK VC4_MASK(7, 6)
#define VC4_RENDER_CONFIG_MEMORY_FORMAT_SHIFT 6
#define VC4_RENDER_CONFIG_DECIMATE_MODE_1X (0 << 4)
#define VC4_RENDER_CONFIG_DECIMATE_MODE_4X (1 << 4)
#define VC4_RENDER_CONFIG_DECIMATE_MODE_16X(2 << 4)
-#define VC4_RENDER_CONFIG_FORMAT_BGR565_DITHERED (0 << 2)
-#define VC4_RENDER_CONFIG_FORMAT_RGBA (1 << 2)
-#define VC4_RENDER_CONFIG_FORMAT_BGR565(2 << 2)
-#define VC4_RENDER_CONFIG_FORMAT_MASK (3 << 2)
+#define VC4_RENDER_CONFIG_FORMAT_MASK VC4_MASK(3, 2)
+#define VC4_RENDER_CONFIG_FORMAT_SHIFT 2
+#define VC4_RENDER_CONFIG_FORMAT_BGR565_DITHERED 0
+#define VC4_RENDER_CONFIG_FORMAT_RGBA 1
+#define VC4_RENDER_CONFIG_FORMAT_BGR565
Mesa (master): vc4: Swap around which src we spill to ra31/rb31.
Module: Mesa
Branch: master
Commit: d4d27361499cac73da4716b571519ecb71cef551
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4d27361499cac73da4716b571519ecb71cef551
Author: Eric Anholt
Date: Mon Jun 15 17:47:12 2015 -0700
vc4: Swap around which src we spill to ra31/rb31.
I wanted to assert that src1 came from a non-unspilled register in shader
validation, and this easily gets us that. And, as a bonus:
total instructions in shared programs: 93347 -> 92723 (-0.67%)
instructions in affected programs: 60524 -> 59900 (-1.03%)
---
src/gallium/drivers/vc4/vc4_qpu_emit.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_qpu_emit.c
b/src/gallium/drivers/vc4/vc4_qpu_emit.c
index 577eb92..99afe4b 100644
--- a/src/gallium/drivers/vc4/vc4_qpu_emit.c
+++ b/src/gallium/drivers/vc4/vc4_qpu_emit.c
@@ -117,11 +117,11 @@ fixup_raddr_conflict(struct vc4_compile *c,
return;
if (mux0 == QPU_MUX_A) {
-queue(c, qpu_a_MOV(qpu_rb(31), *src1));
-*src1 = qpu_rb(31);
+queue(c, qpu_a_MOV(qpu_rb(31), *src0));
+*src0 = qpu_rb(31);
} else {
-queue(c, qpu_a_MOV(qpu_ra(31), *src1));
-*src1 = qpu_ra(31);
+queue(c, qpu_a_MOV(qpu_ra(31), *src0));
+*src0 = qpu_ra(31);
}
}
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Mesa (master): vc4: Drop the unused "stride" field of surfaces.
Module: Mesa
Branch: master
Commit: 596532cc7d477671f87116e0788b4214ae1d0559
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=596532cc7d477671f87116e0788b4214ae1d0559
Author: Eric Anholt
Date: Mon Jun 15 11:41:06 2015 -0700
vc4: Drop the unused "stride" field of surfaces.
We're always looking at the slice anyway, when we would have needed it.
---
src/gallium/drivers/vc4/vc4_resource.h |1 -
1 file changed, 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_resource.h
b/src/gallium/drivers/vc4/vc4_resource.h
index a81c470..ab8f5d3 100644
--- a/src/gallium/drivers/vc4/vc4_resource.h
+++ b/src/gallium/drivers/vc4/vc4_resource.h
@@ -45,7 +45,6 @@ struct vc4_resource_slice {
struct vc4_surface {
struct pipe_surface base;
uint32_t offset;
-uint32_t stride;
uint8_t tiling;
};
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Mesa (master): vc4: Move vc4_packet.h to the kernel/ directory, since it' s also shared.
Module: Mesa
Branch: master
Commit: 5fbbec9aae8185b96aa4cf6d778901dea44fefa4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5fbbec9aae8185b96aa4cf6d778901dea44fefa4
Author: Eric Anholt
Date: Wed Jun 10 12:47:56 2015 -0700
vc4: Move vc4_packet.h to the kernel/ directory, since it's also shared.
I want to notice discrepancies when I diff -u between Mesa and the kernel.
---
src/gallium/drivers/vc4/Makefile.sources |2 +-
src/gallium/drivers/vc4/{ => kernel}/vc4_packet.h |0
src/gallium/drivers/vc4/vc4_cl.h |2 +-
src/gallium/drivers/vc4/vc4_resource.h|2 +-
4 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/vc4/Makefile.sources
b/src/gallium/drivers/vc4/Makefile.sources
index f678b2f..edef493 100644
--- a/src/gallium/drivers/vc4/Makefile.sources
+++ b/src/gallium/drivers/vc4/Makefile.sources
@@ -1,6 +1,7 @@
C_SOURCES := \
kernel/vc4_drv.h \
kernel/vc4_gem.c \
+ kernel/vc4_packet.h \
kernel/vc4_validate.c \
kernel/vc4_validate_shaders.c \
vc4_blit.c \
@@ -24,7 +25,6 @@ C_SOURCES := \
vc4_opt_dead_code.c \
vc4_opt_small_immediates.c \
vc4_opt_vpm_writes.c \
- vc4_packet.h \
vc4_program.c \
vc4_qir.c \
vc4_qir_lower_uniforms.c \
diff --git a/src/gallium/drivers/vc4/vc4_packet.h
b/src/gallium/drivers/vc4/kernel/vc4_packet.h
similarity index 100%
rename from src/gallium/drivers/vc4/vc4_packet.h
rename to src/gallium/drivers/vc4/kernel/vc4_packet.h
diff --git a/src/gallium/drivers/vc4/vc4_cl.h b/src/gallium/drivers/vc4/vc4_cl.h
index 32a2e71..4a50e79 100644
--- a/src/gallium/drivers/vc4/vc4_cl.h
+++ b/src/gallium/drivers/vc4/vc4_cl.h
@@ -29,7 +29,7 @@
#include "util/u_math.h"
#include "util/macros.h"
-#include "vc4_packet.h"
+#include "kernel/vc4_packet.h"
struct vc4_bo;
diff --git a/src/gallium/drivers/vc4/vc4_resource.h
b/src/gallium/drivers/vc4/vc4_resource.h
index b3cba8f..a81c470 100644
--- a/src/gallium/drivers/vc4/vc4_resource.h
+++ b/src/gallium/drivers/vc4/vc4_resource.h
@@ -26,7 +26,7 @@
#define VC4_RESOURCE_H
#include "vc4_screen.h"
-#include "vc4_packet.h"
+#include "kernel/vc4_packet.h"
#include "util/u_transfer.h"
struct vc4_transfer {
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Mesa (master): vc4: Make symbolic values for packet sizes.
Module: Mesa
Branch: master
Commit: e22a1927844cdda499ea15f539028c16e47394ea
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e22a1927844cdda499ea15f539028c16e47394ea
Author: Eric Anholt
Date: Wed Jun 10 13:20:25 2015 -0700
vc4: Make symbolic values for packet sizes.
---
src/gallium/drivers/vc4/kernel/vc4_packet.h | 32 +++
src/gallium/drivers/vc4/kernel/vc4_validate.c | 71 +
src/gallium/drivers/vc4/vc4_blit.c| 12 ++---
src/gallium/drivers/vc4/vc4_context.c | 28 +-
4 files changed, 86 insertions(+), 57 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_packet.h
b/src/gallium/drivers/vc4/kernel/vc4_packet.h
index 181f2e0..af0997f 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_packet.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_packet.h
@@ -81,6 +81,38 @@ enum vc4_packet {
VC4_PACKET_GEM_HANDLES = 254,
} __attribute__ ((__packed__));
+#define VC4_PACKET_HALT_SIZE 1
+#define VC4_PACKET_NOP_SIZE1
+#define VC4_PACKET_FLUSH_SIZE 1
+#define VC4_PACKET_FLUSH_ALL_SIZE 1
+#define VC4_PACKET_START_TILE_BINNING_SIZE 1
+#define VC4_PACKET_INCREMENT_SEMAPHORE_SIZE1
+#define VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE 1
+#define VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE 5
+#define VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE 1
+#define VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF_SIZE 1
+#define VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE 7
+#define VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE 7
+#define VC4_PACKET_GL_INDEXED_PRIMITIVE_SIZE 14
+#define VC4_PACKET_GL_ARRAY_PRIMITIVE_SIZE 10
+#define VC4_PACKET_PRIMITIVE_LIST_FORMAT_SIZE 2
+#define VC4_PACKET_GL_SHADER_STATE_SIZE
5
+#define VC4_PACKET_NV_SHADER_STATE_SIZE
5
+#define VC4_PACKET_CONFIGURATION_BITS_SIZE 4
+#define VC4_PACKET_FLAT_SHADE_FLAGS_SIZE 5
+#define VC4_PACKET_POINT_SIZE_SIZE 5
+#define VC4_PACKET_LINE_WIDTH_SIZE 5
+#define VC4_PACKET_RHT_X_BOUNDARY_SIZE 3
+#define VC4_PACKET_DEPTH_OFFSET_SIZE 5
+#define VC4_PACKET_CLIP_WINDOW_SIZE9
+#define VC4_PACKET_VIEWPORT_OFFSET_SIZE
5
+#define VC4_PACKET_CLIPPER_XY_SCALING_SIZE 9
+#define VC4_PACKET_CLIPPER_Z_SCALING_SIZE 9
+#define VC4_PACKET_TILE_BINNING_MODE_CONFIG_SIZE 16
+#define VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE 11
+#define VC4_PACKET_CLEAR_COLORS_SIZE 14
+#define VC4_PACKET_TILE_COORDINATES_SIZE 3
+#define VC4_PACKET_GEM_HANDLES_SIZE9
#define VC4_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low))
/* Using the GNU statement expression extension */
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index aba5b51..a839270 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -633,6 +633,9 @@ validate_gem_handles(VALIDATE_ARGS)
return 0;
}
+#define VC4_DEFINE_PACKET(packet, bin, render, name, func) \
+ [packet] = { bin, render, packet ## _SIZE, name, func }
+
static const struct cmd_info {
bool bin;
bool render;
@@ -641,59 +644,59 @@ static const struct cmd_info {
int (*func)(struct vc4_exec_info *exec, void *validated,
void *untrusted);
} cmd_info[] = {
- [VC4_PACKET_HALT] = { 1, 1, 1, "halt", NULL },
- [VC4_PACKET_NOP] = { 1, 1, 1, "nop", NULL },
- [VC4_PACKET_FLUSH] = { 1, 1, 1, "flush", NULL },
- [VC4_PACKET_FLUSH_ALL] = { 1, 0, 1, "flush all state",
validate_flush_all },
- [VC4_PACKET_START_TILE_BINNING] = { 1, 0, 1, "start tile binning",
validate_start_tile_binning },
- [VC4_PACKET_INCREMENT_SEMAPHORE] = { 1, 0, 1, "increment semaphore",
validate_increment_semaphore },
- [VC4_PACKET_WAIT_ON_SEMAPHORE] = { 0, 1, 1, "wait on semaphore",
validate_wait_on_semaphore },
+ VC4_DEFINE_PACKET(VC4_PACKET_HALT, 1, 1, "halt", NULL),
+ VC4_DEFINE_PACKET(VC4_PACKET_NOP, 1, 1, "nop", NULL),
+ VC4_DEFI
Mesa (master): vc4: R4 is not a valid register for clamped direct texturing.
Module: Mesa
Branch: master
Commit: 507f3e708cbd10a4272aeffa0f066f1a80b48239
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=507f3e708cbd10a4272aeffa0f066f1a80b48239
Author: Eric Anholt
Date: Tue Jun 16 12:03:10 2015 -0700
vc4: R4 is not a valid register for clamped direct texturing.
Our array only goes to R3, and R4 is a special case that shouldn't be
used.
---
src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
b/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
index 2e727a4..ba1ae0a 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
@@ -88,7 +88,7 @@ raddr_add_a_to_live_reg_index(uint64_t inst)
return raddr_a;
} else if (add_a == QPU_MUX_B) {
return 32 + raddr_b;
- } else if (add_a <= QPU_MUX_R4) {
+ } else if (add_a <= QPU_MUX_R3) {
return 64 + add_a;
} else {
return ~0;
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Mesa (master): vc4: Handle refcounting the exec BO like we do in the kernel.
Module: Mesa
Branch: master
Commit: 6dd55b49090da22d3a8e9226507a95e914eaf10f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6dd55b49090da22d3a8e9226507a95e914eaf10f
Author: Eric Anholt
Date: Fri Jun 12 12:47:47 2015 -0700
vc4: Handle refcounting the exec BO like we do in the kernel.
This reduces the diff to the kernel, and will be useful when I make the
kernel allocate more BOs as part of validation.
---
src/gallium/drivers/vc4/kernel/vc4_drv.h |5 +
src/gallium/drivers/vc4/kernel/vc4_gem.c |3 +++
src/gallium/drivers/vc4/vc4_simulator.c | 16 +++-
src/gallium/drivers/vc4/vc4_simulator_validate.h | 20 +++-
4 files changed, 34 insertions(+), 10 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_drv.h
b/src/gallium/drivers/vc4/kernel/vc4_drv.h
index dede716..8e9230b 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_drv.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_drv.h
@@ -52,6 +52,11 @@ struct vc4_exec_info {
struct vc4_bo_exec_state *bo;
uint32_t bo_count;
+ /* List of other BOs used in the job that need to be released
+* once the job is complete.
+*/
+ struct list_head unref_list;
+
/* Current unvalidated indices into @bo loaded by the non-hardware
* VC4_PACKET_GEM_HANDLES.
*/
diff --git a/src/gallium/drivers/vc4/kernel/vc4_gem.c
b/src/gallium/drivers/vc4/kernel/vc4_gem.c
index ac29ab3..e559ddd 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_gem.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_gem.c
@@ -114,6 +114,9 @@ vc4_cl_validate(struct drm_device *dev, struct
vc4_exec_info *exec)
}
#endif
+ list_addtail(&to_vc4_bo(&exec->exec_bo->base)->unref_head,
+&exec->unref_list);
+
exec->ct0ca = exec->exec_bo->paddr + bin_offset;
exec->ct1ca = exec->exec_bo->paddr + render_offset;
diff --git a/src/gallium/drivers/vc4/vc4_simulator.c
b/src/gallium/drivers/vc4/vc4_simulator.c
index 2f72e72..2e4d879 100644
--- a/src/gallium/drivers/vc4/vc4_simulator.c
+++ b/src/gallium/drivers/vc4/vc4_simulator.c
@@ -39,10 +39,11 @@ vc4_wrap_bo_with_cma(struct drm_device *dev, struct vc4_bo
*bo)
{
struct vc4_context *vc4 = dev->vc4;
struct vc4_screen *screen = vc4->screen;
-struct drm_gem_cma_object *obj = CALLOC_STRUCT(drm_gem_cma_object);
+struct drm_vc4_bo *drm_bo = CALLOC_STRUCT(drm_vc4_bo);
+struct drm_gem_cma_object *obj = &drm_bo->base;
uint32_t size = align(bo->size, 4096);
-obj->bo = bo;
+drm_bo->bo = bo;
obj->base.size = size;
obj->vaddr = screen->simulator_mem_base + dev->simulator_mem_next;
obj->paddr = simpenrose_hw_addr(obj->vaddr);
@@ -94,7 +95,7 @@ vc4_simulator_unpin_bos(struct vc4_exec_info *exec)
{
for (int i = 0; i < exec->bo_count; i++) {
struct drm_gem_cma_object *obj = exec->bo[i].bo;
-struct vc4_bo *bo = obj->bo;
+struct vc4_bo *bo = to_vc4_bo(&obj->base)->bo;
memcpy(bo->map, obj->vaddr, bo->size);
@@ -124,6 +125,7 @@ vc4_simulator_flush(struct vc4_context *vc4, struct
drm_vc4_submit_cl *args)
int ret;
memset(&exec, 0, sizeof(exec));
+list_inithead(&exec.unref_list);
if (ctex && ctex->bo->simulator_winsys_map) {
#if 0
@@ -176,8 +178,12 @@ vc4_simulator_flush(struct vc4_context *vc4, struct
drm_vc4_submit_cl *args)
if (ret)
return ret;
-vc4_bo_unreference(&exec.exec_bo->bo);
-free(exec.exec_bo);
+list_for_each_entry_safe(struct drm_vc4_bo, bo, &exec.unref_list,
+ unref_head) {
+ list_del(&bo->unref_head);
+vc4_bo_unreference(&bo->bo);
+free(bo);
+}
if (ctex && ctex->bo->simulator_winsys_map) {
for (int y = 0; y < ctex->base.b.height0; y++) {
diff --git a/src/gallium/drivers/vc4/vc4_simulator_validate.h
b/src/gallium/drivers/vc4/vc4_simulator_validate.h
index a190326..c3b7a63 100644
--- a/src/gallium/drivers/vc4/vc4_simulator_validate.h
+++ b/src/gallium/drivers/vc4/vc4_simulator_validate.h
@@ -64,16 +64,26 @@ struct drm_device {
uint32_t simulator_mem_next;
};
-struct drm_gem_cma_object {
-struct vc4_bo *bo;
+struct drm_gem_object {
+uint32_t size;
+};
-struct {
-uint32_t size;
-} base;
+struct drm_gem_cma_object {
+struct drm_gem_object base;
uint32_t paddr;
void *vaddr;
};
+struct drm_vc4_bo {
+struct drm_gem_cma_object base;
+struct vc4_bo *bo;
+struct list_head unref_head;
+};
+
+static inline struct drm_
Mesa (master): vc4: Use symbolic values in texture ptype validation.
Module: Mesa
Branch: master
Commit: c2f82876014c9acb0518cf31a6f675fcc73c955a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2f82876014c9acb0518cf31a6f675fcc73c955a
Author: Eric Anholt
Date: Wed Jun 10 12:58:47 2015 -0700
vc4: Use symbolic values in texture ptype validation.
---
src/gallium/drivers/vc4/kernel/vc4_validate.c | 23 +--
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index 2b57ca0..aba5b51 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -814,10 +814,10 @@ reloc_tex(struct vc4_exec_info *exec,
uint32_t p3 = (sample->p_offset[3] != ~0 ?
*(uint32_t *)(uniform_data_u + sample->p_offset[3]) : 0);
uint32_t *validated_p0 = exec->uniforms_v + sample->p_offset[0];
- uint32_t offset = p0 & ~0xfff;
- uint32_t miplevels = (p0 & 15);
- uint32_t width = (p1 >> 8) & 2047;
- uint32_t height = (p1 >> 20) & 2047;
+ uint32_t offset = p0 & VC4_TEX_P0_OFFSET_MASK;
+ uint32_t miplevels = VC4_GET_FIELD(p0, VC4_TEX_P0_MIPLVLS);
+ uint32_t width = VC4_GET_FIELD(p1, VC4_TEX_P1_WIDTH);
+ uint32_t height = VC4_GET_FIELD(p1, VC4_TEX_P1_HEIGHT);
uint32_t cpp, tiling_format, utile_w, utile_h;
uint32_t i;
uint32_t cube_map_stride = 0;
@@ -845,16 +845,18 @@ reloc_tex(struct vc4_exec_info *exec,
if (height == 0)
height = 2048;
- if (p0 & (1 << 9)) {
- if ((p2 & (3 << 30)) == (1 << 30))
- cube_map_stride = p2 & 0x3000;
- if ((p3 & (3 << 30)) == (1 << 30)) {
+ if (p0 & VC4_TEX_P0_CMMODE_MASK) {
+ if (VC4_GET_FIELD(p2, VC4_TEX_P2_PTYPE) ==
+ VC4_TEX_P2_PTYPE_CUBE_MAP_STRIDE)
+ cube_map_stride = p2 & VC4_TEX_P2_CMST_MASK;
+ if (VC4_GET_FIELD(p3, VC4_TEX_P2_PTYPE) ==
+ VC4_TEX_P2_PTYPE_CUBE_MAP_STRIDE) {
if (cube_map_stride) {
DRM_ERROR("Cube map stride set twice\n");
return false;
}
- cube_map_stride = p3 & 0x3000;
+ cube_map_stride = p3 & VC4_TEX_P2_CMST_MASK;
}
if (!cube_map_stride) {
DRM_ERROR("Cube map stride not set\n");
@@ -862,7 +864,8 @@ reloc_tex(struct vc4_exec_info *exec,
}
}
- type = ((p0 >> 4) & 15) | ((p1 >> 31) << 4);
+ type = (VC4_GET_FIELD(p0, VC4_TEX_P0_TYPE) |
+ (VC4_GET_FIELD(p1, VC4_TEX_P1_TYPE4) << 4));
switch (type) {
case VC4_TEXTURE_TYPE_RGBA:
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Mesa (master): vc4: Factor out the live clamp register getter.
Module: Mesa
Branch: master
Commit: 2eac356467cef898ed05d0699077d9a9f4fa9156
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2eac356467cef898ed05d0699077d9a9f4fa9156
Author: Eric Anholt
Date: Mon Jun 15 14:54:26 2015 -0700
vc4: Factor out the live clamp register getter.
---
.../drivers/vc4/kernel/vc4_validate_shaders.c | 32 +++-
1 file changed, 24 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
b/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
index e5a75c5..2e727a4 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
@@ -77,6 +77,24 @@ waddr_to_live_reg_index(uint32_t waddr, bool is_b)
}
}
+static uint32_t
+raddr_add_a_to_live_reg_index(uint64_t inst)
+{
+ uint32_t add_a = QPU_GET_FIELD(inst, QPU_ADD_A);
+ uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A);
+ uint32_t raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B);
+
+ if (add_a == QPU_MUX_A) {
+ return raddr_a;
+ } else if (add_a == QPU_MUX_B) {
+ return 32 + raddr_b;
+ } else if (add_a <= QPU_MUX_R4) {
+ return 64 + add_a;
+ } else {
+ return ~0;
+ }
+}
+
static bool
is_tmu_submit(uint32_t waddr)
{
@@ -136,9 +154,8 @@ check_tmu_write(uint64_t inst,
uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
if (is_direct) {
- uint32_t add_a = QPU_GET_FIELD(inst, QPU_ADD_A);
uint32_t add_b = QPU_GET_FIELD(inst, QPU_ADD_B);
- uint32_t clamp_offset = ~0;
+ uint32_t clamp_reg, clamp_offset;
if (sig == QPU_SIG_SMALL_IMM) {
DRM_ERROR("direct TMU read used small immediate\n");
@@ -159,14 +176,13 @@ check_tmu_write(uint64_t inst,
* This is arbitrary, but simpler than supporting flipping the
* two either way.
*/
- if (add_a == QPU_MUX_A) {
- clamp_offset =
validation_state->live_clamp_offsets[raddr_a];
- } else if (add_a == QPU_MUX_B) {
- clamp_offset = validation_state->live_clamp_offsets[32
+ raddr_b];
- } else if (add_a <= QPU_MUX_R4) {
- clamp_offset = validation_state->live_clamp_offsets[64
+ add_a];
+ clamp_reg = raddr_add_a_to_live_reg_index(inst);
+ if (clamp_reg == ~0) {
+ DRM_ERROR("direct TMU load wasn't clamped\n");
+ return false;
}
+ clamp_offset = validation_state->live_clamp_offsets[clamp_reg];
if (clamp_offset == ~0) {
DRM_ERROR("direct TMU load wasn't clamped\n");
return false;
___
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Mesa (master): vc4: Make sure that direct texture clamps have a minimum value of 0.
Module: Mesa
Branch: master
Commit: a0cd1a4060fdb55a57609b460629c7059bbe7047
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0cd1a4060fdb55a57609b460629c7059bbe7047
Author: Eric Anholt
Date: Mon Jun 15 15:05:36 2015 -0700
vc4: Make sure that direct texture clamps have a minimum value of 0.
I was thinking of the MIN opcode in terms of unsigned math, but it's
signed, so if you used a negative array index, you could read before the
UBO. Fixes segfaults under simulation in piglit array indexing tests with
mprotect-based guard pages.
---
.../drivers/vc4/kernel/vc4_validate_shaders.c | 88 ++--
src/gallium/drivers/vc4/vc4_program.c |3 +
2 files changed, 66 insertions(+), 25 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
b/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
index ba1ae0a..ab9a651 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
@@ -58,7 +58,8 @@ struct vc4_shader_validation_state {
*
* This is used for the validation of direct address memory reads.
*/
- uint32_t live_clamp_offsets[32 + 32 + 4];
+ uint32_t live_min_clamp_offsets[32 + 32 + 4];
+ bool live_max_clamp_regs[32 + 32 + 4];
};
static uint32_t
@@ -80,13 +81,14 @@ waddr_to_live_reg_index(uint32_t waddr, bool is_b)
static uint32_t
raddr_add_a_to_live_reg_index(uint64_t inst)
{
+ uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
uint32_t add_a = QPU_GET_FIELD(inst, QPU_ADD_A);
uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A);
uint32_t raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B);
if (add_a == QPU_MUX_A) {
return raddr_a;
- } else if (add_a == QPU_MUX_B) {
+ } else if (add_a == QPU_MUX_B && sig != QPU_SIG_SMALL_IMM) {
return 32 + raddr_b;
} else if (add_a <= QPU_MUX_R3) {
return 64 + add_a;
@@ -182,7 +184,7 @@ check_tmu_write(uint64_t inst,
return false;
}
- clamp_offset = validation_state->live_clamp_offsets[clamp_reg];
+ clamp_offset =
validation_state->live_min_clamp_offsets[clamp_reg];
if (clamp_offset == ~0) {
DRM_ERROR("direct TMU load wasn't clamped\n");
return false;
@@ -245,8 +247,6 @@ check_register_write(uint64_t inst,
uint32_t waddr = (is_mul ?
QPU_GET_FIELD(inst, QPU_WADDR_MUL) :
QPU_GET_FIELD(inst, QPU_WADDR_ADD));
- bool is_b = is_mul != ((inst & QPU_WS) != 0);
- uint32_t live_reg_index;
switch (waddr) {
case QPU_W_UNIFORMS_ADDRESS:
@@ -301,14 +301,6 @@ check_register_write(uint64_t inst,
return true;
}
- /* Clear out the live offset clamp tracking for the written register.
-* If this particular instruction is setting up an offset clamp, it'll
-* get tracked immediately after we return.
-*/
- live_reg_index = waddr_to_live_reg_index(waddr, is_b);
- if (live_reg_index != ~0)
- validation_state->live_clamp_offsets[live_reg_index] = ~0;
-
return true;
}
@@ -317,26 +309,72 @@ track_live_clamps(uint64_t inst,
struct vc4_validated_shader_info *validated_shader,
struct vc4_shader_validation_state *validation_state)
{
+ uint32_t op_add = QPU_GET_FIELD(inst, QPU_OP_ADD);
uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD);
+ uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL);
+ uint32_t cond_add = QPU_GET_FIELD(inst, QPU_COND_ADD);
+ uint32_t add_a = QPU_GET_FIELD(inst, QPU_ADD_A);
uint32_t add_b = QPU_GET_FIELD(inst, QPU_ADD_B);
uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A);
uint32_t raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B);
uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
- bool is_b = inst & QPU_WS;
- uint32_t live_reg_index;
+ bool ws = inst & QPU_WS;
+ uint32_t lri_add_a, lri_add, lri_mul;
+ bool add_a_is_min_0;
- if (QPU_GET_FIELD(inst, QPU_OP_ADD) != QPU_A_MIN)
+ /* Check whether OP_ADD's A argumennt comes from a live MAX(x, 0),
+* before we clear previous live state.
+*/
+ lri_add_a = raddr_add_a_to_live_reg_index(inst);
+ add_a_is_min_0 = (lri_add_a != ~0 &&
+ validation_state->live_max_clamp_regs[lri_add_a]);
+
+ /* Clear live state for registers written by our instruction. */
+ lri_add = waddr_to_live_reg_index(waddr_add, ws);
+ lri_mul = waddr_to_live_reg_index(waddr_mul, !ws);
+ if (lri_mul != ~0) {
+ validation_state->live_max_clamp_regs[lri_mul] = f
Mesa (master): egl/dri2: Fix Android Lollipop build on ARM.
Module: Mesa Branch: master Commit: 71aaf62fca3ed8b18fc2dcd69be0fd6bb7e58a91 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=71aaf62fca3ed8b18fc2dcd69be0fd6bb7e58a91 Author: Eric Anholt Date: Sun Jun 7 16:47:25 2015 -0700 egl/dri2: Fix Android Lollipop build on ARM. Reviewed-by: Emil Velikov --- src/egl/drivers/dri2/Android.mk |1 + 1 file changed, 1 insertion(+) diff --git a/src/egl/drivers/dri2/Android.mk b/src/egl/drivers/dri2/Android.mk index d4d809b..109e4d4 100644 --- a/src/egl/drivers/dri2/Android.mk +++ b/src/egl/drivers/dri2/Android.mk @@ -36,6 +36,7 @@ LOCAL_CFLAGS := \ -DHAVE_ANDROID_PLATFORM ifeq ($(MESA_LOLLIPOP_BUILD),true) +LOCAL_CFLAGS_arm := -DDEFAULT_DRIVER_DIR=\"/system/lib/dri\" LOCAL_CFLAGS_x86 := -DDEFAULT_DRIVER_DIR=\"/system/lib/dri\" LOCAL_CFLAGS_x86_64 := -DDEFAULT_DRIVER_DIR=\"/system/lib64/dri\" else ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Add support for building on Android.
Module: Mesa Branch: master Commit: 6ce0b0e31754d88a542d4e3c90062e3f6a67f7b9 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ce0b0e31754d88a542d4e3c90062e3f6a67f7b9 Author: Eric Anholt Date: Wed Jun 3 10:15:31 2015 -0700 vc4: Add support for building on Android. v2: Add a comment explaining why we link libmesa_glsl. Drop warning option from freedreno. Add vc4 to the documentation for BOARD_GPU_DRIVERS. Reviewed-by: Emil Velikov --- Android.mk|4 ++-- src/gallium/Android.mk|5 + src/gallium/drivers/vc4/Android.mk| 37 + src/gallium/targets/dri/Android.mk|4 src/gallium/winsys/vc4/drm/Android.mk | 34 ++ 5 files changed, 82 insertions(+), 2 deletions(-) diff --git a/Android.mk b/Android.mk index 341978a..69e0d33 100644 --- a/Android.mk +++ b/Android.mk @@ -24,7 +24,7 @@ # BOARD_GPU_DRIVERS should be defined. The valid values are # # classic drivers: i915 i965 -# gallium drivers: swrast freedreno i915g ilo nouveau r300g r600g radeonsi vmwgfx +# gallium drivers: swrast freedreno i915g ilo nouveau r300g r600g radeonsi vc4 vmwgfx # # The main target is libGLES_mesa. For each classic driver enabled, a DRI # module will also be built. DRI modules will be loaded by libGLES_mesa. @@ -48,7 +48,7 @@ MESA_PYTHON2 := python DRM_GRALLOC_TOP := hardware/drm_gralloc classic_drivers := i915 i965 -gallium_drivers := swrast freedreno i915g ilo nouveau r300g r600g radeonsi vmwgfx +gallium_drivers := swrast freedreno i915g ilo nouveau r300g r600g radeonsi vmwgfx vc4 MESA_GPU_DRIVERS := $(strip $(BOARD_GPU_DRIVERS)) diff --git a/src/gallium/Android.mk b/src/gallium/Android.mk index a9c34d9..b946681 100644 --- a/src/gallium/Android.mk +++ b/src/gallium/Android.mk @@ -76,6 +76,11 @@ endif endif endif +# vc4 +ifneq ($(filter vc4, $(MESA_GPU_DRIVERS)),) +SUBDIRS += winsys/vc4/drm drivers/vc4 +endif + # vmwgfx ifneq ($(filter vmwgfx, $(MESA_GPU_DRIVERS)),) SUBDIRS += winsys/svga/drm drivers/svga diff --git a/src/gallium/drivers/vc4/Android.mk b/src/gallium/drivers/vc4/Android.mk new file mode 100644 index 000..f42a152 --- /dev/null +++ b/src/gallium/drivers/vc4/Android.mk @@ -0,0 +1,37 @@ +# Copyright (C) 2014 Emil Velikov +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included +# in all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +LOCAL_PATH := $(call my-dir) + +# get C_SOURCES +include $(LOCAL_PATH)/Makefile.sources + +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + $(C_SOURCES) + +LOCAL_SHARED_LIBRARIES := libdrm +# We need libmesa_glsl to get NIR's generated include directories. +LOCAL_STATIC_LIBRARIES := libmesa_glsl +LOCAL_MODULE := libmesa_pipe_vc4 + +include $(GALLIUM_COMMON_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/src/gallium/targets/dri/Android.mk b/src/gallium/targets/dri/Android.mk index 1772d25..5ba129b 100644 --- a/src/gallium/targets/dri/Android.mk +++ b/src/gallium/targets/dri/Android.mk @@ -90,6 +90,10 @@ ifneq ($(filter swrast,$(MESA_GPU_DRIVERS)),) gallium_DRIVERS += libmesa_pipe_softpipe libmesa_winsys_sw_dri libmesa_winsys_sw_kms_dri LOCAL_CFLAGS += -DGALLIUM_SOFTPIPE endif +ifneq ($(filter vc4,$(MESA_GPU_DRIVERS)),) +LOCAL_CFLAGS += -DGALLIUM_VC4 +gallium_DRIVERS += libmesa_winsys_vc4 libmesa_pipe_vc4 +endif ifneq ($(filter vmwgfx,$(MESA_GPU_DRIVERS)),) gallium_DRIVERS += libmesa_winsys_svga libmesa_pipe_svga LOCAL_CFLAGS += -DGALLIUM_VMWGFX diff --git a/src/gallium/winsys/vc4/drm/Android.mk b/src/gallium/winsys/vc4/drm/Android.mk new file mode 100644 index 000..55edc17 --- /dev/null +++ b/src/gallium/winsys/vc4/drm/Android.mk @@ -0,0 +1,34 @@ +# Copyright (C) 2014 Emil Velikov +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including
Mesa (master): gallium: Enable build of NIR support on Android.
Module: Mesa Branch: master Commit: fd3234891f7203d6b2b0992c34e880df325f75ea URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd3234891f7203d6b2b0992c34e880df325f75ea Author: Eric Anholt Date: Sun Jun 7 11:57:46 2015 -0700 gallium: Enable build of NIR support on Android. v2: Add a comment explaining why we link libmesa_glsl. Reviewed-by: Emil Velikov --- src/gallium/auxiliary/Android.mk |3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/auxiliary/Android.mk b/src/gallium/auxiliary/Android.mk index 2d91752..86430eb 100644 --- a/src/gallium/auxiliary/Android.mk +++ b/src/gallium/auxiliary/Android.mk @@ -30,6 +30,7 @@ include $(CLEAR_VARS) LOCAL_SRC_FILES := \ $(C_SOURCES) \ + $(NIR_SOURCES) \ $(VL_STUB_SOURCES) LOCAL_C_INCLUDES := \ @@ -43,7 +44,9 @@ LOCAL_SRC_FILES += \ LOCAL_CPPFLAGS := -std=c++11 endif +# We need libmesa_glsl to get NIR's generated include directories. LOCAL_MODULE := libmesa_gallium +LOCAL_STATIC_LIBRARIES += libmesa_glsl # generate sources LOCAL_MODULE_CLASS := STATIC_LIBRARIES ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): gallium: Drop the gallium-specific Android sw winsys.
Module: Mesa
Branch: master
Commit: bcd8a64f32f6387cbd8ed8d0bda0f49bd7dd4251
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bcd8a64f32f6387cbd8ed8d0bda0f49bd7dd4251
Author: Eric Anholt
Date: Tue Jun 9 11:45:05 2015 -0700
gallium: Drop the gallium-specific Android sw winsys.
This was part of gallium_egl, and we now have the normal libEGL Android
winsys support to handle it.
Reviewed-by: Emil Velikov
---
src/gallium/winsys/sw/android/Android.mk | 34 ---
.../winsys/sw/android/android_sw_winsys.cpp| 264
src/gallium/winsys/sw/android/android_sw_winsys.h | 48
3 files changed, 346 deletions(-)
diff --git a/src/gallium/winsys/sw/android/Android.mk
b/src/gallium/winsys/sw/android/Android.mk
deleted file mode 100644
index 4fb2715..000
--- a/src/gallium/winsys/sw/android/Android.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-# Mesa 3-D graphics library
-#
-# Copyright (C) 2010-2011 Chia-I Wu
-# Copyright (C) 2010-2011 LunarG Inc.
-#
-# Permission is hereby granted, free of charge, to any person obtaining a
-# copy of this software and associated documentation files (the "Software"),
-# to deal in the Software without restriction, including without limitation
-# the rights to use, copy, modify, merge, publish, distribute, sublicense,
-# and/or sell copies of the Software, and to permit persons to whom the
-# Software is furnished to do so, subject to the following conditions:
-#
-# The above copyright notice and this permission notice shall be included
-# in all copies or substantial portions of the Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
-# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-# DEALINGS IN THE SOFTWARE.
-
-LOCAL_PATH := $(call my-dir)
-
-include $(CLEAR_VARS)
-
-LOCAL_SRC_FILES := \
- android_sw_winsys.cpp
-
-LOCAL_MODULE := libmesa_winsys_sw_android
-
-include $(GALLIUM_COMMON_MK)
-include $(BUILD_STATIC_LIBRARY)
diff --git a/src/gallium/winsys/sw/android/android_sw_winsys.cpp
b/src/gallium/winsys/sw/android/android_sw_winsys.cpp
deleted file mode 100644
index 4b1040c..000
--- a/src/gallium/winsys/sw/android/android_sw_winsys.cpp
+++ /dev/null
@@ -1,264 +0,0 @@
-/*
- * Mesa 3-D graphics library
- *
- * Copyright (C) 2010-2011 LunarG Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *Chia-I Wu
- */
-
-#include "pipe/p_compiler.h"
-#include "pipe/p_state.h"
-#include "util/u_memory.h"
-#include "util/u_format.h"
-#include "state_tracker/sw_winsys.h"
-
-#include
-#include
-
-#if ANDROID_VERSION < 0x0300
-#include
-#endif
-
-#include "android_sw_winsys.h"
-
-struct android_sw_winsys
-{
- struct sw_winsys base;
-
- const gralloc_module_t *grmod;
-};
-
-struct android_sw_displaytarget
-{
- buffer_handle_t handle;
- int stride;
- int width, height;
- int usage; /* gralloc usage */
-
- void *mapped;
-};
-
-static INLINE struct android_sw_winsys *
-android_sw_winsys(struct sw_winsys *ws)
-{
- return (struct android_sw_winsys *) ws;
-}
-
-static INLINE struct android_sw_displaytarget *
-android_sw_displaytarget(struct sw_displaytarget *dt)
-{
- return (struct android_sw_displaytarget *) dt;
-}
-
-namespace android {
-
-static void
-android_displaytarget_display(struct sw_winsys *ws,
- struct sw_displaytarget *dt,
- void *context_private,
- struct pipe_box *box)
-{
-}
-
-static struct sw_displaytarget
Mesa (master): egl: Drop check for driver != NULL.
Module: Mesa
Branch: master
Commit: 932d1613d1e15ec22555e5ec09105c49eb850e36
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=932d1613d1e15ec22555e5ec09105c49eb850e36
Author: Eric Anholt
Date: Tue Jun 9 12:16:19 2015 -0700
egl: Drop check for driver != NULL.
Back in 2013, a patch was added (with 2 reviewers!) at the end of the
block to early exit the loop in this case, without noticing that the loop
already did. I added another early exit case, again without noticing, but
Rob caught me. Just drop the loop condition that apparently surprises
most of us, instead of leaving the end of the loop conspicuously not
exiting on success.
Reviewed-by: Ian Romanick
Reviewed-by: Rob Clark
---
src/egl/drivers/dri2/egl_dri2.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 44a6c96..dceb9a0 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -397,7 +397,7 @@ dri2_open_driver(_EGLDisplay *disp)
dri2_dpy->driver = NULL;
end = search_paths + strlen(search_paths);
- for (p = search_paths; p < end && dri2_dpy->driver == NULL; p = next + 1) {
+ for (p = search_paths; p < end; p = next + 1) {
int len;
next = strchr(p, ':');
if (next == NULL)
___
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Mesa (master): vc4: Update to current kernel validation code.
Module: Mesa
Branch: master
Commit: e67b12eaf89acc9c446de77b77120a2f6cdbbe12
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e67b12eaf89acc9c446de77b77120a2f6cdbbe12
Author: Eric Anholt
Date: Mon Jun 1 12:50:49 2015 -0700
vc4: Update to current kernel validation code.
After profiling on real hardware, I found a few ways to cut down the
kernel overhead.
---
src/gallium/drivers/vc4/kernel/vc4_drv.h |3 +-
src/gallium/drivers/vc4/kernel/vc4_validate.c| 68 +++---
src/gallium/drivers/vc4/vc4_simulator_validate.h |1 +
3 files changed, 37 insertions(+), 35 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_drv.h
b/src/gallium/drivers/vc4/kernel/vc4_drv.h
index 325f944..dede716 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_drv.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_drv.h
@@ -89,7 +89,8 @@ struct vc4_exec_info {
bool found_wait_on_semaphore_packet;
uint8_t bin_tiles_x, bin_tiles_y;
uint32_t fb_width, fb_height;
- uint32_t tile_alloc_init_block_size;
+ uint32_t tile_alloc_init_block_mask;
+ uint32_t tile_alloc_init_block_last;
struct drm_gem_cma_object *tile_alloc_bo;
/**
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index 2d04a4a..2b57ca0 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -156,24 +156,30 @@ check_tex_size(struct vc4_exec_info *exec, struct
drm_gem_cma_object *fbo,
uint32_t utile_w = utile_width(cpp);
uint32_t utile_h = utile_height(cpp);
- /* The values are limited by the packet/texture parameter bitfields,
-* so we don't need to worry as much about integer overflow.
+ /* The shaded vertex format stores signed 12.4 fixed point
+* (-2048,2047) offsets from the viewport center, so we should
+* never have a render target larger than 4096. The texture
+* unit can only sample from 2048x2048, so it's even more
+* restricted. This lets us avoid worrying about overflow in
+* our math.
*/
- BUG_ON(width > 65535);
- BUG_ON(height > 65535);
+ if (width > 4096 || height > 4096) {
+ DRM_ERROR("Surface dimesions (%d,%d) too large", width, height);
+ return false;
+ }
switch (tiling_format) {
case VC4_TILING_FORMAT_LINEAR:
- aligned_width = roundup(width, utile_w);
+ aligned_width = round_up(width, utile_w);
aligned_height = height;
break;
case VC4_TILING_FORMAT_T:
- aligned_width = roundup(width, utile_w * 8);
- aligned_height = roundup(height, utile_h * 8);
+ aligned_width = round_up(width, utile_w * 8);
+ aligned_height = round_up(height, utile_h * 8);
break;
case VC4_TILING_FORMAT_LT:
- aligned_width = roundup(width, utile_w);
- aligned_height = roundup(height, utile_h);
+ aligned_width = round_up(width, utile_w);
+ aligned_height = round_up(height, utile_h);
break;
default:
DRM_ERROR("buffer tiling %d unsupported\n", tiling_format);
@@ -181,13 +187,6 @@ check_tex_size(struct vc4_exec_info *exec, struct
drm_gem_cma_object *fbo,
}
stride = aligned_width * cpp;
-
- if (INT_MAX / stride < aligned_height) {
- DRM_ERROR("Overflow in fbo size (%dx%d -> %dx%d)\n",
- width, height,
- aligned_width, aligned_height);
- return false;
- }
size = stride * aligned_height;
if (size + offset < size ||
@@ -269,14 +268,11 @@ validate_wait_on_semaphore(VALIDATE_ARGS)
static int
validate_branch_to_sublist(VALIDATE_ARGS)
{
- struct drm_gem_cma_object *target;
uint32_t offset;
- if (!vc4_use_handle(exec, 0, VC4_MODE_TILE_ALLOC, &target))
- return -EINVAL;
-
- if (target != exec->tile_alloc_bo) {
- DRM_ERROR("Jumping to BOs other than tile alloc unsupported\n");
+ if (!exec->tile_alloc_bo) {
+ DRM_ERROR("VC4_PACKET_BRANCH_TO_SUB_LIST seen before "
+ "binner setup\n");
return -EINVAL;
}
@@ -286,15 +282,14 @@ validate_branch_to_sublist(VALIDATE_ARGS)
}
offset = *(uint32_t *)(untrusted + 0);
- if (offset % exec->tile_alloc_init_block_size ||
- offset / exec->tile_alloc_init_block_size >=
- exec->bin_tiles_x * exec->bin_tiles_y) {
+ if (offset & exec->tile_alloc_init_block_mask ||
+ offset > exec->tile_alloc_init_block_last) {
Mesa (master): android: add rules to build gallium/state_trackers/dri
Module: Mesa Branch: master Commit: f4f609b27e4fbefb52b84b617051fb4cdba45c8f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f4f609b27e4fbefb52b84b617051fb4cdba45c8f Author: Chih-Wei Huang Date: Wed May 20 11:25:27 2015 +0800 android: add rules to build gallium/state_trackers/dri Signed-off-by: Chih-Wei Huang Reviewed-by: Eric Anholt --- src/gallium/Android.mk|5 ++- src/gallium/state_trackers/dri/Android.mk | 64 + 2 files changed, 67 insertions(+), 2 deletions(-) diff --git a/src/gallium/Android.mk b/src/gallium/Android.mk index b2662ff..aaa07bc 100644 --- a/src/gallium/Android.mk +++ b/src/gallium/Android.mk @@ -79,5 +79,6 @@ ifneq ($(filter vmwgfx, $(MESA_GPU_DRIVERS)),) SUBDIRS += winsys/svga/drm drivers/svga endif -mkfiles := $(patsubst %,$(GALLIUM_TOP)/%/Android.mk,$(SUBDIRS)) -include $(mkfiles) +SUBDIRS += state_trackers/dri + +include $(call all-named-subdir-makefiles,$(SUBDIRS)) diff --git a/src/gallium/state_trackers/dri/Android.mk b/src/gallium/state_trackers/dri/Android.mk new file mode 100644 index 000..188e4a1 --- /dev/null +++ b/src/gallium/state_trackers/dri/Android.mk @@ -0,0 +1,64 @@ +# Mesa 3-D graphics library +# +# Copyright (C) 2015 Chih-Wei Huang +# Copyright (C) 2015 Android-x86 Open Source Project +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included +# in all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +LOCAL_PATH := $(call my-dir) + +include $(LOCAL_PATH)/Makefile.sources + +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(common_SOURCES) + +LOCAL_CFLAGS := \ + -DGALLIUM_STATIC_TARGETS=1 \ + +LOCAL_C_INCLUDES := \ + $(MESA_TOP)/src/mapi \ + $(MESA_TOP)/src/mesa \ + +LOCAL_EXPORT_C_INCLUDE_DIRS := \ + $(LOCAL_PATH) \ + $(LOCAL_C_INCLUDES) \ + +LOCAL_STATIC_LIBRARIES := \ + libmesa_dri_common \ + +ifneq ($(filter swrast,$(MESA_GPU_DRIVERS)),) +LOCAL_CFLAGS += -DGALLIUM_SOFTPIPE +LOCAL_SRC_FILES += $(drisw_SOURCES) +endif + +# swrast only? +ifeq ($(MESA_GPU_DRIVERS),swrast) +LOCAL_CFLAGS += -D__NOT_HAVE_DRM_H +else +LOCAL_SRC_FILES += $(dri2_SOURCES) +LOCAL_SHARED_LIBRARIES := libdrm +endif + +LOCAL_MODULE := libmesa_st_dri + +LOCAL_GENERATED_SOURCES := $(MESA_DRI_OPTIONS_H) + +include $(GALLIUM_COMMON_MK) +include $(BUILD_STATIC_LIBRARY) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): android: enable the radeonsi driver
Module: Mesa Branch: master Commit: 1842832660c4eade037caa760110b58a2d7f055b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1842832660c4eade037caa760110b58a2d7f055b Author: Chih-Wei Huang Date: Wed May 20 11:25:34 2015 +0800 android: enable the radeonsi driver Based on the nice work of Paulo Sergio Travaglia . The main modifications are: - Include paths for LLVM header files and shared/static libraries - Set C++ flag "c++11" to avoid compiling errors on LLVM header files - Set defines for LLVM - Add GALLIVM source files - Changes path of libelf library for lollipop Signed-off-by: Chih-Wei Huang Acked-by: Eric Anholt --- Android.common.mk |8 Android.mk|2 ++ src/gallium/Android.common.mk |8 src/gallium/auxiliary/Android.mk |8 src/gallium/drivers/radeon/Android.mk |4 src/gallium/targets/dri/Android.mk| 10 ++ 6 files changed, 40 insertions(+) diff --git a/Android.common.mk b/Android.common.mk index edf52d6..43766bf 100644 --- a/Android.common.mk +++ b/Android.common.mk @@ -68,6 +68,14 @@ LOCAL_CFLAGS += \ endif endif +ifeq ($(MESA_ENABLE_LLVM),true) +LOCAL_CFLAGS += \ + -DHAVE_LLVM=0x0305 -DLLVM_VERSION_PATCH=2 \ + -D__STDC_CONSTANT_MACROS \ + -D__STDC_FORMAT_MACROS \ + -D__STDC_LIMIT_MACROS +endif + LOCAL_CPPFLAGS += \ -Wno-error=non-virtual-dtor \ -Wno-non-virtual-dtor diff --git a/Android.mk b/Android.mk index 6a09a9d..341978a 100644 --- a/Android.mk +++ b/Android.mk @@ -80,6 +80,8 @@ else MESA_BUILD_GALLIUM := false endif +MESA_ENABLE_LLVM := $(if $(filter radeonsi,$(MESA_GPU_DRIVERS)),true,false) + # add subdirectories ifneq ($(strip $(MESA_GPU_DRIVERS)),) diff --git a/src/gallium/Android.common.mk b/src/gallium/Android.common.mk index 782510f..7c6c7ac 100644 --- a/src/gallium/Android.common.mk +++ b/src/gallium/Android.common.mk @@ -29,4 +29,12 @@ LOCAL_C_INCLUDES += \ $(GALLIUM_TOP)/winsys \ $(GALLIUM_TOP)/drivers +ifeq ($(MESA_ENABLE_LLVM),true) +LOCAL_C_INCLUDES += \ + external/llvm/include \ + external/llvm/device/include \ + external/libcxx/include \ + external/elfutils/$(if $(filter true,$(MESA_LOLLIPOP_BUILD)),0.153/)libelf +endif + include $(MESA_COMMON_MK) diff --git a/src/gallium/auxiliary/Android.mk b/src/gallium/auxiliary/Android.mk index 96a2125..2d91752 100644 --- a/src/gallium/auxiliary/Android.mk +++ b/src/gallium/auxiliary/Android.mk @@ -35,6 +35,14 @@ LOCAL_SRC_FILES := \ LOCAL_C_INCLUDES := \ $(GALLIUM_TOP)/auxiliary/util +ifeq ($(MESA_ENABLE_LLVM),true) +LOCAL_SRC_FILES += \ + $(GALLIVM_SOURCES) \ + $(GALLIVM_CPP_SOURCES) + +LOCAL_CPPFLAGS := -std=c++11 +endif + LOCAL_MODULE := libmesa_gallium # generate sources diff --git a/src/gallium/drivers/radeon/Android.mk b/src/gallium/drivers/radeon/Android.mk index d615792..6997a6d 100644 --- a/src/gallium/drivers/radeon/Android.mk +++ b/src/gallium/drivers/radeon/Android.mk @@ -30,6 +30,10 @@ include $(CLEAR_VARS) LOCAL_SRC_FILES := $(C_SOURCES) +ifeq ($(MESA_ENABLE_LLVM),true) +LOCAL_SRC_FILES += $(LLVM_C_FILES) +endif + LOCAL_SHARED_LIBRARIES := libdrm libdrm_radeon LOCAL_MODULE := libmesa_pipe_radeon diff --git a/src/gallium/targets/dri/Android.mk b/src/gallium/targets/dri/Android.mk index ac33a6e..78f7b7c 100644 --- a/src/gallium/targets/dri/Android.mk +++ b/src/gallium/targets/dri/Android.mk @@ -80,6 +80,7 @@ LOCAL_CFLAGS += -DGALLIUM_R600 endif ifneq ($(filter radeonsi,$(MESA_GPU_DRIVERS)),) gallium_DRIVERS += libmesa_pipe_radeonsi +LOCAL_SHARED_LIBRARIES += libLLVM LOCAL_CFLAGS += -DGALLIUM_RADEONSI endif gallium_DRIVERS += libmesa_winsys_radeon libmesa_pipe_radeon @@ -108,5 +109,14 @@ LOCAL_STATIC_LIBRARIES := \ libmesa_util \ libmesa_loader \ +ifeq ($(MESA_ENABLE_LLVM),true) +LOCAL_STATIC_LIBRARIES += \ + libLLVMR600CodeGen \ + libLLVMR600Desc \ + libLLVMR600Info \ + libLLVMR600AsmPrinter \ + libelf +endif + include $(GALLIUM_COMMON_MK) include $(BUILD_SHARED_LIBRARY) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): android: try to load gallium_dri.so directly
Module: Mesa
Branch: master
Commit: c3b5afbd4e682f76e16ea85883af571165bd24ee
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3b5afbd4e682f76e16ea85883af571165bd24ee
Author: Chih-Wei Huang
Date: Wed May 20 11:25:30 2015 +0800
android: try to load gallium_dri.so directly
This avoids needing hardlinks between all of the DRI driver .so names,
since we're the only loader on the system.
v2: Add early exit on success (like previous block) and log message on
failure.
Signed-off-by: Chih-Wei Huang
Reviewed-by: Eric Anholt
---
src/egl/drivers/dri2/egl_dri2.c |9 +
1 file changed, 9 insertions(+)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 82f8843..44a6c96 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -419,6 +419,15 @@ dri2_open_driver(_EGLDisplay *disp)
/* not need continue to loop all paths once the driver is found */
if (dri2_dpy->driver != NULL)
break;
+
+#ifdef ANDROID
+ snprintf(path, sizeof path, "%.*s/gallium_dri.so", len, p);
+ dri2_dpy->driver = dlopen(path, RTLD_NOW | RTLD_GLOBAL);
+ if (dri2_dpy->driver == NULL)
+ _eglLog(_EGL_DEBUG, "failed to open %s: %s\n", path, dlerror());
+ else
+ break;
+#endif
}
if (dri2_dpy->driver == NULL) {
___
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Mesa (master): android: Depend on gallium_dri from EGL, instead of linking in gallium.
Module: Mesa Branch: master Commit: ac296aee58158ccf1953e812a04f99eb5f8eb57b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac296aee58158ccf1953e812a04f99eb5f8eb57b Author: Chih-Wei Huang Date: Wed May 20 11:25:29 2015 +0800 android: Depend on gallium_dri from EGL, instead of linking in gallium. The Android gallium build used to use gallium_egl, which was removed back in March. Instead, we will now use a normal Mesa libEGL loader with dlopen()ing of a DRI module. v2: add a clean step to rebuild all dri modules properly. v3: Squish the 2 patches doing this together (change by anholt). Signed-off-by: Chih-Wei Huang Reviewed-by: Eric Anholt --- Android.mk |6 +--- CleanSpec.mk|1 + src/egl/main/Android.mk | 83 ++- 3 files changed, 5 insertions(+), 85 deletions(-) diff --git a/Android.mk b/Android.mk index b19419b..6a09a9d 100644 --- a/Android.mk +++ b/Android.mk @@ -89,13 +89,9 @@ SUBDIRS := \ src/glsl \ src/mesa \ src/util \ - src/egl/main - -ifeq ($(strip $(MESA_BUILD_CLASSIC)),true) -SUBDIRS += \ + src/egl/main \ src/egl/drivers/dri2 \ src/mesa/drivers/dri -endif ifeq ($(strip $(MESA_BUILD_GALLIUM)),true) SUBDIRS += src/gallium diff --git a/CleanSpec.mk b/CleanSpec.mk index 2068163..d08b0de 100644 --- a/CleanSpec.mk +++ b/CleanSpec.mk @@ -13,3 +13,4 @@ $(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/libGLES_mesa_int $(call add-clean-step, rm -rf $(HOST_OUT_release)/*/EXECUTABLES/mesa_*_intermediates) $(call add-clean-step, rm -rf $(HOST_OUT_release)/*/EXECUTABLES/glsl_compiler_intermediates) $(call add-clean-step, rm -rf $(HOST_OUT_release)/*/STATIC_LIBRARIES/libmesa_*_intermediates) +$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/*_dri_intermediates) diff --git a/src/egl/main/Android.mk b/src/egl/main/Android.mk index 12b66d0..8f687e9 100644 --- a/src/egl/main/Android.mk +++ b/src/egl/main/Android.mk @@ -43,8 +43,6 @@ LOCAL_CFLAGS := \ -D_EGL_DRIVER_SEARCH_DIR=\"/system/lib/egl\" \ -D_EGL_OS_UNIX=1 -LOCAL_STATIC_LIBRARIES := - LOCAL_SHARED_LIBRARIES := \ libglapi \ libdl \ @@ -62,95 +60,20 @@ ifneq ($(MESA_GPU_DRIVERS),swrast) LOCAL_SHARED_LIBRARIES += libdrm endif -ifeq ($(strip $(MESA_BUILD_CLASSIC)),true) LOCAL_CFLAGS += -D_EGL_BUILT_IN_DRIVER_DRI2 -LOCAL_STATIC_LIBRARIES += libmesa_egl_dri2 +ifeq ($(strip $(MESA_BUILD_CLASSIC)),true) # require i915_dri and/or i965_dri LOCAL_REQUIRED_MODULES += \ $(addsuffix _dri, $(filter i915 i965, $(MESA_GPU_DRIVERS))) endif # MESA_BUILD_CLASSIC ifeq ($(strip $(MESA_BUILD_GALLIUM)),true) - -gallium_DRIVERS := - -# swrast -gallium_DRIVERS += libmesa_pipe_softpipe libmesa_winsys_sw_android - -# freedreno -ifneq ($(filter freedreno, $(MESA_GPU_DRIVERS)),) -gallium_DRIVERS += libmesa_winsys_freedreno libmesa_pipe_freedreno -LOCAL_SHARED_LIBRARIES += libdrm_freedreno -endif - -# i915g -ifneq ($(filter i915g, $(MESA_GPU_DRIVERS)),) -gallium_DRIVERS += libmesa_winsys_i915 libmesa_pipe_i915 -LOCAL_SHARED_LIBRARIES += libdrm_intel -endif - -# ilo -ifneq ($(filter ilo, $(MESA_GPU_DRIVERS)),) -gallium_DRIVERS += libmesa_winsys_intel libmesa_pipe_ilo -LOCAL_SHARED_LIBRARIES += libdrm_intel -endif - -# nouveau -ifneq ($(filter nouveau, $(MESA_GPU_DRIVERS)),) -gallium_DRIVERS += libmesa_winsys_nouveau libmesa_pipe_nouveau -LOCAL_SHARED_LIBRARIES += libdrm_nouveau -LOCAL_SHARED_LIBRARIES += libstlport -endif - -# r300g/r600g/radeonsi -ifneq ($(filter r300g r600g radeonsi, $(MESA_GPU_DRIVERS)),) -gallium_DRIVERS += libmesa_winsys_radeon -LOCAL_SHARED_LIBRARIES += libdrm_radeon -ifneq ($(filter r300g, $(MESA_GPU_DRIVERS)),) -gallium_DRIVERS += libmesa_pipe_r300 -endif # r300g -ifneq ($(filter r600g radeonsi, $(MESA_GPU_DRIVERS)),) -ifneq ($(filter r600g, $(MESA_GPU_DRIVERS)),) -gallium_DRIVERS += libmesa_pipe_r600 -LOCAL_SHARED_LIBRARIES += libstlport -endif # r600g -ifneq ($(filter radeonsi, $(MESA_GPU_DRIVERS)),) -gallium_DRIVERS += libmesa_pipe_radeonsi -endif # radeonsi -gallium_DRIVERS += libmesa_pipe_radeon -endif # r600g || radeonsi -endif # r300g || r600g || radeonsi - -# vmwgfx -ifneq ($(filter vmwgfx, $(MESA_GPU_DRIVERS)),) -gallium_DRIVERS += libmesa_winsys_svga libmesa_pipe_svga -endif - -# -# Notes about the order here: -# -# * libmesa_st_egl depends on libmesa_winsys_sw_android in $(gallium_DRIVERS) -# * libmesa_pipe_r300 in $(gallium_DRIVERS) depends on libmesa_st_mesa and -#libmesa_glsl -# * libmesa_st_mesa depends on libmesa_glsl -# * libmesa_glsl depends on libmesa_glsl_utils -# -LOCAL_STATIC_LIBRARIES := \ - libmesa_egl_gallium \ - libmesa_st_egl \ - $(gallium_DRIVERS) \ - libmesa_st_mesa \ - libmesa_util \ - libmesa_glsl \ - libmesa_glsl_utils \ - libmesa_gallium \ - $(LOCAL_STATIC_LIBRARIES) - +LOCAL_REQUIRED_MODULES += gallium_
Mesa (master): android: add rules to build a gallium_dri.so
Module: Mesa Branch: master Commit: 933df3d3350867282d7334c94abf1ec677d78029 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=933df3d3350867282d7334c94abf1ec677d78029 Author: Chih-Wei Huang Date: Wed May 20 11:25:28 2015 +0800 android: add rules to build a gallium_dri.so This single .so includes all of the enabled gallium drivers. Signed-off-by: Chih-Wei Huang Reviewed-by: Eric Anholt --- src/gallium/Android.mk |7 +- src/gallium/targets/dri/Android.mk | 112 ++ src/gallium/winsys/sw/dri/Android.mk | 35 ++ src/gallium/winsys/sw/kms-dri/Android.mk | 37 ++ 4 files changed, 189 insertions(+), 2 deletions(-) diff --git a/src/gallium/Android.mk b/src/gallium/Android.mk index aaa07bc..a9c34d9 100644 --- a/src/gallium/Android.mk +++ b/src/gallium/Android.mk @@ -33,7 +33,9 @@ SUBDIRS := auxiliary # # swrast -SUBDIRS += winsys/sw/android drivers/softpipe +ifneq ($(filter swrast,$(MESA_GPU_DRIVERS)),) +SUBDIRS += winsys/sw/dri winsys/sw/kms-dri drivers/softpipe +endif # freedreno ifneq ($(filter freedreno, $(MESA_GPU_DRIVERS)),) @@ -79,6 +81,7 @@ ifneq ($(filter vmwgfx, $(MESA_GPU_DRIVERS)),) SUBDIRS += winsys/svga/drm drivers/svga endif -SUBDIRS += state_trackers/dri +# Gallium state trackers and target for dri +SUBDIRS += state_trackers/dri targets/dri include $(call all-named-subdir-makefiles,$(SUBDIRS)) diff --git a/src/gallium/targets/dri/Android.mk b/src/gallium/targets/dri/Android.mk new file mode 100644 index 000..ac33a6e --- /dev/null +++ b/src/gallium/targets/dri/Android.mk @@ -0,0 +1,112 @@ +# Mesa 3-D graphics library +# +# Copyright (C) 2015 Chih-Wei Huang +# Copyright (C) 2015 Android-x86 Open Source Project +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included +# in all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +LOCAL_PATH := $(call my-dir) + +include $(CLEAR_VARS) + +LOCAL_MODULE := gallium_dri + +ifeq ($(MESA_LOLLIPOP_BUILD),true) +LOCAL_MODULE_RELATIVE_PATH := $(notdir $(MESA_DRI_MODULE_PATH)) +else +LOCAL_MODULE_PATH := $(MESA_DRI_MODULE_PATH) +endif + +LOCAL_SRC_FILES := target.c + +LOCAL_CFLAGS := -DDRI_TARGET -DHAVE_LIBDRM + +LOCAL_SHARED_LIBRARIES := \ + libdl \ + libglapi \ + libexpat \ + +# swrast only? +ifeq ($(MESA_GPU_DRIVERS),swrast) +LOCAL_CFLAGS += -D__NOT_HAVE_DRM_H +else +LOCAL_SHARED_LIBRARIES += libdrm +endif + +ifneq ($(filter freedreno,$(MESA_GPU_DRIVERS)),) +LOCAL_CFLAGS += -DGALLIUM_FREEDRENO +gallium_DRIVERS += libmesa_winsys_freedreno libmesa_pipe_freedreno +LOCAL_SHARED_LIBRARIES += libdrm_freedreno +endif +ifneq ($(filter i915g,$(MESA_GPU_DRIVERS)),) +gallium_DRIVERS += libmesa_winsys_i915 libmesa_pipe_i915 +LOCAL_SHARED_LIBRARIES += libdrm_intel +LOCAL_CFLAGS += -DGALLIUM_I915 +endif +ifneq ($(filter ilo,$(MESA_GPU_DRIVERS)),) +gallium_DRIVERS += libmesa_winsys_intel libmesa_pipe_ilo +LOCAL_SHARED_LIBRARIES += libdrm_intel +LOCAL_CFLAGS += -DGALLIUM_ILO +endif +ifneq ($(filter nouveau,$(MESA_GPU_DRIVERS)),) +gallium_DRIVERS += libmesa_winsys_nouveau libmesa_pipe_nouveau +LOCAL_CFLAGS += -DGALLIUM_NOUVEAU +LOCAL_SHARED_LIBRARIES += libdrm_nouveau +endif +ifneq ($(filter r%,$(MESA_GPU_DRIVERS)),) +ifneq ($(filter r300g,$(MESA_GPU_DRIVERS)),) +gallium_DRIVERS += libmesa_pipe_r300 +LOCAL_CFLAGS += -DGALLIUM_R300 +endif +ifneq ($(filter r600g,$(MESA_GPU_DRIVERS)),) +gallium_DRIVERS += libmesa_pipe_r600 +LOCAL_CFLAGS += -DGALLIUM_R600 +endif +ifneq ($(filter radeonsi,$(MESA_GPU_DRIVERS)),) +gallium_DRIVERS += libmesa_pipe_radeonsi +LOCAL_CFLAGS += -DGALLIUM_RADEONSI +endif +gallium_DRIVERS += libmesa_winsys_radeon libmesa_pipe_radeon +LOCAL_SHARED_LIBRARIES += libdrm_radeon +endif +ifneq ($(filter swrast,$(MESA_GPU_DRIVERS)),) +gallium_DRIVERS += libmesa_pipe_softpipe libmesa_winsys_sw_dri libmesa_winsys_sw_kms_dri +LOCAL_CFLAGS += -DGALLIUM_SOFTPIPE +endif +ifneq ($(filter vmwgfx,$(MESA_GPU_DRIVERS)),) +gallium_DRIVERS += libmesa_winsys_svga libmesa_pip
Mesa (master): android: loader: export the path to be included
Module: Mesa Branch: master Commit: b8213bbe4cec5bab89e07aab8d225e617d4a2087 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8213bbe4cec5bab89e07aab8d225e617d4a2087 Author: Chih-Wei Huang Date: Wed May 20 11:25:25 2015 +0800 android: loader: export the path to be included Signed-off-by: Chih-Wei Huang Reviewed-by: Eric Anholt --- src/egl/drivers/dri2/Android.mk |1 - src/loader/Android.mk |2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/egl/drivers/dri2/Android.mk b/src/egl/drivers/dri2/Android.mk index 5931ce8..d4d809b 100644 --- a/src/egl/drivers/dri2/Android.mk +++ b/src/egl/drivers/dri2/Android.mk @@ -45,7 +45,6 @@ endif LOCAL_C_INCLUDES := \ $(MESA_TOP)/src/mapi \ $(MESA_TOP)/src/egl/main \ - $(MESA_TOP)/src/loader \ $(DRM_GRALLOC_TOP) LOCAL_STATIC_LIBRARIES := \ diff --git a/src/loader/Android.mk b/src/loader/Android.mk index 8e215de..92d9fd2 100644 --- a/src/loader/Android.mk +++ b/src/loader/Android.mk @@ -40,6 +40,8 @@ else LOCAL_SHARED_LIBRARIES := libdrm endif +LOCAL_EXPORT_C_INCLUDE_DIRS := $(LOCAL_PATH) + LOCAL_MODULE := libmesa_loader include $(MESA_COMMON_MK) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): android: build with libcxx on android lollipop
Module: Mesa Branch: master Commit: c5e11e5f7f67fe5a1d28b1446f87af7aa3ba68d8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c5e11e5f7f67fe5a1d28b1446f87af7aa3ba68d8 Author: Chih-Wei Huang Date: Wed May 20 11:25:39 2015 +0800 android: build with libcxx on android lollipop On Lollipop, apparently stlport is gone and libcxx must be used instead. We still support stlport when building on earlier android releases. Signed-off-by: Chih-Wei Huang Reviewed-by: Eric Anholt --- Android.common.mk |1 + src/gallium/drivers/nouveau/Android.mk |4 src/gallium/drivers/r600/Android.mk|4 src/gallium/targets/dri/Android.mk |3 ++- src/glsl/Android.mk|1 - 5 files changed, 11 insertions(+), 2 deletions(-) diff --git a/Android.common.mk b/Android.common.mk index 43766bf..d662d60 100644 --- a/Android.common.mk +++ b/Android.common.mk @@ -77,6 +77,7 @@ LOCAL_CFLAGS += \ endif LOCAL_CPPFLAGS += \ + $(if $(filter true,$(MESA_LOLLIPOP_BUILD)),-D_USING_LIBCXX) \ -Wno-error=non-virtual-dtor \ -Wno-non-virtual-dtor diff --git a/src/gallium/drivers/nouveau/Android.mk b/src/gallium/drivers/nouveau/Android.mk index 420c8e5..daf3abd 100644 --- a/src/gallium/drivers/nouveau/Android.mk +++ b/src/gallium/drivers/nouveau/Android.mk @@ -39,6 +39,10 @@ LOCAL_SRC_FILES := \ LOCAL_SHARED_LIBRARIES := libdrm libdrm_nouveau LOCAL_MODULE := libmesa_pipe_nouveau +ifeq ($(MESA_LOLLIPOP_BUILD),true) +LOCAL_C_INCLUDES := external/libcxx/include +else include external/stlport/libstlport.mk +endif include $(GALLIUM_COMMON_MK) include $(BUILD_STATIC_LIBRARY) diff --git a/src/gallium/drivers/r600/Android.mk b/src/gallium/drivers/r600/Android.mk index e935759..bfe3987 100644 --- a/src/gallium/drivers/r600/Android.mk +++ b/src/gallium/drivers/r600/Android.mk @@ -33,6 +33,10 @@ LOCAL_SRC_FILES := $(C_SOURCES) $(CXX_SOURCES) LOCAL_SHARED_LIBRARIES := libdrm libdrm_radeon LOCAL_MODULE := libmesa_pipe_r600 +ifeq ($(MESA_LOLLIPOP_BUILD),true) +LOCAL_C_INCLUDES := external/libcxx/include +else include external/stlport/libstlport.mk +endif include $(GALLIUM_COMMON_MK) include $(BUILD_STATIC_LIBRARY) diff --git a/src/gallium/targets/dri/Android.mk b/src/gallium/targets/dri/Android.mk index 78f7b7c..1772d25 100644 --- a/src/gallium/targets/dri/Android.mk +++ b/src/gallium/targets/dri/Android.mk @@ -95,7 +95,7 @@ gallium_DRIVERS += libmesa_winsys_svga libmesa_pipe_svga LOCAL_CFLAGS += -DGALLIUM_VMWGFX endif ifneq ($(filter nouveau r600g,$(MESA_GPU_DRIVERS)),) -LOCAL_SHARED_LIBRARIES += libstlport +LOCAL_SHARED_LIBRARIES += $(if $(filter true,$(MESA_LOLLIPOP_BUILD)),libc++,libstlport) endif LOCAL_STATIC_LIBRARIES := \ @@ -116,6 +116,7 @@ LOCAL_STATIC_LIBRARIES += \ libLLVMR600Info \ libLLVMR600AsmPrinter \ libelf +LOCAL_LDLIBS += $(if $(filter true,$(MESA_LOLLIPOP_BUILD)),-lgcc) endif include $(GALLIUM_COMMON_MK) diff --git a/src/glsl/Android.mk b/src/glsl/Android.mk index f20741e..f63b7da 100644 --- a/src/glsl/Android.mk +++ b/src/glsl/Android.mk @@ -46,7 +46,6 @@ LOCAL_C_INCLUDES := \ LOCAL_MODULE := libmesa_glsl -include external/stlport/libstlport.mk include $(LOCAL_PATH)/Android.gen.mk include $(MESA_COMMON_MK) include $(BUILD_STATIC_LIBRARY) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Drop qir include from vc4_screen.h
Module: Mesa Branch: master Commit: 9dca3beb62e894bbd720c5eecb47c0fd2c6132f9 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9dca3beb62e894bbd720c5eecb47c0fd2c6132f9 Author: Eric Anholt Date: Sun Jun 7 12:02:02 2015 -0700 vc4: Drop qir include from vc4_screen.h We didn't need any of it except for the list header, and qir.h pulls in nir.h, which is not really interesting to winsys. --- src/gallium/drivers/vc4/vc4_screen.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/vc4/vc4_screen.h b/src/gallium/drivers/vc4/vc4_screen.h index 46c4687..fb08cc1 100644 --- a/src/gallium/drivers/vc4/vc4_screen.h +++ b/src/gallium/drivers/vc4/vc4_screen.h @@ -27,7 +27,7 @@ #include "pipe/p_screen.h" #include "os/os_thread.h" #include "state_tracker/drm_driver.h" -#include "vc4_qir.h" +#include "util/list.h" struct vc4_bo; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Drop subdirectory in vc4 build.
Module: Mesa Branch: master Commit: 8d10b2a0460ca01a5c65a87184717c6c2e4bcaeb URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d10b2a0460ca01a5c65a87184717c6c2e4bcaeb Author: Eric Anholt Date: Wed Jun 3 10:18:04 2015 -0700 vc4: Drop subdirectory in vc4 build. Just because we put the source in a subdir, doesn't mean we need helper libraries in the build. This will also simplify the Android build setup. --- configure.ac|1 - src/gallium/drivers/vc4/Makefile.am |4 +-- src/gallium/drivers/vc4/Makefile.sources|4 +++ src/gallium/drivers/vc4/kernel/Makefile.am | 40 --- src/gallium/drivers/vc4/kernel/Makefile.sources |6 5 files changed, 5 insertions(+), 50 deletions(-) diff --git a/configure.ac b/configure.ac index d32aa24..be0cd7d 100644 --- a/configure.ac +++ b/configure.ac @@ -2350,7 +2350,6 @@ AC_CONFIG_FILES([Makefile src/gallium/drivers/svga/Makefile src/gallium/drivers/trace/Makefile src/gallium/drivers/vc4/Makefile - src/gallium/drivers/vc4/kernel/Makefile src/gallium/state_trackers/clover/Makefile src/gallium/state_trackers/dri/Makefile src/gallium/state_trackers/glx/xlib/Makefile diff --git a/src/gallium/drivers/vc4/Makefile.am b/src/gallium/drivers/vc4/Makefile.am index 3fc591f..7744631 100644 --- a/src/gallium/drivers/vc4/Makefile.am +++ b/src/gallium/drivers/vc4/Makefile.am @@ -19,8 +19,6 @@ # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS # IN THE SOFTWARE. -SUBDIRS = kernel - include Makefile.sources include $(top_srcdir)/src/gallium/Automake.inc @@ -39,5 +37,5 @@ AM_CFLAGS = \ noinst_LTLIBRARIES = libvc4.la libvc4_la_SOURCES = $(C_SOURCES) -libvc4_la_LIBADD = $(SIM_LIB) kernel/libvc4_kernel.la +libvc4_la_LIBADD = $(SIM_LIB) libvc4_la_LDFLAGS = $(SIM_LDFLAGS) diff --git a/src/gallium/drivers/vc4/Makefile.sources b/src/gallium/drivers/vc4/Makefile.sources index 49474df..f678b2f 100644 --- a/src/gallium/drivers/vc4/Makefile.sources +++ b/src/gallium/drivers/vc4/Makefile.sources @@ -1,4 +1,8 @@ C_SOURCES := \ + kernel/vc4_drv.h \ + kernel/vc4_gem.c \ + kernel/vc4_validate.c \ + kernel/vc4_validate_shaders.c \ vc4_blit.c \ vc4_bufmgr.c \ vc4_bufmgr.h \ diff --git a/src/gallium/drivers/vc4/kernel/Makefile.am b/src/gallium/drivers/vc4/kernel/Makefile.am deleted file mode 100644 index 1ae5f1c..000 --- a/src/gallium/drivers/vc4/kernel/Makefile.am +++ /dev/null @@ -1,40 +0,0 @@ -# Copyright © 2014 Broadcom -# -# Permission is hereby granted, free of charge, to any person obtaining a -# copy of this software and associated documentation files (the "Software"), -# to deal in the Software without restriction, including without limitation -# the rights to use, copy, modify, merge, publish, distribute, sublicense, -# and/or sell copies of the Software, and to permit persons to whom the -# Software is furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice (including the next -# paragraph) shall be included in all copies or substantial portions of the -# Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS -# IN THE SOFTWARE. - -include Makefile.sources -include $(top_srcdir)/src/gallium/Automake.inc - -if USE_VC4_SIMULATOR -SIM_CFLAGS = -DUSE_VC4_SIMULATOR=1 -endif - -AM_CFLAGS = \ - $(LIBDRM_CFLAGS) \ - $(GALLIUM_DRIVER_CFLAGS) \ - $(SIM_CFLAGS) \ - -I$(top_srcdir)/src/mesa/ \ - -I$(srcdir)/../ \ - $() - -noinst_LTLIBRARIES = libvc4_kernel.la - -libvc4_kernel_la_SOURCES = $(C_SOURCES) -libvc4_kernel_la_LDFLAGS = $(SIM_LDFLAGS) diff --git a/src/gallium/drivers/vc4/kernel/Makefile.sources b/src/gallium/drivers/vc4/kernel/Makefile.sources deleted file mode 100644 index 7d17a89..000 --- a/src/gallium/drivers/vc4/kernel/Makefile.sources +++ /dev/null @@ -1,6 +0,0 @@ -C_SOURCES := \ - vc4_drv.h \ - vc4_gem.c \ - vc4_validate.c \ - vc4_validate_shaders.c \ - $() ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): android: export more dirs from libmesa_dri_common
Module: Mesa Branch: master Commit: 581aa208fa8fc653dce50d95c1f3400bb0c68ab2 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=581aa208fa8fc653dce50d95c1f3400bb0c68ab2 Author: Chih-Wei Huang Date: Wed May 20 11:25:26 2015 +0800 android: export more dirs from libmesa_dri_common The include paths of libmesa_dri_common are also used by modules that need libmesa_dri_common. Signed-off-by: Chih-Wei Huang Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/common/Android.mk |4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/common/Android.mk b/src/mesa/drivers/dri/common/Android.mk index a7fcd6d..c003c94 100644 --- a/src/mesa/drivers/dri/common/Android.mk +++ b/src/mesa/drivers/dri/common/Android.mk @@ -39,7 +39,9 @@ intermediates := $(call local-generated-sources-dir) LOCAL_C_INCLUDES := \ $(MESA_DRI_C_INCLUDES) -LOCAL_EXPORT_C_INCLUDE_DIRS := $(intermediates) +LOCAL_EXPORT_C_INCLUDE_DIRS := \ +$(LOCAL_PATH) \ +$(intermediates) # swrast only ifeq ($(MESA_GPU_DRIVERS),swrast) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): android: generate files by $(call es-gen)
Module: Mesa Branch: master Commit: 1e4081f54aa5c6cba566ed549389d847bf7e6799 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e4081f54aa5c6cba566ed549389d847bf7e6799 Author: Chih-Wei Huang Date: Wed May 20 11:25:33 2015 +0800 android: generate files by $(call es-gen) Use the pre-defined macro es-gen to generate new added files instead of writing new rules manually. The handmade rules that may generate the files before the directory is created result in such an error: /bin/bash: out/target/product/x86/gen/STATIC_LIBRARIES/libmesa_st_mesa_intermediates/main/format_pack.c: No such file or directory make: *** [out/target/product/x86/gen/STATIC_LIBRARIES/libmesa_st_mesa_intermediates/main/format_pack.c] Error 1 Signed-off-by: Chih-Wei Huang Reviewed-by: Eric Anholt --- src/mesa/Android.gen.mk | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/src/mesa/Android.gen.mk b/src/mesa/Android.gen.mk index cc97954..145f259 100644 --- a/src/mesa/Android.gen.mk +++ b/src/mesa/Android.gen.mk @@ -115,9 +115,11 @@ $(intermediates)/main/api_exec.c: $(dispatch_deps) GET_HASH_GEN := $(LOCAL_PATH)/main/get_hash_generator.py +$(intermediates)/main/get_hash.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(GET_HASH_GEN) +$(intermediates)/main/get_hash.h: PRIVATE_XML := -f $(glapi)/gl_and_es_API.xml $(intermediates)/main/get_hash.h: $(glapi)/gl_and_es_API.xml \ $(LOCAL_PATH)/main/get_hash_params.py $(GET_HASH_GEN) - @$(MESA_PYTHON2) $(GET_HASH_GEN) -f $< > $@ + $(call es-gen) FORMAT_INFO := $(LOCAL_PATH)/main/format_info.py format_info_deps := \ @@ -125,8 +127,10 @@ format_info_deps := \ $(LOCAL_PATH)/main/format_parser.py \ $(FORMAT_INFO) +$(intermediates)/main/format_info.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(FORMAT_INFO) +$(intermediates)/main/format_info.h: PRIVATE_XML := $(intermediates)/main/format_info.h: $(format_info_deps) - @$(MESA_PYTHON2) $(FORMAT_INFO) $< > $@ + $(call es-gen, $<) FORMAT_PACK := $(LOCAL_PATH)/main/format_pack.py format_pack_deps := \ @@ -134,8 +138,10 @@ format_pack_deps := \ $(LOCAL_PATH)/main/format_parser.py \ $(FORMAT_PACK) +$(intermediates)/main/format_pack.c: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(FORMAT_PACK) +$(intermediates)/main/format_pack.c: PRIVATE_XML := $(intermediates)/main/format_pack.c: $(format_pack_deps) - $(hide) $(MESA_PYTHON2) $(FORMAT_PACK) $< > $@ + $(call es-gen, $<) FORMAT_UNPACK := $(LOCAL_PATH)/main/format_unpack.py format_unpack_deps := \ @@ -143,5 +149,7 @@ format_unpack_deps := \ $(LOCAL_PATH)/main/format_parser.py \ $(FORMAT_UNPACK) +$(intermediates)/main/format_unpack.c: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(FORMAT_UNPACK) +$(intermediates)/main/format_unpack.c: PRIVATE_XML := $(intermediates)/main/format_unpack.c: $(format_unpack_deps) - $(hide) $(MESA_PYTHON2) $(FORMAT_UNPACK) $< > $@ + $(call es-gen, $<) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Make sure we allocate idle BOs from the cache.
Module: Mesa
Branch: master
Commit: 21a22a61c02a1d1807ff03df8eb8fa16ebdd1b74
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=21a22a61c02a1d1807ff03df8eb8fa16ebdd1b74
Author: Eric Anholt
Date: Fri May 29 18:06:32 2015 -0700
vc4: Make sure we allocate idle BOs from the cache.
We were returning the most recently freed BO, without checking if it
was idle yet. This meant that we generally stalled immediately on the
previous frame when generating a new one. Instead, allocate new BOs
when the *oldest* BO is still busy, so that the cache scales with how
much is needed to keep some frames outstanding, as originally
intended.
Note that if you don't have some throttling happening, this means that
you can accidentally run the system out of memory. The kernel is now
applying some throttling on all execs, to hopefully avoid this.
---
src/gallium/drivers/vc4/vc4_bufmgr.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_bufmgr.c
b/src/gallium/drivers/vc4/vc4_bufmgr.c
index 8f9d9c3..8d97670 100644
--- a/src/gallium/drivers/vc4/vc4_bufmgr.c
+++ b/src/gallium/drivers/vc4/vc4_bufmgr.c
@@ -49,8 +49,18 @@ vc4_bo_from_cache(struct vc4_screen *screen, uint32_t size,
const char *name)
struct vc4_bo *bo = NULL;
pipe_mutex_lock(cache->lock);
if (!is_empty_list(&cache->size_list[page_index])) {
-struct simple_node *node =
last_elem(&cache->size_list[page_index]);
+struct simple_node *node =
first_elem(&cache->size_list[page_index]);
bo = container_of(node, struct vc4_bo, size_list);
+
+/* Check that the BO has gone idle. If not, then we want to
+ * allocate something new instead, since we assume that the
+ * user will proceed to CPU map it and fill it with stuff.
+ */
+if (!vc4_bo_wait(bo, 0)) {
+pipe_mutex_unlock(cache->lock);
+return NULL;
+}
+
pipe_reference_init(&bo->reference, 1);
remove_from_list(&bo->time_list);
remove_from_list(&bo->size_list);
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Mesa (master): vc4: Don't bother with safe list traversal in CSE.
Module: Mesa
Branch: master
Commit: ec1c72d38ea4c709a39c6be9e0ff96bc2a90940f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec1c72d38ea4c709a39c6be9e0ff96bc2a90940f
Author: Eric Anholt
Date: Fri May 29 21:27:53 2015 -0700
vc4: Don't bother with safe list traversal in CSE.
We don't remove or move instructions.
---
src/gallium/drivers/vc4/vc4_opt_cse.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_opt_cse.c
b/src/gallium/drivers/vc4/vc4_opt_cse.c
index 27d0fae..92c8260 100644
--- a/src/gallium/drivers/vc4/vc4_opt_cse.c
+++ b/src/gallium/drivers/vc4/vc4_opt_cse.c
@@ -128,7 +128,7 @@ qir_opt_cse(struct vc4_compile *c)
if (!ht)
return false;
-list_for_each_entry_safe(struct qinst, inst, &c->instructions, link) {
+list_for_each_entry(struct qinst, inst, &c->instructions, link) {
if (qir_has_side_effects(c, inst) ||
qir_has_side_effect_reads(c, inst)) {
continue;
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Mesa (master): vc4: Fix return value handling for BO waits.
Module: Mesa
Branch: master
Commit: c821ccf0e3a051e5e867792898ae9b8f08e4601a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c821ccf0e3a051e5e867792898ae9b8f08e4601a
Author: Eric Anholt
Date: Fri May 29 17:21:15 2015 -0700
vc4: Fix return value handling for BO waits.
If the wait ever returned -ETIME, we'd abort because the errno was
stored in errno and not drmIoctl()'s return value.
---
src/gallium/drivers/vc4/vc4_bufmgr.c | 27 +++
1 file changed, 15 insertions(+), 12 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_bufmgr.c
b/src/gallium/drivers/vc4/vc4_bufmgr.c
index 6b3a8c3..8f9d9c3 100644
--- a/src/gallium/drivers/vc4/vc4_bufmgr.c
+++ b/src/gallium/drivers/vc4/vc4_bufmgr.c
@@ -343,15 +343,17 @@ vc4_wait_seqno(struct vc4_screen *screen, uint64_t seqno,
uint64_t timeout_ns)
ret = 0;
}
-if (ret == -ETIME) {
-return false;
-} else if (ret != 0) {
-fprintf(stderr, "wait failed\n");
-abort();
-} else {
+if (ret == 0) {
screen->finished_seqno = wait.seqno;
return true;
}
+
+if (errno != ETIME) {
+fprintf(stderr, "wait failed: %d\n", ret);
+abort();
+}
+
+return false;
}
bool
@@ -370,14 +372,15 @@ vc4_bo_wait(struct vc4_bo *bo, uint64_t timeout_ns)
else
ret = 0;
-if (ret == -ETIME) {
-return false;
-} else if (ret != 0) {
-fprintf(stderr, "wait failed\n");
-abort();
-} else {
+if (ret == 0)
return true;
+
+if (errno != ETIME) {
+fprintf(stderr, "wait failed: %d\n", ret);
+abort();
}
+
+return false;
}
void *
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Mesa (master): vc4: Convert from simple_list.h to list.h
Module: Mesa
Branch: master
Commit: 78c773bb3646295e4a4f1fe7d6d10f05758ee48b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=78c773bb3646295e4a4f1fe7d6d10f05758ee48b
Author: Eric Anholt
Date: Fri May 29 18:19:42 2015 -0700
vc4: Convert from simple_list.h to list.h
list.h is a nicer and more familiar set of list functions/macros.
---
src/gallium/drivers/vc4/vc4_bufmgr.c | 53
src/gallium/drivers/vc4/vc4_bufmgr.h |4 +-
src/gallium/drivers/vc4/vc4_opt_algebraic.c|5 +-
src/gallium/drivers/vc4/vc4_opt_constant_folding.c |4 +-
src/gallium/drivers/vc4/vc4_opt_copy_propagation.c |5 +-
src/gallium/drivers/vc4/vc4_opt_cse.c |5 +-
src/gallium/drivers/vc4/vc4_opt_dead_code.c|2 +-
src/gallium/drivers/vc4/vc4_opt_small_immediates.c |5 +-
src/gallium/drivers/vc4/vc4_opt_vpm_writes.c |8 +--
src/gallium/drivers/vc4/vc4_program.c |4 +-
src/gallium/drivers/vc4/vc4_qir.c | 18 +++---
src/gallium/drivers/vc4/vc4_qir.h | 10 +--
src/gallium/drivers/vc4/vc4_qir_lower_uniforms.c |9 +--
src/gallium/drivers/vc4/vc4_qpu_emit.c | 11 ++--
src/gallium/drivers/vc4/vc4_qpu_schedule.c | 64
src/gallium/drivers/vc4/vc4_register_allocate.c|9 +--
src/gallium/drivers/vc4/vc4_reorder_uniforms.c |4 +-
src/gallium/drivers/vc4/vc4_screen.c |2 +-
src/gallium/drivers/vc4/vc4_screen.h |4 +-
19 files changed, 87 insertions(+), 139 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_bufmgr.c
b/src/gallium/drivers/vc4/vc4_bufmgr.c
index 8d97670..69a7584 100644
--- a/src/gallium/drivers/vc4/vc4_bufmgr.c
+++ b/src/gallium/drivers/vc4/vc4_bufmgr.c
@@ -34,9 +34,6 @@
#include "vc4_context.h"
#include "vc4_screen.h"
-#define container_of(ptr, type, field) \
- (type*)((char*)ptr - offsetof(type, field))
-
static struct vc4_bo *
vc4_bo_from_cache(struct vc4_screen *screen, uint32_t size, const char *name)
{
@@ -48,9 +45,10 @@ vc4_bo_from_cache(struct vc4_screen *screen, uint32_t size,
const char *name)
struct vc4_bo *bo = NULL;
pipe_mutex_lock(cache->lock);
-if (!is_empty_list(&cache->size_list[page_index])) {
-struct simple_node *node =
first_elem(&cache->size_list[page_index]);
-bo = container_of(node, struct vc4_bo, size_list);
+if (!list_empty(&cache->size_list[page_index])) {
+struct vc4_bo *bo = LIST_ENTRY(struct vc4_bo,
+
cache->size_list[page_index].next,
+ size_list);
/* Check that the BO has gone idle. If not, then we want to
* allocate something new instead, since we assume that the
@@ -62,8 +60,8 @@ vc4_bo_from_cache(struct vc4_screen *screen, uint32_t size,
const char *name)
}
pipe_reference_init(&bo->reference, 1);
-remove_from_list(&bo->time_list);
-remove_from_list(&bo->size_list);
+list_del(&bo->time_list);
+list_del(&bo->size_list);
bo->name = name;
}
@@ -161,15 +159,14 @@ vc4_bo_free(struct vc4_bo *bo)
static void
free_stale_bos(struct vc4_screen *screen, time_t time)
{
-while (!is_empty_list(&screen->bo_cache.time_list)) {
-struct simple_node *node =
-first_elem(&screen->bo_cache.time_list);
-struct vc4_bo *bo = container_of(node, struct vc4_bo,
time_list);
+struct vc4_bo_cache *cache = &screen->bo_cache;
+list_for_each_entry_safe(struct vc4_bo, bo, &cache->time_list,
+ time_list) {
/* If it's more than a second old, free it. */
if (time - bo->free_time > 2) {
-remove_from_list(&bo->time_list);
-remove_from_list(&bo->size_list);
+list_del(&bo->time_list);
+list_del(&bo->size_list);
vc4_bo_free(bo);
} else {
break;
@@ -190,16 +187,16 @@ vc4_bo_last_unreference_locked_timed(struct vc4_bo *bo,
time_t time)
}
if (cache->size_list_size <= page_index) {
-struct simple_node *new_list =
-ralloc_array(screen, struct simple_node, page_index +
1);
+struct list_head *new_list =
+ralloc_array(screen, struct list_head, page_index + 1);
/* Move old list contents over (since the array has moved
Mesa (master): vc4: Don' t try to put our dmabuf-exported BOs into the BO cache.
Module: Mesa Branch: master Commit: f8de6277bfa1a7db9a8c0f0baaa441276264a982 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8de6277bfa1a7db9a8c0f0baaa441276264a982 Author: Eric Anholt Date: Wed May 27 16:20:28 2015 -0700 vc4: Don't try to put our dmabuf-exported BOs into the BO cache. We'd sometimes try to reallocate something that X was using as a new pipe_resource, and potentially conflict in our rendering. But even worse, if we reallocated the BO as a shader, the kernel would reject rendering using the shader. --- src/gallium/drivers/vc4/vc4_bufmgr.c |1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/vc4/vc4_bufmgr.c b/src/gallium/drivers/vc4/vc4_bufmgr.c index 4bb2c71..6b3a8c3 100644 --- a/src/gallium/drivers/vc4/vc4_bufmgr.c +++ b/src/gallium/drivers/vc4/vc4_bufmgr.c @@ -286,6 +286,7 @@ vc4_bo_get_dmabuf(struct vc4_bo *bo) bo->handle); return -1; } +bo->private = false; return fd; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: make vc4_begin_query() return a boolean
Module: Mesa
Branch: master
Commit: 41630c0653578db0c237296aaeec0a85a4e7f4ad
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=41630c0653578db0c237296aaeec0a85a4e7f4ad
Author: Samuel Pitoiset
Date: Fri May 22 12:45:43 2015 +0200
vc4: make vc4_begin_query() return a boolean
I forgot to make the change in 96f164f6f047833091eb98a73aa80c31dc94f962.
This fixes a warning with GCC and probably an error with Clang.
Signed-off-by: Samuel Pitoiset
Reviewed-by: Eric Anholt
---
src/gallium/drivers/vc4/vc4_query.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_query.c
b/src/gallium/drivers/vc4/vc4_query.c
index 1792bec..270832e 100644
--- a/src/gallium/drivers/vc4/vc4_query.c
+++ b/src/gallium/drivers/vc4/vc4_query.c
@@ -50,9 +50,10 @@ vc4_destroy_query(struct pipe_context *ctx, struct
pipe_query *query)
free(query);
}
-static void
+static boolean
vc4_begin_query(struct pipe_context *ctx, struct pipe_query *query)
{
+return true;
}
static void
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Mesa (master): vc4: Just stream out fallback IB contents.
Module: Mesa
Branch: master
Commit: 10aacf5ae8f3e90e2f0967fbdcf96df93e346e20
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=10aacf5ae8f3e90e2f0967fbdcf96df93e346e20
Author: Eric Anholt
Date: Tue Apr 14 22:42:02 2015 -0700
vc4: Just stream out fallback IB contents.
The idea I had when I wrote the original shadow code was that you'd see a
set_index_buffer to the IB, then a bunch of draws out of it. What's
actually happening in openarena is that set_index_buffer occurs at every
draw, so we end up making a new shadow BO every time, and converting more
of the BO than is actually used in the draw.
While I could maybe come up with a better caching scheme, for now just
do the simple thing that doesn't result in a new shadow IB allocation
per draw.
Improves performance of isosurf in drawelements mode by 58.7967% +/-
3.86152% (n=8).
---
src/gallium/drivers/vc4/vc4_context.c |7 +++
src/gallium/drivers/vc4/vc4_context.h |2 ++
src/gallium/drivers/vc4/vc4_draw.c | 15 +++
src/gallium/drivers/vc4/vc4_resource.c | 33 +++-
src/gallium/drivers/vc4/vc4_resource.h |6 --
src/gallium/drivers/vc4/vc4_state.c| 20 ++-
6 files changed, 41 insertions(+), 42 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_context.c
b/src/gallium/drivers/vc4/vc4_context.c
index b394c18..a2b1cac 100644
--- a/src/gallium/drivers/vc4/vc4_context.c
+++ b/src/gallium/drivers/vc4/vc4_context.c
@@ -29,6 +29,7 @@
#include "util/u_inlines.h"
#include "util/u_memory.h"
#include "util/u_blitter.h"
+#include "util/u_upload_mgr.h"
#include "indices/u_primconvert.h"
#include "pipe/p_screen.h"
@@ -410,6 +411,9 @@ vc4_context_destroy(struct pipe_context *pctx)
if (vc4->primconvert)
util_primconvert_destroy(vc4->primconvert);
+if (vc4->uploader)
+u_upload_destroy(vc4->uploader);
+
util_slab_destroy(&vc4->transfer_pool);
pipe_surface_reference(&vc4->framebuffer.cbufs[0], NULL);
@@ -466,6 +470,9 @@ vc4_context_create(struct pipe_screen *pscreen, void *priv)
if (!vc4->primconvert)
goto fail;
+vc4->uploader = u_upload_create(pctx, 16 * 1024, 4,
+PIPE_BIND_INDEX_BUFFER);
+
vc4_debug |= saved_shaderdb_flag;
return &vc4->base;
diff --git a/src/gallium/drivers/vc4/vc4_context.h
b/src/gallium/drivers/vc4/vc4_context.h
index d89f197..41dacb9 100644
--- a/src/gallium/drivers/vc4/vc4_context.h
+++ b/src/gallium/drivers/vc4/vc4_context.h
@@ -243,6 +243,8 @@ struct vc4_context {
/** Seqno of the last CL flush's job. */
uint64_t last_emit_seqno;
+struct u_upload_mgr *uploader;
+
/** @{ Current pipeline state objects */
struct pipe_scissor_state scissor;
struct pipe_blend_state *blend;
diff --git a/src/gallium/drivers/vc4/vc4_draw.c
b/src/gallium/drivers/vc4/vc4_draw.c
index 16418bf..15743ea 100644
--- a/src/gallium/drivers/vc4/vc4_draw.c
+++ b/src/gallium/drivers/vc4/vc4_draw.c
@@ -266,13 +266,17 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct
pipe_draw_info *info)
* definitions, up to but not including QUADS.
*/
if (info->indexed) {
-struct vc4_resource *rsc = vc4_resource(vc4->indexbuf.buffer);
uint32_t offset = vc4->indexbuf.offset;
uint32_t index_size = vc4->indexbuf.index_size;
-if (rsc->shadow_parent) {
-vc4_update_shadow_index_buffer(pctx, &vc4->indexbuf);
-offset = 0;
+struct pipe_resource *prsc;
+if (vc4->indexbuf.index_size == 4) {
+prsc = vc4_get_shadow_index_buffer(pctx,
&vc4->indexbuf,
+ info->count,
&offset);
+index_size = 2;
+} else {
+prsc = vc4->indexbuf.buffer;
}
+struct vc4_resource *rsc = vc4_resource(prsc);
cl_start_reloc(&vc4->bcl, 1);
cl_u8(&vc4->bcl, VC4_PACKET_GL_INDEXED_PRIMITIVE);
@@ -284,6 +288,9 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct
pipe_draw_info *info)
cl_u32(&vc4->bcl, info->count);
cl_reloc(vc4, &vc4->bcl, rsc->bo, offset);
cl_u32(&vc4->bcl, max_index);
+
+if (vc4->indexbuf.index_size == 4)
+pipe_resource_reference(&prsc, NULL);
} else {
cl_u8(&vc4->bcl, VC4_PACKET_GL_ARRAY_PRIMITIVE);
cl_u8(&vc4->bcl, info->mode);
diff --git a/sr
Mesa (master): vc4: Don' t forget to make our raster shadow textures non-raster.
Module: Mesa Branch: master Commit: b0edc19a521853371a63e9ffbc519424c8f82942 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0edc19a521853371a63e9ffbc519424c8f82942 Author: Eric Anholt Date: Wed May 27 16:01:00 2015 -0700 vc4: Don't forget to make our raster shadow textures non-raster. Not sure what happened in my testing that made the previous shadow code fix glxgears swapbuffering, but this also fixes lots of CopyArea in X (like dragging xlogo around in metacity). --- src/gallium/drivers/vc4/vc4_state.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/vc4/vc4_state.c b/src/gallium/drivers/vc4/vc4_state.c index 80e963e..7875eff 100644 --- a/src/gallium/drivers/vc4/vc4_state.c +++ b/src/gallium/drivers/vc4/vc4_state.c @@ -538,6 +538,7 @@ vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc, struct pipe_resource tmpl = shadow_parent->base.b; struct vc4_resource *clone; +tmpl.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET; tmpl.width0 = u_minify(tmpl.width0, so->u.tex.first_level); tmpl.height0 = u_minify(tmpl.height0, so->u.tex.first_level); tmpl.last_level = so->u.tex.last_level - so->u.tex.first_level; @@ -547,6 +548,8 @@ vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc, clone->shadow_parent = &shadow_parent->base.b; /* Flag it as needing update of the contents from the parent. */ clone->writes = shadow_parent->writes - 1; + +assert(clone->vc4_format != VC4_TEXTURE_TYPE_RGBA32R); } so->texture = prsc; so->reference.count = 1; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Hook up VC4_DEBUG=perf to some useful printfs.
Module: Mesa
Branch: master
Commit: bd957b1b79124c5061af1eddf16932793e806d87
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd957b1b79124c5061af1eddf16932793e806d87
Author: Eric Anholt
Date: Tue Apr 14 11:24:00 2015 -0700
vc4: Hook up VC4_DEBUG=perf to some useful printfs.
---
src/gallium/drivers/vc4/vc4_context.h |5 +
src/gallium/drivers/vc4/vc4_draw.c |7 ++-
src/gallium/drivers/vc4/vc4_resource.c |5 +
3 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/vc4_context.h
b/src/gallium/drivers/vc4/vc4_context.h
index 68eacb8..d89f197 100644
--- a/src/gallium/drivers/vc4/vc4_context.h
+++ b/src/gallium/drivers/vc4/vc4_context.h
@@ -303,6 +303,11 @@ struct vc4_depth_stencil_alpha_state {
uint32_t stencil_uniforms[3];
};
+#define perf_debug(...) do {\
+if (unlikely(vc4_debug & VC4_DEBUG_PERF)) \
+fprintf(stderr, __VA_ARGS__); \
+} while (0)
+
static inline struct vc4_context *
vc4_context(struct pipe_context *pcontext)
{
diff --git a/src/gallium/drivers/vc4/vc4_draw.c
b/src/gallium/drivers/vc4/vc4_draw.c
index 3a6d625..717eb8a 100644
--- a/src/gallium/drivers/vc4/vc4_draw.c
+++ b/src/gallium/drivers/vc4/vc4_draw.c
@@ -22,6 +22,7 @@
* IN THE SOFTWARE.
*/
+#include "util/u_prim.h"
#include "util/u_format.h"
#include "util/u_pack_color.h"
#include "indices/u_primconvert.h"
@@ -139,6 +140,8 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct
pipe_draw_info *info)
util_primconvert_save_index_buffer(vc4->primconvert,
&vc4->indexbuf);
util_primconvert_save_rasterizer_state(vc4->primconvert,
&vc4->rasterizer->base);
util_primconvert_draw_vbo(vc4->primconvert, info);
+perf_debug("Fallback conversion for %d %s vertices\n",
+ info->count, u_prim_name(info->mode));
return;
}
@@ -303,8 +306,10 @@ vc4_clear(struct pipe_context *pctx, unsigned buffers,
/* We can't flag new buffers for clearing once we've queued draws. We
* could avoid this by using the 3d engine to clear.
*/
-if (vc4->draw_call_queued)
+if (vc4->draw_call_queued) {
+perf_debug("Flushing rendering to process new clear.");
vc4_flush(pctx);
+}
if (buffers & PIPE_CLEAR_COLOR0) {
vc4->clear_color[0] = vc4->clear_color[1] =
diff --git a/src/gallium/drivers/vc4/vc4_resource.c
b/src/gallium/drivers/vc4/vc4_resource.c
index f6ca075..94bab99 100644
--- a/src/gallium/drivers/vc4/vc4_resource.c
+++ b/src/gallium/drivers/vc4/vc4_resource.c
@@ -586,6 +586,9 @@ vc4_update_shadow_baselevel_texture(struct pipe_context
*pctx,
if (shadow->writes == orig->writes)
return;
+perf_debug("Updating shadow texture due to %s\n",
+ view->u.tex.first_level ? "base level" : "raster layout");
+
for (int i = 0; i <= shadow->base.b.last_level; i++) {
unsigned width = u_minify(shadow->base.b.width0, i);
unsigned height = u_minify(shadow->base.b.height0, i);
@@ -646,6 +649,8 @@ vc4_update_shadow_index_buffer(struct pipe_context *pctx,
if (shadow->writes == orig->writes)
return;
+perf_debug("Fallback conversion for %d uint indices\n", count);
+
struct pipe_transfer *src_transfer;
uint32_t *src = pipe_buffer_map_range(pctx, &orig->base.b,
ib->offset,
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Mesa (master): vc4: Don't try to use color load/ stores to blit across format changes.
Module: Mesa Branch: master Commit: b229e6c7dee2bb6b1736d6867790dfcd1c50f623 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b229e6c7dee2bb6b1736d6867790dfcd1c50f623 Author: Eric Anholt Date: Tue Apr 14 22:01:55 2015 -0700 vc4: Don't try to use color load/stores to blit across format changes. We could potentially support the right combination of to 565, but the important thing for now is to not mix up our orderings of . Fixes fbo-copyteximage regressions. --- src/gallium/drivers/vc4/vc4_blit.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/vc4/vc4_blit.c b/src/gallium/drivers/vc4/vc4_blit.c index 3204c3d..2d524c4 100644 --- a/src/gallium/drivers/vc4/vc4_blit.c +++ b/src/gallium/drivers/vc4/vc4_blit.c @@ -138,6 +138,9 @@ vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info) return false; } +if (info->dst.resource->format != info->src.resource->format) +return false; + struct vc4_surface *dst_surf = vc4_get_blit_surface(pctx, info->dst.resource, info->dst.level); struct vc4_surface *src_surf = ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Don't try to use color load/stores to do depth/ stencil blits.
Module: Mesa
Branch: master
Commit: cff2e08c4cb87b7c2e19100e24c336e50b9839cc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cff2e08c4cb87b7c2e19100e24c336e50b9839cc
Author: Eric Anholt
Date: Tue Apr 14 21:59:46 2015 -0700
vc4: Don't try to use color load/stores to do depth/stencil blits.
Fixes regressions in fbo-generatemipmap-formats on depth/stencil (which
does blits to work around baselevel/lastlevel).
---
src/gallium/drivers/vc4/vc4_blit.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/vc4/vc4_blit.c
b/src/gallium/drivers/vc4/vc4_blit.c
index 4f87189..3204c3d 100644
--- a/src/gallium/drivers/vc4/vc4_blit.c
+++ b/src/gallium/drivers/vc4/vc4_blit.c
@@ -125,6 +125,9 @@ vc4_tile_blit(struct pipe_context *pctx, const struct
pipe_blit_info *info)
{
struct vc4_context *vc4 = vc4_context(pctx);
+if (util_format_is_depth_or_stencil(info->dst.resource->format))
+return false;
+
if ((info->mask & PIPE_MASK_RGBA) == 0)
return false;
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Mesa (master): vc4: Update the shadow texture for public textures on every draw.
Module: Mesa
Branch: master
Commit: 3a728d4dfbd727c30f36116772803674beffcbb6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3a728d4dfbd727c30f36116772803674beffcbb6
Author: Eric Anholt
Date: Tue Apr 14 11:31:11 2015 -0700
vc4: Update the shadow texture for public textures on every draw.
We don't know who else has written to it, so we'd better update it every
time. This makes the gears spin in X again.
---
src/gallium/drivers/vc4/vc4_draw.c | 18 ++
src/gallium/drivers/vc4/vc4_resource.c |2 +-
src/gallium/drivers/vc4/vc4_state.c|7 +--
3 files changed, 20 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_draw.c
b/src/gallium/drivers/vc4/vc4_draw.c
index 717eb8a..16418bf 100644
--- a/src/gallium/drivers/vc4/vc4_draw.c
+++ b/src/gallium/drivers/vc4/vc4_draw.c
@@ -132,6 +132,20 @@ vc4_start_draw(struct vc4_context *vc4)
}
static void
+vc4_update_shadow_textures(struct pipe_context *pctx,
+ struct vc4_texture_stateobj *stage_tex)
+{
+for (int i = 0; i < stage_tex->num_textures; i++) {
+struct pipe_sampler_view *view = stage_tex->textures[i];
+if (!view)
+continue;
+struct vc4_resource *rsc = vc4_resource(view->texture);
+if (rsc->shadow_parent)
+vc4_update_shadow_baselevel_texture(pctx, view);
+}
+}
+
+static void
vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
{
struct vc4_context *vc4 = vc4_context(pctx);
@@ -145,6 +159,10 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct
pipe_draw_info *info)
return;
}
+/* Before setting up the draw, do any fixup blits necessary. */
+vc4_update_shadow_textures(pctx, &vc4->verttex);
+vc4_update_shadow_textures(pctx, &vc4->fragtex);
+
vc4_get_draw_cl_space(vc4);
struct vc4_vertex_stateobj *vtx = vc4->vtx;
diff --git a/src/gallium/drivers/vc4/vc4_resource.c
b/src/gallium/drivers/vc4/vc4_resource.c
index 94bab99..3f180d5 100644
--- a/src/gallium/drivers/vc4/vc4_resource.c
+++ b/src/gallium/drivers/vc4/vc4_resource.c
@@ -583,7 +583,7 @@ vc4_update_shadow_baselevel_texture(struct pipe_context
*pctx,
struct vc4_resource *orig = vc4_resource(shadow->shadow_parent);
assert(orig);
-if (shadow->writes == orig->writes)
+if (shadow->writes == orig->writes && orig->bo->private)
return;
perf_debug("Updating shadow texture due to %s\n",
diff --git a/src/gallium/drivers/vc4/vc4_state.c
b/src/gallium/drivers/vc4/vc4_state.c
index df75b6e..80e963e 100644
--- a/src/gallium/drivers/vc4/vc4_state.c
+++ b/src/gallium/drivers/vc4/vc4_state.c
@@ -578,13 +578,8 @@ vc4_set_sampler_views(struct pipe_context *pctx, unsigned
shader,
vc4->dirty |= VC4_DIRTY_TEXSTATE;
for (i = 0; i < nr; i++) {
-if (views[i]) {
-struct vc4_resource *rsc =
-vc4_resource(views[i]->texture);
+if (views[i])
new_nr = i + 1;
-if (rsc->shadow_parent)
-vc4_update_shadow_baselevel_texture(pctx,
views[i]);
-}
pipe_sampler_view_reference(&stage_tex->textures[i], views[i]);
stage_tex->dirty_samplers |= (1 << i);
}
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Mesa (master): vc4: When asked to sample from a raster texture, make a shadow tiled copy.
Module: Mesa
Branch: master
Commit: 44b63cf5c051f7eccfc1d7427247fd58dabb7761
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=44b63cf5c051f7eccfc1d7427247fd58dabb7761
Author: Eric Anholt
Date: Wed Apr 8 12:49:24 2015 -0700
vc4: When asked to sample from a raster texture, make a shadow tiled copy.
So, it turns out my simulator doesn't *quite* match the hardware. And the
errata about raster textures tells you most of what's wrong, but there's
still stuff wrong after that. Instead, if we're asked to sample from
raster, we'll just blit it to a tiled temporary.
Raster textures should only be screen scanout, and word is that it's
faster to copy to tiled using the tiling engine first than to texture from
an entire raster texture, anyway.
---
src/gallium/drivers/vc4/vc4_state.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_state.c
b/src/gallium/drivers/vc4/vc4_state.c
index 332f310..df75b6e 100644
--- a/src/gallium/drivers/vc4/vc4_state.c
+++ b/src/gallium/drivers/vc4/vc4_state.c
@@ -516,6 +516,7 @@ vc4_create_sampler_view(struct pipe_context *pctx, struct
pipe_resource *prsc,
const struct pipe_sampler_view *cso)
{
struct pipe_sampler_view *so = malloc(sizeof(*so));
+struct vc4_resource *rsc = vc4_resource(prsc);
if (!so)
return NULL;
@@ -527,8 +528,12 @@ vc4_create_sampler_view(struct pipe_context *pctx, struct
pipe_resource *prsc,
/* There is no hardware level clamping, and the start address of a
* texture may be misaligned, so in that case we have to copy to a
* temporary.
+ *
+ * Also, Raspberry Pi doesn't support sampling from raster textures,
+ * so we also have to copy to a temporary then.
*/
-if (so->u.tex.first_level) {
+if (so->u.tex.first_level ||
+rsc->vc4_format == VC4_TEXTURE_TYPE_RGBA32R) {
struct vc4_resource *shadow_parent = vc4_resource(prsc);
struct pipe_resource tmpl = shadow_parent->base.b;
struct vc4_resource *clone;
@@ -574,8 +579,10 @@ vc4_set_sampler_views(struct pipe_context *pctx, unsigned
shader,
for (i = 0; i < nr; i++) {
if (views[i]) {
+struct vc4_resource *rsc =
+vc4_resource(views[i]->texture);
new_nr = i + 1;
-if (views[i]->u.tex.first_level != 0)
+if (rsc->shadow_parent)
vc4_update_shadow_baselevel_texture(pctx,
views[i]);
}
pipe_sampler_view_reference(&stage_tex->textures[i], views[i]);
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Mesa (master): vc4: Add a blitter path using just the render thread.
Module: Mesa
Branch: master
Commit: 1be329e64cd035e3ee088cff3a50d39e1ad66868
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1be329e64cd035e3ee088cff3a50d39e1ad66868
Author: Eric Anholt
Date: Mon Apr 6 15:12:58 2015 -0700
vc4: Add a blitter path using just the render thread.
This accelerates the path for generating the shadow tiled texture when
asked to sample from a raster texture (typical in glamor).
---
src/gallium/drivers/vc4/vc4_blit.c | 127
1 file changed, 127 insertions(+)
diff --git a/src/gallium/drivers/vc4/vc4_blit.c
b/src/gallium/drivers/vc4/vc4_blit.c
index 5c98fb6..4f87189 100644
--- a/src/gallium/drivers/vc4/vc4_blit.c
+++ b/src/gallium/drivers/vc4/vc4_blit.c
@@ -26,6 +26,130 @@
#include "util/u_blitter.h"
#include "vc4_context.h"
+static void
+vc4_tile_blit_color_rcl(struct vc4_context *vc4,
+struct vc4_surface *dst_surf,
+struct vc4_surface *src_surf)
+{
+struct vc4_resource *src = vc4_resource(src_surf->base.texture);
+struct vc4_resource *dst = vc4_resource(dst_surf->base.texture);
+
+uint32_t min_x_tile = 0;
+uint32_t min_y_tile = 0;
+uint32_t max_x_tile = (dst_surf->base.width - 1) / 64;
+uint32_t max_y_tile = (dst_surf->base.height - 1) / 64;
+uint32_t xtiles = max_x_tile - min_x_tile + 1;
+uint32_t ytiles = max_y_tile - min_y_tile + 1;
+uint32_t reloc_size = 9;
+uint32_t config_size = 11 + reloc_size;
+uint32_t loadstore_size = 7 + reloc_size;
+uint32_t tilecoords_size = 3;
+cl_ensure_space(&vc4->rcl,
+config_size +
+xtiles * ytiles * (loadstore_size * 2 +
+ tilecoords_size * 1));
+cl_ensure_space(&vc4->bo_handles, 2 * sizeof(uint32_t));
+cl_ensure_space(&vc4->bo_pointers, 2 * sizeof(struct vc4_bo *));
+
+cl_start_reloc(&vc4->rcl, 1);
+cl_u8(&vc4->rcl, VC4_PACKET_TILE_RENDERING_MODE_CONFIG);
+cl_reloc(vc4, &vc4->rcl, dst->bo, dst_surf->offset);
+cl_u16(&vc4->rcl, dst_surf->base.width);
+cl_u16(&vc4->rcl, dst_surf->base.height);
+cl_u16(&vc4->rcl, ((dst_surf->tiling <<
+VC4_RENDER_CONFIG_MEMORY_FORMAT_SHIFT) |
+ (vc4_rt_format_is_565(dst_surf->base.format) ?
+VC4_RENDER_CONFIG_FORMAT_BGR565 :
+VC4_RENDER_CONFIG_FORMAT_RGBA)));
+
+uint32_t src_hindex = vc4_gem_hindex(vc4, src->bo);
+
+for (int y = min_y_tile; y <= max_y_tile; y++) {
+for (int x = min_x_tile; x <= max_x_tile; x++) {
+bool end_of_frame = (x == max_x_tile &&
+ y == max_y_tile);
+
+cl_start_reloc(&vc4->rcl, 1);
+cl_u8(&vc4->rcl, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL);
+cl_u8(&vc4->rcl,
+ VC4_LOADSTORE_TILE_BUFFER_COLOR |
+ (src_surf->tiling <<
+ VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT));
+cl_u8(&vc4->rcl,
+ vc4_rt_format_is_565(src_surf->base.format) ?
+ VC4_LOADSTORE_TILE_BUFFER_BGR565 :
+ VC4_LOADSTORE_TILE_BUFFER_RGBA);
+cl_reloc_hindex(&vc4->rcl, src_hindex,
+src_surf->offset);
+
+cl_u8(&vc4->rcl, VC4_PACKET_TILE_COORDINATES);
+cl_u8(&vc4->rcl, x);
+cl_u8(&vc4->rcl, y);
+
+if (end_of_frame) {
+cl_u8(&vc4->rcl,
+ VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF);
+} else {
+cl_u8(&vc4->rcl,
+ VC4_PACKET_STORE_MS_TILE_BUFFER);
+}
+}
+}
+
+vc4->draw_min_x = 0;
+vc4->draw_min_y = 0;
+vc4->draw_max_x = dst_surf->base.width;
+vc4->draw_max_y = dst_surf->base.height;
+
+dst->writes++;
+vc4->needs_flush = true;
+}
+
+static struct vc4_surface *
+vc4_get_blit_surface(struct pipe_context *pctx,
+ struct pipe_resource *prsc, unsigned level)
+{
+struct pipe_surface tmpl;
+
+memset(&tmpl, 0, sizeof(tmpl));
+tmpl.format = prsc->format;
+tmpl.u.tex.level = level;
+tmpl.u.tex.fir
Mesa (master): vc4: Allow submitting jobs with no bin CL in validation.
Module: Mesa
Branch: master
Commit: 76d56752ccff5bca3a0808705d5da76f186afb33
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76d56752ccff5bca3a0808705d5da76f186afb33
Author: Eric Anholt
Date: Thu Apr 9 13:35:57 2015 -0700
vc4: Allow submitting jobs with no bin CL in validation.
For blitting, we want to fire off an RCL-only job. This takes a bit of
tweaking in our validation and the simulator support (and corresponding
new code in the kernel).
---
src/gallium/drivers/vc4/kernel/vc4_drv.h |1 +
src/gallium/drivers/vc4/kernel/vc4_gem.c |2 ++
src/gallium/drivers/vc4/kernel/vc4_validate.c |9 ++---
src/gallium/drivers/vc4/vc4_simulator.c | 18 ++
4 files changed, 19 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_drv.h
b/src/gallium/drivers/vc4/kernel/vc4_drv.h
index 12a3cef..325f944 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_drv.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_drv.h
@@ -162,6 +162,7 @@ vc4_validate_cl(struct drm_device *dev,
void *unvalidated,
uint32_t len,
bool is_bin,
+bool has_bin,
struct vc4_exec_info *exec);
int
diff --git a/src/gallium/drivers/vc4/kernel/vc4_gem.c
b/src/gallium/drivers/vc4/kernel/vc4_gem.c
index c9a7573..ac29ab3 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_gem.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_gem.c
@@ -130,6 +130,7 @@ vc4_cl_validate(struct drm_device *dev, struct
vc4_exec_info *exec)
bin,
args->bin_cl_size,
true,
+ args->bin_cl_size != 0,
exec);
if (ret)
goto fail;
@@ -139,6 +140,7 @@ vc4_cl_validate(struct drm_device *dev, struct
vc4_exec_info *exec)
render,
args->render_cl_size,
false,
+ args->bin_cl_size != 0,
exec);
if (ret)
goto fail;
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index aeac29e..2d04a4a 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -702,6 +702,7 @@ vc4_validate_cl(struct drm_device *dev,
void *unvalidated,
uint32_t len,
bool is_bin,
+ bool has_bin,
struct vc4_exec_info *exec)
{
uint32_t dst_offset = 0;
@@ -772,7 +773,7 @@ vc4_validate_cl(struct drm_device *dev,
if (is_bin) {
exec->ct0ea = exec->ct0ca + dst_offset;
- if (!exec->found_start_tile_binning_packet) {
+ if (has_bin && !exec->found_start_tile_binning_packet) {
DRM_ERROR("Bin CL missing
VC4_PACKET_START_TILE_BINNING\n");
return -EINVAL;
}
@@ -786,8 +787,10 @@ vc4_validate_cl(struct drm_device *dev,
* increment from the bin CL. Otherwise a later submit would
* have render execute immediately.
*/
- if (!exec->found_wait_on_semaphore_packet) {
- DRM_ERROR("Render CL missing
VC4_PACKET_WAIT_ON_SEMAPHORE\n");
+ if (exec->found_wait_on_semaphore_packet != has_bin) {
+ DRM_ERROR("Render CL %s VC4_PACKET_WAIT_ON_SEMAPHORE\n",
+ exec->found_wait_on_semaphore_packet ?
+ "has" : "missing");
return -EINVAL;
}
exec->ct1ea = exec->ct1ca + dst_offset;
diff --git a/src/gallium/drivers/vc4/vc4_simulator.c
b/src/gallium/drivers/vc4/vc4_simulator.c
index cd8cc5b..2f72e72 100644
--- a/src/gallium/drivers/vc4/vc4_simulator.c
+++ b/src/gallium/drivers/vc4/vc4_simulator.c
@@ -151,14 +151,16 @@ vc4_simulator_flush(struct vc4_context *vc4, struct
drm_vc4_submit_cl *args)
if (ret)
return ret;
-int bfc = simpenrose_do_binning(exec.ct0ca, exec.ct0ea);
-if (bfc != 1) {
-fprintf(stderr, "Binning returned %d flushes, should be 1.\n",
-bfc);
-fprintf(stderr, "Relocated binning command list:\n");
-vc4_dump_cl(screen->simulator_mem_base + exec.ct0ca,
-exec.ct0ea - exec.ct0ca, false);
-abort();
+if (exec.ct0ca != exec.ct0ea) {
+int bfc = simpenrose_do_binning(exec.ct0ca, exec.ct0ea);
+if (bfc != 1) {
+fprintf(stderr, "Binning returned %d flushes, should
Mesa (master): vc4: Add a bunch of type conversions.
Module: Mesa Branch: master Commit: 84ebaff1b7f78cb47cd8eed5476f03c5c3d0e14b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=84ebaff1b7f78cb47cd8eed5476f03c5c3d0e14b Author: Eric Anholt Date: Wed Apr 1 15:35:13 2015 -0700 vc4: Add a bunch of type conversions. These are required to get piglit's idiv tests working. The unsigned<->float conversions are wrong, but are good enough to get piglit's small ranges of values working. --- src/gallium/drivers/vc4/vc4_program.c | 12 1 file changed, 12 insertions(+) diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index bcceb3c..ca2e81c 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -925,15 +925,27 @@ ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr) case nir_op_fmax: *dest = qir_FMAX(c, src[0], src[1]); break; + case nir_op_f2i: +case nir_op_f2u: *dest = qir_FTOI(c, src[0]); break; case nir_op_i2f: +case nir_op_u2f: *dest = qir_ITOF(c, src[0]); break; case nir_op_b2f: *dest = qir_AND(c, src[0], qir_uniform_f(c, 1.0)); break; +case nir_op_b2i: +*dest = qir_AND(c, src[0], qir_uniform_ui(c, 1)); +break; +case nir_op_i2b: +case nir_op_f2b: +qir_SF(c, src[0]); +*dest = qir_SEL_X_0_ZC(c, qir_uniform_ui(c, ~0)); +break; + case nir_op_iadd: *dest = qir_ADD(c, src[0], src[1]); break; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Separate out a bit of code for submitting jobs to the kernel.
Module: Mesa
Branch: master
Commit: e214a596352e67c89ce379a1e5a060dbc1ce31e1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e214a596352e67c89ce379a1e5a060dbc1ce31e1
Author: Eric Anholt
Date: Mon Apr 6 12:58:51 2015 -0700
vc4: Separate out a bit of code for submitting jobs to the kernel.
I want to be able to have multiple jobs being set up at the same time (for
example, a render job to do a little fixup blit in the course of doing a
render to the main FBO).
---
src/gallium/drivers/vc4/Makefile.sources |1 +
src/gallium/drivers/vc4/vc4_context.c| 93 +
src/gallium/drivers/vc4/vc4_context.h|3 +
src/gallium/drivers/vc4/vc4_job.c| 132 ++
4 files changed, 139 insertions(+), 90 deletions(-)
diff --git a/src/gallium/drivers/vc4/Makefile.sources
b/src/gallium/drivers/vc4/Makefile.sources
index ec0f25c..62cd0e0 100644
--- a/src/gallium/drivers/vc4/Makefile.sources
+++ b/src/gallium/drivers/vc4/Makefile.sources
@@ -11,6 +11,7 @@ C_SOURCES := \
vc4_emit.c \
vc4_fence.c \
vc4_formats.c \
+ vc4_job.c \
vc4_opt_algebraic.c \
vc4_opt_constant_folding.c \
vc4_opt_copy_propagation.c \
diff --git a/src/gallium/drivers/vc4/vc4_context.c
b/src/gallium/drivers/vc4/vc4_context.c
index daa5ba5..b394c18 100644
--- a/src/gallium/drivers/vc4/vc4_context.c
+++ b/src/gallium/drivers/vc4/vc4_context.c
@@ -296,40 +296,6 @@ vc4_setup_rcl(struct vc4_context *vc4)
ztex->writes++;
}
-static void
-vc4_draw_reset(struct vc4_context *vc4)
-{
-struct vc4_bo **referenced_bos = vc4->bo_pointers.base;
-for (int i = 0; i < (vc4->bo_handles.next -
- vc4->bo_handles.base) / 4; i++) {
-vc4_bo_unreference(&referenced_bos[i]);
-}
-vc4_reset_cl(&vc4->bcl);
-vc4_reset_cl(&vc4->rcl);
-vc4_reset_cl(&vc4->shader_rec);
-vc4_reset_cl(&vc4->uniforms);
-vc4_reset_cl(&vc4->bo_handles);
-vc4_reset_cl(&vc4->bo_pointers);
-vc4->shader_rec_count = 0;
-
-vc4->needs_flush = false;
-vc4->draw_call_queued = false;
-
-/* We have no hardware context saved between our draw calls, so we
- * need to flag the next draw as needing all state emitted. Emitting
- * all state at the start of our draws is also what ensures that we
- * return to the state we need after a previous tile has finished.
- */
-vc4->dirty = ~0;
-vc4->resolve = 0;
-vc4->cleared = 0;
-
-vc4->draw_min_x = ~0;
-vc4->draw_min_y = ~0;
-vc4->draw_max_x = 0;
-vc4->draw_max_y = 0;
-}
-
void
vc4_flush(struct pipe_context *pctx)
{
@@ -343,7 +309,7 @@ vc4_flush(struct pipe_context *pctx)
*/
if (vc4->draw_max_x <= vc4->draw_min_x ||
vc4->draw_max_y <= vc4->draw_min_y) {
-vc4_draw_reset(vc4);
+vc4_job_reset(vc4);
return;
}
@@ -358,54 +324,7 @@ vc4_flush(struct pipe_context *pctx)
vc4_setup_rcl(vc4);
-if (vc4_debug & VC4_DEBUG_CL) {
-fprintf(stderr, "BCL:\n");
-vc4_dump_cl(vc4->bcl.base, vc4->bcl.next - vc4->bcl.base,
false);
-fprintf(stderr, "RCL:\n");
-vc4_dump_cl(vc4->rcl.base, vc4->rcl.next - vc4->rcl.base,
true);
-}
-
-struct drm_vc4_submit_cl submit;
-memset(&submit, 0, sizeof(submit));
-
-submit.bo_handles = (uintptr_t)vc4->bo_handles.base;
-submit.bo_handle_count = (vc4->bo_handles.next -
- vc4->bo_handles.base) / 4;
-submit.bin_cl = (uintptr_t)vc4->bcl.base;
-submit.bin_cl_size = vc4->bcl.next - vc4->bcl.base;
-submit.render_cl = (uintptr_t)vc4->rcl.base;
-submit.render_cl_size = vc4->rcl.next - vc4->rcl.base;
-submit.shader_rec = (uintptr_t)vc4->shader_rec.base;
-submit.shader_rec_size = vc4->shader_rec.next - vc4->shader_rec.base;
-submit.shader_rec_count = vc4->shader_rec_count;
-submit.uniforms = (uintptr_t)vc4->uniforms.base;
-submit.uniforms_size = vc4->uniforms.next - vc4->uniforms.base;
-
-if (!(vc4_debug & VC4_DEBUG_NORAST)) {
-int ret;
-
-#ifndef USE_VC4_SIMULATOR
-ret = drmIoctl(vc4->fd, DRM_IOCTL_VC4_SUBMIT_CL, &submit);
-#else
-ret = vc4_simulator_flush(vc4, &submit);
-#endif
-if (ret) {
-fprintf(stderr, "VC4 submit failed\n");
-abort();
-}
-}
-
-vc4->last_emit_seqno = submit.seqno;
-
-i
Mesa (master): vc4: Use NIR-level lowering for idiv.
Module: Mesa
Branch: master
Commit: 7fa2f2e36660afe9f50f652baa6d65903d3a9dea
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7fa2f2e36660afe9f50f652baa6d65903d3a9dea
Author: Eric Anholt
Date: Mon Apr 13 14:12:59 2015 -0700
vc4: Use NIR-level lowering for idiv.
This fixes the idiv tests in piglit.
---
src/gallium/drivers/vc4/vc4_program.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index ca2e81c..ec649c9 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -311,14 +311,6 @@ ntq_umul(struct vc4_compile *c, struct qreg src0, struct
qreg src1)
qir_uniform_ui(c, 24)));
}
-static struct qreg
-ntq_idiv(struct vc4_compile *c, struct qreg src0, struct qreg src1)
-{
-return qir_FTOI(c, qir_FMUL(c,
-qir_ITOF(c, src0),
-qir_RCP(c, qir_ITOF(c, src1;
-}
-
static void
ntq_emit_tex(struct vc4_compile *c, nir_tex_instr *instr)
{
@@ -983,9 +975,6 @@ ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr)
case nir_op_imul:
*dest = ntq_umul(c, src[0], src[1]);
break;
-case nir_op_idiv:
-*dest = ntq_idiv(c, src[0], src[1]);
-break;
case nir_op_seq:
qir_SF(c, qir_FSUB(c, src[0], src[1]));
@@ -2096,6 +2085,7 @@ vc4_shader_ntq(struct vc4_context *vc4, enum qstage stage,
c->s = tgsi_to_nir(tokens, &nir_options);
nir_opt_global_to_local(c->s);
nir_convert_to_ssa(c->s);
+nir_lower_idiv(c->s);
vc4_optimize_nir(c->s);
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Mesa (master): vc4: Fix off-by-one in branch target validation.
Module: Mesa
Branch: master
Commit: d04b07f8e2eb61bb389f2d6b8ed0a501952466ee
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d04b07f8e2eb61bb389f2d6b8ed0a501952466ee
Author: Eric Anholt
Date: Thu Apr 9 13:43:55 2015 -0700
vc4: Fix off-by-one in branch target validation.
---
src/gallium/drivers/vc4/kernel/vc4_validate.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index 6b73587..aeac29e 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -287,7 +287,7 @@ validate_branch_to_sublist(VALIDATE_ARGS)
offset = *(uint32_t *)(untrusted + 0);
if (offset % exec->tile_alloc_init_block_size ||
- offset / exec->tile_alloc_init_block_size >
+ offset / exec->tile_alloc_init_block_size >=
exec->bin_tiles_x * exec->bin_tiles_y) {
DRM_ERROR("VC4_PACKET_BRANCH_TO_SUB_LIST must jump to initial "
"tile allocation space.\n");
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Mesa (master): vc4: Move the blit code to a separate file.
Module: Mesa
Branch: master
Commit: 43b20795b742b9f1608dd6f2dc586337408760ad
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=43b20795b742b9f1608dd6f2dc586337408760ad
Author: Eric Anholt
Date: Thu Apr 9 12:12:20 2015 -0700
vc4: Move the blit code to a separate file.
There will be other blit code showing up, and it seems like the place
you'd look.
---
src/gallium/drivers/vc4/Makefile.sources |1 +
src/gallium/drivers/vc4/vc4_blit.c | 90 ++
src/gallium/drivers/vc4/vc4_context.h|1 +
src/gallium/drivers/vc4/vc4_resource.c | 64 -
4 files changed, 92 insertions(+), 64 deletions(-)
diff --git a/src/gallium/drivers/vc4/Makefile.sources
b/src/gallium/drivers/vc4/Makefile.sources
index 62cd0e0..49474df 100644
--- a/src/gallium/drivers/vc4/Makefile.sources
+++ b/src/gallium/drivers/vc4/Makefile.sources
@@ -1,4 +1,5 @@
C_SOURCES := \
+ vc4_blit.c \
vc4_bufmgr.c \
vc4_bufmgr.h \
vc4_cl.c \
diff --git a/src/gallium/drivers/vc4/vc4_blit.c
b/src/gallium/drivers/vc4/vc4_blit.c
new file mode 100644
index 000..5c98fb6
--- /dev/null
+++ b/src/gallium/drivers/vc4/vc4_blit.c
@@ -0,0 +1,90 @@
+/*
+ * Copyright © 2015 Broadcom
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "util/u_format.h"
+#include "util/u_surface.h"
+#include "util/u_blitter.h"
+#include "vc4_context.h"
+
+static bool
+vc4_render_blit(struct pipe_context *ctx, struct pipe_blit_info *info)
+{
+struct vc4_context *vc4 = vc4_context(ctx);
+
+if (!util_blitter_is_blit_supported(vc4->blitter, info)) {
+fprintf(stderr, "blit unsupported %s -> %s",
+util_format_short_name(info->src.resource->format),
+util_format_short_name(info->dst.resource->format));
+return false;
+}
+
+util_blitter_save_vertex_buffer_slot(vc4->blitter, vc4->vertexbuf.vb);
+util_blitter_save_vertex_elements(vc4->blitter, vc4->vtx);
+util_blitter_save_vertex_shader(vc4->blitter, vc4->prog.bind_vs);
+util_blitter_save_rasterizer(vc4->blitter, vc4->rasterizer);
+util_blitter_save_viewport(vc4->blitter, &vc4->viewport);
+util_blitter_save_scissor(vc4->blitter, &vc4->scissor);
+util_blitter_save_fragment_shader(vc4->blitter, vc4->prog.bind_fs);
+util_blitter_save_blend(vc4->blitter, vc4->blend);
+util_blitter_save_depth_stencil_alpha(vc4->blitter, vc4->zsa);
+util_blitter_save_stencil_ref(vc4->blitter, &vc4->stencil_ref);
+util_blitter_save_sample_mask(vc4->blitter, vc4->sample_mask);
+util_blitter_save_framebuffer(vc4->blitter, &vc4->framebuffer);
+util_blitter_save_fragment_sampler_states(vc4->blitter,
+vc4->fragtex.num_samplers,
+(void **)vc4->fragtex.samplers);
+util_blitter_save_fragment_sampler_views(vc4->blitter,
+vc4->fragtex.num_textures, vc4->fragtex.textures);
+
+util_blitter_blit(vc4->blitter, info);
+
+return true;
+}
+
+/* Optimal hardware path for blitting pixels.
+ * Scaling, format conversion, up- and downsampling (resolve) are allowed.
+ */
+void
+vc4_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
+{
+struct pipe_blit_info info = *blit_info;
+
+if (info.src.resource->nr_samples > 1 &&
+info.dst.resource->nr_samples <= 1 &&
+!util_format_is_depth_or_stencil(info.src.resource->format) &&
+!util_format_is_pure_integer(info.src.resource->format)) {
+
Mesa (master): vc4: Skip sending down the clear colors if not clearing.
Module: Mesa
Branch: master
Commit: 5100221ff705019334fcdc17da99d257224d2aff
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5100221ff705019334fcdc17da99d257224d2aff
Author: Eric Anholt
Date: Mon Apr 6 15:19:30 2015 -0700
vc4: Skip sending down the clear colors if not clearing.
---
src/gallium/drivers/vc4/vc4_context.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_context.c
b/src/gallium/drivers/vc4/vc4_context.c
index 9b2ee5c..daa5ba5 100644
--- a/src/gallium/drivers/vc4/vc4_context.c
+++ b/src/gallium/drivers/vc4/vc4_context.c
@@ -129,11 +129,13 @@ vc4_setup_rcl(struct vc4_context *vc4)
branch_size +
color_store_size));
-cl_u8(&vc4->rcl, VC4_PACKET_CLEAR_COLORS);
-cl_u32(&vc4->rcl, vc4->clear_color[0]);
-cl_u32(&vc4->rcl, vc4->clear_color[1]);
-cl_u32(&vc4->rcl, vc4->clear_depth);
-cl_u8(&vc4->rcl, vc4->clear_stencil);
+if (vc4->cleared) {
+cl_u8(&vc4->rcl, VC4_PACKET_CLEAR_COLORS);
+cl_u32(&vc4->rcl, vc4->clear_color[0]);
+cl_u32(&vc4->rcl, vc4->clear_color[1]);
+cl_u32(&vc4->rcl, vc4->clear_depth);
+cl_u8(&vc4->rcl, vc4->clear_stencil);
+}
/* The rendering mode config determines the pointer that's used for
* VC4_PACKET_STORE_MS_TILE_BUFFER address computations. The kernel
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Mesa (master): vc4: Fix another space allocation mistake.
Module: Mesa Branch: master Commit: cb88d2cfcb1fd1ec351277e8b662cda81a5e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb88d2cfcb1fd1ec351277e8b662cda81a5e Author: Eric Anholt Date: Thu Apr 9 13:05:00 2015 -0700 vc4: Fix another space allocation mistake. We're over-allocating our BCL in vc4_draw.c, so this never mattered. However, new RCL-only blit support might end up here without having set up any BCL contents. --- src/gallium/drivers/vc4/vc4_context.c |1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/vc4/vc4_context.c b/src/gallium/drivers/vc4/vc4_context.c index 1859dd6..9b2ee5c 100644 --- a/src/gallium/drivers/vc4/vc4_context.c +++ b/src/gallium/drivers/vc4/vc4_context.c @@ -349,6 +349,7 @@ vc4_flush(struct pipe_context *pctx) * unblocking the render thread. Note that this doesn't act until the * FLUSH completes. */ +cl_ensure_space(&vc4->bcl, 8); cl_u8(&vc4->bcl, VC4_PACKET_INCREMENT_SEMAPHORE); /* The FLUSH caps all of our bin lists with a VC4_PACKET_RETURN. */ cl_u8(&vc4->bcl, VC4_PACKET_FLUSH); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Remove dead fields from vc4_surface.
Module: Mesa
Branch: master
Commit: 39b6f7e76c909505df8590b6414e8f710121108a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=39b6f7e76c909505df8590b6414e8f710121108a
Author: Eric Anholt
Date: Thu Apr 9 13:13:23 2015 -0700
vc4: Remove dead fields from vc4_surface.
---
src/gallium/drivers/vc4/vc4_resource.h |3 ---
1 file changed, 3 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_resource.h
b/src/gallium/drivers/vc4/vc4_resource.h
index b2359f0..2ed848b 100644
--- a/src/gallium/drivers/vc4/vc4_resource.h
+++ b/src/gallium/drivers/vc4/vc4_resource.h
@@ -46,9 +46,6 @@ struct vc4_surface {
struct pipe_surface base;
uint32_t offset;
uint32_t stride;
-uint32_t width;
-uint16_t height;
-uint16_t depth;
uint8_t tiling;
};
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Mesa (master): vc4: Add missed accounting for the size of the semaphore.
Module: Mesa Branch: master Commit: 8eb9304ee74b7f4a3ef9f8ac9cb04f3031a61ded URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8eb9304ee74b7f4a3ef9f8ac9cb04f3031a61ded Author: Eric Anholt Date: Mon Apr 6 15:15:37 2015 -0700 vc4: Add missed accounting for the size of the semaphore. This wouldn't have mattered except in the worst case scenario RCL setup. --- src/gallium/drivers/vc4/vc4_context.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/drivers/vc4/vc4_context.c b/src/gallium/drivers/vc4/vc4_context.c index ed10f7a..1859dd6 100644 --- a/src/gallium/drivers/vc4/vc4_context.c +++ b/src/gallium/drivers/vc4/vc4_context.c @@ -118,10 +118,12 @@ vc4_setup_rcl(struct vc4_context *vc4) uint32_t tilecoords_size = 3; uint32_t branch_size = 5 + reloc_size; uint32_t color_store_size = 1; +uint32_t semaphore_size = 1; cl_ensure_space(&vc4->rcl, clear_size + config_size + loadstore_size + +semaphore_size + xtiles * ytiles * (loadstore_size * 4 + tilecoords_size * 3 + branch_size + ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Use the blit interface for updating shadow textures.
Module: Mesa
Branch: master
Commit: adae027260bedc7af73e5cc7a74af3cafa4ab460
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=adae027260bedc7af73e5cc7a74af3cafa4ab460
Author: Eric Anholt
Date: Wed Apr 8 13:11:01 2015 -0700
vc4: Use the blit interface for updating shadow textures.
This lets us plug in a better blit implementation and have it impact the
shadow update, too.
---
src/gallium/drivers/vc4/vc4_resource.c | 44 ++--
1 file changed, 31 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_resource.c
b/src/gallium/drivers/vc4/vc4_resource.c
index cbb334f..10e1d6c 100644
--- a/src/gallium/drivers/vc4/vc4_resource.c
+++ b/src/gallium/drivers/vc4/vc4_resource.c
@@ -651,20 +651,38 @@ vc4_update_shadow_baselevel_texture(struct pipe_context
*pctx,
return;
for (int i = 0; i <= shadow->base.b.last_level; i++) {
-struct pipe_box box = {
-.x = 0,
-.y = 0,
-.z = 0,
-.width = u_minify(shadow->base.b.width0, i),
-.height = u_minify(shadow->base.b.height0, i),
-.depth = 1,
+unsigned width = u_minify(shadow->base.b.width0, i);
+unsigned height = u_minify(shadow->base.b.height0, i);
+struct pipe_blit_info info = {
+.dst = {
+.resource = &shadow->base.b,
+.level = i,
+.box = {
+.x = 0,
+.y = 0,
+.z = 0,
+.width = width,
+.height = height,
+.depth = 1,
+},
+.format = shadow->base.b.format,
+},
+.src = {
+.resource = &orig->base.b,
+.level = view->u.tex.first_level + i,
+.box = {
+.x = 0,
+.y = 0,
+.z = 0,
+.width = width,
+.height = height,
+.depth = 1,
+},
+.format = orig->base.b.format,
+},
+.mask = ~0,
};
-
-util_resource_copy_region(pctx,
- &shadow->base.b, i, 0, 0, 0,
- &orig->base.b,
- view->u.tex.first_level + i,
- &box);
+pctx->blit(pctx, &info);
}
shadow->writes = orig->writes;
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Mesa (master): vc4: Sync with kernel changes to relax BCL versus RCL validation.
Module: Mesa
Branch: master
Commit: 725620f21d19365d7a8a34d0c72694384c680afc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=725620f21d19365d7a8a34d0c72694384c680afc
Author: Eric Anholt
Date: Thu Apr 9 13:41:29 2015 -0700
vc4: Sync with kernel changes to relax BCL versus RCL validation.
There was no reason to tie the two packets' values together.
---
src/gallium/drivers/vc4/kernel/vc4_validate.c | 25 +++--
1 file changed, 3 insertions(+), 22 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index 568b625..6b73587 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -589,21 +589,6 @@ validate_tile_rendering_mode_config(VALIDATE_ARGS)
exec->fb_width = *(uint16_t *)(untrusted + 4);
exec->fb_height = *(uint16_t *)(untrusted + 6);
- /* Make sure that the fb width/height matches the binning config -- we
-* rely on being able to interchange these for various assertions.
-* (Within a tile, loads and stores will be clipped to the
-* width/height, but we allow load/storing to any binned tile).
-*/
- if (exec->fb_width <= (exec->bin_tiles_x - 1) * 64 ||
- exec->fb_width > exec->bin_tiles_x * 64 ||
- exec->fb_height <= (exec->bin_tiles_y - 1) * 64 ||
- exec->fb_height > exec->bin_tiles_y * 64) {
- DRM_ERROR("bin config %dx%d doesn't match FB %dx%d\n",
- exec->bin_tiles_x, exec->bin_tiles_y,
- exec->fb_width, exec->fb_height);
- return -EINVAL;
- }
-
flags = *(uint16_t *)(untrusted + 8);
if ((flags & VC4_RENDER_CONFIG_FORMAT_MASK) ==
VC4_RENDER_CONFIG_FORMAT_RGBA) {
@@ -632,13 +617,9 @@ validate_tile_coordinates(VALIDATE_ARGS)
uint8_t tile_x = *(uint8_t *)(untrusted + 0);
uint8_t tile_y = *(uint8_t *)(untrusted + 1);
- if (tile_x >= exec->bin_tiles_x ||
- tile_y >= exec->bin_tiles_y) {
- DRM_ERROR("Tile coordinates %d,%d > bin config %d,%d\n",
- tile_x,
- tile_y,
- exec->bin_tiles_x,
- exec->bin_tiles_y);
+ if (tile_x * 64 >= exec->fb_width || tile_y * 64 >= exec->fb_height) {
+ DRM_ERROR("Tile coordinates %d,%d > render config %dx%d\n",
+ tile_x, tile_y, exec->fb_width, exec->fb_height);
return -EINVAL;
}
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Mesa (master): i965: Use the tex projector lowering pass instead of hand-rolling it.
Module: Mesa
Branch: master
Commit: cb966fb2bea77b1d7b1bdb6597b7b85d810f2d0a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb966fb2bea77b1d7b1bdb6597b7b85d810f2d0a
Author: Eric Anholt
Date: Wed Apr 1 11:38:53 2015 -0700
i965: Use the tex projector lowering pass instead of hand-rolling it.
This only impacts the ARB_fp path. We can't quite disable the GLSL-level
lowering pass, because it needs to apply before
brw_do_lower_unnormalized_offset().
total instructions in shared programs: 5667857 -> 5667847 (-0.00%)
instructions in affected programs: 1114 -> 1104 (-0.90%)
helped:16
HURT: 6
Reviewed-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 4dfb4d6..0f1659d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -101,6 +101,9 @@ fs_visitor::emit_nir_code()
nir_lower_global_vars_to_local(nir);
nir_validate_shader(nir);
+ nir_lower_tex_projector(nir);
+ nir_validate_shader(nir);
+
nir_split_var_copies(nir);
nir_validate_shader(nir);
@@ -1782,7 +1785,6 @@ fs_visitor::nir_emit_texture(nir_tex_instr *instr)
int lod_components = 0, offset_components = 0;
fs_reg coordinate, shadow_comparitor, lod, lod2, sample_index, mcs,
tex_offset;
- fs_reg projector;
for (unsigned i = 0; i < instr->num_srcs; i++) {
fs_reg src = get_nir_src(instr->src[i].src);
@@ -1835,8 +1837,7 @@ fs_visitor::nir_emit_texture(nir_tex_instr *instr)
offset_components = instr->coord_components;
break;
case nir_tex_src_projector:
- projector = retype(src, BRW_REGISTER_TYPE_F);
- break;
+ unreachable("should be lowered");
case nir_tex_src_sampler_offset: {
/* Figure out the highest possible sampler index and mark it as used
*/
@@ -1860,13 +1861,6 @@ fs_visitor::nir_emit_texture(nir_tex_instr *instr)
}
}
- if (projector.file != BAD_FILE) {
- fs_reg invproj = vgrf(glsl_type::float_type);
- emit_math(SHADER_OPCODE_RCP, invproj, projector);
- for (int i = 0; i < 3; i++)
- emit(MUL(offset(coordinate, i), offset(coordinate, i), invproj));
- }
-
if (instr->op == nir_texop_txf_ms) {
if (brw->gen >= 7 &&
key_tex->compressed_multisample_layout_mask & (1 << sampler)) {
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Mesa (master): nir: Add an interface for the builder to insert instructions before.
Module: Mesa
Branch: master
Commit: ec029702054ddc4e098ebb96e76c7451190d649f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec029702054ddc4e098ebb96e76c7451190d649f
Author: Eric Anholt
Date: Fri Mar 27 14:18:54 2015 -0700
nir: Add an interface for the builder to insert instructions before.
So far we'd only used nir_builder to build brand new programs. But if
we're doing modifications to instructions (like in a lowering pass), then
we want to generate new stuff before the instruction we're modifying.
Reviewed-by: Jason Ekstrand
---
src/glsl/nir/nir_builder.h | 27 +++
1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/src/glsl/nir/nir_builder.h b/src/glsl/nir/nir_builder.h
index 6459e9a..ecbdbe3 100644
--- a/src/glsl/nir/nir_builder.h
+++ b/src/glsl/nir/nir_builder.h
@@ -28,6 +28,8 @@ struct exec_list;
typedef struct nir_builder {
struct exec_list *cf_node_list;
+ nir_instr *before_instr;
+
nir_shader *shader;
nir_function_impl *impl;
} nir_builder;
@@ -47,6 +49,23 @@ nir_builder_insert_after_cf_list(nir_builder *build,
build->cf_node_list = cf_node_list;
}
+static inline void
+nir_builder_insert_before_instr(nir_builder *build, nir_instr *before_instr)
+{
+ build->before_instr = before_instr;
+}
+
+static inline void
+nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
+{
+ if (build->cf_node_list) {
+ nir_instr_insert_after_cf_list(build->cf_node_list, instr);
+ } else {
+ assert(build->before_instr);
+ nir_instr_insert_before(build->before_instr, instr);
+ }
+}
+
static inline nir_ssa_def *
nir_build_imm(nir_builder *build, unsigned num_components, nir_const_value
value)
{
@@ -57,7 +76,7 @@ nir_build_imm(nir_builder *build, unsigned num_components,
nir_const_value value
load_const->value = value;
- nir_instr_insert_after_cf_list(build->cf_node_list, &load_const->instr);
+ nir_builder_instr_insert(build, &load_const->instr);
return &load_const->def;
}
@@ -125,7 +144,7 @@ nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def
*src0,
nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components, NULL);
instr->dest.write_mask = (1 << num_components) - 1;
- nir_instr_insert_after_cf_list(build->cf_node_list, &instr->instr);
+ nir_builder_instr_insert(build, &instr->instr);
return &instr->dest.dest.ssa;
}
@@ -172,7 +191,7 @@ nir_fmov_alu(nir_builder *build, nir_alu_src src, unsigned
num_components)
nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components, NULL);
mov->dest.write_mask = (1 << num_components) - 1;
mov->src[0] = src;
- nir_instr_insert_after_cf_list(build->cf_node_list, &mov->instr);
+ nir_builder_instr_insert(build, &mov->instr);
return &mov->dest.dest.ssa;
}
@@ -184,7 +203,7 @@ nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned
num_components)
nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components, NULL);
mov->dest.write_mask = (1 << num_components) - 1;
mov->src[0] = src;
- nir_instr_insert_after_cf_list(build->cf_node_list, &mov->instr);
+ nir_builder_instr_insert(build, &mov->instr);
return &mov->dest.dest.ssa;
}
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Mesa (master): nir: Add an interface to turn a nir_src into a nir_ssa_def.
Module: Mesa
Branch: master
Commit: 64bdfc698d6d9f543f82141330ae32de286b8417
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=64bdfc698d6d9f543f82141330ae32de286b8417
Author: Eric Anholt
Date: Fri Mar 27 14:19:46 2015 -0700
nir: Add an interface to turn a nir_src into a nir_ssa_def.
We use nir_ssa_defs for nir_builder args, so this takes a nir_src and
makes one so it can be passed in.
Reviewed-by: Jason Ekstrand
---
src/glsl/nir/nir_builder.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/glsl/nir/nir_builder.h b/src/glsl/nir/nir_builder.h
index ecbdbe3..587d014 100644
--- a/src/glsl/nir/nir_builder.h
+++ b/src/glsl/nir/nir_builder.h
@@ -225,4 +225,23 @@ nir_swizzle(nir_builder *build, nir_ssa_def *src, unsigned
swiz[4],
nir_imov_alu(build, alu_src, num_components);
}
+/**
+ * Turns a nir_src into a nir_ssa_def * so it can be passed to
+ * nir_build_alu()-based builder calls.
+ */
+static inline nir_ssa_def *
+nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
+{
+ if (src.is_ssa && src.ssa->num_components == num_components)
+ return src.ssa;
+
+ nir_alu_src alu;
+ memset(&alu, 0, sizeof(alu));
+ alu.src = src;
+ for (int j = 0; j < 4; j++)
+ alu.swizzle[j] = j;
+
+ return nir_imov_alu(build, alu, num_components);
+}
+
#endif /* NIR_BUILDER_H */
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Mesa (master): nir: Add a lowering pass for texture projectors.
Module: Mesa
Branch: master
Commit: ea811b7868d4039499dddf53c109cf0b9da98967
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea811b7868d4039499dddf53c109cf0b9da98967
Author: Eric Anholt
Date: Fri Mar 27 14:18:11 2015 -0700
nir: Add a lowering pass for texture projectors.
Not much hardware wants them these days, and it might give us a chance to
do CSE or algebraic at the NIR level.
Reviewed-by: Jason Ekstrand
---
src/glsl/Makefile.sources |1 +
src/glsl/nir/nir.h |1 +
src/glsl/nir/nir_lower_tex_projector.c | 142
3 files changed, 144 insertions(+)
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index b56fa26..ffce706 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -37,6 +37,7 @@ NIR_FILES = \
nir/nir_lower_phis_to_scalar.c \
nir/nir_lower_samplers.cpp \
nir/nir_lower_system_values.c \
+ nir/nir_lower_tex_projector.c \
nir/nir_lower_to_source_mods.c \
nir/nir_lower_vars_to_ssa.c \
nir/nir_lower_var_copies.c \
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 24deb82..6e2aa97 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -1601,6 +1601,7 @@ void nir_lower_samplers(nir_shader *shader,
struct gl_program *prog);
void nir_lower_system_values(nir_shader *shader);
+void nir_lower_tex_projector(nir_shader *shader);
void nir_lower_atomics(nir_shader *shader);
void nir_lower_to_source_mods(nir_shader *shader);
diff --git a/src/glsl/nir/nir_lower_tex_projector.c
b/src/glsl/nir/nir_lower_tex_projector.c
new file mode 100644
index 000..6327b23
--- /dev/null
+++ b/src/glsl/nir/nir_lower_tex_projector.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright © 2015 Broadcom
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/*
+ * This lowering pass converts the coordinate division for texture projection
+ * to be done in ALU instructions instead of asking the texture operation to
+ * do so.
+ */
+
+#include "nir.h"
+#include "nir_builder.h"
+
+static nir_ssa_def *
+channel(nir_builder *b, nir_ssa_def *def, int c)
+{
+ return nir_swizzle(b, def, (unsigned[4]){c, c, c, c}, 1, false);
+}
+
+static bool
+nir_lower_tex_projector_block(nir_block *block, void *void_state)
+{
+ nir_builder *b = void_state;
+
+ nir_foreach_instr_safe(block, instr) {
+ if (instr->type != nir_instr_type_tex)
+ continue;
+
+ nir_tex_instr *tex = nir_instr_as_tex(instr);
+ nir_builder_insert_before_instr(b, &tex->instr);
+
+ /* Find the projector in the srcs list, if present. */
+ int proj_index;
+ for (proj_index = 0; proj_index < tex->num_srcs; proj_index++) {
+ if (tex->src[proj_index].src_type == nir_tex_src_projector)
+break;
+ }
+ if (proj_index == tex->num_srcs)
+ continue;
+ nir_ssa_def *inv_proj =
+ nir_frcp(b, nir_ssa_for_src(b, tex->src[proj_index].src, 1));
+
+ /* Walk through the sources projecting the arguments. */
+ for (int i = 0; i < tex->num_srcs; i++) {
+ switch (tex->src[i].src_type) {
+ case nir_tex_src_coord:
+ case nir_tex_src_comparitor:
+break;
+ default:
+continue;
+ }
+ nir_ssa_def *unprojected =
+nir_ssa_for_src(b, tex->src[i].src, nir_tex_instr_src_size(tex,
i));
+ nir_ssa_def *projected = nir_fmul(b, unprojected, inv_proj);
+
+ /* Array indices don't get projected, so make an new vector with the
+ * coordinate's array index untouched.
+ */
+ if (tex->is_array && tex->src[i].src_type == nir_tex_src_coord) {
+switch (tex->coord_components) {
+case
Mesa (master): vc4: Add support for nir_iabs.
Module: Mesa Branch: master Commit: a9152376b49d8c56debb8023cc6e93d9c071d293 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9152376b49d8c56debb8023cc6e93d9c071d293 Author: Eric Anholt Date: Wed Apr 1 15:19:38 2015 -0700 vc4: Add support for nir_iabs. Tested using the GLSL 1.30 tests for integer abs(). Not currently used, but it was one of the new opcodes used by robclark's idiv lowering. --- src/gallium/drivers/vc4/vc4_program.c |5 + 1 file changed, 5 insertions(+) diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index 5ed2165..bcceb3c 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -1069,9 +1069,14 @@ ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr) case nir_op_fsign: *dest = ntq_fsign(c, src[0]); break; + case nir_op_fabs: *dest = qir_FMAXABS(c, src[0], src[0]); break; +case nir_op_iabs: +*dest = qir_MAX(c, src[0], +qir_SUB(c, qir_uniform_ui(c, 0), src[0])); +break; default: fprintf(stderr, "unknown NIR ALU inst: "); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Tell shader-db how big our UBOs are, if present.
Module: Mesa
Branch: master
Commit: 486dcfbbd955e01ff1d254cc533c3cc4692ad54b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=486dcfbbd955e01ff1d254cc533c3cc4692ad54b
Author: Eric Anholt
Date: Tue Mar 31 11:39:45 2015 -0700
vc4: Tell shader-db how big our UBOs are, if present.
I had regressed them for a while with the NIR work.
---
src/gallium/drivers/vc4/vc4_program.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index 9e145e5..d8726ca 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -2280,6 +2280,12 @@ vc4_get_compiled_shader(struct vc4_context *vc4, enum
qstage stage,
j++;
}
}
+if (shader->ubo_size) {
+fprintf(stderr, "SHADER-DB: %s prog %d/%d: %d UBO uniforms\n",
+qir_get_stage_name(c->stage),
+c->program_id, c->variant_id,
+shader->ubo_size / 4);
+}
qir_compile_destroy(c);
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Mesa (master): mesa: Make a shared header for 3D pipeline enum / #defines.
Module: Mesa
Branch: master
Commit: a3a07d46d1a8e89136669dd4bb242c7bd5d10015
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3a07d46d1a8e89136669dd4bb242c7bd5d10015
Author: Eric Anholt
Date: Wed Mar 25 12:58:51 2015 -0700
mesa: Make a shared header for 3D pipeline enum / #defines.
NIR uses these enums/#defines in nir_variables and associated intrinsics,
but I want to be able to use them from TGSI->NIR and NIR->TGSI.
Otherwise, we had to pull in all of mtypes.h.
This doesn't cover all of the enums we might want from a shared compiler
core (like varying slots or vert attribs), but it at least covers what I
need at the moment (system values and interp qualifiers).
v2: Move to src/glsl since util/ is really vague. Include in Makefile.am
list. Use plain bitshifts and stdint types instead of undefined
BITFIELD64_BIT.
v3: Rename to shader_enums.h. Move it into Makefile.sources.
Reviewed-by: Kenneth Graunke (v2, with
recommendation to rename)
---
src/glsl/Makefile.sources |3 +-
src/glsl/shader_enums.h | 170 +
src/mesa/main/mtypes.h| 142 +
3 files changed, 173 insertions(+), 142 deletions(-)
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index c3b63d1..fa5d991 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -185,7 +185,8 @@ LIBGLSL_FILES = \
opt_vectorize.cpp \
program.h \
s_expression.cpp \
- s_expression.h
+ s_expression.h \
+ shader_enums.h
# glsl_compiler
diff --git a/src/glsl/shader_enums.h b/src/glsl/shader_enums.h
new file mode 100644
index 000..0e08bd3
--- /dev/null
+++ b/src/glsl/shader_enums.h
@@ -0,0 +1,170 @@
+/*
+ * Mesa 3-D graphics library
+ *
+ * Copyright (C) 1999-2008 Brian Paul All Rights Reserved.
+ * Copyright (C) 2009 VMware, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef PIPELINE_H
+#define PIPELINE_H
+
+/**
+ * Bitflags for system values.
+ */
+#define SYSTEM_BIT_SAMPLE_ID ((uint64_t)1 << SYSTEM_VALUE_SAMPLE_ID)
+#define SYSTEM_BIT_SAMPLE_POS ((uint64_t)1 << SYSTEM_VALUE_SAMPLE_POS)
+#define SYSTEM_BIT_SAMPLE_MASK_IN ((uint64_t)1 << SYSTEM_VALUE_SAMPLE_MASK_IN)
+/**
+ * If the gl_register_file is PROGRAM_SYSTEM_VALUE, the register index will be
+ * one of these values. If a NIR variable's mode is nir_var_system_value, it
+ * will be one of these values.
+ */
+typedef enum
+{
+ /**
+* \name Vertex shader system values
+*/
+ /*@{*/
+ /**
+* OpenGL-style vertex ID.
+*
+* Section 2.11.7 (Shader Execution), subsection Shader Inputs, of the
+* OpenGL 3.3 core profile spec says:
+*
+* "gl_VertexID holds the integer index i implicitly passed by
+* DrawArrays or one of the other drawing commands defined in section
+* 2.8.3."
+*
+* Section 2.8.3 (Drawing Commands) of the same spec says:
+*
+* "The commandsare equivalent to the commands with the same base
+* name (without the BaseVertex suffix), except that the ith element
+* transferred by the corresponding draw call will be taken from
+* element indices[i] + basevertex of each enabled array."
+*
+* Additionally, the overview in the GL_ARB_shader_draw_parameters spec
+* says:
+*
+* "In unextended GL, vertex shaders have inputs named gl_VertexID and
+* gl_InstanceID, which contain, respectively the index of the vertex
+* and instance. The value of gl_VertexID is the implicitly passed
+* index of the vertex being processed, which includes the value of
+* baseVertex, for those commands that accept it."
+*
+* gl_VertexID gets basevertex added in. This differs from DirectX where
+* SV_Ve
Mesa (master): vc4: Convert to consuming NIR.
Module: Mesa Branch: master Commit: 73e2d4837d7e4611f31532ab0ccc14369341e0cb URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=73e2d4837d7e4611f31532ab0ccc14369341e0cb Author: Eric Anholt Date: Thu Oct 30 12:51:47 2014 -0700 vc4: Convert to consuming NIR. NIR brings us better optimization than I would have bothered to write within the driver, developers sharing future optimization work, and the ability to share device-specific lowering code that we and other GLES2-level drivers need. total uniforms in shared programs: 13421 -> 13422 (0.01%) uniforms in affected programs: 62 -> 63 (1.61%) total instructions in shared programs: 39961 -> 39707 (-0.64%) instructions in affected programs: 15494 -> 15240 (-1.64%) v2: Add missing imov support, and assert that there are no dest saturates. v3: Rebase on the target-specific algebraic series. v4: Rebase on gallium-includes-from-NIR changes in mater. v5: Rebase on variables being in lists instead of hash tables. v6: Squash in intermediate changes that used the NIR-to-TGSI pass (which I'm not committing) --- src/gallium/drivers/vc4/vc4_program.c | 1398 - src/gallium/drivers/vc4/vc4_qir.c |3 + src/gallium/drivers/vc4/vc4_qir.h | 23 +- src/gallium/drivers/vc4/vc4_screen.c |2 + src/gallium/drivers/vc4/vc4_screen.h |1 + 5 files changed, 707 insertions(+), 720 deletions(-) Diff: http://cgit.freedesktop.org/mesa/mesa/diff/?id=73e2d4837d7e4611f31532ab0ccc14369341e0cb ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Add shader-db dumping of NIR instruction count.
Module: Mesa
Branch: master
Commit: 26261bca2137eb1ca57e53f4efb95bcb3f1419df
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=26261bca2137eb1ca57e53f4efb95bcb3f1419df
Author: Eric Anholt
Date: Fri Feb 20 00:31:51 2015 -0800
vc4: Add shader-db dumping of NIR instruction count.
I was previously using temporary disables of VC4 optimization to show the
benefits of improved NIR optimization, but this can get me quick and dirty
numbers for NIR-only improvements without having to add hacks to disable
VC4's code (disabling of which might hide ways that the NIR changes would
hurt actual VC4 codegen).
---
src/gallium/drivers/vc4/vc4_program.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index 1b87fe4..5ed2165 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -1994,6 +1994,28 @@ static const nir_shader_compiler_options nir_options = {
.lower_negate = true,
};
+static bool
+count_nir_instrs_in_block(nir_block *block, void *state)
+{
+int *count = (int *) state;
+nir_foreach_instr(block, instr) {
+*count = *count + 1;
+}
+return true;
+}
+
+static int
+count_nir_instrs(nir_shader *nir)
+{
+int count = 0;
+nir_foreach_overload(nir, overload) {
+if (!overload->impl)
+continue;
+nir_foreach_block(overload->impl, count_nir_instrs_in_block,
&count);
+}
+return count;
+}
+
static struct vc4_compile *
vc4_shader_ntq(struct vc4_context *vc4, enum qstage stage,
struct vc4_key *key)
@@ -2064,6 +2086,13 @@ vc4_shader_ntq(struct vc4_context *vc4, enum qstage
stage,
nir_convert_from_ssa(c->s);
+if (vc4_debug & VC4_DEBUG_SHADERDB) {
+fprintf(stderr, "SHADER-DB: %s prog %d/%d: %d NIR
instructions\n",
+qir_get_stage_name(c->stage),
+c->program_id, c->variant_id,
+count_nir_instrs(c->s));
+}
+
if (vc4_debug & VC4_DEBUG_NIR) {
fprintf(stderr, "%s prog %d/%d NIR:\n",
qir_get_stage_name(c->stage),
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Mesa (master): gallium: Add tgsi_to_nir to get a nir_shader for a TGSI shader.
Module: Mesa Branch: master Commit: 783ad697d25e754ab719ab6c715969c35dbe867b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=783ad697d25e754ab719ab6c715969c35dbe867b Author: Eric Anholt Date: Wed Oct 29 14:32:16 2014 -0700 gallium: Add tgsi_to_nir to get a nir_shader for a TGSI shader. This will be used by the VC4 driver for doing device-independent optimization, and hopefully eventually replacing its whole IR. It also may be useful to other drivers for the same reason. v2: Add all of the instructions I was relying on tgsi_lowering to remove, and more. v3: Rebase on SSA rework of the builder. v4: Use the NIR ineg operation instead of doing a src modifier. v5: Don't use ineg for fnegs. (infer_src_type on MOV doesn't do what I expect, again). v6: Fix handling of multi-channel KILL_IF sources. v7: Make ttn_get_f() return a swizzle of a scalar load_const, rather than a vector load_const. CSE doesn't recognize that srcs out of those channels are actually all the same. v8: Rebase on nir_builder auto-sizing, make the scalar arguments to non-ALU instructions actually be scalars. v9: Add support for if/loop instructions, additional texture targets, and untested support for indirect addressing on temps. v10: Rebase on master, drop bad comment about control flow and just choose the X channel, use int comparison opcodes in LIT for now, drop unused pipe_context argument.. v11: Fix translation of LRP (previously missed because I mis-translated back out), use nir_builder init helpers. v12: Rebase on master, adding explicit include of mtypes.h to get INTERP_QUALIFIER_* v13: Rebase on variables being in lists instead of hash tables, drop use of mtypes.h in favor of util/pipeline.h. Use Ken's nir_builder swizzle and fmov/imov_alu helpers, drop "struct" in front of nir_builder, use nir_builder directly as the function arg in a lot of cases, drop redundant members of ttn_compile that are also in nir_builder, drop some half-baked malloc failure handling. v14: The indirect uniform src0 should be scalar, not vector (noticed as odd by robclark, confirmed by cwabbott). Apply Ken's review to initialize s->num_uniforms and friends, skip ttn_channel for dot products, and use the simpler discard_if intrinsic. Reviewed-by: Kenneth Graunke (v13) Acked-by: Rob Clark --- src/gallium/auxiliary/Makefile.sources |1 + src/gallium/auxiliary/nir/tgsi_to_nir.c | 1423 +++ src/gallium/auxiliary/nir/tgsi_to_nir.h | 30 + 3 files changed, 1454 insertions(+) diff --git a/src/gallium/auxiliary/Makefile.sources b/src/gallium/auxiliary/Makefile.sources index 09496fa..08e4e4c 100644 --- a/src/gallium/auxiliary/Makefile.sources +++ b/src/gallium/auxiliary/Makefile.sources @@ -69,6 +69,7 @@ C_SOURCES := \ indices/u_indices_priv.h \ indices/u_primconvert.c \ indices/u_primconvert.h \ + nir/tgsi_to_nir.c \ os/os_memory_aligned.h \ os/os_memory_debug.h \ os/os_memory_stdc.h \ diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c new file mode 100644 index 000..4935f6c --- /dev/null +++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c @@ -0,0 +1,1423 @@ +/* + * Copyright © 2014-2015 Broadcom + * Copyright (C) 2014 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "util/ralloc.h" +#include "glsl/nir/nir.h" +#include "glsl/nir/nir_builder.h" +#include "glsl/list.h" +#include "glsl/shader_enums.h" + +#include "nir/tgsi_to_nir.h" +#include "tgsi/tgsi_parse.h" +#include "tgsi/tgsi_dump.h" +#include "tgsi/tgsi_info.h" +#include "tgsi/tgsi_scan.h" + +#define
Mesa (master): nir: Recognize a pattern of bool frobbing from TGSI KILL_IF.
Module: Mesa
Branch: master
Commit: 15b03b7964fc2c3c52e9f384815b76957f557878
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=15b03b7964fc2c3c52e9f384815b76957f557878
Author: Eric Anholt
Date: Sun Mar 29 23:04:21 2015 -0700
nir: Recognize a pattern of bool frobbing from TGSI KILL_IF.
TGSI's conditional discards take float arg and negate it, so GLSL to TGSI
generates a b2f and negates that value. Only, in NIR we want a proper
bool once again, so we compare with 0. This is a lot of pointless extra
instructions.
total instructions in shared programs: 39735 -> 39702 (-0.08%)
instructions in affected programs: 1342 -> 1309 (-2.46%)
Reviewed-by: Connor Abbott
---
src/glsl/nir/nir_opt_algebraic.py |2 ++
1 file changed, 2 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 301d7a8..190bd91 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -100,6 +100,8 @@ optimizations = [
(('fmul', ('b2f', a), ('b2f', b)), ('b2f', ('iand', a, b))),
(('fsat', ('fadd', ('b2f', a), ('b2f', b))), ('b2f', ('ior', a, b))),
(('iand', 'a@bool', 1.0), ('b2f', a)),
+ (('flt', ('fneg', ('b2f', a)), 0), a), # Generated by TGSI KILL_IF.
+ (('flt', ('fsub', 0.0, ('b2f', a)), 0), a), # Generated by TGSI KILL_IF.
# Comparison with the same args. Note that these are not done for
# the float versions because NaN always returns false on float
# inequalities.
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Mesa (master): nir: Recognize a pattern for doing b2f without the opcode.
Module: Mesa
Branch: master
Commit: 6e8d4a2f8043a3a7a28175326e63770aa9511ee7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e8d4a2f8043a3a7a28175326e63770aa9511ee7
Author: Eric Anholt
Date: Sun Mar 29 22:59:39 2015 -0700
nir: Recognize a pattern for doing b2f without the opcode.
Since we have patterns based on b2f, generate them if we see the b2f
equivalent using an iand. This is common when generating NIR from TGSI.
Reviewed-by: Connor Abbott
---
src/glsl/nir/nir_opt_algebraic.py |1 +
1 file changed, 1 insertion(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 66b456d..301d7a8 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -99,6 +99,7 @@ optimizations = [
# Emulating booleans
(('fmul', ('b2f', a), ('b2f', b)), ('b2f', ('iand', a, b))),
(('fsat', ('fadd', ('b2f', a), ('b2f', b))), ('b2f', ('ior', a, b))),
+ (('iand', 'a@bool', 1.0), ('b2f', a)),
# Comparison with the same args. Note that these are not done for
# the float versions because NaN always returns false on float
# inequalities.
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Mesa (master): vc4: Drop integer multiplies with 0 to moves of 0.
Module: Mesa
Branch: master
Commit: 1dcc1ee314a6907213e2abd5337ec0bbba3bd1bf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1dcc1ee314a6907213e2abd5337ec0bbba3bd1bf
Author: Eric Anholt
Date: Mon Mar 30 10:44:28 2015 -0700
vc4: Drop integer multiplies with 0 to moves of 0.
This cleans up more instructions generated by uniform array indexing
multiplies.
total instructions in shared programs: 39989 -> 39961 (-0.07%)
instructions in affected programs: 896 -> 868 (-3.12%)
---
src/gallium/drivers/vc4/vc4_opt_algebraic.c |8
1 file changed, 8 insertions(+)
diff --git a/src/gallium/drivers/vc4/vc4_opt_algebraic.c
b/src/gallium/drivers/vc4/vc4_opt_algebraic.c
index d17669a..e40e0f3 100644
--- a/src/gallium/drivers/vc4/vc4_opt_algebraic.c
+++ b/src/gallium/drivers/vc4/vc4_opt_algebraic.c
@@ -248,6 +248,14 @@ qir_opt_algebraic(struct vc4_compile *c)
}
break;
+case QOP_MUL24:
+if (replace_x_0_with_0(c, inst, 0) ||
+replace_x_0_with_0(c, inst, 1)) {
+progress = true;
+break;
+}
+break;
+
case QOP_AND:
if (replace_x_0_with_0(c, inst, 0) ||
replace_x_0_with_0(c, inst, 1)) {
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Mesa (master): vc4: Add a constant folding pass.
Module: Mesa
Branch: master
Commit: 8c5dcdbccb68b73d2856d9c1faafadc536e682e3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c5dcdbccb68b73d2856d9c1faafadc536e682e3
Author: Eric Anholt
Date: Mon Mar 30 10:38:21 2015 -0700
vc4: Add a constant folding pass.
This cleans up some pointless operations generated by the in-driver mul24
lowering (commonly generated by making a vec4 index for a matrix in a
uniform array).
I could fill in other operations, but pretty much anything else ought to
be getting handled at the NIR level, I think.
total uniforms in shared programs: 13423 -> 13421 (-0.01%)
uniforms in affected programs: 346 -> 344 (-0.58%)
---
src/gallium/drivers/vc4/Makefile.sources |1 +
src/gallium/drivers/vc4/vc4_opt_constant_folding.c | 110
src/gallium/drivers/vc4/vc4_qir.c |1 +
src/gallium/drivers/vc4/vc4_qir.h |1 +
4 files changed, 113 insertions(+)
diff --git a/src/gallium/drivers/vc4/Makefile.sources
b/src/gallium/drivers/vc4/Makefile.sources
index c7254ea..ec0f25c 100644
--- a/src/gallium/drivers/vc4/Makefile.sources
+++ b/src/gallium/drivers/vc4/Makefile.sources
@@ -12,6 +12,7 @@ C_SOURCES := \
vc4_fence.c \
vc4_formats.c \
vc4_opt_algebraic.c \
+ vc4_opt_constant_folding.c \
vc4_opt_copy_propagation.c \
vc4_opt_cse.c \
vc4_opt_dead_code.c \
diff --git a/src/gallium/drivers/vc4/vc4_opt_constant_folding.c
b/src/gallium/drivers/vc4/vc4_opt_constant_folding.c
new file mode 100644
index 000..ac9be5c
--- /dev/null
+++ b/src/gallium/drivers/vc4/vc4_opt_constant_folding.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright © 2015 Broadcom
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/**
+ * @file vc4_opt_constant_folding.c
+ *
+ * Simple constant folding pass to clean up operations on only constants,
+ * which we might have generated within vc4_program.c.
+ */
+
+#include "vc4_qir.h"
+#include "util/u_math.h"
+
+static bool debug;
+
+static void
+dump_from(struct vc4_compile *c, struct qinst *inst)
+{
+if (!debug)
+return;
+
+fprintf(stderr, "optimizing: ");
+qir_dump_inst(c, inst);
+fprintf(stderr, "\n");
+}
+
+static void
+dump_to(struct vc4_compile *c, struct qinst *inst)
+{
+if (!debug)
+return;
+
+fprintf(stderr, "to: ");
+qir_dump_inst(c, inst);
+fprintf(stderr, "\n");
+}
+
+static bool
+constant_fold(struct vc4_compile *c, struct qinst *inst)
+{
+int nsrc = qir_get_op_nsrc(inst->op);
+uint32_t ui[nsrc];
+
+for (int i = 0; i < nsrc; i++) {
+struct qreg reg = inst->src[i];
+if (reg.file == QFILE_UNIF &&
+c->uniform_contents[reg.index] == QUNIFORM_CONSTANT) {
+ui[i] = c->uniform_data[reg.index];
+} else if (reg.file == QFILE_SMALL_IMM) {
+ui[i] = reg.index;
+} else {
+return false;
+}
+}
+
+uint32_t result = 0;
+switch (inst->op) {
+case QOP_SHR:
+result = ui[0] >> ui[1];
+break;
+
+default:
+return false;
+}
+
+dump_from(c, inst);
+
+inst->src[0] = qir_uniform_ui(c, result);
+for (int i = 1; i < nsrc; i++)
+inst->src[i] = c->undef;
+inst->op = QOP_MOV;
+
+dump_to(c, inst);
+return true;
+}
+
+bool
+qir_opt_constant_folding(struct vc4_compile *c)
+{
+bool progress = false;
+struct simple_node *node;
+
+foreach(node, &c->instructions) {
+struct qinst *inst
Mesa (master): vc4: Don' t bother masking out the low 24 bits for integer multiplies
Module: Mesa
Branch: master
Commit: c519c4d85e7b4f9cad4e51dc08e8ae99bf3c810d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c519c4d85e7b4f9cad4e51dc08e8ae99bf3c810d
Author: Eric Anholt
Date: Sun Mar 29 21:26:16 2015 -0700
vc4: Don't bother masking out the low 24 bits for integer multiplies
The hardware just uses the low 24 lines, saving us an AND to drop the high
bits.
total uniforms in shared programs: 13433 -> 13423 (-0.07%)
uniforms in affected programs: 356 -> 346 (-2.81%)
total instructions in shared programs: 40003 -> 39989 (-0.03%)
instructions in affected programs: 910 -> 896 (-1.54%)
---
src/gallium/drivers/vc4/vc4_program.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index 49b9466..9e145e5 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -366,18 +366,14 @@ tgsi_to_qir_umul(struct vc4_compile *c,
struct tgsi_full_instruction *tgsi_inst,
enum qop op, struct qreg *src, int i)
{
-struct qreg src0_hi = qir_SHR(c, src[0 * 4 + i],
- qir_uniform_ui(c, 24));
-struct qreg src0_lo = qir_AND(c, src[0 * 4 + i],
- qir_uniform_ui(c, 0xff));
-struct qreg src1_hi = qir_SHR(c, src[1 * 4 + i],
- qir_uniform_ui(c, 24));
-struct qreg src1_lo = qir_AND(c, src[1 * 4 + i],
- qir_uniform_ui(c, 0xff));
-
-struct qreg hilo = qir_MUL24(c, src0_hi, src1_lo);
-struct qreg lohi = qir_MUL24(c, src0_lo, src1_hi);
-struct qreg lolo = qir_MUL24(c, src0_lo, src1_lo);
+struct qreg src0 = src[0 * 4 + i];
+struct qreg src0_hi = qir_SHR(c, src0, qir_uniform_ui(c, 24));
+struct qreg src1 = src[1 * 4 + i];
+struct qreg src1_hi = qir_SHR(c, src1, qir_uniform_ui(c, 24));
+
+struct qreg hilo = qir_MUL24(c, src0_hi, src1);
+struct qreg lohi = qir_MUL24(c, src0, src1_hi);
+struct qreg lolo = qir_MUL24(c, src0, src1);
return qir_ADD(c, lolo, qir_SHL(c,
qir_ADD(c, hilo, lohi),
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Mesa (master): vc4: Make integer multiply use 24 bits for the low parts.
Module: Mesa
Branch: master
Commit: 5df8bf86fe40ae95ad3888cb167ce80c710af227
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5df8bf86fe40ae95ad3888cb167ce80c710af227
Author: Eric Anholt
Date: Sun Mar 29 21:21:10 2015 -0700
vc4: Make integer multiply use 24 bits for the low parts.
The hardware uses the low 24 bits in integer multiplies, so we can have
fewer high bits (and so probably drop them more frequently).
---
src/gallium/drivers/vc4/vc4_program.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_program.c
b/src/gallium/drivers/vc4/vc4_program.c
index 56a3a96..49b9466 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -367,13 +367,13 @@ tgsi_to_qir_umul(struct vc4_compile *c,
enum qop op, struct qreg *src, int i)
{
struct qreg src0_hi = qir_SHR(c, src[0 * 4 + i],
- qir_uniform_ui(c, 16));
+ qir_uniform_ui(c, 24));
struct qreg src0_lo = qir_AND(c, src[0 * 4 + i],
- qir_uniform_ui(c, 0x));
+ qir_uniform_ui(c, 0xff));
struct qreg src1_hi = qir_SHR(c, src[1 * 4 + i],
- qir_uniform_ui(c, 16));
+ qir_uniform_ui(c, 24));
struct qreg src1_lo = qir_AND(c, src[1 * 4 + i],
- qir_uniform_ui(c, 0x));
+ qir_uniform_ui(c, 0xff));
struct qreg hilo = qir_MUL24(c, src0_hi, src1_lo);
struct qreg lohi = qir_MUL24(c, src0_lo, src1_hi);
@@ -381,7 +381,7 @@ tgsi_to_qir_umul(struct vc4_compile *c,
return qir_ADD(c, lolo, qir_SHL(c,
qir_ADD(c, hilo, lohi),
-qir_uniform_ui(c, 16)));
+qir_uniform_ui(c, 24)));
}
static struct qreg
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Mesa (master): nir: Add optional lowering of flrp.
Module: Mesa
Branch: master
Commit: afa9fc15613c3ebdc59245c9d4d8c1280b2a2a37
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=afa9fc15613c3ebdc59245c9d4d8c1280b2a2a37
Author: Eric Anholt
Date: Wed Feb 18 12:24:38 2015 -0800
nir: Add optional lowering of flrp.
Reviewed-by: Matt Turner
Reviewed-by: Connor Abbott
---
src/glsl/nir/nir.h|1 +
src/glsl/nir/nir_opt_algebraic.py |1 +
2 files changed, 2 insertions(+)
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 29fe942..7b886e3 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -1365,6 +1365,7 @@ typedef struct nir_function {
typedef struct nir_shader_compiler_options {
bool lower_ffma;
+ bool lower_flrp;
bool lower_fpow;
bool lower_fsat;
bool lower_fsqrt;
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 1ee51a0..20ec4d3 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -75,6 +75,7 @@ optimizations = [
(('flrp', a, b, 1.0), b),
(('flrp', a, a, b), a),
(('flrp', 0.0, a, b), ('fmul', a, b)),
+ (('flrp', a, b, c), ('fadd', ('fmul', c, ('fsub', b, a)), a),
'options->lower_flrp'),
(('ffma', a, b, c), ('fadd', ('fmul', a, b), c), 'options->lower_ffma'),
(('fadd', ('fmul', a, b), c), ('ffma', a, b, c), '!options->lower_ffma'),
# Comparison simplifications
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Mesa (master): vc4: Allow DRI3 on simulation, as well.
Module: Mesa Branch: master Commit: 4df13f55b6c2cdda82b7909e1b089cc72f4c1151 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4df13f55b6c2cdda82b7909e1b089cc72f4c1151 Author: Eric Anholt Date: Mon Mar 23 16:15:11 2015 -0700 vc4: Allow DRI3 on simulation, as well. The problem I'd seen before seems to be gone. --- src/gallium/auxiliary/target-helpers/inline_drm_helper.h |5 + 1 file changed, 5 insertions(+) diff --git a/src/gallium/auxiliary/target-helpers/inline_drm_helper.h b/src/gallium/auxiliary/target-helpers/inline_drm_helper.h index df818fe..54c1c6c 100644 --- a/src/gallium/auxiliary/target-helpers/inline_drm_helper.h +++ b/src/gallium/auxiliary/target-helpers/inline_drm_helper.h @@ -472,6 +472,11 @@ dd_configuration(enum drm_conf conf) if (strcmp(driver_name, "vc4") == 0) return configuration_query(conf); else +#if defined(USE_VC4_SIMULATOR) + if (strcmp(driver_name, "i965") == 0) + return configuration_query(conf); + else +#endif #endif return NULL; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): vc4: Use our device-specific ioctls for create/mmap.
Module: Mesa
Branch: master
Commit: 25d60763d9c2767c279f28ac2a7eddcd245f4259
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=25d60763d9c2767c279f28ac2a7eddcd245f4259
Author: Eric Anholt
Date: Mon Mar 23 17:17:17 2015 -0700
vc4: Use our device-specific ioctls for create/mmap.
They don't do anything special for us, but I've been told by kernel
maintainers that relying on dumb for my acceleration-capable buffers
is not OK.
---
src/gallium/drivers/vc4/vc4_bufmgr.c | 51 --
1 file changed, 36 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_bufmgr.c
b/src/gallium/drivers/vc4/vc4_bufmgr.c
index 0077864..4bb2c71 100644
--- a/src/gallium/drivers/vc4/vc4_bufmgr.c
+++ b/src/gallium/drivers/vc4/vc4_bufmgr.c
@@ -65,6 +65,8 @@ struct vc4_bo *
vc4_bo_alloc(struct vc4_screen *screen, uint32_t size, const char *name)
{
struct vc4_bo *bo;
+int ret;
+
size = align(size, 4096);
bo = vc4_bo_from_cache(screen, size, name);
@@ -81,22 +83,31 @@ vc4_bo_alloc(struct vc4_screen *screen, uint32_t size,
const char *name)
bo->name = name;
bo->private = true;
-struct drm_mode_create_dumb create;
-memset(&create, 0, sizeof(create));
+if (!using_vc4_simulator) {
+struct drm_vc4_create_bo create;
+memset(&create, 0, sizeof(create));
+
+create.size = size;
+
+ret = drmIoctl(screen->fd, DRM_IOCTL_VC4_CREATE_BO, &create);
+bo->handle = create.handle;
+} else {
+struct drm_mode_create_dumb create;
+memset(&create, 0, sizeof(create));
-create.width = 128;
-create.bpp = 8;
-create.height = (size + 127) / 128;
+create.width = 128;
+create.bpp = 8;
+create.height = (size + 127) / 128;
-int ret = drmIoctl(screen->fd, DRM_IOCTL_MODE_CREATE_DUMB, &create);
+ret = drmIoctl(screen->fd, DRM_IOCTL_MODE_CREATE_DUMB,
&create);
+bo->handle = create.handle;
+assert(create.size >= size);
+}
if (ret != 0) {
fprintf(stderr, "create ioctl failure\n");
abort();
}
-bo->handle = create.handle;
-assert(create.size >= size);
-
return bo;
}
@@ -371,25 +382,35 @@ vc4_bo_wait(struct vc4_bo *bo, uint64_t timeout_ns)
void *
vc4_bo_map_unsynchronized(struct vc4_bo *bo)
{
+uint64_t offset;
int ret;
if (bo->map)
return bo->map;
-struct drm_mode_map_dumb map;
-memset(&map, 0, sizeof(map));
-map.handle = bo->handle;
-ret = drmIoctl(bo->screen->fd, DRM_IOCTL_MODE_MAP_DUMB, &map);
+if (!using_vc4_simulator) {
+struct drm_vc4_mmap_bo map;
+memset(&map, 0, sizeof(map));
+map.handle = bo->handle;
+ret = drmIoctl(bo->screen->fd, DRM_IOCTL_VC4_MMAP_BO, &map);
+offset = map.offset;
+} else {
+struct drm_mode_map_dumb map;
+memset(&map, 0, sizeof(map));
+map.handle = bo->handle;
+ret = drmIoctl(bo->screen->fd, DRM_IOCTL_MODE_MAP_DUMB, &map);
+offset = map.offset;
+}
if (ret != 0) {
fprintf(stderr, "map ioctl failure\n");
abort();
}
bo->map = mmap(NULL, bo->size, PROT_READ | PROT_WRITE, MAP_SHARED,
- bo->screen->fd, map.offset);
+ bo->screen->fd, offset);
if (bo->map == MAP_FAILED) {
fprintf(stderr, "mmap of bo %d (offset 0x%016llx, size %d)
failed\n",
-bo->handle, (long long)map.offset, bo->size);
+bo->handle, (long long)offset, bo->size);
abort();
}
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Mesa (master): vc4: Write the alignment of level width consistently in validation.
Module: Mesa
Branch: master
Commit: b3ea377f8629ada57c67632a89f0d2e9d2faf23c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3ea377f8629ada57c67632a89f0d2e9d2faf23c
Author: Eric Anholt
Date: Mon Mar 23 16:34:24 2015 -0700
vc4: Write the alignment of level width consistently in validation.
16 / cpp happens to be the same as utile_w on the only raster format
supported (4 bytes per pixel), but simulator/hw source code generally
talks in terms of utiles.
---
src/gallium/drivers/vc4/kernel/vc4_validate.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c
b/src/gallium/drivers/vc4/kernel/vc4_validate.c
index 0691a8d..568b625 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c
@@ -164,7 +164,7 @@ check_tex_size(struct vc4_exec_info *exec, struct
drm_gem_cma_object *fbo,
switch (tiling_format) {
case VC4_TILING_FORMAT_LINEAR:
- aligned_width = roundup(width, 16 / cpp);
+ aligned_width = roundup(width, utile_w);
aligned_height = height;
break;
case VC4_TILING_FORMAT_T:
@@ -951,7 +951,7 @@ reloc_tex(struct vc4_exec_info *exec,
aligned_height = roundup(level_height, utile_h);
break;
default:
- aligned_width = roundup(level_width, 16 / cpp);
+ aligned_width = roundup(level_width, utile_w);
aligned_height = level_height;
break;
}
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Mesa (master): vc4: Decide the HW's format before laying out the miptree.
Module: Mesa Branch: master Commit: 04605c21f65bfbc78018c5bafa8cbf49e96a33b5 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=04605c21f65bfbc78018c5bafa8cbf49e96a33b5 Author: Eric Anholt Date: Mon Mar 23 16:21:25 2015 -0700 vc4: Decide the HW's format before laying out the miptree. I'm experimenting with a workaround for raster texture misrendering on hardware, and this lets me look at the format chosen when computing strides. --- src/gallium/drivers/vc4/vc4_resource.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/vc4/vc4_resource.c b/src/gallium/drivers/vc4/vc4_resource.c index 0dda0d8..c640cf6 100644 --- a/src/gallium/drivers/vc4/vc4_resource.c +++ b/src/gallium/drivers/vc4/vc4_resource.c @@ -373,14 +373,14 @@ vc4_resource_create(struct pipe_screen *pscreen, rsc->tiled = true; } +if (tmpl->target != PIPE_BUFFER) +rsc->vc4_format = get_resource_texture_format(prsc); + vc4_setup_slices(rsc); vc4_resource_bo_alloc(rsc); if (!rsc->bo) goto fail; -if (tmpl->target != PIPE_BUFFER) -rsc->vc4_format = get_resource_texture_format(prsc); - return prsc; fail: vc4_resource_destroy(pscreen, prsc); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
