mesa: Changes to 'master'
src/mesa/drivers/dri/nouveau/nouveau_screen.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) commit diffs at http://gitweb.freedesktop.org/?p=mesa/mesa.git;a=summary New commits: commit f59d59a95f668b99fa51d25fe6e80ea59fc663ae Author: Patrice Mandin <[EMAIL PROTECTED]> Date: Sun Mar 2 12:16:23 2008 +0100 nouveau: compilation fixes ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (gallium-0.2): nouveau: remove useless NOUVEAU_BO_SWIZZLED flag, copy/ paste nv40 work to swizzle textures
Module: Mesa
Branch: gallium-0.2
Commit: 6432d03c3d7ae21312e983fe41f4df7d66f7a3bf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6432d03c3d7ae21312e983fe41f4df7d66f7a3bf
Author: Patrice Mandin
Date: Fri Dec 12 17:22:41 2008 +0100
nouveau: remove useless NOUVEAU_BO_SWIZZLED flag, copy/paste nv40 work to
swizzle textures
---
src/gallium/drivers/nouveau/nouveau_bo.h |1 -
src/gallium/drivers/nv30/nv30_fragtex.c | 46 +++--
src/gallium/drivers/nv30/nv30_miptree.c | 57 +--
src/gallium/drivers/nv30/nv30_screen.c | 63 +++---
src/gallium/drivers/nv30/nv30_state.h|3 +
src/gallium/drivers/nv30/nv30_state_fb.c | 39 ++-
6 files changed, 167 insertions(+), 42 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nouveau_bo.h
b/src/gallium/drivers/nouveau/nouveau_bo.h
index 0ed3367..65b1382 100644
--- a/src/gallium/drivers/nouveau/nouveau_bo.h
+++ b/src/gallium/drivers/nouveau/nouveau_bo.h
@@ -37,7 +37,6 @@
#define NOUVEAU_BO_LOCAL (1 << 9)
#define NOUVEAU_BO_TILED (1 << 10)
#define NOUVEAU_BO_ZTILE (1 << 11)
-#define NOUVEAU_BO_SWIZZLED (1 << 12)
#define NOUVEAU_BO_DUMMY (1 << 31)
struct nouveau_bo {
diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c
b/src/gallium/drivers/nv30/nv30_fragtex.c
index 9e6f746..efba8db 100644
--- a/src/gallium/drivers/nv30/nv30_fragtex.c
+++ b/src/gallium/drivers/nv30/nv30_fragtex.c
@@ -26,7 +26,7 @@ static INLINE int log2i(int i)
return r;
}
-#define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w,swsurf)
\
+#define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w)
\
{
\
TRUE,
\
PIPE_FORMAT_##m,
\
@@ -34,8 +34,7 @@ static INLINE int log2i(int i)
(NV34TCL_TX_SWIZZLE_S0_X_##ts0x | NV34TCL_TX_SWIZZLE_S0_Y_##ts0y |
\
NV34TCL_TX_SWIZZLE_S0_Z_##ts0z | NV34TCL_TX_SWIZZLE_S0_W_##ts0w |
\
NV34TCL_TX_SWIZZLE_S1_X_##ts1x | NV34TCL_TX_SWIZZLE_S1_Y_##ts1y |
\
- NV34TCL_TX_SWIZZLE_S1_Z_##ts1z | NV34TCL_TX_SWIZZLE_S1_W_##ts1w),
\
- swsurf
\
+ NV34TCL_TX_SWIZZLE_S1_Z_##ts1z | NV34TCL_TX_SWIZZLE_S1_W_##ts1w)
\
}
struct nv30_texture_format {
@@ -43,25 +42,24 @@ struct nv30_texture_format {
uintpipe;
int format;
int swizzle;
- int swizzled_surface;
};
static struct nv30_texture_format
nv30_texture_formats[] = {
- _(A8R8G8B8_UNORM, A8R8G8B8, S1, S1, S1, S1, X, Y, Z, W, 1),
- _(A1R5G5B5_UNORM, A1R5G5B5, S1, S1, S1, S1, X, Y, Z, W, 1),
- _(A4R4G4B4_UNORM, A4R4G4B4, S1, S1, S1, S1, X, Y, Z, W, 1),
- _(R5G6B5_UNORM , R5G6B5 , S1, S1, S1, ONE, X, Y, Z, W, 1),
- _(L8_UNORM , L8 , S1, S1, S1, ONE, X, X, X, X, 1),
- _(A8_UNORM , L8 , ZERO, ZERO, ZERO, S1, X, X, X, X, 1),
- _(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X, 1),
- _(A8L8_UNORM, A8L8, S1, S1, S1, S1, X, X, X, Y, 1),
-// _(Z16_UNORM , Z16 , S1, S1, S1, ONE, X, X, X, X, 0),
-// _(Z24S8_UNORM , Z24 , S1, S1, S1, ONE, X, X, X, X, 0),
- _(DXT1_RGB , DXT1, S1, S1, S1, ONE, X, Y, Z, W, 0),
- _(DXT1_RGBA , DXT1, S1, S1, S1, S1, X, Y, Z, W, 0),
- _(DXT3_RGBA , DXT3, S1, S1, S1, S1, X, Y, Z, W, 0),
- _(DXT5_RGBA , DXT5, S1, S1, S1, S1, X, Y, Z, W, 0),
+ _(A8R8G8B8_UNORM, A8R8G8B8, S1, S1, S1, S1, X, Y, Z, W),
+ _(A1R5G5B5_UNORM, A1R5G5B5, S1, S1, S1, S1, X, Y, Z, W),
+ _(A4R4G4B4_UNORM, A4R4G4B4, S1, S1, S1, S1, X, Y, Z, W),
+ _(R5G6B5_UNORM , R5G6B5 , S1, S1, S1, ONE, X, Y, Z, W),
+ _(L8_UNORM , L8 , S1, S1, S1, ONE, X, X, X, X),
+ _(A8_UNORM , L8 , ZERO, ZERO, ZERO, S1, X, X, X, X),
+ _(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X),
+ _(A8L8_UNORM, A8L8, S1, S1, S1, S1, X, X, X, Y),
+// _(Z16_UNORM , Z16 , S1, S1, S1, ONE, X, X, X, X),
+// _(Z24S8_UNORM , Z24 , S1, S1, S1, ONE, X, X, X, X),
+ _(DXT1_RGB , DXT1, S1, S1, S1, ONE, X, Y, Z, W),
+ _(DXT1_RGBA , DXT1, S1, S1, S1, S1, X, Y, Z, W),
+ _(DXT3_RGBA , DXT3, S1, S1, S1, S1, X, Y, Z, W),
+ _(DXT5_RGBA , DXT5, S1, S1, S1, S1, X, Y, Z, W),
{},
};
@@ -90,16 +88,13 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
struct pipe_texture *pt =
Mesa (gallium-0.2): nouveau: nv30 does not support separate blend functions for alpha and rgb
Module: Mesa
Branch: gallium-0.2
Commit: bcb5ea097c11e3776070f30b00fcf6c5fac62df3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bcb5ea097c11e3776070f30b00fcf6c5fac62df3
Author: Patrice Mandin
Date: Wed Jan 21 21:59:10 2009 +0100
nouveau: nv30 does not support separate blend functions for alpha and rgb
---
src/gallium/drivers/nv30/nv30_state.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_state.c
b/src/gallium/drivers/nv30/nv30_state.c
index fc66075..47e1a62 100644
--- a/src/gallium/drivers/nv30/nv30_state.c
+++ b/src/gallium/drivers/nv30/nv30_state.c
@@ -23,9 +23,10 @@ nv30_blend_state_create(struct pipe_context *pipe,
nvgl_blend_func(cso->rgb_src_factor));
so_data (so, nvgl_blend_func(cso->alpha_dst_factor) << 16 |
nvgl_blend_func(cso->rgb_dst_factor));
+ /* FIXME: Gallium assumes GL_EXT_blend_func_separate.
+ It is not the case for NV30 */
so_method(so, rankine, NV34TCL_BLEND_EQUATION, 1);
- so_data (so, nvgl_blend_eqn(cso->alpha_func) << 16 |
- nvgl_blend_eqn(cso->rgb_func));
+ so_data (so, nvgl_blend_eqn(cso->rgb_func));
} else {
so_method(so, rankine, NV34TCL_BLEND_FUNC_ENABLE, 1);
so_data (so, 0);
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Mesa (gallium-0.2): nouveau: include and calc offset before changing dimensions for next level
Module: Mesa Branch: gallium-0.2 Commit: b907d4cd8fafe719b4f87d877562829548937485 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b907d4cd8fafe719b4f87d877562829548937485 Author: Patrice Mandin Date: Sun Feb 8 17:03:47 2009 +0100 nouveau: include and calc offset before changing dimensions for next level --- src/gallium/drivers/nv04/nv04_surface_2d.c |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c b/src/gallium/drivers/nv04/nv04_surface_2d.c index 1892055..1b5d980 100644 --- a/src/gallium/drivers/nv04/nv04_surface_2d.c +++ b/src/gallium/drivers/nv04/nv04_surface_2d.c @@ -1,6 +1,7 @@ #include "pipe/p_context.h" #include "pipe/p_format.h" #include "util/u_memory.h" +#include "util/u_math.h" #include "nouveau/nouveau_winsys.h" #include "nouveau/nouveau_util.h" @@ -159,10 +160,10 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx, } } + /* FIXME: need to know how many bytes per pixel */ + offset += align(w * h * 2 /*src->block.size*/, 64); w >>= 1; h >>= 1; - /* FIXME: need to know how many bytes per pixel */ - offset += align(w * h * 2, 64); } return 0; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (gallium-0.2): nouveau: upload and swizzle each mipmap level in turn
Module: Mesa
Branch: gallium-0.2
Commit: ea7ca7607a97a1c13248f7aef1948b5ccb6423e0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea7ca7607a97a1c13248f7aef1948b5ccb6423e0
Author: Patrice Mandin
Date: Sun Feb 8 16:42:56 2009 +0100
nouveau: upload and swizzle each mipmap level in turn
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 66
1 files changed, 38 insertions(+), 28 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index b507e99..1892055 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -107,6 +107,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
const unsigned sub_h = h > max_h ? max_h : h;
unsigned cx = 0;
unsigned cy = 0;
+ int i, offset = 0;
/* POT or GTFO */
assert(!(w & (w - 1)) && !(h & (h - 1)));
@@ -125,34 +126,43 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE, 1);
OUT_RING (chan, swzsurf->handle);
- for (cy = 0; cy < h; cy += sub_h) {
- for (cx = 0; cx < w; cx += sub_w) {
- BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1);
- OUT_RELOCl(chan, dst_bo, dst->offset + nv04_swizzle_bits(cx, cy) *
-dst->block.size, NOUVEAU_BO_GART |
-NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
-
- BEGIN_RING(chan, sifm,
NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION, 9);
- OUT_RING (chan,
NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE);
- OUT_RING (chan, nv04_scaled_image_format(src->format));
- OUT_RING (chan, NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY);
- OUT_RING (chan, 0);
- OUT_RING (chan, sub_h << 16 | sub_w);
- OUT_RING (chan, 0);
- OUT_RING (chan, sub_h << 16 | sub_w);
- OUT_RING (chan, 1 << 20);
- OUT_RING (chan, 1 << 20);
-
- BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SIZE, 4);
- OUT_RING (chan, sub_h << 16 | sub_w);
- OUT_RING (chan, src->stride |
-NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER
|
-
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE);
- OUT_RELOCl(chan, src_bo, src->offset + cy * src->stride +
-cx * src->block.size, NOUVEAU_BO_GART |
-NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
- OUT_RING (chan, 0);
- }
+ /* Upload, then swizzle each mipmap level in turn */
+ for (i=0; itexture->last_level; i++) {
+
+ for (cy = 0; cy < h; cy += sub_h) {
+ for (cx = 0; cx < w; cx += sub_w) {
+ BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1);
+ OUT_RELOCl(chan, dst_bo, dst->offset +
nv04_swizzle_bits(cx, cy) *
+dst->block.size + offset, NOUVEAU_BO_GART |
+NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
+
+ BEGIN_RING(chan, sifm,
NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION, 9);
+ OUT_RING (chan,
NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE);
+ OUT_RING (chan, nv04_scaled_image_format(src->format));
+ OUT_RING (chan,
NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY);
+ OUT_RING (chan, 0);
+ OUT_RING (chan, sub_h << 16 | sub_w);
+ OUT_RING (chan, 0);
+ OUT_RING (chan, sub_h << 16 | sub_w);
+ OUT_RING (chan, 1 << 20);
+ OUT_RING (chan, 1 << 20);
+
+ BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SIZE,
4);
+ OUT_RING (chan, sub_h << 16 | sub_w);
+ OUT_RING (chan, src->stride |
+
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER |
+
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE);
+ OUT_RELOCl(chan, src_bo, src->offset + cy * src->stride +
+cx * src->block.size + offset,
NOUVEAU_BO_GART |
+NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
+ OUT_RING (chan, 0);
+ }
+ }
+
+ w >>= 1;
+ h >>= 1;
+ /* FIXME: need to know how many bytes per pixel */
+ offset += align(w * h * 2, 64);
}
return 0;
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Mesa (gallium-0.2): nouveau: recalc sub width and height for each mipmap level
Module: Mesa
Branch: gallium-0.2
Commit: 2f0811054fd53db776531428eef1f6960f180f38
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f0811054fd53db776531428eef1f6960f180f38
Author: Patrice Mandin
Date: Tue Feb 10 18:09:10 2009 +0100
nouveau: recalc sub width and height for each mipmap level
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 39 ---
1 files changed, 23 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index 1b5d980..a8aa12c 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -104,11 +104,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
struct nouveau_bo *dst_bo = ctx->nvws->get_bo(ctx->buf(dst));
const unsigned max_w = 1024;
const unsigned max_h = 1024;
- const unsigned sub_w = w > max_w ? max_w : w;
- const unsigned sub_h = h > max_h ? max_h : h;
- unsigned cx = 0;
- unsigned cy = 0;
- int i, offset = 0;
+ int i, src_offset = src->offset, dst_offset = dst->offset, src_stride =
src->stride;
/* POT or GTFO */
assert(!(w & (w - 1)) && !(h & (h - 1)));
@@ -116,10 +112,6 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_DMA_IMAGE, 1);
OUT_RELOCo(chan, dst_bo,
NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
- BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_FORMAT, 1);
- OUT_RING (chan, nv04_surface_format(dst->format) |
-log2i(w) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT |
-log2i(h) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT);
BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE, 1);
OUT_RELOCo(chan, src_bo,
@@ -129,12 +121,23 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
/* Upload, then swizzle each mipmap level in turn */
for (i=0; itexture->last_level; i++) {
+ unsigned sub_w, sub_h;
+ unsigned cx, cy;
+
+ BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_FORMAT, 1);
+ OUT_RING (chan, nv04_surface_format(dst->format) |
+log2i(w) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT |
+log2i(h) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT);
+
+ sub_w = w > max_w ? max_w : w;
+ sub_h = h > max_h ? max_h : h;
for (cy = 0; cy < h; cy += sub_h) {
for (cx = 0; cx < w; cx += sub_w) {
+
BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1);
- OUT_RELOCl(chan, dst_bo, dst->offset +
nv04_swizzle_bits(cx, cy) *
-dst->block.size + offset, NOUVEAU_BO_GART |
+ OUT_RELOCl(chan, dst_bo, dst_offset + nv04_swizzle_bits(cx,
cy) *
+dst->block.size, NOUVEAU_BO_GART |
NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
BEGIN_RING(chan, sifm,
NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION, 9);
@@ -150,18 +153,22 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SIZE,
4);
OUT_RING (chan, sub_h << 16 | sub_w);
- OUT_RING (chan, src->stride |
+ OUT_RING (chan, src_stride |
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER |
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE);
- OUT_RELOCl(chan, src_bo, src->offset + cy * src->stride +
-cx * src->block.size + offset,
NOUVEAU_BO_GART |
+ OUT_RELOCl(chan, src_bo, src_offset + cy * src_stride +
+cx * src->block.size, NOUVEAU_BO_GART |
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
OUT_RING (chan, 0);
}
}
- /* FIXME: need to know how many bytes per pixel */
- offset += align(w * h * 2 /*src->block.size*/, 64);
+ /* FIXME: need to find next offset for both source and dest */
+ src_offset += w * h * dst->block.size;
+ /*src_offset = align(src_offset, 64);*/
+ dst_offset += w * h * dst->block.size;
+ /*dst_offset = align(dst_offset, 64);*/
+ src_stride >>= 1;
w >>= 1;
h >>= 1;
}
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Mesa (gallium-0.2): Missing: tgsi: Fix build -- rename Size to NrTokens.
Module: Mesa Branch: gallium-0.2 Commit: b20a1b28b7e581304701c5802e8627003e461e45 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b20a1b28b7e581304701c5802e8627003e461e45 Author: Patrice Mandin Date: Tue Feb 10 18:31:41 2009 +0100 Missing: tgsi: Fix build -- rename Size to NrTokens. --- src/mesa/state_tracker/st_mesa_to_tgsi.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c index 5b5707f..8b9b18f 100644 --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c @@ -188,7 +188,7 @@ make_immediate(const float *value, uint size) struct tgsi_full_immediate imm; imm = tgsi_default_full_immediate(); - imm.Immediate.Size += size; + imm.Immediate.NrTokens += size; imm.Immediate.DataType = TGSI_IMM_FLOAT32; imm.u.Pointer = value; return imm; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (gallium-0.2): nouveau: dst offset is correct
Module: Mesa Branch: gallium-0.2 Commit: 02401cbaf021833c77c501d697d912f295546f58 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=02401cbaf021833c77c501d697d912f295546f58 Author: Patrice Mandin Date: Tue Feb 10 18:44:08 2009 +0100 nouveau: dst offset is correct --- src/gallium/drivers/nv04/nv04_surface_2d.c |6 ++ 1 files changed, 2 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c b/src/gallium/drivers/nv04/nv04_surface_2d.c index a8aa12c..ad11b2f 100644 --- a/src/gallium/drivers/nv04/nv04_surface_2d.c +++ b/src/gallium/drivers/nv04/nv04_surface_2d.c @@ -163,11 +163,9 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx, } } - /* FIXME: need to find next offset for both source and dest */ - src_offset += w * h * dst->block.size; - /*src_offset = align(src_offset, 64);*/ + /* FIXME: need to find next offset for source */ + /*src_offset += w * h * src->block.size;*/ dst_offset += w * h * dst->block.size; - /*dst_offset = align(dst_offset, 64);*/ src_stride >>= 1; w >>= 1; h >>= 1; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (gallium-0.2): nouveau: revert most parts of recent mipmap+swizzle stuff. We only need to find right src and dst offset for given mipmap level.
Module: Mesa
Branch: gallium-0.2
Commit: 0cd28c4a1b5a48b28be256a808f310fe995e9c7e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0cd28c4a1b5a48b28be256a808f310fe995e9c7e
Author: Patrice Mandin
Date: Tue Feb 10 21:20:06 2009 +0100
nouveau: revert most parts of recent mipmap+swizzle stuff. We only need to find
right src and dst offset for given mipmap level.
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 93 +---
1 files changed, 43 insertions(+), 50 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index ad11b2f..538f823 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -104,7 +104,10 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
struct nouveau_bo *dst_bo = ctx->nvws->get_bo(ctx->buf(dst));
const unsigned max_w = 1024;
const unsigned max_h = 1024;
- int i, src_offset = src->offset, dst_offset = dst->offset, src_stride =
src->stride;
+ const unsigned sub_w = w > max_w ? max_w : w;
+ const unsigned sub_h = h > max_h ? max_h : h;
+ unsigned cx, cy;
+ int i, src_offset = src->offset, dst_offset = dst->offset;
/* POT or GTFO */
assert(!(w & (w - 1)) && !(h & (h - 1)));
@@ -113,62 +116,52 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
OUT_RELOCo(chan, dst_bo,
NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
+ BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_FORMAT, 1);
+ OUT_RING (chan, nv04_surface_format(dst->format) |
+log2i(w) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT |
+log2i(h) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT);
+
BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE, 1);
OUT_RELOCo(chan, src_bo,
NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE, 1);
OUT_RING (chan, swzsurf->handle);
- /* Upload, then swizzle each mipmap level in turn */
- for (i=0; itexture->last_level; i++) {
- unsigned sub_w, sub_h;
- unsigned cx, cy;
-
- BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_FORMAT, 1);
- OUT_RING (chan, nv04_surface_format(dst->format) |
-log2i(w) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT |
-log2i(h) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT);
-
- sub_w = w > max_w ? max_w : w;
- sub_h = h > max_h ? max_h : h;
-
- for (cy = 0; cy < h; cy += sub_h) {
- for (cx = 0; cx < w; cx += sub_w) {
-
- BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1);
- OUT_RELOCl(chan, dst_bo, dst_offset + nv04_swizzle_bits(cx,
cy) *
-dst->block.size, NOUVEAU_BO_GART |
-NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
-
- BEGIN_RING(chan, sifm,
NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION, 9);
- OUT_RING (chan,
NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE);
- OUT_RING (chan, nv04_scaled_image_format(src->format));
- OUT_RING (chan,
NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY);
- OUT_RING (chan, 0);
- OUT_RING (chan, sub_h << 16 | sub_w);
- OUT_RING (chan, 0);
- OUT_RING (chan, sub_h << 16 | sub_w);
- OUT_RING (chan, 1 << 20);
- OUT_RING (chan, 1 << 20);
-
- BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SIZE,
4);
- OUT_RING (chan, sub_h << 16 | sub_w);
- OUT_RING (chan, src_stride |
-
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER |
-
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE);
- OUT_RELOCl(chan, src_bo, src_offset + cy * src_stride +
-cx * src->block.size, NOUVEAU_BO_GART |
-NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
- OUT_RING (chan, 0);
- }
- }
-
- /* FIXME: need to find next offset for source */
- /*src_offset += w * h * src->block.size;*/
+ /* FIXME: Find right src and dst offset, given mipmap level */
+ for (i=0; ilevel; i++) {
+ src_offset += w * h * src->block.size;
dst_offset += w * h * dst->block.
Mesa (gallium-0.2): nouveau: do not forget to half dimension.
Module: Mesa
Branch: gallium-0.2
Commit: fa9fcf5e8fc1a1fbd25b0943050c51104acb0397
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa9fcf5e8fc1a1fbd25b0943050c51104acb0397
Author: Patrice Mandin
Date: Tue Feb 10 21:22:29 2009 +0100
nouveau: do not forget to half dimension.
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index 538f823..63f2125 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -106,7 +106,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
const unsigned max_h = 1024;
const unsigned sub_w = w > max_w ? max_w : w;
const unsigned sub_h = h > max_h ? max_h : h;
- unsigned cx, cy;
+ unsigned cx, cy, level_w, level_h;
int i, src_offset = src->offset, dst_offset = dst->offset;
/* POT or GTFO */
@@ -128,9 +128,13 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
OUT_RING (chan, swzsurf->handle);
/* FIXME: Find right src and dst offset, given mipmap level */
+ level_w = w;
+ level_h = h;
for (i=0; ilevel; i++) {
- src_offset += w * h * src->block.size;
- dst_offset += w * h * dst->block.size;
+ src_offset += level_w * level_h * src->block.size;
+ dst_offset += level_w * level_h * dst->block.size;
+ level_w >>= 1;
+ level_h >>= 1;
}
for (cy = 0; cy < h; cy += sub_h) {
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Mesa (gallium-0.2): nouveau: we already have the right src offset
Module: Mesa
Branch: gallium-0.2
Commit: 53069cbf290c7de7cc1bf813815e8ef7d5d886a4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=53069cbf290c7de7cc1bf813815e8ef7d5d886a4
Author: Patrice Mandin
Date: Tue Feb 10 21:57:40 2009 +0100
nouveau: we already have the right src offset
---
src/gallium/drivers/nv04/nv04_surface_2d.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index 63f2125..d220c21 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -107,7 +107,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
const unsigned sub_w = w > max_w ? max_w : w;
const unsigned sub_h = h > max_h ? max_h : h;
unsigned cx, cy, level_w, level_h;
- int i, src_offset = src->offset, dst_offset = dst->offset;
+ int i, dst_offset = dst->offset;
/* POT or GTFO */
assert(!(w & (w - 1)) && !(h & (h - 1)));
@@ -131,7 +131,6 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
level_w = w;
level_h = h;
for (i=0; ilevel; i++) {
- src_offset += level_w * level_h * src->block.size;
dst_offset += level_w * level_h * dst->block.size;
level_w >>= 1;
level_h >>= 1;
@@ -161,7 +160,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
OUT_RING (chan, src->stride |
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER
|
NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE);
- OUT_RELOCl(chan, src_bo, src_offset + cy * src->stride +
+ OUT_RELOCl(chan, src_bo, src->offset + cy * src->stride +
cx * src->block.size, NOUVEAU_BO_GART |
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
OUT_RING (chan, 0);
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Mesa (gallium-0.2): nouveau: stop with 0 dimension
Module: Mesa
Branch: gallium-0.2
Commit: 7b66b24c2ea127aa8f58f38a0cf4e834b58c2aa7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7b66b24c2ea127aa8f58f38a0cf4e834b58c2aa7
Author: Patrice Mandin
Date: Tue Feb 10 22:04:56 2009 +0100
nouveau: stop with 0 dimension
---
src/gallium/drivers/nv04/nv04_surface_2d.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index d220c21..ffb17ea 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -130,7 +130,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
/* FIXME: Find right src and dst offset, given mipmap level */
level_w = w;
level_h = h;
- for (i=0; ilevel; i++) {
+ for (i=0; ilevel && level_w && level_h; i++) {
dst_offset += level_w * level_h * dst->block.size;
level_w >>= 1;
level_h >>= 1;
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Mesa (gallium-0.2): nouveau: revert all my changes here, not the right way
Module: Mesa
Branch: gallium-0.2
Commit: 24c379badba888bd58cd759865e454e02235c65a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=24c379badba888bd58cd759865e454e02235c65a
Author: Patrice Mandin
Date: Tue Feb 10 22:22:06 2009 +0100
nouveau: revert all my changes here, not the right way
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 31 ---
1 files changed, 9 insertions(+), 22 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index ffb17ea..8530849 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -1,7 +1,6 @@
#include "pipe/p_context.h"
#include "pipe/p_format.h"
#include "util/u_memory.h"
-#include "util/u_math.h"
#include "nouveau/nouveau_winsys.h"
#include "nouveau/nouveau_util.h"
@@ -106,8 +105,8 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
const unsigned max_h = 1024;
const unsigned sub_w = w > max_w ? max_w : w;
const unsigned sub_h = h > max_h ? max_h : h;
- unsigned cx, cy, level_w, level_h;
- int i, dst_offset = dst->offset;
+ unsigned cx = 0;
+ unsigned cy = 0;
/* POT or GTFO */
assert(!(w & (w - 1)) && !(h & (h - 1)));
@@ -118,29 +117,19 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_FORMAT, 1);
OUT_RING (chan, nv04_surface_format(dst->format) |
-log2i(w) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT |
-log2i(h) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT);
-
+log2i(w) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT |
+log2i(h) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT);
+
BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE, 1);
OUT_RELOCo(chan, src_bo,
NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE, 1);
OUT_RING (chan, swzsurf->handle);
- /* FIXME: Find right src and dst offset, given mipmap level */
- level_w = w;
- level_h = h;
- for (i=0; ilevel && level_w && level_h; i++) {
- dst_offset += level_w * level_h * dst->block.size;
- level_w >>= 1;
- level_h >>= 1;
- }
-
for (cy = 0; cy < h; cy += sub_h) {
for (cx = 0; cx < w; cx += sub_w) {
-
BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1);
- OUT_RELOCl(chan, dst_bo, dst_offset + nv04_swizzle_bits(cx, cy) *
+ OUT_RELOCl(chan, dst_bo, dst->offset + nv04_swizzle_bits(cx, cy) *
dst->block.size, NOUVEAU_BO_GART |
NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
@@ -259,8 +248,7 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct
pipe_surface *dst,
assert(src->format == dst->format);
/* Setup transfer to swizzle the texture to vram if needed */
- /* FIXME/TODO: check proper limits of this operation */
- if (src_linear ^ dst_linear) {
+ if (src_linear && !dst_linear && w > 1 && h > 1) {
nv04_surface_copy_swizzle(ctx, dst, dx, dy, src, sx, sy, w, h);
return;
}
@@ -268,7 +256,8 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct
pipe_surface *dst,
/* NV_CONTEXT_SURFACES_2D has buffer alignment restrictions, fallback
* to NV_MEMORY_TO_MEMORY_FORMAT in this case.
*/
- if ((src->offset & 63) || (dst->offset & 63)) {
+ if ((src->offset & 63) || (dst->offset & 63) ||
+ (src->stride & 63) || (dst->stride & 63)) {
nv04_surface_copy_m2mf(ctx, dst, dx, dy, src, sx, sy, w, h);
return;
}
@@ -457,5 +446,3 @@ nv04_surface_2d_init(struct nouveau_winsys *nvws)
ctx->fill = nv04_surface_fill;
return ctx;
}
-
-
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Mesa (gallium-0.2): nouveau: nv30: fix miptree organization to have swizzled texture+mipmap at the right places
Module: Mesa
Branch: gallium-0.2
Commit: c2be521d24eddb907ff556c0a8ec854a157ef9bc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2be521d24eddb907ff556c0a8ec854a157ef9bc
Author: Patrice Mandin
Date: Tue Feb 10 22:22:55 2009 +0100
nouveau: nv30: fix miptree organization to have swizzled texture+mipmap at the
right places
---
src/gallium/drivers/nv30/nv30_miptree.c | 41 +--
src/gallium/drivers/nv30/nv30_screen.c |2 +
2 files changed, 30 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_miptree.c
b/src/gallium/drivers/nv30/nv30_miptree.c
index 23f8829..fe13f50 100644
--- a/src/gallium/drivers/nv30/nv30_miptree.c
+++ b/src/gallium/drivers/nv30/nv30_miptree.c
@@ -8,10 +8,14 @@ static void
nv30_miptree_layout(struct nv30_miptree *nv30mt)
{
struct pipe_texture *pt = &nv30mt->base;
- boolean swizzled = FALSE;
uint width = pt->width[0], height = pt->height[0], depth = pt->depth[0];
uint offset = 0;
- int nr_faces, l, f, pitch;
+ int nr_faces, l, f;
+ uint wide_pitch = pt->tex_usage & (PIPE_TEXTURE_USAGE_SAMPLER |
+ PIPE_TEXTURE_USAGE_DEPTH_STENCIL |
+ PIPE_TEXTURE_USAGE_RENDER_TARGET |
+ PIPE_TEXTURE_USAGE_DISPLAY_TARGET |
+ PIPE_TEXTURE_USAGE_PRIMARY);
if (pt->target == PIPE_TEXTURE_CUBE) {
nr_faces = 6;
@@ -22,7 +26,6 @@ nv30_miptree_layout(struct nv30_miptree *nv30mt)
nr_faces = 1;
}
- pitch = pt->width[0];
for (l = 0; l <= pt->last_level; l++) {
pt->width[l] = width;
pt->height[l] = height;
@@ -30,11 +33,11 @@ nv30_miptree_layout(struct nv30_miptree *nv30mt)
pt->nblocksx[l] = pf_get_nblocksx(&pt->block, width);
pt->nblocksy[l] = pf_get_nblocksy(&pt->block, height);
- if (swizzled)
- pitch = pt->nblocksx[l];
- pitch = align(pitch, 64);
+ if (wide_pitch && (pt->tex_usage &
NOUVEAU_TEXTURE_USAGE_LINEAR))
+ nv30mt->level[l].pitch = align(pt->width[0] *
pt->block.size, 64);
+ else
+ nv30mt->level[l].pitch = pt->width[l] * pt->block.size;
- nv30mt->level[l].pitch = pitch * pt->block.size;
nv30mt->level[l].image_offset =
CALLOC(nr_faces, sizeof(unsigned));
@@ -44,10 +47,17 @@ nv30_miptree_layout(struct nv30_miptree *nv30mt)
}
for (f = 0; f < nr_faces; f++) {
- for (l = 0; l <= pt->last_level; l++) {
+ for (l = 0; l < pt->last_level; l++) {
nv30mt->level[l].image_offset[f] = offset;
- offset += nv30mt->level[l].pitch * pt->height[l];
+
+ if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR))
+ offset += align(nv30mt->level[l].pitch *
pt->height[l], 64);
+ else
+ offset += nv30mt->level[l].pitch *
pt->height[l];
}
+
+ nv30mt->level[l].image_offset[f] = offset;
+ offset += nv30mt->level[l].pitch * pt->height[l];
}
nv30mt->total_size = offset;
@@ -74,7 +84,8 @@ nv30_miptree_create(struct pipe_screen *pscreen, const struct
pipe_texture *pt)
mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
else
if (pt->tex_usage & (PIPE_TEXTURE_USAGE_PRIMARY |
-PIPE_TEXTURE_USAGE_DISPLAY_TARGET))
++ PIPE_TEXTURE_USAGE_DISPLAY_TARGET |
++ PIPE_TEXTURE_USAGE_DEPTH_STENCIL))
mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
else
if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC)
@@ -85,7 +96,11 @@ nv30_miptree_create(struct pipe_screen *pscreen, const
struct pipe_texture *pt)
case PIPE_FORMAT_A8R8G8B8_UNORM:
case PIPE_FORMAT_X8R8G8B8_UNORM:
case PIPE_FORMAT_R16_SNORM:
- break;
+ {
+ if (debug_get_bool_option("NOUVEAU_NO_SWIZZLE", FALSE))
+ mt->base.tex_usage |=
NOUVEAU_TEXTURE_USAGE_LINEAR;
+ break;
+ }
default:
mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
}
@@ -148,8 +163,8 @@ nv30_miptree_release(struct pipe_screen *pscreen, struct
pipe_texture **ppt)
}
if (mt->shadow_tex) {
- asse
Mesa (master): nouveau: oops :-)
Module: Mesa Branch: master Commit: 0f4a91b50908ce4c1ae5fc65d73791608de30f06 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f4a91b50908ce4c1ae5fc65d73791608de30f06 Author: Patrice Mandin Date: Mon Feb 16 18:43:56 2009 +0100 nouveau: oops :-) --- src/gallium/drivers/nv30/nv30_miptree.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nv30/nv30_miptree.c b/src/gallium/drivers/nv30/nv30_miptree.c index 510c94d..b11ed8c 100644 --- a/src/gallium/drivers/nv30/nv30_miptree.c +++ b/src/gallium/drivers/nv30/nv30_miptree.c @@ -85,8 +85,8 @@ nv30_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; else if (pt->tex_usage & (PIPE_TEXTURE_USAGE_PRIMARY | -+ PIPE_TEXTURE_USAGE_DISPLAY_TARGET | -+ PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) +PIPE_TEXTURE_USAGE_DISPLAY_TARGET | +PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; else if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nouveau: Use proper SIFM object on NV30
Module: Mesa
Branch: master
Commit: 69e42ec4568e824bf16271830751436afb2e8ef9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=69e42ec4568e824bf16271830751436afb2e8ef9
Author: Patrice Mandin
Date: Wed Mar 4 20:34:54 2009 +0100
nouveau: Use proper SIFM object on NV30
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 16 ++--
1 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index e8fd316..3c8257a 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -437,13 +437,17 @@ nv04_surface_2d_init(struct nouveau_winsys *nvws)
return NULL;
}
- if (chan->device->chipset < 0x10) {
- class = NV04_SCALED_IMAGE_FROM_MEMORY;
- } else
- if (chan->device->chipset < 0x40) {
- class = NV10_SCALED_IMAGE_FROM_MEMORY;
- } else {
+ switch (chan->device->chipset & 0xf0) {
+ case 0x30:
+ class = NV30_SCALED_IMAGE_FROM_MEMORY;
+ break;
+ case 0x40:
+ case 0x60:
class = NV40_SCALED_IMAGE_FROM_MEMORY;
+ break;
+ default:
+ class = NV04_SCALED_IMAGE_FROM_MEMORY;
+ break;
}
ret = nouveau_grobj_alloc(chan, handle++, class, &ctx->sifm);
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Mesa (master): nouveau: oops, forgot to keep the NV10_SIFM object
Module: Mesa
Branch: master
Commit: 41117b1a018baa7ce2c2e4f0eba7a56d33626e97
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=41117b1a018baa7ce2c2e4f0eba7a56d33626e97
Author: Patrice Mandin
Date: Wed Mar 4 20:38:14 2009 +0100
nouveau: oops, forgot to keep the NV10_SIFM object
---
src/gallium/drivers/nv04/nv04_surface_2d.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index 3c8257a..f3a8d7e 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -438,6 +438,10 @@ nv04_surface_2d_init(struct nouveau_winsys *nvws)
}
switch (chan->device->chipset & 0xf0) {
+ case 0x10:
+ case 0x20:
+ class = NV10_SCALED_IMAGE_FROM_MEMORY;
+ break;
case 0x30:
class = NV30_SCALED_IMAGE_FROM_MEMORY;
break;
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Mesa (master): gallium: Define PIPE_CAP_BLEND_EQUATION_SEPARATE, remove extension from default extension list
Module: Mesa Branch: master Commit: 54cf63278ff28eb03503f649c46bf24437a1cbf8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=54cf63278ff28eb03503f649c46bf24437a1cbf8 Author: Patrice Mandin Date: Tue Jul 14 09:44:49 2009 +0200 gallium: Define PIPE_CAP_BLEND_EQUATION_SEPARATE, remove extension from default extension list --- src/gallium/drivers/nv04/nv04_screen.c |2 ++ src/gallium/drivers/nv10/nv10_screen.c |2 ++ src/gallium/drivers/nv20/nv20_screen.c |2 ++ src/gallium/drivers/nv30/nv30_screen.c |2 ++ src/gallium/drivers/nv40/nv40_screen.c |2 ++ src/gallium/drivers/nv50/nv50_screen.c |2 ++ src/gallium/drivers/softpipe/sp_screen.c|2 ++ src/gallium/include/pipe/p_defines.h|1 + src/gallium/state_trackers/dri/dri_extensions.c |2 -- src/mesa/state_tracker/st_extensions.c |5 - 10 files changed, 19 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nv04/nv04_screen.c b/src/gallium/drivers/nv04/nv04_screen.c index 190ef62..ff2febb 100644 --- a/src/gallium/drivers/nv04/nv04_screen.c +++ b/src/gallium/drivers/nv04/nv04_screen.c @@ -42,6 +42,8 @@ nv04_screen_get_param(struct pipe_screen *screen, int param) return 1; case PIPE_CAP_TGSI_CONT_SUPPORTED: return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return 0; case NOUVEAU_CAP_HW_VTXBUF: case NOUVEAU_CAP_HW_IDXBUF: return 0; diff --git a/src/gallium/drivers/nv10/nv10_screen.c b/src/gallium/drivers/nv10/nv10_screen.c index c64f78b..4469b22 100644 --- a/src/gallium/drivers/nv10/nv10_screen.c +++ b/src/gallium/drivers/nv10/nv10_screen.c @@ -37,6 +37,8 @@ nv10_screen_get_param(struct pipe_screen *screen, int param) return 0; case PIPE_CAP_TGSI_CONT_SUPPORTED: return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return 0; case NOUVEAU_CAP_HW_VTXBUF: case NOUVEAU_CAP_HW_IDXBUF: return 0; diff --git a/src/gallium/drivers/nv20/nv20_screen.c b/src/gallium/drivers/nv20/nv20_screen.c index 52859a9..e6924ad 100644 --- a/src/gallium/drivers/nv20/nv20_screen.c +++ b/src/gallium/drivers/nv20/nv20_screen.c @@ -37,6 +37,8 @@ nv20_screen_get_param(struct pipe_screen *screen, int param) return 0; case PIPE_CAP_TGSI_CONT_SUPPORTED: return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return 0; case NOUVEAU_CAP_HW_VTXBUF: case NOUVEAU_CAP_HW_IDXBUF: return 0; diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c index 328a5c9..c8b4078 100644 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ b/src/gallium/drivers/nv30/nv30_screen.c @@ -48,6 +48,8 @@ nv30_screen_get_param(struct pipe_screen *pscreen, int param) return 0; case PIPE_CAP_TGSI_CONT_SUPPORTED: return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return 0; case NOUVEAU_CAP_HW_VTXBUF: case NOUVEAU_CAP_HW_IDXBUF: return 1; diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c index 8f070e2..5d2a421 100644 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ b/src/gallium/drivers/nv40/nv40_screen.c @@ -46,6 +46,8 @@ nv40_screen_get_param(struct pipe_screen *pscreen, int param) return 0; /* We have 4 - but unsupported currently */ case PIPE_CAP_TGSI_CONT_SUPPORTED: return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return 1; case NOUVEAU_CAP_HW_VTXBUF: return 1; case NOUVEAU_CAP_HW_IDXBUF: diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index bdd449d..ce8f906 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -111,6 +111,8 @@ nv50_screen_get_param(struct pipe_screen *pscreen, int param) return 0; case PIPE_CAP_TGSI_CONT_SUPPORTED: return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return 1; case NOUVEAU_CAP_HW_VTXBUF: return 1; case NOUVEAU_CAP_HW_IDXBUF: diff --git a/src/gallium/drivers/softpipe/sp_screen.c b/src/gallium/drivers/softpipe/sp_screen.c index be76f1d..6178c4a 100644 --- a/src/gallium/drivers/softpipe/sp_screen.c +++ b/src/gallium/drivers/softpipe/sp_screen.c @@ -89,6 +89,8 @@ softpipe_get_param(struct pipe_screen *screen, int param) return 13; /* max 4Kx4K */ case PIPE_CAP_TGSI_CONT_SUPPORTED: return 1; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return 1; default: return 0; } diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index b7857c5..bc4bc70 100644
Mesa (master): nouveau: Take into account sx, sy parameters to read from source surface
Module: Mesa Branch: master Commit: db40bb028726b10e86cd9d683dc9db18181b638d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db40bb028726b10e86cd9d683dc9db18181b638d Author: Patrice Mandin Date: Wed Jul 22 21:10:20 2009 +0200 nouveau: Take into account sx,sy parameters to read from source surface --- src/gallium/drivers/nv04/nv04_surface_2d.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c b/src/gallium/drivers/nv04/nv04_surface_2d.c index f315cf5..d794c07 100644 --- a/src/gallium/drivers/nv04/nv04_surface_2d.c +++ b/src/gallium/drivers/nv04/nv04_surface_2d.c @@ -153,8 +153,8 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx, OUT_RING (chan, src_pitch | NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER | NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE); - OUT_RELOCl(chan, src_bo, src->offset + cy * src_pitch + -cx * src->texture->block.size, NOUVEAU_BO_GART | + OUT_RELOCl(chan, src_bo, src->offset + (cy+sy) * src_pitch + +(cx+sx) * src->texture->block.size, NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); OUT_RING (chan, 0); } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nouveau: nv30: wrong variable for format
Module: Mesa
Branch: master
Commit: b7042399fd0a1cf66f99340486c03374d15af36c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7042399fd0a1cf66f99340486c03374d15af36c
Author: Patrice Mandin
Date: Wed Jul 22 22:25:36 2009 +0200
nouveau: nv30: wrong variable for format
---
src/gallium/drivers/nv30/nv30_screen.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_screen.c
b/src/gallium/drivers/nv30/nv30_screen.c
index c8b4078..f8285e4 100644
--- a/src/gallium/drivers/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nv30/nv30_screen.c
@@ -95,7 +95,7 @@ nv30_screen_surface_format_supported(struct pipe_screen
*pscreen,
}
} else
if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
- switch (tex_usage) {
+ switch (format) {
case PIPE_FORMAT_Z24S8_UNORM:
case PIPE_FORMAT_Z24X8_UNORM:
case PIPE_FORMAT_Z16_UNORM:
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Mesa (master): nouveau: use nv04_surface_copy_swizzle only for POT sizes
Module: Mesa
Branch: master
Commit: 8c30292a6e48448318d84582df876f35c490f968
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c30292a6e48448318d84582df876f35c490f968
Author: Patrice Mandin
Date: Fri Jul 24 23:37:46 2009 +0200
nouveau: use nv04_surface_copy_swizzle only for POT sizes
---
src/gallium/drivers/nv04/nv04_surface_2d.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index d794c07..c0adf7c 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -110,10 +110,12 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
unsigned cx;
unsigned cy;
+#if 0
/* POT or GTFO */
assert(!(w & (w - 1)) && !(h & (h - 1)));
/* That's the way she likes it */
assert(src_pitch == ((struct nv04_surface *)dst)->pitch);
+#endif
BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_DMA_IMAGE, 1);
OUT_RELOCo(chan, dst_bo,
@@ -258,7 +260,8 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct
pipe_surface *dst,
assert(src->format == dst->format);
/* Setup transfer to swizzle the texture to vram if needed */
- if (src_linear && !dst_linear && w > 1 && h > 1) {
+ if (src_linear && !dst_linear && w > 1 && h > 1 &&
+ !(w & (w - 1)) && !(h & (h - 1))) { /* POT only */
nv04_surface_copy_swizzle(ctx, dst, dx, dy, src, sx, sy, w, h);
return;
}
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Mesa (master): nouveau: Recursively swizzle an NPOT sized copy
Module: Mesa
Branch: master
Commit: 77a8a650e61047582794512ef61c8e6525aea059
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=77a8a650e61047582794512ef61c8e6525aea059
Author: Patrice Mandin
Date: Sun Jul 26 12:30:12 2009 +0200
nouveau: Recursively swizzle an NPOT sized copy
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 26 +-
1 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index c0adf7c..143b858 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -111,8 +111,6 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
unsigned cy;
#if 0
- /* POT or GTFO */
- assert(!(w & (w - 1)) && !(h & (h - 1)));
/* That's the way she likes it */
assert(src_pitch == ((struct nv04_surface *)dst)->pitch);
#endif
@@ -260,9 +258,27 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct
pipe_surface *dst,
assert(src->format == dst->format);
/* Setup transfer to swizzle the texture to vram if needed */
- if (src_linear && !dst_linear && w > 1 && h > 1 &&
- !(w & (w - 1)) && !(h & (h - 1))) { /* POT only */
- nv04_surface_copy_swizzle(ctx, dst, dx, dy, src, sx, sy, w, h);
+ if (src_linear && !dst_linear && w > 1 && h > 1) {
+ int potWidth = 1<0) {
+ nv04_surface_copy(ctx, dst, dx+potWidth, dy,
+ src, sx+potWidth, sy,
+ remainWidth, potHeight);
+ }
+
+ if (remainHeight>0) {
+ nv04_surface_copy(ctx, dst, dx, dy+potHeight,
+ src, sx, sy+potHeight,
+ w, remainHeight);
+ }
+
return;
}
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Mesa (master): nouveau: Take into account destination position for copy_swizzle, need to split copy a bit more
Module: Mesa
Branch: master
Commit: 2b8a8f75f33931622a46287a2bf633879f23285e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b8a8f75f33931622a46287a2bf633879f23285e
Author: Patrice Mandin
Date: Sun Jul 26 16:18:06 2009 +0200
nouveau: Take into account destination position for copy_swizzle, need to split
copy a bit more
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 14 --
1 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index 143b858..ff4e511 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -133,7 +133,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
for (cy = 0; cy < h; cy += sub_h) {
for (cx = 0; cx < w; cx += sub_w) {
BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1);
- OUT_RELOCl(chan, dst_bo, dst->offset + nv04_swizzle_bits(cx, cy) *
+ OUT_RELOCl(chan, dst_bo, dst->offset + nv04_swizzle_bits(cx+dx,
cy+dy) *
dst->texture->block.size, NOUVEAU_BO_GART |
NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
@@ -264,19 +264,29 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct
pipe_surface *dst,
int remainWidth = w-potWidth;
int remainHeight = h-potHeight;
+ /* top left is always POT */
nv04_surface_copy_swizzle(ctx, dst, dx, dy, src, sx, sy,
potWidth, potHeight);
+ /* top right */
if (remainWidth>0) {
nv04_surface_copy(ctx, dst, dx+potWidth, dy,
src, sx+potWidth, sy,
remainWidth, potHeight);
}
+ /* bottom left */
if (remainHeight>0) {
nv04_surface_copy(ctx, dst, dx, dy+potHeight,
src, sx, sy+potHeight,
- w, remainHeight);
+ potWidth, remainHeight);
+ }
+
+ /* bottom right */
+ if ((remainWidth>0) && (remainHeight>0)) {
+ nv04_surface_copy(ctx, dst, dx+potWidth, dy+potHeight,
+ src, sx+potWidth, sy+potHeight,
+ remainWidth, remainHeight);
}
return;
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Mesa (master): nouveau: only swizzle square textures for copy
Module: Mesa
Branch: master
Commit: 8df35b7b57ff12721556fa7d00b4e337134da374
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8df35b7b57ff12721556fa7d00b4e337134da374
Author: Patrice Mandin
Date: Sun Jul 26 22:30:35 2009 +0200
nouveau: only swizzle square textures for copy
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 15 +++
1 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index ff4e511..aba40cf 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -263,10 +263,17 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct
pipe_surface *dst,
int potHeight = 1<potHeight ? potHeight : potWidth);
+ int x,y;
+
+ /* top left is always POT, but we can only swizzle squares */
+ for (y=0; y0) {
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Mesa (master): nouveau: swizzle a single row or column, doing it one pixel at a time
Module: Mesa
Branch: master
Commit: 1ee3bcfff08599961c69549a1ad699c02df49bec
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ee3bcfff08599961c69549a1ad699c02df49bec
Author: Patrice Mandin
Date: Mon Jul 27 10:57:53 2009 +0200
nouveau: swizzle a single row or column, doing it one pixel at a time
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 108 ---
1 files changed, 80 insertions(+), 28 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index aba40cf..bbbcb54 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -210,6 +210,43 @@ nv04_surface_copy_m2mf(struct nv04_surface_2d *ctx,
}
static int
+nv04_surface_copy_m2mf_swizzle(struct nv04_surface_2d *ctx,
+ struct pipe_surface *dst, int dx, int dy,
+ struct pipe_surface *src, int sx, int sy)
+{
+ struct nouveau_channel *chan = ctx->m2mf->channel;
+ struct nouveau_grobj *m2mf = ctx->m2mf;
+ struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src));
+ struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst));
+ unsigned src_pitch = ((struct nv04_surface *)src)->pitch;
+ unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch;
+ unsigned dst_offset = dst->offset + nv04_swizzle_bits(dx, dy) *
+ dst->texture->block.size;
+ unsigned src_offset = src->offset + sy * src_pitch +
+ sx * src->texture->block.size;
+
+ BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2);
+ OUT_RELOCo(chan, src_bo,
+ NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
+ OUT_RELOCo(chan, dst_bo,
+ NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
+
+ BEGIN_RING(chan, m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
+ OUT_RELOCl(chan, src_bo, src_offset,
+ NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD);
+ OUT_RELOCl(chan, dst_bo, dst_offset,
+ NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_WR);
+ OUT_RING (chan, src_pitch);
+ OUT_RING (chan, dst_pitch);
+ OUT_RING (chan, 1 * src->texture->block.size);
+ OUT_RING (chan, 1);
+ OUT_RING (chan, 0x0101);
+ OUT_RING (chan, 0);
+
+ return 0;
+}
+
+static int
nv04_surface_copy_blit(struct nv04_surface_2d *ctx, struct pipe_surface *dst,
int dx, int dy, struct pipe_surface *src, int sx, int sy,
int w, int h)
@@ -258,42 +295,57 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct
pipe_surface *dst,
assert(src->format == dst->format);
/* Setup transfer to swizzle the texture to vram if needed */
- if (src_linear && !dst_linear && w > 1 && h > 1) {
- int potWidth = 1<potHeight ? potHeight : potWidth);
+ if (src_linear && !dst_linear) {
int x,y;
- /* top left is always POT, but we can only swizzle squares */
- for (y=0; y1) && (h>1)) {
+ int potWidth = 1<potHeight ? potHeight :
potWidth);
+
+ /* top left is always POT, but we can only swizzle
squares */
+ for (y=0; y0) {
+ /* top right */
+ if (remainWidth>0) {
nv04_surface_copy(ctx, dst, dx+potWidth, dy,
- src, sx+potWidth, sy,
- remainWidth, potHeight);
- }
+ src, sx+potWidth, sy,
+ remainWidth, potHeight);
+ }
- /* bottom left */
- if (remainHeight>0) {
- nv04_surface_copy(ctx, dst, dx, dy+potHeight,
+ /* bottom left */
+ if (remainHeight>0) {
+ nv04_surface_copy(ctx, dst, dx, dy+potHeight,
src, sx, sy+potHeight,
- potWidth, remainHeight);
- }
+ potWidth, remainHeight);
+ }
- /* bottom right */
- if ((remainWidth>0) && (remainHeight>0)) {
- nv04_surface_copy(ctx, dst, dx+potWidth, dy+potHeight,
- src, sx+potWidth, sy+potHeight,
- remainWidth, remainHeight);
+ /* bottom right */
+ if ((remainWidth>0) && (remainHeight>0)) {
+
Mesa (master): mesa st: Move logbase2 function to util/u_math.h
Module: Mesa
Branch: master
Commit: c1785c19ca0716a7e85777242949a0c33e28988f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1785c19ca0716a7e85777242949a0c33e28988f
Author: Patrice Mandin
Date: Sat Aug 1 11:03:30 2009 +0200
mesa st: Move logbase2 function to util/u_math.h
---
src/gallium/auxiliary/util/u_math.h| 23 ++-
src/mesa/state_tracker/st_cb_texture.c | 17 -
2 files changed, 22 insertions(+), 18 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_math.h
b/src/gallium/auxiliary/util/u_math.h
index e5003af..30e6e2f 100644
--- a/src/gallium/auxiliary/util/u_math.h
+++ b/src/gallium/auxiliary/util/u_math.h
@@ -216,23 +216,23 @@ util_fast_exp2(float x)
int32_t ipart;
float fpart, mpart;
union fi epart;
-
+
if(x > 129.0f)
return 3.402823466e+38f;
-
+
if(x < -126.9f)
return 0.0f;
ipart = (int32_t) x;
fpart = x - (float) ipart;
-
+
/* same as
* epart.f = (float) (1 << ipart)
* but faster and without integer overflow for ipart > 31 */
epart.i = (ipart + 127 ) << 23;
-
+
mpart = pow2_table[POW2_TABLE_OFFSET + (int)(fpart * POW2_TABLE_SCALE)];
-
+
return epart.f * mpart;
}
@@ -409,6 +409,19 @@ float_to_ubyte(float f)
}
+/**
+ * Calc log base 2
+ */
+static INLINE unsigned
+util_logbase2(unsigned n)
+{
+ unsigned log2 = 0;
+ while (n >>= 1)
+ ++log2;
+ return log2;
+}
+
+
#define CLAMP( X, MIN, MAX ) ( (X)<(MIN) ? (MIN) : ((X)>(MAX) ? (MAX) : (X)) )
diff --git a/src/mesa/state_tracker/st_cb_texture.c
b/src/mesa/state_tracker/st_cb_texture.c
index ee71c01..e8d7f70 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -59,6 +59,7 @@
#include "util/u_tile.h"
#include "util/u_blit.h"
#include "util/u_surface.h"
+#include "util/u_math.h"
#define DBG if (0) printf
@@ -237,16 +238,6 @@ do_memcpy(void *dest, const void *src, size_t n)
}
-static INLINE unsigned
-logbase2(unsigned n)
-{
- unsigned log2 = 0;
- while (n >>= 1)
- ++log2;
- return log2;
-}
-
-
/**
* Return default texture usage bitmask for the given texture format.
*/
@@ -340,9 +331,9 @@ guess_and_alloc_texture(struct st_context *st,
lastLevel = firstLevel;
}
else {
- GLuint l2width = logbase2(width);
- GLuint l2height = logbase2(height);
- GLuint l2depth = logbase2(depth);
+ GLuint l2width = util_logbase2(width);
+ GLuint l2height = util_logbase2(height);
+ GLuint l2depth = util_logbase2(depth);
lastLevel = firstLevel + MAX2(MAX2(l2width, l2height), l2depth);
}
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Mesa (master): mesa st: Use POT texture for draw pixels operations if NPOT texture is not supported
Module: Mesa
Branch: master
Commit: fc3d564daeacdbd76b97de2ffc10e15931a18c7a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc3d564daeacdbd76b97de2ffc10e15931a18c7a
Author: Patrice Mandin
Date: Sat Aug 1 11:15:18 2009 +0200
mesa st: Use POT texture for draw pixels operations if NPOT texture is not
supported
---
src/mesa/state_tracker/st_cb_drawpixels.c | 68
1 files changed, 58 insertions(+), 10 deletions(-)
diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c
b/src/mesa/state_tracker/st_cb_drawpixels.c
index 8b5094a..b394031 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/state_tracker/st_cb_drawpixels.c
@@ -60,6 +60,7 @@
#include "pipe/p_inlines.h"
#include "util/u_tile.h"
#include "util/u_draw_quad.h"
+#include "util/u_math.h"
#include "shader/prog_instruction.h"
#include "cso_cache/cso_context.h"
@@ -341,6 +342,7 @@ make_texture(struct st_context *st,
enum pipe_format pipeFormat;
GLuint cpp;
GLenum baseFormat;
+ int ptw, pth;
baseFormat = _mesa_base_format(format);
@@ -355,7 +357,28 @@ make_texture(struct st_context *st,
if (!pixels)
return NULL;
- pt = st_texture_create(st, PIPE_TEXTURE_2D, pipeFormat, 0, width, height, 1,
+ /* Need to use POT texture? */
+ ptw = width;
+ pth = height;
+ if (!screen->get_param(screen, PIPE_CAP_NPOT_TEXTURES)) {
+ int l2pt, maxSize;
+
+ l2pt = util_logbase2(width);
+ if (1<screen->get_param(pipe->screen,
PIPE_CAP_MAX_TEXTURE_2D_LEVELS) - 1);
+ assert(ptw <= maxSize);
+ assert(pth <= maxSize);
+ }
+
+ pt = st_texture_create(st, PIPE_TEXTURE_2D, pipeFormat, 0, ptw, pth, 1,
PIPE_TEXTURE_USAGE_SAMPLER);
if (!pt) {
_mesa_unmap_drawpix_pbo(ctx, unpack);
@@ -420,7 +443,7 @@ make_texture(struct st_context *st,
static void
draw_quad(GLcontext *ctx, GLfloat x0, GLfloat y0, GLfloat z,
GLfloat x1, GLfloat y1, const GLfloat *color,
- GLboolean invertTex)
+ GLboolean invertTex, GLfloat maxXcoord, GLfloat maxYcoord)
{
struct st_context *st = ctx->st;
struct pipe_context *pipe = ctx->st->pipe;
@@ -435,8 +458,9 @@ draw_quad(GLcontext *ctx, GLfloat x0, GLfloat y0, GLfloat z,
const GLfloat clip_y0 = y0 / fb_height * 2.0f - 1.0f;
const GLfloat clip_x1 = x1 / fb_width * 2.0f - 1.0f;
const GLfloat clip_y1 = y1 / fb_height * 2.0f - 1.0f;
- const GLfloat sLeft = 0.0f, sRight = 1.0f;
- const GLfloat tTop = invertTex, tBot = 1.0f - tTop;
+ const GLfloat sLeft = 0.0f, sRight = maxXcoord;
+ const GLfloat tTop = invertTex ? maxYcoord : 0.0f;
+ const GLfloat tBot = invertTex ? 0.0f : maxYcoord;
GLuint tex, i;
/* upper-left */
@@ -608,7 +632,9 @@ draw_textured_quad(GLcontext *ctx, GLint x, GLint y,
GLfloat z,
y0 = (GLfloat) y;
y1 = y + height * ctx->Pixel.ZoomY;
- draw_quad(ctx, x0, y0, z, x1, y1, color, invertTex);
+ draw_quad(ctx, x0, y0, z, x1, y1, color, invertTex,
+(GLfloat) width / pt->width[0],
+(GLfloat) height / pt->height[0]);
/* restore state */
cso_restore_rasterizer(cso);
@@ -648,7 +674,7 @@ draw_stencil_pixels(GLcontext *ctx, GLint x, GLint y,
usage = PIPE_TRANSFER_READ_WRITE;
else
usage = PIPE_TRANSFER_WRITE;
-
+
pt = st_cond_flush_get_tex_transfer(st_context(ctx), strb->texture, 0, 0, 0,
usage, x, y,
width, height);
@@ -841,7 +867,7 @@ copy_stencil_pixels(GLcontext *ctx, GLint srcx, GLint srcy,
usage = PIPE_TRANSFER_READ_WRITE;
else
usage = PIPE_TRANSFER_WRITE;
-
+
ptDraw = st_cond_flush_get_tex_transfer(st_context(ctx),
rbDraw->texture, 0, 0, 0,
usage, dstx, dsty,
@@ -849,7 +875,7 @@ copy_stencil_pixels(GLcontext *ctx, GLint srcx, GLint srcy,
assert(ptDraw->block.width == 1);
assert(ptDraw->block.height == 1);
-
+
/* map the stencil buffer */
drawMap = screen->transfer_map(screen, ptDraw);
@@ -923,6 +949,7 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy,
struct pipe_texture *pt;
GLfloat *color;
enum pipe_format srcFormat, texFormat;
+ int ptw, pth;
pipe->flush(pipe, PIPE_FLUSH_RENDER_CACHE, NULL);
@@ -1004,13 +1031,34 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy,
height -= -srcy;
srcy = 0;
}
-
+
if (height < 0)
return;
}
+ /* Need to use POT texture? */
+ ptw = width;
+ pth = height;
+ if (!screen->get_param(screen, PIPE_CAP_NPOT_TEXTURES)) {
+ int l2pt, maxSize;
+
+ l2pt = util_logbase2(width);
+ if (1<screen->get_param(pipe->screen,
PIPE_CAP_MAX_
Mesa (master): Add support for more 8 and 16 bits formats
Module: Mesa
Branch: master
Commit: a5348d435da7d06478adc003a07e388915a8b346
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5348d435da7d06478adc003a07e388915a8b346
Author: Patrice Mandin
Date: Mon Oct 12 21:03:26 2009 +0200
Add support for more 8 and 16 bits formats
---
src/gallium/drivers/nv04/nv04_surface_2d.c | 11 ++-
src/gallium/drivers/nv30/nv30_miptree.c|5 +
2 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c
b/src/gallium/drivers/nv04/nv04_surface_2d.c
index b2ab50e..8c7eb36 100644
--- a/src/gallium/drivers/nv04/nv04_surface_2d.c
+++ b/src/gallium/drivers/nv04/nv04_surface_2d.c
@@ -13,10 +13,13 @@ nv04_surface_format(enum pipe_format format)
{
switch (format) {
case PIPE_FORMAT_A8_UNORM:
+ case PIPE_FORMAT_L8_UNORM:
+ case PIPE_FORMAT_I8_UNORM:
return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8;
case PIPE_FORMAT_R16_SNORM:
case PIPE_FORMAT_R5G6B5_UNORM:
case PIPE_FORMAT_Z16_UNORM:
+ case PIPE_FORMAT_A8L8_UNORM:
return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5;
case PIPE_FORMAT_X8R8G8B8_UNORM:
case PIPE_FORMAT_A8R8G8B8_UNORM:
@@ -36,6 +39,7 @@ nv04_rect_format(enum pipe_format format)
case PIPE_FORMAT_A8_UNORM:
return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8;
case PIPE_FORMAT_R5G6B5_UNORM:
+ case PIPE_FORMAT_A8L8_UNORM:
case PIPE_FORMAT_Z16_UNORM:
return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5;
case PIPE_FORMAT_A8R8G8B8_UNORM:
@@ -51,6 +55,10 @@ static INLINE int
nv04_scaled_image_format(enum pipe_format format)
{
switch (format) {
+ case PIPE_FORMAT_A8_UNORM:
+ case PIPE_FORMAT_L8_UNORM:
+ case PIPE_FORMAT_I8_UNORM:
+ return NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8;
case PIPE_FORMAT_A1R5G5B5_UNORM:
return NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5;
case PIPE_FORMAT_A8R8G8B8_UNORM:
@@ -59,6 +67,7 @@ nv04_scaled_image_format(enum pipe_format format)
return NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8;
case PIPE_FORMAT_R5G6B5_UNORM:
case PIPE_FORMAT_R16_SNORM:
+ case PIPE_FORMAT_A8L8_UNORM:
return NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5;
default:
return -1;
@@ -131,7 +140,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx,
OUT_RING (chan, nv04_surface_format(dst->format) |
log2i(dst->width) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT |
log2i(dst->height) <<
NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT);
-
+
BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE, 1);
OUT_RELOCo(chan, src_bo,
NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
diff --git a/src/gallium/drivers/nv30/nv30_miptree.c
b/src/gallium/drivers/nv30/nv30_miptree.c
index 7f8054d..17acca6 100644
--- a/src/gallium/drivers/nv30/nv30_miptree.c
+++ b/src/gallium/drivers/nv30/nv30_miptree.c
@@ -96,6 +96,11 @@ nv30_miptree_create(struct pipe_screen *pscreen, const
struct pipe_texture *pt)
case PIPE_FORMAT_A8R8G8B8_UNORM:
case PIPE_FORMAT_X8R8G8B8_UNORM:
case PIPE_FORMAT_R16_SNORM:
+ case PIPE_FORMAT_R5G6B5_UNORM:
+ case PIPE_FORMAT_A8L8_UNORM:
+ case PIPE_FORMAT_A8_UNORM:
+ case PIPE_FORMAT_L8_UNORM:
+ case PIPE_FORMAT_I8_UNORM:
{
if (debug_get_bool_option("NOUVEAU_NO_SWIZZLE", FALSE))
mt->base.tex_usage |=
NOUVEAU_TEXTURE_USAGE_LINEAR;
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Mesa (master): nouveau: nv30: use texture width, height for render target dimensions
Module: Mesa Branch: master Commit: cf33aaf8fe2b1d22e394f431735b76f3ab04b854 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf33aaf8fe2b1d22e394f431735b76f3ab04b854 Author: Patrice Mandin Date: Tue Oct 13 22:53:32 2009 +0200 nouveau: nv30: use texture width,height for render target dimensions --- src/gallium/drivers/nv30/nv30_state_fb.c |5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c b/src/gallium/drivers/nv30/nv30_state_fb.c index 44b6a74..2729dce 100644 --- a/src/gallium/drivers/nv30/nv30_state_fb.c +++ b/src/gallium/drivers/nv30/nv30_state_fb.c @@ -40,10 +40,9 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) for (i = 1; i < fb->nr_cbufs; i++) assert(!(rt[i]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)); - /* FIXME: NV34TCL_RT_FORMAT_LOG2_[WIDTH/HEIGHT] */ rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | - log2i(fb->width) << 16 /*NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT*/ | - log2i(fb->height) << 24 /*NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT*/; + (log2i(rt[0]->base.width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) | + (log2i(rt[0]->base.height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT); } else rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nouveau: nv30: refuse binding a colour buffer with a zeta buffer with different bits, till the backend can tell Mesa not to do that.
Module: Mesa
Branch: master
Commit: 13580aa3d142b17f936e517daf949ae228f9f14e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=13580aa3d142b17f936e517daf949ae228f9f14e
Author: Patrice Mandin
Date: Thu Oct 15 21:58:44 2009 +0200
nouveau: nv30: refuse binding a colour buffer with a zeta buffer with different
bits, till the backend can tell Mesa not to do that.
---
src/gallium/drivers/nv30/nv30_state_fb.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c
b/src/gallium/drivers/nv30/nv30_state_fb.c
index 2729dce..9b0266f 100644
--- a/src/gallium/drivers/nv30/nv30_state_fb.c
+++ b/src/gallium/drivers/nv30/nv30_state_fb.c
@@ -15,6 +15,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
unsigned w = fb->width;
unsigned h = fb->height;
struct nv30_miptree *nv30mt;
+ int colour_bits = 32, zeta_bits = 32;
rt_enable = 0;
for (i = 0; i < fb->nr_cbufs; i++) {
@@ -54,6 +55,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
break;
case PIPE_FORMAT_R5G6B5_UNORM:
rt_format |= NV34TCL_RT_FORMAT_COLOR_R5G6B5;
+ colour_bits = 16;
break;
default:
assert(0);
@@ -62,6 +64,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
switch (zeta_format) {
case PIPE_FORMAT_Z16_UNORM:
rt_format |= NV34TCL_RT_FORMAT_ZETA_Z16;
+ zeta_bits = 16;
break;
case PIPE_FORMAT_Z24S8_UNORM:
case PIPE_FORMAT_Z24X8_UNORM:
@@ -72,6 +75,10 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
assert(0);
}
+ if (colour_bits != zeta_bits) {
+ return FALSE;
+ }
+
if (rt_enable & NV34TCL_RT_ENABLE_COLOR0) {
uint32_t pitch = rt[0]->pitch;
if (zeta) {
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Mesa (master): nouveau: nv30: Hack to enforce same number of bits as front buffer, for render targets
Module: Mesa
Branch: master
Commit: a5a05fd782bf7bc3843e475df7b12fe6784c1b9e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5a05fd782bf7bc3843e475df7b12fe6784c1b9e
Author: Patrice Mandin
Date: Thu Oct 15 22:41:09 2009 +0200
nouveau: nv30: Hack to enforce same number of bits as front buffer, for render
targets
---
src/gallium/drivers/nv30/nv30_screen.c | 30 ++
1 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_screen.c
b/src/gallium/drivers/nv30/nv30_screen.c
index 41af384..5b1e5ca 100644
--- a/src/gallium/drivers/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nv30/nv30_screen.c
@@ -10,6 +10,22 @@
#define NV34TCL_CHIPSET_3X_MASK 0x0010
#define NV35TCL_CHIPSET_3X_MASK 0x01e0
+/* FIXME: It seems I should not include directly
../../winsys/drm/nouveau/drm/nouveau_drm_api.h
+ * to get the pointer to the context front buffer, so I copied nouveau_winsys
here.
+ * nv30_screen_surface_format_supported() can then use it to enforce creating
fbo
+ * with same number of bits everywhere.
+ */
+struct nouveau_winsys {
+ struct pipe_winsys base;
+
+ struct pipe_screen *pscreen;
+
+ unsigned nr_pctx;
+ struct pipe_context **pctx;
+
+ struct pipe_surface *front;
+};
+
static int
nv30_screen_get_param(struct pipe_screen *pscreen, int param)
{
@@ -83,21 +99,19 @@ nv30_screen_surface_format_supported(struct pipe_screen
*pscreen,
enum pipe_texture_target target,
unsigned tex_usage, unsigned geom_flags)
{
+ struct pipe_surface *front = ((struct nouveau_winsys *)
pscreen->winsys)->front;
+
if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
- switch (format) {
- case PIPE_FORMAT_A8R8G8B8_UNORM:
- case PIPE_FORMAT_R5G6B5_UNORM:
- return TRUE;
- default:
- break;
- }
+ return (format == front->format);
} else
if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
switch (format) {
case PIPE_FORMAT_Z24S8_UNORM:
case PIPE_FORMAT_Z24X8_UNORM:
+ return (front->format == PIPE_FORMAT_A8R8G8B8_UNORM)
+ || (front->format ==
PIPE_FORMAT_A8R8G8B8_UNORM);
case PIPE_FORMAT_Z16_UNORM:
- return TRUE;
+ return (front->format == PIPE_FORMAT_R5G6B5_UNORM);
default:
break;
}
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Mesa (master): nouveau: nv30: Use same workaround as i915 for segfault related to vbo
Module: Mesa
Branch: master
Commit: 67356ae04743da3137e950503ffd4a1f8fa36400
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=67356ae04743da3137e950503ffd4a1f8fa36400
Author: Patrice Mandin
Date: Sat Oct 17 20:27:24 2009 +0200
nouveau: nv30: Use same workaround as i915 for segfault related to vbo
---
src/gallium/drivers/nv30/nv30_context.c | 19 +--
1 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_context.c
b/src/gallium/drivers/nv30/nv30_context.c
index f827bdc..a3e65b9 100644
--- a/src/gallium/drivers/nv30/nv30_context.c
+++ b/src/gallium/drivers/nv30/nv30_context.c
@@ -10,7 +10,7 @@ nv30_flush(struct pipe_context *pipe, unsigned flags,
struct pipe_fence_handle **fence)
{
struct nv30_context *nv30 = nv30_context(pipe);
-
+
if (flags & PIPE_FLUSH_TEXTURE_CACHE) {
BEGIN_RING(rankine, 0x1fd8, 1);
OUT_RING (2);
@@ -37,10 +37,14 @@ nv30_is_texture_referenced( struct pipe_context *pipe,
unsigned face, unsigned level)
{
/**
-* FIXME: Optimize.
+* FIXME: Return the corrent result. We can't alays return referenced
+*since it causes a double flush within the vbo module.
*/
-
+#if 0
return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
+#else
+ return 0;
+#endif
}
static unsigned int
@@ -48,10 +52,14 @@ nv30_is_buffer_referenced( struct pipe_context *pipe,
struct pipe_buffer *buf)
{
/**
-* FIXME: Optimize.
+* FIXME: Return the corrent result. We can't alays return referenced
+*since it causes a double flush within the vbo module.
*/
-
+#if 0
return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
+#else
+ return 0;
+#endif
}
struct pipe_context *
@@ -95,4 +103,3 @@ nv30_create(struct pipe_screen *pscreen, unsigned pctx_id)
return &nv30->pipe;
}
-
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Mesa (master): nouveau: nv30: Remove duplicate case. Was a typo for X8R8G8B8, but that will never be use for front buffer.
Module: Mesa
Branch: master
Commit: 66aab9a1f6de241687a14f7aed45226061c1b84b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=66aab9a1f6de241687a14f7aed45226061c1b84b
Author: Patrice Mandin
Date: Sat Oct 17 20:46:19 2009 +0200
nouveau: nv30: Remove duplicate case. Was a typo for X8R8G8B8, but that will
never be use for front buffer.
---
src/gallium/drivers/nv30/nv30_screen.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_screen.c
b/src/gallium/drivers/nv30/nv30_screen.c
index 5b1e5ca..bb40e18 100644
--- a/src/gallium/drivers/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nv30/nv30_screen.c
@@ -108,8 +108,7 @@ nv30_screen_surface_format_supported(struct pipe_screen
*pscreen,
switch (format) {
case PIPE_FORMAT_Z24S8_UNORM:
case PIPE_FORMAT_Z24X8_UNORM:
- return (front->format == PIPE_FORMAT_A8R8G8B8_UNORM)
- || (front->format ==
PIPE_FORMAT_A8R8G8B8_UNORM);
+ return (front->format == PIPE_FORMAT_A8R8G8B8_UNORM);
case PIPE_FORMAT_Z16_UNORM:
return (front->format == PIPE_FORMAT_R5G6B5_UNORM);
default:
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Mesa (master): nouveau: nv40: Use same workaround as i915 for segfault related to vbo
Module: Mesa
Branch: master
Commit: 114417a2f52ab463f37fcabb5e9b0636574623dc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=114417a2f52ab463f37fcabb5e9b0636574623dc
Author: Patrice Mandin
Date: Sat Oct 17 20:49:18 2009 +0200
nouveau: nv40: Use same workaround as i915 for segfault related to vbo
---
src/gallium/drivers/nv40/nv40_context.c | 19 +--
1 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/nv40/nv40_context.c
b/src/gallium/drivers/nv40/nv40_context.c
index 8eba6a4..4e23671 100644
--- a/src/gallium/drivers/nv40/nv40_context.c
+++ b/src/gallium/drivers/nv40/nv40_context.c
@@ -10,7 +10,7 @@ nv40_flush(struct pipe_context *pipe, unsigned flags,
struct pipe_fence_handle **fence)
{
struct nv40_context *nv40 = nv40_context(pipe);
-
+
if (flags & PIPE_FLUSH_TEXTURE_CACHE) {
BEGIN_RING(curie, 0x1fd8, 1);
OUT_RING (2);
@@ -37,10 +37,14 @@ nv40_is_texture_referenced( struct pipe_context *pipe,
unsigned face, unsigned level)
{
/**
-* FIXME: Optimize.
+* FIXME: Return the correct result. We can't always return referenced
+*since it causes a double flush within the vbo module.
*/
-
+#if 0
return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
+#else
+ return 0;
+#endif
}
static unsigned int
@@ -48,10 +52,14 @@ nv40_is_buffer_referenced( struct pipe_context *pipe,
struct pipe_buffer *buf)
{
/**
-* FIXME: Optimize.
+* FIXME: Return the correct result. We can't always return referenced
+*since it causes a double flush within the vbo module.
*/
-
+#if 0
return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
+#else
+ return 0;
+#endif
}
struct pipe_context *
@@ -95,4 +103,3 @@ nv40_create(struct pipe_screen *pscreen, unsigned pctx_id)
return &nv40->pipe;
}
-
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Mesa (master): nouveau: nv30: check number of colour buffers to bind
Module: Mesa
Branch: master
Commit: cb351bdd6e09b40fe719c548c48ea40c6c4c3d11
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb351bdd6e09b40fe719c548c48ea40c6c4c3d11
Author: Patrice Mandin
Date: Wed Oct 21 21:56:09 2009 +0200
nouveau: nv30: check number of colour buffers to bind
---
src/gallium/drivers/nv30/nv30_state_fb.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c
b/src/gallium/drivers/nv30/nv30_state_fb.c
index 9b0266f..197de82 100644
--- a/src/gallium/drivers/nv30/nv30_state_fb.c
+++ b/src/gallium/drivers/nv30/nv30_state_fb.c
@@ -17,6 +17,10 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
struct nv30_miptree *nv30mt;
int colour_bits = 32, zeta_bits = 32;
+ if (fb->nr_cbufs == 0) {
+ return FALSE;
+ }
+
rt_enable = 0;
for (i = 0; i < fb->nr_cbufs; i++) {
if (colour_format) {
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Mesa (master): nouveau: nv30: Do not use assert to return NULL
Module: Mesa Branch: master Commit: d364f662c685ba0f28aa865fbd7e1f0acc3c469e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d364f662c685ba0f28aa865fbd7e1f0acc3c469e Author: Patrice Mandin Date: Wed Oct 21 22:01:03 2009 +0200 nouveau: nv30: Do not use assert to return NULL --- src/gallium/drivers/nv30/nv30_fragtex.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c b/src/gallium/drivers/nv30/nv30_fragtex.c index 822e1d8..a2ce947 100644 --- a/src/gallium/drivers/nv30/nv30_fragtex.c +++ b/src/gallium/drivers/nv30/nv30_fragtex.c @@ -69,7 +69,7 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit) tf = nv30_fragtex_format(pt->format); if (!tf) - assert(0); + return NULL; txf = tf->format; txf |= ((pt->last_level>0) ? NV34TCL_TX_FORMAT_MIPMAP : 0); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nouveau: nv30: use a8r8g8b8 as depth texture format for z24s8
Module: Mesa
Branch: master
Commit: f9a69c0f040171cffa63c9c68264c1cf847aa1cd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f9a69c0f040171cffa63c9c68264c1cf847aa1cd
Author: Patrice Mandin
Date: Thu Oct 22 21:55:09 2009 +0200
nouveau: nv30: use a8r8g8b8 as depth texture format for z24s8
---
src/gallium/drivers/nv30/nv30_fragtex.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c
b/src/gallium/drivers/nv30/nv30_fragtex.c
index a2ce947..f5f17d4 100644
--- a/src/gallium/drivers/nv30/nv30_fragtex.c
+++ b/src/gallium/drivers/nv30/nv30_fragtex.c
@@ -30,7 +30,7 @@ nv30_texture_formats[] = {
_(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X),
_(A8L8_UNORM, A8L8, S1, S1, S1, S1, X, X, X, Y),
// _(Z16_UNORM , Z16 , S1, S1, S1, ONE, X, X, X, X),
-// _(Z24S8_UNORM , Z24 , S1, S1, S1, ONE, X, X, X, X),
+ _(Z24S8_UNORM , A8R8G8B8, S1, S1, S1, ONE, X, X, X, X),
_(DXT1_RGB , DXT1, S1, S1, S1, ONE, X, Y, Z, W),
_(DXT1_RGBA , DXT1, S1, S1, S1, S1, X, Y, Z, W),
_(DXT3_RGBA , DXT3, S1, S1, S1, S1, X, Y, Z, W),
@@ -73,9 +73,9 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
txf = tf->format;
txf |= ((pt->last_level>0) ? NV34TCL_TX_FORMAT_MIPMAP : 0);
- txf |= log2i(pt->width[0]) << 20;
- txf |= log2i(pt->height[0]) << 24;
- txf |= log2i(pt->depth[0]) << 28;
+ txf |= log2i(pt->width[0]) << NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT;
+ txf |= log2i(pt->height[0]) << NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT;
+ txf |= log2i(pt->depth[0]) << NV34TCL_TX_FORMAT_BASE_SIZE_W_SHIFT;
txf |= NV34TCL_TX_FORMAT_NO_BORDER | 0x1;
switch (pt->target) {
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Mesa (master): nouveau: nv30: rewrite so we can render only in depth buffer
Module: Mesa
Branch: master
Commit: 4b8de9bd7c6f77fcf3f1f2b939bab980e074e8bf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b8de9bd7c6f77fcf3f1f2b939bab980e074e8bf
Author: Patrice Mandin
Date: Thu Oct 22 22:01:53 2009 +0200
nouveau: nv30: rewrite so we can render only in depth buffer
---
src/gallium/drivers/nv30/nv30_state_fb.c | 55 +++---
1 files changed, 35 insertions(+), 20 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c
b/src/gallium/drivers/nv30/nv30_state_fb.c
index 197de82..f90681b 100644
--- a/src/gallium/drivers/nv30/nv30_state_fb.c
+++ b/src/gallium/drivers/nv30/nv30_state_fb.c
@@ -8,8 +8,8 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
struct nouveau_channel *chan = nv30->screen->base.channel;
struct nouveau_grobj *rankine = nv30->screen->rankine;
struct nv04_surface *rt[2], *zeta = NULL;
- uint32_t rt_enable, rt_format;
- int i, colour_format = 0, zeta_format = 0;
+ uint32_t rt_enable = 0, rt_format = 0;
+ int i, colour_format = 0, zeta_format = 0, depth_only = 0;
struct nouveau_stateobj *so = so_new(64, 10);
unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM;
unsigned w = fb->width;
@@ -17,11 +17,6 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
struct nv30_miptree *nv30mt;
int colour_bits = 32, zeta_bits = 32;
- if (fb->nr_cbufs == 0) {
- return FALSE;
- }
-
- rt_enable = 0;
for (i = 0; i < fb->nr_cbufs; i++) {
if (colour_format) {
assert(colour_format == fb->cbufs[i]->format);
@@ -40,17 +35,35 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
zeta = (struct nv04_surface *)fb->zsbuf;
}
- if (!(rt[0]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) {
- assert(!(fb->width & (fb->width - 1)) && !(fb->height &
(fb->height - 1)));
- for (i = 1; i < fb->nr_cbufs; i++)
- assert(!(rt[i]->base.texture->tex_usage &
NOUVEAU_TEXTURE_USAGE_LINEAR));
+ if (rt_enable & (NV34TCL_RT_ENABLE_COLOR0|NV34TCL_RT_ENABLE_COLOR1)) {
+ /* Render to at least a colour buffer */
+ if (!(rt[0]->base.texture->tex_usage &
NOUVEAU_TEXTURE_USAGE_LINEAR)) {
+ assert(!(fb->width & (fb->width - 1)) && !(fb->height &
(fb->height - 1)));
+ for (i = 1; i < fb->nr_cbufs; i++)
+ assert(!(rt[i]->base.texture->tex_usage &
NOUVEAU_TEXTURE_USAGE_LINEAR));
- rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED |
- (log2i(rt[0]->base.width) <<
NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) |
- (log2i(rt[0]->base.height) <<
NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT);
+ rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED |
+ (log2i(rt[0]->base.width) <<
NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) |
+ (log2i(rt[0]->base.height) <<
NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT);
+ }
+ else
+ rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR;
+ } else if (fb->zsbuf) {
+ depth_only = 1;
+
+ /* Render to depth buffer only */
+ if (!(zeta->base.texture->tex_usage &
NOUVEAU_TEXTURE_USAGE_LINEAR)) {
+ assert(!(fb->width & (fb->width - 1)) && !(fb->height &
(fb->height - 1)));
+
+ rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED |
+ (log2i(zeta->base.width) <<
NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) |
+ (log2i(zeta->base.height) <<
NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT);
+ }
+ else
+ rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR;
+ } else {
+ return FALSE;
}
- else
- rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR;
switch (colour_format) {
case PIPE_FORMAT_A8R8G8B8_UNORM:
@@ -83,21 +96,23 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
return FALSE;
}
- if (rt_enable & NV34TCL_RT_ENABLE_COLOR0) {
- uint32_t pitch = rt[0]->pitch;
+ if (depth_only || (rt_enable & NV34TCL_RT_ENABLE_COLOR0)) {
+ struct nv04_surface *rt0 = (depth_only ? zeta : rt[0]);
+ uint32_t pitch = rt0->pitch;
+
if (zeta) {
pitch |= (zeta->pitch << 16);
} else {
pitch |= (pitch << 16)
Mesa (master): nouveau: nv30: use r5g6b5 as z16 format
Module: Mesa
Branch: master
Commit: c84a05676497ff7263f3ea8203b868071c4f678f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c84a05676497ff7263f3ea8203b868071c4f678f
Author: Patrice Mandin
Date: Fri Oct 23 18:40:13 2009 +0200
nouveau: nv30: use r5g6b5 as z16 format
---
src/gallium/drivers/nv30/nv30_fragtex.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c
b/src/gallium/drivers/nv30/nv30_fragtex.c
index f5f17d4..3dd636f 100644
--- a/src/gallium/drivers/nv30/nv30_fragtex.c
+++ b/src/gallium/drivers/nv30/nv30_fragtex.c
@@ -29,7 +29,7 @@ nv30_texture_formats[] = {
_(A8_UNORM , L8 , ZERO, ZERO, ZERO, S1, X, X, X, X),
_(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X),
_(A8L8_UNORM, A8L8, S1, S1, S1, S1, X, X, X, Y),
-// _(Z16_UNORM , Z16 , S1, S1, S1, ONE, X, X, X, X),
+ _(Z16_UNORM , R5G6B5 , S1, S1, S1, ONE, X, X, X, X),
_(Z24S8_UNORM , A8R8G8B8, S1, S1, S1, ONE, X, X, X, X),
_(DXT1_RGB , DXT1, S1, S1, S1, ONE, X, Y, Z, W),
_(DXT1_RGBA , DXT1, S1, S1, S1, S1, X, Y, Z, W),
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Mesa (master): nouveau: nv30: Relax some limits. We can render to z24s8 buffer even if color buffer is 16 bits.
Module: Mesa
Branch: master
Commit: d9014a13e72b6682a959217d38050f3252628edb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d9014a13e72b6682a959217d38050f3252628edb
Author: Patrice Mandin
Date: Fri Oct 23 18:42:21 2009 +0200
nouveau: nv30: Relax some limits. We can render to z24s8 buffer even if color
buffer is 16 bits.
---
src/gallium/drivers/nv30/nv30_screen.c | 10 --
src/gallium/drivers/nv30/nv30_state_fb.c |2 +-
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_screen.c
b/src/gallium/drivers/nv30/nv30_screen.c
index bb40e18..221ae1b 100644
--- a/src/gallium/drivers/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nv30/nv30_screen.c
@@ -102,13 +102,19 @@ nv30_screen_surface_format_supported(struct pipe_screen
*pscreen,
struct pipe_surface *front = ((struct nouveau_winsys *)
pscreen->winsys)->front;
if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
- return (format == front->format);
+ switch (format) {
+ case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_R5G6B5_UNORM:
+ return TRUE;
+ default:
+ break;
+ }
} else
if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
switch (format) {
case PIPE_FORMAT_Z24S8_UNORM:
case PIPE_FORMAT_Z24X8_UNORM:
- return (front->format == PIPE_FORMAT_A8R8G8B8_UNORM);
+ return TRUE;
case PIPE_FORMAT_Z16_UNORM:
return (front->format == PIPE_FORMAT_R5G6B5_UNORM);
default:
diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c
b/src/gallium/drivers/nv30/nv30_state_fb.c
index f90681b..4d6a67e 100644
--- a/src/gallium/drivers/nv30/nv30_state_fb.c
+++ b/src/gallium/drivers/nv30/nv30_state_fb.c
@@ -92,7 +92,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
assert(0);
}
- if (colour_bits != zeta_bits) {
+ if (colour_bits > zeta_bits) {
return FALSE;
}
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Mesa (master): nouveau: Fix warning for void function returning value. Add missing include for pipe_reference_init function.
Module: Mesa
Branch: master
Commit: e423df0f0c3e5a5d33d301b6176e9380e61b98ad
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e423df0f0c3e5a5d33d301b6176e9380e61b98ad
Author: Patrice Mandin
Date: Fri Feb 5 19:42:33 2010 +0100
nouveau: Fix warning for void function returning value. Add missing include for
pipe_reference_init function.
Signed-off-by: Patrice Mandin
---
src/gallium/drivers/nv30/nv30_vbo.c|7 +++
src/gallium/drivers/nv40/nv40_vbo.c|4 ++--
.../winsys/drm/nouveau/drm/nouveau_drm_api.c |1 +
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_vbo.c
b/src/gallium/drivers/nv30/nv30_vbo.c
index d50055f..a83ddf1 100644
--- a/src/gallium/drivers/nv30/nv30_vbo.c
+++ b/src/gallium/drivers/nv30/nv30_vbo.c
@@ -223,7 +223,6 @@ nv30_draw_arrays(struct pipe_context *pipe,
}
pipe->flush(pipe, 0, NULL);
- return TRUE;
}
static INLINE void
@@ -382,7 +381,7 @@ nv30_draw_elements_inline(struct pipe_context *pipe,
map = pipe_buffer_map(pscreen, ib, PIPE_BUFFER_USAGE_CPU_READ);
if (!ib) {
NOUVEAU_ERR("failed mapping ib\n");
- return FALSE;
+ return;
}
switch (ib_size) {
@@ -424,7 +423,7 @@ nv30_draw_elements_vbo(struct pipe_context *pipe,
FIRE_RING(chan);
continue;
}
-
+
BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
OUT_RING (chan, nvgl_primitive(mode));
@@ -468,7 +467,7 @@ nv30_draw_elements(struct pipe_context *pipe,
if (FORCE_SWTNL || !nv30_state_validate(nv30)) {
/*return nv30_draw_elements_swtnl(pipe, NULL, 0,
mode, start, count);*/
- return;
+ return;
}
if (idxbuf) {
diff --git a/src/gallium/drivers/nv40/nv40_vbo.c
b/src/gallium/drivers/nv40/nv40_vbo.c
index d1c76c0..1e14edc 100644
--- a/src/gallium/drivers/nv40/nv40_vbo.c
+++ b/src/gallium/drivers/nv40/nv40_vbo.c
@@ -382,7 +382,7 @@ nv40_draw_elements_inline(struct pipe_context *pipe,
map = pipe_buffer_map(pscreen, ib, PIPE_BUFFER_USAGE_CPU_READ);
if (!ib) {
NOUVEAU_ERR("failed mapping ib\n");
- return FALSE;
+ return;
}
switch (ib_size) {
@@ -424,7 +424,7 @@ nv40_draw_elements_vbo(struct pipe_context *pipe,
FIRE_RING(chan);
continue;
}
-
+
BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1);
OUT_RING (chan, nvgl_primitive(mode));
diff --git a/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
b/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
index 3f41e5d..8e5f821 100644
--- a/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
+++ b/src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
@@ -2,6 +2,7 @@
#include "pipe/p_state.h"
#include "util/u_format.h"
#include "util/u_memory.h"
+#include "util/u_inlines.h"
#include "nouveau_drm_api.h"
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Mesa (master): nouveau: nv30: Define number of texture samplers
Module: Mesa Branch: master Commit: 1dd6e0b673bc0a5480a27e6f7d9b02545e65a6df URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1dd6e0b673bc0a5480a27e6f7d9b02545e65a6df Author: Patrice Mandin Date: Fri Feb 12 13:23:48 2010 +0100 nouveau: nv30: Define number of texture samplers Signed-off-by: Patrice Mandin --- src/gallium/drivers/nv30/nv30_screen.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c index 8f9b26e..1caeccc 100644 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ b/src/gallium/drivers/nv30/nv30_screen.c @@ -64,6 +64,8 @@ nv30_screen_get_param(struct pipe_screen *pscreen, int param) case NOUVEAU_CAP_HW_VTXBUF: case NOUVEAU_CAP_HW_IDXBUF: return 1; + case PIPE_CAP_MAX_COMBINED_SAMPLERS: + return 4; case PIPE_CAP_INDEP_BLEND_ENABLE: return 0; case PIPE_CAP_INDEP_BLEND_FUNC: ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nouveau: nv30: it may have 8 texture samplers (not 4), but shader engine has 16 texture units
Module: Mesa
Branch: master
Commit: 536ae20f80e430a2765e19649eec5bdc9cdc4854
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=536ae20f80e430a2765e19649eec5bdc9cdc4854
Author: Patrice Mandin
Date: Fri Feb 12 19:22:41 2010 +0100
nouveau: nv30: it may have 8 texture samplers (not 4), but shader engine has 16
texture units
Signed-off-by: Patrice Mandin
---
src/gallium/drivers/nv30/nv30_screen.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_screen.c
b/src/gallium/drivers/nv30/nv30_screen.c
index 1caeccc..aef37d3 100644
--- a/src/gallium/drivers/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nv30/nv30_screen.c
@@ -28,7 +28,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, int param)
{
switch (param) {
case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
- return 16;
+ return 8;
case PIPE_CAP_NPOT_TEXTURES:
return 0;
case PIPE_CAP_TWO_SIDED_STENCIL:
@@ -65,7 +65,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, int param)
case NOUVEAU_CAP_HW_IDXBUF:
return 1;
case PIPE_CAP_MAX_COMBINED_SAMPLERS:
- return 4;
+ return 16;
case PIPE_CAP_INDEP_BLEND_ENABLE:
return 0;
case PIPE_CAP_INDEP_BLEND_FUNC:
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Mesa (master): nouveau: nv30: Check for NULL front (happens with DRI2)
Module: Mesa
Branch: master
Commit: b353106467d386b48877d6ae1048cca3feaf99ff
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b353106467d386b48877d6ae1048cca3feaf99ff
Author: Patrice Mandin
Date: Tue Nov 17 19:50:37 2009 +0100
nouveau: nv30: Check for NULL front (happens with DRI2)
---
src/gallium/drivers/nv30/nv30_screen.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_screen.c
b/src/gallium/drivers/nv30/nv30_screen.c
index 221ae1b..7cd3690 100644
--- a/src/gallium/drivers/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nv30/nv30_screen.c
@@ -116,7 +116,10 @@ nv30_screen_surface_format_supported(struct pipe_screen
*pscreen,
case PIPE_FORMAT_Z24X8_UNORM:
return TRUE;
case PIPE_FORMAT_Z16_UNORM:
- return (front->format == PIPE_FORMAT_R5G6B5_UNORM);
+ if (front) {
+ return (front->format ==
PIPE_FORMAT_R5G6B5_UNORM);
+ }
+ return TRUE;
default:
break;
}
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Mesa (master): nouveau: nv30: Add missing include to fix warning
Module: Mesa
Branch: master
Commit: 49289f1d25d42a6b3eb5da5f85b2dd6a14cda8e7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=49289f1d25d42a6b3eb5da5f85b2dd6a14cda8e7
Author: Patrice Mandin
Date: Tue Nov 17 19:49:56 2009 +0100
nouveau: nv30: Add missing include to fix warning
---
src/gallium/drivers/nv30/nv30_fragprog.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c
b/src/gallium/drivers/nv30/nv30_fragprog.c
index cc03854..0ce702d 100644
--- a/src/gallium/drivers/nv30/nv30_fragprog.c
+++ b/src/gallium/drivers/nv30/nv30_fragprog.c
@@ -4,6 +4,7 @@
#include "pipe/p_inlines.h"
#include "pipe/p_shader_tokens.h"
+#include "tgsi/tgsi_dump.h"
#include "tgsi/tgsi_parse.h"
#include "tgsi/tgsi_util.h"
@@ -131,7 +132,7 @@ emit_src(struct nv30_fpc *fpc, int pos, struct nv30_sreg
src)
sizeof(uint32_t) * 4);
}
- sr |= (NV30_FP_REG_TYPE_CONST << NV30_FP_REG_TYPE_SHIFT);
+ sr |= (NV30_FP_REG_TYPE_CONST << NV30_FP_REG_TYPE_SHIFT);
break;
case NV30SR_NONE:
sr |= (NV30_FP_REG_TYPE_INPUT << NV30_FP_REG_TYPE_SHIFT);
@@ -666,7 +667,7 @@ nv30_fragprog_prepare(struct nv30_fpc *fpc)
{
struct tgsi_full_immediate *imm;
float vals[4];
-
+
imm = &p.FullToken.FullImmediate;
assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32);
assert(fpc->nr_imm < MAX_IMM);
@@ -754,7 +755,7 @@ nv30_fragprog_translate(struct nv30_context *nv30,
fp->insn[fpc->inst_offset + 1] = 0x;
fp->insn[fpc->inst_offset + 2] = 0x;
fp->insn[fpc->inst_offset + 3] = 0x;
-
+
fp->translated = TRUE;
fp->on_hw = FALSE;
out_err:
@@ -838,7 +839,7 @@ nv30_fragprog_validate(struct nv30_context *nv30)
update_constants:
if (fp->nr_consts) {
float *map;
-
+
map = pipe_buffer_map(pscreen, constbuf,
PIPE_BUFFER_USAGE_CPU_READ);
for (i = 0; i < fp->nr_consts; i++) {
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Mesa (master): nouveau: nv30: Disable swizzled surface usage if any dimension is 1 ( Warsow creates a 1x1 front buffer)
Module: Mesa
Branch: master
Commit: ec7844537ecdb0b598447e37bf0b7120acd029f3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec7844537ecdb0b598447e37bf0b7120acd029f3
Author: Patrice Mandin
Date: Sat Dec 12 22:31:53 2009 +0100
nouveau: nv30: Disable swizzled surface usage if any dimension is 1 (Warsow
creates a 1x1 front buffer)
---
src/gallium/drivers/nv30/nv30_miptree.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_miptree.c
b/src/gallium/drivers/nv30/nv30_miptree.c
index 920fe64..fd7c65f 100644
--- a/src/gallium/drivers/nv30/nv30_miptree.c
+++ b/src/gallium/drivers/nv30/nv30_miptree.c
@@ -72,6 +72,9 @@ nv30_miptree_create(struct pipe_screen *pscreen, const struct
pipe_texture *pt)
mt->base.screen = pscreen;
/* Swizzled textures must be POT */
+ if ((pt->width0 == 1) || (pt->height0 == 1)) {
+ mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
+ } else
if (pt->width0 & (pt->width0 - 1) ||
pt->height0 & (pt->height0 - 1))
mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
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Mesa (master): Revert "nouveau: nv30: Disable swizzled surface usage if any dimension is 1 ( Warsow creates a 1x1 front buffer)"
Module: Mesa
Branch: master
Commit: b91503f45740e6e2a5db92609aed887b6c7bd460
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b91503f45740e6e2a5db92609aed887b6c7bd460
Author: Patrice Mandin
Date: Sat Dec 12 23:15:08 2009 +0100
Revert "nouveau: nv30: Disable swizzled surface usage if any dimension is 1
(Warsow creates a 1x1 front buffer)"
This reverts commit ec7844537ecdb0b598447e37bf0b7120acd029f3.
---
src/gallium/drivers/nv30/nv30_miptree.c |3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_miptree.c
b/src/gallium/drivers/nv30/nv30_miptree.c
index fd7c65f..920fe64 100644
--- a/src/gallium/drivers/nv30/nv30_miptree.c
+++ b/src/gallium/drivers/nv30/nv30_miptree.c
@@ -72,9 +72,6 @@ nv30_miptree_create(struct pipe_screen *pscreen, const struct
pipe_texture *pt)
mt->base.screen = pscreen;
/* Swizzled textures must be POT */
- if ((pt->width0 == 1) || (pt->height0 == 1)) {
- mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
- } else
if (pt->width0 & (pt->width0 - 1) ||
pt->height0 & (pt->height0 - 1))
mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR;
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Mesa (master): nouveau: nv50: Add missing ctor_immd_4u32 function
Module: Mesa
Branch: master
Commit: d4d880199ead954e79cad141f7a29f7dd17fe7fc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4d880199ead954e79cad141f7a29f7dd17fe7fc
Author: Patrice Mandin
Date: Sun Dec 13 20:09:33 2009 +0100
nouveau: nv50: Add missing ctor_immd_4u32 function
---
src/gallium/drivers/nv50/nv50_program.c | 17 +++--
1 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nv50/nv50_program.c
b/src/gallium/drivers/nv50/nv50_program.c
index 2e4279f..feb3d42 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -358,7 +358,7 @@ static void
kill_temp_temp(struct nv50_pc *pc)
{
int i;
-
+
for (i = 0; i < pc->temp_temp_nr; i++)
free_temp(pc, pc->temp_temp[i]);
pc->temp_temp_nr = 0;
@@ -373,7 +373,20 @@ ctor_immd(struct nv50_pc *pc, float x, float y, float z,
float w)
pc->immd_buf[(pc->immd_nr * 4) + 1] = y;
pc->immd_buf[(pc->immd_nr * 4) + 2] = z;
pc->immd_buf[(pc->immd_nr * 4) + 3] = w;
-
+
+ return pc->immd_nr++;
+}
+
+static int
+ctor_immd_4u32(struct nv50_pc *pc, uint32_t x, uint32_t y, uint32_t z,
uint32_t w)
+{
+ pc->immd_buf = REALLOC(pc->immd_buf, (pc->immd_nr * 4 *
sizeof(uint32_t)),
+ (pc->immd_nr + 1) * 4 * sizeof(uint32_t));
+ pc->immd_buf[(pc->immd_nr * 4) + 0] = x;
+ pc->immd_buf[(pc->immd_nr * 4) + 1] = y;
+ pc->immd_buf[(pc->immd_nr * 4) + 2] = z;
+ pc->immd_buf[(pc->immd_nr * 4) + 3] = w;
+
return pc->immd_nr++;
}
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Mesa (master): nouveau: nv30: Remove useless variables fs, txp. Also do not change txf, as bit 13 is in the texture format
Module: Mesa
Branch: master
Commit: 923aab93d98cd5ec7f19fd9a52490113ef57213b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=923aab93d98cd5ec7f19fd9a52490113ef57213b
Author: Patrice Mandin
Date: Fri Jan 15 22:29:13 2010 +0100
nouveau: nv30: Remove useless variables fs, txp. Also do not change txf, as bit
13 is in the texture format
Signed-off-by: Patrice Mandin
---
src/gallium/drivers/nv30/nv30_fragtex.c | 10 +-
1 files changed, 1 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c
b/src/gallium/drivers/nv30/nv30_fragtex.c
index 9893567..0cc3172 100644
--- a/src/gallium/drivers/nv30/nv30_fragtex.c
+++ b/src/gallium/drivers/nv30/nv30_fragtex.c
@@ -43,7 +43,6 @@ static struct nv30_texture_format *
nv30_fragtex_format(uint pipe_format)
{
struct nv30_texture_format *tf = nv30_texture_formats;
- char fs[128];
while (tf->defined) {
if (tf->pipe == pipe_format)
@@ -65,7 +64,7 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
struct nouveau_bo *bo = nouveau_bo(nv30mt->buffer);
struct nv30_texture_format *tf;
struct nouveau_stateobj *so;
- uint32_t txf, txs , txp;
+ uint32_t txf, txs;
unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
tf = nv30_fragtex_format(pt->format);
@@ -97,13 +96,6 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
return NULL;
}
- if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) {
- txp = 0;
- } else {
- txp = nv30mt->level[0].pitch;
- txf |= (1<<13) /*FIXME: NV34TCL_TX_FORMAT_LINEAR ? */;
- }
-
txs = tf->swizzle;
so = so_new(1, 8, 2);
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Mesa (master): nouveau/nvfx: Define some capabilities for shaders
Module: Mesa
Branch: master
Commit: 33c08202a1ad60367522f34c78ab35dca4dc9d40
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=33c08202a1ad60367522f34c78ab35dca4dc9d40
Author: Patrice Mandin
Date: Fri May 14 18:53:05 2010 +0200
nouveau/nvfx: Define some capabilities for shaders
Signed-off-by: Patrice Mandin
---
src/gallium/drivers/nvfx/nvfx_screen.c | 38
1 files changed, 38 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c
b/src/gallium/drivers/nvfx/nvfx_screen.c
index 0ff25e5..6b01d86 100644
--- a/src/gallium/drivers/nvfx/nvfx_screen.c
+++ b/src/gallium/drivers/nvfx/nvfx_screen.c
@@ -84,6 +84,44 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
return 0;
+ case PIPE_CAP_MAX_FS_INSTRUCTIONS:
+ case PIPE_CAP_MAX_FS_ALU_INSTRUCTIONS:
+ case PIPE_CAP_MAX_FS_TEX_INSTRUCTIONS:
+ case PIPE_CAP_MAX_FS_TEX_INDIRECTIONS:
+ return 4096;
+ case PIPE_CAP_MAX_FS_CONTROL_FLOW_DEPTH:
+ /* FIXME: is it the dynamic (nv30:0/nv40:24) or the static
+ value (written there) ? */
+ return screen->is_nv4x ? 4 : 0;
+ /*case PIPE_CAP_MAX_FS_INPUTS:*//* FIXME */
+ /*case PIPE_CAP_MAX_FS_CONSTS:*//* FIXME */
+ /* return 0;*/
+ case PIPE_CAP_MAX_FS_TEMPS:
+ return 32;
+ case PIPE_CAP_MAX_FS_ADDRS:
+ return screen->is_nv4x ? 1 : 0;
+ /*case PIPE_CAP_MAX_FS_PREDS:*/ /* FIXME */
+ /* return 0;*/
+ case PIPE_CAP_MAX_VS_INSTRUCTIONS:
+ case PIPE_CAP_MAX_VS_ALU_INSTRUCTIONS:
+ return screen->is_nv4x ? 512 : 256;
+ case PIPE_CAP_MAX_VS_TEX_INSTRUCTIONS:
+ case PIPE_CAP_MAX_VS_TEX_INDIRECTIONS:
+ return screen->is_nv4x ? 512 : 0;
+ case PIPE_CAP_MAX_VS_CONTROL_FLOW_DEPTH:
+ /* FIXME: is it the dynamic (nv30/nv40:24) or the static
+ value (written there) ? */
+ return screen->is_nv4x ? 4 : 1;
+ /*case PIPE_CAP_MAX_VS_INPUTS:*//* FIXME */
+ /* return 0;*/
+ case PIPE_CAP_MAX_VS_CONSTS:
+ return 256;
+ case PIPE_CAP_MAX_VS_TEMPS:
+ return screen->is_nv4x ? 48 : 16;
+ case PIPE_CAP_MAX_VS_ADDRS:
+ return 2;
+ /*case PIPE_CAP_MAX_VS_PREDS:*/ /* FIXME */
+ /* return 0;*/
default:
NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
return 0;
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Mesa (master): nouveau/nvfx: Fill more PIPE_CAP_MAX_ values
Module: Mesa
Branch: master
Commit: 8504c5d931e47765a15fdaec2df2cb6502a1bd5c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8504c5d931e47765a15fdaec2df2cb6502a1bd5c
Author: Patrice Mandin
Date: Fri May 21 19:09:08 2010 +0200
nouveau/nvfx: Fill more PIPE_CAP_MAX_ values
Signed-off-by: Patrice Mandin
---
src/gallium/drivers/nvfx/nvfx_screen.c | 27 ++-
1 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c
b/src/gallium/drivers/nvfx/nvfx_screen.c
index a44f9e9..6cb8428 100644
--- a/src/gallium/drivers/nvfx/nvfx_screen.c
+++ b/src/gallium/drivers/nvfx/nvfx_screen.c
@@ -93,17 +93,18 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
return 4096;
case PIPE_CAP_MAX_FS_CONTROL_FLOW_DEPTH:
/* FIXME: is it the dynamic (nv30:0/nv40:24) or the static
- value (written there) ? */
+ value (nv30:0/nv40:4) ? */
return screen->is_nv4x ? 4 : 0;
- /*case PIPE_CAP_MAX_FS_INPUTS:*//* FIXME */
- /*case PIPE_CAP_MAX_FS_CONSTS:*//* FIXME */
- /* return 0;*/
+ case PIPE_CAP_MAX_FS_INPUTS:
+ return 10;
+ case PIPE_CAP_MAX_FS_CONSTS:
+ return screen->is_nv4x ? 224 : 32;
case PIPE_CAP_MAX_FS_TEMPS:
return 32;
case PIPE_CAP_MAX_FS_ADDRS:
return screen->is_nv4x ? 1 : 0;
- /*case PIPE_CAP_MAX_FS_PREDS:*/ /* FIXME */
- /* return 0;*/
+ case PIPE_CAP_MAX_FS_PREDS:
+ return screen->is_nv4x ? 1 : 0;
case PIPE_CAP_MAX_VS_INSTRUCTIONS:
case PIPE_CAP_MAX_VS_ALU_INSTRUCTIONS:
return screen->is_nv4x ? 512 : 256;
@@ -111,19 +112,19 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_MAX_VS_TEX_INDIRECTIONS:
return screen->is_nv4x ? 512 : 0;
case PIPE_CAP_MAX_VS_CONTROL_FLOW_DEPTH:
- /* FIXME: is it the dynamic (nv30/nv40:24) or the static
- value (written there) ? */
+ /* FIXME: is it the dynamic (nv30:24/nv40:24) or the static
+ value (nv30:1/nv40:4) ? */
return screen->is_nv4x ? 4 : 1;
- /*case PIPE_CAP_MAX_VS_INPUTS:*//* FIXME */
- /* return 0;*/
+ case PIPE_CAP_MAX_VS_INPUTS:
+ return 16;
case PIPE_CAP_MAX_VS_CONSTS:
return 256;
case PIPE_CAP_MAX_VS_TEMPS:
- return screen->is_nv4x ? 48 : 16;
+ return screen->is_nv4x ? 32 : 13;
case PIPE_CAP_MAX_VS_ADDRS:
return 2;
- /*case PIPE_CAP_MAX_VS_PREDS:*/ /* FIXME */
- /* return 0;*/
+ case PIPE_CAP_MAX_VS_PREDS:
+ return screen->is_nv4x ? 1 : 0;
default:
NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
return 0;
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Mesa (master): nouveau/nvfx: Add new PIPE_CAP values
Module: Mesa
Branch: master
Commit: c052213fb30214c9ca2575ce4425e5bd64a0e16c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c052213fb30214c9ca2575ce4425e5bd64a0e16c
Author: Patrice Mandin
Date: Wed Jul 21 19:28:45 2010 +0200
nouveau/nvfx: Add new PIPE_CAP values
Signed-off-by: Patrice Mandin
---
src/gallium/drivers/nvfx/nvfx_screen.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c
b/src/gallium/drivers/nvfx/nvfx_screen.c
index a78d241..80db28a 100644
--- a/src/gallium/drivers/nvfx/nvfx_screen.c
+++ b/src/gallium/drivers/nvfx/nvfx_screen.c
@@ -56,6 +56,8 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
return 0;
case PIPE_CAP_TEXTURE_SHADOW_MAP:
return 1;
+ case PIPE_CAP_TEXTURE_SWIZZLE:
+ return 1;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
return 13;
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
@@ -127,6 +129,8 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
return 2;
case PIPE_CAP_MAX_VS_PREDS:
return screen->is_nv4x ? 1 : 0;
+ case PIPE_CAP_GEOMETRY_SHADER4:
+ return 0;
default:
NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
return 0;
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Mesa (master): nouveau/nvfx: Remove enforcement of bit depth being same as front buffer
Module: Mesa
Branch: master
Commit: 4a955ab6b78e3b3a4cdd54dc933715f0dafbe7f4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4a955ab6b78e3b3a4cdd54dc933715f0dafbe7f4
Author: Patrice Mandin
Date: Wed Sep 1 18:12:11 2010 +0200
nouveau/nvfx: Remove enforcement of bit depth being same as front buffer
Signed-off-by: Patrice Mandin
---
src/gallium/drivers/nvfx/nvfx_screen.c | 17 -
1 files changed, 0 insertions(+), 17 deletions(-)
diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c
b/src/gallium/drivers/nvfx/nvfx_screen.c
index 99b4d8b..65ca265 100644
--- a/src/gallium/drivers/nvfx/nvfx_screen.c
+++ b/src/gallium/drivers/nvfx/nvfx_screen.c
@@ -14,18 +14,6 @@
#define NV34TCL_CHIPSET_3X_MASK 0x0010
#define NV35TCL_CHIPSET_3X_MASK 0x01e0
-/* FIXME: It seems I should not include directly
../../winsys/drm/nouveau/drm/nouveau_drm_api.h
-* to get the pointer to the context front buffer, so I copied nouveau_winsys
here.
-* nv30_screen_surface_format_supported() can then use it to enforce creating
fbo
-* with same number of bits everywhere.
-*/
-struct nouveau_winsys {
- struct pipe_winsys base;
-
- struct pipe_screen *pscreen;
-
- struct pipe_surface *front;
-};
#define NV4X_GRCLASS4097_CHIPSETS 0x0baf
#define NV4X_GRCLASS4497_CHIPSETS 0x5450
#define NV6X_GRCLASS4497_CHIPSETS 0x0088
@@ -170,7 +158,6 @@ nvfx_screen_is_format_supported(struct pipe_screen *pscreen,
unsigned bind, unsigned geom_flags)
{
struct nvfx_screen *screen = nvfx_screen(pscreen);
- struct pipe_surface *front = ((struct nouveau_winsys *)
pscreen->winsys)->front;
if (sample_count > 1)
return FALSE;
@@ -190,11 +177,7 @@ nvfx_screen_is_format_supported(struct pipe_screen
*pscreen,
switch (format) {
case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
case PIPE_FORMAT_X8Z24_UNORM:
- break;
case PIPE_FORMAT_Z16_UNORM:
- /* TODO: this nv30 limitation probably does not exist */
- if (!screen->is_nv4x && front && front->format !=
PIPE_FORMAT_B5G6R5_UNORM)
- return FALSE;
break;
default:
return FALSE;
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Mesa (master): nvfx: only expose one rt on nv30
Module: Mesa Branch: master Commit: 7e1bf946316ff99feaa3f2e85f70b45bd9a77ade URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7e1bf946316ff99feaa3f2e85f70b45bd9a77ade Author: Xavier Chantry Date: Sat Nov 20 22:51:12 2010 +0100 nvfx: only expose one rt on nv30 We do not know how to use more, GL_ARB_draw_buffers is not exposed on blob. --- src/gallium/drivers/nvfx/nvfx_screen.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c b/src/gallium/drivers/nvfx/nvfx_screen.c index 8bf0907..d7553e9 100644 --- a/src/gallium/drivers/nvfx/nvfx_screen.c +++ b/src/gallium/drivers/nvfx/nvfx_screen.c @@ -37,7 +37,7 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_POINT_SPRITE: return 1; case PIPE_CAP_MAX_RENDER_TARGETS: - return screen->use_nv4x ? 4 : 2; + return screen->use_nv4x ? 4 : 1; case PIPE_CAP_OCCLUSION_QUERY: return 1; case PIPE_CAP_TIMER_QUERY: ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nvfx: fixes after array textures merge
Module: Mesa
Branch: master
Commit: af5345d9371e927019d51ce3ad198958f8cd42a9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=af5345d9371e927019d51ce3ad198958f8cd42a9
Author: Xavier Chantry
Date: Sun Dec 5 12:04:47 2010 +0100
nvfx: fixes after array textures merge
Signed-off-by: Xavier Chantry
Signed-off-by: Patrice Mandin
---
src/gallium/auxiliary/util/u_surfaces.c | 16 +++-
src/gallium/auxiliary/util/u_surfaces.h | 19 ++-
src/gallium/drivers/nvfx/nvfx_miptree.c | 17 +
src/gallium/drivers/nvfx/nvfx_surface.c |2 +-
4 files changed, 35 insertions(+), 19 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_surfaces.c
b/src/gallium/auxiliary/util/u_surfaces.c
index 45aa15e..fd55bd1 100644
--- a/src/gallium/auxiliary/util/u_surfaces.c
+++ b/src/gallium/auxiliary/util/u_surfaces.c
@@ -29,10 +29,11 @@
#include "util/u_inlines.h"
#include "util/u_memory.h"
-struct pipe_surface *
+boolean
util_surfaces_do_get(struct util_surfaces *us, unsigned surface_struct_size,
struct pipe_screen *pscreen, struct pipe_resource *pt,
- unsigned level, unsigned layer, unsigned flags)
+ unsigned level, unsigned layer, unsigned flags,
+ struct pipe_surface **res)
{
struct pipe_surface *ps;
@@ -53,12 +54,16 @@ util_surfaces_do_get(struct util_surfaces *us, unsigned
surface_struct_size,
if(ps)
{
p_atomic_inc(&ps->reference.count);
- return ps;
+ *res = ps;
+ return FALSE;
}
ps = (struct pipe_surface *)CALLOC(1, surface_struct_size);
if(!ps)
- return NULL;
+ {
+ *res = NULL;
+ return FALSE;
+ }
pipe_surface_init(ps, pt, level, layer, flags);
@@ -67,7 +72,8 @@ util_surfaces_do_get(struct util_surfaces *us, unsigned
surface_struct_size,
else
us->u.array[level] = ps;
- return ps;
+ *res = ps;
+ return TRUE;
}
void
diff --git a/src/gallium/auxiliary/util/u_surfaces.h
b/src/gallium/auxiliary/util/u_surfaces.h
index 86a1c2f..da4fbbf 100644
--- a/src/gallium/auxiliary/util/u_surfaces.h
+++ b/src/gallium/auxiliary/util/u_surfaces.h
@@ -42,11 +42,19 @@ struct util_surfaces
} u;
};
-struct pipe_surface *util_surfaces_do_get(struct util_surfaces *us, unsigned
surface_struct_size, struct pipe_screen *pscreen, struct pipe_resource *pt,
unsigned level, unsigned layer, unsigned flags);
+/* Return value indicates if the pipe surface result is new */
+boolean
+util_surfaces_do_get(struct util_surfaces *us, unsigned surface_struct_size,
+ struct pipe_screen *pscreen, struct pipe_resource *pt,
+ unsigned level, unsigned layer, unsigned flags,
+ struct pipe_surface **res);
/* fast inline path for the very common case */
-static INLINE struct pipe_surface *
-util_surfaces_get(struct util_surfaces *us, unsigned surface_struct_size,
struct pipe_screen *pscreen, struct pipe_resource *pt, unsigned level, unsigned
layer, unsigned flags)
+static INLINE boolean
+util_surfaces_get(struct util_surfaces *us, unsigned surface_struct_size,
+ struct pipe_screen *pscreen, struct pipe_resource *pt,
+ unsigned level, unsigned layer, unsigned flags,
+ struct pipe_surface **res)
{
if(likely((pt->target == PIPE_TEXTURE_2D || pt->target ==
PIPE_TEXTURE_RECT) && us->u.array))
{
@@ -54,11 +62,12 @@ util_surfaces_get(struct util_surfaces *us, unsigned
surface_struct_size, struct
if(ps)
{
p_atomic_inc(&ps->reference.count);
-return ps;
+*res = ps;
+return FALSE;
}
}
- return util_surfaces_do_get(us, surface_struct_size, pscreen, pt, level,
layer, flags);
+ return util_surfaces_do_get(us, surface_struct_size, pscreen, pt, level,
layer, flags, res);
}
static INLINE struct pipe_surface *
diff --git a/src/gallium/drivers/nvfx/nvfx_miptree.c
b/src/gallium/drivers/nvfx/nvfx_miptree.c
index db48025..2f9d553 100644
--- a/src/gallium/drivers/nvfx/nvfx_miptree.c
+++ b/src/gallium/drivers/nvfx/nvfx_miptree.c
@@ -193,18 +193,19 @@ struct pipe_surface *
nvfx_miptree_surface_new(struct pipe_context *pipe, struct pipe_resource *pt,
const struct pipe_surface *surf_tmpl)
{
- struct nvfx_miptree* mt = (struct nvfx_miptree*)pt;
- struct nvfx_surface *ns;
+ struct nvfx_miptree *mt = (struct nvfx_miptree *)pt;
unsigned level = surf_tmpl->u.tex.level;
+ struct nvfx_surface *ns = NULL;
assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
- ns = (struct nvfx_surface*)util_surfaces_get(&mt->surfaces,
sizeof(struct nvfx_surface), NULL, pt,
-level,
surf_tmpl->u.tex.first_layer, surf_tmpl->usage);
-
Mesa (master): init ps->context with util_surfaces_get and do_get
Module: Mesa
Branch: master
Commit: e3256ccb045032960f099318938991392b896b44
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3256ccb045032960f099318938991392b896b44
Author: Xavier Chantry
Date: Sun Dec 5 12:09:30 2010 +0100
init ps->context with util_surfaces_get and do_get
Signed-off-by: Xavier Chantry
Reviewed-by: Jakob Bornecrantz
Signed-off-by: Patrice Mandin
---
src/gallium/auxiliary/util/u_inlines.h | 13 -
src/gallium/auxiliary/util/u_surfaces.c |6 +++---
src/gallium/auxiliary/util/u_surfaces.h |8
src/gallium/drivers/nvfx/nvfx_miptree.c |3 +--
4 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_inlines.h
b/src/gallium/auxiliary/util/u_inlines.h
index d5bc114..e55aafe 100644
--- a/src/gallium/auxiliary/util/u_inlines.h
+++ b/src/gallium/auxiliary/util/u_inlines.h
@@ -136,8 +136,9 @@ pipe_sampler_view_reference(struct pipe_sampler_view **ptr,
struct pipe_sampler_
}
static INLINE void
-pipe_surface_reset(struct pipe_surface* ps, struct pipe_resource *pt,
- unsigned level, unsigned layer, unsigned flags)
+pipe_surface_reset(struct pipe_context *ctx, struct pipe_surface* ps,
+ struct pipe_resource *pt, unsigned level, unsigned layer,
+ unsigned flags)
{
pipe_resource_reference(&ps->texture, pt);
ps->format = pt->format;
@@ -146,15 +147,17 @@ pipe_surface_reset(struct pipe_surface* ps, struct
pipe_resource *pt,
ps->usage = flags;
ps->u.tex.level = level;
ps->u.tex.first_layer = ps->u.tex.last_layer = layer;
+ ps->context = ctx;
}
static INLINE void
-pipe_surface_init(struct pipe_surface* ps, struct pipe_resource *pt,
- unsigned level, unsigned layer, unsigned flags)
+pipe_surface_init(struct pipe_context *ctx, struct pipe_surface* ps,
+ struct pipe_resource *pt, unsigned level, unsigned layer,
+ unsigned flags)
{
ps->texture = 0;
pipe_reference_init(&ps->reference, 1);
- pipe_surface_reset(ps, pt, level, layer, flags);
+ pipe_surface_reset(ctx, ps, pt, level, layer, flags);
}
/*
diff --git a/src/gallium/auxiliary/util/u_surfaces.c
b/src/gallium/auxiliary/util/u_surfaces.c
index fd55bd1..b0cfec2 100644
--- a/src/gallium/auxiliary/util/u_surfaces.c
+++ b/src/gallium/auxiliary/util/u_surfaces.c
@@ -31,7 +31,7 @@
boolean
util_surfaces_do_get(struct util_surfaces *us, unsigned surface_struct_size,
- struct pipe_screen *pscreen, struct pipe_resource *pt,
+ struct pipe_context *ctx, struct pipe_resource *pt,
unsigned level, unsigned layer, unsigned flags,
struct pipe_surface **res)
{
@@ -51,7 +51,7 @@ util_surfaces_do_get(struct util_surfaces *us, unsigned
surface_struct_size,
ps = us->u.array[level];
}
- if(ps)
+ if(ps && ps->context == ctx)
{
p_atomic_inc(&ps->reference.count);
*res = ps;
@@ -65,7 +65,7 @@ util_surfaces_do_get(struct util_surfaces *us, unsigned
surface_struct_size,
return FALSE;
}
- pipe_surface_init(ps, pt, level, layer, flags);
+ pipe_surface_init(ctx, ps, pt, level, layer, flags);
if(pt->target == PIPE_TEXTURE_3D || pt->target == PIPE_TEXTURE_CUBE)
cso_hash_insert(us->u.hash, (layer << 8) | level, ps);
diff --git a/src/gallium/auxiliary/util/u_surfaces.h
b/src/gallium/auxiliary/util/u_surfaces.h
index da4fbbf..9581fed 100644
--- a/src/gallium/auxiliary/util/u_surfaces.h
+++ b/src/gallium/auxiliary/util/u_surfaces.h
@@ -45,21 +45,21 @@ struct util_surfaces
/* Return value indicates if the pipe surface result is new */
boolean
util_surfaces_do_get(struct util_surfaces *us, unsigned surface_struct_size,
- struct pipe_screen *pscreen, struct pipe_resource *pt,
+ struct pipe_context *ctx, struct pipe_resource *pt,
unsigned level, unsigned layer, unsigned flags,
struct pipe_surface **res);
/* fast inline path for the very common case */
static INLINE boolean
util_surfaces_get(struct util_surfaces *us, unsigned surface_struct_size,
- struct pipe_screen *pscreen, struct pipe_resource *pt,
+ struct pipe_context *ctx, struct pipe_resource *pt,
unsigned level, unsigned layer, unsigned flags,
struct pipe_surface **res)
{
if(likely((pt->target == PIPE_TEXTURE_2D || pt->target ==
PIPE_TEXTURE_RECT) && us->u.array))
{
struct pipe_surface *ps = us->u.array[level];
- if(ps)
+ if(ps && ps->context == ctx)
{
p_atomic_inc(&ps->reference.count);
*res = ps;
@@ -67,7 +67,7 @@ util_surfaces_get(struct util_surfaces *us, unsigned
surface_struct_size,
}
Mesa (master): gallium/trace: check bind_vertex_sampler_states and set_vertex_sampler_views
Module: Mesa
Branch: master
Commit: ccacabe86c30623b00997f8ec0b4cd01866ee46a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ccacabe86c30623b00997f8ec0b4cd01866ee46a
Author: Xavier Chantry
Date: Sun Dec 5 12:12:20 2010 +0100
gallium/trace: check bind_vertex_sampler_states and set_vertex_sampler_views
Signed-off-by: Xavier Chantry
Reviewed-by: Jakob Bornecrantz
Signed-off-by: Patrice Mandin
---
src/gallium/drivers/trace/tr_context.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/trace/tr_context.c
b/src/gallium/drivers/trace/tr_context.c
index 2fdb6c9..eaabae8 100644
--- a/src/gallium/drivers/trace/tr_context.c
+++ b/src/gallium/drivers/trace/tr_context.c
@@ -314,6 +314,9 @@ trace_context_bind_vertex_sampler_states(struct
pipe_context *_pipe,
struct trace_context *tr_ctx = trace_context(_pipe);
struct pipe_context *pipe = tr_ctx->pipe;
+ if (!pipe->bind_vertex_sampler_states)
+ return;
+
trace_dump_call_begin("pipe_context", "bind_vertex_sampler_states");
trace_dump_arg(ptr, pipe);
@@ -980,6 +983,9 @@ trace_context_set_vertex_sampler_views(struct pipe_context
*_pipe,
struct pipe_sampler_view *unwrapped_views[PIPE_MAX_VERTEX_SAMPLERS];
unsigned i;
+ if (!pipe->set_vertex_sampler_views)
+ return;
+
for(i = 0; i < num; ++i) {
tr_view = trace_sampler_view(views[i]);
unwrapped_views[i] = tr_view ? tr_view->sampler_view : NULL;
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Mesa (master): nouveau/nvfx: Add more unsupported PIPE_CAP values
Module: Mesa Branch: master Commit: 941989483543bc6d24c2df166362f6b6fb4a4062 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=941989483543bc6d24c2df166362f6b6fb4a4062 Author: Patrice Mandin Date: Tue Dec 6 21:42:31 2011 +0100 nouveau/nvfx: Add more unsupported PIPE_CAP values Signed-off-by: Patrice Mandin --- src/gallium/drivers/nvfx/nvfx_screen.c |6 +- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c b/src/gallium/drivers/nvfx/nvfx_screen.c index f56c697..ac03199 100644 --- a/src/gallium/drivers/nvfx/nvfx_screen.c +++ b/src/gallium/drivers/nvfx/nvfx_screen.c @@ -84,7 +84,11 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_SEAMLESS_CUBE_MAP: case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: case PIPE_CAP_SHADER_STENCIL_EXPORT: - return 0; + case PIPE_CAP_MIN_TEXEL_OFFSET: + case PIPE_CAP_MAX_TEXEL_OFFSET: + case PIPE_CAP_CONDITIONAL_RENDER: + case PIPE_CAP_TEXTURE_BARRIER: +return 0; case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: return 0; default: ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
